diff --git a/doc/boards.yml b/doc/boards.yml
index 01dd7b6df0..3047568fa0 100644
--- a/doc/boards.yml
+++ b/doc/boards.yml
@@ -496,6 +496,13 @@
   Memory: OK
   Flash: OK
 
+- ID: lilygo-t-fpga
+  Description: Lilygo T-FPGA
+  URL: https://www.lilygo.cc/products/t-fpga
+  FPGA: Gowin GW1NSR-LV4CQN48PC6/15
+  Memory: OK
+  Flash: OK
+
 - ID: machXO2EVN
   Description: Lattice MachXO2 Breakout Board Evaluation Kit
   URL: https://www.latticesemi.com/products/developmentboardsandkits/machxo2breakoutboard
diff --git a/src/board.hpp b/src/board.hpp
index db70e58a75..2aab33bf2a 100644
--- a/src/board.hpp
+++ b/src/board.hpp
@@ -177,6 +177,7 @@ static std::map <std::string, target_board_t> board_list = {
 	JTAG_BOARD("LD-KONFEKT",      "LFE5U-12F-6BG256C", "", 0, 0, CABLE_MHZ(6)),
 	DFU_BOARD("LD-KONFEKT-DFU",       "", "dfu", 0x16d0, 0x116d, 0),
 	JTAG_BOARD("licheeTang",      "", "anlogicCable", 0, 0, CABLE_DEFAULT),
+	JTAG_BOARD("lilygo-t-fpga",   "", "gwu2x",      0, 0, CABLE_DEFAULT),
 	/* left for backward compatibility, use tec0117 instead */
 	JTAG_BOARD("littleBee",       "", "ft2232",     0, 0, CABLE_DEFAULT),
 	JTAG_BOARD("machXO2EVN",      "", "ft2232",     0, 0, CABLE_DEFAULT),