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RTC/RCC: Fix LSI value being ignored. Make sure LSI is running for RTc
1 parent c872801 commit d66ac33

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4 files changed

+7
-5
lines changed

4 files changed

+7
-5
lines changed

.vscode/launch.json

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,7 @@
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"debugger_args": [
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"-nx" // dont use the .gdbinit file
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],
16-
"executable": "./target/thumbv7em-none-eabi/debug/examples/timer",
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"executable": "./target/thumbv7em-none-eabi/debug/examples/rtc",
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"remote": true,
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"target": ":3333",
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"cwd": "${workspaceRoot}",

examples/rtc.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,7 @@ fn main() -> ! {
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let mut timer = Delay::new(cp.SYST, clocks);
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let mut pwr = dp.PWR.constrain(&mut rcc.apb1r1);
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let rtc = Rtc::rtc(dp.RTC, &mut rcc.apb1r1, &mut rcc.bdcr, &mut pwr.cr1);
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let rtc = Rtc::rtc(dp.RTC, &mut rcc.apb1r1, &mut rcc.bdcr, &mut pwr.cr1, clocks);
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let mut time = Time::new(21.hours(), 57.minutes(), 32.seconds(), false);
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let mut date = Date::new(1.day(), 24.date(), 4.month(), 2018.year());

src/rcc.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -256,7 +256,7 @@ impl CFGR {
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/// Sets LSI clock on (the default) or off
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pub fn lsi(mut self, on: bool) -> Self
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{
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self.hsi48 = on;
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self.lsi = on;
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self
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}
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src/rtc.rs

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
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//! RTC peripheral abstraction
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use crate::datetime::*;
4-
use crate::rcc::{BDCR, APB1R1};
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use crate::rcc::{BDCR, APB1R1, Clocks};
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use crate::pwr;
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use crate::stm32::{RTC};
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@@ -11,7 +11,9 @@ pub struct Rtc {
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}
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impl Rtc {
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pub fn rtc(rtc: RTC, apb1r1: &mut APB1R1, bdcr: &mut BDCR, pwrcr1: &mut pwr::CR1) -> Self {
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pub fn rtc(rtc: RTC, apb1r1: &mut APB1R1, bdcr: &mut BDCR, pwrcr1: &mut pwr::CR1, clocks: Clocks) -> Self {
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assert_eq!(clocks.lsi(), true); // make sure LSI is enabled
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// enable peripheral clock for communication
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apb1r1.enr().modify(|_, w| w.rtcapben().set_bit());
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pwrcr1.reg().read(); // read to allow the pwr clock to enable

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