diff --git a/src/gpio.rs b/src/gpio.rs
index c4efbb03..414ce56e 100644
--- a/src/gpio.rs
+++ b/src/gpio.rs
@@ -203,8 +203,9 @@ mod marker {
 impl<MODE> marker::Interruptable for Output<MODE> {}
 impl marker::Interruptable for Input {}
 impl marker::Readable for Input {}
-impl<const A: u8, MODE> marker::Readable for Alternate<A, MODE> {}
 impl marker::Readable for Output<OpenDrain> {}
+impl<const A: u8, Otype> marker::Interruptable for Alternate<A, Otype> {}
+impl<const A: u8, MODE> marker::Readable for Alternate<A, MODE> {}
 impl marker::Active for Input {}
 impl<Otype> marker::OutputSpeed for Output<Otype> {}
 impl<const A: u8, Otype> marker::OutputSpeed for Alternate<A, Otype> {}
diff --git a/src/gpio/alt.rs b/src/gpio/alt.rs
index 2fc1746b..fa16895d 100644
--- a/src/gpio/alt.rs
+++ b/src/gpio/alt.rs
@@ -1,6 +1,69 @@
 mod h7;
 pub use h7::*;
 
+macro_rules! extipin {
+    ($( $(#[$attr:meta])* $PX:ident,)*) => {
+        fn make_interrupt_source(&mut self, _syscfg: &mut $crate::pac::SYSCFG) {
+            match self {
+                $(
+                    $(#[$attr])*
+                    Self::$PX(p) => p.make_interrupt_source(_syscfg),
+                )*
+                _ => {},
+            }
+
+        }
+
+        fn trigger_on_edge(&mut self, _exti: &mut $crate::pac::EXTI, _level: $crate::gpio::Edge) {
+            match self {
+                $(
+                    $(#[$attr])*
+                    Self::$PX(p) => p.trigger_on_edge(_exti, _level),
+                )*
+                _ => {},
+            }
+        }
+
+        fn enable_interrupt(&mut self, _exti: &mut $crate::pac::EXTI) {
+            match self {
+                $(
+                    $(#[$attr])*
+                    Self::$PX(p) => p.enable_interrupt(_exti),
+                )*
+                _ => {},
+            }
+        }
+        fn disable_interrupt(&mut self, _exti: &mut $crate::pac::EXTI) {
+            match self {
+                $(
+                    $(#[$attr])*
+                    Self::$PX(p) => p.disable_interrupt(_exti),
+                )*
+                _ => {},
+            }
+        }
+        fn clear_interrupt_pending_bit(&mut self) {
+            match self {
+                $(
+                    $(#[$attr])*
+                    Self::$PX(p) => p.clear_interrupt_pending_bit(),
+                )*
+                _ => {},
+            }
+        }
+        fn check_interrupt(&self) -> bool {
+            match self {
+                $(
+                    $(#[$attr])*
+                    Self::$PX(p) => p.check_interrupt(),
+                )*
+                _ => false,
+            }
+        }
+    };
+}
+use extipin;
+
 macro_rules! pin {
     ( $($(#[$docs:meta])* <$name:ident, $Otype:ident> for $(no: $NoPin:ident,)? [$(
         $(#[$attr:meta])* $PX:ident<$A:literal $(, Speed::$Speed:ident)?>,
@@ -60,6 +123,11 @@ macro_rules! pin {
                 }
             }
 
+            #[allow(unreachable_patterns)]
+            impl $crate::gpio::ExtiPin for $name {
+                extipin! { $( $(#[$attr])* $PX, )* }
+            }
+
             $(
                 impl From<$NoPin<$Otype>> for $name {
                     fn from(p: $NoPin<$Otype>) -> Self {
@@ -108,7 +176,7 @@ macro_rules! pin {
     };
 
     ( $($(#[$docs:meta])* <$name:ident> default:$DefaultOtype:ident for $(no: $NoPin:ident,)? [$(
-            $(#[$attr:meta])* $PX:ident<$A:literal $(, Speed::$Speed:ident)?>,
+        $(#[$attr:meta])* $PX:ident<$A:literal $(, Speed::$Speed:ident)?>,
     )*],)*) => {
         $(
             #[derive(Debug)]
@@ -165,6 +233,11 @@ macro_rules! pin {
                 }
             }
 
+            #[allow(unreachable_patterns)]
+            impl<Otype> $crate::gpio::ExtiPin for $name<Otype> {
+                extipin! { $( $(#[$attr])* $PX, )* }
+            }
+
             $(
                 impl<Otype> From<$NoPin<Otype>> for $name<Otype> {
                     fn from(p: $NoPin<Otype>) -> Self {
@@ -274,7 +347,7 @@ pub trait I2cCommon {
 
 // I2S pins
 pub trait I2sCommon {
-    type Ck;
+    type Ck: crate::gpio::PinSpeed;
     type Sd;
     type Ws: crate::gpio::ReadPin + crate::gpio::ExtiPin;
 }
@@ -286,6 +359,13 @@ pub trait I2sExtPin {
 }
 
 // QuadSPI pins
+
+#[cfg(feature = "gpio-h747")]
+pub trait QuadSpiBanks {
+    type Bank1;
+    type Bank2;
+}
+#[cfg(feature = "gpio-h747")]
 pub trait QuadSpiBank {
     type Io0: crate::gpio::PinSpeed;
     type Io1: crate::gpio::PinSpeed;
@@ -294,6 +374,7 @@ pub trait QuadSpiBank {
     type Ncs: crate::gpio::PinSpeed;
 }
 
+#[cfg(any(feature = "gpio-h72", feature = "gpio-h7a2"))]
 pub trait OctospiPort {
     type Clk;
     type Nclk;
@@ -330,7 +411,6 @@ pub trait SaiPdm {
 }
 
 // SPDIFRX pins
-
 pub trait SPdifIn<const C: u8> {
     type In;
 }
@@ -364,8 +444,7 @@ pub trait TimCPin<const C: u8> {
     type Ch<Otype>;
 }
 
-/// This trait marks which GPIO pins may be used as complementary PWM channels; it should not be directly used.
-/// See the device datasheet 'Pin descriptions' chapter for which pins can be used with which timer PWM channels (or look at Implementors)
+/// Complementary output channel `C`
 pub trait TimNCPin<const C: u8> {
     type ChN<Otype>;
 }
diff --git a/src/gpio/alt/h7.rs b/src/gpio/alt/h7.rs
index c1f4bc5a..5a54c13a 100644
--- a/src/gpio/alt/h7.rs
+++ b/src/gpio/alt/h7.rs
@@ -3394,52 +3394,6 @@ pub mod sdmmc2 {
     }
 }
 
-#[cfg(feature = "gpio-h7a2")]
-pub mod spdifrx {
-    use super::*;
-
-    pin! {
-        <In1, PushPull> for [
-            PD7<9>,
-
-            PG11<8>,
-        ],
-
-        <In2, PushPull> for [
-            PD8<9>,
-
-            PG12<8>,
-        ],
-
-        <In3, PushPull> for [
-            PC4<9>,
-
-            PG8<8>,
-        ],
-
-        <In4, PushPull> for [
-            PC5<9>,
-
-            PG9<8>,
-        ],
-    }
-
-    use crate::pac::SPDIFRX;
-    impl SPdifIn<1> for SPDIFRX {
-        type In = In1;
-    }
-    impl SPdifIn<2> for SPDIFRX {
-        type In = In2;
-    }
-    impl SPdifIn<3> for SPDIFRX {
-        type In = In3;
-    }
-    impl SPdifIn<4> for SPDIFRX {
-        type In = In4;
-    }
-}
-
-#[cfg(any(feature = "gpio-h72", feature = "gpio-h747"))]
 pub mod spdifrx1 {
     use super::*;
 
@@ -3454,13 +3408,13 @@ pub mod spdifrx1 {
 
     pin! {
         <In1, PushPull> for [
-            #[cfg(feature = "gpio-h72")]
+            #[cfg(any(feature = "gpio-h72", feature = "gpio-h7a2"))]
             PD7<9>,
 
             #[cfg(feature = "gpio-h747")]
             PD8<9>,
 
-            #[cfg(feature = "gpio-h72")]
+            #[cfg(any(feature = "gpio-h72", feature = "gpio-h7a2"))]
             PG11<8>,
 
             #[cfg(feature = "gpio-h747")]
@@ -3471,24 +3425,24 @@ pub mod spdifrx1 {
             #[cfg(feature = "gpio-h747")]
             PC4<9>,
 
-            #[cfg(feature = "gpio-h72")]
+            #[cfg(any(feature = "gpio-h72", feature = "gpio-h7a2"))]
             PD8<9>,
 
             #[cfg(feature = "gpio-h747")]
             PG8<8>,
 
-            #[cfg(feature = "gpio-h72")]
+            #[cfg(any(feature = "gpio-h72", feature = "gpio-h7a2"))]
             PG12<8>,
         ],
 
         <In3, PushPull> for [
-            #[cfg(feature = "gpio-h72")]
+            #[cfg(any(feature = "gpio-h72", feature = "gpio-h7a2"))]
             PC4<9>,
 
             #[cfg(feature = "gpio-h747")]
             PC5<9>,
 
-            #[cfg(feature = "gpio-h72")]
+            #[cfg(any(feature = "gpio-h72", feature = "gpio-h7a2"))]
             PG8<8>,
 
             #[cfg(feature = "gpio-h747")]
@@ -3496,7 +3450,7 @@ pub mod spdifrx1 {
         ],
     }
 
-    #[cfg(feature = "gpio-h72")]
+    #[cfg(any(feature = "gpio-h72", feature = "gpio-h7a2"))]
     pin! {
         <In4, PushPull> for [
             PC5<9>,
@@ -3519,7 +3473,7 @@ pub mod spdifrx1 {
     impl SPdifIn<3> for SPDIFRX {
         type In = In3;
     }
-    #[cfg(feature = "gpio-h72")]
+    #[cfg(any(feature = "gpio-h72", feature = "gpio-h7a2"))]
     impl SPdifIn<4> for SPDIFRX {
         type In = In4;
     }