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avrtest.c
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avrtest.c
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/*
This file is part of AVRtest -- A simple simulator for the
AVR family of 8-bit microcontrollers designed to test the compiler.
Copyright (C) 2001, 2002, 2003 Theodore A. Roth, Klaus Rudolph
Copyright (C) 2007 Paulo Marques
Copyright (C) 2008-2024 Free Software Foundation, Inc.
AVRtest is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
AVRtest is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with AVRtest; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdint.h>
#include <inttypes.h>
#include <stdarg.h>
#include <ctype.h>
#include <sys/time.h>
#include "testavr.h"
#include "options.h"
#include "flag-tables.h"
#include "sreg.h"
#include "host.h"
// ---------------------------------------------------------------------------
// register and port definitions
#define SREG (0x3F + IOBASE)
#define SPH (0x3E + IOBASE)
#define SPL (0x3D + IOBASE)
#define EIND (0x3C + IOBASE)
#define RAMPZ (0x3B + IOBASE)
#define RAMPY (0x3A + IOBASE)
#define RAMPX (0x39 + IOBASE)
#define RAMPD (0x38 + IOBASE)
// ----------------------------------------------------------------------------
// Information about program incarnation (avrtest_log, avrtest-xmega, ...).
// Use the global constants only at places where performance does not
// matter e.g. in option parsing, so that these modules are independent
// of ISA_XMEGA and AVRTEST_LOG.
// io_base: load-flash.c:decode_opcode() map I/O -> RAM
// is_avrtest_log: load-flash.c:load_elf() load ELF symbols
// is_xmega, is_tiny: options.c:parse_args() legal -mmcu=MCU
#ifdef ISA_XMEGA
# define IOBASE 0
# define CX 1
const bool is_xmega = true;
const bool is_tiny = false;
#elif defined (ISA_TINY)
# define IOBASE 0
# define CX 0
const bool is_xmega = false;
const bool is_tiny = true;
#else
# define IOBASE 0x20
# define CX 0
const bool is_xmega = false;
const bool is_tiny = false;
#endif
#ifdef AVRTEST_LOG
#define IS_AVRTEST_LOG 1
#else
#define IS_AVRTEST_LOG 0
#endif
const bool is_avrtest_log = IS_AVRTEST_LOG == 1;
const int io_base = IOBASE;
bool have_syscall[32];
// ----------------------------------------------------------------------------
#define IN_AVRTEST
#include "avrtest.h"
const unsigned invalid_opcode = AVRTEST_INVALID_OPCODE;
// ----------------------------------------------------------------------------
// holds simulator state and program information.
program_t program;
// ---------------------------------------------------------------------------
// vars that hold AVR states: PC, RAM and Flash
static NOINLINE NORETURN void bad_PC (unsigned pc);
// Word address of current PC and offset into decoded_flash[].
unsigned cpu_PC;
// Set the PC to a new absolute value.
static INLINE void
set_pc (unsigned pc)
{
cpu_PC = pc;
if (cpu_PC > program.max_pc)
bad_PC (cpu_PC);
}
// Add DELTA to PC. Relative jumps like RJMP wrap around.
static INLINE void
add_pc (int delta)
{
cpu_PC = (cpu_PC + (unsigned) delta) & program.pc_mask;
if (cpu_PC > program.max_pc)
bad_PC (cpu_PC);
}
#if defined ISA_XMEGA || defined ISA_TINY
static byte cpu_reg[0x20];
#else
#define cpu_reg cpu_data
#endif /* XMEGA || TINY */
// cpu_data is used to store registers (non-xmega, non-tiny), ioport values
// and actual SRAM
static byte cpu_data[MAX_RAM_SIZE];
static byte cpu_eeprom[MAX_EEPROM_SIZE];
// For accesses into `cpu_data'.
static unsigned ram_valid_mask;
// flash
static byte cpu_flash[MAX_FLASH_SIZE];
static decoded_t decoded_flash[MAX_FLASH_SIZE/2];
// ---------------------------------------------------------------------------
// Exit stati as used with leave()
typedef struct
{
// Holding some keyword that is scanned by board descriptions
const char *text;
// Specify kind of failure (not from target program) error
const char *kind;
// Whether we exit because of AVRtest or usage problems rather than
// problems in the target program
int failure;
// Exit value with -q quiet operation, cf. README
int quiet_value;
} exit_status_t;
static const exit_status_t exit_status[] =
{
// "EXIT" and "ABORTED" are keywords scanned by board descriptions.
// -1 : Use exit_value (only set to != 0 with LEAVE_EXIT)
[LEAVE_EXIT] = { "EXIT", NULL, EXIT_SUCCESS, -1 },
[LEAVE_ABORTED] = { "ABORTED", NULL, EXIT_SUCCESS, EXIT_FAILURE },
[LEAVE_TIMEOUT] = { "TIMEOUT", NULL, EXIT_SUCCESS, 10 },
[LEAVE_ELF] = { "ABORTED", NULL, EXIT_SUCCESS, 11 },
[LEAVE_CODE] = { "ABORTED", NULL, EXIT_SUCCESS, 12 },
[LEAVE_SYMBOL] = { "ABORTED", NULL, EXIT_SUCCESS, 13 },
[LEAVE_HOSTIO] = { "ABORTED", NULL, EXIT_SUCCESS, 14 },
// Something went badly wrong
[LEAVE_MEMORY] = { "ABORTED", "memory", EXIT_FAILURE, 20 },
[LEAVE_USAGE] = { "ABORTED", "usage", EXIT_FAILURE, 21 },
[LEAVE_FOPEN] = { "ABORTED", "file open", EXIT_FAILURE, 22 },
[LEAVE_FATAL] = { "FATAL ABORTED", "fatal", EXIT_FAILURE, 42 },
};
// Skip any output if -q (quiet) is on
void qprintf (const char *fmt, ...)
{
if (!options.do_quiet)
{
va_list args;
va_start (args, fmt);
vprintf (fmt, args);
va_end (args);
}
}
static void print_runtime (void);
void NOINLINE NORETURN
leave (int n, const char *reason, ...)
{
const exit_status_t *status = & exit_status[n];
va_list args;
program.leave_status = n;
// make sure we print the last log line before leaving
if (EXIT_SUCCESS == status->failure)
log_dump_line (NULL);
qprintf ("\n");
if (options.do_runtime
&& EXIT_SUCCESS == status->failure)
print_runtime();
if (!options.do_quiet)
{
va_start (args, reason);
printf (" exit status: %s\n"
" reason: ", program.exit_value
? exit_status[LEAVE_ABORTED].text
: status->text);
vprintf (reason, args);
printf ("\n"
" program: %s\n",
program.name ? program.name : "-not set-");
if (EXIT_SUCCESS == status->failure)
{
if (program.entry_point != 0)
printf (" entry point: %06x\n", program.entry_point);
printf ("exit address: %06x\n"
"total cycles: %" PRIu64 "\n"
"total instr.: %" PRIu64 "\n\n", cpu_PC * 2,
program.n_cycles, program.n_insns);
}
va_end (args);
fflush (stdout);
exit (status->failure);
}
fflush (stdout);
if (status->failure != EXIT_SUCCESS)
{
FILE *out = stderr;
va_start (args, reason);
fprintf (out, "\n%s: %s error: ", options.self, status->kind);
vfprintf (out, reason, args);
fprintf (out, "\n");
fflush (out);
va_end (args);
}
exit (n == LEAVE_EXIT ? program.exit_value : status->quiet_value);
}
// ---------------------------------------------------------------------------
// vars used with -runtime to measure AVRtest performance
static struct timeval t_start, t_decode, t_execute, t_load;
static void
time_sub (unsigned long *s, unsigned long *us, double *ms,
const struct timeval *t1, const struct timeval *t0)
{
unsigned long s0 = (unsigned long) t0->tv_sec;
unsigned long s1 = (unsigned long) t1->tv_sec;
unsigned long u0 = (unsigned long) t0->tv_usec;
unsigned long u1 = (unsigned long) t1->tv_usec;
*s = s1 - s0;
*us = u1 - u0;
if (u1 < u0)
{
(*s)--;
*us += 1000000UL;
}
*ms = 1000. * (*s) + 0.001 * (*us);
}
static void
print_runtime (void)
{
const program_t *p = &program;
struct timeval t_end;
unsigned long r_sec, e_sec, d_sec, l_sec, r_us, e_us, d_us, l_us;
double r_ms, e_ms, d_ms, l_ms;
gettimeofday (&t_end, NULL);
time_sub (&r_sec, &r_us, &r_ms, &t_end, &t_start);
time_sub (&e_sec, &e_us, &e_ms, &t_end, &t_execute);
time_sub (&d_sec, &d_us, &d_ms, &t_execute, &t_decode);
time_sub (&l_sec, &l_us, &l_ms, &t_decode, &t_load);
printf (" load: %lu:%02lu.%06lu = %3lu.%03lu sec ="
" %6.2f%%, %10.3f bytes/ms, 0x%05x = %u bytes\n",
l_sec/60, l_sec%60, l_us, l_sec, l_us/1000,
r_ms > 0.01 ? 100.*l_ms/r_ms : 0.0,
l_ms > 0.01 ? p->n_bytes/l_ms : 0.0, p->n_bytes, p->n_bytes);
unsigned n_decoded = p->code_end - p->code_start + 1;
printf (" decode: %lu:%02lu.%06lu = %3lu.%03lu sec ="
" %6.2f%%, %10.3f bytes/ms, 0x%05x = %u bytes\n",
d_sec/60, d_sec%60, d_us, d_sec, d_us/1000,
r_ms > 0.01 ? 100.*d_ms/r_ms : 0.0,
d_ms > 0.01 ? n_decoded/d_ms : 0.0, n_decoded, n_decoded);
printf (" execute: %lu:%02lu.%06lu = %3lu.%03lu sec ="
" %6.2f%%, %10.3f instructions/ms\n",
e_sec/60, e_sec%60, e_us, e_sec, e_us/1000,
r_ms > 0.01 ? 100.*e_ms/r_ms : 0.0,
e_ms > 0.01 ? p->n_insns/e_ms : 0.0);
printf (" avrtest run: %lu:%02lu.%06lu = %3lu.%03lu sec ="
" %6.2f%%, %10.3f instructions/ms\n",
r_sec/60, r_sec%60, r_us, r_sec, r_us/1000, 100.,
r_ms > 0.01 ? p->n_insns/r_ms : 0.0);
}
// ----------------------------------------------------------------------------
// ioport / ram / flash, read / write entry points
// Lowest level vanilla memory accessors, no logging.
static INLINE int
data_read_byte_raw (int address)
{
return cpu_data[address];
}
static INLINE void
data_write_byte_raw (int address, int value)
{
cpu_data[address] = value;
}
static INLINE int
flash_read_byte (int address)
{
address &= arch.flash_addr_mask;
// add code here to handle special events
return cpu_flash[address];
}
// Memory accessors with logging.
static INLINE int
data_read_byte (int address)
{
int ret = cpu_data[address];
log_add_data_mov (address == SREG ? "(SREG)->'%s' " : "(%s)->%02x ",
address, ret);
return ret;
}
// write a byte to memory / ioport / register
static INLINE void
data_write_byte (int address, int value)
{
log_add_data_mov (address == SREG ? "(SREG)<-'%s' " : "(%s)<-%02x ",
address, value & 0xff);
cpu_data[address] = value;
}
// get_reg / put_reg are just placeholders for read/write calls where we can
// be sure that the adress is < 32
static INLINE byte
get_reg (int regno)
{
log_append ("(R%d)->%02x ", regno, cpu_reg[regno]);
#ifdef ISA_TINY
if (regno < 16)
leave (LEAVE_CODE, "illegal tiny register R%d", regno);
#endif
return cpu_reg[regno];
}
static INLINE void
put_reg (int regno, byte value)
{
log_append ("(R%d)<-%02x ", regno, value);
#ifdef ISA_TINY
if (regno < 16)
leave (LEAVE_CODE, "illegal tiny register R%d", regno);
#endif
cpu_reg[regno] = value;
}
static INLINE int
get_word_reg_raw (int regno)
{
return cpu_reg[regno] | (cpu_reg[regno + 1] << 8);
}
static INLINE int
get_word_reg (int regno)
{
int ret = get_word_reg_raw (regno);
log_append ("(R%d)->%04x ", regno, ret);
return ret;
}
static INLINE void
put_word_reg_raw (int regno, int value)
{
cpu_reg[regno] = value;
cpu_reg[regno + 1] = value >> 8;
}
static INLINE void
put_word_reg (int regno, int value)
{
log_append ("(R%d)<-%04x ", regno, value & 0xFFFF);
put_word_reg_raw (regno, value);
}
// read a word from memory / ioport / register
static INLINE int
data_read_word (int address)
{
int ret = (data_read_byte_raw (address)
| (data_read_byte_raw (address + 1) << 8));
log_add_data_mov ("(%s)->%04x ", address, ret);
return ret;
}
// write a word to memory / ioport / register
static INLINE void
data_write_word (int address, int value)
{
value &= 0xffff;
log_add_data_mov ("(%s)<-%04x ", address, value);
data_write_byte_raw (address, value & 0xFF);
data_write_byte_raw (address + 1, value >> 8);
}
// ----------------------------------------------------------------------------
// extern functions to make logging.c independent of ISA_XMEGA and ISA_TINY
const int addr_SREG = SREG;
const int addr_SPL = SPL;
byte* const pSP = cpu_data + SPL;
const sfr_t named_sfr[] =
{
{ SPL, "SPL", NULL },
{ SPH, "SPH", NULL },
{ RAMPZ, "RAMPZ", NULL },
{ EIND, "EIND", &arch.has_eind },
#ifdef ISA_XMEGA
{ RAMPX, "RAMPX", &arch.has_rampd },
{ RAMPY, "RAMPY", &arch.has_rampd },
{ RAMPD, "RAMPD", &arch.has_rampd },
#endif // ISA_XMEGA
{ 0, NULL, NULL }
};
byte* cpu_address (int address, int where)
{
switch (where)
{
case AR_REG: return cpu_reg + address;
case AR_RAM: return cpu_data + address;
case AR_FLASH: return cpu_flash + address;
case AR_EEPROM: return cpu_eeprom + address;
}
leave (LEAVE_FATAL, "code must be unreachable");
}
void set_elf_string_table (char *stab, size_t size, int n_entries)
{
log_set_string_table (stab, size, n_entries);
}
void finish_elf_string_table (void)
{
log_finish_string_table ();
}
void set_elf_function_symbol (int addr, size_t offset, bool is_func)
{
log_set_func_symbol (addr, offset, is_func);
}
// Memory allocation that never fails (never returns NULL).
void* get_mem (unsigned n, size_t size, const char *purpose)
{
void *p = calloc (n, size);
if (p == NULL)
leave (LEAVE_MEMORY, "out of memory allocating %u bytes for %s",
(unsigned) (n * size), purpose);
return p;
}
// ----------------------------------------------------------------------------
// flag manipulation functions
static INLINE void
update_flags (int flags, int new_values)
{
int sreg = data_read_byte (SREG);
sreg = (sreg & ~flags) | new_values;
data_write_byte (SREG, sreg);
}
static INLINE int
get_carry (void)
{
return (data_read_byte_raw (SREG) & FLAG_C) != 0;
}
// fast flag update tables to avoid conditional branches on frequently
// used operations
static INLINE unsigned
FUT_ADD_SUB_INDEX (unsigned v1, unsigned v2, unsigned res)
{
/* ((v1 & 0x08) << 9)
| ((v2 & 0x08) << 8)
| ((v1 & 0x80) << 3)
| ((v2 & 0x80) << 2)
| (res & 0x1FF) */
unsigned v = 2 * (v1 & 0x88) + (v2 & 0x88);
v *= 0x104;
return (res & 0x1ff) | (v & 0x1e00);
}
#define FUT_ADDSUB16_INDEX(v1, res) \
(((((v1) >> 8) & 0x80) << 3) | (((res) >> 8) & 0x1FF))
// ----------------------------------------------------------------------------
// helper functions
static INLINE void
add_program_cycles (int64_t cycles)
{
program.n_cycles += (uint64_t) cycles;
}
static INLINE void
push_byte (int value)
{
int sp = data_read_word (SPL);
// temporary hack to disallow growing the stack over the reserved
// register area
if (sp < 0x40 + IOBASE)
leave (LEAVE_CODE, "stack pointer overflow (SP = 0x%04x)", sp);
data_write_byte (sp--, value);
data_write_word (SPL, sp);
}
static int
pop_byte(void)
{
int sp = data_read_word (SPL);
data_write_word (SPL, ++sp);
return data_read_byte (sp);
}
static INLINE void
push_PC (void)
{
int sp = data_read_word (SPL);
// temporary hack to disallow growing the stack over the reserved
// register area
if (sp < 0x40 + IOBASE)
leave (LEAVE_CODE, "stack pointer overflow (SP = 0x%04x)", sp);
data_write_byte (sp--, cpu_PC);
data_write_byte (sp--, cpu_PC >> 8);
if (arch.pc_3bytes)
data_write_byte (sp--, cpu_PC >> 16);
data_write_word (SPL, sp);
}
static NOINLINE NORETURN void
bad_PC (unsigned pc)
{
leave (LEAVE_CODE, "program counter 0x%x out of bounds "
"(0x%x--0x%x)", 2 * pc, program.code_start, program.code_end - 1);
}
static INLINE void
pop_PC (void)
{
unsigned pc = 0;
int sp = data_read_word (SPL);
if (arch.pc_3bytes)
pc = data_read_byte (++sp) << 16;
pc |= data_read_byte (++sp) << 8;
pc |= data_read_byte (++sp);
data_write_word (SPL, sp);
set_pc (pc);
}
// perform the addition and set the appropriate flags
static INLINE void
do_addition_8 (int rd, int rr, int carry)
{
int value1 = get_reg (rd);
int value2 = get_reg (rr);
int result = value1 + value2 + carry;
put_reg (rd, result);
int sreg = flag_update_table_add8[FUT_ADD_SUB_INDEX (value1, value2, result)];
update_flags (FLAG_H | FLAG_S | FLAG_V | FLAG_N | FLAG_Z | FLAG_C, sreg);
}
// perform the left shift and set the appropriate flags
static INLINE void
do_shift_8 (int rd, int carry)
{
int value = get_reg (rd);
int result = value + value + carry;
put_reg (rd, result);
int sreg = flag_update_table_add8[FUT_ADD_SUB_INDEX (value, value, result)];
update_flags (FLAG_H | FLAG_S | FLAG_V | FLAG_N | FLAG_Z | FLAG_C, sreg);
}
// perform the subtraction and set the appropriate flags
static INLINE void
do_subtraction_8 (int rd, int value1, int value2, int carry,
int use_carry, int writeback)
{
int result = value1 - value2 - carry;
if (writeback)
put_reg (rd, result);
int sreg = flag_update_table_sub8[FUT_ADD_SUB_INDEX (value1, value2, result)];
unsigned flag = (data_read_byte_raw (SREG) | ~FLAG_Z) | (use_carry-1);
sreg &= flag;
update_flags (FLAG_H | FLAG_S | FLAG_V | FLAG_N | FLAG_Z | FLAG_C, sreg);
}
static INLINE void
store_logical_result (int rd, int result)
{
put_reg (rd, result);
update_flags (FLAG_S | FLAG_V | FLAG_N | FLAG_Z,
flag_update_table_logical[result]);
}
static INLINE byte
get_ramp (int r_addr)
{
unsigned i = (r_addr - 26) / 2;
if (i <= 2)
return data_read_byte (i + RAMPX);
else
return data_read_byte (RAMPD);
}
static INLINE void
update_reg_and_ramp (int r_addr, int addr, int adjust)
{
put_word_reg (r_addr, addr);
// Only log writeback of RAMPx if it actually changed.
word lo16 = addr & 0xffff;
if (is_xmega && arch.has_rampd)
if ((adjust == -1 && lo16 == 0xffff)
|| (adjust == 1 && lo16 == 0))
{
unsigned i = (r_addr - 26) / 2;
data_write_byte (i + RAMPX, addr >> 16);
}
}
/* Add two RAM address values and apply the appropriate wrap-around
for 2-byte resp. 3-byte addresses. Used by `load_indirect' and
`store_indirect' below. */
static INLINE int
add_address (int addr, int adjust)
{
return is_xmega
? (addr + adjust) & ram_valid_mask
: (addr + adjust) & 0xffff;
}
/* 10q0 qq0d dddd 1qqq | LDD */
static INLINE void
load_indirect (int rd, int r_addr, int adjust, int offset)
{
if (r_addr != REGX && adjust == 0)
log_append ("(###)->%02x ", offset);
int addr = get_word_reg (r_addr);
if (is_xmega && arch.has_rampd)
addr |= get_ramp (r_addr) << 16;
if (adjust < 0)
addr = add_address (addr, adjust);
#if defined ISA_XMEGA || defined ISA_TINY
if ((is_tiny || arch.flash_pm_offset)
&& (word) addr > arch.flash_pm_offset)
{
log_append ("{F:%04x} ", addr - arch.flash_pm_offset);
add_program_cycles (1);
}
#endif // XMEGA || TINY
put_reg (rd, data_read_byte (add_address (addr, offset)));
#if defined ISA_XMEGA || defined ISA_TINY
if (adjust >= 0 && !offset)
add_program_cycles (-1);
#endif
if (adjust > 0)
addr = add_address (addr, adjust);
if (adjust)
update_reg_and_ramp (r_addr, addr, adjust);
}
static INLINE void
store_indirect (int rd, int r_addr, int adjust, int offset)
{
if (r_addr != REGX && adjust == 0)
log_append ("(###)->%02x ", offset);
int addr = get_word_reg (r_addr);
if (is_xmega && arch.has_rampd)
addr |= get_ramp (r_addr) << 16;
if (adjust < 0)
addr = add_address (addr, adjust);
data_write_byte (add_address (addr, offset), get_reg (rd));
#if defined ISA_XMEGA || defined ISA_TINY
if (adjust >= 0 && !offset)
add_program_cycles (-1);
#endif
if (adjust > 0)
addr = add_address (addr, adjust);
if (adjust)
update_reg_and_ramp (r_addr, addr, adjust);
}
static INLINE void
load_program_memory (int rd, bool use_RAMPZ, bool incr)
{
int address = get_word_reg (REGZ);
if (use_RAMPZ)
address |= data_read_byte (RAMPZ) << 16;
put_reg (rd, flash_read_byte (address));
if (incr)
{
address++;
put_word_reg (REGZ, address & 0xFFFF);
if (use_RAMPZ && (address & 0xFFFF) == 0)
data_write_byte (RAMPZ, address >> 16);
}
}
static INLINE void
skip_instruction_on_condition (bool condition, int words_to_skip)
{
if (condition)
{
set_pc (cpu_PC + words_to_skip);
add_program_cycles (words_to_skip);
}
}
static INLINE void
branch_on_sreg_condition (int rd, int rr, int flag_value)
{
int flag = data_read_byte (SREG) & rr;
log_add_flag_read (rr, flag);
if ((flag != 0) == flag_value)
{
int8_t delta = rd;
add_pc (delta);
add_program_cycles (1);
}
}
static INLINE void
rotate_right (int rd, int value, int top_bit /* 0 or 0x100 */)
{
value |= top_bit;
put_reg (rd, value >> 1);
update_flags (FLAG_S | FLAG_V | FLAG_N | FLAG_Z | FLAG_C,
flag_update_table_ror8[value]);
}
static INLINE void
do_multiply (int rd, int rr, bool signed1, bool signed2, int shift)
{
int v1 = signed1 ? ((int8_t) get_reg (rd)) : get_reg (rd);
int v2 = signed2 ? ((int8_t) get_reg (rr)) : get_reg (rr);
int result = (v1 * v2) & 0xFFFF;
int sreg = (result & 0x8000) >> (15 - FLAG_C_BIT);
result <<= shift;
sreg |= FLAG_Z & - (result == 0);
update_flags (FLAG_Z | FLAG_C, sreg);
put_word_reg (0, result);
}
// handle illegal opcodes
static OP_FUNC_TYPE func_ILLEGAL (int ill, int size)
{
cpu_PC -= size;
byte *f = cpu_flash + 2 * cpu_PC;
unsigned code = f[0] + (f[1] << 8);
log_append (".word 0x%04x", code);
switch (ill)
{
case IL_ILL: leave (LEAVE_CODE, "illegal opcode 0x%04x", code);
case IL_ARCH: leave (LEAVE_CODE, "opcode 0x%04x illegal on %s",
code, arch.name);
case IL_TODO:
program.leave_status = LEAVE_ABORTED;
log_dump_line (NULL);
leave (LEAVE_FATAL, "opcode 0x%04x not yet supported", code);
}
leave (LEAVE_FATAL, "in func_ILLEGAL");
}
// ----------------------------------------------------------------------------
// opcode execution functions
/* opcodes with no operands */
/* 1001 0101 1001 1000 | BREAK */
static OP_FUNC_TYPE func_BREAK (int rd, int rr)
{
// FIXME: Acts currently like NOP. Do helpful feature here
}
/* 1001 0101 0001 1001 | EICALL */
static OP_FUNC_TYPE func_EICALL (int rd, int rr)
{
if (!arch.has_eind)
func_ILLEGAL (IL_ARCH, 1);
push_PC();
set_pc (get_word_reg (REGZ) | (data_read_byte (EIND) << 16));
}
/* 1001 0100 0001 1001 | EIJMP */
static OP_FUNC_TYPE func_EIJMP (int rd, int rr)
{
if (!arch.has_eind)
func_ILLEGAL (IL_ARCH, 1);
set_pc (get_word_reg (REGZ) | (data_read_byte (EIND) << 16));
}
/* 1001 0101 1101 1000 | ELPM */
static OP_FUNC_TYPE func_ELPM (int rd, int rr)
{
load_program_memory (0, true, false);
}
/* 1001 0101 1111 1000 | ESPM */
static OP_FUNC_TYPE func_ESPM (int rd, int rr)
{
func_ILLEGAL (IL_TODO, 1);
}
/* 1001 0101 0000 1001 | ICALL */
static OP_FUNC_TYPE func_ICALL (int rd, int rr)
{
push_PC();
set_pc (get_word_reg (REGZ));
add_program_cycles (arch.pc_3bytes);
}
/* 1001 0100 0000 1001 | IJMP */
static OP_FUNC_TYPE func_IJMP (int rd, int rr)
{
set_pc (get_word_reg (REGZ));
}
/* 1001 0101 1100 1000 | LPM */
static OP_FUNC_TYPE func_LPM (int rd, int rr)
{
load_program_memory (0, false, false);
}
/* 0000 0000 0000 0000 | NOP */
static OP_FUNC_TYPE func_NOP (int rd, int rr)
{
}
/* 1001 0101 0000 1000 | RET */
static OP_FUNC_TYPE func_RET (int rd, int rr)
{
pop_PC();
add_program_cycles (arch.pc_3bytes);
}
/* 1001 0101 0001 1000 | RETI */
static OP_FUNC_TYPE func_RETI (int rd, int rr)
{
func_RET (rd, rr);
update_flags (FLAG_I, FLAG_I);
}
/* 1001 0101 1000 1000 | SLEEP */
static OP_FUNC_TYPE func_SLEEP (int rd, int rr)
{
// we don't have anything to wake us up, so just pretend we wake
// up immediately
}
/* 1001 0101 1110 1000 | SPM */
static OP_FUNC_TYPE func_SPM (int rd, int rr)
{
func_ILLEGAL (IL_TODO, 1);
}
/* 1001 0100 KKKK 1011 | DES */
static OP_FUNC_TYPE func_DES (int rd, int rr)
{
func_ILLEGAL (IL_TODO, 1);
}
/* 1001 0101 1010 1000 | WDR */
static OP_FUNC_TYPE func_WDR (int rd, int rr)
{
// we don't have a watchdog, so do nothing
}
/* opcodes with two 5-bit register (Rd and Rr) operands */
/* 0001 11rd dddd rrrr | ADC */
static OP_FUNC_TYPE func_ADC (int rd, int rr)
{
do_addition_8 (rd, rr, get_carry());
}
/* 0001 11rd dddd dddd | ROL */
static OP_FUNC_TYPE func_ROL (int rd, int rr)
{
do_shift_8 (rd, get_carry());
}
/* 0000 11rd dddd rrrr | ADD */
static OP_FUNC_TYPE func_ADD (int rd, int rr)
{
do_addition_8 (rd, rr, 0);
}
/* 0000 11rd dddd dddd | LSL */
static OP_FUNC_TYPE func_LSL (int rd, int rr)
{
do_shift_8 (rd, 0);
}
/* 0010 00rd dddd rrrr | AND or TST */
static OP_FUNC_TYPE func_AND (int rd, int rr)
{
int r1 = get_reg (rd);
int r2 = get_reg (rr);
int result = r1 & r2;
store_logical_result (rd, result);
}
/* 0010 00rd dddd dddd | TST */
static OP_FUNC_TYPE func_TST (int rd, int rr)
{
int result = get_reg (rd);
update_flags (FLAG_S | FLAG_V | FLAG_N | FLAG_Z,
flag_update_table_logical[result]);
}
/* 0001 01rd dddd rrrr | CP */
static OP_FUNC_TYPE func_CP (int rd, int rr)
{
int r1 = get_reg (rd);