diff --git a/components/asic/bm1366.c b/components/asic/bm1366.c
index 097db33d..23073761 100644
--- a/components/asic/bm1366.c
+++ b/components/asic/bm1366.c
@@ -485,9 +485,10 @@ static uint8_t _send_init(uint64_t frequency, uint16_t asic_count)
         _send_BM1366((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_third, 6, BM1366_SERIALTX_DEBUG);
     }
 
-    do_frequency_ramp_up();
-
-    BM1366_send_hash_frequency(frequency);
+    if(frequency != 0){
+        do_frequency_ramp_up();
+        BM1366_send_hash_frequency(frequency);
+    }
 
     //register 10 is still a bit of a mystery. discussion: https://github.com/skot/ESP-Miner/pull/167
 
diff --git a/components/asic/bm1368.c b/components/asic/bm1368.c
index 12ec8c4a..f31da2fb 100644
--- a/components/asic/bm1368.c
+++ b/components/asic/bm1368.c
@@ -295,7 +295,9 @@ uint8_t BM1368_init(uint64_t frequency, uint16_t asic_count)
 
     BM1368_set_job_difficulty_mask(BM1368_ASIC_DIFFICULTY);
 
-    do_frequency_ramp_up((float)frequency);
+    if(frequency != 0){
+        do_frequency_ramp_up((float)frequency);
+    }
 
     _send_BM1368(TYPE_CMD | GROUP_ALL | CMD_WRITE, (uint8_t[]){0x00, 0x10, 0x00, 0x00, 0x15, 0xa4}, 6, false);
     BM1368_set_version_mask(STRATUM_DEFAULT_VERSION_MASK);
diff --git a/components/asic/bm1370.c b/components/asic/bm1370.c
index 7ab12d50..f46383c1 100644
--- a/components/asic/bm1370.c
+++ b/components/asic/bm1370.c
@@ -247,6 +247,8 @@ static uint8_t _send_init(uint64_t frequency, uint16_t asic_count)
     // unsigned char init7[7] = {0x55, 0xAA, 0x53, 0x05, 0x00, 0x00, 0x03};
     // _send_simple(init7, 7);
 
+
+
     // split the chip address space evenly
     uint8_t address_interval = (uint8_t) (256 / chip_counter);
     for (uint8_t i = 0; i < chip_counter; i++) {
@@ -299,7 +301,9 @@ static uint8_t _send_init(uint64_t frequency, uint16_t asic_count)
         _send_BM1370((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_third, 6, BM1370_SERIALTX_DEBUG);
     }
 
-    do_frequency_ramp_up(frequency);
+    if(frequency != 0){
+        do_frequency_ramp_up(frequency);
+    }
 
     //BM1370_send_hash_frequency(frequency);
 
diff --git a/main/EMC2101.c b/main/EMC2101.c
index daf1237e..e2e910a4 100644
--- a/main/EMC2101.c
+++ b/main/EMC2101.c
@@ -33,6 +33,16 @@ esp_err_t EMC2101_init(bool invertPolarity) {
 
 }
 
+
+esp_err_t EMC2101_configure_ideality(uint8_t idealityFactor){
+    ESP_ERROR_CHECK(i2c_bitaxe_register_write_byte(emc2101_dev_handle, EMC2101_EXTERNAL_IDEALITY_FACTOR_REG, idealityFactor));
+    return ESP_OK;
+}
+esp_err_t EMC2101_configure_beta_compensation(uint8_t betaCompensation){
+    ESP_ERROR_CHECK(i2c_bitaxe_register_write_byte(emc2101_dev_handle, EMC2101_BETA_COMPENSATION_FACTOR_REG, betaCompensation));
+    return ESP_OK;
+}
+
 // takes a fan speed percent
 void EMC2101_set_fan_speed(float percent)
 {
diff --git a/main/EMC2101.h b/main/EMC2101.h
index 00c82a47..64fb79d0 100644
--- a/main/EMC2101.h
+++ b/main/EMC2101.h
@@ -66,6 +66,8 @@
 #define FAN_LOOKUP_TABLE_T8 0x5E
 #define FAN_LOOKUP_TABLE_S8 0x5F
 
+#define EMC2101_EXTERNAL_IDEALITY_FACTOR_REG 0x17 // External ideality factor register (temperature slope)
+#define EMC2101_BETA_COMPENSATION_FACTOR_REG 0x18 // Beta compensation register
 /**
  * @brief
  *
@@ -91,4 +93,6 @@ uint16_t EMC2101_get_fan_speed(void);
 esp_err_t EMC2101_init(bool);
 float EMC2101_get_external_temp(void);
 uint8_t EMC2101_get_internal_temp(void);
+esp_err_t EMC2101_configure_ideality(uint8_t);
+esp_err_t EMC2101_configure_beta_compensation(uint8_t);
 #endif /* EMC2101_H_ */
diff --git a/main/nvs_config.h b/main/nvs_config.h
index bf8e3ad0..a49c5737 100644
--- a/main/nvs_config.h
+++ b/main/nvs_config.h
@@ -29,6 +29,7 @@
 #define NVS_CONFIG_BEST_DIFF "bestdiff"
 #define NVS_CONFIG_SELF_TEST "selftest"
 #define NVS_CONFIG_OVERHEAT_MODE "overheat_mode"
+#define NVS_CONFIG_EXTERNAL_TEMP_OFFSET "ext_temp_offset"
 
 #define NVS_CONFIG_SWARM "swarmconfig"
 
diff --git a/main/self_test/self_test.c b/main/self_test/self_test.c
index 89fcc9d5..c07da956 100644
--- a/main/self_test/self_test.c
+++ b/main/self_test/self_test.c
@@ -220,10 +220,46 @@ void self_test(void * pvParameters)
         default:
     }
 
-
     SERIAL_init();
-    uint8_t chips_detected = (GLOBAL_STATE->ASIC_functions.init_fn)(GLOBAL_STATE->POWER_MANAGEMENT_MODULE.frequency_value, GLOBAL_STATE->asic_count);
-    ESP_LOGI(TAG, "%u chips detected, %u expected", chips_detected, GLOBAL_STATE->asic_count);
+    uint8_t chips_detected = 0;
+
+    // Calibrate the temp sensor if need be
+    switch (GLOBAL_STATE->device_model) {
+        case DEVICE_MAX:
+        case DEVICE_ULTRA:
+        case DEVICE_SUPRA:
+        case DEVICE_GAMMA:
+                // Init the asic and send 0 freq so we don't ramp up and produce any heat. This will init the temp sensor.
+                (GLOBAL_STATE->ASIC_functions.init_fn)(0, GLOBAL_STATE->asic_count);
+                // Set vcore to 0
+                VCORE_set_voltage(0.0, GLOBAL_STATE);
+                //Set ideality for correct temp slope
+                EMC2101_configure_ideality(0x37);
+                // Turn off any compensation or offsets
+                EMC2101_configure_beta_compensation(0b000111);
+                // Wait 3 seconds for everything to equalize
+                vTaskDelay(3000 / portTICK_PERIOD_MS);
+                float air_temp = EMC2101_get_internal_temp();
+                //Reads high
+                float asic_temp = EMC2101_get_external_temp();
+
+                float offset = asic_temp - air_temp;
+                ESP_LOGI(TAG, "Temp Offset: %f", offset);
+                //Multiply by 10 to add some precision, divide by 10 when get_u16
+                nvs_config_set_u16(NVS_CONFIG_EXTERNAL_TEMP_OFFSET, offset * 10);
+
+                //Re init the vcore and asic to proceed with testing
+                VCORE_init(GLOBAL_STATE);
+                VCORE_set_voltage(nvs_config_get_u16(NVS_CONFIG_ASIC_VOLTAGE, CONFIG_ASIC_VOLTAGE) / 1000.0, GLOBAL_STATE);
+                chips_detected = (GLOBAL_STATE->ASIC_functions.init_fn)(GLOBAL_STATE->POWER_MANAGEMENT_MODULE.frequency_value, GLOBAL_STATE->asic_count);
+                ESP_LOGI(TAG, "%u chips detected, %u expected", chips_detected, GLOBAL_STATE->asic_count);
+            break;
+        default:
+            //init the vcore and asic to proceed with testing
+            chips_detected = (GLOBAL_STATE->ASIC_functions.init_fn)(GLOBAL_STATE->POWER_MANAGEMENT_MODULE.frequency_value, GLOBAL_STATE->asic_count);
+            ESP_LOGI(TAG, "%u chips detected, %u expected", chips_detected, GLOBAL_STATE->asic_count);
+    }
+
 
     int baud = (*GLOBAL_STATE->ASIC_functions.set_max_baud_fn)();
     vTaskDelay(10 / portTICK_PERIOD_MS);
diff --git a/main/tasks/power_management_task.c b/main/tasks/power_management_task.c
index c7eb7b99..2ace308f 100644
--- a/main/tasks/power_management_task.c
+++ b/main/tasks/power_management_task.c
@@ -212,7 +212,9 @@ void POWER_MANAGEMENT_task(void * pvParameters)
 
                 break;
             case DEVICE_GAMMA:
-                power_management->chip_temp_avg = GLOBAL_STATE->ASIC_initalized ? EMC2101_get_external_temp() : -1;
+                // Per device offset configured during the self test
+                float external_temp_offset = ((float)nvs_config_get_u16(NVS_CONFIG_EXTERNAL_TEMP_OFFSET, 0) / 10);
+                power_management->chip_temp_avg = GLOBAL_STATE->ASIC_initalized ? (EMC2101_get_external_temp() - external_temp_offset) : -1;
                 power_management->vr_temp = (float)TPS546_get_temperature();
 
                 // EMC2101 will give bad readings if the ASIC is turned off