DIOT version

[gkasprow]

A new DIOT/EEM version is on the way:

• take the existing design and replace CPLD with ICE40 - circuit and EEM connectivity copied from Fastino-DIOT (with proper power sequencing)
• get rid of LVDS translators
• move power supplies away from DDS chips, we have a lot of board area
• make sure all points are checked: Design checklist DIOT-Template#1

[newell]

I noticed on the new Urukul board that there is a 25 MHz clock (CLK_25MHz in the schematic) tied to pin K9. What is this going to be used for?

[gkasprow]

There are more issues - the DIOT clock is not routed to the clock distribution IC.
The 25MHz clock is just copied from Fastino design; we would prefer to get 100MHz DRTIO clock from the backplane