diff --git a/apps/Arm/vm_minimal/CMakeLists.txt b/apps/Arm/vm_minimal/CMakeLists.txt
index 2469f648..18ba5df6 100644
--- a/apps/Arm/vm_minimal/CMakeLists.txt
+++ b/apps/Arm/vm_minimal/CMakeLists.txt
@@ -10,6 +10,8 @@ project(camkes-arm-tk1-vm C)
 
 include(${CAMKES_ARM_VM_HELPERS_PATH})
 
+set(smc_dir "")
+
 # Create our CPP Flags based on ARM VM config variables
 if("${KernelARMPlatform}" STREQUAL "tk1")
     set(cpp_flags "-DKERNELARMPLATFORM_TK1")
@@ -128,6 +130,14 @@ elseif("${KernelARMPlatform}" STREQUAL "odroidc2")
         output_dtb_location
     )
     AddToFileServer("linux-dtb" "${output_dtb_location}" DEPENDS dtb_gen_target)
+
+elseif("${KernelARMPlatform}" STREQUAL "zcu102")
+    AddToFileServer("linux" "${CAMKES_VM_IMAGES_DIR}/zynqmp/${KernelZynqmpPetalinuxVersion}/linux")
+    AddToFileServer(
+        "linux-initrd"
+        "${CAMKES_VM_IMAGES_DIR}/zynqmp/${KernelZynqmpPetalinuxVersion}/rootfs-minimal.cpio.gz"
+    )
+    set(smc_dir "${CAMKES_VM_DIR}/components/VM_Arm/plat_include/zynqmp")
 endif()
 
 AddCamkesCPPFlag(cpp_flags CONFIG_VARS VmEmmc2NoDMA VmVUSB Tk1DeviceFwd Tk1Insecure)
@@ -143,4 +153,5 @@ DeclareCAmkESRootserver(
     ${cpp_flags}
     CPP_INCLUDES
     ${CAMKES_VM_DIR}/components/VM_Arm
+    ${smc_dir}
 )
diff --git a/apps/Arm/vm_minimal/settings.cmake b/apps/Arm/vm_minimal/settings.cmake
index f1afa18d..832750a2 100644
--- a/apps/Arm/vm_minimal/settings.cmake
+++ b/apps/Arm/vm_minimal/settings.cmake
@@ -4,7 +4,7 @@
 # SPDX-License-Identifier: BSD-2-Clause
 #
 
-set(supported "tk1;tx1;tx2;exynos5422;qemu-arm-virt;odroidc2")
+set(supported "tk1;tx1;tx2;exynos5422;qemu-arm-virt;odroidc2;zcu102")
 if(NOT "${PLATFORM}" IN_LIST supported)
     message(FATAL_ERROR "PLATFORM: ${PLATFORM} not supported.
          Supported: ${supported}")
@@ -36,3 +36,8 @@ if(${PLATFORM} STREQUAL "qemu-arm-virt")
     set(KernelArmCPU cortex-a53 CACHE STRING "" FORCE)
     set(VmInitRdFile ON CACHE BOOL "" FORCE)
 endif()
+if(${PLATFORM} STREQUAL "zcu102")
+    set(AARCH64 ON CACHE BOOL "" FORCE)
+    set(KernelAllowSMCCalls ON CACHE BOOL "" FORCE)
+    set(KernelZynqmpPetalinuxVersion 2021.1 CACHE STRING "" FORCE)
+endif()
diff --git a/apps/Arm/vm_minimal/zcu102/devices.camkes b/apps/Arm/vm_minimal/zcu102/devices.camkes
new file mode 100644
index 00000000..45525b45
--- /dev/null
+++ b/apps/Arm/vm_minimal/zcu102/devices.camkes
@@ -0,0 +1,131 @@
+/*
+ * Copyright 2023, DornerWorks
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <plat/smc.h>
+#include <configurations/vm.h>
+
+#define VM_INITRD_MAX_SIZE 0x1900000 //25 MB
+#define VM_RAM_BASE 0x10000000
+#define VM_RAM_SIZE 0x10000000
+#define VM_ENTRY_ADDR 0x10080000
+#define VM_RAM_OFFSET 0
+#define VM_DTB_ADDR 0x12000000
+#define VM_INITRD_ADDR 0x13000000
+
+assembly {
+	composition {}
+	configuration {
+
+        vm0.vm_address_config = {
+            "ram_base" : VAR_STRINGIZE(VM_RAM_BASE),
+            "ram_paddr_base" : VAR_STRINGIZE(VM_RAM_BASE),
+            "ram_size" : VAR_STRINGIZE(VM_RAM_SIZE),
+            "ram_offset" : VAR_STRINGIZE(VM_RAM_OFFSET),
+            "dtb_addr" : VAR_STRINGIZE(VM_DTB_ADDR),
+            "initrd_addr" : VAR_STRINGIZE(VM_INITRD_ADDR),
+            "kernel_entry_addr" : VAR_STRINGIZE(VM_ENTRY_ADDR),
+        };
+        vm0.num_vcpus = 4;
+
+        vm0.vm_image_config = {
+            "kernel_name" : "linux",
+            "initrd_name" : "linux-initrd",
+            "kernel_bootcmdline" : "console=ttyPS0,115200 root=/dev/ram rw earlycon clk_ignore_unused",
+            "kernel_stdout" : "serial0:115200n8",
+            "generate_dtb" : true,
+            "provide_dtb" : false,
+            "map_one_to_one" : false,
+            "provide_initrd": true,
+            "clean_cache" : false,
+        };
+
+        vm0.dtb = dtb([{"path": "/axi/serial@ff000000"} ]);
+
+        vm0.untyped_mmios = ["0xf9060000:12"]; // Interrupt Controller Virtual CPU interface (Virtual Machine view)
+
+        vm0.plat_keep_devices = [
+            "/__symbols__",
+            "/aliases",
+            "/aux_ref_clk",
+            "/axi/interrupt-controller@f9010000",
+            "/dcc",
+            "/dp_aclk",
+            "/edac",
+            "/fclk0",
+            "/fclk1",
+            "/fclk2",
+            "/fclk3",
+            "/fpga-full",
+            "/gt_crx_ref_clk",
+            "/ina226-u15",
+            "/ina226-u16",
+            "/ina226-u65",
+            "/ina226-u74",
+            "/ina226-u75",
+            "/ina226-u76",
+            "/ina226-u77",
+            "/ina226-u78",
+            "/ina226-u79",
+            "/ina226-u80",
+            "/ina226-u81",
+            "/ina226-u84",
+            "/ina226-u85",
+            "/ina226-u86",
+            "/ina226-u87",
+            "/ina226-u88",
+            "/ina226-u92",
+            "/ina226-u93",
+            "/pmu",
+            "/psci",
+            "/pss_alt_ref_clk",
+            "/pss_ref_clk",
+            "/ref48M",
+            "/refhdmi",
+            "/timer",
+            "/video_clk",
+        ];
+
+        vm0.plat_keep_devices_and_subtree = [
+            "/firmware",
+            "/gpio-keys",
+            "/leds",
+            "/zynqmp_ipi",
+        ];
+
+        vm0.allow_smc = true;
+        vm0.allowed_smc_functions = [
+            PM_GET_API_VERSION,
+            PM_REQUEST_NODE,
+            PM_RELEASE_NODE,
+            PM_SET_REQUIREMENT,
+            PM_INIT_FINALIZE,
+            PM_FPGA_GET_STATUS,
+            PM_RESET_ASSERT,
+            PM_RESET_GET_STATUS,
+            PM_MMIO_WRITE,
+            PM_MMIO_READ,
+            PM_GET_CHIPID,
+            PM_PINCTRL_REQUEST,
+            PM_PINCTRL_RELEASE,
+            PM_PINCTRL_SET_FUNCTION,
+            PM_PINCTRL_CONFIG_PARAM_GET,
+            PM_PINCTRL_CONFIG_PARAM_SET,
+            PM_IOCTL,
+            PM_QUERY_DATA,
+            PM_CLOCK_ENABLE,
+            PM_CLOCK_DISABLE,
+            PM_CLOCK_GETSTATE,
+            PM_CLOCK_SETDIVIDER,
+            PM_CLOCK_GETDIVIDER,
+            PM_CLOCK_GETPARENT,
+            PM_GET_TRUSTZONE_VERSION,
+            IPI_MAILBOX_OPEN,
+            IPI_MAILBOX_RELEASE,
+            IPI_MAILBOX_ENABLE_IRQ
+        ];
+
+	}
+}