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jasondaviesgnzlbg
jasondavies
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gnzlbg
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rustfmt
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32 files changed

+307
-107
lines changed

32 files changed

+307
-107
lines changed

‎coresimd/aarch64/crypto.rs

+2-2
Original file line numberDiff line numberDiff line change
@@ -184,10 +184,10 @@ pub unsafe fn vsha256su1q_u32(
184184

185185
#[cfg(test)]
186186
mod tests {
187-
use stdsimd_test::simd_test;
188-
use simd::*;
189187
use coresimd::aarch64::*;
188+
use simd::*;
190189
use std::mem;
190+
use stdsimd_test::simd_test;
191191

192192
#[simd_test = "crypto"]
193193
unsafe fn test_vaeseq_u8() {

‎coresimd/aarch64/neon.rs

+5-5
Original file line numberDiff line numberDiff line change
@@ -2,11 +2,11 @@
22
33
// FIXME: replace neon with asimd
44

5+
use coresimd::arm::*;
6+
use coresimd::simd::*;
7+
use coresimd::simd_llvm::simd_add;
58
#[cfg(test)]
69
use stdsimd_test::assert_instr;
7-
use coresimd::simd_llvm::simd_add;
8-
use coresimd::simd::*;
9-
use coresimd::arm::*;
1010

1111
types! {
1212
/// ARM-specific 64-bit wide vector of one packed `f64`.
@@ -382,10 +382,10 @@ pub unsafe fn vminvq_f64(a: float64x2_t) -> f64 {
382382

383383
#[cfg(test)]
384384
mod tests {
385-
use stdsimd_test::simd_test;
386-
use simd::*;
387385
use coresimd::aarch64::*;
386+
use simd::*;
388387
use std::mem;
388+
use stdsimd_test::simd_test;
389389

390390
#[simd_test = "neon"]
391391
unsafe fn test_vadd_f64() {

‎coresimd/arm/neon.rs

+4-4
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,9 @@
11
//! ARMv7 NEON intrinsics
22
3+
use coresimd::simd::*;
4+
use coresimd::simd_llvm::*;
35
#[cfg(test)]
46
use stdsimd_test::assert_instr;
5-
use coresimd::simd_llvm::*;
6-
use coresimd::simd::*;
77

88
types! {
99
/// ARM-specific 64-bit wide vector of eight packed `i8`.
@@ -682,10 +682,10 @@ pub unsafe fn vrsqrte_f32(a: float32x2_t) -> float32x2_t {
682682

683683
#[cfg(test)]
684684
mod tests {
685-
use stdsimd_test::simd_test;
686-
use simd::*;
687685
use coresimd::arm::*;
686+
use simd::*;
688687
use std::mem;
688+
use stdsimd_test::simd_test;
689689

690690
#[simd_test = "neon"]
691691
unsafe fn test_vadd_s8() {

‎coresimd/mips/msa.rs

+2-2
Original file line numberDiff line numberDiff line change
@@ -5,9 +5,9 @@
55
//!
66
//! [msa_ref]: http://cdn2.imgtec.com/documentation/MD00866-2B-MSA32-AFP-01.12.pdf
77
8+
use coresimd::simd::*;
89
#[cfg(test)]
910
use stdsimd_test::assert_instr;
10-
use coresimd::simd::*;
1111

1212
#[allow(improper_ctypes)]
1313
extern "C" {
@@ -28,9 +28,9 @@ pub unsafe fn __msa_add_a_b(a: i8x16, b: i8x16) -> i8x16 {
2828

2929
#[cfg(test)]
3030
mod tests {
31+
use coresimd::mips64::msa;
3132
use simd::*;
3233
use stdsimd_test::simd_test;
33-
use coresimd::mips64::msa;
3434

3535
#[simd_test = "msa"]
3636
unsafe fn __msa_add_a_b() {

‎coresimd/mod.rs

+3-3
Original file line numberDiff line numberDiff line change
@@ -77,8 +77,8 @@ pub mod arch {
7777
#[cfg(any(target_arch = "aarch64", dox))]
7878
#[doc(cfg(target_arch = "aarch64"))]
7979
pub mod aarch64 {
80-
pub use coresimd::arm::*;
8180
pub use coresimd::aarch64::*;
81+
pub use coresimd::arm::*;
8282
}
8383

8484
/// Platform-specific intrinsics for the `wasm32` platform.
@@ -115,10 +115,10 @@ mod x86;
115115
#[cfg(any(target_arch = "x86_64", dox))]
116116
mod x86_64;
117117

118-
#[cfg(any(target_arch = "arm", target_arch = "aarch64", dox))]
119-
mod arm;
120118
#[cfg(any(target_arch = "aarch64", dox))]
121119
mod aarch64;
120+
#[cfg(any(target_arch = "arm", target_arch = "aarch64", dox))]
121+
mod arm;
122122
#[cfg(target_arch = "wasm32")]
123123
mod wasm32;
124124

‎coresimd/ppsv/api/cmp.rs

+9-4
Original file line numberDiff line numberDiff line change
@@ -99,11 +99,16 @@ macro_rules! impl_bool_cmp {
9999

100100
#[cfg(test)]
101101
macro_rules! test_cmp {
102-
($id:ident, $elem_ty:ident, $bool_ty:ident,
103-
$true:expr, $false:expr) => {
102+
(
103+
$id: ident,
104+
$elem_ty: ident,
105+
$bool_ty: ident,
106+
$true: expr,
107+
$false: expr
108+
) => {
104109
#[test]
105110
fn cmp() {
106-
use ::coresimd::simd::*;
111+
use coresimd::simd::*;
107112

108113
let a = $id::splat($false);
109114
let b = $id::splat($true);
@@ -139,5 +144,5 @@ macro_rules! test_cmp {
139144
let r = a.lt(b);
140145
assert!(r == e);
141146
}
142-
}
147+
};
143148
}

‎coresimd/ppsv/api/load_store.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -130,8 +130,8 @@ macro_rules! impl_load_store {
130130
pub unsafe fn load_unaligned_unchecked(
131131
slice: &[$elem_ty]
132132
) -> Self {
133-
use slice::SliceExt;
134133
use mem::size_of;
134+
use slice::SliceExt;
135135
let target_ptr =
136136
slice.get_unchecked(0) as *const $elem_ty as *const u8;
137137
let mut x = Self::splat(0 as $elem_ty);

‎coresimd/ppsv/api/minmax_reductions.rs

+2-2
Original file line numberDiff line numberDiff line change
@@ -22,8 +22,8 @@ macro_rules! impl_minmax_reductions {
2222
pub fn max(self) -> $elem_ty {
2323
// FIXME: broken on AArch64
2424
// https://bugs.llvm.org/show_bug.cgi?id=36796
25-
use num::Float;
2625
use cmp::Ord;
26+
use num::Float;
2727
let mut x = self.extract(0);
2828
for i in 1..$id::lanes() {
2929
x = x.max(self.extract(i));
@@ -49,8 +49,8 @@ macro_rules! impl_minmax_reductions {
4949
pub fn min(self) -> $elem_ty {
5050
// FIXME: broken on AArch64
5151
// https://bugs.llvm.org/show_bug.cgi?id=36796
52-
use num::Float;
5352
use cmp::Ord;
53+
use num::Float;
5454
let mut x = self.extract(0);
5555
for i in 1..$id::lanes() {
5656
x = x.min(self.extract(i));

‎coresimd/ppsv/mod.rs

+6-6
Original file line numberDiff line numberDiff line change
@@ -33,19 +33,19 @@
3333
#[macro_use]
3434
mod api;
3535

36-
mod v16;
37-
mod v32;
38-
mod v64;
3936
mod v128;
37+
mod v16;
4038
mod v256;
39+
mod v32;
4140
mod v512;
41+
mod v64;
4242

43-
pub use self::v16::*;
44-
pub use self::v32::*;
45-
pub use self::v64::*;
4643
pub use self::v128::*;
44+
pub use self::v16::*;
4745
pub use self::v256::*;
46+
pub use self::v32::*;
4847
pub use self::v512::*;
48+
pub use self::v64::*;
4949

5050
/// Safe lossless bitwise conversion from `T` to `Self`.
5151
pub trait FromBits<T>: ::marker::Sized {

‎coresimd/ppsv/v128.rs

+12-10
Original file line numberDiff line numberDiff line change
@@ -121,13 +121,17 @@ use coresimd::arch::aarch64::{// FIXME: float16x8_t,
121121
uint8x16_t};
122122

123123
macro_rules! from_bits_arm {
124-
($id:ident, $elem_ty:ident, $test_mod_arm:ident, $test_mod_a64:ident) => {
125-
#[cfg(any(all(target_arch = "arm",
126-
target_feature = "neon",
127-
target_feature = "v7"), target_arch = "aarch64"))]
124+
(
125+
$id: ident,
126+
$elem_ty: ident,
127+
$test_mod_arm: ident,
128+
$test_mod_a64: ident
129+
) => {
130+
#[cfg(any(all(target_arch = "arm", target_feature = "neon",
131+
target_feature = "v7"),
132+
target_arch = "aarch64"))]
128133
impl_from_bits_!(
129-
$id:
130-
int8x16_t,
134+
$id: int8x16_t,
131135
uint8x16_t,
132136
int16x8_t,
133137
uint16x8_t,
@@ -141,10 +145,8 @@ macro_rules! from_bits_arm {
141145
poly16x8_t
142146
);
143147
#[cfg(target_arch = "aarch64")]
144-
impl_from_bits_!(
145-
$id: float64x2_t
146-
);
147-
}
148+
impl_from_bits_!($id: float64x2_t);
149+
};
148150
}
149151

150152
impl_from_bits!(

‎coresimd/ppsv/v64.rs

+12-10
Original file line numberDiff line numberDiff line change
@@ -101,13 +101,17 @@ use coresimd::arch::aarch64::{// FIXME: float16x4_t,
101101
uint8x8_t};
102102

103103
macro_rules! from_bits_arm {
104-
($id:ident, $elem_ty:ident, $test_mod_arm:ident, $test_mod_a64:ident) => {
105-
#[cfg(any(all(target_arch = "arm",
106-
target_feature = "neon",
107-
target_feature = "v7"), target_arch = "aarch64"))]
104+
(
105+
$id: ident,
106+
$elem_ty: ident,
107+
$test_mod_arm: ident,
108+
$test_mod_a64: ident
109+
) => {
110+
#[cfg(any(all(target_arch = "arm", target_feature = "neon",
111+
target_feature = "v7"),
112+
target_arch = "aarch64"))]
108113
impl_from_bits_!(
109-
$id:
110-
int64x1_t,
114+
$id: int64x1_t,
111115
uint64x1_t,
112116
uint32x2_t,
113117
int32x2_t,
@@ -121,10 +125,8 @@ macro_rules! from_bits_arm {
121125
poly8x8_t
122126
);
123127
#[cfg(target_arch = "aarch64")]
124-
impl_from_bits_!(
125-
$id: float64x1_t
126-
);
127-
}
128+
impl_from_bits_!($id: float64x1_t);
129+
};
128130
}
129131

130132
impl_from_bits!(

‎coresimd/x86/avx.rs

+23-5
Original file line numberDiff line numberDiff line change
@@ -13,8 +13,8 @@
1313
//! [amd64_ref]: http://support.amd.com/TechDocs/24594.pdf
1414
//! [wiki]: https://en.wikipedia.org/wiki/Advanced_Vector_Extensions
1515
16-
use coresimd::simd_llvm::*;
1716
use coresimd::simd::*;
17+
use coresimd::simd_llvm::*;
1818
use coresimd::x86::*;
1919
use intrinsics;
2020
use mem;
@@ -142,9 +142,18 @@ pub unsafe fn _mm256_shuffle_pd(a: __m256d, b: __m256d, imm8: i32) -> __m256d {
142142
pub unsafe fn _mm256_shuffle_ps(a: __m256, b: __m256, imm8: i32) -> __m256 {
143143
let imm8 = (imm8 & 0xFF) as u8;
144144
macro_rules! shuffle4 {
145-
($a:expr, $b:expr, $c:expr, $d:expr, $e:expr, $f:expr, $g: expr, $h: expr) => {
145+
(
146+
$a: expr,
147+
$b: expr,
148+
$c: expr,
149+
$d: expr,
150+
$e: expr,
151+
$f: expr,
152+
$g: expr,
153+
$h: expr
154+
) => {
146155
simd_shuffle8(a, b, [$a, $b, $c, $d, $e, $f, $g, $h]);
147-
}
156+
};
148157
}
149158
macro_rules! shuffle3 {
150159
($a: expr, $b: expr, $c: expr, $e: expr, $f: expr, $g: expr) => {
@@ -471,9 +480,18 @@ pub unsafe fn _mm256_blend_pd(a: __m256d, b: __m256d, imm8: i32) -> __m256d {
471480
pub unsafe fn _mm256_blend_ps(a: __m256, b: __m256, imm8: i32) -> __m256 {
472481
let imm8 = (imm8 & 0xFF) as u8;
473482
macro_rules! blend4 {
474-
($a:expr, $b:expr, $c:expr, $d:expr, $e:expr, $f:expr, $g:expr, $h:expr) => {
483+
(
484+
$a: expr,
485+
$b: expr,
486+
$c: expr,
487+
$d: expr,
488+
$e: expr,
489+
$f: expr,
490+
$g: expr,
491+
$h: expr
492+
) => {
475493
simd_shuffle8(a, b, [$a, $b, $c, $d, $e, $f, $g, $h]);
476-
}
494+
};
477495
}
478496
macro_rules! blend3 {
479497
($a: expr, $b: expr, $c: expr, $d: expr, $e: expr, $f: expr) => {

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