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Add stm32f4 as a benchmark
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collector/benchmarks/README.md

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@@ -26,6 +26,7 @@ These are real programs that are important in some way, and worth tracking.
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- **ripgrep**: A line-oriented search tool. A widely-used utility.
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- **serde**: A serialization/deserialization crate. Used by many other
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Rust programs.
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- **stm32f4**: A crate that has many thousands of blanket impl blocks.
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- **style-servo**: Servo's `style` crate. A large crate, and one used by
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Firefox.
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- **syn**: A library for parsing Rust code. An important part of the Rust
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[package]
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edition = "2018"
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name = "stm32f4"
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version = "0.12.1"
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authors = ["Adam Greig <[email protected]>", "stm32-rs Contributors"]
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description = "Device support crates for STM32F4 devices"
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repository = "https://github.com/stm32-rs/stm32-rs"
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readme = "README.md"
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keywords = ["stm32", "svd2rust", "no_std", "embedded"]
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categories = ["embedded", "no-std"]
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license = "MIT/Apache-2.0"
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[dependencies]
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bare-metal = "0.2.4"
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vcell = "0.1.0"
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cortex-m = ">=0.5.8,<0.7"
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[dependencies.cortex-m-rt]
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optional = true
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version = "0.6.10"
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[package.metadata.docs.rs]
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features = ['rt', 'stm32f401', 'stm32f407', 'stm32f413', 'stm32f469']
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default-target = "thumbv7em-none-eabihf"
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targets = []
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[features]
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default = []
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rt = ["cortex-m-rt/device"]
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stm32f401 = []
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stm32f405 = []
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stm32f407 = []
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stm32f410 = []
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stm32f411 = []
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stm32f412 = []
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stm32f413 = []
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stm32f427 = []
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stm32f429 = []
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stm32f446 = []
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stm32f469 = []
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# stm32f4
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This crate provides an autogenerated API for access to STM32F4 peripherals.
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The API is generated using [svd2rust] with patched svd files containing
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extensive type-safe support. For more information please see the [main repo].
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Refer to the [documentation] for full details.
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[svd2rust]: https://github.com/japaric/svd2rust
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[main repo]: https://github.com/stm32-rs/stm32-rs
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[documentation]: https://docs.rs/stm32f4/latest/stm32f4/
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## Usage
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Each device supported by this crate is behind a feature gate so that you only
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compile the device(s) you want. To use, in your Cargo.toml:
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```toml
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[dependencies.stm32f4]
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version = "0.12.1"
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features = ["stm32f401", "rt"]
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```
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The `rt` feature is optional and brings in support for `cortex-m-rt`.
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In your code:
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```rust
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use stm32f4::stm32f401;
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let mut peripherals = stm32f401::Peripherals::take().unwrap();
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let gpioa = &peripherals.GPIOA;
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gpioa.odr.modify(|_, w| w.odr0().set_bit());
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```
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For full details on the autogenerated API, please see:
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https://docs.rs/svd2rust/0.17.0/svd2rust/#peripheral-api
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## Supported Devices
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| Module | Devices | Links |
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|:------:|:-------:|:-----:|
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| stm32f401 | STM32F401 | [RM0368](https://www.st.com/resource/en/reference_manual/dm00096844.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f401.html) |
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| stm32f405 | STM32F405, STM32F415 | [RM0090](https://www.st.com/resource/en/reference_manual/dm00031020.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f405-415.html) |
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| stm32f407 | STM32F407, STM32F417 | [RM0090](https://www.st.com/resource/en/reference_manual/dm00031020.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f407-417.html) |
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| stm32f410 | STM32F410 | [RM0401](https://www.st.com/resource/en/reference_manual/dm00180366.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f410.html) |
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| stm32f411 | STM32F411 | [RM0383](https://www.st.com/resource/en/reference_manual/dm00119316.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f411.html) |
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| stm32f412 | STM32F412 | [RM0402](https://www.st.com/resource/en/reference_manual/dm00180369.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f412.html) |
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| stm32f413 | STM32F413, STM32F423 | [RM0430](https://www.st.com/resource/en/reference_manual/dm00305666.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f413-423.html) |
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| stm32f427 | STM32F427, STM32F437 | [RM0090](https://www.st.com/resource/en/reference_manual/dm00031020.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f427-437.html) |
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| stm32f429 | STM32F429, STM32F439 | [RM0090](https://www.st.com/resource/en/reference_manual/dm00031020.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f429-439.html) |
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| stm32f446 | STM32F446 | [RM0390](https://www.st.com/resource/en/reference_manual/dm00135183.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f446.html) |
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| stm32f469 | STM32F469, STM32F479 | [RM0386](https://www.st.com/resource/en/reference_manual/dm00127514.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f469-479.html) |

collector/benchmarks/stm32f4/build.rs

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use std::env;
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use std::fs;
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use std::path::PathBuf;
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fn main() {
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if env::var_os("CARGO_FEATURE_RT").is_some() {
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let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
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println!("cargo:rustc-link-search={}", out.display());
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let device_file = if env::var_os("CARGO_FEATURE_STM32F401").is_some() {
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"src/stm32f401/device.x"
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} else if env::var_os("CARGO_FEATURE_STM32F405").is_some() {
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"src/stm32f405/device.x"
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} else if env::var_os("CARGO_FEATURE_STM32F407").is_some() {
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"src/stm32f407/device.x"
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} else if env::var_os("CARGO_FEATURE_STM32F410").is_some() {
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"src/stm32f410/device.x"
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} else if env::var_os("CARGO_FEATURE_STM32F411").is_some() {
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"src/stm32f411/device.x"
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} else if env::var_os("CARGO_FEATURE_STM32F412").is_some() {
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"src/stm32f412/device.x"
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} else if env::var_os("CARGO_FEATURE_STM32F413").is_some() {
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"src/stm32f413/device.x"
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} else if env::var_os("CARGO_FEATURE_STM32F427").is_some() {
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"src/stm32f427/device.x"
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} else if env::var_os("CARGO_FEATURE_STM32F429").is_some() {
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"src/stm32f429/device.x"
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} else if env::var_os("CARGO_FEATURE_STM32F446").is_some() {
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"src/stm32f446/device.x"
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} else if env::var_os("CARGO_FEATURE_STM32F469").is_some() {
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"src/stm32f469/device.x"
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} else { panic!("No device features selected"); };
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fs::copy(device_file, out.join("device.x")).unwrap();
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println!("cargo:rerun-if-changed={}", device_file);
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}
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println!("cargo:rerun-if-changed=build.rs");
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}
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use core::marker;
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///This trait shows that register has `read` method
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///
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///Registers marked with `Writable` can be also `modify`'ed
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pub trait Readable {}
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///This trait shows that register has `write`, `write_with_zero` and `reset` method
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///
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///Registers marked with `Readable` can be also `modify`'ed
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pub trait Writable {}
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///Reset value of the register
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///
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///This value is initial value for `write` method.
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///It can be also directly writed to register by `reset` method.
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pub trait ResetValue {
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///Register size
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type Type;
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///Reset value of the register
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fn reset_value() -> Self::Type;
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}
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///This structure provides volatile access to register
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pub struct Reg<U, REG> {
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register: vcell::VolatileCell<U>,
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_marker: marker::PhantomData<REG>,
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}
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unsafe impl<U: Send, REG> Send for Reg<U, REG> { }
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impl<U, REG> Reg<U, REG>
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where
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Self: Readable,
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U: Copy
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{
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///Reads the contents of `Readable` register
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///
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///You can read the contents of a register in such way:
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///```ignore
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///let bits = periph.reg.read().bits();
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///```
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///or get the content of a particular field of a register.
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///```ignore
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///let reader = periph.reg.read();
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///let bits = reader.field1().bits();
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///let flag = reader.field2().bit_is_set();
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///```
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#[inline(always)]
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pub fn read(&self) -> R<U, Self> {
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R {bits: self.register.get(), _reg: marker::PhantomData}
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}
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}
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impl<U, REG> Reg<U, REG>
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where
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Self: ResetValue<Type=U> + Writable,
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U: Copy,
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{
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///Writes the reset value to `Writable` register
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///
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///Resets the register to its initial state
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#[inline(always)]
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pub fn reset(&self) {
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self.register.set(Self::reset_value())
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}
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}
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impl<U, REG> Reg<U, REG>
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where
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Self: ResetValue<Type=U> + Writable,
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U: Copy
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{
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///Writes bits to `Writable` register
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///
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///You can write raw bits into a register:
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///```ignore
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///periph.reg.write(|w| unsafe { w.bits(rawbits) });
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///```
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///or write only the fields you need:
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///```ignore
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///periph.reg.write(|w| w
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/// .field1().bits(newfield1bits)
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/// .field2().set_bit()
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/// .field3().variant(VARIANT)
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///);
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///```
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///Other fields will have reset value.
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#[inline(always)]
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pub fn write<F>(&self, f: F)
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where
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F: FnOnce(&mut W<U, Self>) -> &mut W<U, Self>
93+
{
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self.register.set(f(&mut W {bits: Self::reset_value(), _reg: marker::PhantomData}).bits);
95+
}
96+
}
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impl<U, REG> Reg<U, REG>
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where
100+
Self: Writable,
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U: Copy + Default
102+
{
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///Writes Zero to `Writable` register
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///
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///Similar to `write`, but unused bits will contain 0.
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#[inline(always)]
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pub fn write_with_zero<F>(&self, f: F)
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where
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F: FnOnce(&mut W<U, Self>) -> &mut W<U, Self>
110+
{
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self.register.set(f(&mut W {bits: U::default(), _reg: marker::PhantomData }).bits);
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}
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}
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impl<U, REG> Reg<U, REG>
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where
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Self: Readable + Writable,
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U: Copy,
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{
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///Modifies the contents of the register
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///
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///E.g. to do a read-modify-write sequence to change parts of a register:
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///```ignore
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///periph.reg.modify(|r, w| unsafe { w.bits(
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/// r.bits() | 3
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///) });
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///```
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///or
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///```ignore
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///periph.reg.modify(|_, w| w
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/// .field1().bits(newfield1bits)
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/// .field2().set_bit()
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/// .field3().variant(VARIANT)
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///);
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///```
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///Other fields will have value they had before call `modify`.
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#[inline(always)]
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pub fn modify<F>(&self, f: F)
139+
where
140+
for<'w> F: FnOnce(&R<U, Self>, &'w mut W<U, Self>) -> &'w mut W<U, Self>
141+
{
142+
let bits = self.register.get();
143+
self.register.set(f(&R {bits, _reg: marker::PhantomData}, &mut W {bits, _reg: marker::PhantomData}).bits);
144+
}
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}
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///Register/field reader
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///
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///Result of the [`read`](Reg::read) method of a register.
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///Also it can be used in the [`modify`](Reg::read) method
151+
pub struct R<U, T> {
152+
pub(crate) bits: U,
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_reg: marker::PhantomData<T>,
154+
}
155+
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impl<U, T> R<U, T>
157+
where
158+
U: Copy
159+
{
160+
///Create new instance of reader
161+
#[inline(always)]
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pub(crate) fn new(bits: U) -> Self {
163+
Self {
164+
bits,
165+
_reg: marker::PhantomData,
166+
}
167+
}
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///Read raw bits from register/field
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#[inline(always)]
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pub fn bits(&self) -> U {
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self.bits
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}
173+
}
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impl<U, T, FI> PartialEq<FI> for R<U, T>
176+
where
177+
U: PartialEq,
178+
FI: Copy+Into<U>
179+
{
180+
#[inline(always)]
181+
fn eq(&self, other: &FI) -> bool {
182+
self.bits.eq(&(*other).into())
183+
}
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}
185+
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impl<FI> R<bool, FI> {
187+
///Value of the field as raw bits
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#[inline(always)]
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pub fn bit(&self) -> bool {
190+
self.bits
191+
}
192+
///Returns `true` if the bit is clear (0)
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#[inline(always)]
194+
pub fn bit_is_clear(&self) -> bool {
195+
!self.bit()
196+
}
197+
///Returns `true` if the bit is set (1)
198+
#[inline(always)]
199+
pub fn bit_is_set(&self) -> bool {
200+
self.bit()
201+
}
202+
}
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///Register writer
205+
///
206+
///Used as an argument to the closures in the [`write`](Reg::write) and [`modify`](Reg::modify) methods of the register
207+
pub struct W<U, REG> {
208+
///Writable bits
209+
pub(crate) bits: U,
210+
_reg: marker::PhantomData<REG>,
211+
}
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213+
impl<U, REG> W<U, REG> {
214+
///Writes raw bits to the register
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#[inline(always)]
216+
pub unsafe fn bits(&mut self, bits: U) -> &mut Self {
217+
self.bits = bits;
218+
self
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}
220+
}
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///Used if enumerated values cover not the whole range
223+
#[derive(Clone,Copy,PartialEq)]
224+
pub enum Variant<U, T> {
225+
///Expected variant
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Val(T),
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///Raw bits
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Res(U),
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}
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