diff --git a/rust-version b/rust-version
index e3e71f5c2f..9b8d986c67 100644
--- a/rust-version
+++ b/rust-version
@@ -1 +1 @@
-e1b28cd2f16bd5b832183d7968cae3bb9213e78d
+4065b89b1e7287047d7d6c65e7abd7b8ee70bcf0
diff --git a/src/concurrency/data_race.rs b/src/concurrency/data_race.rs
index 223fad4036..87f64db26d 100644
--- a/src/concurrency/data_race.rs
+++ b/src/concurrency/data_race.rs
@@ -530,12 +530,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: MiriEvalContextExt<'mir, 'tcx> {
 
         this.validate_atomic_rmw(place, atomic)?;
 
-        this.buffered_atomic_rmw(
-            val.to_scalar(),
-            place,
-            atomic,
-            old.to_scalar(),
-        )?;
+        this.buffered_atomic_rmw(val.to_scalar(), place, atomic, old.to_scalar())?;
         Ok(old)
     }
 
@@ -586,12 +581,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: MiriEvalContextExt<'mir, 'tcx> {
 
         this.validate_atomic_rmw(place, atomic)?;
 
-        this.buffered_atomic_rmw(
-            new_val.to_scalar(),
-            place,
-            atomic,
-            old.to_scalar(),
-        )?;
+        this.buffered_atomic_rmw(new_val.to_scalar(), place, atomic, old.to_scalar())?;
 
         // Return the old value.
         Ok(old)
@@ -633,10 +623,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: MiriEvalContextExt<'mir, 'tcx> {
             } else {
                 true
             };
-        let res = Immediate::ScalarPair(
-            old.to_scalar(),
-            Scalar::from_bool(cmpxchg_success).into(),
-        );
+        let res = Immediate::ScalarPair(old.to_scalar(), Scalar::from_bool(cmpxchg_success));
 
         // Update ptr depending on comparison.
         // if successful, perform a full rw-atomic validation
diff --git a/src/concurrency/weak_memory.rs b/src/concurrency/weak_memory.rs
index bd43e848af..5a5c2c211b 100644
--- a/src/concurrency/weak_memory.rs
+++ b/src/concurrency/weak_memory.rs
@@ -77,9 +77,7 @@ use std::{
     collections::VecDeque,
 };
 
-use rustc_const_eval::interpret::{
-    alloc_range, AllocRange, InterpResult, MPlaceTy, Scalar,
-};
+use rustc_const_eval::interpret::{alloc_range, AllocRange, InterpResult, MPlaceTy, Scalar};
 use rustc_data_structures::fx::FxHashMap;
 
 use crate::*;
@@ -417,11 +415,7 @@ impl StoreElement {
     /// buffer regardless of subsequent loads by the same thread; if the earliest load of another
     /// thread doesn't happen before the current one, then no subsequent load by the other thread
     /// can happen before the current one.
-    fn load_impl(
-        &self,
-        index: VectorIdx,
-        clocks: &ThreadClockSet,
-    ) -> Scalar<Provenance> {
+    fn load_impl(&self, index: VectorIdx, clocks: &ThreadClockSet) -> Scalar<Provenance> {
         let _ = self.loads.borrow_mut().try_insert(index, clocks.clock[index]);
         self.val
     }
diff --git a/src/shims/ffi_support.rs b/src/shims/ffi_support.rs
index f1ae1e7d3f..844bcb40d5 100644
--- a/src/shims/ffi_support.rs
+++ b/src/shims/ffi_support.rs
@@ -13,7 +13,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
     /// Extract the scalar value from the result of reading a scalar from the machine,
     /// and convert it to a `CArg`.
     fn scalar_to_carg(
-        k: ScalarMaybeUninit<Provenance>,
+        k: Scalar<Provenance>,
         arg_type: Ty<'tcx>,
         cx: &impl HasDataLayout,
     ) -> InterpResult<'tcx, CArg> {
diff --git a/src/shims/intrinsics/simd.rs b/src/shims/intrinsics/simd.rs
index 95763e1e83..1698477cbd 100644
--- a/src/shims/intrinsics/simd.rs
+++ b/src/shims/intrinsics/simd.rs
@@ -396,11 +396,8 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
                 let dest_len = u32::try_from(dest_len).unwrap();
                 let bitmask_len = u32::try_from(bitmask_len).unwrap();
 
-                let mask: u64 = this
-                    .read_scalar(mask)?
-                    .to_bits(mask.layout.size)?
-                    .try_into()
-                    .unwrap();
+                let mask: u64 =
+                    this.read_scalar(mask)?.to_bits(mask.layout.size)?.try_into().unwrap();
                 for i in 0..dest_len {
                     let mask = mask
                         & 1u64
diff --git a/src/shims/os_str.rs b/src/shims/os_str.rs
index fcf92dfc9f..6ca09f3fca 100644
--- a/src/shims/os_str.rs
+++ b/src/shims/os_str.rs
@@ -156,8 +156,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
             .unwrap(); // not a ZST, so we will get a result
         for (offset, wchar) in u16_vec.into_iter().chain(iter::once(0x0000)).enumerate() {
             let offset = u64::try_from(offset).unwrap();
-            alloc
-                .write_scalar(alloc_range(size2 * offset, size2), Scalar::from_u16(wchar).into())?;
+            alloc.write_scalar(alloc_range(size2 * offset, size2), Scalar::from_u16(wchar))?;
         }
         Ok((true, string_length))
     }
diff --git a/src/shims/unix/freebsd/foreign_items.rs b/src/shims/unix/freebsd/foreign_items.rs
index ec565aa315..73464cdacb 100644
--- a/src/shims/unix/freebsd/foreign_items.rs
+++ b/src/shims/unix/freebsd/foreign_items.rs
@@ -26,10 +26,8 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
             "pthread_set_name_np" => {
                 let [thread, name] =
                     this.check_shim(abi, Abi::C { unwind: false }, link_name, args)?;
-                let res = this.pthread_setname_np(
-                    this.read_scalar(thread)?.check_init()?,
-                    this.read_scalar(name)?.check_init()?,
-                )?;
+                let res =
+                    this.pthread_setname_np(this.read_scalar(thread)?, this.read_scalar(name)?)?;
                 this.write_scalar(res, dest)?;
             }
 
diff --git a/src/shims/unix/linux/foreign_items.rs b/src/shims/unix/linux/foreign_items.rs
index 3c042740b5..afa0591a3c 100644
--- a/src/shims/unix/linux/foreign_items.rs
+++ b/src/shims/unix/linux/foreign_items.rs
@@ -68,10 +68,8 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
             "pthread_setname_np" => {
                 let [thread, name] =
                     this.check_shim(abi, Abi::C { unwind: false }, link_name, args)?;
-                let res = this.pthread_setname_np(
-                    this.read_scalar(thread)?.check_init()?,
-                    this.read_scalar(name)?.check_init()?,
-                )?;
+                let res =
+                    this.pthread_setname_np(this.read_scalar(thread)?, this.read_scalar(name)?)?;
                 this.write_scalar(res, dest)?;
             }
 
diff --git a/src/shims/unix/macos/foreign_items.rs b/src/shims/unix/macos/foreign_items.rs
index fa4001bab1..9ad2ef47e0 100644
--- a/src/shims/unix/macos/foreign_items.rs
+++ b/src/shims/unix/macos/foreign_items.rs
@@ -176,7 +176,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
             "pthread_setname_np" => {
                 let [name] = this.check_shim(abi, Abi::C { unwind: false }, link_name, args)?;
                 let thread = this.pthread_self()?;
-                this.pthread_setname_np(thread, this.read_scalar(name)?.check_init()?)?;
+                this.pthread_setname_np(thread, this.read_scalar(name)?)?;
             }
 
             // Incomplete shims that we "stub out" just to get pre-main initialization code to work.
diff --git a/src/shims/unix/sync.rs b/src/shims/unix/sync.rs
index 88c5d2e3f8..0a4904f4ba 100644
--- a/src/shims/unix/sync.rs
+++ b/src/shims/unix/sync.rs
@@ -119,7 +119,7 @@ fn mutex_get_or_create_id<'mir, 'tcx: 'mir>(
             .atomic_compare_exchange_scalar(
                 &value_place,
                 &ImmTy::from_uint(0u32, ecx.machine.layouts.u32),
-                next_id.to_u32_scalar().into(),
+                next_id.to_u32_scalar(),
                 AtomicRwOrd::Relaxed,
                 AtomicReadOrd::Relaxed,
                 false,
@@ -160,7 +160,7 @@ fn rwlock_get_or_create_id<'mir, 'tcx: 'mir>(
             .atomic_compare_exchange_scalar(
                 &value_place,
                 &ImmTy::from_uint(0u32, ecx.machine.layouts.u32),
-                next_id.to_u32_scalar().into(),
+                next_id.to_u32_scalar(),
                 AtomicRwOrd::Relaxed,
                 AtomicReadOrd::Relaxed,
                 false,
@@ -243,7 +243,7 @@ fn cond_get_or_create_id<'mir, 'tcx: 'mir>(
             .atomic_compare_exchange_scalar(
                 &value_place,
                 &ImmTy::from_uint(0u32, ecx.machine.layouts.u32),
-                next_id.to_u32_scalar().into(),
+                next_id.to_u32_scalar(),
                 AtomicRwOrd::Relaxed,
                 AtomicReadOrd::Relaxed,
                 false,
diff --git a/src/shims/windows/dlsym.rs b/src/shims/windows/dlsym.rs
index d87ca8f818..5cbfecb889 100644
--- a/src/shims/windows/dlsym.rs
+++ b/src/shims/windows/dlsym.rs
@@ -112,7 +112,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
             Dlsym::SetThreadDescription => {
                 let [handle, name] = check_arg_count(args)?;
 
-                let handle = this.read_scalar(handle)?.check_init()?;
+                let handle = this.read_scalar(handle)?;
 
                 let name = this.read_wide_str(this.read_pointer(name)?)?;
 
diff --git a/src/shims/windows/handle.rs b/src/shims/windows/handle.rs
index 92e0a9a34e..69a6bd38d0 100644
--- a/src/shims/windows/handle.rs
+++ b/src/shims/windows/handle.rs
@@ -158,7 +158,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
     fn CloseHandle(&mut self, handle_op: &OpTy<'tcx, Provenance>) -> InterpResult<'tcx> {
         let this = self.eval_context_mut();
 
-        let handle = this.read_scalar(handle_op)?.check_init()?;
+        let handle = this.read_scalar(handle_op)?;
 
         match Handle::from_scalar(handle, this)? {
             Some(Handle::Thread(thread)) =>
diff --git a/src/shims/windows/sync.rs b/src/shims/windows/sync.rs
index e998b68a42..60645ee7d9 100644
--- a/src/shims/windows/sync.rs
+++ b/src/shims/windows/sync.rs
@@ -14,7 +14,7 @@ fn srwlock_get_or_create_id<'mir, 'tcx: 'mir>(
             .atomic_compare_exchange_scalar(
                 &value_place,
                 &ImmTy::from_uint(0u32, ecx.machine.layouts.u32),
-                next_id.to_u32_scalar().into(),
+                next_id.to_u32_scalar(),
                 AtomicRwOrd::Relaxed,
                 AtomicReadOrd::Relaxed,
                 false,
diff --git a/src/shims/windows/thread.rs b/src/shims/windows/thread.rs
index 06a5887d3e..2b801ae312 100644
--- a/src/shims/windows/thread.rs
+++ b/src/shims/windows/thread.rs
@@ -20,14 +20,10 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
         let this = self.eval_context_mut();
 
         let security = this.read_pointer(security_op)?;
-
         // stacksize is ignored, but still needs to be a valid usize
         this.read_scalar(stacksize_op)?.to_machine_usize(this)?;
-
         let start_routine = this.read_pointer(start_op)?;
-
         let func_arg = this.read_immediate(arg_op)?;
-
         let flags = this.read_scalar(flags_op)?.to_u32()?;
 
         let thread = if this.ptr_is_null(this.read_pointer(thread_op)?)? {
@@ -66,8 +62,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
     ) -> InterpResult<'tcx, u32> {
         let this = self.eval_context_mut();
 
-        let handle = this.read_scalar(handle_op)?.check_init()?;
-
+        let handle = this.read_scalar(handle_op)?;
         let timeout = this.read_scalar(timeout_op)?.to_u32()?;
 
         let thread = match Handle::from_scalar(handle, this)? {