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9 | 9 | let mut _5: &mut i32; // in scope 0 at $SRC_DIR/core/src/intrinsics/mir.rs:LL:COL
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10 | 10 | let mut _6: i32; // in scope 0 at $SRC_DIR/core/src/intrinsics/mir.rs:LL:COL
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11 | 11 | let mut _7: i32; // in scope 0 at $SRC_DIR/core/src/intrinsics/mir.rs:LL:COL
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| 12 | + let mut _8: i32; // in scope 0 at $SRC_DIR/core/src/intrinsics/mir.rs:LL:COL |
12 | 13 |
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13 | 14 | bb0: {
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14 | 15 | StorageLive(_2); // scope 0 at $DIR/reference_prop.rs:+7:13: +7:27
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18 | 19 | _4 = &_2; // scope 0 at $SRC_DIR/core/src/intrinsics/mir.rs:LL:COL
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19 | 20 | _5 = &mut _3; // scope 0 at $SRC_DIR/core/src/intrinsics/mir.rs:LL:COL
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20 | 21 | (*_5) = const 7_i32; // scope 0 at $DIR/reference_prop.rs:+14:13: +14:19
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21 |
| - switchInt(_1) -> [1: bb1, otherwise: bb2]; // scope 0 at $DIR/reference_prop.rs:+15:13: +15:46 |
| 22 | +- _6 = (*_4); // scope 0 at $SRC_DIR/core/src/intrinsics/mir.rs:LL:COL |
| 23 | ++ _6 = _2; // scope 0 at $SRC_DIR/core/src/intrinsics/mir.rs:LL:COL |
| 24 | + switchInt(_1) -> [1: bb1, otherwise: bb2]; // scope 0 at $DIR/reference_prop.rs:+17:13: +17:46 |
22 | 25 | }
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23 | 26 |
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24 | 27 | bb1: {
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25 |
| - StorageDead(_2); // scope 0 at $DIR/reference_prop.rs:+18:13: +18:27 |
26 |
| - StorageDead(_3); // scope 0 at $DIR/reference_prop.rs:+19:13: +19:27 |
27 |
| - goto -> bb2; // scope 0 at $DIR/reference_prop.rs:+20:13: +20:22 |
| 28 | + StorageDead(_2); // scope 0 at $DIR/reference_prop.rs:+20:13: +20:27 |
| 29 | + StorageDead(_3); // scope 0 at $DIR/reference_prop.rs:+21:13: +21:27 |
| 30 | + _0 = opaque::<i32>(_6) -> bb2; // scope 0 at $DIR/reference_prop.rs:+22:13: +22:38 |
| 31 | + // mir::Constant |
| 32 | + // + span: $DIR/reference_prop.rs:416:28: 416:34 |
| 33 | + // + literal: Const { ty: fn(i32) {opaque::<i32>}, val: Value(<ZST>) } |
28 | 34 | }
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29 | 35 |
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30 | 36 | bb2: {
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31 |
| - _6 = (*_4); // scope 0 at $SRC_DIR/core/src/intrinsics/mir.rs:LL:COL |
32 |
| - _0 = opaque::<i32>(_6) -> bb3; // scope 0 at $DIR/reference_prop.rs:+25:13: +25:38 |
| 37 | + _7 = (*_4); // scope 0 at $SRC_DIR/core/src/intrinsics/mir.rs:LL:COL |
| 38 | + _0 = opaque::<i32>(_7) -> bb3; // scope 0 at $DIR/reference_prop.rs:+27:13: +27:38 |
33 | 39 | // mir::Constant
|
34 |
| - // + span: $DIR/reference_prop.rs:394:28: 394:34 |
| 40 | + // + span: $DIR/reference_prop.rs:421:28: 421:34 |
35 | 41 | // + literal: Const { ty: fn(i32) {opaque::<i32>}, val: Value(<ZST>) }
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36 | 42 | }
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37 | 43 |
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38 | 44 | bb3: {
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39 |
| - _7 = (*_5); // scope 0 at $SRC_DIR/core/src/intrinsics/mir.rs:LL:COL |
40 |
| - _0 = opaque::<i32>(_7) -> bb4; // scope 0 at $DIR/reference_prop.rs:+31:13: +31:43 |
| 45 | + _8 = (*_5); // scope 0 at $SRC_DIR/core/src/intrinsics/mir.rs:LL:COL |
| 46 | + _0 = opaque::<i32>(_8) -> bb4; // scope 0 at $DIR/reference_prop.rs:+33:13: +33:43 |
41 | 47 | // mir::Constant
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42 |
| - // + span: $DIR/reference_prop.rs:400:33: 400:39 |
| 48 | + // + span: $DIR/reference_prop.rs:427:33: 427:39 |
43 | 49 | // + literal: Const { ty: fn(i32) {opaque::<i32>}, val: Value(<ZST>) }
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44 | 50 | }
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45 | 51 |
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46 | 52 | bb4: {
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47 |
| - return; // scope 0 at $DIR/reference_prop.rs:+34:13: +34:21 |
| 53 | + return; // scope 0 at $DIR/reference_prop.rs:+36:13: +36:21 |
48 | 54 | }
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49 | 55 | }
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50 | 56 |
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