Bump compiler and dependencies

.rustfmt.toml

@@ -5,5 +5,3 @@ format_code_in_doc_comments = true
 normalize_comments = true
 wrap_comments = true
 comment_width = 100
-report_fixme = "Always"
-report_todo = "Always"

09_privilege_level/README.md

@@ -487,7 +487,7 @@ diff -uNr 08_hw_debug_JTAG/src/exception.rs 09_privilege_level/src/exception.rs
 +
 +/// Kernel privilege levels.
 +#[allow(missing_docs)]
-+#[derive(PartialEq)]
++#[derive(Eq, PartialEq)]
 +pub enum PrivilegeLevel {
 +    User,
 +    Kernel,

09_privilege_level/src/exception.rs

@@ -21,7 +21,7 @@ pub use arch_exception::current_privilege_level;
 
 /// Kernel privilege levels.
 #[allow(missing_docs)]
-#[derive(PartialEq)]
+#[derive(Eq, PartialEq)]
 pub enum PrivilegeLevel {
     User,
     Kernel,

10_virtual_mem_part1_identity_mapping/src/exception.rs

@@ -21,7 +21,7 @@ pub use arch_exception::current_privilege_level;
 
 /// Kernel privilege levels.
 #[allow(missing_docs)]
-#[derive(PartialEq)]
+#[derive(Eq, PartialEq)]
 pub enum PrivilegeLevel {
     User,
     Kernel,

11_exceptions_part1_groundwork/src/exception.rs

@@ -21,7 +21,7 @@ pub use arch_exception::{current_privilege_level, handling_init};
 
 /// Kernel privilege levels.
 #[allow(missing_docs)]
-#[derive(PartialEq)]
+#[derive(Eq, PartialEq)]
 pub enum PrivilegeLevel {
     User,
     Kernel,

12_integrated_testing/kernel/src/exception.rs

@@ -21,7 +21,7 @@ pub use arch_exception::{current_privilege_level, handling_init};
 
 /// Kernel privilege levels.
 #[allow(missing_docs)]
-#[derive(PartialEq)]
+#[derive(Eq, PartialEq)]
 pub enum PrivilegeLevel {
     User,
     Kernel,

13_exceptions_part2_peripheral_IRQs/kernel/src/exception.rs

@@ -21,7 +21,7 @@ pub use arch_exception::{current_privilege_level, handling_init};
 
 /// Kernel privilege levels.
 #[allow(missing_docs)]
-#[derive(PartialEq)]
+#[derive(Eq, PartialEq)]
 pub enum PrivilegeLevel {
     User,
     Kernel,

14_virtual_mem_part2_mmio_remap/README.md

@@ -2425,7 +2425,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs 14_virtual_mem_
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_record.rs 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_record.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
-@@ -0,0 +1,239 @@
+@@ -0,0 +1,238 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2022 Andre Richter <[email protected]>
@@ -2531,8 +2531,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_reco
 +    ) -> Option<&mut MappingRecordEntry> {
 +        self.inner
 +            .iter_mut()
-+            .filter(|x| x.is_some())
-+            .map(|x| x.as_mut().unwrap())
++            .filter_map(|x| x.as_mut())
 +            .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
 +            .find(|x| {
 +                if x.phys_start_addr != phys_region.start_addr() {
@@ -2859,37 +2858,37 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/types.rs 14_
 +//--------------------------------------------------------------------------------------------------
 +
 +/// A wrapper type around [Address] that ensures page alignment.
-+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
++#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 +pub struct PageAddress<ATYPE: AddressType> {
 +    inner: Address<ATYPE>,
 +}
 +
 +/// A type that describes a region of memory in quantities of pages.
-+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
++#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 +pub struct MemoryRegion<ATYPE: AddressType> {
 +    start: PageAddress<ATYPE>,
 +    end_exclusive: PageAddress<ATYPE>,
 +}
 +
 +/// Architecture agnostic memory attributes.
 +#[allow(missing_docs)]
-+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
++#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 +pub enum MemAttributes {
 +    CacheableDRAM,
 +    Device,
 +}
 +
 +/// Architecture agnostic access permissions.
 +#[allow(missing_docs)]
-+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
++#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 +pub enum AccessPermissions {
 +    ReadOnly,
 +    ReadWrite,
 +}
 +
 +/// Collection of memory attributes.
 +#[allow(missing_docs)]
-+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
++#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 +pub struct AttributeFields {
 +    pub mem_attributes: MemAttributes,
 +    pub acc_perms: AccessPermissions,

14_virtual_mem_part2_mmio_remap/kernel/src/exception.rs

@@ -21,7 +21,7 @@ pub use arch_exception::{current_privilege_level, handling_init};
 
 /// Kernel privilege levels.
 #[allow(missing_docs)]
-#[derive(PartialEq)]
+#[derive(Eq, PartialEq)]
 pub enum PrivilegeLevel {
     User,
     Kernel,

14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs

@@ -103,8 +103,7 @@ impl MappingRecord {
     ) -> Option<&mut MappingRecordEntry> {
         self.inner
             .iter_mut()
-            .filter(|x| x.is_some())
-            .map(|x| x.as_mut().unwrap())
+            .filter_map(|x| x.as_mut())
             .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
             .find(|x| {
                 if x.phys_start_addr != phys_region.start_addr() {

14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/types.rs

@@ -15,37 +15,37 @@ use core::{convert::From, iter::Step, num::NonZeroUsize, ops::Range};
 //--------------------------------------------------------------------------------------------------
 
 /// A wrapper type around [Address] that ensures page alignment.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub struct PageAddress<ATYPE: AddressType> {
     inner: Address<ATYPE>,
 }
 
 /// A type that describes a region of memory in quantities of pages.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub struct MemoryRegion<ATYPE: AddressType> {
     start: PageAddress<ATYPE>,
     end_exclusive: PageAddress<ATYPE>,
 }
 
 /// Architecture agnostic memory attributes.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub enum MemAttributes {
     CacheableDRAM,
     Device,
 }
 
 /// Architecture agnostic access permissions.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub enum AccessPermissions {
     ReadOnly,
     ReadWrite,
 }
 
 /// Collection of memory attributes.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub struct AttributeFields {
     pub mem_attributes: MemAttributes,
     pub acc_perms: AccessPermissions,

15_virtual_mem_part3_precomputed_tables/README.md

@@ -1454,7 +1454,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/translation_tabl
 +        let mut tables = MinSizeTranslationTable::new_for_runtime();
 
 -        tables.init();
-+        assert!(tables.init().is_ok());
++        assert_eq!(tables.init(), Ok(()));
 
          let virt_start_page_addr: PageAddress<Virtual> = PageAddress::from(0);
          let virt_end_exclusive_page_addr: PageAddress<Virtual> =

15_virtual_mem_part3_precomputed_tables/kernel/src/exception.rs

@@ -21,7 +21,7 @@ pub use arch_exception::{current_privilege_level, handling_init};
 
 /// Kernel privilege levels.
 #[allow(missing_docs)]
-#[derive(PartialEq)]
+#[derive(Eq, PartialEq)]
 pub enum PrivilegeLevel {
     User,
     Kernel,

15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/mapping_record.rs

@@ -103,8 +103,7 @@ impl MappingRecord {
     ) -> Option<&mut MappingRecordEntry> {
         self.inner
             .iter_mut()
-            .filter(|x| x.is_some())
-            .map(|x| x.as_mut().unwrap())
+            .filter_map(|x| x.as_mut())
             .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
             .find(|x| {
                 if x.phys_start_addr != phys_region.start_addr() {

15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/translation_table.rs

@@ -97,7 +97,7 @@ mod tests {
         // This will occupy a lot of space on the stack.
         let mut tables = MinSizeTranslationTable::new_for_runtime();
 
-        assert!(tables.init().is_ok());
+        assert_eq!(tables.init(), Ok(()));
 
         let virt_start_page_addr: PageAddress<Virtual> = PageAddress::from(0);
         let virt_end_exclusive_page_addr: PageAddress<Virtual> =