This guide shows how to install rsyocto on a SD-Card and boot it on a Terasic FPGA development Board.
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Download the latest Image for your Board
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The final Images are located inside the "release part" of this Github repository
- Use the following button to get to the release area:
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Suffix decoding for the Image-Names:
File Suffix FPGA supported Board name _DE10STD Intel Cyclone V Terasic DE10-Standard _D10NANO Intel Cyclone V Terasic DE10-Nano _HAN Intel Arria 10 Terasic HAN Pilot Platform _DE0NANOSOC Intel Cyclone V Terasic DE0-Nano SoC Kit/Atlas-SoC Kit Note: rsyocto_SD ... is the associated SD-Card folder for the release
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Insert a Micro SD-Card (4GB or more) into your computer
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Use a "Bootable SD-Card Creation Tool" to execute the containing file partition sizes into your SD-Card
- For example use the tool Rufus
- Rufus can also use the ZIP-archive files directly
- Ignore all warning message boxes
Example screenshot of flashing an SD-Card with rufus
- Eject the SD-Card from your Computer and insert it into the SD-Card-Reader of your SoC-FPGA Board
- Change the MSEL (Mode Select)-Bit switch to the following setting:
- The Terasic DE0-Nano SoC Kit/Atlas-SoC Kit requires the same MSEL configuration as the Terasic DE10-Nano or Standard Development Board
- Connect your FPGA-Board with an Ethernet cable to your local network
- Be sure that a iPv4-DHCP is active on this network
- Connect a USB Cable between the FTDI Virtual COM-Port (USB CDC) and your Computer
- Open the COM-Port
- You can use the tool MobaXterm or
minicom
on Linux for example - Use following settings:
115200N8 (ASCII) with CR/LF
- You can use the tool MobaXterm or
- Power up your FPGA Board
- Now rsyocto boots through the following stages:
No | Stage | Description | Task |
---|---|---|---|
1 | Primary Bootloader | Pre-configuration of the FPGA configuration (Arria 10 SX only) | Connecting HPS to FPGA SDRAM-Controller |
2 | Primary Bootloader | Booting of primary bootloader | Hardware check and startup (SDRAM,...) |
3 | Secondary Bootloader | Booting of u-boot | Loading and execution of the bootloader script |
4 | Bootloader script | Secondary bootloader script execution | Writing the FPGA configuration and loading of the Linux Kernel |
5 | Secondary Bootloader | Booting of u-boot | Loading and execution of the bootloader script |
6 | Linux Kernel | Start of booting the Linux Kernel | |
7 | Linux Kernel | Reading the Device Tree | The Kernel reads the device tree and loads the drivers |
8 | Linux Kernel | Execution of the startup scripts from the rootfs starts | |
9 | startup-script | Execution of by the user configurable startup script | |
10 | Network Interface | Activation of the Network interface | Waiting for an DHCP reception with an iPv4-Address |
11 | OpenSSH | OpenSSH SSH Server | Starting |
12 | Apache | Apache Web Server | Starting |
13 | run-script | Execution of by the user configurable startup script | Time synchronization via HTTP |
14 | BusyBox | BusyBox Linux console interface | |
15 | User Command input after password authentication |
In Intel's latest approach (Intel SoC-EDS 19.1+) from 2020 and beyond are the primary bootloader and the secondary bootloader combined to a single bootloader. This bootloader based on u-boot and must be written to a raw partition of the SD-Card.
- The secondary u-bootloader writes the value 0x55 via the Lightweight HPS-to-FPGA bridge to a Soft-IP PIO controller connected to the FPGA LEDs
- Note: If this is not the case the MSEL switch is not in the proper position and the FPGA configuration could not be written properly!
After the system has booted properly and a network connection is established -> HPS_LED and only FPGA LED 0 turns ON
- Note: If rsyocto goes in a bootloop after requesting the current date the MSEL switch is not in the proper position and the FPGA configuration could not be written properly! This problem could occur because the boot-up shell script (shown here at the end) tries to write to the closed LW HPS2FPGA Bridge or to an unreachable address.
For users with non supported boards: Please go to this guide and use rsyocto with your custom FPGA configuration in the same way as shown here.
rsyocto is booting on an Intel Arria 10 SX SoC-FPGA
- Default device name:
cyclone5
orarria10
- Login:
root
- Passwort:
eit
- Use the following Linux Command to get the iPv4 Address of your Board
ifconfig
- The IP Address is also shown during the boot
- Open Linux or Windows Command Prompt (Windows 10) and insert this command to connect to your Board:
ssh root@<Boards iPv4-address>
- Use the following the Passwort:
eit
- No other authentication is required
- The default SSH-Port (22) is used
- Now rsyocto Splash screen appears