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Choice of number of temp/arg/saved registers. #2

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kasanovic opened this issue May 25, 2019 · 2 comments
Open

Choice of number of temp/arg/saved registers. #2

kasanovic opened this issue May 25, 2019 · 2 comments

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@kasanovic
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The number of temp/arg/saved registers and their location in/out of the 8 RVC registers needs quantitative support.

@ghost
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ghost commented Oct 21, 2019

What benchmarks need to be measured? They need to be representative in the embedded field. I recommend EEMBC and CSIBE, are there other benchmarks?

@kasanovic
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They would be a good starting point, as well as Embench. I think CSIBE might have a problem that it is only for object files, so doesn't make sense for RISC-V which does a lot of optimizations at link time.

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