diff --git a/rva23-profile.adoc b/rva23-profile.adoc
index 6874440..f1bf120 100644
--- a/rva23-profile.adoc
+++ b/rva23-profile.adoc
@@ -174,6 +174,7 @@ will probably not become mandatory.
 
 The following are new development options intended to become mandatory in RVA24U64:
 
+- *Zabha* Byte and Halfword Atomic Memory Operations 
 - *Zacas* Compare-and-swap
 - *Ziccamoc* Main memory regions with both the cacheability and coherence PMAs
   must provide AMOCASQ level PMA support.
@@ -447,13 +448,14 @@ Instruction Set Manual; the hyperlinks lead to their separate specifications.
 - https://github.com/riscv/riscv-state-enable[Smstateen Extension for State-enable]
 - https://github.com/riscv/riscv-svvptc[Svvptc Eliding Memory-management Fences on setting PTE valid]
 - https://github.com/riscv/riscv-zacas[Zacas Extension for Atomic Compare-and-Swap (CAS) instructions]
+- https://github.com/riscv/riscv-zabha[Zabha Extension for Byte and Halfword Atomic Memory Operations]
 
 - *Ziccif*: Main memory supports instruction fetch with atomicity requirement
 - *Ziccrse*: Main memory supports forward progress on LR/SC sequences
 - *Ziccamoa*: Main memory supports all atomics in A
 - *Ziccamoc* Main memory supports atomics in Zacas
 - *Zicclsm*: Main memory supports misaligned loads/stores
-- *Zama16b* Misaligned loads, stores, and AMOs to main memory regions that do not cross a naturally aligned 16-byte boundary are atomic.
+- *Zama16b*: Misaligned loads, stores, and AMOs to main memory regions that do not cross a naturally aligned 16-byte boundary are atomic.
 - *Za64rs*: Reservation set size of at most 64 bytes
 - *Za128rs*: Reservation set size of at most 128 bytes
 - *Zic64b*: Cache block size isf 64 bytes
diff --git a/rvb23-profile.adoc b/rvb23-profile.adoc
index 1fd7904..9389a47 100644
--- a/rvb23-profile.adoc
+++ b/rvb23-profile.adoc
@@ -168,6 +168,7 @@ support scalar crypto, as the vector extension is optional in RVB23.
 
 The following are new development options intended to become mandatory in RVB24U64:
 
+- *Zabha* Byte and Halfword Atomic Memory Operations 
 - *Zacas* Compare-and-swap
 - *Ziccamoc* Main memory regions with both the cacheability and coherence PMAs
   must provide AMOCASQ level PMA support.
@@ -452,6 +453,7 @@ Instruction Set Manual; the hyperlinks lead to their separate specifications.
 - https://github.com/riscv/riscv-state-enable[Smstateen Extension for State-enable]
 - https://github.com/riscv/riscv-svvptc[Svvptc Eliding Memory-management Fences on setting PTE valid]
 - https://github.com/riscv/riscv-zacas[Zacas Extension for Atomic Compare-and-Swap (CAS) instructions]
+- https://github.com/riscv/riscv-zabha[Zabha Extension for Byte and Halfword Atomic Memory Operations]
 
 - *Ziccif*: Main memory supports instruction fetch with atomicity requirement
 - *Ziccrse*: Main memory supports forward progress on LR/SC sequences