diff --git a/src/attributes.adoc b/src/attributes.adoc index ba87d512..66c9048f 100644 --- a/src/attributes.adoc +++ b/src/attributes.adoc @@ -69,6 +69,7 @@ endif::[] :TAG_RESET_CSR: The tag of the CSR must be reset to zero. The reset values of the metadata and address fields are UNSPECIFIED. :REQUIRE_CRE_CSR: Access to this CSR is illegal if <<section_cheri_disable,CHERI register and instruction access is disabled>> for the current privilege. +:REQUIRE_HYBRID_CSR: This CSR is only implemented if {cheri_default_ext_name} is implemented. :CAP_MODE_VALUE: 0 :INT_MODE_VALUE: 1 diff --git a/src/hypervisor-integration.adoc b/src/hypervisor-integration.adoc index d3540d01..c7e4e0fd 100644 --- a/src/hypervisor-integration.adoc +++ b/src/hypervisor-integration.adoc @@ -157,6 +157,8 @@ present when the implementation supports {cheri_default_ext_name}. {REQUIRE_CRE_CSR} +{REQUIRE_HYBRID_CSR} + .Virtual supervisor trap default capability register include::img/vstdcreg.edn[] diff --git a/src/riscv-hybrid-integration.adoc b/src/riscv-hybrid-integration.adoc index 02db6277..2035ac24 100644 --- a/src/riscv-hybrid-integration.adoc +++ b/src/riscv-hybrid-integration.adoc @@ -298,6 +298,8 @@ xref:default-csrnames-added[xrefstyle=short]. {TAG_RESET_CSR} +{REQUIRE_HYBRID_CSR} + .Debug default data capability include::img/dddcreg.edn[] @@ -430,6 +432,8 @@ machine-mode hart-local context space, to load into <<ddc>>. {REQUIRE_CRE_CSR} +{REQUIRE_HYBRID_CSR} + .Machine-mode trap data capability register include::img/mtdcreg.edn[] @@ -481,6 +485,8 @@ a supervisor-mode hart-local context space, to load into <<ddc>>. {REQUIRE_CRE_CSR} +{REQUIRE_HYBRID_CSR} + .Supervisor trap data capability register (*stdc*) include::img/stdcreg.edn[] @@ -516,6 +522,8 @@ is the <<infinite-cap>> capability. NOTE: CRE is not required for the implicit access required by checking memory accesses against <<ddc>> +{REQUIRE_HYBRID_CSR} + As shown in xref:CSR_exevectors[xrefstyle=short], <<ddc>> is a data pointer, so it does not need to be able to hold all possible invalid addresses.