diff --git a/e310x-hal/CHANGELOG.md b/e310x-hal/CHANGELOG.md index 110aba0..f367300 100644 --- a/e310x-hal/CHANGELOG.md +++ b/e310x-hal/CHANGELOG.md @@ -7,6 +7,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +### Changed +- Update `e310x` dependency and adapt code + ## [v0.12.0] - 2024-12-10 ### Changed diff --git a/e310x-hal/Cargo.toml b/e310x-hal/Cargo.toml index ae3025e..44ecc91 100644 --- a/e310x-hal/Cargo.toml +++ b/e310x-hal/Cargo.toml @@ -17,7 +17,7 @@ embedded-io = "0.6.1" e310x = { path = "../e310x", version = "0.12.0", features = ["rt", "critical-section"] } nb = "1.0.0" portable-atomic = { version = "1.9", default-features = false} -riscv = { version = "0.12.1", features = ["critical-section-single-hart"] } +riscv = { version = "0.14.0", features = ["critical-section-single-hart"] } [features] g002 = ["e310x/g002"] diff --git a/e310x-hal/src/clock.rs b/e310x-hal/src/clock.rs index 5399098..61c30e4 100644 --- a/e310x-hal/src/clock.rs +++ b/e310x-hal/src/clock.rs @@ -1,6 +1,6 @@ //! Clock configuration use crate::time::Hertz; -use e310x::{Aonclk as AONCLK, Prci as PRCI, CLINT}; +use e310x::{Aonclk as AONCLK, Clint, Prci as PRCI}; use riscv::interrupt; use riscv::register::mcycle; @@ -290,7 +290,7 @@ impl CoreClk { // Need to wait 100 us // RTC is running at 32kHz. // So wait 4 ticks of RTC. - let mtime = CLINT::mtimer().mtime; + let mtime = unsafe { Clint::steal() }.mtimer().mtime(); let time = mtime.read() + 4; while mtime.read() < time {} // Now it is safe to check for PLL Lock @@ -384,7 +384,7 @@ impl Clocks { /// Measure the coreclk frequency by counting the number of aonclk ticks. fn _measure_coreclk(&self, min_ticks: u64) -> Hertz { - let mtime = CLINT::mtimer().mtime; + let mtime = unsafe { Clint::steal() }.mtimer().mtime(); interrupt::free(|| { // Don't start measuring until we see an mtime tick while mtime.read() == mtime.read() {} diff --git a/e310x-hal/src/core/counters.rs b/e310x-hal/src/core/counters.rs index 84e25b2..a9489ca 100644 --- a/e310x-hal/src/core/counters.rs +++ b/e310x-hal/src/core/counters.rs @@ -60,7 +60,7 @@ pub struct PerformanceCounters { } impl PerformanceCounters { - pub(crate) fn new() -> Self { + pub(crate) const fn new() -> Self { Self { mcycle: MCYCLE, minstret: MINSTRET, diff --git a/e310x-hal/src/core/mod.rs b/e310x-hal/src/core/mod.rs index 75e20d9..ae73fd6 100644 --- a/e310x-hal/src/core/mod.rs +++ b/e310x-hal/src/core/mod.rs @@ -2,17 +2,23 @@ pub mod counters; -pub use e310x::{CLINT, PLIC}; +use e310x::{Clint, Plic}; /// Core peripherals pub struct CorePeripherals { + /// Core Local Interruptor (CLINT) + pub clint: Clint, + /// Platform-Level Interrupt Controller (PLIC) + pub plic: Plic, /// Performance counters pub counters: counters::PerformanceCounters, } impl CorePeripherals { - pub(crate) fn new() -> Self { + pub(crate) const fn new(clint: Clint, plic: Plic) -> Self { Self { + clint, + plic, counters: counters::PerformanceCounters::new(), } } @@ -23,6 +29,6 @@ impl CorePeripherals { /// /// Using this function may break the guarantees of the singleton pattern. pub unsafe fn steal() -> Self { - Self::new() + Self::new(Clint::steal(), Plic::steal()) } } diff --git a/e310x-hal/src/delay.rs b/e310x-hal/src/delay.rs index 17e71fc..4a2877f 100644 --- a/e310x-hal/src/delay.rs +++ b/e310x-hal/src/delay.rs @@ -1,7 +1,7 @@ //! # Delays use crate::clock::Clocks; -use e310x::CLINT; +use e310x::Clint; use embedded_hal::delay::DelayNs; use riscv::register::mip; @@ -22,7 +22,7 @@ impl DelayNs for Delay { fn delay_ns(&mut self, ns: u32) { let ticks = (ns as u64) * TICKS_PER_SECOND / 1_000_000_000; - let mtime = CLINT::mtimer().mtime; + let mtime = unsafe { Clint::steal() }.mtimer().mtime(); let t = mtime.read() + ticks; while mtime.read() < t {} } @@ -45,12 +45,13 @@ impl Sleep { impl DelayNs for Sleep { fn delay_ns(&mut self, ns: u32) { let ticks = (ns as u64) * u64::from(self.clock_freq) / 1_000_000_000; - let t = CLINT::mtimer().mtime.read() + ticks; + let clint = unsafe { e310x::Clint::steal() }; + let t = clint.mtimer().mtime().read() + ticks; - CLINT::mtimecmp0().write(t); + clint.mtimecmp0().write(t); // Enable timer interrupt - unsafe { CLINT::mtimer_enable() }; + unsafe { clint.mtimer().enable() }; // Wait For Interrupt will put CPU to sleep until an interrupt hits // in our case when internal timer mtime value >= mtimecmp value @@ -66,6 +67,6 @@ impl DelayNs for Sleep { } // Clear timer interrupt - CLINT::mtimer_disable(); + clint.mtimer().disable(); } } diff --git a/e310x-hal/src/device.rs b/e310x-hal/src/device.rs index 8bb56df..da0a63f 100644 --- a/e310x-hal/src/device.rs +++ b/e310x-hal/src/device.rs @@ -159,7 +159,7 @@ impl From for DeviceResources { }; DeviceResources { - core_peripherals: CorePeripherals::new(), + core_peripherals: CorePeripherals::new(p.clint, p.plic), peripherals, pins: p.gpio0.into(), } diff --git a/e310x/CHANGELOG.md b/e310x/CHANGELOG.md index f5f859f..3544aa4 100644 --- a/e310x/CHANGELOG.md +++ b/e310x/CHANGELOG.md @@ -11,7 +11,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). - The I2C0 code is now gated under the `g002` feature - Regenerate code with `svd2rust` 0.36.1 -- Use `riscv` v0.13.0 and `riscv-rt` v0.14.0 +- Use `riscv` v0.14.0, `riscv-peripheral` v0.3.0, and `riscv-rt` v0.15.0 - In vectored mode, align `mtvec` to 64 bytes ## [v0.12.0] - 2024-12-10 diff --git a/e310x/Cargo.toml b/e310x/Cargo.toml index a1bcc19..a64d0f7 100644 --- a/e310x/Cargo.toml +++ b/e310x/Cargo.toml @@ -12,9 +12,9 @@ edition = "2021" [dependencies] critical-section = { version = "1.2.0", optional = true } -riscv = "0.13.0" -riscv-peripheral = "0.2.0" -riscv-rt = { version = "0.14.0", features = ["no-interrupts"], optional = true } +riscv = "0.14.0" +riscv-peripheral = "0.3.0" +riscv-rt = { version = "0.15.0", features = ["no-interrupts"], optional = true } vcell = "0.1.3" [features] diff --git a/e310x/settings.yaml b/e310x/settings.yaml index 13b5043..e688e92 100644 --- a/e310x/settings.yaml +++ b/e310x/settings.yaml @@ -43,8 +43,7 @@ riscv_config: clint: name: "CLINT" - freq: 32768 - async_delay: false + mtime_freq: 32768 plic: name: "PLIC" diff --git a/e310x/src/aonclk/lfrosccfg.rs b/e310x/src/aonclk/lfrosccfg.rs index ae3f141..3c760c7 100644 --- a/e310x/src/aonclk/lfrosccfg.rs +++ b/e310x/src/aonclk/lfrosccfg.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bits 0:5"] #[inline(always)] - pub fn div(&mut self) -> DivW { + pub fn div(&mut self) -> DivW<'_, LfrosccfgSpec> { DivW::new(self, 0) } #[doc = "Bits 16:20"] #[inline(always)] - pub fn trim(&mut self) -> TrimW { + pub fn trim(&mut self) -> TrimW<'_, LfrosccfgSpec> { TrimW::new(self, 16) } #[doc = "Bit 30"] #[inline(always)] - pub fn enable(&mut self) -> EnableW { + pub fn enable(&mut self) -> EnableW<'_, LfrosccfgSpec> { EnableW::new(self, 30) } #[doc = "Bit 31"] #[inline(always)] - pub fn ready(&mut self) -> ReadyW { + pub fn ready(&mut self) -> ReadyW<'_, LfrosccfgSpec> { ReadyW::new(self, 31) } } diff --git a/e310x/src/gpio0/drive.rs b/e310x/src/gpio0/drive.rs index 1a8f00e..76fa4e8 100644 --- a/e310x/src/gpio0/drive.rs +++ b/e310x/src/gpio0/drive.rs @@ -295,162 +295,162 @@ impl R { impl W { #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> Pin0W { + pub fn pin0(&mut self) -> Pin0W<'_, DriveSpec> { Pin0W::new(self, 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> Pin1W { + pub fn pin1(&mut self) -> Pin1W<'_, DriveSpec> { Pin1W::new(self, 1) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> Pin2W { + pub fn pin2(&mut self) -> Pin2W<'_, DriveSpec> { Pin2W::new(self, 2) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> Pin3W { + pub fn pin3(&mut self) -> Pin3W<'_, DriveSpec> { Pin3W::new(self, 3) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> Pin4W { + pub fn pin4(&mut self) -> Pin4W<'_, DriveSpec> { Pin4W::new(self, 4) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> Pin5W { + pub fn pin5(&mut self) -> Pin5W<'_, DriveSpec> { Pin5W::new(self, 5) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> Pin6W { + pub fn pin6(&mut self) -> Pin6W<'_, DriveSpec> { Pin6W::new(self, 6) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> Pin7W { + pub fn pin7(&mut self) -> Pin7W<'_, DriveSpec> { Pin7W::new(self, 7) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> Pin8W { + pub fn pin8(&mut self) -> Pin8W<'_, DriveSpec> { Pin8W::new(self, 8) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> Pin9W { + pub fn pin9(&mut self) -> Pin9W<'_, DriveSpec> { Pin9W::new(self, 9) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> Pin10W { + pub fn pin10(&mut self) -> Pin10W<'_, DriveSpec> { Pin10W::new(self, 10) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> Pin11W { + pub fn pin11(&mut self) -> Pin11W<'_, DriveSpec> { Pin11W::new(self, 11) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> Pin12W { + pub fn pin12(&mut self) -> Pin12W<'_, DriveSpec> { Pin12W::new(self, 12) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> Pin13W { + pub fn pin13(&mut self) -> Pin13W<'_, DriveSpec> { Pin13W::new(self, 13) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> Pin14W { + pub fn pin14(&mut self) -> Pin14W<'_, DriveSpec> { Pin14W::new(self, 14) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> Pin15W { + pub fn pin15(&mut self) -> Pin15W<'_, DriveSpec> { Pin15W::new(self, 15) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> Pin16W { + pub fn pin16(&mut self) -> Pin16W<'_, DriveSpec> { Pin16W::new(self, 16) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> Pin17W { + pub fn pin17(&mut self) -> Pin17W<'_, DriveSpec> { Pin17W::new(self, 17) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> Pin18W { + pub fn pin18(&mut self) -> Pin18W<'_, DriveSpec> { Pin18W::new(self, 18) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> Pin19W { + pub fn pin19(&mut self) -> Pin19W<'_, DriveSpec> { Pin19W::new(self, 19) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> Pin20W { + pub fn pin20(&mut self) -> Pin20W<'_, DriveSpec> { Pin20W::new(self, 20) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> Pin21W { + pub fn pin21(&mut self) -> Pin21W<'_, DriveSpec> { Pin21W::new(self, 21) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> Pin22W { + pub fn pin22(&mut self) -> Pin22W<'_, DriveSpec> { Pin22W::new(self, 22) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> Pin23W { + pub fn pin23(&mut self) -> Pin23W<'_, DriveSpec> { Pin23W::new(self, 23) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> Pin24W { + pub fn pin24(&mut self) -> Pin24W<'_, DriveSpec> { Pin24W::new(self, 24) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> Pin25W { + pub fn pin25(&mut self) -> Pin25W<'_, DriveSpec> { Pin25W::new(self, 25) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> Pin26W { + pub fn pin26(&mut self) -> Pin26W<'_, DriveSpec> { Pin26W::new(self, 26) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> Pin27W { + pub fn pin27(&mut self) -> Pin27W<'_, DriveSpec> { Pin27W::new(self, 27) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> Pin28W { + pub fn pin28(&mut self) -> Pin28W<'_, DriveSpec> { Pin28W::new(self, 28) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> Pin29W { + pub fn pin29(&mut self) -> Pin29W<'_, DriveSpec> { Pin29W::new(self, 29) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> Pin30W { + pub fn pin30(&mut self) -> Pin30W<'_, DriveSpec> { Pin30W::new(self, 30) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> Pin31W { + pub fn pin31(&mut self) -> Pin31W<'_, DriveSpec> { Pin31W::new(self, 31) } } diff --git a/e310x/src/gpio0/fall_ie.rs b/e310x/src/gpio0/fall_ie.rs index adc8dba..64bdcff 100644 --- a/e310x/src/gpio0/fall_ie.rs +++ b/e310x/src/gpio0/fall_ie.rs @@ -295,162 +295,162 @@ impl R { impl W { #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> Pin0W { + pub fn pin0(&mut self) -> Pin0W<'_, FallIeSpec> { Pin0W::new(self, 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> Pin1W { + pub fn pin1(&mut self) -> Pin1W<'_, FallIeSpec> { Pin1W::new(self, 1) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> Pin2W { + pub fn pin2(&mut self) -> Pin2W<'_, FallIeSpec> { Pin2W::new(self, 2) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> Pin3W { + pub fn pin3(&mut self) -> Pin3W<'_, FallIeSpec> { Pin3W::new(self, 3) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> Pin4W { + pub fn pin4(&mut self) -> Pin4W<'_, FallIeSpec> { Pin4W::new(self, 4) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> Pin5W { + pub fn pin5(&mut self) -> Pin5W<'_, FallIeSpec> { Pin5W::new(self, 5) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> Pin6W { + pub fn pin6(&mut self) -> Pin6W<'_, FallIeSpec> { Pin6W::new(self, 6) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> Pin7W { + pub fn pin7(&mut self) -> Pin7W<'_, FallIeSpec> { Pin7W::new(self, 7) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> Pin8W { + pub fn pin8(&mut self) -> Pin8W<'_, FallIeSpec> { Pin8W::new(self, 8) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> Pin9W { + pub fn pin9(&mut self) -> Pin9W<'_, FallIeSpec> { Pin9W::new(self, 9) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> Pin10W { + pub fn pin10(&mut self) -> Pin10W<'_, FallIeSpec> { Pin10W::new(self, 10) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> Pin11W { + pub fn pin11(&mut self) -> Pin11W<'_, FallIeSpec> { Pin11W::new(self, 11) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> Pin12W { + pub fn pin12(&mut self) -> Pin12W<'_, FallIeSpec> { Pin12W::new(self, 12) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> Pin13W { + pub fn pin13(&mut self) -> Pin13W<'_, FallIeSpec> { Pin13W::new(self, 13) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> Pin14W { + pub fn pin14(&mut self) -> Pin14W<'_, FallIeSpec> { Pin14W::new(self, 14) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> Pin15W { + pub fn pin15(&mut self) -> Pin15W<'_, FallIeSpec> { Pin15W::new(self, 15) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> Pin16W { + pub fn pin16(&mut self) -> Pin16W<'_, FallIeSpec> { Pin16W::new(self, 16) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> Pin17W { + pub fn pin17(&mut self) -> Pin17W<'_, FallIeSpec> { Pin17W::new(self, 17) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> Pin18W { + pub fn pin18(&mut self) -> Pin18W<'_, FallIeSpec> { Pin18W::new(self, 18) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> Pin19W { + pub fn pin19(&mut self) -> Pin19W<'_, FallIeSpec> { Pin19W::new(self, 19) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> Pin20W { + pub fn pin20(&mut self) -> Pin20W<'_, FallIeSpec> { Pin20W::new(self, 20) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> Pin21W { + pub fn pin21(&mut self) -> Pin21W<'_, FallIeSpec> { Pin21W::new(self, 21) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> Pin22W { + pub fn pin22(&mut self) -> Pin22W<'_, FallIeSpec> { Pin22W::new(self, 22) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> Pin23W { + pub fn pin23(&mut self) -> Pin23W<'_, FallIeSpec> { Pin23W::new(self, 23) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> Pin24W { + pub fn pin24(&mut self) -> Pin24W<'_, FallIeSpec> { Pin24W::new(self, 24) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> Pin25W { + pub fn pin25(&mut self) -> Pin25W<'_, FallIeSpec> { Pin25W::new(self, 25) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> Pin26W { + pub fn pin26(&mut self) -> Pin26W<'_, FallIeSpec> { Pin26W::new(self, 26) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> Pin27W { + pub fn pin27(&mut self) -> Pin27W<'_, FallIeSpec> { Pin27W::new(self, 27) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> Pin28W { + pub fn pin28(&mut self) -> Pin28W<'_, FallIeSpec> { Pin28W::new(self, 28) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> Pin29W { + pub fn pin29(&mut self) -> Pin29W<'_, FallIeSpec> { Pin29W::new(self, 29) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> Pin30W { + pub fn pin30(&mut self) -> Pin30W<'_, FallIeSpec> { Pin30W::new(self, 30) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> Pin31W { + pub fn pin31(&mut self) -> Pin31W<'_, FallIeSpec> { Pin31W::new(self, 31) } } diff --git a/e310x/src/gpio0/fall_ip.rs b/e310x/src/gpio0/fall_ip.rs index 2b2d0d0..07aa254 100644 --- a/e310x/src/gpio0/fall_ip.rs +++ b/e310x/src/gpio0/fall_ip.rs @@ -295,162 +295,162 @@ impl R { impl W { #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> Pin0W { + pub fn pin0(&mut self) -> Pin0W<'_, FallIpSpec> { Pin0W::new(self, 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> Pin1W { + pub fn pin1(&mut self) -> Pin1W<'_, FallIpSpec> { Pin1W::new(self, 1) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> Pin2W { + pub fn pin2(&mut self) -> Pin2W<'_, FallIpSpec> { Pin2W::new(self, 2) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> Pin3W { + pub fn pin3(&mut self) -> Pin3W<'_, FallIpSpec> { Pin3W::new(self, 3) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> Pin4W { + pub fn pin4(&mut self) -> Pin4W<'_, FallIpSpec> { Pin4W::new(self, 4) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> Pin5W { + pub fn pin5(&mut self) -> Pin5W<'_, FallIpSpec> { Pin5W::new(self, 5) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> Pin6W { + pub fn pin6(&mut self) -> Pin6W<'_, FallIpSpec> { Pin6W::new(self, 6) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> Pin7W { + pub fn pin7(&mut self) -> Pin7W<'_, FallIpSpec> { Pin7W::new(self, 7) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> Pin8W { + pub fn pin8(&mut self) -> Pin8W<'_, FallIpSpec> { Pin8W::new(self, 8) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> Pin9W { + pub fn pin9(&mut self) -> Pin9W<'_, FallIpSpec> { Pin9W::new(self, 9) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> Pin10W { + pub fn pin10(&mut self) -> Pin10W<'_, FallIpSpec> { Pin10W::new(self, 10) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> Pin11W { + pub fn pin11(&mut self) -> Pin11W<'_, FallIpSpec> { Pin11W::new(self, 11) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> Pin12W { + pub fn pin12(&mut self) -> Pin12W<'_, FallIpSpec> { Pin12W::new(self, 12) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> Pin13W { + pub fn pin13(&mut self) -> Pin13W<'_, FallIpSpec> { Pin13W::new(self, 13) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> Pin14W { + pub fn pin14(&mut self) -> Pin14W<'_, FallIpSpec> { Pin14W::new(self, 14) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> Pin15W { + pub fn pin15(&mut self) -> Pin15W<'_, FallIpSpec> { Pin15W::new(self, 15) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> Pin16W { + pub fn pin16(&mut self) -> Pin16W<'_, FallIpSpec> { Pin16W::new(self, 16) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> Pin17W { + pub fn pin17(&mut self) -> Pin17W<'_, FallIpSpec> { Pin17W::new(self, 17) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> Pin18W { + pub fn pin18(&mut self) -> Pin18W<'_, FallIpSpec> { Pin18W::new(self, 18) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> Pin19W { + pub fn pin19(&mut self) -> Pin19W<'_, FallIpSpec> { Pin19W::new(self, 19) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> Pin20W { + pub fn pin20(&mut self) -> Pin20W<'_, FallIpSpec> { Pin20W::new(self, 20) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> Pin21W { + pub fn pin21(&mut self) -> Pin21W<'_, FallIpSpec> { Pin21W::new(self, 21) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> Pin22W { + pub fn pin22(&mut self) -> Pin22W<'_, FallIpSpec> { Pin22W::new(self, 22) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> Pin23W { + pub fn pin23(&mut self) -> Pin23W<'_, FallIpSpec> { Pin23W::new(self, 23) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> Pin24W { + pub fn pin24(&mut self) -> Pin24W<'_, FallIpSpec> { Pin24W::new(self, 24) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> Pin25W { + pub fn pin25(&mut self) -> Pin25W<'_, FallIpSpec> { Pin25W::new(self, 25) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> Pin26W { + pub fn pin26(&mut self) -> Pin26W<'_, FallIpSpec> { Pin26W::new(self, 26) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> Pin27W { + pub fn pin27(&mut self) -> Pin27W<'_, FallIpSpec> { Pin27W::new(self, 27) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> Pin28W { + pub fn pin28(&mut self) -> Pin28W<'_, FallIpSpec> { Pin28W::new(self, 28) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> Pin29W { + pub fn pin29(&mut self) -> Pin29W<'_, FallIpSpec> { Pin29W::new(self, 29) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> Pin30W { + pub fn pin30(&mut self) -> Pin30W<'_, FallIpSpec> { Pin30W::new(self, 30) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> Pin31W { + pub fn pin31(&mut self) -> Pin31W<'_, FallIpSpec> { Pin31W::new(self, 31) } } diff --git a/e310x/src/gpio0/high_ie.rs b/e310x/src/gpio0/high_ie.rs index b260cb3..9f7abc2 100644 --- a/e310x/src/gpio0/high_ie.rs +++ b/e310x/src/gpio0/high_ie.rs @@ -295,162 +295,162 @@ impl R { impl W { #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> Pin0W { + pub fn pin0(&mut self) -> Pin0W<'_, HighIeSpec> { Pin0W::new(self, 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> Pin1W { + pub fn pin1(&mut self) -> Pin1W<'_, HighIeSpec> { Pin1W::new(self, 1) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> Pin2W { + pub fn pin2(&mut self) -> Pin2W<'_, HighIeSpec> { Pin2W::new(self, 2) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> Pin3W { + pub fn pin3(&mut self) -> Pin3W<'_, HighIeSpec> { Pin3W::new(self, 3) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> Pin4W { + pub fn pin4(&mut self) -> Pin4W<'_, HighIeSpec> { Pin4W::new(self, 4) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> Pin5W { + pub fn pin5(&mut self) -> Pin5W<'_, HighIeSpec> { Pin5W::new(self, 5) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> Pin6W { + pub fn pin6(&mut self) -> Pin6W<'_, HighIeSpec> { Pin6W::new(self, 6) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> Pin7W { + pub fn pin7(&mut self) -> Pin7W<'_, HighIeSpec> { Pin7W::new(self, 7) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> Pin8W { + pub fn pin8(&mut self) -> Pin8W<'_, HighIeSpec> { Pin8W::new(self, 8) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> Pin9W { + pub fn pin9(&mut self) -> Pin9W<'_, HighIeSpec> { Pin9W::new(self, 9) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> Pin10W { + pub fn pin10(&mut self) -> Pin10W<'_, HighIeSpec> { Pin10W::new(self, 10) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> Pin11W { + pub fn pin11(&mut self) -> Pin11W<'_, HighIeSpec> { Pin11W::new(self, 11) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> Pin12W { + pub fn pin12(&mut self) -> Pin12W<'_, HighIeSpec> { Pin12W::new(self, 12) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> Pin13W { + pub fn pin13(&mut self) -> Pin13W<'_, HighIeSpec> { Pin13W::new(self, 13) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> Pin14W { + pub fn pin14(&mut self) -> Pin14W<'_, HighIeSpec> { Pin14W::new(self, 14) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> Pin15W { + pub fn pin15(&mut self) -> Pin15W<'_, HighIeSpec> { Pin15W::new(self, 15) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> Pin16W { + pub fn pin16(&mut self) -> Pin16W<'_, HighIeSpec> { Pin16W::new(self, 16) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> Pin17W { + pub fn pin17(&mut self) -> Pin17W<'_, HighIeSpec> { Pin17W::new(self, 17) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> Pin18W { + pub fn pin18(&mut self) -> Pin18W<'_, HighIeSpec> { Pin18W::new(self, 18) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> Pin19W { + pub fn pin19(&mut self) -> Pin19W<'_, HighIeSpec> { Pin19W::new(self, 19) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> Pin20W { + pub fn pin20(&mut self) -> Pin20W<'_, HighIeSpec> { Pin20W::new(self, 20) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> Pin21W { + pub fn pin21(&mut self) -> Pin21W<'_, HighIeSpec> { Pin21W::new(self, 21) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> Pin22W { + pub fn pin22(&mut self) -> Pin22W<'_, HighIeSpec> { Pin22W::new(self, 22) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> Pin23W { + pub fn pin23(&mut self) -> Pin23W<'_, HighIeSpec> { Pin23W::new(self, 23) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> Pin24W { + pub fn pin24(&mut self) -> Pin24W<'_, HighIeSpec> { Pin24W::new(self, 24) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> Pin25W { + pub fn pin25(&mut self) -> Pin25W<'_, HighIeSpec> { Pin25W::new(self, 25) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> Pin26W { + pub fn pin26(&mut self) -> Pin26W<'_, HighIeSpec> { Pin26W::new(self, 26) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> Pin27W { + pub fn pin27(&mut self) -> Pin27W<'_, HighIeSpec> { Pin27W::new(self, 27) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> Pin28W { + pub fn pin28(&mut self) -> Pin28W<'_, HighIeSpec> { Pin28W::new(self, 28) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> Pin29W { + pub fn pin29(&mut self) -> Pin29W<'_, HighIeSpec> { Pin29W::new(self, 29) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> Pin30W { + pub fn pin30(&mut self) -> Pin30W<'_, HighIeSpec> { Pin30W::new(self, 30) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> Pin31W { + pub fn pin31(&mut self) -> Pin31W<'_, HighIeSpec> { Pin31W::new(self, 31) } } diff --git a/e310x/src/gpio0/high_ip.rs b/e310x/src/gpio0/high_ip.rs index b3754cf..5a86a78 100644 --- a/e310x/src/gpio0/high_ip.rs +++ b/e310x/src/gpio0/high_ip.rs @@ -295,162 +295,162 @@ impl R { impl W { #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> Pin0W { + pub fn pin0(&mut self) -> Pin0W<'_, HighIpSpec> { Pin0W::new(self, 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> Pin1W { + pub fn pin1(&mut self) -> Pin1W<'_, HighIpSpec> { Pin1W::new(self, 1) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> Pin2W { + pub fn pin2(&mut self) -> Pin2W<'_, HighIpSpec> { Pin2W::new(self, 2) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> Pin3W { + pub fn pin3(&mut self) -> Pin3W<'_, HighIpSpec> { Pin3W::new(self, 3) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> Pin4W { + pub fn pin4(&mut self) -> Pin4W<'_, HighIpSpec> { Pin4W::new(self, 4) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> Pin5W { + pub fn pin5(&mut self) -> Pin5W<'_, HighIpSpec> { Pin5W::new(self, 5) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> Pin6W { + pub fn pin6(&mut self) -> Pin6W<'_, HighIpSpec> { Pin6W::new(self, 6) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> Pin7W { + pub fn pin7(&mut self) -> Pin7W<'_, HighIpSpec> { Pin7W::new(self, 7) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> Pin8W { + pub fn pin8(&mut self) -> Pin8W<'_, HighIpSpec> { Pin8W::new(self, 8) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> Pin9W { + pub fn pin9(&mut self) -> Pin9W<'_, HighIpSpec> { Pin9W::new(self, 9) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> Pin10W { + pub fn pin10(&mut self) -> Pin10W<'_, HighIpSpec> { Pin10W::new(self, 10) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> Pin11W { + pub fn pin11(&mut self) -> Pin11W<'_, HighIpSpec> { Pin11W::new(self, 11) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> Pin12W { + pub fn pin12(&mut self) -> Pin12W<'_, HighIpSpec> { Pin12W::new(self, 12) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> Pin13W { + pub fn pin13(&mut self) -> Pin13W<'_, HighIpSpec> { Pin13W::new(self, 13) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> Pin14W { + pub fn pin14(&mut self) -> Pin14W<'_, HighIpSpec> { Pin14W::new(self, 14) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> Pin15W { + pub fn pin15(&mut self) -> Pin15W<'_, HighIpSpec> { Pin15W::new(self, 15) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> Pin16W { + pub fn pin16(&mut self) -> Pin16W<'_, HighIpSpec> { Pin16W::new(self, 16) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> Pin17W { + pub fn pin17(&mut self) -> Pin17W<'_, HighIpSpec> { Pin17W::new(self, 17) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> Pin18W { + pub fn pin18(&mut self) -> Pin18W<'_, HighIpSpec> { Pin18W::new(self, 18) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> Pin19W { + pub fn pin19(&mut self) -> Pin19W<'_, HighIpSpec> { Pin19W::new(self, 19) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> Pin20W { + pub fn pin20(&mut self) -> Pin20W<'_, HighIpSpec> { Pin20W::new(self, 20) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> Pin21W { + pub fn pin21(&mut self) -> Pin21W<'_, HighIpSpec> { Pin21W::new(self, 21) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> Pin22W { + pub fn pin22(&mut self) -> Pin22W<'_, HighIpSpec> { Pin22W::new(self, 22) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> Pin23W { + pub fn pin23(&mut self) -> Pin23W<'_, HighIpSpec> { Pin23W::new(self, 23) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> Pin24W { + pub fn pin24(&mut self) -> Pin24W<'_, HighIpSpec> { Pin24W::new(self, 24) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> Pin25W { + pub fn pin25(&mut self) -> Pin25W<'_, HighIpSpec> { Pin25W::new(self, 25) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> Pin26W { + pub fn pin26(&mut self) -> Pin26W<'_, HighIpSpec> { Pin26W::new(self, 26) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> Pin27W { + pub fn pin27(&mut self) -> Pin27W<'_, HighIpSpec> { Pin27W::new(self, 27) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> Pin28W { + pub fn pin28(&mut self) -> Pin28W<'_, HighIpSpec> { Pin28W::new(self, 28) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> Pin29W { + pub fn pin29(&mut self) -> Pin29W<'_, HighIpSpec> { Pin29W::new(self, 29) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> Pin30W { + pub fn pin30(&mut self) -> Pin30W<'_, HighIpSpec> { Pin30W::new(self, 30) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> Pin31W { + pub fn pin31(&mut self) -> Pin31W<'_, HighIpSpec> { Pin31W::new(self, 31) } } diff --git a/e310x/src/gpio0/input_en.rs b/e310x/src/gpio0/input_en.rs index d38c896..6d5ffd3 100644 --- a/e310x/src/gpio0/input_en.rs +++ b/e310x/src/gpio0/input_en.rs @@ -295,162 +295,162 @@ impl R { impl W { #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> Pin0W { + pub fn pin0(&mut self) -> Pin0W<'_, InputEnSpec> { Pin0W::new(self, 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> Pin1W { + pub fn pin1(&mut self) -> Pin1W<'_, InputEnSpec> { Pin1W::new(self, 1) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> Pin2W { + pub fn pin2(&mut self) -> Pin2W<'_, InputEnSpec> { Pin2W::new(self, 2) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> Pin3W { + pub fn pin3(&mut self) -> Pin3W<'_, InputEnSpec> { Pin3W::new(self, 3) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> Pin4W { + pub fn pin4(&mut self) -> Pin4W<'_, InputEnSpec> { Pin4W::new(self, 4) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> Pin5W { + pub fn pin5(&mut self) -> Pin5W<'_, InputEnSpec> { Pin5W::new(self, 5) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> Pin6W { + pub fn pin6(&mut self) -> Pin6W<'_, InputEnSpec> { Pin6W::new(self, 6) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> Pin7W { + pub fn pin7(&mut self) -> Pin7W<'_, InputEnSpec> { Pin7W::new(self, 7) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> Pin8W { + pub fn pin8(&mut self) -> Pin8W<'_, InputEnSpec> { Pin8W::new(self, 8) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> Pin9W { + pub fn pin9(&mut self) -> Pin9W<'_, InputEnSpec> { Pin9W::new(self, 9) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> Pin10W { + pub fn pin10(&mut self) -> Pin10W<'_, InputEnSpec> { Pin10W::new(self, 10) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> Pin11W { + pub fn pin11(&mut self) -> Pin11W<'_, InputEnSpec> { Pin11W::new(self, 11) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> Pin12W { + pub fn pin12(&mut self) -> Pin12W<'_, InputEnSpec> { Pin12W::new(self, 12) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> Pin13W { + pub fn pin13(&mut self) -> Pin13W<'_, InputEnSpec> { Pin13W::new(self, 13) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> Pin14W { + pub fn pin14(&mut self) -> Pin14W<'_, InputEnSpec> { Pin14W::new(self, 14) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> Pin15W { + pub fn pin15(&mut self) -> Pin15W<'_, InputEnSpec> { Pin15W::new(self, 15) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> Pin16W { + pub fn pin16(&mut self) -> Pin16W<'_, InputEnSpec> { Pin16W::new(self, 16) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> Pin17W { + pub fn pin17(&mut self) -> Pin17W<'_, InputEnSpec> { Pin17W::new(self, 17) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> Pin18W { + pub fn pin18(&mut self) -> Pin18W<'_, InputEnSpec> { Pin18W::new(self, 18) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> Pin19W { + pub fn pin19(&mut self) -> Pin19W<'_, InputEnSpec> { Pin19W::new(self, 19) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> Pin20W { + pub fn pin20(&mut self) -> Pin20W<'_, InputEnSpec> { Pin20W::new(self, 20) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> Pin21W { + pub fn pin21(&mut self) -> Pin21W<'_, InputEnSpec> { Pin21W::new(self, 21) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> Pin22W { + pub fn pin22(&mut self) -> Pin22W<'_, InputEnSpec> { Pin22W::new(self, 22) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> Pin23W { + pub fn pin23(&mut self) -> Pin23W<'_, InputEnSpec> { Pin23W::new(self, 23) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> Pin24W { + pub fn pin24(&mut self) -> Pin24W<'_, InputEnSpec> { Pin24W::new(self, 24) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> Pin25W { + pub fn pin25(&mut self) -> Pin25W<'_, InputEnSpec> { Pin25W::new(self, 25) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> Pin26W { + pub fn pin26(&mut self) -> Pin26W<'_, InputEnSpec> { Pin26W::new(self, 26) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> Pin27W { + pub fn pin27(&mut self) -> Pin27W<'_, InputEnSpec> { Pin27W::new(self, 27) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> Pin28W { + pub fn pin28(&mut self) -> Pin28W<'_, InputEnSpec> { Pin28W::new(self, 28) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> Pin29W { + pub fn pin29(&mut self) -> Pin29W<'_, InputEnSpec> { Pin29W::new(self, 29) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> Pin30W { + pub fn pin30(&mut self) -> Pin30W<'_, InputEnSpec> { Pin30W::new(self, 30) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> Pin31W { + pub fn pin31(&mut self) -> Pin31W<'_, InputEnSpec> { Pin31W::new(self, 31) } } diff --git a/e310x/src/gpio0/input_val.rs b/e310x/src/gpio0/input_val.rs index 0fc9f21..24bc8d8 100644 --- a/e310x/src/gpio0/input_val.rs +++ b/e310x/src/gpio0/input_val.rs @@ -295,162 +295,162 @@ impl R { impl W { #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> Pin0W { + pub fn pin0(&mut self) -> Pin0W<'_, InputValSpec> { Pin0W::new(self, 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> Pin1W { + pub fn pin1(&mut self) -> Pin1W<'_, InputValSpec> { Pin1W::new(self, 1) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> Pin2W { + pub fn pin2(&mut self) -> Pin2W<'_, InputValSpec> { Pin2W::new(self, 2) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> Pin3W { + pub fn pin3(&mut self) -> Pin3W<'_, InputValSpec> { Pin3W::new(self, 3) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> Pin4W { + pub fn pin4(&mut self) -> Pin4W<'_, InputValSpec> { Pin4W::new(self, 4) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> Pin5W { + pub fn pin5(&mut self) -> Pin5W<'_, InputValSpec> { Pin5W::new(self, 5) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> Pin6W { + pub fn pin6(&mut self) -> Pin6W<'_, InputValSpec> { Pin6W::new(self, 6) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> Pin7W { + pub fn pin7(&mut self) -> Pin7W<'_, InputValSpec> { Pin7W::new(self, 7) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> Pin8W { + pub fn pin8(&mut self) -> Pin8W<'_, InputValSpec> { Pin8W::new(self, 8) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> Pin9W { + pub fn pin9(&mut self) -> Pin9W<'_, InputValSpec> { Pin9W::new(self, 9) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> Pin10W { + pub fn pin10(&mut self) -> Pin10W<'_, InputValSpec> { Pin10W::new(self, 10) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> Pin11W { + pub fn pin11(&mut self) -> Pin11W<'_, InputValSpec> { Pin11W::new(self, 11) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> Pin12W { + pub fn pin12(&mut self) -> Pin12W<'_, InputValSpec> { Pin12W::new(self, 12) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> Pin13W { + pub fn pin13(&mut self) -> Pin13W<'_, InputValSpec> { Pin13W::new(self, 13) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> Pin14W { + pub fn pin14(&mut self) -> Pin14W<'_, InputValSpec> { Pin14W::new(self, 14) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> Pin15W { + pub fn pin15(&mut self) -> Pin15W<'_, InputValSpec> { Pin15W::new(self, 15) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> Pin16W { + pub fn pin16(&mut self) -> Pin16W<'_, InputValSpec> { Pin16W::new(self, 16) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> Pin17W { + pub fn pin17(&mut self) -> Pin17W<'_, InputValSpec> { Pin17W::new(self, 17) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> Pin18W { + pub fn pin18(&mut self) -> Pin18W<'_, InputValSpec> { Pin18W::new(self, 18) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> Pin19W { + pub fn pin19(&mut self) -> Pin19W<'_, InputValSpec> { Pin19W::new(self, 19) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> Pin20W { + pub fn pin20(&mut self) -> Pin20W<'_, InputValSpec> { Pin20W::new(self, 20) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> Pin21W { + pub fn pin21(&mut self) -> Pin21W<'_, InputValSpec> { Pin21W::new(self, 21) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> Pin22W { + pub fn pin22(&mut self) -> Pin22W<'_, InputValSpec> { Pin22W::new(self, 22) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> Pin23W { + pub fn pin23(&mut self) -> Pin23W<'_, InputValSpec> { Pin23W::new(self, 23) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> Pin24W { + pub fn pin24(&mut self) -> Pin24W<'_, InputValSpec> { Pin24W::new(self, 24) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> Pin25W { + pub fn pin25(&mut self) -> Pin25W<'_, InputValSpec> { Pin25W::new(self, 25) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> Pin26W { + pub fn pin26(&mut self) -> Pin26W<'_, InputValSpec> { Pin26W::new(self, 26) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> Pin27W { + pub fn pin27(&mut self) -> Pin27W<'_, InputValSpec> { Pin27W::new(self, 27) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> Pin28W { + pub fn pin28(&mut self) -> Pin28W<'_, InputValSpec> { Pin28W::new(self, 28) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> Pin29W { + pub fn pin29(&mut self) -> Pin29W<'_, InputValSpec> { Pin29W::new(self, 29) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> Pin30W { + pub fn pin30(&mut self) -> Pin30W<'_, InputValSpec> { Pin30W::new(self, 30) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> Pin31W { + pub fn pin31(&mut self) -> Pin31W<'_, InputValSpec> { Pin31W::new(self, 31) } } diff --git a/e310x/src/gpio0/iof_en.rs b/e310x/src/gpio0/iof_en.rs index e3dbb80..6cb6285 100644 --- a/e310x/src/gpio0/iof_en.rs +++ b/e310x/src/gpio0/iof_en.rs @@ -295,162 +295,162 @@ impl R { impl W { #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> Pin0W { + pub fn pin0(&mut self) -> Pin0W<'_, IofEnSpec> { Pin0W::new(self, 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> Pin1W { + pub fn pin1(&mut self) -> Pin1W<'_, IofEnSpec> { Pin1W::new(self, 1) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> Pin2W { + pub fn pin2(&mut self) -> Pin2W<'_, IofEnSpec> { Pin2W::new(self, 2) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> Pin3W { + pub fn pin3(&mut self) -> Pin3W<'_, IofEnSpec> { Pin3W::new(self, 3) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> Pin4W { + pub fn pin4(&mut self) -> Pin4W<'_, IofEnSpec> { Pin4W::new(self, 4) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> Pin5W { + pub fn pin5(&mut self) -> Pin5W<'_, IofEnSpec> { Pin5W::new(self, 5) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> Pin6W { + pub fn pin6(&mut self) -> Pin6W<'_, IofEnSpec> { Pin6W::new(self, 6) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> Pin7W { + pub fn pin7(&mut self) -> Pin7W<'_, IofEnSpec> { Pin7W::new(self, 7) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> Pin8W { + pub fn pin8(&mut self) -> Pin8W<'_, IofEnSpec> { Pin8W::new(self, 8) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> Pin9W { + pub fn pin9(&mut self) -> Pin9W<'_, IofEnSpec> { Pin9W::new(self, 9) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> Pin10W { + pub fn pin10(&mut self) -> Pin10W<'_, IofEnSpec> { Pin10W::new(self, 10) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> Pin11W { + pub fn pin11(&mut self) -> Pin11W<'_, IofEnSpec> { Pin11W::new(self, 11) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> Pin12W { + pub fn pin12(&mut self) -> Pin12W<'_, IofEnSpec> { Pin12W::new(self, 12) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> Pin13W { + pub fn pin13(&mut self) -> Pin13W<'_, IofEnSpec> { Pin13W::new(self, 13) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> Pin14W { + pub fn pin14(&mut self) -> Pin14W<'_, IofEnSpec> { Pin14W::new(self, 14) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> Pin15W { + pub fn pin15(&mut self) -> Pin15W<'_, IofEnSpec> { Pin15W::new(self, 15) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> Pin16W { + pub fn pin16(&mut self) -> Pin16W<'_, IofEnSpec> { Pin16W::new(self, 16) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> Pin17W { + pub fn pin17(&mut self) -> Pin17W<'_, IofEnSpec> { Pin17W::new(self, 17) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> Pin18W { + pub fn pin18(&mut self) -> Pin18W<'_, IofEnSpec> { Pin18W::new(self, 18) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> Pin19W { + pub fn pin19(&mut self) -> Pin19W<'_, IofEnSpec> { Pin19W::new(self, 19) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> Pin20W { + pub fn pin20(&mut self) -> Pin20W<'_, IofEnSpec> { Pin20W::new(self, 20) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> Pin21W { + pub fn pin21(&mut self) -> Pin21W<'_, IofEnSpec> { Pin21W::new(self, 21) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> Pin22W { + pub fn pin22(&mut self) -> Pin22W<'_, IofEnSpec> { Pin22W::new(self, 22) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> Pin23W { + pub fn pin23(&mut self) -> Pin23W<'_, IofEnSpec> { Pin23W::new(self, 23) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> Pin24W { + pub fn pin24(&mut self) -> Pin24W<'_, IofEnSpec> { Pin24W::new(self, 24) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> Pin25W { + pub fn pin25(&mut self) -> Pin25W<'_, IofEnSpec> { Pin25W::new(self, 25) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> Pin26W { + pub fn pin26(&mut self) -> Pin26W<'_, IofEnSpec> { Pin26W::new(self, 26) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> Pin27W { + pub fn pin27(&mut self) -> Pin27W<'_, IofEnSpec> { Pin27W::new(self, 27) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> Pin28W { + pub fn pin28(&mut self) -> Pin28W<'_, IofEnSpec> { Pin28W::new(self, 28) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> Pin29W { + pub fn pin29(&mut self) -> Pin29W<'_, IofEnSpec> { Pin29W::new(self, 29) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> Pin30W { + pub fn pin30(&mut self) -> Pin30W<'_, IofEnSpec> { Pin30W::new(self, 30) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> Pin31W { + pub fn pin31(&mut self) -> Pin31W<'_, IofEnSpec> { Pin31W::new(self, 31) } } diff --git a/e310x/src/gpio0/iof_sel.rs b/e310x/src/gpio0/iof_sel.rs index 93f14fa..0d77078 100644 --- a/e310x/src/gpio0/iof_sel.rs +++ b/e310x/src/gpio0/iof_sel.rs @@ -1863,162 +1863,162 @@ impl R { impl W { #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> Pin0W { + pub fn pin0(&mut self) -> Pin0W<'_, IofSelSpec> { Pin0W::new(self, 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> Pin1W { + pub fn pin1(&mut self) -> Pin1W<'_, IofSelSpec> { Pin1W::new(self, 1) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> Pin2W { + pub fn pin2(&mut self) -> Pin2W<'_, IofSelSpec> { Pin2W::new(self, 2) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> Pin3W { + pub fn pin3(&mut self) -> Pin3W<'_, IofSelSpec> { Pin3W::new(self, 3) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> Pin4W { + pub fn pin4(&mut self) -> Pin4W<'_, IofSelSpec> { Pin4W::new(self, 4) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> Pin5W { + pub fn pin5(&mut self) -> Pin5W<'_, IofSelSpec> { Pin5W::new(self, 5) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> Pin6W { + pub fn pin6(&mut self) -> Pin6W<'_, IofSelSpec> { Pin6W::new(self, 6) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> Pin7W { + pub fn pin7(&mut self) -> Pin7W<'_, IofSelSpec> { Pin7W::new(self, 7) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> Pin8W { + pub fn pin8(&mut self) -> Pin8W<'_, IofSelSpec> { Pin8W::new(self, 8) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> Pin9W { + pub fn pin9(&mut self) -> Pin9W<'_, IofSelSpec> { Pin9W::new(self, 9) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> Pin10W { + pub fn pin10(&mut self) -> Pin10W<'_, IofSelSpec> { Pin10W::new(self, 10) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> Pin11W { + pub fn pin11(&mut self) -> Pin11W<'_, IofSelSpec> { Pin11W::new(self, 11) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> Pin12W { + pub fn pin12(&mut self) -> Pin12W<'_, IofSelSpec> { Pin12W::new(self, 12) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> Pin13W { + pub fn pin13(&mut self) -> Pin13W<'_, IofSelSpec> { Pin13W::new(self, 13) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> Pin14W { + pub fn pin14(&mut self) -> Pin14W<'_, IofSelSpec> { Pin14W::new(self, 14) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> Pin15W { + pub fn pin15(&mut self) -> Pin15W<'_, IofSelSpec> { Pin15W::new(self, 15) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> Pin16W { + pub fn pin16(&mut self) -> Pin16W<'_, IofSelSpec> { Pin16W::new(self, 16) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> Pin17W { + pub fn pin17(&mut self) -> Pin17W<'_, IofSelSpec> { Pin17W::new(self, 17) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> Pin18W { + pub fn pin18(&mut self) -> Pin18W<'_, IofSelSpec> { Pin18W::new(self, 18) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> Pin19W { + pub fn pin19(&mut self) -> Pin19W<'_, IofSelSpec> { Pin19W::new(self, 19) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> Pin20W { + pub fn pin20(&mut self) -> Pin20W<'_, IofSelSpec> { Pin20W::new(self, 20) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> Pin21W { + pub fn pin21(&mut self) -> Pin21W<'_, IofSelSpec> { Pin21W::new(self, 21) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> Pin22W { + pub fn pin22(&mut self) -> Pin22W<'_, IofSelSpec> { Pin22W::new(self, 22) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> Pin23W { + pub fn pin23(&mut self) -> Pin23W<'_, IofSelSpec> { Pin23W::new(self, 23) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> Pin24W { + pub fn pin24(&mut self) -> Pin24W<'_, IofSelSpec> { Pin24W::new(self, 24) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> Pin25W { + pub fn pin25(&mut self) -> Pin25W<'_, IofSelSpec> { Pin25W::new(self, 25) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> Pin26W { + pub fn pin26(&mut self) -> Pin26W<'_, IofSelSpec> { Pin26W::new(self, 26) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> Pin27W { + pub fn pin27(&mut self) -> Pin27W<'_, IofSelSpec> { Pin27W::new(self, 27) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> Pin28W { + pub fn pin28(&mut self) -> Pin28W<'_, IofSelSpec> { Pin28W::new(self, 28) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> Pin29W { + pub fn pin29(&mut self) -> Pin29W<'_, IofSelSpec> { Pin29W::new(self, 29) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> Pin30W { + pub fn pin30(&mut self) -> Pin30W<'_, IofSelSpec> { Pin30W::new(self, 30) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> Pin31W { + pub fn pin31(&mut self) -> Pin31W<'_, IofSelSpec> { Pin31W::new(self, 31) } } diff --git a/e310x/src/gpio0/low_ie.rs b/e310x/src/gpio0/low_ie.rs index f4ba440..13e3ca3 100644 --- a/e310x/src/gpio0/low_ie.rs +++ b/e310x/src/gpio0/low_ie.rs @@ -295,162 +295,162 @@ impl R { impl W { #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> Pin0W { + pub fn pin0(&mut self) -> Pin0W<'_, LowIeSpec> { Pin0W::new(self, 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> Pin1W { + pub fn pin1(&mut self) -> Pin1W<'_, LowIeSpec> { Pin1W::new(self, 1) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> Pin2W { + pub fn pin2(&mut self) -> Pin2W<'_, LowIeSpec> { Pin2W::new(self, 2) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> Pin3W { + pub fn pin3(&mut self) -> Pin3W<'_, LowIeSpec> { Pin3W::new(self, 3) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> Pin4W { + pub fn pin4(&mut self) -> Pin4W<'_, LowIeSpec> { Pin4W::new(self, 4) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> Pin5W { + pub fn pin5(&mut self) -> Pin5W<'_, LowIeSpec> { Pin5W::new(self, 5) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> Pin6W { + pub fn pin6(&mut self) -> Pin6W<'_, LowIeSpec> { Pin6W::new(self, 6) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> Pin7W { + pub fn pin7(&mut self) -> Pin7W<'_, LowIeSpec> { Pin7W::new(self, 7) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> Pin8W { + pub fn pin8(&mut self) -> Pin8W<'_, LowIeSpec> { Pin8W::new(self, 8) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> Pin9W { + pub fn pin9(&mut self) -> Pin9W<'_, LowIeSpec> { Pin9W::new(self, 9) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> Pin10W { + pub fn pin10(&mut self) -> Pin10W<'_, LowIeSpec> { Pin10W::new(self, 10) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> Pin11W { + pub fn pin11(&mut self) -> Pin11W<'_, LowIeSpec> { Pin11W::new(self, 11) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> Pin12W { + pub fn pin12(&mut self) -> Pin12W<'_, LowIeSpec> { Pin12W::new(self, 12) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> Pin13W { + pub fn pin13(&mut self) -> Pin13W<'_, LowIeSpec> { Pin13W::new(self, 13) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> Pin14W { + pub fn pin14(&mut self) -> Pin14W<'_, LowIeSpec> { Pin14W::new(self, 14) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> Pin15W { + pub fn pin15(&mut self) -> Pin15W<'_, LowIeSpec> { Pin15W::new(self, 15) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> Pin16W { + pub fn pin16(&mut self) -> Pin16W<'_, LowIeSpec> { Pin16W::new(self, 16) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> Pin17W { + pub fn pin17(&mut self) -> Pin17W<'_, LowIeSpec> { Pin17W::new(self, 17) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> Pin18W { + pub fn pin18(&mut self) -> Pin18W<'_, LowIeSpec> { Pin18W::new(self, 18) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> Pin19W { + pub fn pin19(&mut self) -> Pin19W<'_, LowIeSpec> { Pin19W::new(self, 19) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> Pin20W { + pub fn pin20(&mut self) -> Pin20W<'_, LowIeSpec> { Pin20W::new(self, 20) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> Pin21W { + pub fn pin21(&mut self) -> Pin21W<'_, LowIeSpec> { Pin21W::new(self, 21) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> Pin22W { + pub fn pin22(&mut self) -> Pin22W<'_, LowIeSpec> { Pin22W::new(self, 22) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> Pin23W { + pub fn pin23(&mut self) -> Pin23W<'_, LowIeSpec> { Pin23W::new(self, 23) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> Pin24W { + pub fn pin24(&mut self) -> Pin24W<'_, LowIeSpec> { Pin24W::new(self, 24) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> Pin25W { + pub fn pin25(&mut self) -> Pin25W<'_, LowIeSpec> { Pin25W::new(self, 25) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> Pin26W { + pub fn pin26(&mut self) -> Pin26W<'_, LowIeSpec> { Pin26W::new(self, 26) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> Pin27W { + pub fn pin27(&mut self) -> Pin27W<'_, LowIeSpec> { Pin27W::new(self, 27) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> Pin28W { + pub fn pin28(&mut self) -> Pin28W<'_, LowIeSpec> { Pin28W::new(self, 28) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> Pin29W { + pub fn pin29(&mut self) -> Pin29W<'_, LowIeSpec> { Pin29W::new(self, 29) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> Pin30W { + pub fn pin30(&mut self) -> Pin30W<'_, LowIeSpec> { Pin30W::new(self, 30) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> Pin31W { + pub fn pin31(&mut self) -> Pin31W<'_, LowIeSpec> { Pin31W::new(self, 31) } } diff --git a/e310x/src/gpio0/low_ip.rs b/e310x/src/gpio0/low_ip.rs index 896fffe..f6dd32d 100644 --- a/e310x/src/gpio0/low_ip.rs +++ b/e310x/src/gpio0/low_ip.rs @@ -295,162 +295,162 @@ impl R { impl W { #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> Pin0W { + pub fn pin0(&mut self) -> Pin0W<'_, LowIpSpec> { Pin0W::new(self, 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> Pin1W { + pub fn pin1(&mut self) -> Pin1W<'_, LowIpSpec> { Pin1W::new(self, 1) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> Pin2W { + pub fn pin2(&mut self) -> Pin2W<'_, LowIpSpec> { Pin2W::new(self, 2) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> Pin3W { + pub fn pin3(&mut self) -> Pin3W<'_, LowIpSpec> { Pin3W::new(self, 3) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> Pin4W { + pub fn pin4(&mut self) -> Pin4W<'_, LowIpSpec> { Pin4W::new(self, 4) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> Pin5W { + pub fn pin5(&mut self) -> Pin5W<'_, LowIpSpec> { Pin5W::new(self, 5) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> Pin6W { + pub fn pin6(&mut self) -> Pin6W<'_, LowIpSpec> { Pin6W::new(self, 6) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> Pin7W { + pub fn pin7(&mut self) -> Pin7W<'_, LowIpSpec> { Pin7W::new(self, 7) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> Pin8W { + pub fn pin8(&mut self) -> Pin8W<'_, LowIpSpec> { Pin8W::new(self, 8) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> Pin9W { + pub fn pin9(&mut self) -> Pin9W<'_, LowIpSpec> { Pin9W::new(self, 9) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> Pin10W { + pub fn pin10(&mut self) -> Pin10W<'_, LowIpSpec> { Pin10W::new(self, 10) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> Pin11W { + pub fn pin11(&mut self) -> Pin11W<'_, LowIpSpec> { Pin11W::new(self, 11) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> Pin12W { + pub fn pin12(&mut self) -> Pin12W<'_, LowIpSpec> { Pin12W::new(self, 12) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> Pin13W { + pub fn pin13(&mut self) -> Pin13W<'_, LowIpSpec> { Pin13W::new(self, 13) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> Pin14W { + pub fn pin14(&mut self) -> Pin14W<'_, LowIpSpec> { Pin14W::new(self, 14) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> Pin15W { + pub fn pin15(&mut self) -> Pin15W<'_, LowIpSpec> { Pin15W::new(self, 15) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> Pin16W { + pub fn pin16(&mut self) -> Pin16W<'_, LowIpSpec> { Pin16W::new(self, 16) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> Pin17W { + pub fn pin17(&mut self) -> Pin17W<'_, LowIpSpec> { Pin17W::new(self, 17) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> Pin18W { + pub fn pin18(&mut self) -> Pin18W<'_, LowIpSpec> { Pin18W::new(self, 18) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> Pin19W { + pub fn pin19(&mut self) -> Pin19W<'_, LowIpSpec> { Pin19W::new(self, 19) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> Pin20W { + pub fn pin20(&mut self) -> Pin20W<'_, LowIpSpec> { Pin20W::new(self, 20) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> Pin21W { + pub fn pin21(&mut self) -> Pin21W<'_, LowIpSpec> { Pin21W::new(self, 21) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> Pin22W { + pub fn pin22(&mut self) -> Pin22W<'_, LowIpSpec> { Pin22W::new(self, 22) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> Pin23W { + pub fn pin23(&mut self) -> Pin23W<'_, LowIpSpec> { Pin23W::new(self, 23) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> Pin24W { + pub fn pin24(&mut self) -> Pin24W<'_, LowIpSpec> { Pin24W::new(self, 24) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> Pin25W { + pub fn pin25(&mut self) -> Pin25W<'_, LowIpSpec> { Pin25W::new(self, 25) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> Pin26W { + pub fn pin26(&mut self) -> Pin26W<'_, LowIpSpec> { Pin26W::new(self, 26) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> Pin27W { + pub fn pin27(&mut self) -> Pin27W<'_, LowIpSpec> { Pin27W::new(self, 27) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> Pin28W { + pub fn pin28(&mut self) -> Pin28W<'_, LowIpSpec> { Pin28W::new(self, 28) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> Pin29W { + pub fn pin29(&mut self) -> Pin29W<'_, LowIpSpec> { Pin29W::new(self, 29) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> Pin30W { + pub fn pin30(&mut self) -> Pin30W<'_, LowIpSpec> { Pin30W::new(self, 30) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> Pin31W { + pub fn pin31(&mut self) -> Pin31W<'_, LowIpSpec> { Pin31W::new(self, 31) } } diff --git a/e310x/src/gpio0/out_xor.rs b/e310x/src/gpio0/out_xor.rs index 40798d8..d9c0771 100644 --- a/e310x/src/gpio0/out_xor.rs +++ b/e310x/src/gpio0/out_xor.rs @@ -295,162 +295,162 @@ impl R { impl W { #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> Pin0W { + pub fn pin0(&mut self) -> Pin0W<'_, OutXorSpec> { Pin0W::new(self, 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> Pin1W { + pub fn pin1(&mut self) -> Pin1W<'_, OutXorSpec> { Pin1W::new(self, 1) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> Pin2W { + pub fn pin2(&mut self) -> Pin2W<'_, OutXorSpec> { Pin2W::new(self, 2) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> Pin3W { + pub fn pin3(&mut self) -> Pin3W<'_, OutXorSpec> { Pin3W::new(self, 3) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> Pin4W { + pub fn pin4(&mut self) -> Pin4W<'_, OutXorSpec> { Pin4W::new(self, 4) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> Pin5W { + pub fn pin5(&mut self) -> Pin5W<'_, OutXorSpec> { Pin5W::new(self, 5) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> Pin6W { + pub fn pin6(&mut self) -> Pin6W<'_, OutXorSpec> { Pin6W::new(self, 6) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> Pin7W { + pub fn pin7(&mut self) -> Pin7W<'_, OutXorSpec> { Pin7W::new(self, 7) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> Pin8W { + pub fn pin8(&mut self) -> Pin8W<'_, OutXorSpec> { Pin8W::new(self, 8) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> Pin9W { + pub fn pin9(&mut self) -> Pin9W<'_, OutXorSpec> { Pin9W::new(self, 9) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> Pin10W { + pub fn pin10(&mut self) -> Pin10W<'_, OutXorSpec> { Pin10W::new(self, 10) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> Pin11W { + pub fn pin11(&mut self) -> Pin11W<'_, OutXorSpec> { Pin11W::new(self, 11) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> Pin12W { + pub fn pin12(&mut self) -> Pin12W<'_, OutXorSpec> { Pin12W::new(self, 12) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> Pin13W { + pub fn pin13(&mut self) -> Pin13W<'_, OutXorSpec> { Pin13W::new(self, 13) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> Pin14W { + pub fn pin14(&mut self) -> Pin14W<'_, OutXorSpec> { Pin14W::new(self, 14) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> Pin15W { + pub fn pin15(&mut self) -> Pin15W<'_, OutXorSpec> { Pin15W::new(self, 15) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> Pin16W { + pub fn pin16(&mut self) -> Pin16W<'_, OutXorSpec> { Pin16W::new(self, 16) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> Pin17W { + pub fn pin17(&mut self) -> Pin17W<'_, OutXorSpec> { Pin17W::new(self, 17) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> Pin18W { + pub fn pin18(&mut self) -> Pin18W<'_, OutXorSpec> { Pin18W::new(self, 18) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> Pin19W { + pub fn pin19(&mut self) -> Pin19W<'_, OutXorSpec> { Pin19W::new(self, 19) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> Pin20W { + pub fn pin20(&mut self) -> Pin20W<'_, OutXorSpec> { Pin20W::new(self, 20) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> Pin21W { + pub fn pin21(&mut self) -> Pin21W<'_, OutXorSpec> { Pin21W::new(self, 21) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> Pin22W { + pub fn pin22(&mut self) -> Pin22W<'_, OutXorSpec> { Pin22W::new(self, 22) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> Pin23W { + pub fn pin23(&mut self) -> Pin23W<'_, OutXorSpec> { Pin23W::new(self, 23) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> Pin24W { + pub fn pin24(&mut self) -> Pin24W<'_, OutXorSpec> { Pin24W::new(self, 24) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> Pin25W { + pub fn pin25(&mut self) -> Pin25W<'_, OutXorSpec> { Pin25W::new(self, 25) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> Pin26W { + pub fn pin26(&mut self) -> Pin26W<'_, OutXorSpec> { Pin26W::new(self, 26) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> Pin27W { + pub fn pin27(&mut self) -> Pin27W<'_, OutXorSpec> { Pin27W::new(self, 27) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> Pin28W { + pub fn pin28(&mut self) -> Pin28W<'_, OutXorSpec> { Pin28W::new(self, 28) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> Pin29W { + pub fn pin29(&mut self) -> Pin29W<'_, OutXorSpec> { Pin29W::new(self, 29) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> Pin30W { + pub fn pin30(&mut self) -> Pin30W<'_, OutXorSpec> { Pin30W::new(self, 30) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> Pin31W { + pub fn pin31(&mut self) -> Pin31W<'_, OutXorSpec> { Pin31W::new(self, 31) } } diff --git a/e310x/src/gpio0/output_en.rs b/e310x/src/gpio0/output_en.rs index 5241f70..d81bc3c 100644 --- a/e310x/src/gpio0/output_en.rs +++ b/e310x/src/gpio0/output_en.rs @@ -295,162 +295,162 @@ impl R { impl W { #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> Pin0W { + pub fn pin0(&mut self) -> Pin0W<'_, OutputEnSpec> { Pin0W::new(self, 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> Pin1W { + pub fn pin1(&mut self) -> Pin1W<'_, OutputEnSpec> { Pin1W::new(self, 1) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> Pin2W { + pub fn pin2(&mut self) -> Pin2W<'_, OutputEnSpec> { Pin2W::new(self, 2) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> Pin3W { + pub fn pin3(&mut self) -> Pin3W<'_, OutputEnSpec> { Pin3W::new(self, 3) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> Pin4W { + pub fn pin4(&mut self) -> Pin4W<'_, OutputEnSpec> { Pin4W::new(self, 4) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> Pin5W { + pub fn pin5(&mut self) -> Pin5W<'_, OutputEnSpec> { Pin5W::new(self, 5) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> Pin6W { + pub fn pin6(&mut self) -> Pin6W<'_, OutputEnSpec> { Pin6W::new(self, 6) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> Pin7W { + pub fn pin7(&mut self) -> Pin7W<'_, OutputEnSpec> { Pin7W::new(self, 7) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> Pin8W { + pub fn pin8(&mut self) -> Pin8W<'_, OutputEnSpec> { Pin8W::new(self, 8) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> Pin9W { + pub fn pin9(&mut self) -> Pin9W<'_, OutputEnSpec> { Pin9W::new(self, 9) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> Pin10W { + pub fn pin10(&mut self) -> Pin10W<'_, OutputEnSpec> { Pin10W::new(self, 10) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> Pin11W { + pub fn pin11(&mut self) -> Pin11W<'_, OutputEnSpec> { Pin11W::new(self, 11) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> Pin12W { + pub fn pin12(&mut self) -> Pin12W<'_, OutputEnSpec> { Pin12W::new(self, 12) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> Pin13W { + pub fn pin13(&mut self) -> Pin13W<'_, OutputEnSpec> { Pin13W::new(self, 13) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> Pin14W { + pub fn pin14(&mut self) -> Pin14W<'_, OutputEnSpec> { Pin14W::new(self, 14) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> Pin15W { + pub fn pin15(&mut self) -> Pin15W<'_, OutputEnSpec> { Pin15W::new(self, 15) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> Pin16W { + pub fn pin16(&mut self) -> Pin16W<'_, OutputEnSpec> { Pin16W::new(self, 16) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> Pin17W { + pub fn pin17(&mut self) -> Pin17W<'_, OutputEnSpec> { Pin17W::new(self, 17) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> Pin18W { + pub fn pin18(&mut self) -> Pin18W<'_, OutputEnSpec> { Pin18W::new(self, 18) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> Pin19W { + pub fn pin19(&mut self) -> Pin19W<'_, OutputEnSpec> { Pin19W::new(self, 19) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> Pin20W { + pub fn pin20(&mut self) -> Pin20W<'_, OutputEnSpec> { Pin20W::new(self, 20) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> Pin21W { + pub fn pin21(&mut self) -> Pin21W<'_, OutputEnSpec> { Pin21W::new(self, 21) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> Pin22W { + pub fn pin22(&mut self) -> Pin22W<'_, OutputEnSpec> { Pin22W::new(self, 22) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> Pin23W { + pub fn pin23(&mut self) -> Pin23W<'_, OutputEnSpec> { Pin23W::new(self, 23) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> Pin24W { + pub fn pin24(&mut self) -> Pin24W<'_, OutputEnSpec> { Pin24W::new(self, 24) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> Pin25W { + pub fn pin25(&mut self) -> Pin25W<'_, OutputEnSpec> { Pin25W::new(self, 25) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> Pin26W { + pub fn pin26(&mut self) -> Pin26W<'_, OutputEnSpec> { Pin26W::new(self, 26) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> Pin27W { + pub fn pin27(&mut self) -> Pin27W<'_, OutputEnSpec> { Pin27W::new(self, 27) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> Pin28W { + pub fn pin28(&mut self) -> Pin28W<'_, OutputEnSpec> { Pin28W::new(self, 28) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> Pin29W { + pub fn pin29(&mut self) -> Pin29W<'_, OutputEnSpec> { Pin29W::new(self, 29) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> Pin30W { + pub fn pin30(&mut self) -> Pin30W<'_, OutputEnSpec> { Pin30W::new(self, 30) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> Pin31W { + pub fn pin31(&mut self) -> Pin31W<'_, OutputEnSpec> { Pin31W::new(self, 31) } } diff --git a/e310x/src/gpio0/output_val.rs b/e310x/src/gpio0/output_val.rs index 4111937..e459a53 100644 --- a/e310x/src/gpio0/output_val.rs +++ b/e310x/src/gpio0/output_val.rs @@ -295,162 +295,162 @@ impl R { impl W { #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> Pin0W { + pub fn pin0(&mut self) -> Pin0W<'_, OutputValSpec> { Pin0W::new(self, 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> Pin1W { + pub fn pin1(&mut self) -> Pin1W<'_, OutputValSpec> { Pin1W::new(self, 1) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> Pin2W { + pub fn pin2(&mut self) -> Pin2W<'_, OutputValSpec> { Pin2W::new(self, 2) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> Pin3W { + pub fn pin3(&mut self) -> Pin3W<'_, OutputValSpec> { Pin3W::new(self, 3) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> Pin4W { + pub fn pin4(&mut self) -> Pin4W<'_, OutputValSpec> { Pin4W::new(self, 4) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> Pin5W { + pub fn pin5(&mut self) -> Pin5W<'_, OutputValSpec> { Pin5W::new(self, 5) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> Pin6W { + pub fn pin6(&mut self) -> Pin6W<'_, OutputValSpec> { Pin6W::new(self, 6) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> Pin7W { + pub fn pin7(&mut self) -> Pin7W<'_, OutputValSpec> { Pin7W::new(self, 7) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> Pin8W { + pub fn pin8(&mut self) -> Pin8W<'_, OutputValSpec> { Pin8W::new(self, 8) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> Pin9W { + pub fn pin9(&mut self) -> Pin9W<'_, OutputValSpec> { Pin9W::new(self, 9) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> Pin10W { + pub fn pin10(&mut self) -> Pin10W<'_, OutputValSpec> { Pin10W::new(self, 10) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> Pin11W { + pub fn pin11(&mut self) -> Pin11W<'_, OutputValSpec> { Pin11W::new(self, 11) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> Pin12W { + pub fn pin12(&mut self) -> Pin12W<'_, OutputValSpec> { Pin12W::new(self, 12) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> Pin13W { + pub fn pin13(&mut self) -> Pin13W<'_, OutputValSpec> { Pin13W::new(self, 13) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> Pin14W { + pub fn pin14(&mut self) -> Pin14W<'_, OutputValSpec> { Pin14W::new(self, 14) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> Pin15W { + pub fn pin15(&mut self) -> Pin15W<'_, OutputValSpec> { Pin15W::new(self, 15) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> Pin16W { + pub fn pin16(&mut self) -> Pin16W<'_, OutputValSpec> { Pin16W::new(self, 16) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> Pin17W { + pub fn pin17(&mut self) -> Pin17W<'_, OutputValSpec> { Pin17W::new(self, 17) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> Pin18W { + pub fn pin18(&mut self) -> Pin18W<'_, OutputValSpec> { Pin18W::new(self, 18) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> Pin19W { + pub fn pin19(&mut self) -> Pin19W<'_, OutputValSpec> { Pin19W::new(self, 19) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> Pin20W { + pub fn pin20(&mut self) -> Pin20W<'_, OutputValSpec> { Pin20W::new(self, 20) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> Pin21W { + pub fn pin21(&mut self) -> Pin21W<'_, OutputValSpec> { Pin21W::new(self, 21) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> Pin22W { + pub fn pin22(&mut self) -> Pin22W<'_, OutputValSpec> { Pin22W::new(self, 22) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> Pin23W { + pub fn pin23(&mut self) -> Pin23W<'_, OutputValSpec> { Pin23W::new(self, 23) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> Pin24W { + pub fn pin24(&mut self) -> Pin24W<'_, OutputValSpec> { Pin24W::new(self, 24) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> Pin25W { + pub fn pin25(&mut self) -> Pin25W<'_, OutputValSpec> { Pin25W::new(self, 25) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> Pin26W { + pub fn pin26(&mut self) -> Pin26W<'_, OutputValSpec> { Pin26W::new(self, 26) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> Pin27W { + pub fn pin27(&mut self) -> Pin27W<'_, OutputValSpec> { Pin27W::new(self, 27) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> Pin28W { + pub fn pin28(&mut self) -> Pin28W<'_, OutputValSpec> { Pin28W::new(self, 28) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> Pin29W { + pub fn pin29(&mut self) -> Pin29W<'_, OutputValSpec> { Pin29W::new(self, 29) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> Pin30W { + pub fn pin30(&mut self) -> Pin30W<'_, OutputValSpec> { Pin30W::new(self, 30) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> Pin31W { + pub fn pin31(&mut self) -> Pin31W<'_, OutputValSpec> { Pin31W::new(self, 31) } } diff --git a/e310x/src/gpio0/pullup.rs b/e310x/src/gpio0/pullup.rs index fc66fab..94845a4 100644 --- a/e310x/src/gpio0/pullup.rs +++ b/e310x/src/gpio0/pullup.rs @@ -295,162 +295,162 @@ impl R { impl W { #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> Pin0W { + pub fn pin0(&mut self) -> Pin0W<'_, PullupSpec> { Pin0W::new(self, 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> Pin1W { + pub fn pin1(&mut self) -> Pin1W<'_, PullupSpec> { Pin1W::new(self, 1) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> Pin2W { + pub fn pin2(&mut self) -> Pin2W<'_, PullupSpec> { Pin2W::new(self, 2) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> Pin3W { + pub fn pin3(&mut self) -> Pin3W<'_, PullupSpec> { Pin3W::new(self, 3) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> Pin4W { + pub fn pin4(&mut self) -> Pin4W<'_, PullupSpec> { Pin4W::new(self, 4) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> Pin5W { + pub fn pin5(&mut self) -> Pin5W<'_, PullupSpec> { Pin5W::new(self, 5) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> Pin6W { + pub fn pin6(&mut self) -> Pin6W<'_, PullupSpec> { Pin6W::new(self, 6) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> Pin7W { + pub fn pin7(&mut self) -> Pin7W<'_, PullupSpec> { Pin7W::new(self, 7) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> Pin8W { + pub fn pin8(&mut self) -> Pin8W<'_, PullupSpec> { Pin8W::new(self, 8) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> Pin9W { + pub fn pin9(&mut self) -> Pin9W<'_, PullupSpec> { Pin9W::new(self, 9) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> Pin10W { + pub fn pin10(&mut self) -> Pin10W<'_, PullupSpec> { Pin10W::new(self, 10) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> Pin11W { + pub fn pin11(&mut self) -> Pin11W<'_, PullupSpec> { Pin11W::new(self, 11) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> Pin12W { + pub fn pin12(&mut self) -> Pin12W<'_, PullupSpec> { Pin12W::new(self, 12) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> Pin13W { + pub fn pin13(&mut self) -> Pin13W<'_, PullupSpec> { Pin13W::new(self, 13) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> Pin14W { + pub fn pin14(&mut self) -> Pin14W<'_, PullupSpec> { Pin14W::new(self, 14) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> Pin15W { + pub fn pin15(&mut self) -> Pin15W<'_, PullupSpec> { Pin15W::new(self, 15) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> Pin16W { + pub fn pin16(&mut self) -> Pin16W<'_, PullupSpec> { Pin16W::new(self, 16) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> Pin17W { + pub fn pin17(&mut self) -> Pin17W<'_, PullupSpec> { Pin17W::new(self, 17) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> Pin18W { + pub fn pin18(&mut self) -> Pin18W<'_, PullupSpec> { Pin18W::new(self, 18) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> Pin19W { + pub fn pin19(&mut self) -> Pin19W<'_, PullupSpec> { Pin19W::new(self, 19) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> Pin20W { + pub fn pin20(&mut self) -> Pin20W<'_, PullupSpec> { Pin20W::new(self, 20) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> Pin21W { + pub fn pin21(&mut self) -> Pin21W<'_, PullupSpec> { Pin21W::new(self, 21) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> Pin22W { + pub fn pin22(&mut self) -> Pin22W<'_, PullupSpec> { Pin22W::new(self, 22) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> Pin23W { + pub fn pin23(&mut self) -> Pin23W<'_, PullupSpec> { Pin23W::new(self, 23) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> Pin24W { + pub fn pin24(&mut self) -> Pin24W<'_, PullupSpec> { Pin24W::new(self, 24) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> Pin25W { + pub fn pin25(&mut self) -> Pin25W<'_, PullupSpec> { Pin25W::new(self, 25) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> Pin26W { + pub fn pin26(&mut self) -> Pin26W<'_, PullupSpec> { Pin26W::new(self, 26) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> Pin27W { + pub fn pin27(&mut self) -> Pin27W<'_, PullupSpec> { Pin27W::new(self, 27) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> Pin28W { + pub fn pin28(&mut self) -> Pin28W<'_, PullupSpec> { Pin28W::new(self, 28) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> Pin29W { + pub fn pin29(&mut self) -> Pin29W<'_, PullupSpec> { Pin29W::new(self, 29) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> Pin30W { + pub fn pin30(&mut self) -> Pin30W<'_, PullupSpec> { Pin30W::new(self, 30) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> Pin31W { + pub fn pin31(&mut self) -> Pin31W<'_, PullupSpec> { Pin31W::new(self, 31) } } diff --git a/e310x/src/gpio0/rise_ie.rs b/e310x/src/gpio0/rise_ie.rs index 89cceed..efc4eef 100644 --- a/e310x/src/gpio0/rise_ie.rs +++ b/e310x/src/gpio0/rise_ie.rs @@ -295,162 +295,162 @@ impl R { impl W { #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> Pin0W { + pub fn pin0(&mut self) -> Pin0W<'_, RiseIeSpec> { Pin0W::new(self, 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> Pin1W { + pub fn pin1(&mut self) -> Pin1W<'_, RiseIeSpec> { Pin1W::new(self, 1) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> Pin2W { + pub fn pin2(&mut self) -> Pin2W<'_, RiseIeSpec> { Pin2W::new(self, 2) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> Pin3W { + pub fn pin3(&mut self) -> Pin3W<'_, RiseIeSpec> { Pin3W::new(self, 3) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> Pin4W { + pub fn pin4(&mut self) -> Pin4W<'_, RiseIeSpec> { Pin4W::new(self, 4) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> Pin5W { + pub fn pin5(&mut self) -> Pin5W<'_, RiseIeSpec> { Pin5W::new(self, 5) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> Pin6W { + pub fn pin6(&mut self) -> Pin6W<'_, RiseIeSpec> { Pin6W::new(self, 6) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> Pin7W { + pub fn pin7(&mut self) -> Pin7W<'_, RiseIeSpec> { Pin7W::new(self, 7) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> Pin8W { + pub fn pin8(&mut self) -> Pin8W<'_, RiseIeSpec> { Pin8W::new(self, 8) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> Pin9W { + pub fn pin9(&mut self) -> Pin9W<'_, RiseIeSpec> { Pin9W::new(self, 9) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> Pin10W { + pub fn pin10(&mut self) -> Pin10W<'_, RiseIeSpec> { Pin10W::new(self, 10) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> Pin11W { + pub fn pin11(&mut self) -> Pin11W<'_, RiseIeSpec> { Pin11W::new(self, 11) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> Pin12W { + pub fn pin12(&mut self) -> Pin12W<'_, RiseIeSpec> { Pin12W::new(self, 12) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> Pin13W { + pub fn pin13(&mut self) -> Pin13W<'_, RiseIeSpec> { Pin13W::new(self, 13) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> Pin14W { + pub fn pin14(&mut self) -> Pin14W<'_, RiseIeSpec> { Pin14W::new(self, 14) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> Pin15W { + pub fn pin15(&mut self) -> Pin15W<'_, RiseIeSpec> { Pin15W::new(self, 15) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> Pin16W { + pub fn pin16(&mut self) -> Pin16W<'_, RiseIeSpec> { Pin16W::new(self, 16) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> Pin17W { + pub fn pin17(&mut self) -> Pin17W<'_, RiseIeSpec> { Pin17W::new(self, 17) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> Pin18W { + pub fn pin18(&mut self) -> Pin18W<'_, RiseIeSpec> { Pin18W::new(self, 18) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> Pin19W { + pub fn pin19(&mut self) -> Pin19W<'_, RiseIeSpec> { Pin19W::new(self, 19) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> Pin20W { + pub fn pin20(&mut self) -> Pin20W<'_, RiseIeSpec> { Pin20W::new(self, 20) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> Pin21W { + pub fn pin21(&mut self) -> Pin21W<'_, RiseIeSpec> { Pin21W::new(self, 21) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> Pin22W { + pub fn pin22(&mut self) -> Pin22W<'_, RiseIeSpec> { Pin22W::new(self, 22) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> Pin23W { + pub fn pin23(&mut self) -> Pin23W<'_, RiseIeSpec> { Pin23W::new(self, 23) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> Pin24W { + pub fn pin24(&mut self) -> Pin24W<'_, RiseIeSpec> { Pin24W::new(self, 24) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> Pin25W { + pub fn pin25(&mut self) -> Pin25W<'_, RiseIeSpec> { Pin25W::new(self, 25) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> Pin26W { + pub fn pin26(&mut self) -> Pin26W<'_, RiseIeSpec> { Pin26W::new(self, 26) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> Pin27W { + pub fn pin27(&mut self) -> Pin27W<'_, RiseIeSpec> { Pin27W::new(self, 27) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> Pin28W { + pub fn pin28(&mut self) -> Pin28W<'_, RiseIeSpec> { Pin28W::new(self, 28) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> Pin29W { + pub fn pin29(&mut self) -> Pin29W<'_, RiseIeSpec> { Pin29W::new(self, 29) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> Pin30W { + pub fn pin30(&mut self) -> Pin30W<'_, RiseIeSpec> { Pin30W::new(self, 30) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> Pin31W { + pub fn pin31(&mut self) -> Pin31W<'_, RiseIeSpec> { Pin31W::new(self, 31) } } diff --git a/e310x/src/gpio0/rise_ip.rs b/e310x/src/gpio0/rise_ip.rs index 9496fac..f97996f 100644 --- a/e310x/src/gpio0/rise_ip.rs +++ b/e310x/src/gpio0/rise_ip.rs @@ -295,162 +295,162 @@ impl R { impl W { #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> Pin0W { + pub fn pin0(&mut self) -> Pin0W<'_, RiseIpSpec> { Pin0W::new(self, 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> Pin1W { + pub fn pin1(&mut self) -> Pin1W<'_, RiseIpSpec> { Pin1W::new(self, 1) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> Pin2W { + pub fn pin2(&mut self) -> Pin2W<'_, RiseIpSpec> { Pin2W::new(self, 2) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> Pin3W { + pub fn pin3(&mut self) -> Pin3W<'_, RiseIpSpec> { Pin3W::new(self, 3) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> Pin4W { + pub fn pin4(&mut self) -> Pin4W<'_, RiseIpSpec> { Pin4W::new(self, 4) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> Pin5W { + pub fn pin5(&mut self) -> Pin5W<'_, RiseIpSpec> { Pin5W::new(self, 5) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> Pin6W { + pub fn pin6(&mut self) -> Pin6W<'_, RiseIpSpec> { Pin6W::new(self, 6) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> Pin7W { + pub fn pin7(&mut self) -> Pin7W<'_, RiseIpSpec> { Pin7W::new(self, 7) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> Pin8W { + pub fn pin8(&mut self) -> Pin8W<'_, RiseIpSpec> { Pin8W::new(self, 8) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> Pin9W { + pub fn pin9(&mut self) -> Pin9W<'_, RiseIpSpec> { Pin9W::new(self, 9) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> Pin10W { + pub fn pin10(&mut self) -> Pin10W<'_, RiseIpSpec> { Pin10W::new(self, 10) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> Pin11W { + pub fn pin11(&mut self) -> Pin11W<'_, RiseIpSpec> { Pin11W::new(self, 11) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> Pin12W { + pub fn pin12(&mut self) -> Pin12W<'_, RiseIpSpec> { Pin12W::new(self, 12) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> Pin13W { + pub fn pin13(&mut self) -> Pin13W<'_, RiseIpSpec> { Pin13W::new(self, 13) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> Pin14W { + pub fn pin14(&mut self) -> Pin14W<'_, RiseIpSpec> { Pin14W::new(self, 14) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> Pin15W { + pub fn pin15(&mut self) -> Pin15W<'_, RiseIpSpec> { Pin15W::new(self, 15) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> Pin16W { + pub fn pin16(&mut self) -> Pin16W<'_, RiseIpSpec> { Pin16W::new(self, 16) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> Pin17W { + pub fn pin17(&mut self) -> Pin17W<'_, RiseIpSpec> { Pin17W::new(self, 17) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> Pin18W { + pub fn pin18(&mut self) -> Pin18W<'_, RiseIpSpec> { Pin18W::new(self, 18) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> Pin19W { + pub fn pin19(&mut self) -> Pin19W<'_, RiseIpSpec> { Pin19W::new(self, 19) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> Pin20W { + pub fn pin20(&mut self) -> Pin20W<'_, RiseIpSpec> { Pin20W::new(self, 20) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> Pin21W { + pub fn pin21(&mut self) -> Pin21W<'_, RiseIpSpec> { Pin21W::new(self, 21) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> Pin22W { + pub fn pin22(&mut self) -> Pin22W<'_, RiseIpSpec> { Pin22W::new(self, 22) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> Pin23W { + pub fn pin23(&mut self) -> Pin23W<'_, RiseIpSpec> { Pin23W::new(self, 23) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> Pin24W { + pub fn pin24(&mut self) -> Pin24W<'_, RiseIpSpec> { Pin24W::new(self, 24) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> Pin25W { + pub fn pin25(&mut self) -> Pin25W<'_, RiseIpSpec> { Pin25W::new(self, 25) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> Pin26W { + pub fn pin26(&mut self) -> Pin26W<'_, RiseIpSpec> { Pin26W::new(self, 26) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> Pin27W { + pub fn pin27(&mut self) -> Pin27W<'_, RiseIpSpec> { Pin27W::new(self, 27) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> Pin28W { + pub fn pin28(&mut self) -> Pin28W<'_, RiseIpSpec> { Pin28W::new(self, 28) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> Pin29W { + pub fn pin29(&mut self) -> Pin29W<'_, RiseIpSpec> { Pin29W::new(self, 29) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> Pin30W { + pub fn pin30(&mut self) -> Pin30W<'_, RiseIpSpec> { Pin30W::new(self, 30) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> Pin31W { + pub fn pin31(&mut self) -> Pin31W<'_, RiseIpSpec> { Pin31W::new(self, 31) } } diff --git a/e310x/src/i2c0/cr.rs b/e310x/src/i2c0/cr.rs index 74da413..26ded01 100644 --- a/e310x/src/i2c0/cr.rs +++ b/e310x/src/i2c0/cr.rs @@ -44,32 +44,32 @@ pub type StaW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Interrupt acknowledge. When set, clears a pending interrupt"] #[inline(always)] - pub fn iack(&mut self) -> IackW { + pub fn iack(&mut self) -> IackW<'_, CrSpec> { IackW::new(self, 0) } #[doc = "Bit 3 - When a receiver, sent ACK (0) or NACK (1)"] #[inline(always)] - pub fn ack(&mut self) -> AckW { + pub fn ack(&mut self) -> AckW<'_, CrSpec> { AckW::new(self, 3) } #[doc = "Bit 4 - Write to slave"] #[inline(always)] - pub fn wr(&mut self) -> WrW { + pub fn wr(&mut self) -> WrW<'_, CrSpec> { WrW::new(self, 4) } #[doc = "Bit 5 - Read from slave"] #[inline(always)] - pub fn rd(&mut self) -> RdW { + pub fn rd(&mut self) -> RdW<'_, CrSpec> { RdW::new(self, 5) } #[doc = "Bit 6 - Generate stop condition"] #[inline(always)] - pub fn sto(&mut self) -> StoW { + pub fn sto(&mut self) -> StoW<'_, CrSpec> { StoW::new(self, 6) } #[doc = "Bit 7 - Generate (repeated) start condition"] #[inline(always)] - pub fn sta(&mut self) -> StaW { + pub fn sta(&mut self) -> StaW<'_, CrSpec> { StaW::new(self, 7) } } diff --git a/e310x/src/i2c0/ctr.rs b/e310x/src/i2c0/ctr.rs index b31adec..450ca08 100644 --- a/e310x/src/i2c0/ctr.rs +++ b/e310x/src/i2c0/ctr.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bit 6 - I2C core interrupt enable bit"] #[inline(always)] - pub fn ien(&mut self) -> IenW { + pub fn ien(&mut self) -> IenW<'_, CtrSpec> { IenW::new(self, 6) } #[doc = "Bit 7 - I2C core enable bit"] #[inline(always)] - pub fn en(&mut self) -> EnW { + pub fn en(&mut self) -> EnW<'_, CtrSpec> { EnW::new(self, 7) } } diff --git a/e310x/src/i2c0/prer_hi.rs b/e310x/src/i2c0/prer_hi.rs index c1624db..dae205b 100644 --- a/e310x/src/i2c0/prer_hi.rs +++ b/e310x/src/i2c0/prer_hi.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:7"] #[inline(always)] - pub fn value(&mut self) -> ValueW { + pub fn value(&mut self) -> ValueW<'_, PrerHiSpec> { ValueW::new(self, 0) } } diff --git a/e310x/src/i2c0/prer_lo.rs b/e310x/src/i2c0/prer_lo.rs index 6b9a169..801d206 100644 --- a/e310x/src/i2c0/prer_lo.rs +++ b/e310x/src/i2c0/prer_lo.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:7"] #[inline(always)] - pub fn value(&mut self) -> ValueW { + pub fn value(&mut self) -> ValueW<'_, PrerLoSpec> { ValueW::new(self, 0) } } diff --git a/e310x/src/i2c0/txr_rxr.rs b/e310x/src/i2c0/txr_rxr.rs index 0cc12c1..d1660fd 100644 --- a/e310x/src/i2c0/txr_rxr.rs +++ b/e310x/src/i2c0/txr_rxr.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:7"] #[inline(always)] - pub fn data(&mut self) -> DataW { + pub fn data(&mut self) -> DataW<'_, TxrRxrSpec> { DataW::new(self, 0) } } diff --git a/e310x/src/interrupt.rs b/e310x/src/interrupt.rs index 1d045f7..3c031d5 100644 --- a/e310x/src/interrupt.rs +++ b/e310x/src/interrupt.rs @@ -168,8 +168,9 @@ pub enum ExternalInterrupt { } #[cfg(feature = "rt")] #[riscv_rt::core_interrupt(CoreInterrupt::MachineExternal)] -fn plic_handler() { - let claim = crate::PLIC::ctx(Hart::H0).claim(); +unsafe fn plic_handler() { + let plic = unsafe { crate::Plic::steal() }; + let claim = plic.ctx(Hart::H0).claim(); if let Some(s) = claim.claim::() { unsafe { _dispatch_external_interrupt(s.number()) } claim.complete(s); diff --git a/e310x/src/lib.rs b/e310x/src/lib.rs index 5f9cebd..e1d87cc 100644 --- a/e310x/src/lib.rs +++ b/e310x/src/lib.rs @@ -1,4 +1,4 @@ -#![doc = "Peripheral access API for FE310 microcontrollers (generated using svd2rust v0.36.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.36.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] +#![doc = "Peripheral access API for FE310 microcontrollers (generated using svd2rust v0.36.1 (698a318 2025-06-08))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.36.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] #![allow(non_camel_case_types)] #![allow(non_snake_case)] #![no_std] @@ -9,8 +9,46 @@ use generic::*; pub mod generic; #[doc = r" Interrupt numbers, priority levels, and HART IDs."] pub mod interrupt; -riscv_peripheral :: clint_codegen ! (base 0x2000000 , freq 32768 , mtimecmps [mtimecmp0 = (crate :: interrupt :: Hart :: H0 , "[0](crate::interrupt::Hart::H0)")] , msips [msip0 = (crate :: interrupt :: Hart :: H0 , "[0](crate::interrupt::Hart::H0)")] ,); -riscv_peripheral :: plic_codegen ! (base 0xC000000 , ctxs [ctx0 = (crate :: interrupt :: Hart :: H0 , "[0](crate::interrupt::Hart::H0)")] ,); +riscv_peripheral :: clint_codegen ! (Clint , base 0x2000000 , mtime_freq 32768 , harts [crate :: interrupt :: Hart :: H0 => 0]); +impl Clint { + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + #[inline] + pub unsafe fn steal() -> Self { + Self::new() + } +} +riscv_peripheral :: plic_codegen ! (Plic , base 0xC000000 , harts [crate :: interrupt :: Hart :: H0 => 0]); +impl Plic { + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + #[inline] + pub unsafe fn steal() -> Self { + Self::new() + } +} #[doc = "Watchdog"] pub type Wdog = crate::Periph; impl core::fmt::Debug for Wdog { @@ -172,6 +210,10 @@ static mut DEVICE_PERIPHERALS: bool = false; #[doc = r" All the peripherals."] #[allow(non_snake_case)] pub struct Peripherals { + #[doc = "CLINT"] + pub clint: Clint, + #[doc = "PLIC"] + pub plic: Plic, #[doc = "WDOG"] pub wdog: Wdog, #[doc = "RTC"] @@ -229,6 +271,8 @@ impl Peripherals { pub unsafe fn steal() -> Self { DEVICE_PERIPHERALS = true; Peripherals { + clint: Clint::steal(), + plic: Plic::steal(), wdog: Wdog::steal(), rtc: Rtc::steal(), aonclk: Aonclk::steal(), diff --git a/e310x/src/pmu/pmucause.rs b/e310x/src/pmu/pmucause.rs index 6e32268..93f58b0 100644 --- a/e310x/src/pmu/pmucause.rs +++ b/e310x/src/pmu/pmucause.rs @@ -163,12 +163,12 @@ impl R { impl W { #[doc = "Bits 0:1"] #[inline(always)] - pub fn wakeupcause(&mut self) -> WakeupcauseW { + pub fn wakeupcause(&mut self) -> WakeupcauseW<'_, PmucauseSpec> { WakeupcauseW::new(self, 0) } #[doc = "Bits 8:9"] #[inline(always)] - pub fn resetcause(&mut self) -> ResetcauseW { + pub fn resetcause(&mut self) -> ResetcauseW<'_, PmucauseSpec> { ResetcauseW::new(self, 8) } } diff --git a/e310x/src/pmu/pmuie.rs b/e310x/src/pmu/pmuie.rs index f2a602b..b6154a5 100644 --- a/e310x/src/pmu/pmuie.rs +++ b/e310x/src/pmu/pmuie.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bit 1"] #[inline(always)] - pub fn rtc(&mut self) -> RtcW { + pub fn rtc(&mut self) -> RtcW<'_, PmuieSpec> { RtcW::new(self, 1) } #[doc = "Bit 2"] #[inline(always)] - pub fn dwakeup(&mut self) -> DwakeupW { + pub fn dwakeup(&mut self) -> DwakeupW<'_, PmuieSpec> { DwakeupW::new(self, 2) } #[doc = "Bit 3"] #[inline(always)] - pub fn awakeup(&mut self) -> AwakeupW { + pub fn awakeup(&mut self) -> AwakeupW<'_, PmuieSpec> { AwakeupW::new(self, 3) } } diff --git a/e310x/src/pmu/pmusleep.rs b/e310x/src/pmu/pmusleep.rs index 2386519..022cfed 100644 --- a/e310x/src/pmu/pmusleep.rs +++ b/e310x/src/pmu/pmusleep.rs @@ -5,7 +5,7 @@ pub type SleepW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0"] #[inline(always)] - pub fn sleep(&mut self) -> SleepW { + pub fn sleep(&mut self) -> SleepW<'_, PmusleepSpec> { SleepW::new(self, 0) } } diff --git a/e310x/src/pmu/pmusleeppm.rs b/e310x/src/pmu/pmusleeppm.rs index ee6f4df..b9e1aee 100644 --- a/e310x/src/pmu/pmusleeppm.rs +++ b/e310x/src/pmu/pmusleeppm.rs @@ -61,32 +61,32 @@ impl R { impl W { #[doc = "Bits 0:3"] #[inline(always)] - pub fn delay(&mut self) -> DelayW { + pub fn delay(&mut self) -> DelayW<'_, PmusleeppmSpec> { DelayW::new(self, 0) } #[doc = "Bit 4"] #[inline(always)] - pub fn pmu_out_0_en(&mut self) -> PmuOut0EnW { + pub fn pmu_out_0_en(&mut self) -> PmuOut0EnW<'_, PmusleeppmSpec> { PmuOut0EnW::new(self, 4) } #[doc = "Bit 5"] #[inline(always)] - pub fn pmu_out_1_en(&mut self) -> PmuOut1EnW { + pub fn pmu_out_1_en(&mut self) -> PmuOut1EnW<'_, PmusleeppmSpec> { PmuOut1EnW::new(self, 5) } #[doc = "Bit 7"] #[inline(always)] - pub fn corerst(&mut self) -> CorerstW { + pub fn corerst(&mut self) -> CorerstW<'_, PmusleeppmSpec> { CorerstW::new(self, 7) } #[doc = "Bit 8"] #[inline(always)] - pub fn hfclkrst(&mut self) -> HfclkrstW { + pub fn hfclkrst(&mut self) -> HfclkrstW<'_, PmusleeppmSpec> { HfclkrstW::new(self, 8) } #[doc = "Bit 9"] #[inline(always)] - pub fn isolate(&mut self) -> IsolateW { + pub fn isolate(&mut self) -> IsolateW<'_, PmusleeppmSpec> { IsolateW::new(self, 9) } } diff --git a/e310x/src/pmu/pmuwakepm.rs b/e310x/src/pmu/pmuwakepm.rs index 2381251..cc03080 100644 --- a/e310x/src/pmu/pmuwakepm.rs +++ b/e310x/src/pmu/pmuwakepm.rs @@ -61,32 +61,32 @@ impl R { impl W { #[doc = "Bits 0:3"] #[inline(always)] - pub fn delay(&mut self) -> DelayW { + pub fn delay(&mut self) -> DelayW<'_, PmuwakepmSpec> { DelayW::new(self, 0) } #[doc = "Bit 4"] #[inline(always)] - pub fn pmu_out_0_en(&mut self) -> PmuOut0EnW { + pub fn pmu_out_0_en(&mut self) -> PmuOut0EnW<'_, PmuwakepmSpec> { PmuOut0EnW::new(self, 4) } #[doc = "Bit 5"] #[inline(always)] - pub fn pmu_out_1_en(&mut self) -> PmuOut1EnW { + pub fn pmu_out_1_en(&mut self) -> PmuOut1EnW<'_, PmuwakepmSpec> { PmuOut1EnW::new(self, 5) } #[doc = "Bit 7"] #[inline(always)] - pub fn corerst(&mut self) -> CorerstW { + pub fn corerst(&mut self) -> CorerstW<'_, PmuwakepmSpec> { CorerstW::new(self, 7) } #[doc = "Bit 8"] #[inline(always)] - pub fn hfclkrst(&mut self) -> HfclkrstW { + pub fn hfclkrst(&mut self) -> HfclkrstW<'_, PmuwakepmSpec> { HfclkrstW::new(self, 8) } #[doc = "Bit 9"] #[inline(always)] - pub fn isolate(&mut self) -> IsolateW { + pub fn isolate(&mut self) -> IsolateW<'_, PmuwakepmSpec> { IsolateW::new(self, 9) } } diff --git a/e310x/src/prci/hfrosccfg.rs b/e310x/src/prci/hfrosccfg.rs index 7bf105b..5387836 100644 --- a/e310x/src/prci/hfrosccfg.rs +++ b/e310x/src/prci/hfrosccfg.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bits 0:5"] #[inline(always)] - pub fn div(&mut self) -> DivW { + pub fn div(&mut self) -> DivW<'_, HfrosccfgSpec> { DivW::new(self, 0) } #[doc = "Bits 16:20"] #[inline(always)] - pub fn trim(&mut self) -> TrimW { + pub fn trim(&mut self) -> TrimW<'_, HfrosccfgSpec> { TrimW::new(self, 16) } #[doc = "Bit 30"] #[inline(always)] - pub fn enable(&mut self) -> EnableW { + pub fn enable(&mut self) -> EnableW<'_, HfrosccfgSpec> { EnableW::new(self, 30) } #[doc = "Bit 31"] #[inline(always)] - pub fn ready(&mut self) -> ReadyW { + pub fn ready(&mut self) -> ReadyW<'_, HfrosccfgSpec> { ReadyW::new(self, 31) } } diff --git a/e310x/src/prci/hfxosccfg.rs b/e310x/src/prci/hfxosccfg.rs index a61d060..bbf6808 100644 --- a/e310x/src/prci/hfxosccfg.rs +++ b/e310x/src/prci/hfxosccfg.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bit 30"] #[inline(always)] - pub fn enable(&mut self) -> EnableW { + pub fn enable(&mut self) -> EnableW<'_, HfxosccfgSpec> { EnableW::new(self, 30) } #[doc = "Bit 31"] #[inline(always)] - pub fn ready(&mut self) -> ReadyW { + pub fn ready(&mut self) -> ReadyW<'_, HfxosccfgSpec> { ReadyW::new(self, 31) } } diff --git a/e310x/src/prci/pllcfg.rs b/e310x/src/prci/pllcfg.rs index 4a1faf6..74d0ab8 100644 --- a/e310x/src/prci/pllcfg.rs +++ b/e310x/src/prci/pllcfg.rs @@ -221,37 +221,37 @@ impl R { impl W { #[doc = "Bits 0:2"] #[inline(always)] - pub fn pllr(&mut self) -> PllrW { + pub fn pllr(&mut self) -> PllrW<'_, PllcfgSpec> { PllrW::new(self, 0) } #[doc = "Bits 4:9"] #[inline(always)] - pub fn pllf(&mut self) -> PllfW { + pub fn pllf(&mut self) -> PllfW<'_, PllcfgSpec> { PllfW::new(self, 4) } #[doc = "Bits 10:11"] #[inline(always)] - pub fn pllq(&mut self) -> PllqW { + pub fn pllq(&mut self) -> PllqW<'_, PllcfgSpec> { PllqW::new(self, 10) } #[doc = "Bit 16"] #[inline(always)] - pub fn sel(&mut self) -> SelW { + pub fn sel(&mut self) -> SelW<'_, PllcfgSpec> { SelW::new(self, 16) } #[doc = "Bit 17"] #[inline(always)] - pub fn refsel(&mut self) -> RefselW { + pub fn refsel(&mut self) -> RefselW<'_, PllcfgSpec> { RefselW::new(self, 17) } #[doc = "Bit 18"] #[inline(always)] - pub fn bypass(&mut self) -> BypassW { + pub fn bypass(&mut self) -> BypassW<'_, PllcfgSpec> { BypassW::new(self, 18) } #[doc = "Bit 31"] #[inline(always)] - pub fn lock(&mut self) -> LockW { + pub fn lock(&mut self) -> LockW<'_, PllcfgSpec> { LockW::new(self, 31) } } diff --git a/e310x/src/prci/plloutdiv.rs b/e310x/src/prci/plloutdiv.rs index 3f0ebbf..d9bc19b 100644 --- a/e310x/src/prci/plloutdiv.rs +++ b/e310x/src/prci/plloutdiv.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:5"] #[inline(always)] - pub fn div(&mut self) -> DivW { + pub fn div(&mut self) -> DivW<'_, PlloutdivSpec> { DivW::new(self, 0) } #[doc = "Bit 8"] #[inline(always)] - pub fn divby1(&mut self) -> Divby1W { + pub fn divby1(&mut self) -> Divby1W<'_, PlloutdivSpec> { Divby1W::new(self, 8) } } diff --git a/e310x/src/pwm0/cfg.rs b/e310x/src/pwm0/cfg.rs index 4a44a20..2ebeee4 100644 --- a/e310x/src/pwm0/cfg.rs +++ b/e310x/src/pwm0/cfg.rs @@ -169,92 +169,92 @@ impl R { impl W { #[doc = "Bits 0:3"] #[inline(always)] - pub fn scale(&mut self) -> ScaleW { + pub fn scale(&mut self) -> ScaleW<'_, CfgSpec> { ScaleW::new(self, 0) } #[doc = "Bit 8"] #[inline(always)] - pub fn sticky(&mut self) -> StickyW { + pub fn sticky(&mut self) -> StickyW<'_, CfgSpec> { StickyW::new(self, 8) } #[doc = "Bit 9"] #[inline(always)] - pub fn zerocmp(&mut self) -> ZerocmpW { + pub fn zerocmp(&mut self) -> ZerocmpW<'_, CfgSpec> { ZerocmpW::new(self, 9) } #[doc = "Bit 10"] #[inline(always)] - pub fn deglitch(&mut self) -> DeglitchW { + pub fn deglitch(&mut self) -> DeglitchW<'_, CfgSpec> { DeglitchW::new(self, 10) } #[doc = "Bit 12"] #[inline(always)] - pub fn enalways(&mut self) -> EnalwaysW { + pub fn enalways(&mut self) -> EnalwaysW<'_, CfgSpec> { EnalwaysW::new(self, 12) } #[doc = "Bit 13"] #[inline(always)] - pub fn enoneshot(&mut self) -> EnoneshotW { + pub fn enoneshot(&mut self) -> EnoneshotW<'_, CfgSpec> { EnoneshotW::new(self, 13) } #[doc = "Bit 16"] #[inline(always)] - pub fn cmp0center(&mut self) -> Cmp0centerW { + pub fn cmp0center(&mut self) -> Cmp0centerW<'_, CfgSpec> { Cmp0centerW::new(self, 16) } #[doc = "Bit 17"] #[inline(always)] - pub fn cmp1center(&mut self) -> Cmp1centerW { + pub fn cmp1center(&mut self) -> Cmp1centerW<'_, CfgSpec> { Cmp1centerW::new(self, 17) } #[doc = "Bit 18"] #[inline(always)] - pub fn cmp2center(&mut self) -> Cmp2centerW { + pub fn cmp2center(&mut self) -> Cmp2centerW<'_, CfgSpec> { Cmp2centerW::new(self, 18) } #[doc = "Bit 19"] #[inline(always)] - pub fn cmp3center(&mut self) -> Cmp3centerW { + pub fn cmp3center(&mut self) -> Cmp3centerW<'_, CfgSpec> { Cmp3centerW::new(self, 19) } #[doc = "Bit 24"] #[inline(always)] - pub fn cmp0gang(&mut self) -> Cmp0gangW { + pub fn cmp0gang(&mut self) -> Cmp0gangW<'_, CfgSpec> { Cmp0gangW::new(self, 24) } #[doc = "Bit 25"] #[inline(always)] - pub fn cmp1gang(&mut self) -> Cmp1gangW { + pub fn cmp1gang(&mut self) -> Cmp1gangW<'_, CfgSpec> { Cmp1gangW::new(self, 25) } #[doc = "Bits 26:36"] #[inline(always)] - pub fn cmp2gang(&mut self) -> Cmp2gangW { + pub fn cmp2gang(&mut self) -> Cmp2gangW<'_, CfgSpec> { Cmp2gangW::new(self, 26) } #[doc = "Bit 27"] #[inline(always)] - pub fn cmp3gang(&mut self) -> Cmp3gangW { + pub fn cmp3gang(&mut self) -> Cmp3gangW<'_, CfgSpec> { Cmp3gangW::new(self, 27) } #[doc = "Bit 28"] #[inline(always)] - pub fn cmp0ip(&mut self) -> Cmp0ipW { + pub fn cmp0ip(&mut self) -> Cmp0ipW<'_, CfgSpec> { Cmp0ipW::new(self, 28) } #[doc = "Bit 29"] #[inline(always)] - pub fn cmp1ip(&mut self) -> Cmp1ipW { + pub fn cmp1ip(&mut self) -> Cmp1ipW<'_, CfgSpec> { Cmp1ipW::new(self, 29) } #[doc = "Bit 30"] #[inline(always)] - pub fn cmp2ip(&mut self) -> Cmp2ipW { + pub fn cmp2ip(&mut self) -> Cmp2ipW<'_, CfgSpec> { Cmp2ipW::new(self, 30) } #[doc = "Bit 31"] #[inline(always)] - pub fn cmp3ip(&mut self) -> Cmp3ipW { + pub fn cmp3ip(&mut self) -> Cmp3ipW<'_, CfgSpec> { Cmp3ipW::new(self, 31) } } diff --git a/e310x/src/pwm0/cmp0.rs b/e310x/src/pwm0/cmp0.rs index 83e14ca..05a8359 100644 --- a/e310x/src/pwm0/cmp0.rs +++ b/e310x/src/pwm0/cmp0.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15"] #[inline(always)] - pub fn value(&mut self) -> ValueW { + pub fn value(&mut self) -> ValueW<'_, Cmp0Spec> { ValueW::new(self, 0) } } diff --git a/e310x/src/pwm0/cmp1.rs b/e310x/src/pwm0/cmp1.rs index 6e0d00d..5ac5996 100644 --- a/e310x/src/pwm0/cmp1.rs +++ b/e310x/src/pwm0/cmp1.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15"] #[inline(always)] - pub fn value(&mut self) -> ValueW { + pub fn value(&mut self) -> ValueW<'_, Cmp1Spec> { ValueW::new(self, 0) } } diff --git a/e310x/src/pwm0/cmp2.rs b/e310x/src/pwm0/cmp2.rs index c5d3b4f..9b3d156 100644 --- a/e310x/src/pwm0/cmp2.rs +++ b/e310x/src/pwm0/cmp2.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15"] #[inline(always)] - pub fn value(&mut self) -> ValueW { + pub fn value(&mut self) -> ValueW<'_, Cmp2Spec> { ValueW::new(self, 0) } } diff --git a/e310x/src/pwm0/cmp3.rs b/e310x/src/pwm0/cmp3.rs index 8e3affe..0f3dc63 100644 --- a/e310x/src/pwm0/cmp3.rs +++ b/e310x/src/pwm0/cmp3.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15"] #[inline(always)] - pub fn value(&mut self) -> ValueW { + pub fn value(&mut self) -> ValueW<'_, Cmp3Spec> { ValueW::new(self, 0) } } diff --git a/e310x/src/qspi0/csmode.rs b/e310x/src/qspi0/csmode.rs index cb36e99..237c7c3 100644 --- a/e310x/src/qspi0/csmode.rs +++ b/e310x/src/qspi0/csmode.rs @@ -85,7 +85,7 @@ impl R { impl W { #[doc = "Bits 0:1 - Chip select mode"] #[inline(always)] - pub fn mode(&mut self) -> ModeW { + pub fn mode(&mut self) -> ModeW<'_, CsmodeSpec> { ModeW::new(self, 0) } } diff --git a/e310x/src/qspi0/delay0.rs b/e310x/src/qspi0/delay0.rs index 7c7ac6b..ef5771a 100644 --- a/e310x/src/qspi0/delay0.rs +++ b/e310x/src/qspi0/delay0.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - CS to SCK Delay"] #[inline(always)] - pub fn cssck(&mut self) -> CssckW { + pub fn cssck(&mut self) -> CssckW<'_, Delay0Spec> { CssckW::new(self, 0) } #[doc = "Bits 16:23 - SCK to CS Delay"] #[inline(always)] - pub fn sckcs(&mut self) -> SckcsW { + pub fn sckcs(&mut self) -> SckcsW<'_, Delay0Spec> { SckcsW::new(self, 16) } } diff --git a/e310x/src/qspi0/delay1.rs b/e310x/src/qspi0/delay1.rs index c2c8fde..11f8ca8 100644 --- a/e310x/src/qspi0/delay1.rs +++ b/e310x/src/qspi0/delay1.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Minimum CS inactive time"] #[inline(always)] - pub fn intercs(&mut self) -> IntercsW { + pub fn intercs(&mut self) -> IntercsW<'_, Delay1Spec> { IntercsW::new(self, 0) } #[doc = "Bits 16:23 - Maximum interframe delay"] #[inline(always)] - pub fn interxfr(&mut self) -> InterxfrW { + pub fn interxfr(&mut self) -> InterxfrW<'_, Delay1Spec> { InterxfrW::new(self, 16) } } diff --git a/e310x/src/qspi0/fctrl.rs b/e310x/src/qspi0/fctrl.rs index af7c412..a9ba4ea 100644 --- a/e310x/src/qspi0/fctrl.rs +++ b/e310x/src/qspi0/fctrl.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bit 0 - SPI Flash Mode Select"] #[inline(always)] - pub fn en(&mut self) -> EnW { + pub fn en(&mut self) -> EnW<'_, FctrlSpec> { EnW::new(self, 0) } } diff --git a/e310x/src/qspi0/ffmt.rs b/e310x/src/qspi0/ffmt.rs index c3a895c..2e650bc 100644 --- a/e310x/src/qspi0/ffmt.rs +++ b/e310x/src/qspi0/ffmt.rs @@ -286,42 +286,42 @@ impl R { impl W { #[doc = "Bit 0 - Enable sending of command"] #[inline(always)] - pub fn cmd_en(&mut self) -> CmdEnW { + pub fn cmd_en(&mut self) -> CmdEnW<'_, FfmtSpec> { CmdEnW::new(self, 0) } #[doc = "Bits 1:3 - Number of address bytes (0 to 4)"] #[inline(always)] - pub fn addr_len(&mut self) -> AddrLenW { + pub fn addr_len(&mut self) -> AddrLenW<'_, FfmtSpec> { AddrLenW::new(self, 1) } #[doc = "Bits 4:7 - Number of dummy cycles"] #[inline(always)] - pub fn pad_cnt(&mut self) -> PadCntW { + pub fn pad_cnt(&mut self) -> PadCntW<'_, FfmtSpec> { PadCntW::new(self, 4) } #[doc = "Bits 8:9 - Protocol for transmitting command"] #[inline(always)] - pub fn cmd_proto(&mut self) -> CmdProtoW { + pub fn cmd_proto(&mut self) -> CmdProtoW<'_, FfmtSpec> { CmdProtoW::new(self, 8) } #[doc = "Bits 10:11 - Protocol for transmitting address and padding"] #[inline(always)] - pub fn addr_proto(&mut self) -> AddrProtoW { + pub fn addr_proto(&mut self) -> AddrProtoW<'_, FfmtSpec> { AddrProtoW::new(self, 10) } #[doc = "Bits 12:13 - Protocol for receiving data bytes"] #[inline(always)] - pub fn data_proto(&mut self) -> DataProtoW { + pub fn data_proto(&mut self) -> DataProtoW<'_, FfmtSpec> { DataProtoW::new(self, 12) } #[doc = "Bits 16:23 - Value of command byte"] #[inline(always)] - pub fn cmd_code(&mut self) -> CmdCodeW { + pub fn cmd_code(&mut self) -> CmdCodeW<'_, FfmtSpec> { CmdCodeW::new(self, 16) } #[doc = "Bits 24:31 - First 8 bits to transmit during dummy cycles"] #[inline(always)] - pub fn pad_code(&mut self) -> PadCodeW { + pub fn pad_code(&mut self) -> PadCodeW<'_, FfmtSpec> { PadCodeW::new(self, 24) } } diff --git a/e310x/src/qspi0/fmt.rs b/e310x/src/qspi0/fmt.rs index 3f13c8a..73c36e0 100644 --- a/e310x/src/qspi0/fmt.rs +++ b/e310x/src/qspi0/fmt.rs @@ -210,22 +210,22 @@ impl R { impl W { #[doc = "Bits 0:1 - SPI protocol"] #[inline(always)] - pub fn proto(&mut self) -> ProtoW { + pub fn proto(&mut self) -> ProtoW<'_, FmtSpec> { ProtoW::new(self, 0) } #[doc = "Bit 2 - SPI endianness"] #[inline(always)] - pub fn endian(&mut self) -> EndianW { + pub fn endian(&mut self) -> EndianW<'_, FmtSpec> { EndianW::new(self, 2) } #[doc = "Bit 3 - SPI I/O direction"] #[inline(always)] - pub fn dir(&mut self) -> DirW { + pub fn dir(&mut self) -> DirW<'_, FmtSpec> { DirW::new(self, 3) } #[doc = "Bits 16:19 - Number of bits per frame"] #[inline(always)] - pub fn len(&mut self) -> LenW { + pub fn len(&mut self) -> LenW<'_, FmtSpec> { LenW::new(self, 16) } } diff --git a/e310x/src/qspi0/ie.rs b/e310x/src/qspi0/ie.rs index 34c9a6f..b1c8929 100644 --- a/e310x/src/qspi0/ie.rs +++ b/e310x/src/qspi0/ie.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bit 0 - Transmit watermark enable"] #[inline(always)] - pub fn txwm(&mut self) -> TxwmW { + pub fn txwm(&mut self) -> TxwmW<'_, IeSpec> { TxwmW::new(self, 0) } #[doc = "Bit 1 - Receive watermark enable"] #[inline(always)] - pub fn rxwm(&mut self) -> RxwmW { + pub fn rxwm(&mut self) -> RxwmW<'_, IeSpec> { RxwmW::new(self, 1) } } diff --git a/e310x/src/qspi0/ip.rs b/e310x/src/qspi0/ip.rs index d4601c2..5e9fdba 100644 --- a/e310x/src/qspi0/ip.rs +++ b/e310x/src/qspi0/ip.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bit 0 - Transmit watermark enable"] #[inline(always)] - pub fn txwm(&mut self) -> TxwmW { + pub fn txwm(&mut self) -> TxwmW<'_, IpSpec> { TxwmW::new(self, 0) } #[doc = "Bit 1 - Receive watermark enable"] #[inline(always)] - pub fn rxwm(&mut self) -> RxwmW { + pub fn rxwm(&mut self) -> RxwmW<'_, IpSpec> { RxwmW::new(self, 1) } } diff --git a/e310x/src/qspi0/rxdata.rs b/e310x/src/qspi0/rxdata.rs index c64af37..9d03666 100644 --- a/e310x/src/qspi0/rxdata.rs +++ b/e310x/src/qspi0/rxdata.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Received data"] #[inline(always)] - pub fn data(&mut self) -> DataW { + pub fn data(&mut self) -> DataW<'_, RxdataSpec> { DataW::new(self, 0) } #[doc = "Bit 31 - FIFO empty flag"] #[inline(always)] - pub fn empty(&mut self) -> EmptyW { + pub fn empty(&mut self) -> EmptyW<'_, RxdataSpec> { EmptyW::new(self, 31) } } diff --git a/e310x/src/qspi0/rxmark.rs b/e310x/src/qspi0/rxmark.rs index 03daa53..6a7cc87 100644 --- a/e310x/src/qspi0/rxmark.rs +++ b/e310x/src/qspi0/rxmark.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:2 - Receive watermark"] #[inline(always)] - pub fn rxmark(&mut self) -> RxmarkW { + pub fn rxmark(&mut self) -> RxmarkW<'_, RxmarkSpec> { RxmarkW::new(self, 0) } } diff --git a/e310x/src/qspi0/sckdiv.rs b/e310x/src/qspi0/sckdiv.rs index 3e0ce11..3c3fd5b 100644 --- a/e310x/src/qspi0/sckdiv.rs +++ b/e310x/src/qspi0/sckdiv.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:11 - Divisor for serial clock"] #[inline(always)] - pub fn div(&mut self) -> DivW { + pub fn div(&mut self) -> DivW<'_, SckdivSpec> { DivW::new(self, 0) } } diff --git a/e310x/src/qspi0/sckmode.rs b/e310x/src/qspi0/sckmode.rs index be695ae..1baae0e 100644 --- a/e310x/src/qspi0/sckmode.rs +++ b/e310x/src/qspi0/sckmode.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bit 0 - Serial clock phase"] #[inline(always)] - pub fn pha(&mut self) -> PhaW { + pub fn pha(&mut self) -> PhaW<'_, SckmodeSpec> { PhaW::new(self, 0) } #[doc = "Bit 1 - Serial clock polarity"] #[inline(always)] - pub fn pol(&mut self) -> PolW { + pub fn pol(&mut self) -> PolW<'_, SckmodeSpec> { PolW::new(self, 1) } } diff --git a/e310x/src/qspi0/txdata.rs b/e310x/src/qspi0/txdata.rs index 18995d2..623246a 100644 --- a/e310x/src/qspi0/txdata.rs +++ b/e310x/src/qspi0/txdata.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Transmit data"] #[inline(always)] - pub fn data(&mut self) -> DataW { + pub fn data(&mut self) -> DataW<'_, TxdataSpec> { DataW::new(self, 0) } #[doc = "Bit 31 - FIFO full flag"] #[inline(always)] - pub fn full(&mut self) -> FullW { + pub fn full(&mut self) -> FullW<'_, TxdataSpec> { FullW::new(self, 31) } } diff --git a/e310x/src/qspi0/txmark.rs b/e310x/src/qspi0/txmark.rs index 40c7038..e667dc3 100644 --- a/e310x/src/qspi0/txmark.rs +++ b/e310x/src/qspi0/txmark.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:2 - Transmit watermark"] #[inline(always)] - pub fn txmark(&mut self) -> TxmarkW { + pub fn txmark(&mut self) -> TxmarkW<'_, TxmarkSpec> { TxmarkW::new(self, 0) } } diff --git a/e310x/src/rtc/rtccfg.rs b/e310x/src/rtc/rtccfg.rs index 2cddfbb..15a0fef 100644 --- a/e310x/src/rtc/rtccfg.rs +++ b/e310x/src/rtc/rtccfg.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bits 0:3"] #[inline(always)] - pub fn scale(&mut self) -> ScaleW { + pub fn scale(&mut self) -> ScaleW<'_, RtccfgSpec> { ScaleW::new(self, 0) } #[doc = "Bit 12"] #[inline(always)] - pub fn enalways(&mut self) -> EnalwaysW { + pub fn enalways(&mut self) -> EnalwaysW<'_, RtccfgSpec> { EnalwaysW::new(self, 12) } #[doc = "Bit 28"] #[inline(always)] - pub fn cmpip(&mut self) -> CmpipW { + pub fn cmpip(&mut self) -> CmpipW<'_, RtccfgSpec> { CmpipW::new(self, 28) } } diff --git a/e310x/src/rtc/rtchi.rs b/e310x/src/rtc/rtchi.rs index 8e11d56..72e447b 100644 --- a/e310x/src/rtc/rtchi.rs +++ b/e310x/src/rtc/rtchi.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15"] #[inline(always)] - pub fn value(&mut self) -> ValueW { + pub fn value(&mut self) -> ValueW<'_, RtchiSpec> { ValueW::new(self, 0) } } diff --git a/e310x/src/uart0/div.rs b/e310x/src/uart0/div.rs index c150597..0ac9197 100644 --- a/e310x/src/uart0/div.rs +++ b/e310x/src/uart0/div.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15"] #[inline(always)] - pub fn value(&mut self) -> ValueW { + pub fn value(&mut self) -> ValueW<'_, DivSpec> { ValueW::new(self, 0) } } diff --git a/e310x/src/uart0/ie.rs b/e310x/src/uart0/ie.rs index 79c2002..3602bb7 100644 --- a/e310x/src/uart0/ie.rs +++ b/e310x/src/uart0/ie.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bit 0"] #[inline(always)] - pub fn txwm(&mut self) -> TxwmW { + pub fn txwm(&mut self) -> TxwmW<'_, IeSpec> { TxwmW::new(self, 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn rxwm(&mut self) -> RxwmW { + pub fn rxwm(&mut self) -> RxwmW<'_, IeSpec> { RxwmW::new(self, 1) } } diff --git a/e310x/src/uart0/ip.rs b/e310x/src/uart0/ip.rs index 9cd508a..b396981 100644 --- a/e310x/src/uart0/ip.rs +++ b/e310x/src/uart0/ip.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bit 0"] #[inline(always)] - pub fn txwm(&mut self) -> TxwmW { + pub fn txwm(&mut self) -> TxwmW<'_, IpSpec> { TxwmW::new(self, 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn rxwm(&mut self) -> RxwmW { + pub fn rxwm(&mut self) -> RxwmW<'_, IpSpec> { RxwmW::new(self, 1) } } diff --git a/e310x/src/uart0/rxctrl.rs b/e310x/src/uart0/rxctrl.rs index 59d98fc..829166f 100644 --- a/e310x/src/uart0/rxctrl.rs +++ b/e310x/src/uart0/rxctrl.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bit 0"] #[inline(always)] - pub fn enable(&mut self) -> EnableW { + pub fn enable(&mut self) -> EnableW<'_, RxctrlSpec> { EnableW::new(self, 0) } #[doc = "Bits 16:18"] #[inline(always)] - pub fn counter(&mut self) -> CounterW { + pub fn counter(&mut self) -> CounterW<'_, RxctrlSpec> { CounterW::new(self, 16) } } diff --git a/e310x/src/uart0/rxdata.rs b/e310x/src/uart0/rxdata.rs index 033b829..07fdef0 100644 --- a/e310x/src/uart0/rxdata.rs +++ b/e310x/src/uart0/rxdata.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7"] #[inline(always)] - pub fn data(&mut self) -> DataW { + pub fn data(&mut self) -> DataW<'_, RxdataSpec> { DataW::new(self, 0) } #[doc = "Bit 31"] #[inline(always)] - pub fn empty(&mut self) -> EmptyW { + pub fn empty(&mut self) -> EmptyW<'_, RxdataSpec> { EmptyW::new(self, 31) } } diff --git a/e310x/src/uart0/txctrl.rs b/e310x/src/uart0/txctrl.rs index 7b75ecd..49da375 100644 --- a/e310x/src/uart0/txctrl.rs +++ b/e310x/src/uart0/txctrl.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bit 0"] #[inline(always)] - pub fn enable(&mut self) -> EnableW { + pub fn enable(&mut self) -> EnableW<'_, TxctrlSpec> { EnableW::new(self, 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn nstop(&mut self) -> NstopW { + pub fn nstop(&mut self) -> NstopW<'_, TxctrlSpec> { NstopW::new(self, 1) } #[doc = "Bits 16:18"] #[inline(always)] - pub fn counter(&mut self) -> CounterW { + pub fn counter(&mut self) -> CounterW<'_, TxctrlSpec> { CounterW::new(self, 16) } } diff --git a/e310x/src/uart0/txdata.rs b/e310x/src/uart0/txdata.rs index 3e3048f..365d74e 100644 --- a/e310x/src/uart0/txdata.rs +++ b/e310x/src/uart0/txdata.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7"] #[inline(always)] - pub fn data(&mut self) -> DataW { + pub fn data(&mut self) -> DataW<'_, TxdataSpec> { DataW::new(self, 0) } #[doc = "Bit 31"] #[inline(always)] - pub fn full(&mut self) -> FullW { + pub fn full(&mut self) -> FullW<'_, TxdataSpec> { FullW::new(self, 31) } } diff --git a/e310x/src/wdog/wdogcfg.rs b/e310x/src/wdog/wdogcfg.rs index d28c172..dc08aed 100644 --- a/e310x/src/wdog/wdogcfg.rs +++ b/e310x/src/wdog/wdogcfg.rs @@ -61,32 +61,32 @@ impl R { impl W { #[doc = "Bits 0:3"] #[inline(always)] - pub fn scale(&mut self) -> ScaleW { + pub fn scale(&mut self) -> ScaleW<'_, WdogcfgSpec> { ScaleW::new(self, 0) } #[doc = "Bit 8"] #[inline(always)] - pub fn rsten(&mut self) -> RstenW { + pub fn rsten(&mut self) -> RstenW<'_, WdogcfgSpec> { RstenW::new(self, 8) } #[doc = "Bit 9"] #[inline(always)] - pub fn zerocmp(&mut self) -> ZerocmpW { + pub fn zerocmp(&mut self) -> ZerocmpW<'_, WdogcfgSpec> { ZerocmpW::new(self, 9) } #[doc = "Bit 12"] #[inline(always)] - pub fn enalways(&mut self) -> EnalwaysW { + pub fn enalways(&mut self) -> EnalwaysW<'_, WdogcfgSpec> { EnalwaysW::new(self, 12) } #[doc = "Bit 13"] #[inline(always)] - pub fn encoreawake(&mut self) -> EncoreawakeW { + pub fn encoreawake(&mut self) -> EncoreawakeW<'_, WdogcfgSpec> { EncoreawakeW::new(self, 13) } #[doc = "Bit 28"] #[inline(always)] - pub fn cmpip(&mut self) -> CmpipW { + pub fn cmpip(&mut self) -> CmpipW<'_, WdogcfgSpec> { CmpipW::new(self, 28) } } diff --git a/e310x/src/wdog/wdogcmp.rs b/e310x/src/wdog/wdogcmp.rs index 7f12051..f0f7585 100644 --- a/e310x/src/wdog/wdogcmp.rs +++ b/e310x/src/wdog/wdogcmp.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15"] #[inline(always)] - pub fn value(&mut self) -> ValueW { + pub fn value(&mut self) -> ValueW<'_, WdogcmpSpec> { ValueW::new(self, 0) } } diff --git a/hifive1-examples/Cargo.toml b/hifive1-examples/Cargo.toml index a1df93d..e3bcaa5 100644 --- a/hifive1-examples/Cargo.toml +++ b/hifive1-examples/Cargo.toml @@ -15,12 +15,11 @@ rust-version = "1.72" [dependencies] critical-section = { version = "1.2.0" } hifive1 = { path = "../hifive1", version = "0.13.0", features = ["board-hifive1-revb"] } # Change to your board -riscv = { version = "0.13.0" } -riscv-rt = { version = "0.14.0", features = ["single-hart"] } +riscv = { version = "0.14.0" } +riscv-rt = { version = "0.15.0", features = ["single-hart"] } panic-halt = "1.0.0" semihosting = { version = "0.1", features = ["stdio", "panic-handler"] } -# max3010x = "0.2.0" # TODO uncomment when the driver is published -max3010x = { git = "https://github.com/eldruin/max3010x-rs.git" } +max3010x = "0.2.0" mfrc522 = "0.8.0" [features] diff --git a/hifive1-examples/examples/button_poll.rs b/hifive1-examples/examples/button_poll.rs index 80698e5..08163dd 100644 --- a/hifive1-examples/examples/button_poll.rs +++ b/hifive1-examples/examples/button_poll.rs @@ -1,4 +1,4 @@ -//! Example of polling a button and turning on a LED when the button is pressed. +//! Example of polling a button and turning on an LED when the button is pressed. //! //! # Hardware //! @@ -10,14 +10,15 @@ use hifive1::{ clock, - hal::{e310x::CLINT, prelude::*, DeviceResources}, - pin, sprintln, Led, + hal::{prelude::*, DeviceResources}, + pin, sprintln, stdout, Led, }; extern crate panic_halt; #[riscv_rt::entry] fn main() -> ! { let dr = DeviceResources::take().unwrap(); + let cp = dr.core_peripherals; let p = dr.peripherals; let pins = dr.pins; @@ -25,7 +26,7 @@ fn main() -> ! { let clocks = clock::configure(p.PRCI, p.AONCLK, 320.mhz().into()); // Configure UART for stdout - hifive1::stdout::configure( + stdout::configure( p.UART0, pin!(pins, uart0_tx), pin!(pins, uart0_rx), @@ -40,8 +41,8 @@ fn main() -> ! { let pin = pin!(pins, led_blue); let mut led = pin.into_inverted_output(); - // Get the sleep struct from CLINT - let mut sleep = CLINT::delay(); + // Get the MTIMER peripheral from CLINT + let mut mtimer = cp.clint.mtimer(); const STEP: u32 = 1000; // 1s loop { @@ -53,6 +54,6 @@ fn main() -> ! { led.off(); } sprintln!("LED is on: {}", led.is_on()); - sleep.delay_ms(STEP); + mtimer.delay_ms(STEP); } } diff --git a/hifive1-examples/examples/hello_world.rs b/hifive1-examples/examples/hello_world.rs index 0ec23a6..7f019e1 100644 --- a/hifive1-examples/examples/hello_world.rs +++ b/hifive1-examples/examples/hello_world.rs @@ -1,15 +1,13 @@ -//! Prints "hello world!" to the host console. -//! -//! If "semihosting" feature is enabled, the message is printed using semihosting. -//! Otherwise, the message is printed using the UART0 peripheral. +//! Prints "hello world!" to the host console using the UART0 peripheral. #![no_std] #![no_main] extern crate panic_halt; use hifive1::{ + clock, hal::{prelude::*, DeviceResources}, - pin, sprintln as println, + pin, sprintln, stdout, }; #[riscv_rt::entry] @@ -19,10 +17,10 @@ fn main() -> ! { let pins = dr.pins; // Configure clocks - let clocks = hifive1::clock::configure(p.PRCI, p.AONCLK, 320.mhz().into()); + let clocks = clock::configure(p.PRCI, p.AONCLK, 320.mhz().into()); // Configure UART for stdout - hifive1::stdout::configure( + stdout::configure( p.UART0, pin!(pins, uart0_tx), pin!(pins, uart0_rx), @@ -30,7 +28,7 @@ fn main() -> ! { clocks, ); - println!("Hello, world!"); + sprintln!("Hello, world!"); loop { riscv::asm::wfi(); } diff --git a/hifive1-examples/examples/i2c_max3010x.rs b/hifive1-examples/examples/i2c_max3010x.rs index efbf7db..cf51ff5 100644 --- a/hifive1-examples/examples/i2c_max3010x.rs +++ b/hifive1-examples/examples/i2c_max3010x.rs @@ -7,7 +7,6 @@ use hifive1::{ clock, hal::{ - e310x::CLINT, i2c::{I2c, Speed}, prelude::*, DeviceResources, @@ -20,6 +19,7 @@ extern crate panic_halt; #[riscv_rt::entry] fn main() -> ! { let dr = DeviceResources::take().unwrap(); + let cp = dr.core_peripherals; let p = dr.peripherals; let pins = dr.pins; @@ -50,12 +50,12 @@ fn main() -> ! { let mut data = [0; 3]; - // Get the sleep struct from CLINT - let mut sleep = CLINT::delay(); + // Get the MTIMER peripheral from CLINT + let mut mtimer = cp.clint.mtimer(); const STEP: u32 = 1000; // 1s loop { let samples_read = sensor.read_fifo(&mut data).unwrap(); sprintln!("Samples read: {}", samples_read); - sleep.delay_ms(STEP); + mtimer.delay_ms(STEP); } } diff --git a/hifive1-examples/examples/led_blink.rs b/hifive1-examples/examples/led_blink.rs index bfe607e..682a27a 100644 --- a/hifive1-examples/examples/led_blink.rs +++ b/hifive1-examples/examples/led_blink.rs @@ -1,19 +1,20 @@ -//! Basic blinking LEDs example using mtime/mtimecmp registers for "sleep" in a loop. -//! Blinks each led once and goes to the next one. +//! Basic blinking LED example using mtime/mtimecmp registers for "sleep" in a loop. +//! Blinks the blue LED of RED-V board. #![no_std] #![no_main] use hifive1::{ clock, - hal::{e310x::CLINT, prelude::*, DeviceResources}, - pin, sprintln, Led, + hal::{prelude::*, DeviceResources}, + pin, sprintln, stdout, Led, }; extern crate panic_halt; #[riscv_rt::entry] fn main() -> ! { let dr = DeviceResources::take().unwrap(); + let cp = dr.core_peripherals; let p = dr.peripherals; let pins = dr.pins; @@ -21,7 +22,7 @@ fn main() -> ! { let clocks = clock::configure(p.PRCI, p.AONCLK, 320.mhz().into()); // Configure UART for stdout - hifive1::stdout::configure( + stdout::configure( p.UART0, pin!(pins, uart0_tx), pin!(pins, uart0_rx), @@ -33,13 +34,13 @@ fn main() -> ! { let pin = pin!(pins, led_blue); let mut led = pin.into_inverted_output(); - // Get the sleep struct from CLINT - let mut sleep = CLINT::delay(); + // Get the MTIMER peripheral from CLINT + let mut mtimer = cp.clint.mtimer(); const STEP: u32 = 1000; // 1s loop { Led::toggle(&mut led); sprintln!("LED toggled. New state: {}", led.is_on()); - sleep.delay_ms(STEP); + mtimer.delay_ms(STEP); } } diff --git a/hifive1-examples/examples/led_pwm.rs b/hifive1-examples/examples/led_pwm.rs index 3392e75..1794f87 100644 --- a/hifive1-examples/examples/led_pwm.rs +++ b/hifive1-examples/examples/led_pwm.rs @@ -9,14 +9,15 @@ use hifive1::{ clock, - hal::{e310x::CLINT, prelude::*, DeviceResources}, - pin, sprintln, + hal::{prelude::*, DeviceResources}, + pin, sprintln, stdout, }; extern crate panic_halt; #[riscv_rt::entry] fn main() -> ! { let dr = DeviceResources::take().unwrap(); + let cp = dr.core_peripherals; let p = dr.peripherals; let pins = dr.pins; @@ -24,7 +25,7 @@ fn main() -> ! { let clocks = clock::configure(p.PRCI, p.AONCLK, 320.mhz().into()); // Configure UART for stdout - hifive1::stdout::configure( + stdout::configure( p.UART0, pin!(pins, uart0_tx), pin!(pins, uart0_rx), @@ -40,8 +41,8 @@ fn main() -> ! { let mut channel = pwm0.channel(pin); - // Get the sleep struct from CLINT - let mut sleep = CLINT::delay(); + // Get the MTIMER peripheral from CLINT + let mut mtimer = cp.clint.mtimer(); const STEP: u32 = 1000; // 1s const DUTY_DELTA: u8 = 32; @@ -52,6 +53,6 @@ fn main() -> ! { channel.set_duty_cycle(duty as u16).unwrap(); duty = duty.wrapping_add(DUTY_DELTA); - sleep.delay_ms(STEP); + mtimer.delay_ms(STEP); } } diff --git a/hifive1-examples/examples/rgb_blink.rs b/hifive1-examples/examples/rgb_blink.rs index dcea2e7..2055f07 100644 --- a/hifive1-examples/examples/rgb_blink.rs +++ b/hifive1-examples/examples/rgb_blink.rs @@ -6,14 +6,15 @@ use hifive1::{ clock, - hal::{e310x::CLINT, prelude::*, DeviceResources}, - pin, pins, sprintln, Led, + hal::{prelude::*, DeviceResources}, + pin, pins, sprintln, stdout, Led, }; extern crate panic_halt; #[riscv_rt::entry] fn main() -> ! { let dr = DeviceResources::take().unwrap(); + let cp = dr.core_peripherals; let p = dr.peripherals; let pins = dr.pins; @@ -21,7 +22,7 @@ fn main() -> ! { let clocks = clock::configure(p.PRCI, p.AONCLK, 320.mhz().into()); // Configure UART for stdout - hifive1::stdout::configure( + stdout::configure( p.UART0, pin!(pins, uart0_tx), pin!(pins, uart0_rx), @@ -35,15 +36,15 @@ fn main() -> ! { // get leds as the Led trait in an array so we can index them let mut ileds: [&mut dyn Led; 3] = [&mut tleds.0, &mut tleds.1, &mut tleds.2]; - // Get the sleep struct from CLINT - let mut sleep = CLINT::delay(); + // Get the MTIMER peripheral from CLINT + let mut mtimer = cp.clint.mtimer(); const STEP: u32 = 1000; // 1s loop { for (i, led) in ileds.iter_mut().enumerate() { led.toggle().unwrap(); sprintln!("LED {} toggled. New state: {}", i, led.is_on()); - sleep.delay_ms(STEP); + mtimer.delay_ms(STEP); } } } diff --git a/hifive1-examples/examples/sh_led_blink.rs b/hifive1-examples/examples/sh_led_blink.rs index e0ee160..2e717dd 100644 --- a/hifive1-examples/examples/sh_led_blink.rs +++ b/hifive1-examples/examples/sh_led_blink.rs @@ -6,7 +6,7 @@ use hifive1::{ clock, - hal::{e310x::CLINT, prelude::*, DeviceResources}, + hal::{prelude::*, DeviceResources}, pin, Led, }; use semihosting::{println, process::exit}; @@ -14,18 +14,19 @@ use semihosting::{println, process::exit}; #[riscv_rt::entry] fn main() -> ! { let dr = DeviceResources::take().unwrap(); + let cp = dr.core_peripherals; let p = dr.peripherals; let pins = dr.pins; // Configure clocks - let clocks = clock::configure(p.PRCI, p.AONCLK, 320.mhz().into()); + clock::configure(p.PRCI, p.AONCLK, 320.mhz().into()); // get all 3 led pins in a tuple (each pin is it's own type here) let pin = pin!(pins, led_blue); let mut led = pin.into_inverted_output(); - // Get the sleep struct from CLINT - let mut sleep = CLINT::delay(); + // Get the MTIMER peripheral from CLINT + let mut mtimer = cp.clint.mtimer(); const N_TOGGLE: usize = 4; const STEP: u32 = 500; // 500 ms @@ -34,7 +35,7 @@ fn main() -> ! { for _ in 0..N_TOGGLE { Led::toggle(&mut led); println!("LED toggled. New state: {}", led.is_on()); - sleep.delay_ms(STEP); + mtimer.delay_ms(STEP); } println!("Done toggling LED"); exit(0); diff --git a/hifive1-examples/examples/sh_rgb_blink.rs b/hifive1-examples/examples/sh_rgb_blink.rs index 78cc761..7c97ac1 100644 --- a/hifive1-examples/examples/sh_rgb_blink.rs +++ b/hifive1-examples/examples/sh_rgb_blink.rs @@ -6,7 +6,7 @@ use hifive1::{ clock, - hal::{e310x::CLINT, prelude::*, DeviceResources}, + hal::{prelude::*, DeviceResources}, pins, Led, }; use semihosting::{println, process::exit}; @@ -14,11 +14,12 @@ use semihosting::{println, process::exit}; #[riscv_rt::entry] fn main() -> ! { let dr = DeviceResources::take().unwrap(); + let cp = dr.core_peripherals; let p = dr.peripherals; let pins = dr.pins; // Configure clocks - let clocks = clock::configure(p.PRCI, p.AONCLK, 320.mhz().into()); + clock::configure(p.PRCI, p.AONCLK, 320.mhz().into()); // get all 3 led pins in a tuple (each pin is it's own type here) let rgb_pins = pins!(pins, (led_red, led_green, led_blue)); @@ -26,8 +27,8 @@ fn main() -> ! { // get leds as the Led trait in an array so we can index them let mut ileds: [&mut dyn Led; 3] = [&mut tleds.0, &mut tleds.1, &mut tleds.2]; - // Get the sleep struct from CLINT - let mut sleep = CLINT::delay(); + // Get the MTIMER peripheral from CLINT + let mut mtimer = cp.clint.mtimer(); const N_TOGGLES: usize = 4; const STEP: u32 = 500; // 500ms @@ -37,7 +38,7 @@ fn main() -> ! { for (i, led) in ileds.iter_mut().enumerate() { led.toggle().unwrap(); println!("LED {i} toggled. New state: {}", led.is_on()); - sleep.delay_ms(STEP); + mtimer.delay_ms(STEP); } } println!("Done toggling LEDs"); diff --git a/hifive1-examples/examples/spi_rc522.rs b/hifive1-examples/examples/spi_rc522.rs index 38495fb..13ff572 100644 --- a/hifive1-examples/examples/spi_rc522.rs +++ b/hifive1-examples/examples/spi_rc522.rs @@ -6,7 +6,6 @@ use hifive1::{ clock, hal::{ - e310x::CLINT, prelude::*, spi::{SpiBus, SpiConfig, MODE_0}, DeviceResources, @@ -19,6 +18,7 @@ extern crate panic_halt; #[riscv_rt::entry] fn main() -> ! { let dr = DeviceResources::take().unwrap(); + let cp = dr.core_peripherals; let p = dr.peripherals; let pins = dr.pins; @@ -57,9 +57,9 @@ fn main() -> ! { sprintln!("Version: {:x}", version); // Get the sleep struct from CLINT - let mut sleep = CLINT::delay(); + let mut mtimer = cp.clint.mtimer(); const STEP: u32 = 1000; // 1s loop { - sleep.delay_ms(STEP); + mtimer.delay_ms(STEP); } } diff --git a/hifive1-examples/src/main.rs b/hifive1-examples/src/main.rs index a39f54a..3bb7ee0 100644 --- a/hifive1-examples/src/main.rs +++ b/hifive1-examples/src/main.rs @@ -10,8 +10,9 @@ #![no_main] use hifive1::{ + clock, hal::{prelude::*, DeviceResources}, - pin, sprintln, + pin, sprintln, stdout, }; extern crate panic_halt; @@ -23,10 +24,10 @@ fn main() -> ! { let pins = dr.pins; // Configure clocks - let clocks = hifive1::clock::configure(p.PRCI, p.AONCLK, 320.mhz().into()); + let clocks = clock::configure(p.PRCI, p.AONCLK, 320.mhz().into()); // Configure UART for stdout - hifive1::stdout::configure( + stdout::configure( p.UART0, pin!(pins, uart0_tx), pin!(pins, uart0_rx), diff --git a/hifive1/CHANGELOG.md b/hifive1/CHANGELOG.md index 50942b7..2701b92 100644 --- a/hifive1/CHANGELOG.md +++ b/hifive1/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +- Update `e310x-hal` dependency and adapt code + ## [v0.13.0] - 2024-12-10 - Fix Led implementation, as pins are configured as inverted outputs diff --git a/hifive1/Cargo.toml b/hifive1/Cargo.toml index 097822d..ed685c4 100644 --- a/hifive1/Cargo.toml +++ b/hifive1/Cargo.toml @@ -14,7 +14,7 @@ rust-version = "1.76" critical-section = { version = "1.1.3" } e310x-hal = { path = "../e310x-hal", version = "0.12.0" } nb = "1.0.0" -riscv = "0.12.1" +riscv = "0.14.0" [features] board-hifive1 = []