-
Notifications
You must be signed in to change notification settings - Fork 163
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
New ABI for stack layout and frame pointer scheme #437
Comments
Thanks @kito-cheng for posting this issue. A few remarks about the clipped figures from the PDF file posted in the discussion:
|
The previously attached PDF of the slides is out of date. Please use the latest version at: |
I would suggest to point the
This works because valid stack addresses are disjoint from valid instruction addresses. A preprocessor define will be needed to communicate the use of the new ABI to unwinders when there is not enough information at runtime to distinguish stack and instruction addresses. It might be worth defining an ELF attribute for future-proofing, although mixing code using both frame pointer conventions may not be an error. |
This is a placeholder for discuss the issue around Zcmp frame pointer issue.
The original thread from RVI mailing list https://lists.riscv.org/g/tech-psabi/message/154
Link for history:
-fno-omit-frame-pointer
riscvarchive/riscv-code-size-reduction#194Slide from Qcom:
Qualcomm RISC-V Push&Pop&FP Proposal.pdf
Current stack layout and frame pointer scheme:
And proposed stack layout and frame pointer scheme:
The text was updated successfully, but these errors were encountered: