From 9dbc853c72113c7a46ff779362b7819dbf90115c Mon Sep 17 00:00:00 2001 From: Sunil V L Date: Fri, 25 Oct 2024 23:47:29 +0530 Subject: [PATCH] Explain N in interrupt wire array Signed-off-by: Sunil V L --- src/rimt-main.adoc | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/rimt-main.adoc b/src/rimt-main.adoc index e9ad5ad..cfc2044 100644 --- a/src/rimt-main.adoc +++ b/src/rimt-main.adoc @@ -128,7 +128,8 @@ a| This field is valid only if "Number of interrupt wires" is not 0. 4+|List of interrupt wires. -| Interrupt wire Array | 8 * N | 40 | Array of Interrupt Wire Structures. +| Interrupt wire array | 8 * N | 40 | Array of Interrupt Wire Structures where N + is the number of elements in the array. See <>. |=== @@ -158,7 +159,7 @@ a| |=== ==== PCIe Root Complex Node -The PCIe root complex node the logical PCIe root complex which can be used to +The PCIe root complex node is the logical PCIe root complex which can be used to represent an entire physical root complex, an RCiEP/set of RCiEPs, a standalone PCIe device or the hierarchy below a PCIe host bridge.