From b7961308d41e3ff5e02d50943f6e355b2e9e8fa0 Mon Sep 17 00:00:00 2001 From: SheltyDog Date: Tue, 11 Jun 2019 12:45:07 +0900 Subject: [PATCH] [DELETED] junk projects Signed-off-by: SheltyDog --- demos/renesas/readme.txt | 20 +- .../rx63n-gr-sakura2/ccrx-csplus/.gitignore | 4 - .../ccrx-csplus/aws_demos.mtpj | 10008 --------- .../aws_demos_build_path_check.bat | 11 - .../aws_demos_link_order_import.mtls | 167 - .../ccrx-csplus/r_config/r_bsp_config.h | 523 - .../r_config/r_bsp_config_readme.txt | 12 - .../ccrx-csplus/r_config/r_byteq_config.h | 59 - .../ccrx-csplus/r_config/r_ether_rx_config.h | 118 - .../ccrx-csplus/r_config/r_flash_rx_config.h | 116 - .../ccrx-csplus/r_config/r_s12ad_rx_config.h | 53 - .../ccrx-csplus/r_config/r_sci_rx_config.h | 171 - .../ccrx-csplus/r_pincfg/r_pinset.c | 115 - .../ccrx-csplus/r_pincfg/r_pinset.h | 42 - .../ccrx-csplus/src/attention!.txt | 64 - .../rx63n-gr-sakura2/ccrx-e2studio/.cproject | 159 - .../rx63n-gr-sakura2/ccrx-e2studio/.gitignore | 3 - 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SX-ULPGN PMOD (6)RX65N Target Board + Silex SX-ULPGN PMOD - (7)RX63N GR-SAKURA II + (7)RX63N GR-SAKURA II -> not available (8)RX65N GR-ROSE (WIFI: ESP8266) + (9)RX65N Envision Kit + Silex SX-ULPGN PMOD Connection pattern number: (1)pattern1: wifi module has TCP/IP and SSL/TLS, Amazon recommends this pattern as RAM<16KB. @@ -689,14 +690,15 @@ Compiler number: / IDE (1) (2) (3) Board Connection / Compiler (1) (2) (3) (1) (2) (3) (1) (2) (3) -(1) (2) / X x x - - - - -(2) (2) / x x x - - - - * -(3) (2) / x x x - - - - -(4) (2) / x x x - - - - -(5) (4) / x x x - - - - -(6) (4) / x x x - - - - -(7) (2) / x x x - - - - -(8) (4) / x x - - - - +(1) (2) / x * * - - - - +(2) (2) / * * * - - - - * +(3) (2) / * * * - - - - +(4) (2) / * * * - - - - +(5) (4) / * * * - - - - +(6) (4) / * * * - - - - +(7) (2) / - - - - - - - +(8) (4) / * * - - - - +(9) (4) / * * - - - - X: tested (Amazon FreeRTOS Qualification) x: tested (MQTT echo demo) diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/.gitignore b/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/.gitignore deleted file mode 100644 index 6ea78411070..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/.gitignore +++ /dev/null @@ -1,4 +0,0 @@ -/HardwareDebug/ -*.mtud -*.rcpe -*.mtsp diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/aws_demos.mtpj b/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/aws_demos.mtpj deleted file mode 100644 index 19744e6e45e..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/aws_demos.mtpj +++ /dev/null @@ -1,10008 +0,0 @@ - - 9.01.00.00 - - - 2.0 - 9.1 - 5487a8ce-58d2-4046-9204-56e0140125a1 - 7215a123-4e26-4be7-865e-b602dd0b244c - af696c05-eeb5-43dd-8b7d-bb91cb318573 - fb98844b-2c27-4275-9804-f6e63e204da0 - 5487a8ce-58d2-4046-9204-56e0140125a1 - - - application_code - Category - af696c05-eeb5-43dd-8b7d-bb91cb318573 - - - config_files - Category - af696c05-eeb5-43dd-8b7d-bb91cb318573 - - - lib - Category - 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03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - blowfish.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\blowfish.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - bn_mul.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\bn_mul.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - camellia.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\camellia.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - ccm.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ccm.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - certs.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\certs.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - check_config.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\check_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - cipher.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\cipher.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - cipher_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\cipher_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - cmac.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\cmac.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - compat-1.3.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\compat-1.3.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - config.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - ctr_drbg.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ctr_drbg.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - debug.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\debug.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - des.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\des.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - dhm.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\dhm.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - ecdh.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ecdh.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - ecdsa.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ecdsa.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - ecjpake.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ecjpake.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - ecp.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ecp.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - ecp_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ecp_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - entropy.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\entropy.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - entropy_poll.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\entropy_poll.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - error.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\error.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - gcm.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\gcm.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - havege.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\havege.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - hmac_drbg.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\hmac_drbg.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - md.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\md.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - md2.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\md2.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - md4.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\md4.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - md5.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\md5.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - md_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\md_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - memory_buffer_alloc.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\memory_buffer_alloc.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - net.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\net.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - net_sockets.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\net_sockets.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - oid.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\oid.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - padlock.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\padlock.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - pem.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\pem.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - pk.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\pk.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - pkcs12.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\pkcs12.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - pkcs5.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\pkcs5.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - pk_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\pk_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - platform.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\platform.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - platform_time.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\platform_time.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - platform_util.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\platform_util.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - ripemd160.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ripemd160.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - rsa_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\rsa_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - rsa.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\rsa.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - sha1.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\sha1.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - sha256.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\sha256.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - sha512.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\sha512.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - ssl.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - ssl_cache.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl_cache.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - ssl_ciphersuites.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl_ciphersuites.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - ssl_cookie.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl_cookie.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - ssl_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - ssl_ticket.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl_ticket.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - threading.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\threading.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - timing.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\timing.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - version.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\version.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - x509.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\x509.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - x509_crl.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\x509_crl.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - x509_crt.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\x509_crt.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - x509_csr.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\x509_csr.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - xtea.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\xtea.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff556ca1-2e1c-4faf-9562-8217a5e23d96 - - - aes.c - File - ..\..\..\..\lib\third_party\mbedtls\library\aes.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - aesni.c - File - ..\..\..\..\lib\third_party\mbedtls\library\aesni.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - arc4.c - File - ..\..\..\..\lib\third_party\mbedtls\library\arc4.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - asn1parse.c - File - ..\..\..\..\lib\third_party\mbedtls\library\asn1parse.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - asn1write.c - File - ..\..\..\..\lib\third_party\mbedtls\library\asn1write.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - base64.c - File - ..\..\..\..\lib\third_party\mbedtls\library\base64.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - bignum.c - File - ..\..\..\..\lib\third_party\mbedtls\library\bignum.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - blowfish.c - File - ..\..\..\..\lib\third_party\mbedtls\library\blowfish.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - camellia.c - File - ..\..\..\..\lib\third_party\mbedtls\library\camellia.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - ccm.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ccm.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - certs.c - File - ..\..\..\..\lib\third_party\mbedtls\library\certs.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - cipher.c - File - ..\..\..\..\lib\third_party\mbedtls\library\cipher.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - cipher_wrap.c - File - ..\..\..\..\lib\third_party\mbedtls\library\cipher_wrap.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - cmac.c - File - ..\..\..\..\lib\third_party\mbedtls\library\cmac.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - ctr_drbg.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ctr_drbg.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - debug.c - File - ..\..\..\..\lib\third_party\mbedtls\library\debug.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - des.c - File - ..\..\..\..\lib\third_party\mbedtls\library\des.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - dhm.c - File - ..\..\..\..\lib\third_party\mbedtls\library\dhm.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - ecdh.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ecdh.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - ecdsa.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ecdsa.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - ecjpake.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ecjpake.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - ecp.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ecp.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - ecp_curves.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ecp_curves.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - entropy.c - File - ..\..\..\..\lib\third_party\mbedtls\library\entropy.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - entropy_poll.c - File - ..\..\..\..\lib\third_party\mbedtls\library\entropy_poll.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - error.c - File - ..\..\..\..\lib\third_party\mbedtls\library\error.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - gcm.c - File - ..\..\..\..\lib\third_party\mbedtls\library\gcm.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - havege.c - File - ..\..\..\..\lib\third_party\mbedtls\library\havege.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - hmac_drbg.c - File - ..\..\..\..\lib\third_party\mbedtls\library\hmac_drbg.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - md.c - File - ..\..\..\..\lib\third_party\mbedtls\library\md.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - md2.c - File - ..\..\..\..\lib\third_party\mbedtls\library\md2.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - md4.c - File - ..\..\..\..\lib\third_party\mbedtls\library\md4.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - md5.c - File - ..\..\..\..\lib\third_party\mbedtls\library\md5.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - md_wrap.c - File - ..\..\..\..\lib\third_party\mbedtls\library\md_wrap.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - memory_buffer_alloc.c - File - ..\..\..\..\lib\third_party\mbedtls\library\memory_buffer_alloc.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - net_sockets.c - File - ..\..\..\..\lib\third_party\mbedtls\library\net_sockets.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - oid.c - File - ..\..\..\..\lib\third_party\mbedtls\library\oid.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - padlock.c - File - ..\..\..\..\lib\third_party\mbedtls\library\padlock.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - pem.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pem.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - pk.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pk.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - pkcs12.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pkcs12.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - pkcs5.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pkcs5.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - pkparse.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pkparse.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - pkwrite.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pkwrite.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - pk_wrap.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pk_wrap.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - platform.c - File - ..\..\..\..\lib\third_party\mbedtls\library\platform.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - platform_util.c - File - ..\..\..\..\lib\third_party\mbedtls\library\platform_util.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - ripemd160.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ripemd160.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - rsa_internal.c - File - ..\..\..\..\lib\third_party\mbedtls\library\rsa_internal.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - rsa.c - File - ..\..\..\..\lib\third_party\mbedtls\library\rsa.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - sha1.c - File - ..\..\..\..\lib\third_party\mbedtls\library\sha1.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - sha256.c - File - ..\..\..\..\lib\third_party\mbedtls\library\sha256.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - sha512.c - File - ..\..\..\..\lib\third_party\mbedtls\library\sha512.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - ssl_cache.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_cache.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - ssl_ciphersuites.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_ciphersuites.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - ssl_cli.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_cli.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - ssl_cookie.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_cookie.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - ssl_srv.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_srv.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - ssl_ticket.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_ticket.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - ssl_tls.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_tls.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - threading.c - File - ..\..\..\..\lib\third_party\mbedtls\library\threading.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - timing.c - File - ..\..\..\..\lib\third_party\mbedtls\library\timing.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - version.c - File - ..\..\..\..\lib\third_party\mbedtls\library\version.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - version_features.c - File - ..\..\..\..\lib\third_party\mbedtls\library\version_features.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - x509.c - File - ..\..\..\..\lib\third_party\mbedtls\library\x509.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - x509write_crt.c - File - ..\..\..\..\lib\third_party\mbedtls\library\x509write_crt.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - x509write_csr.c - File - ..\..\..\..\lib\third_party\mbedtls\library\x509write_csr.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - x509_create.c - File - ..\..\..\..\lib\third_party\mbedtls\library\x509_create.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - x509_crl.c - File - ..\..\..\..\lib\third_party\mbedtls\library\x509_crl.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - x509_crt.c - File - ..\..\..\..\lib\third_party\mbedtls\library\x509_crt.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - x509_csr.c - File - ..\..\..\..\lib\third_party\mbedtls\library\x509_csr.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - xtea.c - File - ..\..\..\..\lib\third_party\mbedtls\library\xtea.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 06f38c79-b85b-4a96-aebb-fbf8e3c215db - - - renesas - Category - 658c1b52-1305-4535-8592-4befc27d0875 - - - amazon_freertos_common - Category - 95ae2999-57b7-411b-8ac8-ce706ef860d4 - db1f578d-5118-47ab-bbca-b219c0b86310 - - - FIT - Category - 95ae2999-57b7-411b-8ac8-ce706ef860d4 - - - pkcs11.h - File - ..\..\..\..\lib\third_party\pkcs11\pkcs11.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 84a82e4f-c82a-4cf2-b059-15f70a3083b5 - - - pkcs11f.h - File - ..\..\..\..\lib\third_party\pkcs11\pkcs11f.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 84a82e4f-c82a-4cf2-b059-15f70a3083b5 - - - pkcs11t.h - File - ..\..\..\..\lib\third_party\pkcs11\pkcs11t.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 84a82e4f-c82a-4cf2-b059-15f70a3083b5 - - - assert_p.h - File - ..\..\..\..\lib\third_party\tinycbor\assert_p.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 22184cb7-83e1-4a2d-b7a0-ad4fc855de36 - - - cbor.h - File - ..\..\..\..\lib\third_party\tinycbor\cbor.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 22184cb7-83e1-4a2d-b7a0-ad4fc855de36 - - - cborconstants_p.h - File - ..\..\..\..\lib\third_party\tinycbor\cborconstants_p.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 22184cb7-83e1-4a2d-b7a0-ad4fc855de36 - - - cborencoder.c - File - ..\..\..\..\lib\third_party\tinycbor\cborencoder.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 22184cb7-83e1-4a2d-b7a0-ad4fc855de36 - - - cborencoder_close_container_checked.c - File - ..\..\..\..\lib\third_party\tinycbor\cborencoder_close_container_checked.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 22184cb7-83e1-4a2d-b7a0-ad4fc855de36 - - - cborerrorstrings.c - File - ..\..\..\..\lib\third_party\tinycbor\cborerrorstrings.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 22184cb7-83e1-4a2d-b7a0-ad4fc855de36 - - - cborparser.c - File - ..\..\..\..\lib\third_party\tinycbor\cborparser.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 22184cb7-83e1-4a2d-b7a0-ad4fc855de36 - - - cborparser_dup_string.c - File - ..\..\..\..\lib\third_party\tinycbor\cborparser_dup_string.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 22184cb7-83e1-4a2d-b7a0-ad4fc855de36 - - - cborpretty.c - File - ..\..\..\..\lib\third_party\tinycbor\cborpretty.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 22184cb7-83e1-4a2d-b7a0-ad4fc855de36 - - - compilersupport_p.h - File - ..\..\..\..\lib\third_party\tinycbor\compilersupport_p.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 22184cb7-83e1-4a2d-b7a0-ad4fc855de36 - - - extract_number_p.h - File - ..\..\..\..\lib\third_party\tinycbor\extract_number_p.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 22184cb7-83e1-4a2d-b7a0-ad4fc855de36 - - - math_support_p.h - File - ..\..\..\..\lib\third_party\tinycbor\math_support_p.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 22184cb7-83e1-4a2d-b7a0-ad4fc855de36 - - - LICENSE - File - ..\..\..\..\lib\third_party\tinycbor\LICENSE - 22184cb7-83e1-4a2d-b7a0-ad4fc855de36 - - - amazon_freertos_common - Category - 9b07f59a-f4f1-4f46-8c1a-1c053c0f8a63 - - - FIT_modified_code - Category - 9b07f59a-f4f1-4f46-8c1a-1c053c0f8a63 - - - FIT_setting_files - Category - 9b07f59a-f4f1-4f46-8c1a-1c053c0f8a63 - - - compiler_support - Category - d22b852f-5164-43d4-9225-179c941f5f0b - - - network_support - Category - d22b852f-5164-43d4-9225-179c941f5f0b - - - croutine.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\amazon_freertos_common\croutine.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - d22b852f-5164-43d4-9225-179c941f5f0b - - - entropy_hardware_poll.c - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\amazon_freertos_common\entropy_hardware_poll.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d22b852f-5164-43d4-9225-179c941f5f0b - - - freertos_start.c - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\amazon_freertos_common\freertos_start.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d22b852f-5164-43d4-9225-179c941f5f0b - - - freertos_start.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\amazon_freertos_common\freertos_start.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - d22b852f-5164-43d4-9225-179c941f5f0b - - - serial_term_uart.c - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\amazon_freertos_common\serial_term_uart.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d22b852f-5164-43d4-9225-179c941f5f0b - - - serial_term_uart.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\amazon_freertos_common\serial_term_uart.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - d22b852f-5164-43d4-9225-179c941f5f0b - - - ccrx - Category - 9b69d871-28f5-4ba6-af21-28496e725cb2 - - - exit.c - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\amazon_freertos_common\compiler_support\ccrx\exit.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 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25.5 - 25.5 - 25.5 - 25.5 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - c0ff0a4f - c05be416 - c0056dff - c0ff541c - c04fc1ff - c0a932ff - c0ffd91c - c0ff30a5 - c0bee02f - c05510ff - c0ff97e4 - c0913a37 - c0c68e15 - c0317f0c - c060493e - c072808e - - - - - 8.01.00.00 - - - \ No newline at end of file diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/aws_demos_build_path_check.bat b/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/aws_demos_build_path_check.bat deleted file mode 100644 index 70ff37d5d85..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/aws_demos_build_path_check.bat +++ /dev/null @@ -1,11 +0,0 @@ -@echo off -rem ################################################################################ -rem # This batch file executes some preprocess for build -rem ################################################################################ - -if not exist "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" ( - echo ERROR: Unable to find "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" - exit 2 -) - -"%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" %* diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/aws_demos_link_order_import.mtls b/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/aws_demos_link_order_import.mtls deleted file mode 100644 index c5e86a7e2c5..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/aws_demos_link_order_import.mtls +++ /dev/null @@ -1,167 +0,0 @@ -port_asm.obj -aws_demo_runner.obj -aws_dev_mode_key_provisioning.obj -aws_greengrass_discovery_demo.obj -aws_hello_world.obj -aws_logging_task_dynamic_buffers.obj -aws_ota_update_demo.obj -aws_shadow_lightbulb_on_off.obj -aws_subscribe_publish_loop.obj -aws_tcp_echo_client_separate_tasks.obj -aws_tcp_echo_client_single_task.obj -main.obj -event_groups.obj -list.obj -heap_4.obj -port.obj -queue.obj -stream_buffer.obj -tasks.obj -timers.obj -FreeRTOS_ARP.obj -FreeRTOS_DHCP.obj -FreeRTOS_DNS.obj -FreeRTOS_IP.obj -FreeRTOS_Sockets.obj -FreeRTOS_Stream_Buffer.obj -FreeRTOS_TCP_IP.obj -FreeRTOS_TCP_WIN.obj -FreeRTOS_UDP_IP.obj -BufferAllocation_2.obj -NetworkInterface.obj -ether_callback.obj -aws_bufferpool_static_thread_safe.obj -aws_crypto.obj -aws_greengrass_discovery.obj -aws_helper_secure_connect.obj -aws_mqtt_agent.obj -aws_mqtt_lib.obj -aws_ota_agent.obj -aws_ota_cbor.obj -aws_ota_pal.obj -aws_pkcs11_mbedtls.obj -aws_pkcs11_pal.obj -aws_secure_sockets.obj -aws_shadow.obj -aws_shadow_json.obj -aws_tls.obj -aws_system_init.obj -jsmn.obj -aes.obj -aesni.obj -arc4.obj -asn1parse.obj -asn1write.obj -base64.obj -bignum.obj -blowfish.obj -camellia.obj -ccm.obj -certs.obj -cipher.obj -cipher_wrap.obj -cmac.obj -ctr_drbg.obj -debug.obj -des.obj -dhm.obj -ecdh.obj -ecdsa.obj -ecjpake.obj -ecp.obj -ecp_curves.obj -entropy.obj -entropy_poll.obj -error.obj -gcm.obj -havege.obj -hmac_drbg.obj -md.obj -md2.obj -md4.obj -md5.obj -md_wrap.obj -memory_buffer_alloc.obj -net_sockets.obj -oid.obj -padlock.obj -pem.obj -pk.obj -pk_wrap.obj -pkcs12.obj -pkcs5.obj -pkparse.obj -pkwrite.obj -platform.obj -platform_util.obj -ripemd160.obj -rsa.obj -rsa_internal.obj -sha1.obj -sha256.obj -sha512.obj -ssl_cache.obj -ssl_ciphersuites.obj -ssl_cli.obj -ssl_cookie.obj -ssl_srv.obj -ssl_ticket.obj -ssl_tls.obj -threading.obj -timing.obj -version.obj -version_features.obj -x509.obj -x509_create.obj -x509_crl.obj -x509_crt.obj -x509_csr.obj -x509write_crt.obj -x509write_csr.obj -xtea.obj -cborencoder.obj -cborencoder_close_container_checked.obj -cborerrorstrings.obj -cborparser.obj -cborparser_dup_string.obj -cborpretty.obj -r_pinset.obj -dbsct.obj -lowlvl.obj -lowsrc.obj -resetprg.obj -sbrk.obj -r_bsp_hwsetup_reference.obj -clkconf.obj -vecttbl.obj -r_bsp_common.obj -cpu.obj -locking.obj -mcu_clocks.obj -mcu_init.obj -mcu_interrupts.obj -mcu_locks.obj -mcu_startup.obj -r_byteq.obj -phy.obj -r_ether_rx.obj -r_ether_setting_rx63n.obj -r_codeflash.obj -r_codeflash_extra.obj -r_dataflash.obj -r_flash_type1.obj -r_flash_utils.obj -r_flash_type2.obj -r_flash_type3.obj -r_flash_type4.obj -r_flash_fcu.obj -r_flash_group.obj -r_flash_rx.obj -r_sci_rx.obj -r_sci_rx63n.obj -r_sci_rx63n_data.obj -exit.obj -entropy_hardware_poll.obj -freertos_start.obj -freertos_ip_hook.obj -serial_term_uart.obj diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_config/r_bsp_config.h b/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_config/r_bsp_config.h deleted file mode 100644 index ad90cbceae6..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_config/r_bsp_config.h +++ /dev/null @@ -1,523 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_config_reference.h -* Device(s) : RX63x -* Description : The file r_bsp_config.h is used to configure your BSP. r_bsp_config.h should be included -* somewhere in your package so that the r_bsp code has access to it. This file (r_bsp_config_reference.h) -* is just a reference file that the user can use to make their own r_bsp_config.h file. -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 13.03.2012 1.00 First Release -* : 26.06.2012 1.10 Added MCU product part number section. Added endian options for user app and user boot. -* Added OFS register macros. Added option for ROM Code Protect. Added callback function -* options for exception interrupts. -* : 16.07.2012 1.20 Fixed bug with exception callback function names. Added BSP_CFG_BCLK_OUTPUT and -* BSP_CFG_SDCLK_OUTPUT macro options. -* : 09.08.2012 1.30 Added BSP_CFG_IO_LIB_ENABLE macro. -* : 20.09.2012 1.40 Added BSP_CFG_USER_LOCKING_ENABLED and BSP_CFG_USER_LOCKING_TYPE macros. -* : 19.11.2012 1.50 Updated code to use 'BSP_' and 'BSP_CFG_' prefix for macros. -* : 17.01.2013 1.60 Moved BSP_CFG_IO_LIB_ENABLE macro since it is now used in conjunction with -* BSP_CFG_HEAP_BYTES. Added comments for disabling heap above BSP_CFG_HEAP_BYTES. -* Added BSP_CFG_PARAM_CHECKING_ENABLE macro for configuring global parameter checking. -* : 06.05.2013 1.70 Removed BSP_CFG_USER_APP_ENDIAN & BSP_CFG_USER_BOOT_ENDIAN macros. Endian is now detected -* using compiler macros. Added BSP_CFG_MCU_VCC_MV macro for FIT modules that need to know -* Vcc. -* : 25.06.2013 1.80 Added BSP_CFG_USER_STACK_ENABLE macro to enable/disable use of user stack. Removed -* macros defining exception callbacks, undefined interrupt callback, and bus error -* callback. Callbacks are now handled through mcu_interrupts.c. -* : 26.11.2013 1.90 Added BSP_CFG_BOARD_REVISION macro to differentiate between prototype and MP boards. -* : 31.03.2014 2.00 Added the ability for the user to define two 'warm start' callback functions which when -* defined result in a callback from PowerON_Reset_PC() before and/or after initialization -* of the C runtime environment. Added r_bsp_config file version number, which must match -* the BSP version number or a compiler warning will result. Added ability to specify user -* defined functions for redirection of the stdio charget() and/or charput() functions. -* : 09.12.2015 2.10 Change the division ratio of PCLKA. -* : 15.05.2017 2.20 Added Character(s) of the following macro definition. -* - BSP_CFG_MCU_PART_PACKAGE - LJ = 0xA = TFLGA/100/0.65. -* - LH = 0xB = TFLGA/64/0.65. -* - BSP_CFG_MCU_PART_CAN_INCLUDED - H = true -* = CAN included/DEU included/PDC not included. -* - G = false -* = CAN not included/DEU included/PDC not included. -* - S = true -* = CAN included/DEU not included/PDC included. -* - F(only 64-pin TFLGA) = true -* = CAN included/DEU not included/PDC not included. -* - BSP_CFG_MCU_PART_MEMORY_SIZE - F = 0xF = 2MB/256KB/32KB -* - G = 0x10 = 1.5MB/192KB/32KB -* - J = 0x13 = 1.5MB/256KB/32KB -* - K = 0x14 = 2MB/192KB/32KB -* - M = 0x16 = 256KB/64KB/32KB -* - N = 0x17 = 384KB/64KB/32KB -* - P = 0x19 = 512KB/64KB/32KB -* - W = 0x20 = 1MB/192KB/32KB -* - Y = 0x22 = 1MB/256KB/32KB -* Deleted Character(s) of the following macro definition. -* - BSP_CFG_MCU_PART_PACKAGE - LA = 0x6 = TFLGA/100/0.65. -* - FN = 0x7 = LQFP/80/0.50. -* - BSP_CFG_MCU_PART_CAN_INCLUDED - E = = 3V included (RX63T). Ignore. -* - BSP_CFG_MCU_PART_MEMORY_SIZE - 4 = 0x4 = 32KB/8KB/8KB -* - 5 = 0x5 = 48KB/8KB/8KB -* Changed the value of the following macro definition. -* - BSP_CFG_MCU_PART_MEMORY_SIZE - Changed the value from "6 = 0x6 = 64KB/8KB/8KB" -* to "6 = 0x6 = 256KB/128KB/32KB". -* - Changed the value from "7 = 0x7 = 384KB/64KB/32KB" -* to "7 = 0x7 = 384KB/128KB/32KB". -* - Changed the value from "8 = 0x8 = 512KB/64KB/32KB" -* to "8 = 0x8 = 512KB/128KB/32KB". -* Changed the default value of the following macro definition. -* - BSP_CFG_MCU_PART_MEMORY_SIZE - Changed the default value from 0xB to 0xF. -* : xx.xx.xxxx x.xx Added the following macro definition. -* - BSP_CFG_STARTUP_DISABLE -* - BSP_CFG_FIT_IPL_MAX -* Added support for GNUC and ICCRX. -***********************************************************************************************************************/ - -#ifndef R_BSP_CONFIG_REF_HEADER_FILE -#define R_BSP_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* NOTE: - The default settings are the same as when using RSKRX63N. - Change to the settings for the user board. -*/ - -/* Start up select - 0 = Enable BSP startup program. - 1 = Disable BSP startup program. (e.g. Using user startup program.) -*/ -#define BSP_CFG_STARTUP_DISABLE (0) - -/* Enter the product part number for your MCU. This information will be used to obtain information about your MCU such - as package and memory size. - To help parse this information, the part number will be defined using multiple macros. - R 5 F 56 3N Y D D FC - | | | | | | | | | Macro Name Description - | | | | | | | | |__BSP_CFG_MCU_PART_PACKAGE = Package type, number of pins, and pin pitch - | | | | | | | |____not used = Products with wide temperature range - | | | | | | |______BSP_CFG_MCU_PART_CAN_INCLUDED = CAN included/not included - | | | | | |________BSP_CFG_MCU_PART_MEMORY_SIZE = ROM, RAM, and Data Flash Capacity - | | | | |___________BSP_CFG_MCU_PART_GROUP = Group name - | | | |______________BSP_CFG_MCU_PART_SERIES = Series name - | | |________________BSP_CFG_MCU_PART_MEMORY_TYPE = Type of memory (Flash, ROMless) - | |__________________not used = Renesas MCU - |____________________not used = Renesas semiconductor product. - */ - -/* Package type. Set the macro definition based on values below: - Character(s) = Value for macro = Package Type/Number of Pins/Pin Pitch - FC = 0x0 = LQFP/176/0.50 - BG = 0x1 = LFBGA/176/0.80 - LC = 0x2 = TFLGA/177/0.50 - FB = 0x3 = LQFP/144/0.50 - LK = 0x4 = TFLGA/145/0.50 - LJ = 0xA = TFLGA/100/0.65 - FP = 0x5 = LQFP/100/0.50 - LH = 0xB = TFLGA/64/0.65 - FM = 0x8 = LQFP/64/0.50 - FL = 0x9 = LQFP/48/0.50 -*/ -#define BSP_CFG_MCU_PART_PACKAGE (0x5) - -/* Whether CAN is included or not. - Character(s) = Value for macro = Description - H = true = CAN included/DEU included/PDC not included. - D = true = CAN included/DEU not included/PDC not included. - G = false = CAN not included/DEU included/PDC not included. - C = false = CAN not included/DEU not included/PDC not included. - S = true = CAN included/DEU not included/PDC included. - F(only 64-pin TFLGA) = true = CAN included/DEU not included/PDC not included. -*/ -#define BSP_CFG_MCU_PART_CAN_INCLUDED (true) - -/* ROM, RAM, and Data Flash Capacity. - Character(s) = Value for macro = ROM Size/Ram Size/Data Flash Size - F = 0xF = 2MB/256KB/32KB - K = 0x14 = 2MB/192KB/32KB - E = 0xE = 2MB/128KB/32KB - J = 0x13 = 1.5MB/256KB/32KB - G = 0x10 = 1.5MB/192KB/32KB - D = 0xD = 1.5MB/128KB/32KB - Y = 0x22 = 1MB/256KB/32KB - W = 0x20 = 1MB/192KB/32KB - B = 0xB = 1MB/128KB/32KB - A = 0xA = 768KB/128KB/32KB - 8 = 0x8 = 512KB/128KB/32KB - 7 = 0x7 = 384KB/128KB/32KB - 6 = 0x6 = 256KB/128KB/32KB - P = 0x19 = 512KB/64KB/32KB - N = 0x17 = 384KB/64KB/32KB - M = 0x16 = 256KB/64KB/32KB - 0 = 0x0 = 0/128KB/0 -*/ -#define BSP_CFG_MCU_PART_MEMORY_SIZE (0x22) - -/* Group name. - Character(s) = Value for macro = Description - 30 = 0x0 = RX630 Group - 31 = 0x1 = RX631 Group - 3N = 0x2 = RX63N Group - 3T = 0x3 = RX63T Group -*/ -#define BSP_CFG_MCU_PART_GROUP (0x2) - -/* Series name. - Character(s) = Value for macro = Description - 56 = 0x0 = RX600 Series -*/ -#define BSP_CFG_MCU_PART_SERIES (0x0) - -/* Memory type. - Character(s) = Value for macro = Description - F = 0x0 = Flash memory version - S = 0x1 = ROMless version -*/ -#define BSP_CFG_MCU_PART_MEMORY_TYPE (0x0) - -/* Whether to use 1 stack or 2. RX MCUs have the ability to use 2 stacks: an interrupt stack and a user stack. - * When using 2 stacks the user stack will be used during normal user code. When an interrupt occurs the CPU - * will automatically shift to using the interrupt stack. Having 2 stacks can make it easier to figure out how - * much stack space to allocate since the user does not have to worry about always having enough room on the - * user stack for if-and-when an interrupt occurs. Some users will not want 2 stacks though because it is not - * needed in all applications and can lead to wasted RAM (i.e. space in between stacks that is not used). - * If only 1 stack is used then the interrupt stack is the one that will be used. If 1 stack is chosen then - * the user may want to remove the 'SU' section from the linker sections to remove any linker warnings. - * - * 0 = Use 1 stack. Disable user stack. User stack size set below will be ignored. - * 1 = Use 2 stacks. User stack and interrupt stack will both be used. - */ -#define BSP_CFG_USER_STACK_ENABLE (0) - -#if defined(__CCRX__) || defined(__GNUC__) - -/* When using the user startup program, disable the following code. */ -#if (BSP_CFG_STARTUP_DISABLE == 0) - -/* If only 1 stack is chosen using BSP_CFG_USER_STACK_ENABLE then no RAM will be allocated for the user stack. */ -#if (BSP_CFG_USER_STACK_ENABLE == 1) -/* User Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. */ -#define BSP_CFG_USTACK_BYTES (0) -#endif - -/* Interrupt Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. - * If the interrupt stack is the only stack being used then the user will likely want to increase the default size - * below. - */ -#define BSP_CFG_ISTACK_BYTES (0x1000) - -#endif /* BSP_CFG_STARTUP_DISABLE == 0 */ - -/* Heap size in bytes. - To disable the heap you must follow these steps: - 1) Set this macro (BSP_CFG_HEAP_BYTES) to 0. - 2) Set the macro BSP_CFG_IO_LIB_ENABLE to 0. - 3) Disable stdio from being built into the project library. This is done by going into the Renesas RX Toolchain - settings and choosing the Standard Library section. After that choose 'Standard Library' for Category in HEW or - choose 'Contents' in E2Studio. This will present a list of modules that can be included. Uncheck the box for - stdio.h. -*/ -#define BSP_CFG_HEAP_BYTES (0) - -#endif /* defined(__CCRX__) || defined(__GNUC__) */ - -#if defined(__CCRX__) - -/* Initializes C input & output library functions. - 0 = Disable I/O library initialization in resetprg.c. If you are not using stdio then use this value. - 1 = Enable I/O library initialization in resetprg.c. This is default and needed if you are using stdio. */ -#define BSP_CFG_IO_LIB_ENABLE (1) - -#endif /* defined(__CCRX__) */ - -/* If desired the user may redirect the stdio charget() and/or charput() functions to their own respective functions - by enabling below and providing and replacing the my_sw_... function names with the names of their own functions. */ -#define BSP_CFG_USER_CHARGET_ENABLED (0) -#define BSP_CFG_USER_CHARGET_FUNCTION my_sw_charget_function - -#define BSP_CFG_USER_CHARPUT_ENABLED (0) -#define BSP_CFG_USER_CHARPUT_FUNCTION my_sw_charput_function - -/* After reset MCU will operate in Supervisor mode. To switch to User mode, set this macro to '1'. For more information - on the differences between these 2 modes see the CPU >> Processor Mode section of your MCU's hardware manual. - 0 = Stay in Supervisor mode. - 1 = Switch to User mode. -*/ -#define BSP_CFG_RUN_IN_USER_MODE (0) - -/* To get into User Boot Mode the user must control some pins on the MCU and also set some values in ROM. These values - in ROM are described in the Option-Setting Memory section of the hardware manual. This macro sets these values so - that User Boot Mode can be used. The user is still responsible for setting the MCU pins appropriately. If User Boot - is selected then the user should make sure that they setup a constant data section in their linker named 'UBSETTINGS' - at address 0xFF7FFFE8. - 0 = Single-Chip or USB Boot Mode - 1 = User Boot Mode -*/ -#define BSP_CFG_USER_BOOT_ENABLE (0) - -/* Set your desired ID code. NOTE, leave at the default (all 0xFF's) if you do not wish to use an ID code. If you set - this value and program it into the MCU then you will need to remember the ID code because the debugger will ask for - it when trying to connect. Note that the E1/E20 will ignore the ID code when programming the MCU during debugging. - If you set this value and then forget it then you can clear the ID code by connecting up in serial boot mode using - FDT. The ID Code is 16 bytes long. The macro below define the ID Code in 4-byte sections. */ -/* Lowest 4-byte section, address 0xFFFFFFA0. From MSB to LSB: Control Code, ID code 1, ID code 2, ID code 3. */ -#define BSP_CFG_ID_CODE_LONG_1 (0xFFFFFFFF) -/* 2nd ID Code section, address 0xFFFFFFA4. From MSB to LSB: ID code 4, ID code 5, ID code 6, ID code 7. */ -#define BSP_CFG_ID_CODE_LONG_2 (0xFFFFFFFF) -/* 3rd ID Code section, address 0xFFFFFFA8. From MSB to LSB: ID code 8, ID code 9, ID code 10, ID code 11. */ -#define BSP_CFG_ID_CODE_LONG_3 (0xFFFFFFFF) -/* 4th ID Code section, address 0xFFFFFFAC. From MSB to LSB: ID code 12, ID code 13, ID code 14, ID code 15. */ -#define BSP_CFG_ID_CODE_LONG_4 (0xFFFFFFFF) - -/* Clock source select (CKSEL). - 0 = Low Speed On-Chip Oscillator (LOCO) - 1 = High Speed On-Chip Oscillator (HOCO) - 2 = Main Clock Oscillator - 3 = Sub-Clock Oscillator - 4 = PLL Circuit -*/ -#define BSP_CFG_CLOCK_SOURCE (4) - -/* Clock configuration options. - The input clock frequency is specified and then the system clocks are set by specifying the multipliers used. The - multiplier settings are used to set the clock registers in resetprg.c. If a 12MHz clock is used and the - ICLK is 96MHz, PCLKA is 96MHz, PCLKB is 48MHz, FCLK is 48MHz, USB Clock is 48MHz, and BCLK is 24MHz then the - settings would be: - - BSP_CFG_XTAL_HZ = 12000000 - BSP_CFG_PLL_DIV = 1 (no division) - BSP_CFG_PLL_MUL = 16 (12MHz x 16 = 192MHz) - BSP_CFG_ICK_DIV = 2 : System Clock (ICLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_ICK_DIV) = 96MHz - BSP_CFG_PCKA_DIV = 2 : Peripheral Clock A (PCLKA) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKA_DIV) = 96MHz - BSP_CFG_PCKB_DIV = 4 : Peripheral Clock B (PCLKB) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKB_DIV) = 48MHz - BSP_CFG_FCK_DIV = 4 : Flash IF Clock (FCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_FCK_DIV) = 48MHz - BSP_CFG_BCK_DIV = 8 : External Bus Clock (BCK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_BCK_DIV) = 24MHz - BSP_CFG_UCK_DIV = 4 : USB Clock (UCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_UCK_DIV) = 48MHz - BSP_CFG_IEBCK_DIV = 4 : IEBUS Clock (IECLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_IEBCK_DIV)= 48MHz -*/ -/* XTAL - Input clock frequency in Hz */ -#define BSP_CFG_XTAL_HZ (12000000) - -/* PLL Input Frequency Divider Select (PLIDIV). - Available divisors = /1 (no division), /2, /4 -*/ -#define BSP_CFG_PLL_DIV (1) - -/* PLL Frequency Multiplication Factor Select (STC). - Available multipliers = x8, x10, x12, x16, x20, x24, x25, x50 -*/ -#define BSP_CFG_PLL_MUL (16) - -/* System Clock Divider (ICK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_ICK_DIV (2) - -/* Peripheral Module Clock A Divider (PCKA). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKA_DIV (2) - -/* Peripheral Module Clock B Divider (PCKB). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKB_DIV (4) - -/* External Bus Clock Divider (BCK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_BCK_DIV (8) - -/* Flash IF Clock Divider (FCK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_FCK_DIV (4) - -/* IEBUS Clock Divider Select. - Available divisors = /1 (no division), /2, /4, /6, /8, /16, /32, /64 -*/ -#define BSP_CFG_IEBCK_DIV (8) - -/* USB Clock Divider Select. - Available divisors = /3, /4 -*/ -#define BSP_CFG_UCK_DIV (4) - -/* Configure BCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency, 2= BCK/2 frequency */ -#define BSP_CFG_BCLK_OUTPUT (0) - -/* Configure SDCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency */ -#define BSP_CFG_SDCLK_OUTPUT (0) - -/* Configure WDT and IWDT settings. - OFS0 - Option Function Select Register 0 - b31:b29 Reserved (set to 1) - b28 WDTRSTIRQS - WDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b27:b26 WDTRPSS - WDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b25:b24 WDTRPES - WDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b23:b20 WDTCKS - WDT Clock Frequency Division Ratio - (1=/4, 4=/64, 0xF=/128, 6=/512, 7=/2048, 8=/8192) - b19:b18 WDTTOPS - WDT Timeout Period Select - (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b17 WDTSTRT - WDT Start Mode Select - (0=auto-start after reset, halt after reset) - b16:b15 Reserved (set to 1) - b14 IWDTSLCSTP - IWDT Sleep Mode Count Stop Control - (0=can't stop count, 1=stop w/some low power modes) - b13 Reserved (set to 1) - b12 IWDTRSTIRQS - IWDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b11:b10 IWDTRPSS - IWDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b9:b8 IWDTRPES - IWDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b7:b4 IWDTCKS - IWDT Clock Frequency Division Ratio - (0=none, 2=/16, 3 = /32, 4=/64, 0xF=/128, 5=/256) - b3:b2 IWDTTOPS - IWDT Timeout Period Select - (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b1 IWDTSTRT - IWDT Start Mode Select - (0=auto-start after reset, halt after reset) - b0 Reserved (set to 1) */ -#define BSP_CFG_OFS0_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* Configure whether voltage detection 0 circuit and HOCO are enabled after reset. - OFS1 - Option Function Select Register 1 - b31:b9 Reserved (set to 1) - b8 HOCOEN - Enable/disable HOCO oscillation after a reset (0=enable, 1=disable) - b7:b3 Reserved (set to 1) - b2 LVDAS - Choose to enable/disable Voltage Detection 0 Circuit after a reset (0=enable, 1=disable) - b1:b0 Reserved (set to 1) */ -#define BSP_CFG_OFS1_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* ROM Code Protection is a feature that can prohibit PROM programmers from reading or writing flash memory. - There are 3 different options that can be chosen: - 0 = ROM code protection 1 = Both reading and writing to the user area and user boot area are prohibited. - 1 = ROM code protection 2 = Reading from the user area and user boot area are prohibited. - Else = Protection disabled = Reading and writing are allowed. -*/ -#define BSP_CFG_ROM_CODE_PROTECT_VALUE (0xFFFFFFFF) - -/* This macro lets other modules no if a RTOS is being used. - 0 = RTOS is not used. - 1 = FreeRTOS is used. - 2 = embOS is used.(This is not available.) - 3 = MicroC_OS is used.(This is not available.) - 4 = RI600V4 or RI600PX is used.(This is not available.) -*/ -#define BSP_CFG_RTOS_USED (1) - -/* This macro is used to select which CMT channel used for system timer of RTOS. - * The setting of this macro is only valid if the macro BSP_CFG_RTOS_USED is set to a value other than 0. */ -#if (BSP_CFG_RTOS_USED != 0) -/* Setting value. - * 0 = CMT channel 0 used for system timer of RTOS (recommended to be used for RTOS). - * 1 = CMT channel 1 used for system timer of RTOS. - * 2 = CMT channel 2 used for system timer of RTOS. - * 3 = CMT channel 3 used for system timer of RTOS. - * Others = Invalid. */ -#define BSP_CFG_RTOS_SYSTEM_TIMER (0) -#endif - -/* By default modules will use global locks found in mcu_locks.c. If the user is using a RTOS and would rather use its - locking mechanisms then they can change this macro. - NOTE: If '1' is chosen for this macro then the user must also change the next macro 'BSP_CFG_USER_LOCKING_TYPE'. - 0 = Use default locking (non-RTOS) - 1 = Use user defined locking mechanism. -*/ -#define BSP_CFG_USER_LOCKING_ENABLED (0) - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to redefine the typedef - that is used for the locks. If the user is using a RTOS then they would likely redefine the typedef to be - a semaphore/mutex type of their RTOS. Use the macro below to set the type that will be used for the locks. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_TYPE bsp_lock_t - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to define the functions - that will handle the locking and unlocking. These functions should be defined below. - If BSP_CFG_USER_LOCKING_ENABLED is != 0: - R_BSP_HardwareLock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION(mcu_lock_t hw_index) - R_BSP_HardwareUnlock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION(mcu_lock_t hw_index) - NOTE:With these functions the index into the array holding the global hardware locks is passed as the parameter. - R_BSP_SoftwareLock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - R_BSP_SoftwareUnlock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - NOTE:With these functions the actual address of the lock to use is passed as the parameter. - NOTE: These functions must return a boolean. If lock was obtained or released successfully then return true. Else, - return false. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION my_hw_locking_function -#define BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION my_hw_unlocking_function -#define BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION my_sw_locking_function -#define BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION my_sw_unlocking_function - -/* If the user would like to determine if a warm start reset has occurred, then they may enable one or more of the following - * callback definitions AND provide a call back function name for the respective callback function (to be defined by the user). - * Setting BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED = 1 will result in a callback to the user defined my_sw_warmstart_prec_function - * just prior to the initialization of the C runtime environment by resetprg. - * - * Setting BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED = 1 will result in a callback to the user defined my_sw_warmstart_postc_function - * just after the initialization of the C runtime environment by resetprg. - */ -#define BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_PRE_C_FUNCTION my_sw_warmstart_prec_function - -#define BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_POST_C_FUNCTION my_sw_warmstart_postc_function - -/* By default FIT modules will check input parameters to be valid. This is helpful during development but some users - will want to disable this for production code. The reason for this would be to save execution time and code space. - This macro is a global setting for enabling or disabling parameter checking. Each FIT module will also have its - own local macro for this same purpose. By default the local macros will take the global value from here though - they can be overridden. Therefore, the local setting has priority over this global setting. Disabling parameter - checking should only used when inputs are known to be good and the increase in speed or decrease in code space is - needed. - 0 = Global setting for parameter checking is disabled. - 1 = Global setting for parameter checking is enabled (Default). -*/ -#define BSP_CFG_PARAM_CHECKING_ENABLE (1) - -/* This macro is used to define the voltage that is supplied to the MCU (Vcc). This macro is defined in millivolts. This - macro does not actually change anything on the MCU. Some FIT modules need this information so it is defined here. */ -#define BSP_CFG_MCU_VCC_MV (3300) - -/* For some BSP functions, it is necessary to ensure that, while these functions are executing, interrupts from other - FIT modules do not occur. By controlling the IPL, these functions disable interrupts that are at or below the - specified interrupt priority level. - This macro sets the IPL. Range is 0x0 - 0xF. - Please set this macro more than IPR for other FIT module interrupts. - The default value is 0xF (maximum value). - Don't change if there is no special processing with higher priority than all fit modules. -*/ -#define BSP_CFG_FIT_IPL_MAX (0xF) - -/* This macro is used to select which SCI channel used for debug serial terminal. - */ -#define MY_BSP_CFG_SERIAL_TERM_SCI (0) - -#endif /* R_BSP_CONFIG_REF_HEADER_FILE */ - - - diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_config/r_bsp_config_readme.txt b/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_config/r_bsp_config_readme.txt deleted file mode 100644 index 6a9002cf4f3..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_config/r_bsp_config_readme.txt +++ /dev/null @@ -1,12 +0,0 @@ -FIT r_config folder -------------------- -The purpose of the r_config folder is to provide one place where the user can store all of their FIT configuration -files. Putting the files in one place makes them easy to find, backup, and put in a version control system. - -FIT Modules are distributed with a reference configuration file. These files end with '_reference.h'. For example, -the reference configuration file for the r_bsp is named r_bsp_config_reference.h. Reference configuration files are -provided so that the user always has a known-good configuration to revert to. When adding a FIT Module to a project the -user should copy this reference configuration file to this folder and remove '_reference' from the filename -(r_bsp_config_reference.h is renamed to r_bsp_config.h). For the r_bsp the reference configuration file can be found in -the 'board' folder for the currently chosen development board. For other FIT Modules the reference configuration file -can be found in the 'ref' folder of the FIT Module. diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_config/r_byteq_config.h b/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_config/r_byteq_config.h deleted file mode 100644 index 0b4d4f9bb52..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_config/r_byteq_config.h +++ /dev/null @@ -1,59 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_byteq_config.h -* Description : Configures the byte queue memory allocation -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 24.07.2013 1.00 Initial Release -* : 11.21.2014 1.20 Removed dependency to BSP -* : 30.09.2015 1.50 Added dependency to BSP -***********************************************************************************************************************/ -#ifndef BYTEQ_CONFIG_H -#define BYTEQ_CONFIG_H - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - Available settings: - BSP_CFG_PARAM_CHECKING_ENABLE: - Utilizes the system default setting - 1: - Includes parameter checking - 0: - Compiles out parameter checking -*/ -#define BYTEQ_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY IF SHOULD USE MALLOC() TO ALLOCATE MEMORY FOR QUEUE CONTROL BLOCKS */ -#define BYTEQ_CFG_USE_HEAP_FOR_CTRL_BLKS (0) - -/* SPECIFY NUMBER OF STATIC QUEUE CONTROL BLOCKS TO SUPPORT */ -/* valid only when BYTEQ_USE_HEAP_FOR_CTRL_BLKS is set to 0 */ -#define BYTEQ_CFG_MAX_CTRL_BLKS (4) - - -#endif /* BYTEQ_CONFIG_H */ diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_config/r_ether_rx_config.h b/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_config/r_ether_rx_config.h deleted file mode 100644 index 49178619185..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_config/r_ether_rx_config.h +++ /dev/null @@ -1,118 +0,0 @@ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_ether_rx_config.h - * Version : 1.04 - * Description : Ethernet module device driver - ***********************************************************************************************************************/ -/********************************************************************************************************************** - * History : DD.MM.YYYY Version Description - * : 22.07.2014 1.00 First Release - * : 31.03.2016 1.01 Added changes for RX63N. - * : 01.10.2016 1.02 Added changes for RX65N. - * : 01.10.2017 1.03 Added changes for RX65N-2MB. - * : 08.01.2018 1.04 Changed comment. - ***********************************************************************************************************************/ - -/* Guards against multiple inclusion */ -#ifndef R_ETHER_RX_CONFIG_H - #define R_ETHER_RX_CONFIG_H - -/*********************************************************************************************************************** - Macro definitions - ***********************************************************************************************************************/ - -/* Ethernet interface select. - 0 = MII (Media Independent Interface) - 1 = RMII (Reduced Media Independent Interface) - */ - #define ETHER_CFG_MODE_SEL (1) - -/* PHY-LSI address setting for ETHER0/1. - Please set the value 31 ETHER_CFG_CH0_PHY_ADDRESS when use default setting of the RSK+RX63N. - Please set the value 30 ETHER_CFG_CH0_PHY_ADDRESS when use default setting of the RSK+RX65N/RSK+RX65N_2MB. - Please set the value 0 ETHER_CFG_CH0_PHY_ADDRESS and value 1 ETHER_CFG_CH1_PHY_ADDRESS when use default setting of the RSK+RX64M/RSK+RX71M. - */ - #define ETHER_CFG_CH0_PHY_ADDRESS (0) /* Please define the PHY-LSI address in the range of 0-31. */ - #define ETHER_CFG_CH1_PHY_ADDRESS (1) /* Please define the PHY-LSI address in the range of 0-31. */ - -/* The number of Rx descriptors. */ - #define ETHER_CFG_EMAC_RX_DESCRIPTORS (1) - -/* The number of Tx descriptors. */ - #define ETHER_CFG_EMAC_TX_DESCRIPTORS (1) - -/* Please define the size of the sending and receiving buffer in the value where one frame can surely be stored - because the driver is single-frame/single-buffer processing. */ - #define ETHER_CFG_BUFSIZE (1536) /* Must be 32-byte aligned */ - -/* EINT interrupt priority level. This definition is not used when EINT interrupt is assigned to Group interrupt. */ - #define ETHER_CFG_EINT_INT_PRIORITY (2) /* Please define the interruption level within the range of 1-15. */ - -/* Group AL1 interrupt priority level. This definition is not used when EINT interrupt is assigned to Peripheral - interrupt. */ - #define ETHER_CFG_AL1_INT_PRIORTY (2) /* Please define the interruption level within the range of 1-15. */ - -/* The register bus of PHY0/1 for ETHER0/1 select - 0 = The access of the register of PHY uses ETHER0. - 1 = The access of the register of PHY uses ETHER1. - - Please set the value 0 ETHER_CFG_CH0_PHY_ACCESS when use default setting of the RSK+RX63N. - Please set the value 0 ETHER_CFG_CH0_PHY_ACCESS when use default setting of the RSK+RX65N/RSK+RX65N_2MB. - Please set the value 1 ETHER_CFG_CH0_PHY_ACCESS and ETHER_CFG_CH1_PHY_ACCESS when use default setting of the RSK+RX64M/RSK+RX71M. - */ - #define ETHER_CFG_CH0_PHY_ACCESS (0) - #define ETHER_CFG_CH1_PHY_ACCESS (1) - -/* Define the access timing of MII/RMII register */ - #define ETHER_CFG_PHY_MII_WAIT (8) /* Plese define the value of 1 or more */ - -/* Define the waiting time for reset completion of PHY-LSI */ - #define ETHER_CFG_PHY_DELAY_RESET (0x00020000L) - -/** - * Link status read from LMON bit of ETHERC PSR register. The state is hardware dependent. - */ - #define ETHER_CFG_LINK_PRESENT (1) - -/* Use LINKSTA signal for detect link status changes - 0 = unused (use PHY-LSI status register) - 1 = use (use LINKSTA signal) - */ - #define ETHER_CFG_USE_LINKSTA (1) /* This setting is reflected in all channels */ - -/* Definition of whether or not to use KSZ8041NL of the Micrel Inc. - 0 = unused - 1 = use - */ - #define ETHER_CFG_USE_PHY_KSZ8041NL (0) - -/*********************************************************************************************************************** - Typedef definitions - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global variables - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global functions (to be accessed by other files) - ***********************************************************************************************************************/ - -#endif /* R_ETHER_RX_CONFIG_H */ diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_config/r_flash_rx_config.h b/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_config/r_flash_rx_config.h deleted file mode 100644 index fbf916a0e97..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_config/r_flash_rx_config.h +++ /dev/null @@ -1,116 +0,0 @@ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_flash_rx_config_reference.h - * Description : Configures the FLASH API module for RX200 and RX600 Series MCU's. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* 12.04.2014 1.00 First Release -* 22.12.2014 1.10 Added flash type usage comments. -* 25.06.2015 1.20 Added FLASH_CFG_CODE_FLASH_RUN_FROM_ROM. -* : 12.10.2016 2.00 Modified for BSPless operation (added FLASH_CFG_USE_FIT_BSP). -***********************************************************************************************************************/ -#ifndef FLASH_CONFIG_HEADER_FILE -#define FLASH_CONFIG_HEADER_FILE - -/* Set the following value to 0 when building without using the FIT BSP Module */ -#define FLASH_CFG_USE_FIT_BSP (1) - - -/*********************************************************************************************************************** - Configuration Options - ***********************************************************************************************************************/ -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting - * Setting to 1 includes parameter checking; 0 compiles out parameter checking - */ -#define FLASH_CFG_PARAM_CHECKING_ENABLE (1) - - -/****************************************************************************** - ENABLE CODE FLASH PROGRAMMING -******************************************************************************/ -/* If you are only using data flash, set this to 0. - * Setting to 1 includes code to program the ROM area. When programming ROM, - * code must be executed from RAM, except under certain restrictions for flash - * type 3 (see section 2.14 in App Note). See section 2.13 in the App Note for - * details on how to set up code and the linker to execute code from RAM. - */ -#define FLASH_CFG_CODE_FLASH_ENABLE (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING DATA FLASH OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces data flash API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, data flash operations return immediately after the operation has been - * started. Notification of the operation completion is done via the callback - * function. - */ -#define FLASH_CFG_DATA_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING CODE FLASH (ROM) OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces ROM API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, ROM operations return immediately after the operation has been started. - * Notification of the operation completion is done via the callback function. - * When reprogramming ROM, THE RELOCATABLE VECTOR TABLE AND CORRESPONDING - * INTERRUPT ROUTINES MUST BE IN RAM. - * See sections 2.16 Usage Notes in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE CODE FLASH SELF-PROGRAMMING -******************************************************************************/ -/* Set this to 0 when programming code flash while executing in RAM. - * Set this to 1 when programming code flash while executing from another - * segment in ROM (possible only with RX64M, RX71M, RX65N-2 groups). - * See section 2.14 in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_RUN_FROM_ROM (0) - - -/****************************************************************************** - SET IPL OF FLASH READY INTERRUPT -******************************************************************************/ -#define FLASH_CFG_FLASH_READY_IPL (5) // Flash type 2 only - - -/****************************************************************************** - ENABLE OR DISABLE LOCK BIT PROTECTION -******************************************************************************/ -/* Each erasure block has a corresponding lock bit that can be used to - * protect that block from being programmed/erased after the lock bit is - * set. The use of lock bits can be used or ignored. - * Setting this to 1 will cause lock bits to be ignored and programs/erases to a - * block will not be limited. - * Setting this to 0 will cause lock bits to be used as the user configures through - * the Control command. This only applies to ROM as the DF does not have lock bits. - */ -#define FLASH_CFG_IGNORE_LOCK_BITS (1) // Flash type 2 only - - -#endif /* FLASH_CONFIG_HEADER_FILE */ diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_config/r_s12ad_rx_config.h b/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_config/r_s12ad_rx_config.h deleted file mode 100644 index 0202bf133a4..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_config/r_s12ad_rx_config.h +++ /dev/null @@ -1,53 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_s12ad_rx_config.h -* Description : Configures the 12-bit A/D driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 22.07.2013 1.00 Initial Release. -* 21.04.2014 1.20 Updated for RX210 advanced features; RX110/63x support. -***********************************************************************************************************************/ -#ifndef S12AD_CONFIG_H -#define S12AD_CONFIG_H - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* - * SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting. - * Setting to 1 includes parameter checking; 0 compiles out parameter checking. - */ -#define ADC_CFG_PARAM_CHECKING_ENABLE BSP_CFG_PARAM_CHECKING_ENABLE - - -/* - * RX210 Series only; Temperature Sensor Programmable Gain Amplifier (PGA) - * SELECT PGA GAIN TO MATCH AVCC0 VOLTAGE RANGE: - * 0: 1.8V <= AVcc0 < 2.7V; default; good for all actual voltages - * 1: 2.7V <= AVcc0 < 3.6V - * 2: 3.6V <= AVcc0 < 4.5V - * 3: 4.5V <= AVcc0 <= 5.5V - */ -#define ADC_CFG_PGA_GAIN (0) - - -#endif /* S12AD_CONFIG_H */ diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_config/r_sci_rx_config.h b/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_config/r_sci_rx_config.h deleted file mode 100644 index 4766e45550a..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_config/r_sci_rx_config.h +++ /dev/null @@ -1,171 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_config.h -* Description : Configures the SCI driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 25.09.2013 1.00 Initial Release -* 17.04.2014 1.20 Added comments for new RX110 support. -* 02.07.2014 1.30 Fixed bug that caused Group12 rx errors to only be enabled for channel 2. -* 25.11.2014 1.40 Added comments for RX113 support -* 30.09.2015 1.70 Added comments for RX23T support -* 01.10.2016 1.80 Added support for RX65N (comments and TX/RX FIFO THRESHOLD options) -* 19.12.2016 1.90 Added comments for RX24U support -* 07.03.2017 2.00 Added comments for RX130-512KB support -***********************************************************************************************************************/ -#ifndef SCI_CONFIG_H -#define SCI_CONFIG_H - -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING */ -/* Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting */ -/* Setting to 1 includes parameter checking; 0 compiles out parameter checking */ -#define SCI_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY WHETHER TO INCLUDE CODE FOR DIFFERENT SCI MODES */ -/* Setting an equate to 1 includes code specific to that mode. */ -#define SCI_CFG_ASYNC_INCLUDED (1) -#define SCI_CFG_SYNC_INCLUDED (0) -#define SCI_CFG_SSPI_INCLUDED (0) - -/* SPECIFY BYTE VALUE TO TRANSMIT WHILE CLOCKING IN DATA IN SSPI MODES */ -#define SCI_CFG_DUMMY_TX_BYTE (0xFF) - -/* SPECIFY CHANNELS TO INCLUDE SOFTWARE SUPPORT FOR 1=included, 0=not */ -/* - * NOTE: If using ASYNC mode, adjust BYTEQ_CFG_MAX_CTRL_BLKS in r_byteq_config.h - * to provide 2 queues per channel (static mode only). - * * = port connector RDKRX63N, RSKRX210, RSKRX11x - * u = channel used by the USB-UART port (G1CUSB0) - * a = this channel is used only for RX130-512KB - * RX MCU supported channels - * - * CH# 110 111 113 130 210 230 231 23T 24T 24U 63N 631 64M 71M 65N - * --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- - * CH0 X Xa X* X X X* X X X X - * CH1 X X* X* Xu X X X Xu Xu Xu X X X X X - * CH2 X X X X X Xu - * CH3 X X X X X - * CH4 X X X X X - * CH5 X X X X X X Xu X X X X X X X X - * CH6 X X X X X X X X X X X X - * CH7 X X Xu Xu X - * CH8 X Xa X X X X X X X - * CH9 X Xa X X X X X X X - * CH10 X X X - * CH11 X X X X - * CH12 X X X X X X X X X X X X -*/ - -#define SCI_CFG_CH0_INCLUDED (1) -#define SCI_CFG_CH1_INCLUDED (0) -#define SCI_CFG_CH2_INCLUDED (0) -#define SCI_CFG_CH3_INCLUDED (0) -#define SCI_CFG_CH4_INCLUDED (0) -#define SCI_CFG_CH5_INCLUDED (0) -#define SCI_CFG_CH6_INCLUDED (0) -#define SCI_CFG_CH7_INCLUDED (0) -#define SCI_CFG_CH8_INCLUDED (0) -#define SCI_CFG_CH9_INCLUDED (0) -#define SCI_CFG_CH10_INCLUDED (0) -#define SCI_CFG_CH11_INCLUDED (0) -#define SCI_CFG_CH12_INCLUDED (0) - -/* SPECIFY ASYNC MODE TX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_TX_BUFSIZ (80) -#define SCI_CFG_CH1_TX_BUFSIZ (80) -#define SCI_CFG_CH2_TX_BUFSIZ (80) -#define SCI_CFG_CH3_TX_BUFSIZ (80) -#define SCI_CFG_CH4_TX_BUFSIZ (80) -#define SCI_CFG_CH5_TX_BUFSIZ (80) -#define SCI_CFG_CH6_TX_BUFSIZ (80) -#define SCI_CFG_CH7_TX_BUFSIZ (80) -#define SCI_CFG_CH8_TX_BUFSIZ (80) -#define SCI_CFG_CH9_TX_BUFSIZ (80) -#define SCI_CFG_CH10_TX_BUFSIZ (80) -#define SCI_CFG_CH11_TX_BUFSIZ (80) -#define SCI_CFG_CH12_TX_BUFSIZ (80) - -/* SPECIFY ASYNC MODE RX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_RX_BUFSIZ (80) -#define SCI_CFG_CH1_RX_BUFSIZ (80) -#define SCI_CFG_CH2_RX_BUFSIZ (80) -#define SCI_CFG_CH3_RX_BUFSIZ (80) -#define SCI_CFG_CH4_RX_BUFSIZ (80) -#define SCI_CFG_CH5_RX_BUFSIZ (80) -#define SCI_CFG_CH6_RX_BUFSIZ (80) -#define SCI_CFG_CH7_RX_BUFSIZ (80) -#define SCI_CFG_CH8_RX_BUFSIZ (80) -#define SCI_CFG_CH9_RX_BUFSIZ (80) -#define SCI_CFG_CH10_RX_BUFSIZ (80) -#define SCI_CFG_CH11_RX_BUFSIZ (80) -#define SCI_CFG_CH12_RX_BUFSIZ (80) - -/* -* ENABLE TRANSMIT END INTERRUPT (ASYNCHRONOUS) -* This interrupt only occurs when the last bit of the last byte of data -* has been sent and the transmitter has become idle. The interrupt calls -* the user's callback function specified in R_SCI_Open() and passes it an -* SCI_EVT_TEI event. A typical use of this feature is to disable an external -* transceiver to save power. It would then be up to the user's code to -* re-enable the transceiver before sending again. Not including this feature -* reduces code space used by the interrupt. Note that this equate is only -* for including the TEI code. The interrupt itself must be enabled using an -* R_SCI_Control(hdl, SCI_CMD_EN_TEI, NULL) call. -*/ -#define SCI_CFG_TEI_INCLUDED (0) /* 1=included, 0=not */ - -/* -* SET GROUP12 (RECEIVER ERROR) INTERRUPT PRIORITY; RX63N/631 ONLY -* This #define sets the priority level for the interrupt that handles -* receiver overrun, framing, and parity errors for all SCI channels -* on the RX63N/631. It is ignored for all other parts. -*/ -#define SCI_CFG_RXERR_PRIORITY (3) /* (RX63N/631 ONLY) 1 lowest, 15 highest */ - -/* -* SET GROUPBL0 (ERI, TEI) INTERRUPT PRIORITY; RX64M/RX71M/RX65N ONLY -* SET GROUPBL1, GROUPAL0 (ERI,TEI) INTERRUPT PRIORITY; RX65N ONLY -* This sets the priority level for receiver overrun, framing, and parity errors -* as well as TEI interrupts for all SCI channels. -*/ -#define SCI_CFG_ERI_TEI_PRIORITY (3) /* (RX64M/RX71M/RX65N ONLY) 1 lowest, 15 highest */ - -/* ENABLE TX/RX FIFO; (SCIi supported MCU ONLY) 1=included, 0=not */ -#define SCI_CFG_CH10_FIFO_INCLUDED (0) -#define SCI_CFG_CH11_FIFO_INCLUDED (0) - -/* SET TX FIFO THRESHOLD; (SCIi supported MCU ONLY) 0 lowest, 15 highest */ -/* TX FIFO THRESHOLD is invalid in Clock Synchronous Mode and Simple SPI Mode. */ -/* Set the same value for TX FIFO THRESHOLD and RX FIFO THRESHOLD in Clock Synchronous Mode and Simple SPI Mode. */ -#define SCI_CFG_CH10_TX_FIFO_THRESH (8) -#define SCI_CFG_CH11_TX_FIFO_THRESH (8) - -/* SET RX FIFO THRESHOLD; (SCIi supported MCU ONLY) 1 lowest, 15 highest */ -#define SCI_CFG_CH10_RX_FIFO_THRESH (8) -#define SCI_CFG_CH11_RX_FIFO_THRESH (8) - - -#endif /* SCI_CONFIG_H */ diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_pincfg/r_pinset.c b/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_pincfg/r_pinset.c deleted file mode 100644 index 4c59e214125..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_pincfg/r_pinset.c +++ /dev/null @@ -1,115 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_pinset.c -* Version : 1.2.5 -* Device(s) : R5F563NYDxFP -* Tool-Chain : RXC -* Description : Setting of port and mpc registers -* Creation Date: 25 9 2018 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_pinset.h" -#include "platform.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: R_ETHER_PinSet_ETHERC_RMII -* Description : This function initializes pins for r_ether_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_ETHER_PinSet_ETHERC_RMII(void) -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set REF50CK pin */ - MPC.PB2PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B2 = 1U; - - /* Set RMII_TXD_EN pin */ - MPC.PB4PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B4 = 1U; - - /* Set RMII_TXD1 pin */ - MPC.PB6PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B6 = 1U; - - /* Set RMII_TXD0 pin */ - MPC.PB5PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B5 = 1U; - - /* Set RMII_RXD1 pin */ - MPC.PB0PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B0 = 1U; - - /* Set RMII_RXD0 pin */ - MPC.PB1PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B1 = 1U; - - /* Set RMII_RX_ER pin */ - MPC.PB3PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B3 = 1U; - - /* Set RMII_CRS_DV pin */ - MPC.PB7PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B7 = 1U; - - /* Set ET_MDC pin */ - MPC.PA4PFS.BYTE = 0x11U; - PORTA.PMR.BIT.B4 = 1U; - - /* Set ET_MDIO pin */ - MPC.PA3PFS.BYTE = 0x11U; - PORTA.PMR.BIT.B3 = 1U; - - /* Set ET_LINKSTA pin */ - MPC.PA5PFS.BYTE = 0x11U; - PORTA.PMR.BIT.B5 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - -/*********************************************************************************************************************** -* Function Name: R_SCI_PinSet_SCI0 -* Description : This function initializes pins for r_sci_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_SCI_PinSet_SCI0(void) -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set RXD0/SMISO0 pin */ - MPC.P21PFS.BYTE = 0x0AU; - PORT2.PMR.BIT.B1 = 1U; - - /* Set TXD0/SMOSI0 pin */ - MPC.P20PFS.BYTE = 0x0AU; - PORT2.PMR.BIT.B0 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_pincfg/r_pinset.h b/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_pincfg/r_pinset.h deleted file mode 100644 index 09ce0a16272..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/r_pincfg/r_pinset.h +++ /dev/null @@ -1,42 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_pinset.h -* Version : 1.2.5 -* Device(s) : R5F563NYDxFP -* Tool-Chain : RXC -* Description : Setting of port and mpc registers -* Creation Date: 25 9 2018 -***********************************************************************************************************************/ - -#ifndef R_FIT_PINSET_H -#define R_FIT_PINSET_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -void R_ETHER_PinSet_ETHERC_RMII(void); -void R_SCI_PinSet_SCI0(void); - -#endif diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/src/attention!.txt b/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/src/attention!.txt deleted file mode 100644 index cf5eb1abadb..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-csplus/src/attention!.txt +++ /dev/null @@ -1,64 +0,0 @@ -Please note that the following folders in the project window of IDEs are -so called 'linked' folders. - --------------------------------------------- -Linked folders in the project window of IDEs --------------------------------------------- - -All -~~~ -src/FIT_modified_code/r_bsp -src/FIT_modified_code/r_byteq -src/FIT_modified_code/r_cmt_rx -src/FIT_modified_code/r_ether_rx -src/FIT_modified_code/r_flash_rx -src/FIT_modified_code/r_sci_iic_rx -src/FIT_modified_code/r_sci_rx -src/amazon_freertos_common - -CC-RX/e2 studio -~~~~~~~~~~~~~~~ -src/FITConfigurator/r_config -src/FITConfigurator/r_pinconfig - -CC-RX/CS+ -~~~~~~~~~ -src/FIT_setting_files/r_config -src/FIT_setting_files/r_pinconfig - -GNURX/e2 studio -~~~~~~~~~~~~~~~ -src/FIT_setting_files/r_config -src/FIT_setting_files/r_pinconfig - ----------------------------------------------------------- -Folders on the File System of the WINDOWS Operating System ----------------------------------------------------------- - -All -~~~ -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_bsp -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_byteq -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_cmt_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_ether_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_flash_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_iic_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/amazon_freertos_common - -CC-RX/e2 studio -~~~~~~~~~~~~~~~ -amazon-freertos/demos/renesas/XXXX/ccrx-e2studio/r_config -amazon-freertos/demos/renesas/XXXX/ccrx-e2studio/r_pincfg - -CC-RX/CS+ -~~~~~~~~~ -amazon-freertos/demos/renesas/XXXX/ccrx-csplus/r_config -amazon-freertos/demos/renesas/XXXX/ccrx-csplus/r_pincfg - -GNURX/e2 studio -~~~~~~~~~~~~~~~ -amazon-freertos/demos/renesas/XXXX/gnurx-e2studio/r_config -amazon-freertos/demos/renesas/XXXX/gnurx-e2studio/r_pincfg - -[EOF] diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.cproject b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.cproject deleted file mode 100644 index baa22f4870c..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.cproject +++ /dev/null @@ -1,159 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.gitignore b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.gitignore deleted file mode 100644 index 11e355d8bc7..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.gitignore +++ /dev/null @@ -1,3 +0,0 @@ -/HardwareDebug/ -/.settings/ -/trash/ \ No newline at end of file diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.project b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.project deleted file mode 100644 index c24f7f92967..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.project +++ /dev/null @@ -1,582 +0,0 @@ - - - aws_demos - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - application_code - 2 - PARENT-1-PROJECT_LOC/common/application_code - - - config_files - 2 - PARENT-1-PROJECT_LOC/common/config_files - - - lib - 2 - virtual:/virtual - - - application_code/common_demos - 2 - virtual:/virtual - - - lib/aws - 2 - virtual:/virtual - - - lib/third_party - 2 - virtual:/virtual - - - src/FITConfigurator - 2 - virtual:/virtual - - - src/FIT_modified_code - 2 - virtual:/virtual - - - src/amazon_freertos_common - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/amazon_freertos_common - - - application_code/common_demos/include - 2 - AWS_IOT_MCU_ROOT/demos/common/include - - - application_code/common_demos/source - 2 - virtual:/virtual - - - lib/aws/FreeRTOS - 2 - AWS_IOT_MCU_ROOT/lib/FreeRTOS - - - lib/aws/FreeRTOS-Plus-TCP - 2 - AWS_IOT_MCU_ROOT/lib/FreeRTOS-Plus-TCP - - - lib/aws/bufferpool - 2 - AWS_IOT_MCU_ROOT/lib/bufferpool - - - lib/aws/crypto - 2 - AWS_IOT_MCU_ROOT/lib/crypto - - - lib/aws/greengrass - 2 - AWS_IOT_MCU_ROOT/lib/greengrass - - - lib/aws/include - 2 - AWS_IOT_MCU_ROOT/lib/include - - - lib/aws/mqtt - 2 - AWS_IOT_MCU_ROOT/lib/mqtt - - - lib/aws/pkcs11 - 2 - AWS_IOT_MCU_ROOT/lib/pkcs11/portable/renesas/rx63n-gr-sakura - - - lib/aws/secure_sockets - 2 - AWS_IOT_MCU_ROOT/lib/secure_sockets/portable/renesas/rx63n-gr-sakura - - - lib/aws/shadow - 2 - AWS_IOT_MCU_ROOT/lib/shadow - - - lib/aws/tls - 2 - AWS_IOT_MCU_ROOT/lib/tls - - - lib/aws/utils - 2 - AWS_IOT_MCU_ROOT/lib/utils - - - lib/aws/wifi - 2 - AWS_IOT_MCU_ROOT/lib/wifi/portable/renesas/rx63n-gr-sakura - - - lib/third_party/jsmn - 2 - AWS_IOT_MCU_ROOT/lib/third_party/jsmn - - - lib/third_party/mbedtls - 2 - virtual:/virtual - - - lib/third_party/mcu_vendor - 2 - virtual:/virtual - - - lib/third_party/pkcs11 - 2 - AWS_IOT_MCU_ROOT/lib/third_party/pkcs11 - - - lib/third_party/tinycbor - 2 - AWS_IOT_MCU_ROOT/lib/third_party/tinycbor - - - src/FITConfigurator/UNUSED_generated_code - 2 - virtual:/virtual - - - src/FITConfigurator/attention!.txt - 1 - PROJECT_LOC/src/attention!.txt - - - src/FITConfigurator/r_config - 2 - PROJECT_LOC/r_config - - - src/FITConfigurator/r_pincfg - 2 - PROJECT_LOC/r_pincfg - - - src/FIT_modified_code/Please exclude unnecessary r_xxx from build - 1 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/.files/Please%20exclude%20unnecessary%20r_xxx%20from%20build - - - src/FIT_modified_code/attention!.txt - 1 - PROJECT_LOC/src/attention!.txt - - - src/FIT_modified_code/r_bsp - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_bsp - - - src/FIT_modified_code/r_byteq - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_byteq - - - src/FIT_modified_code/r_cmt_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_cmt_rx - - - src/FIT_modified_code/r_ether_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_ether_rx - - - src/FIT_modified_code/r_flash_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_flash_rx - - - src/FIT_modified_code/r_s12ad_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_s12ad_rx - - - src/FIT_modified_code/r_sci_iic_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_iic_rx - - - src/FIT_modified_code/r_sci_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_rx - - - application_code/common_demos/include/aws_application_version.h - 1 - AWS_IOT_MCU_ROOT/demos/common/include/aws_application_version.h - - - application_code/common_demos/include/aws_clientcredential_keys.h - 1 - AWS_IOT_MCU_ROOT/demos/common/include/aws_clientcredential_keys.h - - - application_code/common_demos/include/aws_dev_mode_key_provisioning.h - 1 - AWS_IOT_MCU_ROOT/demos/common/include/aws_dev_mode_key_provisioning.h - - - application_code/common_demos/source/aws_demo_runner.c - 1 - AWS_IOT_MCU_ROOT/demos/common/demo_runner/aws_demo_runner.c - - - application_code/common_demos/source/aws_dev_mode_key_provisioning.c - 1 - AWS_IOT_MCU_ROOT/demos/common/devmode_key_provisioning/aws_dev_mode_key_provisioning.c - - - application_code/common_demos/source/aws_greengrass_discovery_demo.c - 1 - AWS_IOT_MCU_ROOT/demos/common/greengrass_connectivity/aws_greengrass_discovery_demo.c - - - application_code/common_demos/source/aws_hello_world.c - 1 - AWS_IOT_MCU_ROOT/demos/common/mqtt/aws_hello_world.c - - - application_code/common_demos/source/aws_logging_task_dynamic_buffers.c - 1 - AWS_IOT_MCU_ROOT/demos/common/logging/aws_logging_task_dynamic_buffers.c - - - application_code/common_demos/source/aws_shadow_lightbulb_on_off.c - 1 - AWS_IOT_MCU_ROOT/demos/common/shadow/aws_shadow_lightbulb_on_off.c - - - application_code/common_demos/source/aws_subscribe_publish_loop.c - 1 - AWS_IOT_MCU_ROOT/demos/common/mqtt/aws_subscribe_publish_loop.c - - - application_code/common_demos/source/aws_tcp_echo_client_separate_tasks.c - 1 - AWS_IOT_MCU_ROOT/demos/common/tcp/aws_tcp_echo_client_separate_tasks.c - - - application_code/common_demos/source/aws_tcp_echo_client_single_task.c - 1 - AWS_IOT_MCU_ROOT/demos/common/tcp/aws_tcp_echo_client_single_task.c - - - lib/aws/pkcs11/aws_pkcs11_mbedtls.c - 1 - AWS_IOT_MCU_ROOT/lib/pkcs11/mbedtls/aws_pkcs11_mbedtls.c - - - lib/third_party/mbedtls/include - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mbedtls/include - - - lib/third_party/mbedtls/source - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mbedtls/library - - - lib/third_party/mcu_vendor/renesas - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas - - - src/FITConfigurator/UNUSED_generated_code/r_bsp - 2 - PROJECT_LOC/r_bsp - - - src/FITConfigurator/UNUSED_generated_code/r_byteq - 2 - PROJECT_LOC/r_byteq - - - src/FITConfigurator/UNUSED_generated_code/r_cmt_rx - 2 - PROJECT_LOC/r_cmt_rx - - - src/FITConfigurator/UNUSED_generated_code/r_ether_rx - 2 - PROJECT_LOC/r_ether_rx - - - src/FITConfigurator/UNUSED_generated_code/r_flash_rx - 2 - PROJECT_LOC/r_flash_rx - - - src/FITConfigurator/UNUSED_generated_code/r_sci_iic_rx - 2 - PROJECT_LOC/r_sci_iic_rx - - - src/FITConfigurator/UNUSED_generated_code/r_sci_rx - 2 - PROJECT_LOC/r_sci_rx - - - - - 1545534815999 - - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-aws_demos_build_path_check_and_make.bat - - - - 1545534816005 - - 10 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-true-r_bsp|r_ether_rx|r_flash_rx|r_byteq|r_sci_rx|r_sci_iic_rx|r_cmt_rx|r_config|r_pincfg|r_s12ad_rx - - - - 1537786054362 - src - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-attention!.txt - - - - 1536904742727 - src/amazon_freertos_common/compiler_support - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-ccrx - - - - 1536927312156 - src/amazon_freertos_common/network_support - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-onchip_rx_ether - - - - 1513514756448 - lib/aws/FreeRTOS/portable - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-Renesas - - - - 1513514757749 - lib/aws/FreeRTOS/portable - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-MemMang - - - - 1513514757807 - lib/aws/FreeRTOS/portable - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-* - - - - 1509693556349 - lib/aws/include/private - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-*.c - - - - 1536905062046 - lib/third_party/mcu_vendor/renesas - 10 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-tools - - - - 1536291011837 - src/FIT_modified_code/r_bsp/board - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-true-all|rx63n|generic_rx63n - - - - 1536291077902 - src/FIT_modified_code/r_bsp/mcu - 9 - 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9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx63n - - - - 1564441820170 - src/FIT_modified_code/r_sci_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx63n - - - - 1515504232772 - lib/aws/FreeRTOS-Plus-TCP/source/portable/BufferManagement - 5 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-BufferAllocation_2.c - - - - 1515504311064 - lib/aws/FreeRTOS-Plus-TCP/source/portable/Compiler - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-Renesas - - - - 1515491646756 - lib/aws/FreeRTOS-Plus-TCP/source/portable/NetworkInterface - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-RX - - - - 1537708651935 - src/FIT_modified_code/r_bsp/mcu/rx63n/register_access - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-ccrx - - - - - - AWS_IOT_MCU_ROOT - $%7BPARENT-4-PROJECT_LOC%7D - - - diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/.fit b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/.fit deleted file mode 100644 index 1297c1d00c3..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/.fit +++ /dev/null @@ -1,8 +0,0 @@ -1.0 -RX -RX600 -RX63N -User -Renesas -Žw’肵‚È‚¢ -Žw’肵‚È‚¢ diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/CodeGenerator/cgprojectDatas.datas b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/CodeGenerator/cgprojectDatas.datas deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/Dependency_Scan_Preferences.prefs b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/Dependency_Scan_Preferences.prefs deleted file mode 100644 index 52d4e3fd03b..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/Dependency_Scan_Preferences.prefs +++ /dev/null @@ -1,2 +0,0 @@ -DependecyMode=ScanBuildDep -eclipse.preferences.version=1 diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/com.renesas.cdt.managedbuild.renesas.ccrx.prefs b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/com.renesas.cdt.managedbuild.renesas.ccrx.prefs deleted file mode 100644 index e4449c99ff6..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/com.renesas.cdt.managedbuild.renesas.ccrx.prefs +++ /dev/null @@ -1,6 +0,0 @@ -com.renesas.cdt.managedbuild.renesas.ccrx.common.option.checkRtos=unusedRtos -com.renesas.cdt.managedbuild.renesas.ccrx.rtosConfig.option.cfgFilePath=../generate/${ArtifactName}.cfg -com.renesas.cdt.managedbuild.renesas.ccrx.rtosConfig.option.rtosName=None -com.renesas.cdt.managedbuild.renesas.ccrx.rtosConfig.option.rtosPath= -com.renesas.cdt.managedbuild.renesas.ccrx.rtosConfig.option.rtosVersion= -eclipse.preferences.version=1 diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/conflictresources.xml b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/conflictresources.xml deleted file mode 100644 index f63ca1321f7..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/conflictresources.xml +++ /dev/null @@ -1,494 +0,0 @@ - - - - r_ether_rx - - ETHERC - - ETHERC_MII - UNUSED - - ET_TX_CLK - Unused - OPTIONAL - - - ET_RX_CLK - Unused - OPTIONAL - - - ET_TX_EN - Unused - OPTIONAL - - - ET_ETXD3 - Unused - OPTIONAL - - - ET_ETXD2 - Unused - OPTIONAL - - - ET_ETXD1 - Unused - OPTIONAL - - - ET_ETXD0 - Unused - OPTIONAL - - - ET_TX_ER - Unused - OPTIONAL - - - ET_RX_DV - Unused - OPTIONAL - - - ET_ERXD3 - Unused - OPTIONAL - - - ET_ERXD2 - Unused - OPTIONAL - - - ET_ERXD1 - Unused - OPTIONAL - - - ET_ERXD0 - Unused - OPTIONAL - - - ET_RX_ER - Unused - OPTIONAL - - - ET_CRS - Unused - OPTIONAL - - - ET_COL - Unused - OPTIONAL - - - ET_MDC - Unused - OPTIONAL - - - ET_MDIO - Unused - OPTIONAL - - - ET_LINKSTA - Unused - OPTIONAL - - - ET_EXOUT - Unused - OPTIONAL - - - ET_WOL - Unused - OPTIONAL - - - - ETHERC_RMII - OPTIONAL - - REF50CK - PB2 - OPTIONAL - - - RMII_TXD_EN - PB4 - OPTIONAL - - - RMII_TXD1 - PB6 - OPTIONAL - - - RMII_TXD0 - PB5 - OPTIONAL - - - RMII_RXD1 - PB0 - OPTIONAL - - - RMII_RXD0 - PB1 - OPTIONAL - - - RMII_RX_ER - PB3 - OPTIONAL - - - RMII_CRS_DV - PB7 - OPTIONAL - - - ET_MDC - PA4 - OPTIONAL - - - ET_MDIO - PA3 - OPTIONAL - - - ET_LINKSTA - PA5 - OPTIONAL - - - ET_EXOUT - Unused - OPTIONAL - - - ET_WOL - Unused - OPTIONAL - - - - - - r_sci_rx - - SCI - - SCI0 - OPTIONAL - - SCK0 - Unused - OPTIONAL - - - RXD0/SMISO0 - P21 - OPTIONAL - - - TXD0/SMOSI0 - P20 - OPTIONAL - - - CTS0#/RTS0#/SS0# - Unused - OPTIONAL - - - - SCI1 - UNUSED - - SCK1 - Unused - OPTIONAL - - - RXD1/SMISO1 - Unused - OPTIONAL - - - TXD1/SMOSI1 - Unused - OPTIONAL - - - CTS1#/RTS1#/SS1# - Unused - OPTIONAL - - - - SCI2 - UNUSED - - SCK2 - Unused - OPTIONAL - - - RXD2/SMISO2 - Unused - OPTIONAL - - - TXD2/SMOSI2 - Unused - OPTIONAL - - - CTS2#/RTS2#/SS2# - Unused - OPTIONAL - - - - SCI3 - UNUSED - - SCK3 - Unused - OPTIONAL - - - RXD3/SMISO3 - Unused - OPTIONAL - - - TXD3/SMOSI3 - Unused - OPTIONAL - - - CTS3#/RTS3#/SS3# - Unused - OPTIONAL - - - - SCI5 - UNUSED - - SCK5 - Unused - OPTIONAL - - - RXD5/SMISO5 - Unused - OPTIONAL - - - TXD5/SMOSI5 - Unused - OPTIONAL - - - CTS5#/RTS5#/SS5# - Unused - OPTIONAL - - - - SCI6 - UNUSED - - SCK6 - Unused - OPTIONAL - - - RXD6/SMISO6 - Unused - OPTIONAL - - - TXD6/SMOSI6 - Unused - OPTIONAL - - - CTS6#/RTS6#/SS6# - Unused - OPTIONAL - - - - SCI8 - UNUSED - - SCK8 - Unused - OPTIONAL - - - RXD8/SMISO8/SSCL8 - Unused - OPTIONAL - - - TXD8/SMOSI8/SSDA8 - Unused - OPTIONAL - - - CTS8#/RTS8#/SS8# - Unused - OPTIONAL - - - - SCI9 - UNUSED - - SCK9 - Unused - OPTIONAL - - - RXD9/SMISO9/SSCL9 - Unused - OPTIONAL - - - TXD9/SMOSI9/SSDA9 - Unused - OPTIONAL - - - CTS9#/RTS9#/SS9# - Unused - OPTIONAL - - - - SCI12 - UNUSED - - SCK12 - Unused - OPTIONAL - - - RXD12/SMISO12 - Unused - OPTIONAL - - - TXD12/SMOSI12 - Unused - OPTIONAL - - - CTS12#/RTS12#/SS12# - Unused - OPTIONAL - - - - - - r_s12ad_rx - - S12AD - - S12AD0 - OPTIONAL - - AN000 - Unused - OPTIONAL - - - AN001 - Unused - OPTIONAL - - - AN002 - Unused - OPTIONAL - - - AN003 - Unused - OPTIONAL - - - AN004 - Unused - OPTIONAL - - - AN005 - Unused - OPTIONAL - - - AN006 - Unused - OPTIONAL - - - AN007 - Unused - OPTIONAL - - - AN008 - Unused - OPTIONAL - - - AN009 - Unused - OPTIONAL - - - AN010 - Unused - OPTIONAL - - - AN011 - Unused - OPTIONAL - - - AN012 - Unused - OPTIONAL - - - AN013 - Unused - OPTIONAL - - - ADTRG0# - Unused - OPTIONAL - - - - - diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/e2studio_project.prefs b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/e2studio_project.prefs deleted file mode 100644 index 1c7d26eaa3e..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/e2studio_project.prefs +++ /dev/null @@ -1,3 +0,0 @@ -# -#Fri Aug 17 10:14:32 JST 2018 -activeConfiguration=com.renesas.cdt.managedbuild.renesas.ccrx.hardwaredebug.configuration.216582545 diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/fitsettings.xml b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/fitsettings.xml deleted file mode 100644 index 0af284fce72..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/fitsettings.xml +++ /dev/null @@ -1,960 +0,0 @@ - - - - r_bsp - 3.80 - - - r_ether_rx - 1.15 - - r_ether_rx - 1.00 - 1.00 - r_pinset_type2 - - ETHERC - - ETHERC_MII - UNUSED - - ET_TX_CLK - Unused - PC4 - OPTIONAL - 0 - Unused - 11 - - - ET_RX_CLK - Unused - PB2 - PE5 - OPTIONAL - 0 - Unused - 11 - 11 - - - ET_TX_EN - Unused - PA0 - PB4 - OPTIONAL - 0 - Unused - 11 - 11 - - - ET_ETXD3 - Unused - PC6 - OPTIONAL - 0 - Unused - 11 - - - ET_ETXD2 - Unused - PC5 - OPTIONAL - 0 - Unused - 11 - - - ET_ETXD1 - Unused - PB6 - OPTIONAL - 0 - Unused - 11 - - - ET_ETXD0 - Unused - PB5 - OPTIONAL - 0 - Unused - 11 - - - ET_TX_ER - Unused - PC3 - OPTIONAL - 0 - Unused - 11 - - - ET_RX_DV - Unused - PC2 - OPTIONAL - 0 - Unused - 11 - - - ET_ERXD3 - Unused - PC0 - PE3 - OPTIONAL - 0 - Unused - 11 - 11 - - - ET_ERXD2 - Unused - PC1 - PE4 - OPTIONAL - 0 - Unused - 11 - 11 - - - ET_ERXD1 - Unused - PB0 - OPTIONAL - 0 - Unused - 11 - - - ET_ERXD0 - Unused - PB1 - OPTIONAL - 0 - Unused - 11 - - - ET_RX_ER - Unused - PB3 - OPTIONAL - 0 - Unused - 11 - - - ET_CRS - Unused - PB7 - OPTIONAL - 0 - Unused - 11 - - - ET_COL - Unused - PC7 - OPTIONAL - 0 - Unused - 11 - - - ET_MDC - Unused - PA4 - OPTIONAL - 0 - Unused - 11 - - - ET_MDIO - Unused - PA3 - OPTIONAL - 0 - Unused - 11 - - - ET_LINKSTA - Unused - P54 - PA5 - OPTIONAL - 0 - Unused - 11 - 11 - - - ET_EXOUT - Unused - P55 - PA6 - OPTIONAL - 0 - Unused - 11 - 11 - - - ET_WOL - Unused - PA1 - PA7 - OPTIONAL - 0 - Unused - 11 - 11 - - 0 - - - ETHERC_RMII - OPTIONAL - - REF50CK - Unused - PB2 - PE5 - OPTIONAL - 1 - Unused - 12 - 12 - - - RMII_TXD_EN - Unused - PA0 - PB4 - OPTIONAL - 2 - Unused - 12 - 12 - - - RMII_TXD1 - Unused - PB6 - OPTIONAL - 1 - Unused - 12 - - - RMII_TXD0 - Unused - PB5 - OPTIONAL - 1 - Unused - 12 - - - RMII_RXD1 - Unused - PB0 - OPTIONAL - 1 - Unused - 12 - - - RMII_RXD0 - Unused - PB1 - OPTIONAL - 1 - Unused - 12 - - - RMII_RX_ER - Unused - PB3 - OPTIONAL - 1 - Unused - 12 - - - RMII_CRS_DV - Unused - PB7 - OPTIONAL - 1 - Unused - 12 - - - ET_MDC - Unused - PA4 - OPTIONAL - 1 - Unused - 11 - - - ET_MDIO - Unused - PA3 - OPTIONAL - 1 - Unused - 11 - - - ET_LINKSTA - Unused - P54 - PA5 - OPTIONAL - 2 - Unused - 11 - 11 - - - ET_EXOUT - Unused - P55 - PA6 - OPTIONAL - 0 - Unused - 11 - 11 - - - ET_WOL - Unused - PA1 - PA7 - OPTIONAL - 0 - Unused - 11 - 11 - - 1 - - - - - - r_flash_rx - 3.30 - - - r_byteq - 1.60 - - - r_sci_rx - 2.01 - - r_sci_rx - 1.00 - 1.00 - r_pinset_type2 - - SCI - - SCI0 - OPTIONAL - - SCK0 - Unused - P22 - P34 - OPTIONAL - 0 - Unused - 0A - 0B - - - RXD0/SMISO0 - Unused - P21 - P33 - OPTIONAL - 1 - Unused - 0A - 0B - - - TXD0/SMOSI0 - Unused - P20 - P32 - OPTIONAL - 1 - Unused - 0A - 0B - - - CTS0#/RTS0#/SS0# - Unused - P23 - PJ3 - OPTIONAL - 0 - Unused - 0B - 0B - - 1 - - - SCI1 - UNUSED - - SCK1 - Unused - P17 - P27 - OPTIONAL - 0 - Unused - 0A - 0A - - - RXD1/SMISO1 - Unused - P15 - P30 - OPTIONAL - 0 - Unused - 0A - 0A - - - TXD1/SMOSI1 - Unused - P16 - P26 - OPTIONAL - 0 - Unused - 0A - 0A - - - CTS1#/RTS1#/SS1# - Unused - P14 - P31 - OPTIONAL - 0 - Unused - 0B - 0B - - 0 - - - SCI2 - UNUSED - - SCK2 - Unused - P51 - OPTIONAL - 0 - Unused - 0A - - - RXD2/SMISO2 - Unused - P12 - P52 - OPTIONAL - 0 - Unused - 0A - 0A - - - TXD2/SMOSI2 - Unused - P13 - P50 - OPTIONAL - 0 - Unused - 0A - 0A - - - CTS2#/RTS2#/SS2# - Unused - P54 - OPTIONAL - 0 - Unused - 0B - - 0 - - - SCI3 - UNUSED - - SCK3 - Unused - P15 - P24 - OPTIONAL - 0 - Unused - 0B - 0A - - - RXD3/SMISO3 - Unused - P16 - P25 - OPTIONAL - 0 - Unused - 0B - 0A - - - TXD3/SMOSI3 - Unused - P17 - P23 - OPTIONAL - 0 - Unused - 0B - 0A - - - CTS3#/RTS3#/SS3# - Unused - P26 - OPTIONAL - 0 - Unused - 0B - - 0 - - - SCI5 - UNUSED - - SCK5 - Unused - PA1 - PC1 - PC4 - OPTIONAL - 0 - Unused - 0A - 0A - 0A - - - RXD5/SMISO5 - Unused - PA2 - PA3 - PC2 - OPTIONAL - 0 - Unused - 0A - 0A - 0A - - - TXD5/SMOSI5 - Unused - PA4 - PC3 - OPTIONAL - 0 - Unused - 0A - 0A - - - CTS5#/RTS5#/SS5# - Unused - PA6 - PC0 - OPTIONAL - 0 - Unused - 0B - 0B - - 0 - - - SCI6 - UNUSED - - SCK6 - Unused - PB3 - P34 - OPTIONAL - 0 - Unused - 0B - 0A - - - RXD6/SMISO6 - Unused - PB0 - P33 - OPTIONAL - 0 - Unused - 0B - 0A - - - TXD6/SMOSI6 - Unused - PB1 - P32 - OPTIONAL - 0 - Unused - 0B - 0A - - - CTS6#/RTS6#/SS6# - Unused - PB2 - PJ3 - OPTIONAL - 0 - Unused - 0B - 0A - - 0 - - - SCI8 - UNUSED - - SCK8 - Unused - PC5 - OPTIONAL - 0 - Unused - 0A - - - RXD8/SMISO8/SSCL8 - Unused - PC6 - OPTIONAL - 0 - Unused - 0A - - - TXD8/SMOSI8/SSDA8 - Unused - PC7 - OPTIONAL - 0 - Unused - 0A - - - CTS8#/RTS8#/SS8# - Unused - PC4 - OPTIONAL - 0 - Unused - 0B - - 0 - - - SCI9 - UNUSED - - SCK9 - Unused - PB5 - OPTIONAL - 0 - Unused - 0A - - - RXD9/SMISO9/SSCL9 - Unused - PB6 - OPTIONAL - 0 - Unused - 0A - - - TXD9/SMOSI9/SSDA9 - Unused - PB7 - OPTIONAL - 0 - Unused - 0A - - - CTS9#/RTS9#/SS9# - Unused - PB4 - OPTIONAL - 0 - Unused - 0B - - 0 - - - SCI12 - UNUSED - - SCK12 - Unused - PE0 - OPTIONAL - 0 - Unused - 0C - - - RXD12/SMISO12 - Unused - PE2 - OPTIONAL - 0 - Unused - 0C - - - TXD12/SMOSI12 - Unused - PE1 - OPTIONAL - 0 - Unused - 0C - - - CTS12#/RTS12#/SS12# - Unused - PE3 - OPTIONAL - 0 - Unused - 0C - - 0 - - - - - - r_s12ad_rx - 2.30 - - r_s12ad_rx - 1.00 - 1.00 - r_pinset_type2 - - S12AD - - S12AD0 - OPTIONAL - - AN000 - Unused - P40 - OPTIONAL - 0 - Unused - 80 - - - AN001 - Unused - P41 - OPTIONAL - 0 - Unused - 80 - - - AN002 - Unused - P42 - OPTIONAL - 0 - Unused - 80 - - - AN003 - Unused - P43 - OPTIONAL - 0 - Unused - 80 - - - AN004 - Unused - P44 - OPTIONAL - 0 - Unused - 80 - - - AN005 - Unused - P45 - OPTIONAL - 0 - Unused - 80 - - - AN006 - Unused - P46 - OPTIONAL - 0 - Unused - 80 - - - AN007 - Unused - P47 - OPTIONAL - 0 - Unused - 80 - - - AN008 - Unused - PD0 - OPTIONAL - 0 - Unused - 80 - - - AN009 - Unused - PD1 - OPTIONAL - 0 - Unused - 80 - - - AN010 - Unused - PD2 - OPTIONAL - 0 - Unused - 80 - - - AN011 - Unused - PD3 - OPTIONAL - 0 - Unused - 80 - - - AN012 - Unused - PD4 - OPTIONAL - 0 - Unused - 80 - - - AN013 - Unused - PD5 - OPTIONAL - 0 - Unused - 80 - - - ADTRG0# - Unused - P07 - P16 - P25 - OPTIONAL - 0 - Unused - 09 - 09 - 09 - - 1 - - - - - r_bsp:3.80 - r_ether_rx:1.15 - r_flash_rx:3.30 - r_byteq:1.60 - r_sci_rx:2.01 - r_s12ad_rx:2.30 - true - diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/fittemp/r_ether_rx.ftl b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/fittemp/r_ether_rx.ftl deleted file mode 100644 index 2bb8ed85d3b..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/fittemp/r_ether_rx.ftl +++ /dev/null @@ -1,45 +0,0 @@ -<#-- - Copyright(C) 2015 Renesas Electronics Corporation - RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY - This program must be used solely for the purpose for which it was furnished - by Renesas Electronics Corporation. No part of this program may be reproduced - or disclosed to others, in any form, without the prior written permission of - Renesas Electronics Corporation. ---> -<#-- = DECLARE FUNCTION INFORMATION HERE =================== --> -<#assign Function_Base_Name = "R_ETHER_PinSet"> -<#assign Function_Description = "This function initializes pins for r_ether_rx module"> -<#assign Function_Arg = "none"> -<#assign Function_Ret = "none"> -<#assign Version = 1.00> - -<#-- = DECLARE FUNCTION CONTENT HERE ======================= --> -<#macro initialsection postfix> -<#assign Function_Name = "${Function_Base_Name}${postfix}"> -<#include "lib/functionheader.ftl"> -void ${Function_Name}() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - -<#macro peripheralpincode pin> - - -<#macro channelpincode pin> - - /* Set ${pin.pinName} pin */ - MPC.${pin.assignedPinName}PFS.BYTE = 0x${pin.pinMPC}U; - PORT${pin.portNum}.PMR.BIT.B${pin.pinBitNum} = 1U; - - -<#macro endsection> - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - - -<#macro headerfilesection postfix> -void ${Function_Base_Name}${postfix}(); - - -<#-- = END OF FILE ========================================= --> \ No newline at end of file diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/fittemp/r_sci_rx.ftl b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/fittemp/r_sci_rx.ftl deleted file mode 100644 index a505f3edde7..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/fittemp/r_sci_rx.ftl +++ /dev/null @@ -1,85 +0,0 @@ -<#-- - Copyright(C) 2015 Renesas Electronics Corporation - RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY - This program must be used solely for the purpose for which it was furnished - by Renesas Electronics Corporation. No part of this program may be reproduced - or disclosed to others, in any form, without the prior written permission of - Renesas Electronics Corporation. ---> -<#-- = DECLARE FUNCTION INFORMATION HERE =================== --> -<#-- - (Step 1) Explanation: These variables are necessary information for the function header. - Please fill up or leave blank, but do not delete ---> -<#assign Function_Base_Name = "R_SCI_PinSet"> -<#assign Function_Description = "This function initializes pins for r_sci_rx module"> -<#assign Function_Arg = "none"> -<#assign Function_Ret = "none"> -<#assign Version = 1.00> - -<#-- = DECLARE FUNCTION CONTENT HERE ======================= --> -<#-- - (Step 2) Explanation: Function content. - - Macro [initialsection] : - Any text that goes into this section will be printed out 1 time per function - input [postfix] :Use this variable to add the channel number to the function base name. ---> -<#macro initialsection postfix> -<#assign Function_Name = "${Function_Base_Name}${postfix}"> -<#include "lib/functionheader.ftl"> -void ${Function_Name}() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - -<#-- - (Step 3) Explanation: Function content. - - Macro [peripheralpincode] : Any text that goes into this section will be printed out 1 time per peripheral - - input [pin] : Available info includes: - pin.pinName :The name of pin, eg “SSLA0†- pin.assignedPinName :The pin assigned to, eg “P32†- pin.pinMPC :The port number of assigned pin, eg “P32†has portNume = “3†- pin.portNum :The bit number of the assigned pin, eg “P32†has pinBitNum = “2†- pin.pinBitNum :The value of MPC ---> -<#macro peripheralpincode pin> - - -<#-- - (Step 4) Explanation: Function content. - - Macro [channelpincode] : Any text that goes into this section will be printed out 1 time per channel - - input [pin] : Same as above ---> -<#macro channelpincode pin> - - /* Set ${pin.pinName} pin */ - MPC.${pin.assignedPinName}PFS.BYTE = 0x${pin.pinMPC}U; - PORT${pin.portNum}.PMR.BIT.B${pin.pinBitNum} = 1U; - - -<#macro channelpincodeextra pin postfix> - - -<#-- - (Step 5) Explanation: Function content. - - Macro [endsection] : Any text that goes into this section will be printed out 1 time last ---> -<#macro endsection> - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - - -<#-- - (Step 6) Explanation: Header file content - - Macro [headerfilesection] : Any text that goes into this section will be printed out 1 time in the header file - - input [postfix] :Use this variable to add the channel number to the function base name. ---> -<#macro headerfilesection postfix> -void ${Function_Base_Name}${postfix}(); - - -<#macro headerfilesectionExtra postfix> - - -<#-- = END OF FILE ========================================= --> \ No newline at end of file diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/language.settings.xml b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/language.settings.xml deleted file mode 100644 index 6adefee8b07..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/language.settings.xml +++ /dev/null @@ -1,18 +0,0 @@ - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/renesasPGModel.xml b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/renesasPGModel.xml deleted file mode 100644 index 7c0780cd586..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/.settings/renesasPGModel.xml +++ /dev/null @@ -1,5 +0,0 @@ - - - LITTLE - - diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/aws_demos_build_path_check_and_make.bat b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/aws_demos_build_path_check_and_make.bat deleted file mode 100644 index 047f6e34780..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/aws_demos_build_path_check_and_make.bat +++ /dev/null @@ -1,11 +0,0 @@ -@echo off -rem ################################################################################ -rem # This batch file executes some preprocess for build and then executes the make -rem ################################################################################ - -if not exist "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" ( - echo ERROR: Unable to find "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" - exit 2 -) - -"%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" %* diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_bsp/Don't remove this folder to keep r_bsp_config.h settings b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_bsp/Don't remove this folder to keep r_bsp_config.h settings deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_byteq/Don't remove this folder to keep r_byteq_config.h settings b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_byteq/Don't remove this folder to keep r_byteq_config.h settings deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_config/r_bsp_config.h b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_config/r_bsp_config.h deleted file mode 100644 index c655239f09f..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_config/r_bsp_config.h +++ /dev/null @@ -1,523 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_config_reference.h -* Device(s) : RX63x -* Description : The file r_bsp_config.h is used to configure your BSP. r_bsp_config.h should be included -* somewhere in your package so that the r_bsp code has access to it. This file (r_bsp_config_reference.h) -* is just a reference file that the user can use to make their own r_bsp_config.h file. -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 13.03.2012 1.00 First Release -* : 26.06.2012 1.10 Added MCU product part number section. Added endian options for user app and user boot. -* Added OFS register macros. Added option for ROM Code Protect. Added callback function -* options for exception interrupts. -* : 16.07.2012 1.20 Fixed bug with exception callback function names. Added BSP_CFG_BCLK_OUTPUT and -* BSP_CFG_SDCLK_OUTPUT macro options. -* : 09.08.2012 1.30 Added BSP_CFG_IO_LIB_ENABLE macro. -* : 20.09.2012 1.40 Added BSP_CFG_USER_LOCKING_ENABLED and BSP_CFG_USER_LOCKING_TYPE macros. -* : 19.11.2012 1.50 Updated code to use 'BSP_' and 'BSP_CFG_' prefix for macros. -* : 17.01.2013 1.60 Moved BSP_CFG_IO_LIB_ENABLE macro since it is now used in conjunction with -* BSP_CFG_HEAP_BYTES. Added comments for disabling heap above BSP_CFG_HEAP_BYTES. -* Added BSP_CFG_PARAM_CHECKING_ENABLE macro for configuring global parameter checking. -* : 06.05.2013 1.70 Removed BSP_CFG_USER_APP_ENDIAN & BSP_CFG_USER_BOOT_ENDIAN macros. Endian is now detected -* using compiler macros. Added BSP_CFG_MCU_VCC_MV macro for FIT modules that need to know -* Vcc. -* : 25.06.2013 1.80 Added BSP_CFG_USER_STACK_ENABLE macro to enable/disable use of user stack. Removed -* macros defining exception callbacks, undefined interrupt callback, and bus error -* callback. Callbacks are now handled through mcu_interrupts.c. -* : 26.11.2013 1.90 Added BSP_CFG_BOARD_REVISION macro to differentiate between prototype and MP boards. -* : 31.03.2014 2.00 Added the ability for the user to define two 'warm start' callback functions which when -* defined result in a callback from PowerON_Reset_PC() before and/or after initialization -* of the C runtime environment. Added r_bsp_config file version number, which must match -* the BSP version number or a compiler warning will result. Added ability to specify user -* defined functions for redirection of the stdio charget() and/or charput() functions. -* : 09.12.2015 2.10 Change the division ratio of PCLKA. -* : 15.05.2017 2.20 Added Character(s) of the following macro definition. -* - BSP_CFG_MCU_PART_PACKAGE - LJ = 0xA = TFLGA/100/0.65. -* - LH = 0xB = TFLGA/64/0.65. -* - BSP_CFG_MCU_PART_CAN_INCLUDED - H = true -* = CAN included/DEU included/PDC not included. -* - G = false -* = CAN not included/DEU included/PDC not included. -* - S = true -* = CAN included/DEU not included/PDC included. -* - F(only 64-pin TFLGA) = true -* = CAN included/DEU not included/PDC not included. -* - BSP_CFG_MCU_PART_MEMORY_SIZE - F = 0xF = 2MB/256KB/32KB -* - G = 0x10 = 1.5MB/192KB/32KB -* - J = 0x13 = 1.5MB/256KB/32KB -* - K = 0x14 = 2MB/192KB/32KB -* - M = 0x16 = 256KB/64KB/32KB -* - N = 0x17 = 384KB/64KB/32KB -* - P = 0x19 = 512KB/64KB/32KB -* - W = 0x20 = 1MB/192KB/32KB -* - Y = 0x22 = 1MB/256KB/32KB -* Deleted Character(s) of the following macro definition. -* - BSP_CFG_MCU_PART_PACKAGE - LA = 0x6 = TFLGA/100/0.65. -* - FN = 0x7 = LQFP/80/0.50. -* - BSP_CFG_MCU_PART_CAN_INCLUDED - E = = 3V included (RX63T). Ignore. -* - BSP_CFG_MCU_PART_MEMORY_SIZE - 4 = 0x4 = 32KB/8KB/8KB -* - 5 = 0x5 = 48KB/8KB/8KB -* Changed the value of the following macro definition. -* - BSP_CFG_MCU_PART_MEMORY_SIZE - Changed the value from "6 = 0x6 = 64KB/8KB/8KB" -* to "6 = 0x6 = 256KB/128KB/32KB". -* - Changed the value from "7 = 0x7 = 384KB/64KB/32KB" -* to "7 = 0x7 = 384KB/128KB/32KB". -* - Changed the value from "8 = 0x8 = 512KB/64KB/32KB" -* to "8 = 0x8 = 512KB/128KB/32KB". -* Changed the default value of the following macro definition. -* - BSP_CFG_MCU_PART_MEMORY_SIZE - Changed the default value from 0xB to 0xF. -* : xx.xx.xxxx x.xx Added the following macro definition. -* - BSP_CFG_STARTUP_DISABLE -* - BSP_CFG_FIT_IPL_MAX -* Added support for GNUC and ICCRX. -***********************************************************************************************************************/ - -#ifndef R_BSP_CONFIG_REF_HEADER_FILE -#define R_BSP_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* NOTE: - The default settings are the same as when using RSKRX63N. - Change to the settings for the user board. -*/ - -/* Start up select - 0 = Enable BSP startup program. - 1 = Disable BSP startup program. (e.g. Using user startup program.) -*/ -#define BSP_CFG_STARTUP_DISABLE (0) - -/* Enter the product part number for your MCU. This information will be used to obtain information about your MCU such - as package and memory size. - To help parse this information, the part number will be defined using multiple macros. - R 5 F 56 3N Y D D FC - | | | | | | | | | Macro Name Description - | | | | | | | | |__BSP_CFG_MCU_PART_PACKAGE = Package type, number of pins, and pin pitch - | | | | | | | |____not used = Products with wide temperature range - | | | | | | |______BSP_CFG_MCU_PART_CAN_INCLUDED = CAN included/not included - | | | | | |________BSP_CFG_MCU_PART_MEMORY_SIZE = ROM, RAM, and Data Flash Capacity - | | | | |___________BSP_CFG_MCU_PART_GROUP = Group name - | | | |______________BSP_CFG_MCU_PART_SERIES = Series name - | | |________________BSP_CFG_MCU_PART_MEMORY_TYPE = Type of memory (Flash, ROMless) - | |__________________not used = Renesas MCU - |____________________not used = Renesas semiconductor product. - */ - -/* Package type. Set the macro definition based on values below: - Character(s) = Value for macro = Package Type/Number of Pins/Pin Pitch - FC = 0x0 = LQFP/176/0.50 - BG = 0x1 = LFBGA/176/0.80 - LC = 0x2 = TFLGA/177/0.50 - FB = 0x3 = LQFP/144/0.50 - LK = 0x4 = TFLGA/145/0.50 - LJ = 0xA = TFLGA/100/0.65 - FP = 0x5 = LQFP/100/0.50 - LH = 0xB = TFLGA/64/0.65 - FM = 0x8 = LQFP/64/0.50 - FL = 0x9 = LQFP/48/0.50 -*/ -#define BSP_CFG_MCU_PART_PACKAGE (0x5) - -/* Whether CAN is included or not. - Character(s) = Value for macro = Description - H = true = CAN included/DEU included/PDC not included. - D = true = CAN included/DEU not included/PDC not included. - G = false = CAN not included/DEU included/PDC not included. - C = false = CAN not included/DEU not included/PDC not included. - S = true = CAN included/DEU not included/PDC included. - F(only 64-pin TFLGA) = true = CAN included/DEU not included/PDC not included. -*/ -#define BSP_CFG_MCU_PART_CAN_INCLUDED (true) - -/* ROM, RAM, and Data Flash Capacity. - Character(s) = Value for macro = ROM Size/Ram Size/Data Flash Size - F = 0xF = 2MB/256KB/32KB - K = 0x14 = 2MB/192KB/32KB - E = 0xE = 2MB/128KB/32KB - J = 0x13 = 1.5MB/256KB/32KB - G = 0x10 = 1.5MB/192KB/32KB - D = 0xD = 1.5MB/128KB/32KB - Y = 0x22 = 1MB/256KB/32KB - W = 0x20 = 1MB/192KB/32KB - B = 0xB = 1MB/128KB/32KB - A = 0xA = 768KB/128KB/32KB - 8 = 0x8 = 512KB/128KB/32KB - 7 = 0x7 = 384KB/128KB/32KB - 6 = 0x6 = 256KB/128KB/32KB - P = 0x19 = 512KB/64KB/32KB - N = 0x17 = 384KB/64KB/32KB - M = 0x16 = 256KB/64KB/32KB - 0 = 0x0 = 0/128KB/0 -*/ -#define BSP_CFG_MCU_PART_MEMORY_SIZE (0x22) - -/* Group name. - Character(s) = Value for macro = Description - 30 = 0x0 = RX630 Group - 31 = 0x1 = RX631 Group - 3N = 0x2 = RX63N Group - 3T = 0x3 = RX63T Group -*/ -#define BSP_CFG_MCU_PART_GROUP (0x2) - -/* Series name. - Character(s) = Value for macro = Description - 56 = 0x0 = RX600 Series -*/ -#define BSP_CFG_MCU_PART_SERIES (0x0) - -/* Memory type. - Character(s) = Value for macro = Description - F = 0x0 = Flash memory version - S = 0x1 = ROMless version -*/ -#define BSP_CFG_MCU_PART_MEMORY_TYPE (0x0) - -/* Whether to use 1 stack or 2. RX MCUs have the ability to use 2 stacks: an interrupt stack and a user stack. - * When using 2 stacks the user stack will be used during normal user code. When an interrupt occurs the CPU - * will automatically shift to using the interrupt stack. Having 2 stacks can make it easier to figure out how - * much stack space to allocate since the user does not have to worry about always having enough room on the - * user stack for if-and-when an interrupt occurs. Some users will not want 2 stacks though because it is not - * needed in all applications and can lead to wasted RAM (i.e. space in between stacks that is not used). - * If only 1 stack is used then the interrupt stack is the one that will be used. If 1 stack is chosen then - * the user may want to remove the 'SU' section from the linker sections to remove any linker warnings. - * - * 0 = Use 1 stack. Disable user stack. User stack size set below will be ignored. - * 1 = Use 2 stacks. User stack and interrupt stack will both be used. - */ -#define BSP_CFG_USER_STACK_ENABLE (0) - -#if defined(__CCRX__) || defined(__GNUC__) - -/* When using the user startup program, disable the following code. */ -#if (BSP_CFG_STARTUP_DISABLE == 0) - -/* If only 1 stack is chosen using BSP_CFG_USER_STACK_ENABLE then no RAM will be allocated for the user stack. */ -#if (BSP_CFG_USER_STACK_ENABLE == 1) -/* User Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. */ -#define BSP_CFG_USTACK_BYTES (0) -#endif - -/* Interrupt Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. - * If the interrupt stack is the only stack being used then the user will likely want to increase the default size - * below. - */ -#define BSP_CFG_ISTACK_BYTES (0x3000) - -#endif /* BSP_CFG_STARTUP_DISABLE == 0 */ - -/* Heap size in bytes. - To disable the heap you must follow these steps: - 1) Set this macro (BSP_CFG_HEAP_BYTES) to 0. - 2) Set the macro BSP_CFG_IO_LIB_ENABLE to 0. - 3) Disable stdio from being built into the project library. This is done by going into the Renesas RX Toolchain - settings and choosing the Standard Library section. After that choose 'Standard Library' for Category in HEW or - choose 'Contents' in E2Studio. This will present a list of modules that can be included. Uncheck the box for - stdio.h. -*/ -#define BSP_CFG_HEAP_BYTES (0) - -#endif /* defined(__CCRX__) || defined(__GNUC__) */ - -#if defined(__CCRX__) - -/* Initializes C input & output library functions. - 0 = Disable I/O library initialization in resetprg.c. If you are not using stdio then use this value. - 1 = Enable I/O library initialization in resetprg.c. This is default and needed if you are using stdio. */ -#define BSP_CFG_IO_LIB_ENABLE (1) - -#endif /* defined(__CCRX__) */ - -/* If desired the user may redirect the stdio charget() and/or charput() functions to their own respective functions - by enabling below and providing and replacing the my_sw_... function names with the names of their own functions. */ -#define BSP_CFG_USER_CHARGET_ENABLED (0) -#define BSP_CFG_USER_CHARGET_FUNCTION my_sw_charget_function - -#define BSP_CFG_USER_CHARPUT_ENABLED (0) -#define BSP_CFG_USER_CHARPUT_FUNCTION my_sw_charput_function - -/* After reset MCU will operate in Supervisor mode. To switch to User mode, set this macro to '1'. For more information - on the differences between these 2 modes see the CPU >> Processor Mode section of your MCU's hardware manual. - 0 = Stay in Supervisor mode. - 1 = Switch to User mode. -*/ -#define BSP_CFG_RUN_IN_USER_MODE (0) - -/* To get into User Boot Mode the user must control some pins on the MCU and also set some values in ROM. These values - in ROM are described in the Option-Setting Memory section of the hardware manual. This macro sets these values so - that User Boot Mode can be used. The user is still responsible for setting the MCU pins appropriately. If User Boot - is selected then the user should make sure that they setup a constant data section in their linker named 'UBSETTINGS' - at address 0xFF7FFFE8. - 0 = Single-Chip or USB Boot Mode - 1 = User Boot Mode -*/ -#define BSP_CFG_USER_BOOT_ENABLE (0) - -/* Set your desired ID code. NOTE, leave at the default (all 0xFF's) if you do not wish to use an ID code. If you set - this value and program it into the MCU then you will need to remember the ID code because the debugger will ask for - it when trying to connect. Note that the E1/E20 will ignore the ID code when programming the MCU during debugging. - If you set this value and then forget it then you can clear the ID code by connecting up in serial boot mode using - FDT. The ID Code is 16 bytes long. The macro below define the ID Code in 4-byte sections. */ -/* Lowest 4-byte section, address 0xFFFFFFA0. From MSB to LSB: Control Code, ID code 1, ID code 2, ID code 3. */ -#define BSP_CFG_ID_CODE_LONG_1 (0xFFFFFFFF) -/* 2nd ID Code section, address 0xFFFFFFA4. From MSB to LSB: ID code 4, ID code 5, ID code 6, ID code 7. */ -#define BSP_CFG_ID_CODE_LONG_2 (0xFFFFFFFF) -/* 3rd ID Code section, address 0xFFFFFFA8. From MSB to LSB: ID code 8, ID code 9, ID code 10, ID code 11. */ -#define BSP_CFG_ID_CODE_LONG_3 (0xFFFFFFFF) -/* 4th ID Code section, address 0xFFFFFFAC. From MSB to LSB: ID code 12, ID code 13, ID code 14, ID code 15. */ -#define BSP_CFG_ID_CODE_LONG_4 (0xFFFFFFFF) - -/* Clock source select (CKSEL). - 0 = Low Speed On-Chip Oscillator (LOCO) - 1 = High Speed On-Chip Oscillator (HOCO) - 2 = Main Clock Oscillator - 3 = Sub-Clock Oscillator - 4 = PLL Circuit -*/ -#define BSP_CFG_CLOCK_SOURCE (4) - -/* Clock configuration options. - The input clock frequency is specified and then the system clocks are set by specifying the multipliers used. The - multiplier settings are used to set the clock registers in resetprg.c. If a 12MHz clock is used and the - ICLK is 96MHz, PCLKA is 96MHz, PCLKB is 48MHz, FCLK is 48MHz, USB Clock is 48MHz, and BCLK is 24MHz then the - settings would be: - - BSP_CFG_XTAL_HZ = 12000000 - BSP_CFG_PLL_DIV = 1 (no division) - BSP_CFG_PLL_MUL = 16 (12MHz x 16 = 192MHz) - BSP_CFG_ICK_DIV = 2 : System Clock (ICLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_ICK_DIV) = 96MHz - BSP_CFG_PCKA_DIV = 2 : Peripheral Clock A (PCLKA) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKA_DIV) = 96MHz - BSP_CFG_PCKB_DIV = 4 : Peripheral Clock B (PCLKB) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKB_DIV) = 48MHz - BSP_CFG_FCK_DIV = 4 : Flash IF Clock (FCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_FCK_DIV) = 48MHz - BSP_CFG_BCK_DIV = 8 : External Bus Clock (BCK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_BCK_DIV) = 24MHz - BSP_CFG_UCK_DIV = 4 : USB Clock (UCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_UCK_DIV) = 48MHz - BSP_CFG_IEBCK_DIV = 4 : IEBUS Clock (IECLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_IEBCK_DIV)= 48MHz -*/ -/* XTAL - Input clock frequency in Hz */ -#define BSP_CFG_XTAL_HZ (12000000) - -/* PLL Input Frequency Divider Select (PLIDIV). - Available divisors = /1 (no division), /2, /4 -*/ -#define BSP_CFG_PLL_DIV (1) - -/* PLL Frequency Multiplication Factor Select (STC). - Available multipliers = x8, x10, x12, x16, x20, x24, x25, x50 -*/ -#define BSP_CFG_PLL_MUL (16) - -/* System Clock Divider (ICK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_ICK_DIV (2) - -/* Peripheral Module Clock A Divider (PCKA). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKA_DIV (2) - -/* Peripheral Module Clock B Divider (PCKB). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKB_DIV (4) - -/* External Bus Clock Divider (BCK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_BCK_DIV (8) - -/* Flash IF Clock Divider (FCK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_FCK_DIV (4) - -/* IEBUS Clock Divider Select. - Available divisors = /1 (no division), /2, /4, /6, /8, /16, /32, /64 -*/ -#define BSP_CFG_IEBCK_DIV (8) - -/* USB Clock Divider Select. - Available divisors = /3, /4 -*/ -#define BSP_CFG_UCK_DIV (4) - -/* Configure BCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency, 2= BCK/2 frequency */ -#define BSP_CFG_BCLK_OUTPUT (0) - -/* Configure SDCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency */ -#define BSP_CFG_SDCLK_OUTPUT (0) - -/* Configure WDT and IWDT settings. - OFS0 - Option Function Select Register 0 - b31:b29 Reserved (set to 1) - b28 WDTRSTIRQS - WDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b27:b26 WDTRPSS - WDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b25:b24 WDTRPES - WDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b23:b20 WDTCKS - WDT Clock Frequency Division Ratio - (1=/4, 4=/64, 0xF=/128, 6=/512, 7=/2048, 8=/8192) - b19:b18 WDTTOPS - WDT Timeout Period Select - (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b17 WDTSTRT - WDT Start Mode Select - (0=auto-start after reset, halt after reset) - b16:b15 Reserved (set to 1) - b14 IWDTSLCSTP - IWDT Sleep Mode Count Stop Control - (0=can't stop count, 1=stop w/some low power modes) - b13 Reserved (set to 1) - b12 IWDTRSTIRQS - IWDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b11:b10 IWDTRPSS - IWDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b9:b8 IWDTRPES - IWDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b7:b4 IWDTCKS - IWDT Clock Frequency Division Ratio - (0=none, 2=/16, 3 = /32, 4=/64, 0xF=/128, 5=/256) - b3:b2 IWDTTOPS - IWDT Timeout Period Select - (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b1 IWDTSTRT - IWDT Start Mode Select - (0=auto-start after reset, halt after reset) - b0 Reserved (set to 1) */ -#define BSP_CFG_OFS0_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* Configure whether voltage detection 0 circuit and HOCO are enabled after reset. - OFS1 - Option Function Select Register 1 - b31:b9 Reserved (set to 1) - b8 HOCOEN - Enable/disable HOCO oscillation after a reset (0=enable, 1=disable) - b7:b3 Reserved (set to 1) - b2 LVDAS - Choose to enable/disable Voltage Detection 0 Circuit after a reset (0=enable, 1=disable) - b1:b0 Reserved (set to 1) */ -#define BSP_CFG_OFS1_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* ROM Code Protection is a feature that can prohibit PROM programmers from reading or writing flash memory. - There are 3 different options that can be chosen: - 0 = ROM code protection 1 = Both reading and writing to the user area and user boot area are prohibited. - 1 = ROM code protection 2 = Reading from the user area and user boot area are prohibited. - Else = Protection disabled = Reading and writing are allowed. -*/ -#define BSP_CFG_ROM_CODE_PROTECT_VALUE (0xFFFFFFFF) - -/* This macro lets other modules no if a RTOS is being used. - 0 = RTOS is not used. - 1 = FreeRTOS is used. - 2 = embOS is used.(This is not available.) - 3 = MicroC_OS is used.(This is not available.) - 4 = RI600V4 or RI600PX is used.(This is not available.) -*/ -#define BSP_CFG_RTOS_USED (1) - -/* This macro is used to select which CMT channel used for system timer of RTOS. - * The setting of this macro is only valid if the macro BSP_CFG_RTOS_USED is set to a value other than 0. */ -#if (BSP_CFG_RTOS_USED != 0) -/* Setting value. - * 0 = CMT channel 0 used for system timer of RTOS (recommended to be used for RTOS). - * 1 = CMT channel 1 used for system timer of RTOS. - * 2 = CMT channel 2 used for system timer of RTOS. - * 3 = CMT channel 3 used for system timer of RTOS. - * Others = Invalid. */ -#define BSP_CFG_RTOS_SYSTEM_TIMER (0) -#endif - -/* By default modules will use global locks found in mcu_locks.c. If the user is using a RTOS and would rather use its - locking mechanisms then they can change this macro. - NOTE: If '1' is chosen for this macro then the user must also change the next macro 'BSP_CFG_USER_LOCKING_TYPE'. - 0 = Use default locking (non-RTOS) - 1 = Use user defined locking mechanism. -*/ -#define BSP_CFG_USER_LOCKING_ENABLED (0) - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to redefine the typedef - that is used for the locks. If the user is using a RTOS then they would likely redefine the typedef to be - a semaphore/mutex type of their RTOS. Use the macro below to set the type that will be used for the locks. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_TYPE bsp_lock_t - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to define the functions - that will handle the locking and unlocking. These functions should be defined below. - If BSP_CFG_USER_LOCKING_ENABLED is != 0: - R_BSP_HardwareLock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION(mcu_lock_t hw_index) - R_BSP_HardwareUnlock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION(mcu_lock_t hw_index) - NOTE:With these functions the index into the array holding the global hardware locks is passed as the parameter. - R_BSP_SoftwareLock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - R_BSP_SoftwareUnlock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - NOTE:With these functions the actual address of the lock to use is passed as the parameter. - NOTE: These functions must return a boolean. If lock was obtained or released successfully then return true. Else, - return false. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION my_hw_locking_function -#define BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION my_hw_unlocking_function -#define BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION my_sw_locking_function -#define BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION my_sw_unlocking_function - -/* If the user would like to determine if a warm start reset has occurred, then they may enable one or more of the following - * callback definitions AND provide a call back function name for the respective callback function (to be defined by the user). - * Setting BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED = 1 will result in a callback to the user defined my_sw_warmstart_prec_function - * just prior to the initialization of the C runtime environment by resetprg. - * - * Setting BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED = 1 will result in a callback to the user defined my_sw_warmstart_postc_function - * just after the initialization of the C runtime environment by resetprg. - */ -#define BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_PRE_C_FUNCTION my_sw_warmstart_prec_function - -#define BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_POST_C_FUNCTION my_sw_warmstart_postc_function - -/* By default FIT modules will check input parameters to be valid. This is helpful during development but some users - will want to disable this for production code. The reason for this would be to save execution time and code space. - This macro is a global setting for enabling or disabling parameter checking. Each FIT module will also have its - own local macro for this same purpose. By default the local macros will take the global value from here though - they can be overridden. Therefore, the local setting has priority over this global setting. Disabling parameter - checking should only used when inputs are known to be good and the increase in speed or decrease in code space is - needed. - 0 = Global setting for parameter checking is disabled. - 1 = Global setting for parameter checking is enabled (Default). -*/ -#define BSP_CFG_PARAM_CHECKING_ENABLE (1) - -/* This macro is used to define the voltage that is supplied to the MCU (Vcc). This macro is defined in millivolts. This - macro does not actually change anything on the MCU. Some FIT modules need this information so it is defined here. */ -#define BSP_CFG_MCU_VCC_MV (3300) - -/* For some BSP functions, it is necessary to ensure that, while these functions are executing, interrupts from other - FIT modules do not occur. By controlling the IPL, these functions disable interrupts that are at or below the - specified interrupt priority level. - This macro sets the IPL. Range is 0x0 - 0xF. - Please set this macro more than IPR for other FIT module interrupts. - The default value is 0xF (maximum value). - Don't change if there is no special processing with higher priority than all fit modules. -*/ -#define BSP_CFG_FIT_IPL_MAX (0xF) - -/* This macro is used to select which SCI channel used for debug serial terminal. - */ -#define MY_BSP_CFG_SERIAL_TERM_SCI (0) - -#endif /* R_BSP_CONFIG_REF_HEADER_FILE */ - - - diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_config/r_bsp_config_readme.txt b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_config/r_bsp_config_readme.txt deleted file mode 100644 index 6a9002cf4f3..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_config/r_bsp_config_readme.txt +++ /dev/null @@ -1,12 +0,0 @@ -FIT r_config folder -------------------- -The purpose of the r_config folder is to provide one place where the user can store all of their FIT configuration -files. Putting the files in one place makes them easy to find, backup, and put in a version control system. - -FIT Modules are distributed with a reference configuration file. These files end with '_reference.h'. For example, -the reference configuration file for the r_bsp is named r_bsp_config_reference.h. Reference configuration files are -provided so that the user always has a known-good configuration to revert to. When adding a FIT Module to a project the -user should copy this reference configuration file to this folder and remove '_reference' from the filename -(r_bsp_config_reference.h is renamed to r_bsp_config.h). For the r_bsp the reference configuration file can be found in -the 'board' folder for the currently chosen development board. For other FIT Modules the reference configuration file -can be found in the 'ref' folder of the FIT Module. diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_config/r_byteq_config.h b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_config/r_byteq_config.h deleted file mode 100644 index 0b4d4f9bb52..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_config/r_byteq_config.h +++ /dev/null @@ -1,59 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_byteq_config.h -* Description : Configures the byte queue memory allocation -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 24.07.2013 1.00 Initial Release -* : 11.21.2014 1.20 Removed dependency to BSP -* : 30.09.2015 1.50 Added dependency to BSP -***********************************************************************************************************************/ -#ifndef BYTEQ_CONFIG_H -#define BYTEQ_CONFIG_H - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - Available settings: - BSP_CFG_PARAM_CHECKING_ENABLE: - Utilizes the system default setting - 1: - Includes parameter checking - 0: - Compiles out parameter checking -*/ -#define BYTEQ_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY IF SHOULD USE MALLOC() TO ALLOCATE MEMORY FOR QUEUE CONTROL BLOCKS */ -#define BYTEQ_CFG_USE_HEAP_FOR_CTRL_BLKS (0) - -/* SPECIFY NUMBER OF STATIC QUEUE CONTROL BLOCKS TO SUPPORT */ -/* valid only when BYTEQ_USE_HEAP_FOR_CTRL_BLKS is set to 0 */ -#define BYTEQ_CFG_MAX_CTRL_BLKS (4) - - -#endif /* BYTEQ_CONFIG_H */ diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_config/r_ether_rx_config.h b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_config/r_ether_rx_config.h deleted file mode 100644 index 49178619185..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_config/r_ether_rx_config.h +++ /dev/null @@ -1,118 +0,0 @@ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_ether_rx_config.h - * Version : 1.04 - * Description : Ethernet module device driver - ***********************************************************************************************************************/ -/********************************************************************************************************************** - * History : DD.MM.YYYY Version Description - * : 22.07.2014 1.00 First Release - * : 31.03.2016 1.01 Added changes for RX63N. - * : 01.10.2016 1.02 Added changes for RX65N. - * : 01.10.2017 1.03 Added changes for RX65N-2MB. - * : 08.01.2018 1.04 Changed comment. - ***********************************************************************************************************************/ - -/* Guards against multiple inclusion */ -#ifndef R_ETHER_RX_CONFIG_H - #define R_ETHER_RX_CONFIG_H - -/*********************************************************************************************************************** - Macro definitions - ***********************************************************************************************************************/ - -/* Ethernet interface select. - 0 = MII (Media Independent Interface) - 1 = RMII (Reduced Media Independent Interface) - */ - #define ETHER_CFG_MODE_SEL (1) - -/* PHY-LSI address setting for ETHER0/1. - Please set the value 31 ETHER_CFG_CH0_PHY_ADDRESS when use default setting of the RSK+RX63N. - Please set the value 30 ETHER_CFG_CH0_PHY_ADDRESS when use default setting of the RSK+RX65N/RSK+RX65N_2MB. - Please set the value 0 ETHER_CFG_CH0_PHY_ADDRESS and value 1 ETHER_CFG_CH1_PHY_ADDRESS when use default setting of the RSK+RX64M/RSK+RX71M. - */ - #define ETHER_CFG_CH0_PHY_ADDRESS (0) /* Please define the PHY-LSI address in the range of 0-31. */ - #define ETHER_CFG_CH1_PHY_ADDRESS (1) /* Please define the PHY-LSI address in the range of 0-31. */ - -/* The number of Rx descriptors. */ - #define ETHER_CFG_EMAC_RX_DESCRIPTORS (1) - -/* The number of Tx descriptors. */ - #define ETHER_CFG_EMAC_TX_DESCRIPTORS (1) - -/* Please define the size of the sending and receiving buffer in the value where one frame can surely be stored - because the driver is single-frame/single-buffer processing. */ - #define ETHER_CFG_BUFSIZE (1536) /* Must be 32-byte aligned */ - -/* EINT interrupt priority level. This definition is not used when EINT interrupt is assigned to Group interrupt. */ - #define ETHER_CFG_EINT_INT_PRIORITY (2) /* Please define the interruption level within the range of 1-15. */ - -/* Group AL1 interrupt priority level. This definition is not used when EINT interrupt is assigned to Peripheral - interrupt. */ - #define ETHER_CFG_AL1_INT_PRIORTY (2) /* Please define the interruption level within the range of 1-15. */ - -/* The register bus of PHY0/1 for ETHER0/1 select - 0 = The access of the register of PHY uses ETHER0. - 1 = The access of the register of PHY uses ETHER1. - - Please set the value 0 ETHER_CFG_CH0_PHY_ACCESS when use default setting of the RSK+RX63N. - Please set the value 0 ETHER_CFG_CH0_PHY_ACCESS when use default setting of the RSK+RX65N/RSK+RX65N_2MB. - Please set the value 1 ETHER_CFG_CH0_PHY_ACCESS and ETHER_CFG_CH1_PHY_ACCESS when use default setting of the RSK+RX64M/RSK+RX71M. - */ - #define ETHER_CFG_CH0_PHY_ACCESS (0) - #define ETHER_CFG_CH1_PHY_ACCESS (1) - -/* Define the access timing of MII/RMII register */ - #define ETHER_CFG_PHY_MII_WAIT (8) /* Plese define the value of 1 or more */ - -/* Define the waiting time for reset completion of PHY-LSI */ - #define ETHER_CFG_PHY_DELAY_RESET (0x00020000L) - -/** - * Link status read from LMON bit of ETHERC PSR register. The state is hardware dependent. - */ - #define ETHER_CFG_LINK_PRESENT (1) - -/* Use LINKSTA signal for detect link status changes - 0 = unused (use PHY-LSI status register) - 1 = use (use LINKSTA signal) - */ - #define ETHER_CFG_USE_LINKSTA (1) /* This setting is reflected in all channels */ - -/* Definition of whether or not to use KSZ8041NL of the Micrel Inc. - 0 = unused - 1 = use - */ - #define ETHER_CFG_USE_PHY_KSZ8041NL (0) - -/*********************************************************************************************************************** - Typedef definitions - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global variables - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global functions (to be accessed by other files) - ***********************************************************************************************************************/ - -#endif /* R_ETHER_RX_CONFIG_H */ diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_config/r_flash_rx_config.h b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_config/r_flash_rx_config.h deleted file mode 100644 index fbf916a0e97..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_config/r_flash_rx_config.h +++ /dev/null @@ -1,116 +0,0 @@ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_flash_rx_config_reference.h - * Description : Configures the FLASH API module for RX200 and RX600 Series MCU's. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* 12.04.2014 1.00 First Release -* 22.12.2014 1.10 Added flash type usage comments. -* 25.06.2015 1.20 Added FLASH_CFG_CODE_FLASH_RUN_FROM_ROM. -* : 12.10.2016 2.00 Modified for BSPless operation (added FLASH_CFG_USE_FIT_BSP). -***********************************************************************************************************************/ -#ifndef FLASH_CONFIG_HEADER_FILE -#define FLASH_CONFIG_HEADER_FILE - -/* Set the following value to 0 when building without using the FIT BSP Module */ -#define FLASH_CFG_USE_FIT_BSP (1) - - -/*********************************************************************************************************************** - Configuration Options - ***********************************************************************************************************************/ -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting - * Setting to 1 includes parameter checking; 0 compiles out parameter checking - */ -#define FLASH_CFG_PARAM_CHECKING_ENABLE (1) - - -/****************************************************************************** - ENABLE CODE FLASH PROGRAMMING -******************************************************************************/ -/* If you are only using data flash, set this to 0. - * Setting to 1 includes code to program the ROM area. When programming ROM, - * code must be executed from RAM, except under certain restrictions for flash - * type 3 (see section 2.14 in App Note). See section 2.13 in the App Note for - * details on how to set up code and the linker to execute code from RAM. - */ -#define FLASH_CFG_CODE_FLASH_ENABLE (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING DATA FLASH OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces data flash API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, data flash operations return immediately after the operation has been - * started. Notification of the operation completion is done via the callback - * function. - */ -#define FLASH_CFG_DATA_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING CODE FLASH (ROM) OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces ROM API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, ROM operations return immediately after the operation has been started. - * Notification of the operation completion is done via the callback function. - * When reprogramming ROM, THE RELOCATABLE VECTOR TABLE AND CORRESPONDING - * INTERRUPT ROUTINES MUST BE IN RAM. - * See sections 2.16 Usage Notes in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE CODE FLASH SELF-PROGRAMMING -******************************************************************************/ -/* Set this to 0 when programming code flash while executing in RAM. - * Set this to 1 when programming code flash while executing from another - * segment in ROM (possible only with RX64M, RX71M, RX65N-2 groups). - * See section 2.14 in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_RUN_FROM_ROM (0) - - -/****************************************************************************** - SET IPL OF FLASH READY INTERRUPT -******************************************************************************/ -#define FLASH_CFG_FLASH_READY_IPL (5) // Flash type 2 only - - -/****************************************************************************** - ENABLE OR DISABLE LOCK BIT PROTECTION -******************************************************************************/ -/* Each erasure block has a corresponding lock bit that can be used to - * protect that block from being programmed/erased after the lock bit is - * set. The use of lock bits can be used or ignored. - * Setting this to 1 will cause lock bits to be ignored and programs/erases to a - * block will not be limited. - * Setting this to 0 will cause lock bits to be used as the user configures through - * the Control command. This only applies to ROM as the DF does not have lock bits. - */ -#define FLASH_CFG_IGNORE_LOCK_BITS (1) // Flash type 2 only - - -#endif /* FLASH_CONFIG_HEADER_FILE */ diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_config/r_s12ad_rx_config.h b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_config/r_s12ad_rx_config.h deleted file mode 100644 index 0202bf133a4..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_config/r_s12ad_rx_config.h +++ /dev/null @@ -1,53 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_s12ad_rx_config.h -* Description : Configures the 12-bit A/D driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 22.07.2013 1.00 Initial Release. -* 21.04.2014 1.20 Updated for RX210 advanced features; RX110/63x support. -***********************************************************************************************************************/ -#ifndef S12AD_CONFIG_H -#define S12AD_CONFIG_H - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* - * SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting. - * Setting to 1 includes parameter checking; 0 compiles out parameter checking. - */ -#define ADC_CFG_PARAM_CHECKING_ENABLE BSP_CFG_PARAM_CHECKING_ENABLE - - -/* - * RX210 Series only; Temperature Sensor Programmable Gain Amplifier (PGA) - * SELECT PGA GAIN TO MATCH AVCC0 VOLTAGE RANGE: - * 0: 1.8V <= AVcc0 < 2.7V; default; good for all actual voltages - * 1: 2.7V <= AVcc0 < 3.6V - * 2: 3.6V <= AVcc0 < 4.5V - * 3: 4.5V <= AVcc0 <= 5.5V - */ -#define ADC_CFG_PGA_GAIN (0) - - -#endif /* S12AD_CONFIG_H */ diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_config/r_sci_rx_config.h b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_config/r_sci_rx_config.h deleted file mode 100644 index 4766e45550a..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_config/r_sci_rx_config.h +++ /dev/null @@ -1,171 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_config.h -* Description : Configures the SCI driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 25.09.2013 1.00 Initial Release -* 17.04.2014 1.20 Added comments for new RX110 support. -* 02.07.2014 1.30 Fixed bug that caused Group12 rx errors to only be enabled for channel 2. -* 25.11.2014 1.40 Added comments for RX113 support -* 30.09.2015 1.70 Added comments for RX23T support -* 01.10.2016 1.80 Added support for RX65N (comments and TX/RX FIFO THRESHOLD options) -* 19.12.2016 1.90 Added comments for RX24U support -* 07.03.2017 2.00 Added comments for RX130-512KB support -***********************************************************************************************************************/ -#ifndef SCI_CONFIG_H -#define SCI_CONFIG_H - -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING */ -/* Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting */ -/* Setting to 1 includes parameter checking; 0 compiles out parameter checking */ -#define SCI_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY WHETHER TO INCLUDE CODE FOR DIFFERENT SCI MODES */ -/* Setting an equate to 1 includes code specific to that mode. */ -#define SCI_CFG_ASYNC_INCLUDED (1) -#define SCI_CFG_SYNC_INCLUDED (0) -#define SCI_CFG_SSPI_INCLUDED (0) - -/* SPECIFY BYTE VALUE TO TRANSMIT WHILE CLOCKING IN DATA IN SSPI MODES */ -#define SCI_CFG_DUMMY_TX_BYTE (0xFF) - -/* SPECIFY CHANNELS TO INCLUDE SOFTWARE SUPPORT FOR 1=included, 0=not */ -/* - * NOTE: If using ASYNC mode, adjust BYTEQ_CFG_MAX_CTRL_BLKS in r_byteq_config.h - * to provide 2 queues per channel (static mode only). - * * = port connector RDKRX63N, RSKRX210, RSKRX11x - * u = channel used by the USB-UART port (G1CUSB0) - * a = this channel is used only for RX130-512KB - * RX MCU supported channels - * - * CH# 110 111 113 130 210 230 231 23T 24T 24U 63N 631 64M 71M 65N - * --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- - * CH0 X Xa X* X X X* X X X X - * CH1 X X* X* Xu X X X Xu Xu Xu X X X X X - * CH2 X X X X X Xu - * CH3 X X X X X - * CH4 X X X X X - * CH5 X X X X X X Xu X X X X X X X X - * CH6 X X X X X X X X X X X X - * CH7 X X Xu Xu X - * CH8 X Xa X X X X X X X - * CH9 X Xa X X X X X X X - * CH10 X X X - * CH11 X X X X - * CH12 X X X X X X X X X X X X -*/ - -#define SCI_CFG_CH0_INCLUDED (1) -#define SCI_CFG_CH1_INCLUDED (0) -#define SCI_CFG_CH2_INCLUDED (0) -#define SCI_CFG_CH3_INCLUDED (0) -#define SCI_CFG_CH4_INCLUDED (0) -#define SCI_CFG_CH5_INCLUDED (0) -#define SCI_CFG_CH6_INCLUDED (0) -#define SCI_CFG_CH7_INCLUDED (0) -#define SCI_CFG_CH8_INCLUDED (0) -#define SCI_CFG_CH9_INCLUDED (0) -#define SCI_CFG_CH10_INCLUDED (0) -#define SCI_CFG_CH11_INCLUDED (0) -#define SCI_CFG_CH12_INCLUDED (0) - -/* SPECIFY ASYNC MODE TX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_TX_BUFSIZ (80) -#define SCI_CFG_CH1_TX_BUFSIZ (80) -#define SCI_CFG_CH2_TX_BUFSIZ (80) -#define SCI_CFG_CH3_TX_BUFSIZ (80) -#define SCI_CFG_CH4_TX_BUFSIZ (80) -#define SCI_CFG_CH5_TX_BUFSIZ (80) -#define SCI_CFG_CH6_TX_BUFSIZ (80) -#define SCI_CFG_CH7_TX_BUFSIZ (80) -#define SCI_CFG_CH8_TX_BUFSIZ (80) -#define SCI_CFG_CH9_TX_BUFSIZ (80) -#define SCI_CFG_CH10_TX_BUFSIZ (80) -#define SCI_CFG_CH11_TX_BUFSIZ (80) -#define SCI_CFG_CH12_TX_BUFSIZ (80) - -/* SPECIFY ASYNC MODE RX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_RX_BUFSIZ (80) -#define SCI_CFG_CH1_RX_BUFSIZ (80) -#define SCI_CFG_CH2_RX_BUFSIZ (80) -#define SCI_CFG_CH3_RX_BUFSIZ (80) -#define SCI_CFG_CH4_RX_BUFSIZ (80) -#define SCI_CFG_CH5_RX_BUFSIZ (80) -#define SCI_CFG_CH6_RX_BUFSIZ (80) -#define SCI_CFG_CH7_RX_BUFSIZ (80) -#define SCI_CFG_CH8_RX_BUFSIZ (80) -#define SCI_CFG_CH9_RX_BUFSIZ (80) -#define SCI_CFG_CH10_RX_BUFSIZ (80) -#define SCI_CFG_CH11_RX_BUFSIZ (80) -#define SCI_CFG_CH12_RX_BUFSIZ (80) - -/* -* ENABLE TRANSMIT END INTERRUPT (ASYNCHRONOUS) -* This interrupt only occurs when the last bit of the last byte of data -* has been sent and the transmitter has become idle. The interrupt calls -* the user's callback function specified in R_SCI_Open() and passes it an -* SCI_EVT_TEI event. A typical use of this feature is to disable an external -* transceiver to save power. It would then be up to the user's code to -* re-enable the transceiver before sending again. Not including this feature -* reduces code space used by the interrupt. Note that this equate is only -* for including the TEI code. The interrupt itself must be enabled using an -* R_SCI_Control(hdl, SCI_CMD_EN_TEI, NULL) call. -*/ -#define SCI_CFG_TEI_INCLUDED (0) /* 1=included, 0=not */ - -/* -* SET GROUP12 (RECEIVER ERROR) INTERRUPT PRIORITY; RX63N/631 ONLY -* This #define sets the priority level for the interrupt that handles -* receiver overrun, framing, and parity errors for all SCI channels -* on the RX63N/631. It is ignored for all other parts. -*/ -#define SCI_CFG_RXERR_PRIORITY (3) /* (RX63N/631 ONLY) 1 lowest, 15 highest */ - -/* -* SET GROUPBL0 (ERI, TEI) INTERRUPT PRIORITY; RX64M/RX71M/RX65N ONLY -* SET GROUPBL1, GROUPAL0 (ERI,TEI) INTERRUPT PRIORITY; RX65N ONLY -* This sets the priority level for receiver overrun, framing, and parity errors -* as well as TEI interrupts for all SCI channels. -*/ -#define SCI_CFG_ERI_TEI_PRIORITY (3) /* (RX64M/RX71M/RX65N ONLY) 1 lowest, 15 highest */ - -/* ENABLE TX/RX FIFO; (SCIi supported MCU ONLY) 1=included, 0=not */ -#define SCI_CFG_CH10_FIFO_INCLUDED (0) -#define SCI_CFG_CH11_FIFO_INCLUDED (0) - -/* SET TX FIFO THRESHOLD; (SCIi supported MCU ONLY) 0 lowest, 15 highest */ -/* TX FIFO THRESHOLD is invalid in Clock Synchronous Mode and Simple SPI Mode. */ -/* Set the same value for TX FIFO THRESHOLD and RX FIFO THRESHOLD in Clock Synchronous Mode and Simple SPI Mode. */ -#define SCI_CFG_CH10_TX_FIFO_THRESH (8) -#define SCI_CFG_CH11_TX_FIFO_THRESH (8) - -/* SET RX FIFO THRESHOLD; (SCIi supported MCU ONLY) 1 lowest, 15 highest */ -#define SCI_CFG_CH10_RX_FIFO_THRESH (8) -#define SCI_CFG_CH11_RX_FIFO_THRESH (8) - - -#endif /* SCI_CONFIG_H */ diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_ether_rx/Don't remove this folder to keep r_ether_rx_config.h settings b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_ether_rx/Don't remove this folder to keep r_ether_rx_config.h settings deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_flash_rx/Don't remove this folder to keep r_flash_rx_config.h settings b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_flash_rx/Don't remove this folder to keep r_flash_rx_config.h settings deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_pincfg/r_pinset.c b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_pincfg/r_pinset.c deleted file mode 100644 index 4c59e214125..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_pincfg/r_pinset.c +++ /dev/null @@ -1,115 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_pinset.c -* Version : 1.2.5 -* Device(s) : R5F563NYDxFP -* Tool-Chain : RXC -* Description : Setting of port and mpc registers -* Creation Date: 25 9 2018 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_pinset.h" -#include "platform.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: R_ETHER_PinSet_ETHERC_RMII -* Description : This function initializes pins for r_ether_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_ETHER_PinSet_ETHERC_RMII(void) -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set REF50CK pin */ - MPC.PB2PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B2 = 1U; - - /* Set RMII_TXD_EN pin */ - MPC.PB4PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B4 = 1U; - - /* Set RMII_TXD1 pin */ - MPC.PB6PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B6 = 1U; - - /* Set RMII_TXD0 pin */ - MPC.PB5PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B5 = 1U; - - /* Set RMII_RXD1 pin */ - MPC.PB0PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B0 = 1U; - - /* Set RMII_RXD0 pin */ - MPC.PB1PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B1 = 1U; - - /* Set RMII_RX_ER pin */ - MPC.PB3PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B3 = 1U; - - /* Set RMII_CRS_DV pin */ - MPC.PB7PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B7 = 1U; - - /* Set ET_MDC pin */ - MPC.PA4PFS.BYTE = 0x11U; - PORTA.PMR.BIT.B4 = 1U; - - /* Set ET_MDIO pin */ - MPC.PA3PFS.BYTE = 0x11U; - PORTA.PMR.BIT.B3 = 1U; - - /* Set ET_LINKSTA pin */ - MPC.PA5PFS.BYTE = 0x11U; - PORTA.PMR.BIT.B5 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - -/*********************************************************************************************************************** -* Function Name: R_SCI_PinSet_SCI0 -* Description : This function initializes pins for r_sci_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_SCI_PinSet_SCI0(void) -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set RXD0/SMISO0 pin */ - MPC.P21PFS.BYTE = 0x0AU; - PORT2.PMR.BIT.B1 = 1U; - - /* Set TXD0/SMOSI0 pin */ - MPC.P20PFS.BYTE = 0x0AU; - PORT2.PMR.BIT.B0 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_pincfg/r_pinset.h b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_pincfg/r_pinset.h deleted file mode 100644 index 09ce0a16272..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_pincfg/r_pinset.h +++ /dev/null @@ -1,42 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_pinset.h -* Version : 1.2.5 -* Device(s) : R5F563NYDxFP -* Tool-Chain : RXC -* Description : Setting of port and mpc registers -* Creation Date: 25 9 2018 -***********************************************************************************************************************/ - -#ifndef R_FIT_PINSET_H -#define R_FIT_PINSET_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -void R_ETHER_PinSet_ETHERC_RMII(void); -void R_SCI_PinSet_SCI0(void); - -#endif diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_s12ad_rx/Don't remove this folder to keep r_s12ad_rx_config.h settings b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_s12ad_rx/Don't remove this folder to keep r_s12ad_rx_config.h settings deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_sci_rx/Don't remove this folder to keep r_sci_rx_config.h settings b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/r_sci_rx/Don't remove this folder to keep r_sci_rx_config.h settings deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/rx63n_gr_sakura_aws HardwareDebug.launch b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/rx63n_gr_sakura_aws HardwareDebug.launch deleted file mode 100644 index a817fd24a69..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/rx63n_gr_sakura_aws HardwareDebug.launch +++ /dev/null @@ -1,156 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/src/attention!.txt b/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/src/attention!.txt deleted file mode 100644 index cf5eb1abadb..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/ccrx-e2studio/src/attention!.txt +++ /dev/null @@ -1,64 +0,0 @@ -Please note that the following folders in the project window of IDEs are -so called 'linked' folders. - --------------------------------------------- -Linked folders in the project window of IDEs --------------------------------------------- - -All -~~~ -src/FIT_modified_code/r_bsp -src/FIT_modified_code/r_byteq -src/FIT_modified_code/r_cmt_rx -src/FIT_modified_code/r_ether_rx -src/FIT_modified_code/r_flash_rx -src/FIT_modified_code/r_sci_iic_rx -src/FIT_modified_code/r_sci_rx -src/amazon_freertos_common - -CC-RX/e2 studio -~~~~~~~~~~~~~~~ -src/FITConfigurator/r_config -src/FITConfigurator/r_pinconfig - -CC-RX/CS+ -~~~~~~~~~ -src/FIT_setting_files/r_config -src/FIT_setting_files/r_pinconfig - -GNURX/e2 studio -~~~~~~~~~~~~~~~ -src/FIT_setting_files/r_config -src/FIT_setting_files/r_pinconfig - ----------------------------------------------------------- -Folders on the File System of the WINDOWS Operating System ----------------------------------------------------------- - -All -~~~ -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_bsp -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_byteq -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_cmt_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_ether_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_flash_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_iic_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/amazon_freertos_common - -CC-RX/e2 studio -~~~~~~~~~~~~~~~ -amazon-freertos/demos/renesas/XXXX/ccrx-e2studio/r_config -amazon-freertos/demos/renesas/XXXX/ccrx-e2studio/r_pincfg - -CC-RX/CS+ -~~~~~~~~~ -amazon-freertos/demos/renesas/XXXX/ccrx-csplus/r_config -amazon-freertos/demos/renesas/XXXX/ccrx-csplus/r_pincfg - -GNURX/e2 studio -~~~~~~~~~~~~~~~ -amazon-freertos/demos/renesas/XXXX/gnurx-e2studio/r_config -amazon-freertos/demos/renesas/XXXX/gnurx-e2studio/r_pincfg - -[EOF] diff --git a/demos/renesas/rx63n-gr-sakura2/common/application_code/main.c b/demos/renesas/rx63n-gr-sakura2/common/application_code/main.c deleted file mode 100644 index 43f98bf9605..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/common/application_code/main.c +++ /dev/null @@ -1,243 +0,0 @@ -/* -Amazon FreeRTOS -Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. - -Permission is hereby granted, free of charge, to any person obtaining a copy of -this software and associated documentation files (the "Software"), to deal in -the Software without restriction, including without limitation the rights to -use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of -the Software, and to permit persons to whom the Software is furnished to do so, -subject to the following conditions: - -The above copyright notice and this permission notice shall be included in all -copies or substantial portions of the Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS -FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR -COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER -IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN -CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - - http://aws.amazon.com/freertos - http://www.FreeRTOS.org -*/ - -/* FreeRTOS includes. */ -#include "FreeRTOS.h" -#include "task.h" - -/* Version includes. */ -#include "aws_application_version.h" - -/* System init includes. */ -#include "aws_system_init.h" - -/* Logging includes. */ -#include "aws_logging_task.h" - -/* Key provisioning includes. */ -#include "aws_dev_mode_key_provisioning.h" - -/* FreeRTOS+TCP includes. */ -#include "FreeRTOS_IP.h" - -/* Demo includes */ -#include "aws_demo_runner.h" - -#define mainLOGGING_TASK_STACK_SIZE ( configMINIMAL_STACK_SIZE * 6 ) -#define mainLOGGING_MESSAGE_QUEUE_LENGTH ( 15 ) -#define mainTEST_RUNNER_TASK_STACK_SIZE ( configMINIMAL_STACK_SIZE * 8 ) - -/* Declare the firmware version structure for all to see. */ -const AppVersion32_t xAppFirmwareVersion = { - .u.x.ucMajor = APP_VERSION_MAJOR, - .u.x.ucMinor = APP_VERSION_MINOR, - .u.x.usBuild = APP_VERSION_BUILD, -}; - -/* The MAC address array is not declared const as the MAC address will -normally be read from an EEPROM and not hard coded (in real deployed -applications).*/ -static uint8_t ucMACAddress[ 6 ] = -{ - configMAC_ADDR0, - configMAC_ADDR1, - configMAC_ADDR2, - configMAC_ADDR3, - configMAC_ADDR4, - configMAC_ADDR5 -}; //XXX - -/* Define the network addressing. These parameters will be used if either -ipconfigUDE_DHCP is 0 or if ipconfigUSE_DHCP is 1 but DHCP auto configuration -failed. */ -static const uint8_t ucIPAddress[ 4 ] = -{ - configIP_ADDR0, - configIP_ADDR1, - configIP_ADDR2, - configIP_ADDR3 -}; -static const uint8_t ucNetMask[ 4 ] = -{ - configNET_MASK0, - configNET_MASK1, - configNET_MASK2, - configNET_MASK3 -}; -static const uint8_t ucGatewayAddress[ 4 ] = -{ - configGATEWAY_ADDR0, - configGATEWAY_ADDR1, - configGATEWAY_ADDR2, - configGATEWAY_ADDR3 -}; - -/* The following is the address of an OpenDNS server. */ -static const uint8_t ucDNSServerAddress[ 4 ] = -{ - configDNS_SERVER_ADDR0, - configDNS_SERVER_ADDR1, - configDNS_SERVER_ADDR2, - configDNS_SERVER_ADDR3 -}; - -/** - * @brief Application task startup hook. - */ -void vApplicationDaemonTaskStartupHook( void ); - -/** - * @brief Connects to WiFi. - */ -//static void prvWifiConnect( void ); - -/** - * @brief Initializes the board. - */ -static void prvMiscInitialization( void ); -/*-----------------------------------------------------------*/ - -/** - * @brief Application runtime entry point. - */ -void main( void ) -{ - /* Perform any hardware initialization that does not require the RTOS to be - * running. */ - - /* Start the scheduler. Initialization that requires the OS to be running, - * including the WiFi initialization, is performed in the RTOS daemon task - * startup hook. */ - // vTaskStartScheduler(); - - while(1) - { - vTaskDelay(10000); - } -} -/*-----------------------------------------------------------*/ - -static void prvMiscInitialization( void ) -{ - /* FIX ME. */ - uart_config(); - configPRINT_STRING(("Hello World.\r\n")); - /* Start logging task. */ - xLoggingTaskInitialize( mainLOGGING_TASK_STACK_SIZE, - tskIDLE_PRIORITY, - mainLOGGING_MESSAGE_QUEUE_LENGTH ); -} -/*-----------------------------------------------------------*/ - -void vApplicationDaemonTaskStartupHook( void ) -{ - prvMiscInitialization(); - - if( SYSTEM_Init() == pdPASS ) - { -#if(1) - /* Initialise the RTOS's TCP/IP stack. The tasks that use the network - are created in the vApplicationIPNetworkEventHook() hook function - below. The hook function is called when the network connects. */ - FreeRTOS_IPInit( ucIPAddress, - ucNetMask, - ucGatewayAddress, - ucDNSServerAddress, - ucMACAddress ); -#endif - - /* Connect to the wifi before running the demos */ - //prvWifiConnect(); - - /* Provision the device with AWS certificate and private key. */ - vDevModeKeyProvisioning(); - - /* Run all demos. */ - DEMO_RUNNER_RunDemos(); -#if(0) - /* Create the task to run tests. */ - xTaskCreate( TEST_RUNNER_RunTests_task, - "RunTests_task", - mainTEST_RUNNER_TASK_STACK_SIZE, - NULL, - tskIDLE_PRIORITY, - NULL ); -#endif - } -} -/*-----------------------------------------------------------*/ - -#if(0) -void prvWifiConnect( void ) -{ - WiFiNetworkParams_t xJoinAPParams; - WiFiReturnCode_t xWifiStatus; - - xWifiStatus = WIFI_On(); - - if( xWifiStatus == eWiFiSuccess ) - { - configPRINTF( ( "WiFi module initialized. Connecting to AP...\r\n" ) ); - } - else - { - configPRINTF( ( "WiFi module failed to initialize.\r\n" ) ); - - while( 1 ) - { - } - } - - /* Setup parameters. */ - xJoinAPParams.pcSSID = clientcredentialWIFI_SSID; - xJoinAPParams.pcPassword = clientcredentialWIFI_PASSWORD; - xJoinAPParams.xSecurity = clientcredentialWIFI_SECURITY; - - xWifiStatus = WIFI_ConnectAP( &( xJoinAPParams ) ); - - if( xWifiStatus == eWiFiSuccess ) - { - configPRINTF( ( "WiFi Connected to AP. Creating tasks which use network...\r\n" ) ); - } - else - { - configPRINTF( ( "WiFi failed to connect to AP.\r\n" ) ); - - while( 1 ) - { - } - } -} -#endif -/*-----------------------------------------------------------*/ - -const char * pcApplicationHostnameHook( void ) -{ - /* Assign the name "FreeRTOS" to this network node. This function will - * be called during the DHCP: the machine will be registered with an IP - * address plus this name. */ - return "RenesasRX_FREERTOS_TCP_TEST"; -} -/*-----------------------------------------------------------*/ diff --git a/demos/renesas/rx63n-gr-sakura2/common/application_code/renesas_code/.placeholder b/demos/renesas/rx63n-gr-sakura2/common/application_code/renesas_code/.placeholder deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx63n-gr-sakura2/common/config_files/FreeRTOSConfig.h b/demos/renesas/rx63n-gr-sakura2/common/config_files/FreeRTOSConfig.h deleted file mode 100644 index ab40df5a293..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/common/config_files/FreeRTOSConfig.h +++ /dev/null @@ -1,340 +0,0 @@ -/* - * FreeRTOS Kernel V10.0.1 - * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * http://aws.amazon.com/freertos - * http://www.FreeRTOS.org - */ - -#ifndef FREERTOS_CONFIG_H -#define FREERTOS_CONFIG_H - -#include "serial_term_uart.h" - -#if defined(AMAZON_FREERTOS_ENABLE_UNIT_TESTS) -/* Unity includes. */ -#include "unity_internals.h" -#endif - -/*----------------------------------------------------------- -* Application specific definitions. -* -* These definitions should be adjusted for your particular hardware and -* application requirements. -* -* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE -* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. -* http://www.freertos.org/a00110.html -* -* The bottom of this file contains some constants specific to running the UDP -* stack in this demo. Constants specific to FreeRTOS+TCP itself (rather than -* the demo) are contained in FreeRTOSIPConfig.h. -*----------------------------------------------------------*/ -#define configENABLE_BACKWARD_COMPATIBILITY 1 -#define configUSE_PREEMPTION 1 -#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 -#define configMAX_PRIORITIES ( 7 ) -#define configTICK_RATE_HZ ( 1000 ) -#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 512 ) -#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 128U * 1024U ) ) -#define configMAX_TASK_NAME_LEN ( 12 ) -#define configUSE_TRACE_FACILITY 1 -#define configUSE_16_BIT_TICKS 0 -#define configIDLE_SHOULD_YIELD 1 -#define configUSE_CO_ROUTINES 0 -#define configUSE_MUTEXES 1 -#define configUSE_RECURSIVE_MUTEXES 1 -#define configQUEUE_REGISTRY_SIZE 0 -#define configUSE_APPLICATION_TASK_TAG 0 -#define configUSE_COUNTING_SEMAPHORES 1 -#define configUSE_ALTERNATIVE_API 0 -#define configNUM_THREAD_LOCAL_STORAGE_POINTERS 3 /* FreeRTOS+FAT requires 2 pointers if a CWD is supported. */ -#define configRECORD_STACK_HIGH_ADDRESS 1 - -#define configUSE_DAEMON_TASK_STARTUP_HOOK 1 - -#define configCPU_CLOCK_HZ ( 96000000UL ) -#define configPERIPHERAL_CLOCK_HZ ( 48000000UL ) -#define configUSE_QUEUE_SETS 1 - -/* Hook function related definitions. */ -#define configUSE_TICK_HOOK 0 -#define configUSE_IDLE_HOOK 0 -#define configUSE_MALLOC_FAILED_HOOK 1 -#define configCHECK_FOR_STACK_OVERFLOW 0 /* Not applicable to the Win32 port. */ - -/* Software timer related definitions. */ -#define configUSE_TIMERS 1 -#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 ) -#define configTIMER_QUEUE_LENGTH 5 -#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE * 6 ) - -/* The interrupt priority used by the kernel itself for the tick interrupt and -the pended interrupt. This would normally be the lowest priority. */ -#define configKERNEL_INTERRUPT_PRIORITY 1 - -/* The maximum interrupt priority from which FreeRTOS API calls can be made. -Interrupts that use a priority above this will not be effected by anything the -kernel is doing. */ -#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4 - -/* The peripheral used to generate the tick interrupt is configured as part of -the application code. This constant should be set to the vector number of the -peripheral chosen. As supplied this is CMT0. */ -#define configTICK_VECTOR _CMT0_CMI0 //CMT0 -//#define configTICK_VECTOR _CMT1_CMI1 //CMT1 -//#define configTICK_VECTOR _CMT2_CMI2 //CMT2 -//#define configTICK_VECTOR _CMT3_CMI3 //CMT3 - -/* Event group related definitions. */ -#define configUSE_EVENT_GROUPS 1 - -/* Run time stats gathering definitions. */ -unsigned long ulGetRunTimeCounterValue( void ); -void vConfigureTimerForRunTimeStats( void ); -#define configGENERATE_RUN_TIME_STATS 0 -//#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() vConfigureTimerForRunTimeStats() -//#define portGET_RUN_TIME_COUNTER_VALUE() ulGetRunTimeCounterValue() - -/* Co-routine definitions. */ -#define configUSE_CO_ROUTINES 0 -#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) - -/* Currently the TCP/IP stack is using dynamic allocation, and the MQTT task is - * using static allocation. */ -#define configSUPPORT_DYNAMIC_ALLOCATION 1 -#define configSUPPORT_STATIC_ALLOCATION 1 - -/* Set the following definitions to 1 to include the API function, or zero - * to exclude the API function. */ -#define INCLUDE_vTaskPrioritySet 1 -#define INCLUDE_uxTaskPriorityGet 1 -#define INCLUDE_vTaskDelete 1 -#define INCLUDE_vTaskCleanUpResources 0 -#define INCLUDE_vTaskSuspend 1 -#define INCLUDE_vTaskDelayUntil 1 -#define INCLUDE_vTaskDelay 1 -#define INCLUDE_uxTaskGetStackHighWaterMark 1 -#define INCLUDE_xTaskGetSchedulerState 1 -#define INCLUDE_xTimerGetTimerTaskHandle 0 -#define INCLUDE_xTaskGetIdleTaskHandle 0 -#define INCLUDE_xQueueGetMutexHolder 1 -#define INCLUDE_eTaskGetState 1 -#define INCLUDE_xEventGroupSetBitsFromISR 1 -#define INCLUDE_xTimerPendFunctionCall 1 -#define INCLUDE_xTaskGetCurrentTaskHandle 1 -#define INCLUDE_xTaskAbortDelay 1 - -/* This demo makes use of one or more example stats formatting functions. These - * format the raw data provided by the uxTaskGetSystemState() function in to human - * readable ASCII form. See the notes in the implementation of vTaskList() within - * FreeRTOS/Source/tasks.c for limitations. configUSE_STATS_FORMATTING_FUNCTIONS - * is set to 2 so the formatting functions are included without the stdio.h being - * included in tasks.c. That is because this project defines its own sprintf() - * functions. */ -#define configUSE_STATS_FORMATTING_FUNCTIONS 1 - -#if defined(AMAZON_FREERTOS_ENABLE_UNIT_TESTS) -#define configASSERT( x ) do { if( ( x ) == 0 ) TEST_ABORT(); } while( 0 ) -#elif (1) // FIX ME: Is it better to use macros like 'defined(AMAZON_FREERTOS_ENABLE_ASSERT) || !defined(AMAZON_FREERTOS_DISABLE_ASSERT)'? -/* Assert call defined for debug builds. */ -extern void vAssertCalled( void ); -#define configASSERT( x ) do { if( ( x ) == 0 ) vAssertCalled(); } while( 0 ) -#else -/* Disable Assert call for release builds. */ -#define configASSERT( x ) ( ( void ) 0 ) -#endif - -/* The function that implements FreeRTOS printf style output, and the macro - * that maps the configPRINTF() macros to that function. */ -extern void vLoggingPrintf( const char * pcFormat, ... ); -#define configPRINTF( X ) vLoggingPrintf X - -/* Non-format version thread-safe print */ -extern void vLoggingPrint( const char * pcMessage ); -#define configPRINT( X ) vLoggingPrint( X ) - -/* Map the logging task's printf to the board specific output function. */ -#define configPRINT_STRING( x ) uart_string_printf( x ) - -/* Sets the length of the buffers into which logging messages are written - so - * also defines the maximum length of each log message. */ -#define configLOGGING_MAX_MESSAGE_LENGTH 192 - -/* Set to 1 to prepend each log message with a message number, the task name, - * and a time stamp. */ -#define configLOGGING_INCLUDE_TIME_AND_TASK_NAME 1 - -/* Application specific definitions follow. **********************************/ - -/* If configINCLUDE_DEMO_DEBUG_STATS is set to one, then a few basic IP trace - * macros are defined to gather some UDP stack statistics that can then be viewed - * through the CLI interface. */ -#define configINCLUDE_DEMO_DEBUG_STATS 1 - -/* The size of the global output buffer that is available for use when there - * are multiple command interpreters running at once (for example, one on a UART - * and one on TCP/IP). This is done to prevent an output buffer being defined by - * each implementation - which would waste RAM. In this case, there is only one - * command interpreter running, and it has its own local output buffer, so the - * global buffer is just set to be one byte long as it is not used and should not - * take up unnecessary RAM. */ -#define configCOMMAND_INT_MAX_OUTPUT_SIZE 1 - -/* Only used when running in the FreeRTOS Windows simulator. Defines the - * priority of the task used to simulate Ethernet interrupts. */ -#define configMAC_ISR_SIMULATOR_PRIORITY ( configMAX_PRIORITIES - 1 ) - -/* This demo creates a virtual network connection by accessing the raw Ethernet - * or WiFi data to and from a real network connection. Many computers have more - * than one real network port, and configNETWORK_INTERFACE_TO_USE is used to tell - * the demo which real port should be used to create the virtual port. The ports - * available are displayed on the console when the application is executed. For - * example, on my development laptop setting configNETWORK_INTERFACE_TO_USE to 4 - * results in the wired network being used, while setting - * configNETWORK_INTERFACE_TO_USE to 2 results in the wireless network being - * used. */ -#define configNETWORK_INTERFACE_TO_USE 2L - -/* The address of an echo server that will be used by the two demo echo client - * tasks: - * http://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/TCP_Echo_Clients.html, - * http://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/UDP_Echo_Clients.html. */ -#define configECHO_SERVER_ADDR0 192 -#define configECHO_SERVER_ADDR1 168 -#define configECHO_SERVER_ADDR2 1 -#define configECHO_SERVER_ADDR3 200 -#define configTCP_ECHO_CLIENT_PORT 9999 - -/* Default MAC address configuration. The demo creates a virtual network - * connection that uses this MAC address by accessing the raw Ethernet/WiFi data - * to and from a real network connection on the host PC. See the - * configNETWORK_INTERFACE_TO_USE definition above for information on how to - * configure the real network connection to use. */ -#define configMAC_ADDR0 0x74 -#define configMAC_ADDR1 0x90 -#define configMAC_ADDR2 0x50 -#define configMAC_ADDR3 0x00 -#define configMAC_ADDR4 0x79 -#define configMAC_ADDR5 0x03 - -/* Default IP address configuration. Used in ipconfigUSE_DHCP is set to 0, or - * ipconfigUSE_DHCP is set to 1 but a DNS server cannot be contacted. */ -#define configIP_ADDR0 172 -#define configIP_ADDR1 27 -#define configIP_ADDR2 49 -#define configIP_ADDR3 127 - -/* Default gateway IP address configuration. Used in ipconfigUSE_DHCP is set to - * 0, or ipconfigUSE_DHCP is set to 1 but a DNS server cannot be contacted. */ -#define configGATEWAY_ADDR0 172 -#define configGATEWAY_ADDR1 27 -#define configGATEWAY_ADDR2 49 -#define configGATEWAY_ADDR3 1 - -/* Default DNS server configuration. OpenDNS addresses are 208.67.222.222 and - * 208.67.220.220. Used in ipconfigUSE_DHCP is set to 0, or ipconfigUSE_DHCP is - * set to 1 but a DNS server cannot be contacted.*/ -#define configDNS_SERVER_ADDR0 143 -#define configDNS_SERVER_ADDR1 103 -#define configDNS_SERVER_ADDR2 47 -#define configDNS_SERVER_ADDR3 193 - -/* Default netmask configuration. Used in ipconfigUSE_DHCP is set to 0, or - * ipconfigUSE_DHCP is set to 1 but a DNS server cannot be contacted. */ -#define configNET_MASK0 255 -#define configNET_MASK1 255 -#define configNET_MASK2 255 -#define configNET_MASK3 0 - -/* The UDP port to which print messages are sent. */ -#define configPRINT_PORT ( 15000 ) - -#define configPROFILING ( 0 ) - -/* Pseudo random number generater used by some demo tasks. */ -uint32_t ulRand(void); -#define configRAND32() ulRand() - -/* The platform FreeRTOS is running on. */ -#define configPLATFORM_NAME "RenesasRX63N" - -/* Header required for the tracealyzer recorder library. */ -//#include "trcRecorder.h" - -/* When the FIT configurator or the Smart Configurator is used, platform.h has to be used. */ -#define configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H 1 - -/* TODO: Improve configASSERT() implementation. */ -#if 0 // For example, ESP32's FreeRTOSConfig.h has following code. */ - * FreeRTOS Kernel V10.0.1 - * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. -/* configASSERT behaviour */ -#if defined(CONFIG_FREERTOS_ASSERT_DISABLE) - #define configASSERT(a) /* assertions disabled */ -#elif defined(CONFIG_FREERTOS_ASSERT_FAIL_PRINT_CONTINUE) - #define configASSERT(a) if (!(a)) { \ - ets_printf("%s:%d (%s)- assert failed!\n", __FILE__, __LINE__, \ - __FUNCTION__); \ - } -#else /* CONFIG_FREERTOS_ASSERT_FAIL_ABORT */ - #define configASSERT(a) if (!(a)) { \ - ets_printf("%s:%d (%s)- assert failed!\n", __FILE__, __LINE__, \ - __FUNCTION__); \ - abort(); \ - } -#endif -#endif /* #if 0 */ -#if 0 // For example, XMC4800's FreeRTOSConfig.h has following code. */ - * FreeRTOS Kernel V10.0.1 - * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. -/* Define configASSERT() to disable interrupts and sit in a loop. */ -#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); } -#endif /* #if 0 */ -#if 0 // Or to be orthodox? For example, Zynq7000's FreeRTOSConfig.h has following code. */ - * FreeRTOS Kernel V10.0.1 - * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. -#define configASSERT( x ) if( ( x ) == 0 ) vAssertCalled(__FILE__, __LINE__) -#endif /* #if 0 */ -#if 0 // Or to be ANSI standard? For example, newlib has following code. */ -#ifdef NDEBUG /* required by ANSI standard */ -# define assert(__e) ((void)0) -#else -# define assert(__e) ((__e) ? (void)0 : __assert_func (__FILE__, __LINE__, \ - __ASSERT_FUNC, #__e)) -# ifndef __ASSERT_FUNC - /* Use g++'s demangled names in C++. */ -# if defined __cplusplus && defined __GNUC__ -# define __ASSERT_FUNC __PRETTY_FUNCTION__ - /* C99 requires the use of __func__. */ -# elif __STDC_VERSION__ >= 199901L -# define __ASSERT_FUNC __func__ - /* Older versions of gcc don't have __func__ but can use __FUNCTION__. */ -# elif __GNUC__ >= 2 -# define __ASSERT_FUNC __FUNCTION__ - /* failed to detect __func__ support. */ -# else -# define __ASSERT_FUNC ((char *) 0) -# endif -# endif /* !__ASSERT_FUNC */ -#endif /* !NDEBUG */ -#endif /* #if 0 */ - -#endif /* FREERTOS_CONFIG_H */ diff --git a/demos/renesas/rx63n-gr-sakura2/common/config_files/FreeRTOSIPConfig.h b/demos/renesas/rx63n-gr-sakura2/common/config_files/FreeRTOSIPConfig.h deleted file mode 100644 index 65eaf142c7b..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/common/config_files/FreeRTOSIPConfig.h +++ /dev/null @@ -1,331 +0,0 @@ -/* - * FreeRTOS Kernel V10.0.1 - * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * http://aws.amazon.com/freertos - * http://www.FreeRTOS.org - */ - - -/***************************************************************************** -* -* See the following URL for configuration information. -* http://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/TCP_IP_Configuration.html -* -*****************************************************************************/ -#include "r_ether_rx_config.h" - -#ifndef FREERTOS_IP_CONFIG_H -#define FREERTOS_IP_CONFIG_H - -/* Prototype for the function used to print out. In this case it prints to the - * console before the network is connected then a UDP port after the network has - * connected. */ -//extern void vLoggingPrintf( const char * pcFormatString, -// ... ); - -/* Set to 1 to print out debug messages. If ipconfigHAS_DEBUG_PRINTF is set to - * 1 then FreeRTOS_debug_printf should be defined to the function used to print - * out the debugging messages. */ -#define ipconfigHAS_DEBUG_PRINTF 1 -#if ( ipconfigHAS_DEBUG_PRINTF == 1 ) - //#define FreeRTOS_debug_printf( X ) vLoggingPrintf( X ) - #define FreeRTOS_debug_printf( X ) configPRINTF( X ) -#endif - -/* Set to 1 to print out non debugging messages, for example the output of the - * FreeRTOS_netstat() command, and ping replies. If ipconfigHAS_PRINTF is set to 1 - * then FreeRTOS_printf should be set to the function used to print out the - * messages. */ -#define ipconfigHAS_PRINTF 1 -#if ( ipconfigHAS_PRINTF == 1 ) - #define FreeRTOS_printf( X ) configPRINTF( X ) -#endif - -/* Define the byte order of the target MCU (the MCU FreeRTOS+TCP is executing - * on). Valid options are pdFREERTOS_BIG_ENDIAN and pdFREERTOS_LITTLE_ENDIAN. */ -#define ipconfigBYTE_ORDER pdFREERTOS_LITTLE_ENDIAN - -/* If the network card/driver includes checksum offloading (IP/TCP/UDP checksums) - * then set ipconfigDRIVER_INCLUDED_RX_IP_CHECKSUM to 1 to prevent the software - * stack repeating the checksum calculations. */ -#define ipconfigDRIVER_INCLUDED_RX_IP_CHECKSUM 1 - -/* Several API's will block until the result is known, or the action has been - * performed, for example FreeRTOS_send() and FreeRTOS_recv(). The timeouts can be - * set per socket, using setsockopt(). If not set, the times below will be - * used as defaults. */ -#define ipconfigSOCK_DEFAULT_RECEIVE_BLOCK_TIME ( 10000 ) -#define ipconfigSOCK_DEFAULT_SEND_BLOCK_TIME ( 10000 ) - -/* Include support for DNS caching. For TCP, having a small DNS cache is very - * useful. When a cache is present, ipconfigDNS_REQUEST_ATTEMPTS can be kept low - * and also DNS may use small timeouts. If a DNS reply comes in after the DNS - * socket has been destroyed, the result will be stored into the cache. The next - * call to FreeRTOS_gethostbyname() will return immediately, without even creating - * a socket. */ -#define ipconfigUSE_DNS_CACHE ( 1 ) -#define ipconfigDNS_REQUEST_ATTEMPTS ( 2 ) - -/* The IP stack executes it its own task (although any application task can make - * use of its services through the published sockets API). ipconfigUDP_TASK_PRIORITY - * sets the priority of the task that executes the IP stack. The priority is a - * standard FreeRTOS task priority so can take any value from 0 (the lowest - * priority) to (configMAX_PRIORITIES - 1) (the highest priority). - * configMAX_PRIORITIES is a standard FreeRTOS configuration parameter defined in - * FreeRTOSConfig.h, not FreeRTOSIPConfig.h. Consideration needs to be given as to - * the priority assigned to the task executing the IP stack relative to the - * priority assigned to tasks that use the IP stack. */ -#define ipconfigIP_TASK_PRIORITY ( configMAX_PRIORITIES - 2 ) - -/* The size, in words (not bytes), of the stack allocated to the FreeRTOS+TCP - * task. This setting is less important when the FreeRTOS Win32 simulator is used - * as the Win32 simulator only stores a fixed amount of information on the task - * stack. FreeRTOS includes optional stack overflow detection, see: - * http://www.freertos.org/Stacks-and-stack-overflow-checking.html. */ -#define ipconfigIP_TASK_STACK_SIZE_WORDS ( configMINIMAL_STACK_SIZE * 5 ) - -/* ipconfigRAND32() is called by the IP stack to generate random numbers for - * things such as a DHCP transaction number or initial sequence number. Random - * number generation is performed via this macro to allow applications to use their - * own random number generation method. For example, it might be possible to - * generate a random number by sampling noise on an analogue input. */ -uint32_t ulRand(void); -#define ipconfigRAND32() ulRand() - -/* If ipconfigUSE_NETWORK_EVENT_HOOK is set to 1 then FreeRTOS+TCP will call the - * network event hook at the appropriate times. If ipconfigUSE_NETWORK_EVENT_HOOK - * is not set to 1 then the network event hook will never be called. See: - * http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_UDP/API/vApplicationIPNetworkEventHook.shtml. - */ -#define ipconfigUSE_NETWORK_EVENT_HOOK 1 - -/* Sockets have a send block time attribute. If FreeRTOS_sendto() is called but - * a network buffer cannot be obtained then the calling task is held in the Blocked - * state (so other tasks can continue to executed) until either a network buffer - * becomes available or the send block time expires. If the send block time expires - * then the send operation is aborted. The maximum allowable send block time is - * capped to the value set by ipconfigMAX_SEND_BLOCK_TIME_TICKS. Capping the - * maximum allowable send block time prevents prevents a deadlock occurring when - * all the network buffers are in use and the tasks that process (and subsequently - * free) the network buffers are themselves blocked waiting for a network buffer. - * ipconfigMAX_SEND_BLOCK_TIME_TICKS is specified in RTOS ticks. A time in - * milliseconds can be converted to a time in ticks by dividing the time in - * milliseconds by portTICK_PERIOD_MS. */ -#define ipconfigUDP_MAX_SEND_BLOCK_TIME_TICKS ( 5000 / portTICK_PERIOD_MS ) - -/* If ipconfigUSE_DHCP is 1 then FreeRTOS+TCP will attempt to retrieve an IP - * address, netmask, DNS server address and gateway address from a DHCP server. If - * ipconfigUSE_DHCP is 0 then FreeRTOS+TCP will use a static IP address. The - * stack will revert to using the static IP address even when ipconfigUSE_DHCP is - * set to 1 if a valid configuration cannot be obtained from a DHCP server for any - * reason. The static configuration used is that passed into the stack by the - * FreeRTOS_IPInit() function call. */ -#define ipconfigUSE_DHCP 1 -#define ipconfigDHCP_REGISTER_HOSTNAME 1 -#define ipconfigDHCP_USES_UNICAST 1 -#define ipconfigDHCP_SEND_DISCOVER_AFTER_AUTO_IP 0 - -/* If ipconfigDHCP_USES_USER_HOOK is set to 1 then the application writer must - * provide an implementation of the DHCP callback function, - * xApplicationDHCPUserHook(). */ -#define ipconfigUSE_DHCP_HOOK 0 - -/* When ipconfigUSE_DHCP is set to 1, DHCP requests will be sent out at - * increasing time intervals until either a reply is received from a DHCP server - * and accepted, or the interval between transmissions reaches - * ipconfigMAXIMUM_DISCOVER_TX_PERIOD. The IP stack will revert to using the - * static IP address passed as a parameter to FreeRTOS_IPInit() if the - * re-transmission time interval reaches ipconfigMAXIMUM_DISCOVER_TX_PERIOD without - * a DHCP reply being received. */ -#define ipconfigMAXIMUM_DISCOVER_TX_PERIOD ( 120000 / portTICK_PERIOD_MS ) - -/* The ARP cache is a table that maps IP addresses to MAC addresses. The IP - * stack can only send a UDP message to a remove IP address if it knowns the MAC - * address associated with the IP address, or the MAC address of the router used to - * contact the remote IP address. When a UDP message is received from a remote IP - * address the MAC address and IP address are added to the ARP cache. When a UDP - * message is sent to a remote IP address that does not already appear in the ARP - * cache then the UDP message is replaced by a ARP message that solicits the - * required MAC address information. ipconfigARP_CACHE_ENTRIES defines the maximum - * number of entries that can exist in the ARP table at any one time. */ -#define ipconfigARP_CACHE_ENTRIES 6 - -/* ARP requests that do not result in an ARP response will be re-transmitted a - * maximum of ipconfigMAX_ARP_RETRANSMISSIONS times before the ARP request is - * aborted. */ -#define ipconfigMAX_ARP_RETRANSMISSIONS ( 5 ) - -/* ipconfigMAX_ARP_AGE defines the maximum time between an entry in the ARP - * table being created or refreshed and the entry being removed because it is stale. - * New ARP requests are sent for ARP cache entries that are nearing their maximum - * age. ipconfigMAX_ARP_AGE is specified in tens of seconds, so a value of 150 is - * equal to 1500 seconds (or 25 minutes). */ -#define ipconfigMAX_ARP_AGE 150 - -/* Implementing FreeRTOS_inet_addr() necessitates the use of string handling - * routines, which are relatively large. To save code space the full - * FreeRTOS_inet_addr() implementation is made optional, and a smaller and faster - * alternative called FreeRTOS_inet_addr_quick() is provided. FreeRTOS_inet_addr() - * takes an IP in decimal dot format (for example, "192.168.0.1") as its parameter. - * FreeRTOS_inet_addr_quick() takes an IP address as four separate numerical octets - * (for example, 192, 168, 0, 1) as its parameters. If - * ipconfigINCLUDE_FULL_INET_ADDR is set to 1 then both FreeRTOS_inet_addr() and - * FreeRTOS_indet_addr_quick() are available. If ipconfigINCLUDE_FULL_INET_ADDR is - * not set to 1 then only FreeRTOS_indet_addr_quick() is available. */ -#define ipconfigINCLUDE_FULL_INET_ADDR 0 - -/* ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS defines the total number of network buffer that - * are available to the IP stack. The total number of network buffers is limited - * to ensure the total amount of RAM that can be consumed by the IP stack is capped - * to a pre-determinable value. */ -#define ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS ETHER_CFG_EMAC_TX_DESCRIPTORS - -/* A FreeRTOS queue is used to send events from application tasks to the IP - * stack. ipconfigEVENT_QUEUE_LENGTH sets the maximum number of events that can - * be queued for processing at any one time. The event queue must be a minimum of - * 5 greater than the total number of network buffers. */ -#define ipconfigEVENT_QUEUE_LENGTH ( ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS + 5 ) - -/* The address of a socket is the combination of its IP address and its port - * number. FreeRTOS_bind() is used to manually allocate a port number to a socket - * (to 'bind' the socket to a port), but manual binding is not normally necessary - * for client sockets (those sockets that initiate outgoing connections rather than - * wait for incoming connections on a known port number). If - * ipconfigALLOW_SOCKET_SEND_WITHOUT_BIND is set to 1 then calling - * FreeRTOS_sendto() on a socket that has not yet been bound will result in the IP - * stack automatically binding the socket to a port number from the range - * socketAUTO_PORT_ALLOCATION_START_NUMBER to 0xffff. If - * ipconfigALLOW_SOCKET_SEND_WITHOUT_BIND is set to 0 then calling FreeRTOS_sendto() - * on a socket that has not yet been bound will result in the send operation being - * aborted. */ -#define ipconfigALLOW_SOCKET_SEND_WITHOUT_BIND 1 - -/* Defines the Time To Live (TTL) values used in outgoing UDP packets. */ -#define ipconfigUDP_TIME_TO_LIVE 128 -/* Also defined in FreeRTOSIPConfigDefaults.h. */ -#define ipconfigTCP_TIME_TO_LIVE 128 - -/* USE_TCP: Use TCP and all its features. */ -#define ipconfigUSE_TCP ( 1 ) - -/* USE_WIN: Let TCP use windowing mechanism. */ -#define ipconfigUSE_TCP_WIN ( 0 ) - -/* The MTU is the maximum number of bytes the payload of a network frame can - * contain. For normal Ethernet V2 frames the maximum MTU is 1500. Setting a - * lower value can save RAM, depending on the buffer management scheme used. If - * ipconfigCAN_FRAGMENT_OUTGOING_PACKETS is 1 then (ipconfigNETWORK_MTU - 28) must - * be divisible by 8. */ -#define ipconfigNETWORK_MTU 1500 - -/* Set ipconfigUSE_DNS to 1 to include a basic DNS client/resolver. DNS is used - * through the FreeRTOS_gethostbyname() API function. */ -#define ipconfigUSE_DNS 1 - -/* If ipconfigREPLY_TO_INCOMING_PINGS is set to 1 then the IP stack will - * generate replies to incoming ICMP echo (ping) requests. */ -#define ipconfigREPLY_TO_INCOMING_PINGS 1 - -/* If ipconfigSUPPORT_OUTGOING_PINGS is set to 1 then the - * FreeRTOS_SendPingRequest() API function is available. */ -#define ipconfigSUPPORT_OUTGOING_PINGS 0 - -/* If ipconfigSUPPORT_SELECT_FUNCTION is set to 1 then the FreeRTOS_select() - * (and associated) API function is available. */ -#define ipconfigSUPPORT_SELECT_FUNCTION 0 - -/* If ipconfigFILTER_OUT_NON_ETHERNET_II_FRAMES is set to 1 then Ethernet frames - * that are not in Ethernet II format will be dropped. This option is included for - * potential future IP stack developments. */ -#define ipconfigFILTER_OUT_NON_ETHERNET_II_FRAMES 1 - -/* If ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES is set to 1 then it is the - * responsibility of the Ethernet interface to filter out packets that are of no - * interest. If the Ethernet interface does not implement this functionality, then - * set ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES to 0 to have the IP stack - * perform the filtering instead (it is much less efficient for the stack to do it - * because the packet will already have been passed into the stack). If the - * Ethernet driver does all the necessary filtering in hardware then software - * filtering can be removed by using a value other than 1 or 0. */ -#define ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES 0 //XXX - -/* The windows simulator cannot really simulate MAC interrupts, and needs to - * block occasionally to allow other tasks to run. */ -//#define configWINDOWS_MAC_INTERRUPT_SIMULATOR_DELAY ( 20 / portTICK_PERIOD_MS ) - -/* Advanced only: in order to access 32-bit fields in the IP packets with - * 32-bit memory instructions, all packets will be stored 32-bit-aligned, - * plus 16-bits. This has to do with the contents of the IP-packets: all - * 32-bit fields are 32-bit-aligned, plus 16-bit. */ -#define ipconfigPACKET_FILLER_SIZE 2 - -/* Define the size of the pool of TCP window descriptors. On the average, each - * TCP socket will use up to 2 x 6 descriptors, meaning that it can have 2 x 6 - * outstanding packets (for Rx and Tx). When using up to 10 TP sockets - * simultaneously, one could define TCP_WIN_SEG_COUNT as 120. */ -#define ipconfigTCP_WIN_SEG_COUNT 240 - -/* Each TCP socket has a circular buffers for Rx and Tx, which have a fixed - * maximum size. Define the size of Rx buffer for TCP sockets. */ -#define ipconfigTCP_RX_BUFFER_LENGTH ( 3000 ) - -/* Define the size of Tx buffer for TCP sockets. */ -#define ipconfigTCP_TX_BUFFER_LENGTH ( 3000 ) - -/* When using call-back handlers, the driver may check if the handler points to - * real program memory (RAM or flash) or just has a random non-zero value. */ -#define ipconfigIS_VALID_PROG_ADDRESS( x ) ( ( x ) != NULL ) - -/* Include support for TCP keep-alive messages. */ -#define ipconfigTCP_KEEP_ALIVE ( 1 ) -#define ipconfigTCP_KEEP_ALIVE_INTERVAL ( 20 ) /* Seconds. */ - -/* The socket semaphore is used to unblock the MQTT task. */ -#define ipconfigSOCKET_HAS_USER_SEMAPHORE ( 0 ) - -#define ipconfigSOCKET_HAS_USER_WAKE_CALLBACK ( 1 ) -#define ipconfigUSE_CALLBACKS ( 0 ) - -#define ipconfigZERO_COPY_TX_DRIVER ( 0 ) -#define ipconfigZERO_COPY_RX_DRIVER ( 0 ) - -/* Possible optimisation for expert users - requires network driver support. - * When ipconfigUSE_LINKED_RX_MESSAGES is set to non-zero value then - * instead of passing received packets into the IP task one at a time the - * network interface can chain received packets together and pass them into - * the IP task in one go. The packets are chained using the pxNextBuffer - * member. This optimisation is useful when there is high network traffic. - * When ipconfigUSE_LINKED_RX_MESSAGES is set to 0 then only one buffer will - * be sent at a time. This is the default way for +TCP to pass messages from - * the MAC to the TCP/IP stack. */ -#define ipconfigUSE_LINKED_RX_MESSAGES ( 0 ) - -#if defined(__GNUC__) -#define portINLINE __inline -#elif defined(__ICCRX__) -#define portINLINE inline -#endif - -void vApplicationMQTTGetKeys( const char ** ppcRootCA, - const char ** ppcClientCert, - const char ** ppcClientPrivateKey ); - -#endif /* FREERTOS_IP_CONFIG_H */ diff --git a/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_bufferpool_config.h b/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_bufferpool_config.h deleted file mode 100644 index 58f33777139..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_bufferpool_config.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Amazon FreeRTOS V1.2.2 - * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * http://aws.amazon.com/freertos - * http://www.FreeRTOS.org - */ - -/** - * @file aws_bufferpool_config.h - * @brief Buffer Pool config options. - */ - -#ifndef _AWS_BUFFER_POOL_CONFIG_H_ -#define _AWS_BUFFER_POOL_CONFIG_H_ - -/** - * @brief The number of buffers in the static buffer pool. - */ -#define bufferpoolconfigNUM_BUFFERS ( 8 ) - -/** - * @brief The size of each buffer in the static buffer pool. - */ -#define bufferpoolconfigBUFFER_SIZE ( 512 ) - -#endif /* _AWS_BUFFER_POOL_CONFIG_H_ */ diff --git a/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_demo_config.h b/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_demo_config.h deleted file mode 100644 index 35dccf85473..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_demo_config.h +++ /dev/null @@ -1,100 +0,0 @@ -/* - * Amazon FreeRTOS V1.2.2 - * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * http://aws.amazon.com/freertos - * http://www.FreeRTOS.org - */ - -#ifndef _AWS_DEMO_CONFIG_H_ -#define _AWS_DEMO_CONFIG_H_ - -/* Number of sub pub tasks that connect to a broker that is not using TLS. */ -#define democonfigMQTT_SUB_PUB_NUM_UNSECURE_TASKS ( 0 ) - -/* Number of sub pub tasks that connect to a broker that is using TLS. */ -#define democonfigMQTT_SUB_PUB_NUM_SECURE_TASKS ( 1 ) - -#define democonfigSHADOW_DEMO_NUM_TASKS ( 1 ) - -/* IoT simple subscribe/publish example task parameters. */ -#define democonfigMQTT_SUB_PUB_TASK_STACK_SIZE ( configMINIMAL_STACK_SIZE * 5 ) -#define democonfigMQTT_SUB_PUB_TASK_PRIORITY ( tskIDLE_PRIORITY ) - -/* Greengrass discovery example task parameters. */ -#define democonfigGREENGRASS_DISCOVERY_TASK_STACK_SIZE ( configMINIMAL_STACK_SIZE * 16 ) -#define democonfigGREENGRASS_DISCOVERY_TASK_PRIORITY ( tskIDLE_PRIORITY ) - -/* Shadow demo task parameters. */ -#define democonfigSHADOW_DEMO_TASK_STACK_SIZE ( configMINIMAL_STACK_SIZE * 4 ) -#define democonfigSHADOW_DEMO_TASK_PRIORITY ( tskIDLE_PRIORITY ) - - -/* TCP Echo Client tasks single example parameters. */ -#define democonfigTCP_ECHO_TASKS_SINGLE_TASK_STACK_SIZE ( configMINIMAL_STACK_SIZE * 4 ) -#define democonfigTCP_ECHO_TASKS_SINGLE_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) - -/* OTA Update task example parameters. */ -#define democonfigOTA_UPDATE_TASK_STACK_SIZE ( 4 * configMINIMAL_STACK_SIZE ) -#define democonfigOTA_UPDATE_TASK_TASK_PRIORITY ( tskIDLE_PRIORITY ) - -/* Simple TCP Echo Server task example parameters */ -#define democonfigTCP_ECHO_SERVER_TASK_STACK_SIZE ( configMINIMAL_STACK_SIZE * 6 ) -#define democonfigTCP_ECHO_SERVER_TASK_PRIORITY ( tskIDLE_PRIORITY ) - -/* TCP Echo Client tasks multi task example parameters. */ -#define democonfigTCP_ECHO_TASKS_SEPARATE_TASK_STACK_SIZE ( configMINIMAL_STACK_SIZE * 4 ) -#define democonfigTCP_ECHO_TASKS_SEPARATE_TASK_PRIORITY ( tskIDLE_PRIORITY ) - -/* MQTT echo task example parameters. */ -#define democonfigMQTT_ECHO_TASK_STACK_SIZE ( configMINIMAL_STACK_SIZE * 3 ) -#define democonfigMQTT_ECHO_TASK_PRIORITY ( tskIDLE_PRIORITY ) - -/* Timeout used when establishing a connection, which required TLS -negotiation. */ -#define democonfigMQTT_ECHO_TLS_NEGOTIATION_TIMEOUT pdMS_TO_TICKS( 12000 ) - -/* Timeout used when performing MQTT operations that do not need extra time -to perform a TLS negotiation. */ -#define democonfigMQTT_TIMEOUT pdMS_TO_TICKS( 2500 ) - -/* Send AWS IoT MQTT traffic encrypted. */ -#define democonfigMQTT_AGENT_CONNECT_FLAGS ( mqttagentREQUIRE_TLS ) - -/* Workaround for missing function prototypes for various demo programs. */ -extern void vOTAUpdateDemoTask( void * pvParameters ); -extern void vStartTCPEchoClientTasks_SeparateTasks( void ); -extern void vStartTCPEchoClientTasks_SeparateTasks( void ); -extern void vStartTCPEchoClientTasks_SingleTasks( void ); -extern BaseType_t xAreSeparateTaskTCPEchoClientsStillRunning( void ); -extern BaseType_t xAreSingleTaskTCPEchoClientsStillRunning( void ); -extern int convert_pem_to_der( const unsigned char * pucInput, - size_t xLen, - unsigned char * pucOutput, - size_t * pxOlen ); -//extern CK_RV xProvisionDevice( CK_SESSION_HANDLE xSession, -// ProvisioningParams_t * pxParams ); - -/* Workaround for the incompatibility between GNU/IAR C compilers and the CC-RX compiler. */ -#if defined(__CCRX__) -#define __FUNCTION__ __func__ -#endif - -#endif /* _AWS_DEMO_CONFIG_H_ */ diff --git a/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_ggd_config.h b/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_ggd_config.h deleted file mode 100644 index 097cf3fdb7c..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_ggd_config.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Amazon FreeRTOS V1.2.2 - * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * http://aws.amazon.com/freertos - * http://www.FreeRTOS.org - */ - - -/** - * @file aws_ggd_config.h - * @brief GGD config options. - */ - -#ifndef _AWS_GGD_CONFIG_H_ -#define _AWS_GGD_CONFIG_H_ - - -/** - * @brief The number of your network interface here. - */ -#define ggdconfigCORE_NETWORK_INTERFACE ( 0 ) - -/** - * @brief Size of the array used by jsmn to store the tokens. - */ -#define ggdconfigJSON_MAX_TOKENS ( 128 ) - -#endif /* _AWS_GGD_CONFIG_H_ */ diff --git a/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_mqtt_agent_config.h b/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_mqtt_agent_config.h deleted file mode 100644 index 633fb16faf8..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_mqtt_agent_config.h +++ /dev/null @@ -1,124 +0,0 @@ -/* - * Amazon FreeRTOS V1.2.2 - * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * http://aws.amazon.com/freertos - * http://www.FreeRTOS.org - */ - -/** - * @file aws_mqtt_agent_config.h - * @brief MQTT agent config options. - */ - -#ifndef _AWS_MQTT_AGENT_CONFIG_H_ -#define _AWS_MQTT_AGENT_CONFIG_H_ - -#include "FreeRTOS.h" - -/** - * @brief Controls whether or not to report usage metrics to the - * AWS IoT broker. - * - * If mqttconfigENABLE_METRICS is set to 1, a string containing - * metric information will be included in the "username" field of - * the MQTT connect messages. - */ -#define mqttconfigENABLE_METRICS ( 1 ) - -/** - * @brief The maximum time an application task waits for sending a command to the - * command queue and for receiving a notification from the MQTT task. - * - * An application task sends the command to the MQTT task over command queue and - * then waits for a notification from the MQTT task. In case the MQTT task fails to - * respond within in a reasonable amount of time, the application task should be - * informed about the same. This timeout value is the maximum time a task waits for - * the notification from the MQTT task. This value must be high to ensure that this - * does not happen under normal operation and when it happens, we should disconnect - * since we are sharing user provided pointers with the MQTT task which might be - * invalid now onwards. - * _TODO_ - Finalize what to do on Timeout. - */ -#define mqttOPERATION_TIMEOUT_MS ( 120000 ) - -/** - * @brief The maximum time interval in seconds allowed to elapse between 2 consecutive - * control packets. - */ -#define mqttconfigKEEP_ALIVE_INTERVAL_SECONDS ( 100 ) - -/** - * @brief Defines the frequency at which the client should send Keep Alive messages. - * - * Even though the maximum time allowed between 2 consecutive control packets - * is defined by the mqttconfigKEEP_ALIVE_INTERVAL_SECONDS macro, the user - * can and should send Keep Alive messages at a slightly faster rate to ensure - * that the connection is not closed by the server because of network delays. - * This macro defines the interval of inactivity after which a keep alive messages - * is sent. - */ -#define mqttconfigKEEP_ALIVE_ACTUAL_INTERVAL_TICKS ( pdMS_TO_TICKS( 300000 ) ) - -/** - * @brief The maximum interval in ticks to wait for PINGRESP. - * - * If PINGRESP is not received within this much time after sending PINGREQ, - * the client assumes that the PINGREQ timed out. - */ -#define mqttconfigKEEP_ALIVE_TIMEOUT_TICKS ( 1000 ) - -/** - * @defgroup MQTTTask MQTT task configuration parameters. - */ -/** @{ */ -//#define mqttconfigMQTT_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE * 4 ) -#define mqttconfigMQTT_TASK_STACK_DEPTH ( 1024 ) -#define mqttconfigMQTT_TASK_PRIORITY ( configMAX_PRIORITIES - 3 ) -/** @} */ - -/** - * @brief Maximum number of MQTT clients that can exist simultaneously. - */ -//#define mqttconfigMAX_BROKERS ( 4 ) //XXX -#define mqttconfigMAX_BROKERS ( 2 ) - -/** - * @brief Maximum number of parallel operations per client. - */ -#define mqttconfigMAX_PARALLEL_OPS ( 5 ) - -/** - * @brief Time in milliseconds after which the TCP send operation should timeout. - */ -//#define mqttconfigTCP_SEND_TIMEOUT_MS ( 2000 ) -#define mqttconfigTCP_SEND_TIMEOUT_MS ( 20 ) - -/** - * @brief Length of the buffer used to receive data. - */ -#define mqttconfigRX_BUFFER_SIZE ( 1024 ) - -/** - * @brief The maximum time in ticks for which the MQTT task is permitted to block. - */ -#define mqttconfigMQTT_TASK_MAX_BLOCK_TICKS ( 100 ) - -#endif /* _AWS_MQTT_AGENT_CONFIG_H_ */ diff --git a/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_mqtt_config.h b/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_mqtt_config.h deleted file mode 100644 index e5312340afc..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_mqtt_config.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Amazon FreeRTOS V1.2.2 - * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * http://aws.amazon.com/freertos - * http://www.FreeRTOS.org - */ - -/** - * @file aws_mqtt_config.h - * @brief MQTT config options. - */ - -#ifndef _AWS_MQTT_CONFIG_H_ -#define _AWS_MQTT_CONFIG_H_ - -#include - -/** - * @brief Enable subscription management. - * - * This gives the user flexibility of registering a callback per topic. - */ -#define mqttconfigENABLE_SUBSCRIPTION_MANAGEMENT ( 1 ) - -/** - * @brief Maximum length of the topic which can be stored in subscription - * manager. - */ -#define mqttconfigSUBSCRIPTION_MANAGER_MAX_TOPIC_LENGTH ( 128 ) - -/** - * @brief Maximum number of subscriptions which can be stored in subscription - * manager. - */ -#define mqttconfigSUBSCRIPTION_MANAGER_MAX_SUBSCRIPTIONS ( 8 ) - -/* - * Uncomment the following two lines to enable asserts. - */ -/* extern void vAssertCalled( const char *pcFile, uint32_t ulLine ); */ -/* #define mqttconfigASSERT( x ) if( ( x ) == 0 ) vAssertCalled( __FILE__, __LINE__ ) */ - - -extern void vAssertCalled( void ); -#define mqttconfigASSERT( x ) if( ( x ) == 0 ) vAssertCalled() - -/** - * @brief Set this macro to 1 for enabling debug logs. - */ -#define mqttconfigENABLE_DEBUG_LOGS 1 - -#endif /* _AWS_MQTT_CONFIG_H_ */ diff --git a/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_ota_agent_config.h b/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_ota_agent_config.h deleted file mode 100644 index cdacef6c703..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_ota_agent_config.h +++ /dev/null @@ -1,119 +0,0 @@ -/* - * Amazon FreeRTOS V0.9.5 - * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * http://aws.amazon.com/freertos - * http://www.FreeRTOS.org - */ - -/** - * @file aws_ota_agent_config.h - * @brief OTA user configurable settings. - */ - -#ifndef _AWS_OTA_AGENT_CONFIG_H_ -#define _AWS_OTA_AGENT_CONFIG_H_ - -/** - * @brief Special OTA Agent printing definition (in stead of definition in lib/include/aws_ota_agent.h). - */ -#define OTA_DEBUG_LOG_LEVEL 1 - -/** - * @brief The number of words allocated to the stack for the OTA agent. - */ -#define otaconfigSTACK_SIZE 3584U - -/** - * @brief Log base 2 of the size of the file data block message (excluding the header). - * - * 10 bits yields a data block size of 1KB. - */ -#define otaconfigLOG2_FILE_BLOCK_SIZE 10UL - -/** - * @brief Milliseconds to wait for the self test phase to succeed before we force reset. - */ -#define otaconfigSELF_TEST_RESPONSE_WAIT_MS 16000U - -/** - * @brief Milliseconds to wait before requesting data blocks from the OTA service if nothing is happening. - * - * The wait timer is reset whenever a data block is received from the OTA service so we will only send - * the request message after being idle for this amount of time. - */ -#define otaconfigFILE_REQUEST_WAIT_MS 2500U - -/** - * @brief The OTA agent task priority. Normally it runs at a low priority. - */ -#define otaconfigAGENT_PRIORITY tskIDLE_PRIORITY - -/** - * @brief The maximum allowed length of the thing name used by the OTA agent. - * - * AWS IoT requires Thing names to be unique for each device that connects to the broker. - * Likewise, the OTA agent requires the developer to construct and pass in the Thing name when - * initializing the OTA agent. The agent uses this size to allocate static storage for the - * Thing name used in all OTA base topics. Namely $aws/things/ - */ -#define otaconfigMAX_THINGNAME_LEN 64U - -/** - * @brief Special OTA Agent printing macros (in stead of definitions in lib/include/aws_ota_agent.h). - */ -#if OTA_DEBUG_LOG_LEVEL >= 1 -#define DEFINE_OTA_METHOD_NAME(name) static const char OTA_METHOD_NAME[] = name; -#define OTA_LOG_L1 vLoggingPrintf -#else -#define DEFINE_OTA_METHOD_NAME(name) -#if !(defined(__CCRX__) && defined(__cplusplus)) -#define OTA_LOG_L1(...) -#else -/* CC-RX' C++ mode does not support variadic macros */ -#define OTA_LOG_L1(x) /* More than two arguments are not available. */ -#endif -#endif -#if OTA_DEBUG_LOG_LEVEL >= 2 -#define DEFINE_OTA_METHOD_NAME_L2(name) static const char OTA_METHOD_NAME[] = name; -#define OTA_LOG_L2 vLoggingPrintf -#else -#define DEFINE_OTA_METHOD_NAME_L2(name) -#if !(defined(__CCRX__) && defined(__cplusplus)) -#define OTA_LOG_L2(...) -#else -/* CC-RX' C++ mode does not support variadic macros */ -#define OTA_LOG_L2(x) /* More than two arguments are not available. */ -#endif -#endif -#if OTA_DEBUG_LOG_LEVEL >= 3 -#define DEFINE_OTA_METHOD_NAME_L3(name) static const char OTA_METHOD_NAME[] = name; -#define OTA_LOG_L3 vLoggingPrintf -#else -#define DEFINE_OTA_METHOD_NAME_L3(name) -#if !(defined(__CCRX__) && defined(__cplusplus)) -#define OTA_LOG_L3(...) -#else -/* CC-RX' C++ mode does not support variadic macros */ -#define OTA_LOG_L3(x) /* More than two arguments are not available. */ -#endif -#endif - -#endif /* _AWS_OTA_AGENT_CONFIG_H_ */ diff --git a/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_pkcs11_config.h b/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_pkcs11_config.h deleted file mode 100644 index 8599a43951c..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_pkcs11_config.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Amazon FreeRTOS V1.4.3 - * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * http://aws.amazon.com/freertos - * http://www.FreeRTOS.org - */ - -/** - * @file aws_pkcs11_config.h - * @brief PCKS#11 config options. - */ - - -#ifndef _AWS_PKCS11_CONFIG_H_ -#define _AWS_PKCS11_CONFIG_H_ - -/* A non-standard version of C_INITIALIZE should be used by this port. */ -#define pkcs11configC_INITIALIZE_ALT - -/* Workaround for missing function prototypes for aws_pkcs11_mbedtls.c. */ -#include "threading_alt.h" -extern void aws_mbedtls_mutex_free( mbedtls_threading_mutex_t * mutex ); -extern void aws_mbedtls_mutex_init( mbedtls_threading_mutex_t * mutex ); -extern int aws_mbedtls_mutex_lock( mbedtls_threading_mutex_t * mutex ); -extern int aws_mbedtls_mutex_unlock( mbedtls_threading_mutex_t * mutex ); -//extern CK_RV prvMbedTLS_Initialize( void ); -//extern P11SessionPtr_t prvSessionPointerFromHandle( CK_SESSION_HANDLE xSession ); - -#endif /* _AWS_PKCS11_CONFIG_H_ include guard. */ \ No newline at end of file diff --git a/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_secure_sockets_config.h b/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_secure_sockets_config.h deleted file mode 100644 index df4613ec0a2..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_secure_sockets_config.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Amazon FreeRTOS V1.2.2 - * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * http://aws.amazon.com/freertos - * http://www.FreeRTOS.org - */ - -/** - * @file aws_secure_sockets_config.h - * @brief Secure sockets configuration options. - */ - -#ifndef _AWS_SECURE_SOCKETS_CONFIG_H_ -#define _AWS_SECURE_SOCKETS_CONFIG_H_ - -/** - * @brief Byte order of the target MCU. - * - * Valid values are pdLITTLE_ENDIAN and pdBIG_ENDIAN. - */ -#define socketsconfigBYTE_ORDER pdLITTLE_ENDIAN - -/** - * @brief Default socket send timeout. - */ -#define socketsconfigDEFAULT_SEND_TIMEOUT ( 10000 ) - -/** - * @brief Default socket receive timeout. - */ -#define socketsconfigDEFAULT_RECV_TIMEOUT ( 10000 ) - -#endif /* _AWS_SECURE_SOCKETS_CONFIG_H_ */ diff --git a/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_shadow_config.h b/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_shadow_config.h deleted file mode 100644 index 98622852641..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_shadow_config.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Amazon FreeRTOS V1.2.2 - * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * http://aws.amazon.com/freertos - * http://www.FreeRTOS.org - */ - -/** - * @file aws_shadow_config.h - * @brief specify shadow config - */ - -#ifndef _AWS_SHADOW_CONFIG_H_ -#define _AWS_SHADOW_CONFIG_H_ - -/** - * @brief Number of jsmn tokens to use in parsing. Each jsmn token contains 4 ints. - * Ensure that the number of tokens does not overflow the calling task's stack, - * but is also sufficient to parse the largest expected JSON documents. */ -#define shadowConfigJSON_JSMN_TOKENS ( 64 ) - - -/** - * @brief - * The JSON key to search for when looking for client tokens. - */ -#define shadowConfigJSON_CLIENT_TOKEN "clientToken" - - -/** - * @brief - * enable/disable shadowConfigUNIQUE_CLIENT_TOKEN_CHECK check. - */ -#define shadowConfigUNIQUE_CLIENT_TOKEN_CHECK 0 - -#endif /* _AWS_SHADOW_CONFIG_H_ */ diff --git a/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_wifi_config.h b/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_wifi_config.h deleted file mode 100644 index 1783f269103..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/common/config_files/aws_wifi_config.h +++ /dev/null @@ -1,97 +0,0 @@ -/* - * Amazon FreeRTOS V1.2.2 - * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * http://aws.amazon.com/freertos - * http://www.FreeRTOS.org - */ - -/** - * @file aws_wifi_config.h - * @brief WiFi module configuration parameters. - */ - -#ifndef _AWS_WIFI_CONFIG_H_ -#define _AWS_WIFI_CONFIG_H_ - -/** - * @brief Maximum number of sockets that can be created simultaneously. - */ -#define wificonfigMAX_SOCKETS ( 4 ) - -/** - * @brief Maximum number of connection retries. - */ -#define wificonfigNUM_CONNECTION_RETRY ( 3 ) - -/** - * @brief Maximum number of connected station in Access Point mode. - */ -#define wificonfigMAX_CONNECTED_STATIONS ( 4 ) - -/** - * @brief Max number of network profiles stored in Non Volatile memory, - * set to zero if not supported. - */ -#define wificonfigMAX_NETWORK_PROFILES ( 0 ) - -/** - * @brief Max SSID length - */ -#define wificonfigMAX_SSID_LEN ( 32 ) - -/** - * @brief Max BSSID length - */ -#define wificonfigMAX_BSSID_LEN ( 6 ) - -/** - * @brief Max passphrase length - */ -#define wificonfigMAX_PASSPHRASE_LEN ( 32 ) - -/** - * @brief Soft Access point SSID - */ -#define wificonfigACCESS_POINT_SSID_PREFIX ( "Enter SSID for Soft AP" ) - -/** - * @brief Soft Access point Passkey - */ -#define wificonfigACCESS_POINT_PASSKEY ( "Enter Password for Soft AP" ) - -/** - * @brief Soft Access point Channel - */ -#define wificonfigACCESS_POINT_CHANNEL ( 11 ) - -/** - * @brief WiFi semaphore timeout - */ -#define wificonfigMAX_SEMAPHORE_WAIT_TIME_MS ( 60000 ) - -/** - * @brief Soft Access point security - * WPA2 Security, see WIFISecurity_t - * other values are - eWiFiSecurityOpen, eWiFiSecurityWEP, eWiFiSecurityWPA - */ -#define wificonfigACCESS_POINT_SECURITY ( eWiFiSecurityWPA2 ) - -#endif /* _AWS_WIFI_CONFIG_H_ */ diff --git a/demos/renesas/rx63n-gr-sakura2/common/config_files/mbedtls_user_config.h b/demos/renesas/rx63n-gr-sakura2/common/config_files/mbedtls_user_config.h deleted file mode 100644 index ddd6b8a0106..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/common/config_files/mbedtls_user_config.h +++ /dev/null @@ -1,42 +0,0 @@ -/* Remove mbedTLS's unused *_self_test functions to remove - * linker warnings of the GNURX projects such as - * '_fstat is not implemented and will always fail', - * '_isatty is not implemented and will always fail', - * and so on. These are cause by using fprintf function. - * (But such warnings cannot be removed by only this.)" - */ -#if defined(MBEDTLS_SELF_TEST) -#undef MBEDTLS_SELF_TEST -#endif - -/* Remove mbedTLS's unnecessary link of standard calloc - * and free functions. - */ -#if !defined(MBEDTLS_PLATFORM_NO_STD_FUNCTIONS) -#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS - -#if !defined(MBEDTLS_PLATFORM_MEMORY) -#define MBEDTLS_PLATFORM_MEMORY -#endif -#if defined(MBEDTLS_PLATFORM_STD_CALLOC) -#undef MBEDTLS_PLATFORM_STD_CALLOC -#endif -#if defined(MBEDTLS_PLATFORM_STD_FREE) -#undef MBEDTLS_PLATFORM_STD_FREE -#endif - -#if !defined(MBEDTLS_PLATFORM_SNPRINTF_MACRO) -#define MBEDTLS_PLATFORM_SNPRINTF_MACRO snprintf -#endif - -#endif /* !MBEDTLS_PLATFORM_NO_STD_FUNCTIONS */ - -/* Workaround for CC-RX's non-standard 2nd argument type of - * memset function. CC-RX uses long but standard uses int. - */ -#if defined(__CCRX__) -#include "string.h" -typedef void * (* mbedtls_platform_zeroize_memset_t)( void *, int, size_t ); -#undef memset -#define memset ((mbedtls_platform_zeroize_memset_t)memset) -#endif diff --git a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/.cproject b/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/.cproject deleted file mode 100644 index 9aed503ef9b..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/.cproject +++ /dev/null @@ -1,131 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/.gitignore b/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/.gitignore deleted file mode 100644 index 11e355d8bc7..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/.gitignore +++ /dev/null @@ -1,3 +0,0 @@ -/HardwareDebug/ -/.settings/ -/trash/ \ No newline at end of file diff --git a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/.project b/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/.project deleted file mode 100644 index bac7a6eceb8..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/.project +++ /dev/null @@ -1,548 +0,0 @@ - - - aws_demos - - - - - - org.eclipse.xtext.ui.shared.xtextBuilder - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - org.eclipse.xtext.ui.shared.xtextNature - - - - application_code - 2 - PARENT-1-PROJECT_LOC/common/application_code - - - config_files - 2 - PARENT-1-PROJECT_LOC/common/config_files - - - lib - 2 - virtual:/virtual - - - application_code/common_demos - 2 - virtual:/virtual - - - lib/aws - 2 - virtual:/virtual - - - lib/third_party - 2 - virtual:/virtual - - - src/FIT_modified_code - 2 - virtual:/virtual - - - src/FIT_setting_files - 2 - virtual:/virtual - - - src/amazon_freertos_common - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/amazon_freertos_common - - - application_code/common_demos/include - 2 - AWS_IOT_MCU_ROOT/demos/common/include - - - application_code/common_demos/source - 2 - virtual:/virtual - - - lib/aws/FreeRTOS - 2 - AWS_IOT_MCU_ROOT/lib/FreeRTOS - - - lib/aws/FreeRTOS-Plus-TCP - 2 - AWS_IOT_MCU_ROOT/lib/FreeRTOS-Plus-TCP - - - lib/aws/bufferpool - 2 - AWS_IOT_MCU_ROOT/lib/bufferpool - - - lib/aws/crypto - 2 - AWS_IOT_MCU_ROOT/lib/crypto - - - lib/aws/greengrass - 2 - AWS_IOT_MCU_ROOT/lib/greengrass - - - lib/aws/include - 2 - AWS_IOT_MCU_ROOT/lib/include - - - lib/aws/mqtt - 2 - AWS_IOT_MCU_ROOT/lib/mqtt - - - lib/aws/pkcs11 - 2 - AWS_IOT_MCU_ROOT/lib/pkcs11/portable/renesas/rx63n-gr-sakura - - - lib/aws/secure_sockets - 2 - AWS_IOT_MCU_ROOT/lib/secure_sockets/portable/renesas/rx63n-gr-sakura - - - lib/aws/shadow - 2 - AWS_IOT_MCU_ROOT/lib/shadow - - - lib/aws/tls - 2 - AWS_IOT_MCU_ROOT/lib/tls - - - lib/aws/utils - 2 - AWS_IOT_MCU_ROOT/lib/utils - - - lib/aws/wifi - 2 - AWS_IOT_MCU_ROOT/lib/wifi/portable/renesas/rx63n-gr-sakura - - - lib/third_party/jsmn - 2 - AWS_IOT_MCU_ROOT/lib/third_party/jsmn - - - lib/third_party/mbedtls - 2 - virtual:/virtual - - - lib/third_party/mcu_vendor - 2 - virtual:/virtual - - - lib/third_party/pkcs11 - 2 - AWS_IOT_MCU_ROOT/lib/third_party/pkcs11 - - - lib/third_party/tinycbor - 2 - AWS_IOT_MCU_ROOT/lib/third_party/tinycbor - - - src/FIT_modified_code/Please exclude unnecessary r_xxx from build - 1 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/.files/Please%20exclude%20unnecessary%20r_xxx%20from%20build - - - src/FIT_modified_code/attention!.txt - 1 - PROJECT_LOC/src/attention!.txt - - - src/FIT_modified_code/r_bsp - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_bsp - - - src/FIT_modified_code/r_byteq - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_byteq - - - src/FIT_modified_code/r_cmt_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_cmt_rx - - - src/FIT_modified_code/r_ether_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_ether_rx - - - src/FIT_modified_code/r_flash_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_flash_rx - - - src/FIT_modified_code/r_s12ad_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_s12ad_rx - - - src/FIT_modified_code/r_sci_iic_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_iic_rx - - - src/FIT_modified_code/r_sci_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_rx - - - src/FIT_setting_files/attention!.txt - 1 - PROJECT_LOC/src/attention!.txt - - - src/FIT_setting_files/r_config - 2 - PROJECT_LOC/r_config - - - src/FIT_setting_files/r_pincfg - 2 - PROJECT_LOC/r_pincfg - - - application_code/common_demos/include/aws_application_version.h - 1 - AWS_IOT_MCU_ROOT/demos/common/include/aws_application_version.h - - - application_code/common_demos/include/aws_clientcredential_keys.h - 1 - AWS_IOT_MCU_ROOT/demos/common/include/aws_clientcredential_keys.h - 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9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx63n - - - - 1545548930851 - src/FIT_modified_code/r_s12ad_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx63x - - - - 1535360980389 - src/FIT_modified_code/r_sci_iic_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx63n - - - - 1564441820170 - src/FIT_modified_code/r_sci_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx63n - - - - 1515504232772 - lib/aws/FreeRTOS-Plus-TCP/source/portable/BufferManagement - 5 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-BufferAllocation_2.c - - - - 1515504311064 - lib/aws/FreeRTOS-Plus-TCP/source/portable/Compiler - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-GCC - - - - 1515491646756 - lib/aws/FreeRTOS-Plus-TCP/source/portable/NetworkInterface - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-RX - - - - 1537708651935 - src/FIT_modified_code/r_bsp/mcu/rx63n/register_access - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-gnuc - - - - - - AWS_IOT_MCU_ROOT - $%7BPARENT-4-PROJECT_LOC%7D - - - diff --git a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/.settings/CodeGenerator/cgprojectDatas.datas b/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/.settings/CodeGenerator/cgprojectDatas.datas deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/.settings/e2studio_project.prefs b/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/.settings/e2studio_project.prefs deleted file mode 100644 index 406758b3b35..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/.settings/e2studio_project.prefs +++ /dev/null @@ -1,2 +0,0 @@ -# -#Wed Aug 29 00:26:53 JST 2018 diff --git a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/.settings/language.settings.xml b/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/.settings/language.settings.xml deleted file mode 100644 index c507b11e37d..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/.settings/language.settings.xml +++ /dev/null @@ -1,21 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/.settings/org.eclipse.cdt.managedbuilder.core.prefs b/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/.settings/org.eclipse.cdt.managedbuilder.core.prefs deleted file mode 100644 index 817b60cba1c..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/.settings/org.eclipse.cdt.managedbuilder.core.prefs +++ /dev/null @@ -1,9 +0,0 @@ -eclipse.preferences.version=1 -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/CPATH/delimiter=; -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/CPATH/operation=remove -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/C_INCLUDE_PATH/delimiter=; -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/C_INCLUDE_PATH/operation=remove -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/LIBRARY_PATH/delimiter=; -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/LIBRARY_PATH/operation=remove -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/append=true -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/appendContributed=true diff --git a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/aws_demos_build_path_check_and_make.bat b/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/aws_demos_build_path_check_and_make.bat deleted file mode 100644 index 047f6e34780..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/aws_demos_build_path_check_and_make.bat +++ /dev/null @@ -1,11 +0,0 @@ -@echo off -rem ################################################################################ -rem # This batch file executes some preprocess for build and then executes the make -rem ################################################################################ - -if not exist "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" ( - echo ERROR: Unable to find "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" - exit 2 -) - -"%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" %* diff --git a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_config/r_bsp_config.h b/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_config/r_bsp_config.h deleted file mode 100644 index ad90cbceae6..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_config/r_bsp_config.h +++ /dev/null @@ -1,523 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_config_reference.h -* Device(s) : RX63x -* Description : The file r_bsp_config.h is used to configure your BSP. r_bsp_config.h should be included -* somewhere in your package so that the r_bsp code has access to it. This file (r_bsp_config_reference.h) -* is just a reference file that the user can use to make their own r_bsp_config.h file. -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 13.03.2012 1.00 First Release -* : 26.06.2012 1.10 Added MCU product part number section. Added endian options for user app and user boot. -* Added OFS register macros. Added option for ROM Code Protect. Added callback function -* options for exception interrupts. -* : 16.07.2012 1.20 Fixed bug with exception callback function names. Added BSP_CFG_BCLK_OUTPUT and -* BSP_CFG_SDCLK_OUTPUT macro options. -* : 09.08.2012 1.30 Added BSP_CFG_IO_LIB_ENABLE macro. -* : 20.09.2012 1.40 Added BSP_CFG_USER_LOCKING_ENABLED and BSP_CFG_USER_LOCKING_TYPE macros. -* : 19.11.2012 1.50 Updated code to use 'BSP_' and 'BSP_CFG_' prefix for macros. -* : 17.01.2013 1.60 Moved BSP_CFG_IO_LIB_ENABLE macro since it is now used in conjunction with -* BSP_CFG_HEAP_BYTES. Added comments for disabling heap above BSP_CFG_HEAP_BYTES. -* Added BSP_CFG_PARAM_CHECKING_ENABLE macro for configuring global parameter checking. -* : 06.05.2013 1.70 Removed BSP_CFG_USER_APP_ENDIAN & BSP_CFG_USER_BOOT_ENDIAN macros. Endian is now detected -* using compiler macros. Added BSP_CFG_MCU_VCC_MV macro for FIT modules that need to know -* Vcc. -* : 25.06.2013 1.80 Added BSP_CFG_USER_STACK_ENABLE macro to enable/disable use of user stack. Removed -* macros defining exception callbacks, undefined interrupt callback, and bus error -* callback. Callbacks are now handled through mcu_interrupts.c. -* : 26.11.2013 1.90 Added BSP_CFG_BOARD_REVISION macro to differentiate between prototype and MP boards. -* : 31.03.2014 2.00 Added the ability for the user to define two 'warm start' callback functions which when -* defined result in a callback from PowerON_Reset_PC() before and/or after initialization -* of the C runtime environment. Added r_bsp_config file version number, which must match -* the BSP version number or a compiler warning will result. Added ability to specify user -* defined functions for redirection of the stdio charget() and/or charput() functions. -* : 09.12.2015 2.10 Change the division ratio of PCLKA. -* : 15.05.2017 2.20 Added Character(s) of the following macro definition. -* - BSP_CFG_MCU_PART_PACKAGE - LJ = 0xA = TFLGA/100/0.65. -* - LH = 0xB = TFLGA/64/0.65. -* - BSP_CFG_MCU_PART_CAN_INCLUDED - H = true -* = CAN included/DEU included/PDC not included. -* - G = false -* = CAN not included/DEU included/PDC not included. -* - S = true -* = CAN included/DEU not included/PDC included. -* - F(only 64-pin TFLGA) = true -* = CAN included/DEU not included/PDC not included. -* - BSP_CFG_MCU_PART_MEMORY_SIZE - F = 0xF = 2MB/256KB/32KB -* - G = 0x10 = 1.5MB/192KB/32KB -* - J = 0x13 = 1.5MB/256KB/32KB -* - K = 0x14 = 2MB/192KB/32KB -* - M = 0x16 = 256KB/64KB/32KB -* - N = 0x17 = 384KB/64KB/32KB -* - P = 0x19 = 512KB/64KB/32KB -* - W = 0x20 = 1MB/192KB/32KB -* - Y = 0x22 = 1MB/256KB/32KB -* Deleted Character(s) of the following macro definition. -* - BSP_CFG_MCU_PART_PACKAGE - LA = 0x6 = TFLGA/100/0.65. -* - FN = 0x7 = LQFP/80/0.50. -* - BSP_CFG_MCU_PART_CAN_INCLUDED - E = = 3V included (RX63T). Ignore. -* - BSP_CFG_MCU_PART_MEMORY_SIZE - 4 = 0x4 = 32KB/8KB/8KB -* - 5 = 0x5 = 48KB/8KB/8KB -* Changed the value of the following macro definition. -* - BSP_CFG_MCU_PART_MEMORY_SIZE - Changed the value from "6 = 0x6 = 64KB/8KB/8KB" -* to "6 = 0x6 = 256KB/128KB/32KB". -* - Changed the value from "7 = 0x7 = 384KB/64KB/32KB" -* to "7 = 0x7 = 384KB/128KB/32KB". -* - Changed the value from "8 = 0x8 = 512KB/64KB/32KB" -* to "8 = 0x8 = 512KB/128KB/32KB". -* Changed the default value of the following macro definition. -* - BSP_CFG_MCU_PART_MEMORY_SIZE - Changed the default value from 0xB to 0xF. -* : xx.xx.xxxx x.xx Added the following macro definition. -* - BSP_CFG_STARTUP_DISABLE -* - BSP_CFG_FIT_IPL_MAX -* Added support for GNUC and ICCRX. -***********************************************************************************************************************/ - -#ifndef R_BSP_CONFIG_REF_HEADER_FILE -#define R_BSP_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* NOTE: - The default settings are the same as when using RSKRX63N. - Change to the settings for the user board. -*/ - -/* Start up select - 0 = Enable BSP startup program. - 1 = Disable BSP startup program. (e.g. Using user startup program.) -*/ -#define BSP_CFG_STARTUP_DISABLE (0) - -/* Enter the product part number for your MCU. This information will be used to obtain information about your MCU such - as package and memory size. - To help parse this information, the part number will be defined using multiple macros. - R 5 F 56 3N Y D D FC - | | | | | | | | | Macro Name Description - | | | | | | | | |__BSP_CFG_MCU_PART_PACKAGE = Package type, number of pins, and pin pitch - | | | | | | | |____not used = Products with wide temperature range - | | | | | | |______BSP_CFG_MCU_PART_CAN_INCLUDED = CAN included/not included - | | | | | |________BSP_CFG_MCU_PART_MEMORY_SIZE = ROM, RAM, and Data Flash Capacity - | | | | |___________BSP_CFG_MCU_PART_GROUP = Group name - | | | |______________BSP_CFG_MCU_PART_SERIES = Series name - | | |________________BSP_CFG_MCU_PART_MEMORY_TYPE = Type of memory (Flash, ROMless) - | |__________________not used = Renesas MCU - |____________________not used = Renesas semiconductor product. - */ - -/* Package type. Set the macro definition based on values below: - Character(s) = Value for macro = Package Type/Number of Pins/Pin Pitch - FC = 0x0 = LQFP/176/0.50 - BG = 0x1 = LFBGA/176/0.80 - LC = 0x2 = TFLGA/177/0.50 - FB = 0x3 = LQFP/144/0.50 - LK = 0x4 = TFLGA/145/0.50 - LJ = 0xA = TFLGA/100/0.65 - FP = 0x5 = LQFP/100/0.50 - LH = 0xB = TFLGA/64/0.65 - FM = 0x8 = LQFP/64/0.50 - FL = 0x9 = LQFP/48/0.50 -*/ -#define BSP_CFG_MCU_PART_PACKAGE (0x5) - -/* Whether CAN is included or not. - Character(s) = Value for macro = Description - H = true = CAN included/DEU included/PDC not included. - D = true = CAN included/DEU not included/PDC not included. - G = false = CAN not included/DEU included/PDC not included. - C = false = CAN not included/DEU not included/PDC not included. - S = true = CAN included/DEU not included/PDC included. - F(only 64-pin TFLGA) = true = CAN included/DEU not included/PDC not included. -*/ -#define BSP_CFG_MCU_PART_CAN_INCLUDED (true) - -/* ROM, RAM, and Data Flash Capacity. - Character(s) = Value for macro = ROM Size/Ram Size/Data Flash Size - F = 0xF = 2MB/256KB/32KB - K = 0x14 = 2MB/192KB/32KB - E = 0xE = 2MB/128KB/32KB - J = 0x13 = 1.5MB/256KB/32KB - G = 0x10 = 1.5MB/192KB/32KB - D = 0xD = 1.5MB/128KB/32KB - Y = 0x22 = 1MB/256KB/32KB - W = 0x20 = 1MB/192KB/32KB - B = 0xB = 1MB/128KB/32KB - A = 0xA = 768KB/128KB/32KB - 8 = 0x8 = 512KB/128KB/32KB - 7 = 0x7 = 384KB/128KB/32KB - 6 = 0x6 = 256KB/128KB/32KB - P = 0x19 = 512KB/64KB/32KB - N = 0x17 = 384KB/64KB/32KB - M = 0x16 = 256KB/64KB/32KB - 0 = 0x0 = 0/128KB/0 -*/ -#define BSP_CFG_MCU_PART_MEMORY_SIZE (0x22) - -/* Group name. - Character(s) = Value for macro = Description - 30 = 0x0 = RX630 Group - 31 = 0x1 = RX631 Group - 3N = 0x2 = RX63N Group - 3T = 0x3 = RX63T Group -*/ -#define BSP_CFG_MCU_PART_GROUP (0x2) - -/* Series name. - Character(s) = Value for macro = Description - 56 = 0x0 = RX600 Series -*/ -#define BSP_CFG_MCU_PART_SERIES (0x0) - -/* Memory type. - Character(s) = Value for macro = Description - F = 0x0 = Flash memory version - S = 0x1 = ROMless version -*/ -#define BSP_CFG_MCU_PART_MEMORY_TYPE (0x0) - -/* Whether to use 1 stack or 2. RX MCUs have the ability to use 2 stacks: an interrupt stack and a user stack. - * When using 2 stacks the user stack will be used during normal user code. When an interrupt occurs the CPU - * will automatically shift to using the interrupt stack. Having 2 stacks can make it easier to figure out how - * much stack space to allocate since the user does not have to worry about always having enough room on the - * user stack for if-and-when an interrupt occurs. Some users will not want 2 stacks though because it is not - * needed in all applications and can lead to wasted RAM (i.e. space in between stacks that is not used). - * If only 1 stack is used then the interrupt stack is the one that will be used. If 1 stack is chosen then - * the user may want to remove the 'SU' section from the linker sections to remove any linker warnings. - * - * 0 = Use 1 stack. Disable user stack. User stack size set below will be ignored. - * 1 = Use 2 stacks. User stack and interrupt stack will both be used. - */ -#define BSP_CFG_USER_STACK_ENABLE (0) - -#if defined(__CCRX__) || defined(__GNUC__) - -/* When using the user startup program, disable the following code. */ -#if (BSP_CFG_STARTUP_DISABLE == 0) - -/* If only 1 stack is chosen using BSP_CFG_USER_STACK_ENABLE then no RAM will be allocated for the user stack. */ -#if (BSP_CFG_USER_STACK_ENABLE == 1) -/* User Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. */ -#define BSP_CFG_USTACK_BYTES (0) -#endif - -/* Interrupt Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. - * If the interrupt stack is the only stack being used then the user will likely want to increase the default size - * below. - */ -#define BSP_CFG_ISTACK_BYTES (0x1000) - -#endif /* BSP_CFG_STARTUP_DISABLE == 0 */ - -/* Heap size in bytes. - To disable the heap you must follow these steps: - 1) Set this macro (BSP_CFG_HEAP_BYTES) to 0. - 2) Set the macro BSP_CFG_IO_LIB_ENABLE to 0. - 3) Disable stdio from being built into the project library. This is done by going into the Renesas RX Toolchain - settings and choosing the Standard Library section. After that choose 'Standard Library' for Category in HEW or - choose 'Contents' in E2Studio. This will present a list of modules that can be included. Uncheck the box for - stdio.h. -*/ -#define BSP_CFG_HEAP_BYTES (0) - -#endif /* defined(__CCRX__) || defined(__GNUC__) */ - -#if defined(__CCRX__) - -/* Initializes C input & output library functions. - 0 = Disable I/O library initialization in resetprg.c. If you are not using stdio then use this value. - 1 = Enable I/O library initialization in resetprg.c. This is default and needed if you are using stdio. */ -#define BSP_CFG_IO_LIB_ENABLE (1) - -#endif /* defined(__CCRX__) */ - -/* If desired the user may redirect the stdio charget() and/or charput() functions to their own respective functions - by enabling below and providing and replacing the my_sw_... function names with the names of their own functions. */ -#define BSP_CFG_USER_CHARGET_ENABLED (0) -#define BSP_CFG_USER_CHARGET_FUNCTION my_sw_charget_function - -#define BSP_CFG_USER_CHARPUT_ENABLED (0) -#define BSP_CFG_USER_CHARPUT_FUNCTION my_sw_charput_function - -/* After reset MCU will operate in Supervisor mode. To switch to User mode, set this macro to '1'. For more information - on the differences between these 2 modes see the CPU >> Processor Mode section of your MCU's hardware manual. - 0 = Stay in Supervisor mode. - 1 = Switch to User mode. -*/ -#define BSP_CFG_RUN_IN_USER_MODE (0) - -/* To get into User Boot Mode the user must control some pins on the MCU and also set some values in ROM. These values - in ROM are described in the Option-Setting Memory section of the hardware manual. This macro sets these values so - that User Boot Mode can be used. The user is still responsible for setting the MCU pins appropriately. If User Boot - is selected then the user should make sure that they setup a constant data section in their linker named 'UBSETTINGS' - at address 0xFF7FFFE8. - 0 = Single-Chip or USB Boot Mode - 1 = User Boot Mode -*/ -#define BSP_CFG_USER_BOOT_ENABLE (0) - -/* Set your desired ID code. NOTE, leave at the default (all 0xFF's) if you do not wish to use an ID code. If you set - this value and program it into the MCU then you will need to remember the ID code because the debugger will ask for - it when trying to connect. Note that the E1/E20 will ignore the ID code when programming the MCU during debugging. - If you set this value and then forget it then you can clear the ID code by connecting up in serial boot mode using - FDT. The ID Code is 16 bytes long. The macro below define the ID Code in 4-byte sections. */ -/* Lowest 4-byte section, address 0xFFFFFFA0. From MSB to LSB: Control Code, ID code 1, ID code 2, ID code 3. */ -#define BSP_CFG_ID_CODE_LONG_1 (0xFFFFFFFF) -/* 2nd ID Code section, address 0xFFFFFFA4. From MSB to LSB: ID code 4, ID code 5, ID code 6, ID code 7. */ -#define BSP_CFG_ID_CODE_LONG_2 (0xFFFFFFFF) -/* 3rd ID Code section, address 0xFFFFFFA8. From MSB to LSB: ID code 8, ID code 9, ID code 10, ID code 11. */ -#define BSP_CFG_ID_CODE_LONG_3 (0xFFFFFFFF) -/* 4th ID Code section, address 0xFFFFFFAC. From MSB to LSB: ID code 12, ID code 13, ID code 14, ID code 15. */ -#define BSP_CFG_ID_CODE_LONG_4 (0xFFFFFFFF) - -/* Clock source select (CKSEL). - 0 = Low Speed On-Chip Oscillator (LOCO) - 1 = High Speed On-Chip Oscillator (HOCO) - 2 = Main Clock Oscillator - 3 = Sub-Clock Oscillator - 4 = PLL Circuit -*/ -#define BSP_CFG_CLOCK_SOURCE (4) - -/* Clock configuration options. - The input clock frequency is specified and then the system clocks are set by specifying the multipliers used. The - multiplier settings are used to set the clock registers in resetprg.c. If a 12MHz clock is used and the - ICLK is 96MHz, PCLKA is 96MHz, PCLKB is 48MHz, FCLK is 48MHz, USB Clock is 48MHz, and BCLK is 24MHz then the - settings would be: - - BSP_CFG_XTAL_HZ = 12000000 - BSP_CFG_PLL_DIV = 1 (no division) - BSP_CFG_PLL_MUL = 16 (12MHz x 16 = 192MHz) - BSP_CFG_ICK_DIV = 2 : System Clock (ICLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_ICK_DIV) = 96MHz - BSP_CFG_PCKA_DIV = 2 : Peripheral Clock A (PCLKA) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKA_DIV) = 96MHz - BSP_CFG_PCKB_DIV = 4 : Peripheral Clock B (PCLKB) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKB_DIV) = 48MHz - BSP_CFG_FCK_DIV = 4 : Flash IF Clock (FCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_FCK_DIV) = 48MHz - BSP_CFG_BCK_DIV = 8 : External Bus Clock (BCK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_BCK_DIV) = 24MHz - BSP_CFG_UCK_DIV = 4 : USB Clock (UCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_UCK_DIV) = 48MHz - BSP_CFG_IEBCK_DIV = 4 : IEBUS Clock (IECLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_IEBCK_DIV)= 48MHz -*/ -/* XTAL - Input clock frequency in Hz */ -#define BSP_CFG_XTAL_HZ (12000000) - -/* PLL Input Frequency Divider Select (PLIDIV). - Available divisors = /1 (no division), /2, /4 -*/ -#define BSP_CFG_PLL_DIV (1) - -/* PLL Frequency Multiplication Factor Select (STC). - Available multipliers = x8, x10, x12, x16, x20, x24, x25, x50 -*/ -#define BSP_CFG_PLL_MUL (16) - -/* System Clock Divider (ICK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_ICK_DIV (2) - -/* Peripheral Module Clock A Divider (PCKA). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKA_DIV (2) - -/* Peripheral Module Clock B Divider (PCKB). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKB_DIV (4) - -/* External Bus Clock Divider (BCK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_BCK_DIV (8) - -/* Flash IF Clock Divider (FCK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_FCK_DIV (4) - -/* IEBUS Clock Divider Select. - Available divisors = /1 (no division), /2, /4, /6, /8, /16, /32, /64 -*/ -#define BSP_CFG_IEBCK_DIV (8) - -/* USB Clock Divider Select. - Available divisors = /3, /4 -*/ -#define BSP_CFG_UCK_DIV (4) - -/* Configure BCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency, 2= BCK/2 frequency */ -#define BSP_CFG_BCLK_OUTPUT (0) - -/* Configure SDCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency */ -#define BSP_CFG_SDCLK_OUTPUT (0) - -/* Configure WDT and IWDT settings. - OFS0 - Option Function Select Register 0 - b31:b29 Reserved (set to 1) - b28 WDTRSTIRQS - WDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b27:b26 WDTRPSS - WDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b25:b24 WDTRPES - WDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b23:b20 WDTCKS - WDT Clock Frequency Division Ratio - (1=/4, 4=/64, 0xF=/128, 6=/512, 7=/2048, 8=/8192) - b19:b18 WDTTOPS - WDT Timeout Period Select - (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b17 WDTSTRT - WDT Start Mode Select - (0=auto-start after reset, halt after reset) - b16:b15 Reserved (set to 1) - b14 IWDTSLCSTP - IWDT Sleep Mode Count Stop Control - (0=can't stop count, 1=stop w/some low power modes) - b13 Reserved (set to 1) - b12 IWDTRSTIRQS - IWDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b11:b10 IWDTRPSS - IWDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b9:b8 IWDTRPES - IWDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b7:b4 IWDTCKS - IWDT Clock Frequency Division Ratio - (0=none, 2=/16, 3 = /32, 4=/64, 0xF=/128, 5=/256) - b3:b2 IWDTTOPS - IWDT Timeout Period Select - (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b1 IWDTSTRT - IWDT Start Mode Select - (0=auto-start after reset, halt after reset) - b0 Reserved (set to 1) */ -#define BSP_CFG_OFS0_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* Configure whether voltage detection 0 circuit and HOCO are enabled after reset. - OFS1 - Option Function Select Register 1 - b31:b9 Reserved (set to 1) - b8 HOCOEN - Enable/disable HOCO oscillation after a reset (0=enable, 1=disable) - b7:b3 Reserved (set to 1) - b2 LVDAS - Choose to enable/disable Voltage Detection 0 Circuit after a reset (0=enable, 1=disable) - b1:b0 Reserved (set to 1) */ -#define BSP_CFG_OFS1_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* ROM Code Protection is a feature that can prohibit PROM programmers from reading or writing flash memory. - There are 3 different options that can be chosen: - 0 = ROM code protection 1 = Both reading and writing to the user area and user boot area are prohibited. - 1 = ROM code protection 2 = Reading from the user area and user boot area are prohibited. - Else = Protection disabled = Reading and writing are allowed. -*/ -#define BSP_CFG_ROM_CODE_PROTECT_VALUE (0xFFFFFFFF) - -/* This macro lets other modules no if a RTOS is being used. - 0 = RTOS is not used. - 1 = FreeRTOS is used. - 2 = embOS is used.(This is not available.) - 3 = MicroC_OS is used.(This is not available.) - 4 = RI600V4 or RI600PX is used.(This is not available.) -*/ -#define BSP_CFG_RTOS_USED (1) - -/* This macro is used to select which CMT channel used for system timer of RTOS. - * The setting of this macro is only valid if the macro BSP_CFG_RTOS_USED is set to a value other than 0. */ -#if (BSP_CFG_RTOS_USED != 0) -/* Setting value. - * 0 = CMT channel 0 used for system timer of RTOS (recommended to be used for RTOS). - * 1 = CMT channel 1 used for system timer of RTOS. - * 2 = CMT channel 2 used for system timer of RTOS. - * 3 = CMT channel 3 used for system timer of RTOS. - * Others = Invalid. */ -#define BSP_CFG_RTOS_SYSTEM_TIMER (0) -#endif - -/* By default modules will use global locks found in mcu_locks.c. If the user is using a RTOS and would rather use its - locking mechanisms then they can change this macro. - NOTE: If '1' is chosen for this macro then the user must also change the next macro 'BSP_CFG_USER_LOCKING_TYPE'. - 0 = Use default locking (non-RTOS) - 1 = Use user defined locking mechanism. -*/ -#define BSP_CFG_USER_LOCKING_ENABLED (0) - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to redefine the typedef - that is used for the locks. If the user is using a RTOS then they would likely redefine the typedef to be - a semaphore/mutex type of their RTOS. Use the macro below to set the type that will be used for the locks. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_TYPE bsp_lock_t - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to define the functions - that will handle the locking and unlocking. These functions should be defined below. - If BSP_CFG_USER_LOCKING_ENABLED is != 0: - R_BSP_HardwareLock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION(mcu_lock_t hw_index) - R_BSP_HardwareUnlock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION(mcu_lock_t hw_index) - NOTE:With these functions the index into the array holding the global hardware locks is passed as the parameter. - R_BSP_SoftwareLock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - R_BSP_SoftwareUnlock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - NOTE:With these functions the actual address of the lock to use is passed as the parameter. - NOTE: These functions must return a boolean. If lock was obtained or released successfully then return true. Else, - return false. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION my_hw_locking_function -#define BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION my_hw_unlocking_function -#define BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION my_sw_locking_function -#define BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION my_sw_unlocking_function - -/* If the user would like to determine if a warm start reset has occurred, then they may enable one or more of the following - * callback definitions AND provide a call back function name for the respective callback function (to be defined by the user). - * Setting BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED = 1 will result in a callback to the user defined my_sw_warmstart_prec_function - * just prior to the initialization of the C runtime environment by resetprg. - * - * Setting BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED = 1 will result in a callback to the user defined my_sw_warmstart_postc_function - * just after the initialization of the C runtime environment by resetprg. - */ -#define BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_PRE_C_FUNCTION my_sw_warmstart_prec_function - -#define BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_POST_C_FUNCTION my_sw_warmstart_postc_function - -/* By default FIT modules will check input parameters to be valid. This is helpful during development but some users - will want to disable this for production code. The reason for this would be to save execution time and code space. - This macro is a global setting for enabling or disabling parameter checking. Each FIT module will also have its - own local macro for this same purpose. By default the local macros will take the global value from here though - they can be overridden. Therefore, the local setting has priority over this global setting. Disabling parameter - checking should only used when inputs are known to be good and the increase in speed or decrease in code space is - needed. - 0 = Global setting for parameter checking is disabled. - 1 = Global setting for parameter checking is enabled (Default). -*/ -#define BSP_CFG_PARAM_CHECKING_ENABLE (1) - -/* This macro is used to define the voltage that is supplied to the MCU (Vcc). This macro is defined in millivolts. This - macro does not actually change anything on the MCU. Some FIT modules need this information so it is defined here. */ -#define BSP_CFG_MCU_VCC_MV (3300) - -/* For some BSP functions, it is necessary to ensure that, while these functions are executing, interrupts from other - FIT modules do not occur. By controlling the IPL, these functions disable interrupts that are at or below the - specified interrupt priority level. - This macro sets the IPL. Range is 0x0 - 0xF. - Please set this macro more than IPR for other FIT module interrupts. - The default value is 0xF (maximum value). - Don't change if there is no special processing with higher priority than all fit modules. -*/ -#define BSP_CFG_FIT_IPL_MAX (0xF) - -/* This macro is used to select which SCI channel used for debug serial terminal. - */ -#define MY_BSP_CFG_SERIAL_TERM_SCI (0) - -#endif /* R_BSP_CONFIG_REF_HEADER_FILE */ - - - diff --git a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_config/r_bsp_config_readme.txt b/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_config/r_bsp_config_readme.txt deleted file mode 100644 index 6a9002cf4f3..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_config/r_bsp_config_readme.txt +++ /dev/null @@ -1,12 +0,0 @@ -FIT r_config folder -------------------- -The purpose of the r_config folder is to provide one place where the user can store all of their FIT configuration -files. Putting the files in one place makes them easy to find, backup, and put in a version control system. - -FIT Modules are distributed with a reference configuration file. These files end with '_reference.h'. For example, -the reference configuration file for the r_bsp is named r_bsp_config_reference.h. Reference configuration files are -provided so that the user always has a known-good configuration to revert to. When adding a FIT Module to a project the -user should copy this reference configuration file to this folder and remove '_reference' from the filename -(r_bsp_config_reference.h is renamed to r_bsp_config.h). For the r_bsp the reference configuration file can be found in -the 'board' folder for the currently chosen development board. For other FIT Modules the reference configuration file -can be found in the 'ref' folder of the FIT Module. diff --git a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_config/r_byteq_config.h b/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_config/r_byteq_config.h deleted file mode 100644 index 0b4d4f9bb52..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_config/r_byteq_config.h +++ /dev/null @@ -1,59 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_byteq_config.h -* Description : Configures the byte queue memory allocation -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 24.07.2013 1.00 Initial Release -* : 11.21.2014 1.20 Removed dependency to BSP -* : 30.09.2015 1.50 Added dependency to BSP -***********************************************************************************************************************/ -#ifndef BYTEQ_CONFIG_H -#define BYTEQ_CONFIG_H - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - Available settings: - BSP_CFG_PARAM_CHECKING_ENABLE: - Utilizes the system default setting - 1: - Includes parameter checking - 0: - Compiles out parameter checking -*/ -#define BYTEQ_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY IF SHOULD USE MALLOC() TO ALLOCATE MEMORY FOR QUEUE CONTROL BLOCKS */ -#define BYTEQ_CFG_USE_HEAP_FOR_CTRL_BLKS (0) - -/* SPECIFY NUMBER OF STATIC QUEUE CONTROL BLOCKS TO SUPPORT */ -/* valid only when BYTEQ_USE_HEAP_FOR_CTRL_BLKS is set to 0 */ -#define BYTEQ_CFG_MAX_CTRL_BLKS (4) - - -#endif /* BYTEQ_CONFIG_H */ diff --git a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_config/r_ether_rx_config.h b/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_config/r_ether_rx_config.h deleted file mode 100644 index 49178619185..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_config/r_ether_rx_config.h +++ /dev/null @@ -1,118 +0,0 @@ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_ether_rx_config.h - * Version : 1.04 - * Description : Ethernet module device driver - ***********************************************************************************************************************/ -/********************************************************************************************************************** - * History : DD.MM.YYYY Version Description - * : 22.07.2014 1.00 First Release - * : 31.03.2016 1.01 Added changes for RX63N. - * : 01.10.2016 1.02 Added changes for RX65N. - * : 01.10.2017 1.03 Added changes for RX65N-2MB. - * : 08.01.2018 1.04 Changed comment. - ***********************************************************************************************************************/ - -/* Guards against multiple inclusion */ -#ifndef R_ETHER_RX_CONFIG_H - #define R_ETHER_RX_CONFIG_H - -/*********************************************************************************************************************** - Macro definitions - ***********************************************************************************************************************/ - -/* Ethernet interface select. - 0 = MII (Media Independent Interface) - 1 = RMII (Reduced Media Independent Interface) - */ - #define ETHER_CFG_MODE_SEL (1) - -/* PHY-LSI address setting for ETHER0/1. - Please set the value 31 ETHER_CFG_CH0_PHY_ADDRESS when use default setting of the RSK+RX63N. - Please set the value 30 ETHER_CFG_CH0_PHY_ADDRESS when use default setting of the RSK+RX65N/RSK+RX65N_2MB. - Please set the value 0 ETHER_CFG_CH0_PHY_ADDRESS and value 1 ETHER_CFG_CH1_PHY_ADDRESS when use default setting of the RSK+RX64M/RSK+RX71M. - */ - #define ETHER_CFG_CH0_PHY_ADDRESS (0) /* Please define the PHY-LSI address in the range of 0-31. */ - #define ETHER_CFG_CH1_PHY_ADDRESS (1) /* Please define the PHY-LSI address in the range of 0-31. */ - -/* The number of Rx descriptors. */ - #define ETHER_CFG_EMAC_RX_DESCRIPTORS (1) - -/* The number of Tx descriptors. */ - #define ETHER_CFG_EMAC_TX_DESCRIPTORS (1) - -/* Please define the size of the sending and receiving buffer in the value where one frame can surely be stored - because the driver is single-frame/single-buffer processing. */ - #define ETHER_CFG_BUFSIZE (1536) /* Must be 32-byte aligned */ - -/* EINT interrupt priority level. This definition is not used when EINT interrupt is assigned to Group interrupt. */ - #define ETHER_CFG_EINT_INT_PRIORITY (2) /* Please define the interruption level within the range of 1-15. */ - -/* Group AL1 interrupt priority level. This definition is not used when EINT interrupt is assigned to Peripheral - interrupt. */ - #define ETHER_CFG_AL1_INT_PRIORTY (2) /* Please define the interruption level within the range of 1-15. */ - -/* The register bus of PHY0/1 for ETHER0/1 select - 0 = The access of the register of PHY uses ETHER0. - 1 = The access of the register of PHY uses ETHER1. - - Please set the value 0 ETHER_CFG_CH0_PHY_ACCESS when use default setting of the RSK+RX63N. - Please set the value 0 ETHER_CFG_CH0_PHY_ACCESS when use default setting of the RSK+RX65N/RSK+RX65N_2MB. - Please set the value 1 ETHER_CFG_CH0_PHY_ACCESS and ETHER_CFG_CH1_PHY_ACCESS when use default setting of the RSK+RX64M/RSK+RX71M. - */ - #define ETHER_CFG_CH0_PHY_ACCESS (0) - #define ETHER_CFG_CH1_PHY_ACCESS (1) - -/* Define the access timing of MII/RMII register */ - #define ETHER_CFG_PHY_MII_WAIT (8) /* Plese define the value of 1 or more */ - -/* Define the waiting time for reset completion of PHY-LSI */ - #define ETHER_CFG_PHY_DELAY_RESET (0x00020000L) - -/** - * Link status read from LMON bit of ETHERC PSR register. The state is hardware dependent. - */ - #define ETHER_CFG_LINK_PRESENT (1) - -/* Use LINKSTA signal for detect link status changes - 0 = unused (use PHY-LSI status register) - 1 = use (use LINKSTA signal) - */ - #define ETHER_CFG_USE_LINKSTA (1) /* This setting is reflected in all channels */ - -/* Definition of whether or not to use KSZ8041NL of the Micrel Inc. - 0 = unused - 1 = use - */ - #define ETHER_CFG_USE_PHY_KSZ8041NL (0) - -/*********************************************************************************************************************** - Typedef definitions - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global variables - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global functions (to be accessed by other files) - ***********************************************************************************************************************/ - -#endif /* R_ETHER_RX_CONFIG_H */ diff --git a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_config/r_flash_rx_config.h b/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_config/r_flash_rx_config.h deleted file mode 100644 index fbf916a0e97..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_config/r_flash_rx_config.h +++ /dev/null @@ -1,116 +0,0 @@ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_flash_rx_config_reference.h - * Description : Configures the FLASH API module for RX200 and RX600 Series MCU's. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* 12.04.2014 1.00 First Release -* 22.12.2014 1.10 Added flash type usage comments. -* 25.06.2015 1.20 Added FLASH_CFG_CODE_FLASH_RUN_FROM_ROM. -* : 12.10.2016 2.00 Modified for BSPless operation (added FLASH_CFG_USE_FIT_BSP). -***********************************************************************************************************************/ -#ifndef FLASH_CONFIG_HEADER_FILE -#define FLASH_CONFIG_HEADER_FILE - -/* Set the following value to 0 when building without using the FIT BSP Module */ -#define FLASH_CFG_USE_FIT_BSP (1) - - -/*********************************************************************************************************************** - Configuration Options - ***********************************************************************************************************************/ -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting - * Setting to 1 includes parameter checking; 0 compiles out parameter checking - */ -#define FLASH_CFG_PARAM_CHECKING_ENABLE (1) - - -/****************************************************************************** - ENABLE CODE FLASH PROGRAMMING -******************************************************************************/ -/* If you are only using data flash, set this to 0. - * Setting to 1 includes code to program the ROM area. When programming ROM, - * code must be executed from RAM, except under certain restrictions for flash - * type 3 (see section 2.14 in App Note). See section 2.13 in the App Note for - * details on how to set up code and the linker to execute code from RAM. - */ -#define FLASH_CFG_CODE_FLASH_ENABLE (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING DATA FLASH OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces data flash API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, data flash operations return immediately after the operation has been - * started. Notification of the operation completion is done via the callback - * function. - */ -#define FLASH_CFG_DATA_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING CODE FLASH (ROM) OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces ROM API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, ROM operations return immediately after the operation has been started. - * Notification of the operation completion is done via the callback function. - * When reprogramming ROM, THE RELOCATABLE VECTOR TABLE AND CORRESPONDING - * INTERRUPT ROUTINES MUST BE IN RAM. - * See sections 2.16 Usage Notes in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE CODE FLASH SELF-PROGRAMMING -******************************************************************************/ -/* Set this to 0 when programming code flash while executing in RAM. - * Set this to 1 when programming code flash while executing from another - * segment in ROM (possible only with RX64M, RX71M, RX65N-2 groups). - * See section 2.14 in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_RUN_FROM_ROM (0) - - -/****************************************************************************** - SET IPL OF FLASH READY INTERRUPT -******************************************************************************/ -#define FLASH_CFG_FLASH_READY_IPL (5) // Flash type 2 only - - -/****************************************************************************** - ENABLE OR DISABLE LOCK BIT PROTECTION -******************************************************************************/ -/* Each erasure block has a corresponding lock bit that can be used to - * protect that block from being programmed/erased after the lock bit is - * set. The use of lock bits can be used or ignored. - * Setting this to 1 will cause lock bits to be ignored and programs/erases to a - * block will not be limited. - * Setting this to 0 will cause lock bits to be used as the user configures through - * the Control command. This only applies to ROM as the DF does not have lock bits. - */ -#define FLASH_CFG_IGNORE_LOCK_BITS (1) // Flash type 2 only - - -#endif /* FLASH_CONFIG_HEADER_FILE */ diff --git a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_config/r_s12ad_rx_config.h b/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_config/r_s12ad_rx_config.h deleted file mode 100644 index 0202bf133a4..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_config/r_s12ad_rx_config.h +++ /dev/null @@ -1,53 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_s12ad_rx_config.h -* Description : Configures the 12-bit A/D driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 22.07.2013 1.00 Initial Release. -* 21.04.2014 1.20 Updated for RX210 advanced features; RX110/63x support. -***********************************************************************************************************************/ -#ifndef S12AD_CONFIG_H -#define S12AD_CONFIG_H - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* - * SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting. - * Setting to 1 includes parameter checking; 0 compiles out parameter checking. - */ -#define ADC_CFG_PARAM_CHECKING_ENABLE BSP_CFG_PARAM_CHECKING_ENABLE - - -/* - * RX210 Series only; Temperature Sensor Programmable Gain Amplifier (PGA) - * SELECT PGA GAIN TO MATCH AVCC0 VOLTAGE RANGE: - * 0: 1.8V <= AVcc0 < 2.7V; default; good for all actual voltages - * 1: 2.7V <= AVcc0 < 3.6V - * 2: 3.6V <= AVcc0 < 4.5V - * 3: 4.5V <= AVcc0 <= 5.5V - */ -#define ADC_CFG_PGA_GAIN (0) - - -#endif /* S12AD_CONFIG_H */ diff --git a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_config/r_sci_rx_config.h b/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_config/r_sci_rx_config.h deleted file mode 100644 index 4766e45550a..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_config/r_sci_rx_config.h +++ /dev/null @@ -1,171 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_config.h -* Description : Configures the SCI driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 25.09.2013 1.00 Initial Release -* 17.04.2014 1.20 Added comments for new RX110 support. -* 02.07.2014 1.30 Fixed bug that caused Group12 rx errors to only be enabled for channel 2. -* 25.11.2014 1.40 Added comments for RX113 support -* 30.09.2015 1.70 Added comments for RX23T support -* 01.10.2016 1.80 Added support for RX65N (comments and TX/RX FIFO THRESHOLD options) -* 19.12.2016 1.90 Added comments for RX24U support -* 07.03.2017 2.00 Added comments for RX130-512KB support -***********************************************************************************************************************/ -#ifndef SCI_CONFIG_H -#define SCI_CONFIG_H - -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING */ -/* Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting */ -/* Setting to 1 includes parameter checking; 0 compiles out parameter checking */ -#define SCI_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY WHETHER TO INCLUDE CODE FOR DIFFERENT SCI MODES */ -/* Setting an equate to 1 includes code specific to that mode. */ -#define SCI_CFG_ASYNC_INCLUDED (1) -#define SCI_CFG_SYNC_INCLUDED (0) -#define SCI_CFG_SSPI_INCLUDED (0) - -/* SPECIFY BYTE VALUE TO TRANSMIT WHILE CLOCKING IN DATA IN SSPI MODES */ -#define SCI_CFG_DUMMY_TX_BYTE (0xFF) - -/* SPECIFY CHANNELS TO INCLUDE SOFTWARE SUPPORT FOR 1=included, 0=not */ -/* - * NOTE: If using ASYNC mode, adjust BYTEQ_CFG_MAX_CTRL_BLKS in r_byteq_config.h - * to provide 2 queues per channel (static mode only). - * * = port connector RDKRX63N, RSKRX210, RSKRX11x - * u = channel used by the USB-UART port (G1CUSB0) - * a = this channel is used only for RX130-512KB - * RX MCU supported channels - * - * CH# 110 111 113 130 210 230 231 23T 24T 24U 63N 631 64M 71M 65N - * --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- - * CH0 X Xa X* X X X* X X X X - * CH1 X X* X* Xu X X X Xu Xu Xu X X X X X - * CH2 X X X X X Xu - * CH3 X X X X X - * CH4 X X X X X - * CH5 X X X X X X Xu X X X X X X X X - * CH6 X X X X X X X X X X X X - * CH7 X X Xu Xu X - * CH8 X Xa X X X X X X X - * CH9 X Xa X X X X X X X - * CH10 X X X - * CH11 X X X X - * CH12 X X X X X X X X X X X X -*/ - -#define SCI_CFG_CH0_INCLUDED (1) -#define SCI_CFG_CH1_INCLUDED (0) -#define SCI_CFG_CH2_INCLUDED (0) -#define SCI_CFG_CH3_INCLUDED (0) -#define SCI_CFG_CH4_INCLUDED (0) -#define SCI_CFG_CH5_INCLUDED (0) -#define SCI_CFG_CH6_INCLUDED (0) -#define SCI_CFG_CH7_INCLUDED (0) -#define SCI_CFG_CH8_INCLUDED (0) -#define SCI_CFG_CH9_INCLUDED (0) -#define SCI_CFG_CH10_INCLUDED (0) -#define SCI_CFG_CH11_INCLUDED (0) -#define SCI_CFG_CH12_INCLUDED (0) - -/* SPECIFY ASYNC MODE TX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_TX_BUFSIZ (80) -#define SCI_CFG_CH1_TX_BUFSIZ (80) -#define SCI_CFG_CH2_TX_BUFSIZ (80) -#define SCI_CFG_CH3_TX_BUFSIZ (80) -#define SCI_CFG_CH4_TX_BUFSIZ (80) -#define SCI_CFG_CH5_TX_BUFSIZ (80) -#define SCI_CFG_CH6_TX_BUFSIZ (80) -#define SCI_CFG_CH7_TX_BUFSIZ (80) -#define SCI_CFG_CH8_TX_BUFSIZ (80) -#define SCI_CFG_CH9_TX_BUFSIZ (80) -#define SCI_CFG_CH10_TX_BUFSIZ (80) -#define SCI_CFG_CH11_TX_BUFSIZ (80) -#define SCI_CFG_CH12_TX_BUFSIZ (80) - -/* SPECIFY ASYNC MODE RX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_RX_BUFSIZ (80) -#define SCI_CFG_CH1_RX_BUFSIZ (80) -#define SCI_CFG_CH2_RX_BUFSIZ (80) -#define SCI_CFG_CH3_RX_BUFSIZ (80) -#define SCI_CFG_CH4_RX_BUFSIZ (80) -#define SCI_CFG_CH5_RX_BUFSIZ (80) -#define SCI_CFG_CH6_RX_BUFSIZ (80) -#define SCI_CFG_CH7_RX_BUFSIZ (80) -#define SCI_CFG_CH8_RX_BUFSIZ (80) -#define SCI_CFG_CH9_RX_BUFSIZ (80) -#define SCI_CFG_CH10_RX_BUFSIZ (80) -#define SCI_CFG_CH11_RX_BUFSIZ (80) -#define SCI_CFG_CH12_RX_BUFSIZ (80) - -/* -* ENABLE TRANSMIT END INTERRUPT (ASYNCHRONOUS) -* This interrupt only occurs when the last bit of the last byte of data -* has been sent and the transmitter has become idle. The interrupt calls -* the user's callback function specified in R_SCI_Open() and passes it an -* SCI_EVT_TEI event. A typical use of this feature is to disable an external -* transceiver to save power. It would then be up to the user's code to -* re-enable the transceiver before sending again. Not including this feature -* reduces code space used by the interrupt. Note that this equate is only -* for including the TEI code. The interrupt itself must be enabled using an -* R_SCI_Control(hdl, SCI_CMD_EN_TEI, NULL) call. -*/ -#define SCI_CFG_TEI_INCLUDED (0) /* 1=included, 0=not */ - -/* -* SET GROUP12 (RECEIVER ERROR) INTERRUPT PRIORITY; RX63N/631 ONLY -* This #define sets the priority level for the interrupt that handles -* receiver overrun, framing, and parity errors for all SCI channels -* on the RX63N/631. It is ignored for all other parts. -*/ -#define SCI_CFG_RXERR_PRIORITY (3) /* (RX63N/631 ONLY) 1 lowest, 15 highest */ - -/* -* SET GROUPBL0 (ERI, TEI) INTERRUPT PRIORITY; RX64M/RX71M/RX65N ONLY -* SET GROUPBL1, GROUPAL0 (ERI,TEI) INTERRUPT PRIORITY; RX65N ONLY -* This sets the priority level for receiver overrun, framing, and parity errors -* as well as TEI interrupts for all SCI channels. -*/ -#define SCI_CFG_ERI_TEI_PRIORITY (3) /* (RX64M/RX71M/RX65N ONLY) 1 lowest, 15 highest */ - -/* ENABLE TX/RX FIFO; (SCIi supported MCU ONLY) 1=included, 0=not */ -#define SCI_CFG_CH10_FIFO_INCLUDED (0) -#define SCI_CFG_CH11_FIFO_INCLUDED (0) - -/* SET TX FIFO THRESHOLD; (SCIi supported MCU ONLY) 0 lowest, 15 highest */ -/* TX FIFO THRESHOLD is invalid in Clock Synchronous Mode and Simple SPI Mode. */ -/* Set the same value for TX FIFO THRESHOLD and RX FIFO THRESHOLD in Clock Synchronous Mode and Simple SPI Mode. */ -#define SCI_CFG_CH10_TX_FIFO_THRESH (8) -#define SCI_CFG_CH11_TX_FIFO_THRESH (8) - -/* SET RX FIFO THRESHOLD; (SCIi supported MCU ONLY) 1 lowest, 15 highest */ -#define SCI_CFG_CH10_RX_FIFO_THRESH (8) -#define SCI_CFG_CH11_RX_FIFO_THRESH (8) - - -#endif /* SCI_CONFIG_H */ diff --git a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_pincfg/r_pinset.c b/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_pincfg/r_pinset.c deleted file mode 100644 index 4c59e214125..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_pincfg/r_pinset.c +++ /dev/null @@ -1,115 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_pinset.c -* Version : 1.2.5 -* Device(s) : R5F563NYDxFP -* Tool-Chain : RXC -* Description : Setting of port and mpc registers -* Creation Date: 25 9 2018 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_pinset.h" -#include "platform.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: R_ETHER_PinSet_ETHERC_RMII -* Description : This function initializes pins for r_ether_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_ETHER_PinSet_ETHERC_RMII(void) -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set REF50CK pin */ - MPC.PB2PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B2 = 1U; - - /* Set RMII_TXD_EN pin */ - MPC.PB4PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B4 = 1U; - - /* Set RMII_TXD1 pin */ - MPC.PB6PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B6 = 1U; - - /* Set RMII_TXD0 pin */ - MPC.PB5PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B5 = 1U; - - /* Set RMII_RXD1 pin */ - MPC.PB0PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B0 = 1U; - - /* Set RMII_RXD0 pin */ - MPC.PB1PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B1 = 1U; - - /* Set RMII_RX_ER pin */ - MPC.PB3PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B3 = 1U; - - /* Set RMII_CRS_DV pin */ - MPC.PB7PFS.BYTE = 0x12U; - PORTB.PMR.BIT.B7 = 1U; - - /* Set ET_MDC pin */ - MPC.PA4PFS.BYTE = 0x11U; - PORTA.PMR.BIT.B4 = 1U; - - /* Set ET_MDIO pin */ - MPC.PA3PFS.BYTE = 0x11U; - PORTA.PMR.BIT.B3 = 1U; - - /* Set ET_LINKSTA pin */ - MPC.PA5PFS.BYTE = 0x11U; - PORTA.PMR.BIT.B5 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - -/*********************************************************************************************************************** -* Function Name: R_SCI_PinSet_SCI0 -* Description : This function initializes pins for r_sci_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_SCI_PinSet_SCI0(void) -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set RXD0/SMISO0 pin */ - MPC.P21PFS.BYTE = 0x0AU; - PORT2.PMR.BIT.B1 = 1U; - - /* Set TXD0/SMOSI0 pin */ - MPC.P20PFS.BYTE = 0x0AU; - PORT2.PMR.BIT.B0 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_pincfg/r_pinset.h b/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_pincfg/r_pinset.h deleted file mode 100644 index 09ce0a16272..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/r_pincfg/r_pinset.h +++ /dev/null @@ -1,42 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_pinset.h -* Version : 1.2.5 -* Device(s) : R5F563NYDxFP -* Tool-Chain : RXC -* Description : Setting of port and mpc registers -* Creation Date: 25 9 2018 -***********************************************************************************************************************/ - -#ifndef R_FIT_PINSET_H -#define R_FIT_PINSET_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -void R_ETHER_PinSet_ETHERC_RMII(void); -void R_SCI_PinSet_SCI0(void); - -#endif diff --git a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/rx63n_gr_sakura_aws HardwareDebug.launch b/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/rx63n_gr_sakura_aws HardwareDebug.launch deleted file mode 100644 index 2b0dab55da5..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/rx63n_gr_sakura_aws HardwareDebug.launch +++ /dev/null @@ -1,150 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/src/attention!.txt b/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/src/attention!.txt deleted file mode 100644 index cf5eb1abadb..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/src/attention!.txt +++ /dev/null @@ -1,64 +0,0 @@ -Please note that the following folders in the project window of IDEs are -so called 'linked' folders. - --------------------------------------------- -Linked folders in the project window of IDEs --------------------------------------------- - -All -~~~ -src/FIT_modified_code/r_bsp -src/FIT_modified_code/r_byteq -src/FIT_modified_code/r_cmt_rx -src/FIT_modified_code/r_ether_rx -src/FIT_modified_code/r_flash_rx -src/FIT_modified_code/r_sci_iic_rx -src/FIT_modified_code/r_sci_rx -src/amazon_freertos_common - -CC-RX/e2 studio -~~~~~~~~~~~~~~~ -src/FITConfigurator/r_config -src/FITConfigurator/r_pinconfig - -CC-RX/CS+ -~~~~~~~~~ -src/FIT_setting_files/r_config -src/FIT_setting_files/r_pinconfig - -GNURX/e2 studio -~~~~~~~~~~~~~~~ -src/FIT_setting_files/r_config -src/FIT_setting_files/r_pinconfig - ----------------------------------------------------------- -Folders on the File System of the WINDOWS Operating System ----------------------------------------------------------- - -All -~~~ -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_bsp -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_byteq -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_cmt_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_ether_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_flash_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_iic_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/amazon_freertos_common - -CC-RX/e2 studio -~~~~~~~~~~~~~~~ -amazon-freertos/demos/renesas/XXXX/ccrx-e2studio/r_config -amazon-freertos/demos/renesas/XXXX/ccrx-e2studio/r_pincfg - -CC-RX/CS+ -~~~~~~~~~ -amazon-freertos/demos/renesas/XXXX/ccrx-csplus/r_config -amazon-freertos/demos/renesas/XXXX/ccrx-csplus/r_pincfg - -GNURX/e2 studio -~~~~~~~~~~~~~~~ -amazon-freertos/demos/renesas/XXXX/gnurx-e2studio/r_config -amazon-freertos/demos/renesas/XXXX/gnurx-e2studio/r_pincfg - -[EOF] diff --git a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/src/linker_script.ld b/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/src/linker_script.ld deleted file mode 100644 index 3f76633300b..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/src/linker_script.ld +++ /dev/null @@ -1,172 +0,0 @@ -MEMORY -{ - RAM : ORIGIN = 0x0, LENGTH = 262144 - ROM : ORIGIN = 0xFFF00000, LENGTH = 1048576 -DATAFLASH (!rx) : ORIGIN = 0x00100000, LENGTH = 32768 -} - -SECTIONS -{ - .fvectors 0xFFFFFF80 : AT(0xFFFFFF80) - { - KEEP(*(.fvectors)) - } >ROM - .text 0xFFF00000 : AT(0xFFF00000) - { - *(.text) - *(.text.*) - *(P) - etext = .; - } >ROM - .rvectors : - { - _rvectors_start = .; - INCLUDE ../src/linker_script_rvectors.ld_inc - _rvectors_end = .; - } >ROM - .init : - { - KEEP(*(.init)) - __preinit_array_start = .; - KEEP(*(.preinit_array)) - __preinit_array_end = .; - __init_array_start = (. + 3) & ~ 3; - KEEP(*(.init_array)) - KEEP(*(SORT(.init_array.*))) - __init_array_end = .; - __fini_array_start = .; - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - __fini_array_end = .; - } >ROM - .fini : - { - KEEP(*(.fini)) - } >ROM - .got : - { - *(.got) - *(.got.plt) - } >ROM - .rodata : - { - *(.rodata) - *(.rodata.*) - *(C_1) - *(C_2) - *(C) - _erodata = .; - } >ROM - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } >ROM - .eh_frame : - { - *(.eh_frame) - } >ROM - .jcr : - { - *(.jcr) - } >ROM - .tors : - { - __CTOR_LIST__ = .; - . = ALIGN(2); - ___ctors = .; - *(.ctors) - ___ctors_end = .; - __CTOR_END__ = .; - __DTOR_LIST__ = .; - ___dtors = .; - *(.dtors) - ___dtors_end = .; - __DTOR_END__ = .; - . = ALIGN(2); - _mdata = .; - } >ROM - .r_bsp_NULL 0 : AT(0) - { - . += 0x100; - _r_bsp_NULL_end = .; - } >RAM - /* - * .r_bsp_ustack BLOCK(4) : - * { - * KEEP(*(.r_bsp_ustack)) - * } > RAM - * .ustack : - * { - * _ustack = .; - * } > RAM - */ - .r_bsp_istack BLOCK(4) : - { - KEEP(*(.r_bsp_istack)) - } >RAM - .istack : - { - _istack = .; - } >RAM - .data : AT(_mdata) - { - _data = .; - *(.data) - *(.data.*) - *(D) - *(D_1) - *(D_2) - _edata = .; - } >RAM - .gcc_exc : - { - *(.gcc_exc) - } >RAM - .bss : - { - _bss = .; - *(.bss) - *(.bss.**) - *(COMMON) - *(B) - *(B_1) - *(B_2) - _ebss = .; - _end = .; - } >RAM - B_ETHERNET_BUFFERS_1 BLOCK(32) : - { - _B_ETHERNET_BUFFERS_1_start = .; - *(B_ETHERNET_BUFFERS_1) - _B_ETHERNET_BUFFERS_1_end = .; - } >RAM - B_RX_DESC_1 : - { - _B_RX_DESC_1_start = .; - *(B_RX_DESC_1) - _B_RX_DESC_1_end = .; - } >RAM - B_TX_DESC_1 : - { - _B_TX_DESC_1_start = .; - *(B_TX_DESC_1) - _B_TX_DESC_1_end = .; - } >RAM - C_PKCS11_STORAGE_1 : - { - } >DATAFLASH C_PKCS11_STORAGE_MIRROR_1 : -{ -} >DATAFLASH - - - - - - - - - - -} - - diff --git a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/src/linker_script_rvectors.ld_inc b/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/src/linker_script_rvectors.ld_inc deleted file mode 100644 index 818dda33da0..00000000000 --- a/demos/renesas/rx63n-gr-sakura2/gnurx-e2studio/src/linker_script_rvectors.ld_inc +++ /dev/null @@ -1,256 +0,0 @@ - LONG(DEFINED($tableentry$0$.rvectors) ? $tableentry$0$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$1$.rvectors) ? $tableentry$1$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$2$.rvectors) ? $tableentry$2$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$3$.rvectors) ? $tableentry$3$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$4$.rvectors) ? $tableentry$4$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$5$.rvectors) ? $tableentry$5$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$6$.rvectors) ? $tableentry$6$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$7$.rvectors) ? $tableentry$7$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$8$.rvectors) ? $tableentry$8$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$9$.rvectors) ? $tableentry$9$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$10$.rvectors) ? $tableentry$10$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$11$.rvectors) ? $tableentry$11$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$12$.rvectors) ? $tableentry$12$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$13$.rvectors) ? $tableentry$13$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$14$.rvectors) ? $tableentry$14$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$15$.rvectors) ? $tableentry$15$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$16$.rvectors) ? $tableentry$16$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$17$.rvectors) ? $tableentry$17$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$18$.rvectors) ? $tableentry$18$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$19$.rvectors) ? $tableentry$19$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$20$.rvectors) ? $tableentry$20$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$21$.rvectors) ? $tableentry$21$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$22$.rvectors) ? $tableentry$22$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$23$.rvectors) ? $tableentry$23$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$24$.rvectors) ? $tableentry$24$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$25$.rvectors) ? $tableentry$25$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$26$.rvectors) ? $tableentry$26$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$27$.rvectors) ? $tableentry$27$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$28$.rvectors) ? $tableentry$28$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$29$.rvectors) ? $tableentry$29$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$30$.rvectors) ? $tableentry$30$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$31$.rvectors) ? $tableentry$31$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$32$.rvectors) ? $tableentry$32$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$33$.rvectors) ? $tableentry$33$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$34$.rvectors) ? $tableentry$34$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$35$.rvectors) ? $tableentry$35$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$36$.rvectors) ? $tableentry$36$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$37$.rvectors) ? $tableentry$37$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$38$.rvectors) ? $tableentry$38$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$39$.rvectors) ? $tableentry$39$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$40$.rvectors) ? $tableentry$40$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$41$.rvectors) ? $tableentry$41$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$42$.rvectors) ? $tableentry$42$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$43$.rvectors) ? $tableentry$43$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$44$.rvectors) ? $tableentry$44$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$45$.rvectors) ? $tableentry$45$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$46$.rvectors) ? $tableentry$46$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$47$.rvectors) ? $tableentry$47$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$48$.rvectors) ? $tableentry$48$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$49$.rvectors) ? $tableentry$49$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$50$.rvectors) ? $tableentry$50$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$51$.rvectors) ? $tableentry$51$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$52$.rvectors) ? $tableentry$52$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$53$.rvectors) ? $tableentry$53$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$54$.rvectors) ? $tableentry$54$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$55$.rvectors) ? $tableentry$55$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$56$.rvectors) ? $tableentry$56$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$57$.rvectors) ? $tableentry$57$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$58$.rvectors) ? $tableentry$58$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$59$.rvectors) ? $tableentry$59$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$60$.rvectors) ? $tableentry$60$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$61$.rvectors) ? $tableentry$61$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$62$.rvectors) ? $tableentry$62$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$63$.rvectors) ? $tableentry$63$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$64$.rvectors) ? $tableentry$64$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$65$.rvectors) ? $tableentry$65$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$66$.rvectors) ? $tableentry$66$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$67$.rvectors) ? $tableentry$67$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$68$.rvectors) ? $tableentry$68$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$69$.rvectors) ? $tableentry$69$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$70$.rvectors) ? $tableentry$70$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); 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- LONG(DEFINED($tableentry$253$.rvectors) ? $tableentry$253$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$254$.rvectors) ? $tableentry$254$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$255$.rvectors) ? $tableentry$255$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/.gitignore b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/.gitignore deleted file mode 100644 index 6ea78411070..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/.gitignore +++ /dev/null @@ -1,4 +0,0 @@ -/HardwareDebug/ -*.mtud -*.rcpe -*.mtsp diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/.settings/fittemp/r_ether_rx.ftl b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/.settings/fittemp/r_ether_rx.ftl deleted file mode 100644 index 2bb8ed85d3b..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/.settings/fittemp/r_ether_rx.ftl +++ /dev/null @@ -1,45 +0,0 @@ -<#-- - Copyright(C) 2015 Renesas Electronics Corporation - RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY - This program must be used solely for the purpose for which it was furnished - by Renesas Electronics Corporation. No part of this program may be reproduced - or disclosed to others, in any form, without the prior written permission of - Renesas Electronics Corporation. ---> -<#-- = DECLARE FUNCTION INFORMATION HERE =================== --> -<#assign Function_Base_Name = "R_ETHER_PinSet"> -<#assign Function_Description = "This function initializes pins for r_ether_rx module"> -<#assign Function_Arg = "none"> -<#assign Function_Ret = "none"> -<#assign Version = 1.00> - -<#-- = DECLARE FUNCTION CONTENT HERE ======================= --> -<#macro initialsection postfix> -<#assign Function_Name = "${Function_Base_Name}${postfix}"> -<#include "lib/functionheader.ftl"> -void ${Function_Name}() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - -<#macro peripheralpincode pin> - - -<#macro channelpincode pin> - - /* Set ${pin.pinName} pin */ - MPC.${pin.assignedPinName}PFS.BYTE = 0x${pin.pinMPC}U; - PORT${pin.portNum}.PMR.BIT.B${pin.pinBitNum} = 1U; - - -<#macro endsection> - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - - -<#macro headerfilesection postfix> -void ${Function_Base_Name}${postfix}(); - - -<#-- = END OF FILE ========================================= --> \ No newline at end of file diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/.settings/fittemp/r_s12ad_rx.ftl b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/.settings/fittemp/r_s12ad_rx.ftl deleted file mode 100644 index 41d42034c58..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/.settings/fittemp/r_s12ad_rx.ftl +++ /dev/null @@ -1,67 +0,0 @@ -<#-- - Copyright(C) 2016 Renesas Electronics Corporation - RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY - This program must be used solely for the purpose for which it was furnished - by Renesas Electronics Corporation. No part of this program may be reproduced - or disclosed to others, in any form, without the prior written permission of - Renesas Electronics Corporation. ---> -<#-- = DECLARE FUNCTION INFORMATION HERE =================== --> -<#assign Function_Base_Name = "R_ADC_PinSet"> -<#assign Function_Description = "This function initializes pins for r_s12ad_rx module"> -<#assign Function_Arg = "none"> -<#assign Function_Ret = "none"> -<#assign Version = 1.00> - -<#-- = DECLARE FUNCTION CONTENT HERE ======================= --> -<#macro initialsection postfix> -<#assign Function_Name = "${Function_Base_Name}${postfix}"> -<#include "lib/functionheader.ftl"> -void ${Function_Name}() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - -<#macro peripheralpincode pin> - - -<#macro channelpincode pin> - - <#if (pin.pinName?contains("ADTRG")?string("true","false")) == "true" || (pin.pinName?contains("ADST")?string("true","false")) == "true" > - /* Set ${pin.pinName} pin */ - MPC.${pin.assignedPinName}PFS.BYTE = 0x${pin.pinMPC}U; - PORT${pin.portNum}.PMR.BIT.B${pin.pinBitNum} = 1U; - <#else> - /* Set ${pin.pinName} pin */ - <#if headerInfo.device?contains("R5F5110")> - <#if pin.portNum != "4" && pin.portNum != "J" > - PORT${pin.portNum}.PCR.BIT.B${pin.pinBitNum} = 0U; - - <#elseif headerInfo.device?contains("R5F5111")> - <#if pin.portNum != "4" && pin.portNum != "H" && pin.portNum != "J" > - PORT${pin.portNum}.PCR.BIT.B${pin.pinBitNum} = 0U; - - <#elseif headerInfo.device?contains("R5F5113")> - <#if pin.portNum != "4" && pin.portNum != "9" && pin.portNum != "H" && pin.portNum != "J" > - PORT${pin.portNum}.PCR.BIT.B${pin.pinBitNum} = 0U; - - <#else> - PORT${pin.portNum}.PCR.BIT.B${pin.pinBitNum} = 0U; - - PORT${pin.portNum}.PDR.BIT.B${pin.pinBitNum} = 0U; - PORT${pin.portNum}.PMR.BIT.B${pin.pinBitNum} = 0U; - MPC.${pin.assignedPinName}PFS.BYTE = 0x${pin.pinMPC}U; - - - -<#macro endsection> - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - - -<#macro headerfilesection postfix> -void ${Function_Base_Name}${postfix}(); - - -<#-- = END OF FILE ========================================= --> \ No newline at end of file diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/.settings/fittemp/r_sci_rx.ftl b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/.settings/fittemp/r_sci_rx.ftl deleted file mode 100644 index a505f3edde7..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/.settings/fittemp/r_sci_rx.ftl +++ /dev/null @@ -1,85 +0,0 @@ -<#-- - Copyright(C) 2015 Renesas Electronics Corporation - RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY - This program must be used solely for the purpose for which it was furnished - by Renesas Electronics Corporation. No part of this program may be reproduced - or disclosed to others, in any form, without the prior written permission of - Renesas Electronics Corporation. ---> -<#-- = DECLARE FUNCTION INFORMATION HERE =================== --> -<#-- - (Step 1) Explanation: These variables are necessary information for the function header. - Please fill up or leave blank, but do not delete ---> -<#assign Function_Base_Name = "R_SCI_PinSet"> -<#assign Function_Description = "This function initializes pins for r_sci_rx module"> -<#assign Function_Arg = "none"> -<#assign Function_Ret = "none"> -<#assign Version = 1.00> - -<#-- = DECLARE FUNCTION CONTENT HERE ======================= --> -<#-- - (Step 2) Explanation: Function content. - - Macro [initialsection] : - Any text that goes into this section will be printed out 1 time per function - input [postfix] :Use this variable to add the channel number to the function base name. ---> -<#macro initialsection postfix> -<#assign Function_Name = "${Function_Base_Name}${postfix}"> -<#include "lib/functionheader.ftl"> -void ${Function_Name}() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - -<#-- - (Step 3) Explanation: Function content. - - Macro [peripheralpincode] : Any text that goes into this section will be printed out 1 time per peripheral - - input [pin] : Available info includes: - pin.pinName :The name of pin, eg “SSLA0†- pin.assignedPinName :The pin assigned to, eg “P32†- pin.pinMPC :The port number of assigned pin, eg “P32†has portNume = “3†- pin.portNum :The bit number of the assigned pin, eg “P32†has pinBitNum = “2†- pin.pinBitNum :The value of MPC ---> -<#macro peripheralpincode pin> - - -<#-- - (Step 4) Explanation: Function content. - - Macro [channelpincode] : Any text that goes into this section will be printed out 1 time per channel - - input [pin] : Same as above ---> -<#macro channelpincode pin> - - /* Set ${pin.pinName} pin */ - MPC.${pin.assignedPinName}PFS.BYTE = 0x${pin.pinMPC}U; - PORT${pin.portNum}.PMR.BIT.B${pin.pinBitNum} = 1U; - - -<#macro channelpincodeextra pin postfix> - - -<#-- - (Step 5) Explanation: Function content. - - Macro [endsection] : Any text that goes into this section will be printed out 1 time last ---> -<#macro endsection> - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - - -<#-- - (Step 6) Explanation: Header file content - - Macro [headerfilesection] : Any text that goes into this section will be printed out 1 time in the header file - - input [postfix] :Use this variable to add the channel number to the function base name. ---> -<#macro headerfilesection postfix> -void ${Function_Base_Name}${postfix}(); - - -<#macro headerfilesectionExtra postfix> - - -<#-- = END OF FILE ========================================= --> \ No newline at end of file diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/aws_demos.ipcf b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/aws_demos.ipcf deleted file mode 100644 index be6a44fc80d..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/aws_demos.ipcf +++ /dev/null @@ -1,1053 +0,0 @@ - - - - C:\Users\Shelty\Desktop\amazon\latest\demos\renesas\rx64m-gr-kaede\ccrx-csplus\src\smc_gen\general - C:\Users\Shelty\Desktop\amazon\latest\demos\renesas\rx64m-gr-kaede\ccrx-csplus\src\smc_gen\r_bsp - C:\Users\Shelty\Desktop\amazon\latest\demos\renesas\rx64m-gr-kaede\ccrx-csplus\src\smc_gen\r_byteq - C:\Users\Shelty\Desktop\amazon\latest\demos\renesas\rx64m-gr-kaede\ccrx-csplus\src\smc_gen\r_config - C:\Users\Shelty\Desktop\amazon\latest\demos\renesas\rx64m-gr-kaede\ccrx-csplus\src\smc_gen\r_ether_rx - C:\Users\Shelty\Desktop\amazon\latest\demos\renesas\rx64m-gr-kaede\ccrx-csplus\src\smc_gen\r_flash_rx - C:\Users\Shelty\Desktop\amazon\latest\demos\renesas\rx64m-gr-kaede\ccrx-csplus\src\smc_gen\r_pincfg - C:\Users\Shelty\Desktop\amazon\latest\demos\renesas\rx64m-gr-kaede\ccrx-csplus\src\smc_gen\r_s12ad_rx - C:\Users\Shelty\Desktop\amazon\latest\demos\renesas\rx64m-gr-kaede\ccrx-csplus\src\smc_gen\r_sci_rx - - - - - - .\src\smc_gen\general\r_cg_hardware_setup.c - - - - - .\src\smc_gen\general\r_cg_macrodriver.h - - - - - .\src\smc_gen\general\r_cg_userdefine.h - - - - - .\src\smc_gen\general\r_smc_cgc.c - - - - - .\src\smc_gen\general\r_smc_cgc.h - - - - - .\src\smc_gen\general\r_smc_cgc_user.c - - - - - .\src\smc_gen\general\r_smc_entry.h - - - - - .\src\smc_gen\general\r_smc_interrupt.c - - - - - .\src\smc_gen\general\r_smc_interrupt.h - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx64m\dbsct.c - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx64m\hwsetup.c - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx64m\hwsetup.h - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx64m\lowlvl.c - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx64m\lowsrc.c - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx64m\lowsrc.h - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx64m\resetprg.c - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx64m\r_bsp.h - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx64m\r_bsp_config_reference.h - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx64m\r_bsp_interrupt_config_reference.h - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx64m\sbrk.c - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx64m\vecttbl.c - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx64m\vecttbl.h - - - - - - - - - .\src\smc_gen\r_bsp\board\user\r_bsp.h - - - - - - - - - .\src\smc_gen\r_bsp\doc\en\r01an1685ej0380-rx.pdf - - - - - - - - - .\src\smc_gen\r_bsp\doc\ja\r01an1685jj0380-rx.pdf - - - - - - - - - .\src\smc_gen\r_bsp\mcu\all\r_bsp_common.c - - - - - - - - - .\src\smc_gen\r_bsp\mcu\all\r_bsp_common.h - - - - - - - - - .\src\smc_gen\r_bsp\mcu\all\r_typedefs.h - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx64m\cpu.c - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx64m\cpu.h - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx64m\locking.c - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx64m\locking.h - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx64m\mcu_clocks.c - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx64m\mcu_info.h - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx64m\mcu_init.c - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx64m\mcu_init.h - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx64m\mcu_interrupts.c - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx64m\mcu_interrupts.h - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx64m\mcu_locks.c - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx64m\mcu_locks.h - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx64m\mcu_mapped_interrupts.c - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx64m\mcu_mapped_interrupts.h - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx64m\mcu_mapped_interrupts_private.h - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx64m\mcu_startup.c - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx64m\mcu_startup.h - - - - - - - - - - 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..\..\..\..\lib\FreeRTOS\stream_buffer.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 14c7e23c-dd07-401e-8959-ffeb1800d9f4 - - - tasks.c - File - ..\..\..\..\lib\FreeRTOS\tasks.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 14c7e23c-dd07-401e-8959-ffeb1800d9f4 - - - timers.c - File - ..\..\..\..\lib\FreeRTOS\timers.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 14c7e23c-dd07-401e-8959-ffeb1800d9f4 - - - MemMang - Category - 485290f1-38f2-4cdf-ae74-0c9462f4539f - - - Renesas - Category - 485290f1-38f2-4cdf-ae74-0c9462f4539f - - - heap_4.c - File - ..\..\..\..\lib\FreeRTOS\portable\MemMang\heap_4.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 96ef069b-30cd-4302-9d07-6afafa2aee1f - - - RX600v2 - Category - cc013e4f-364d-47b3-89f3-586da0687baf - - - port.c - File - ..\..\..\..\lib\FreeRTOS\portable\Renesas\RX600v2\port.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 1707f925-a65d-49d4-b975-2cf757bfa295 - - - port_asm.src - File - ..\..\..\..\lib\FreeRTOS\portable\Renesas\RX600v2\port_asm.src - f654126d-e7ad-426d-be34-8455271d959b - 1707f925-a65d-49d4-b975-2cf757bfa295 - - - portmacro.h - File - ..\..\..\..\lib\FreeRTOS\portable\Renesas\RX600v2\portmacro.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 1707f925-a65d-49d4-b975-2cf757bfa295 - - - include - Category - 78017250-8b1e-4d51-9e80-945e92147c3e - - - source - Category - 78017250-8b1e-4d51-9e80-945e92147c3e - - - FreeRTOSIPConfigDefaults.h - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\include\FreeRTOSIPConfigDefaults.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 6944d514-73e0-4993-9dce-b7a0dd22f818 - - - FreeRTOS_ARP.h - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\include\FreeRTOS_ARP.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 6944d514-73e0-4993-9dce-b7a0dd22f818 - - - FreeRTOS_DHCP.h - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\include\FreeRTOS_DHCP.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 6944d514-73e0-4993-9dce-b7a0dd22f818 - - - FreeRTOS_DNS.h - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\include\FreeRTOS_DNS.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 6944d514-73e0-4993-9dce-b7a0dd22f818 - - - FreeRTOS_IP.h - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\include\FreeRTOS_IP.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 6944d514-73e0-4993-9dce-b7a0dd22f818 - - - FreeRTOS_IP_Private.h - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\include\FreeRTOS_IP_Private.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 6944d514-73e0-4993-9dce-b7a0dd22f818 - - - FreeRTOS_Sockets.h - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\include\FreeRTOS_Sockets.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 6944d514-73e0-4993-9dce-b7a0dd22f818 - - - FreeRTOS_Stream_Buffer.h - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\include\FreeRTOS_Stream_Buffer.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 6944d514-73e0-4993-9dce-b7a0dd22f818 - - - FreeRTOS_TCP_IP.h - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\include\FreeRTOS_TCP_IP.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 6944d514-73e0-4993-9dce-b7a0dd22f818 - - - FreeRTOS_TCP_WIN.h - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\include\FreeRTOS_TCP_WIN.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 6944d514-73e0-4993-9dce-b7a0dd22f818 - - - FreeRTOS_UDP_IP.h - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\include\FreeRTOS_UDP_IP.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 6944d514-73e0-4993-9dce-b7a0dd22f818 - - - FreeRTOS_errno_TCP.h - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\include\FreeRTOS_errno_TCP.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 6944d514-73e0-4993-9dce-b7a0dd22f818 - - - IPTraceMacroDefaults.h - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\include\IPTraceMacroDefaults.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 6944d514-73e0-4993-9dce-b7a0dd22f818 - - - NetworkBufferManagement.h - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\include\NetworkBufferManagement.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 6944d514-73e0-4993-9dce-b7a0dd22f818 - - - NetworkInterface.h - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\include\NetworkInterface.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 6944d514-73e0-4993-9dce-b7a0dd22f818 - - - portable - Category - 60ebb6f6-6991-434e-bfda-28d968d9d1bc - - - FreeRTOS_ARP.c - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\FreeRTOS_ARP.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 60ebb6f6-6991-434e-bfda-28d968d9d1bc - - - FreeRTOS_DHCP.c - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\FreeRTOS_DHCP.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 60ebb6f6-6991-434e-bfda-28d968d9d1bc - - - FreeRTOS_DNS.c - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\FreeRTOS_DNS.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 60ebb6f6-6991-434e-bfda-28d968d9d1bc - - - FreeRTOS_IP.c - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\FreeRTOS_IP.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 60ebb6f6-6991-434e-bfda-28d968d9d1bc - - - FreeRTOS_Sockets.c - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\FreeRTOS_Sockets.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 60ebb6f6-6991-434e-bfda-28d968d9d1bc - - - FreeRTOS_Stream_Buffer.c - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\FreeRTOS_Stream_Buffer.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 60ebb6f6-6991-434e-bfda-28d968d9d1bc - - - FreeRTOS_TCP_IP.c - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\FreeRTOS_TCP_IP.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 60ebb6f6-6991-434e-bfda-28d968d9d1bc - - - FreeRTOS_TCP_WIN.c - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\FreeRTOS_TCP_WIN.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 60ebb6f6-6991-434e-bfda-28d968d9d1bc - - - FreeRTOS_UDP_IP.c - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\FreeRTOS_UDP_IP.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 60ebb6f6-6991-434e-bfda-28d968d9d1bc - - - History.txt - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\History.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - 60ebb6f6-6991-434e-bfda-28d968d9d1bc - - - readme.txt - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - 60ebb6f6-6991-434e-bfda-28d968d9d1bc - - - ReadMe.url - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\ReadMe.url - 60ebb6f6-6991-434e-bfda-28d968d9d1bc - - - BufferManagement - Category - b9cf09d6-c354-4bbd-b03a-ed3fa51b2831 - - - Compiler - Category - b9cf09d6-c354-4bbd-b03a-ed3fa51b2831 - - - NetworkInterface - Category - b9cf09d6-c354-4bbd-b03a-ed3fa51b2831 - - - BufferAllocation_2.c - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\portable\BufferManagement\BufferAllocation_2.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - caf2723b-e8bb-4c20-82e2-1003d498e1e8 - - - Renesas - Category - 25e319ab-53e7-42bc-9d20-64aa3d1e4d40 - - - pack_struct_end.h - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\portable\Compiler\Renesas\pack_struct_end.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 703462c4-859e-4b5b-bd5f-b062d8a5b68f - - - pack_struct_start.h - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\portable\Compiler\Renesas\pack_struct_start.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 703462c4-859e-4b5b-bd5f-b062d8a5b68f - - - RX - Category - f3248079-4012-42af-99e1-25463715baef - - - README_DRIVER_DISCLAIMER.txt - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\portable\NetworkInterface\README_DRIVER_DISCLAIMER.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - f3248079-4012-42af-99e1-25463715baef - - - ether_callback.c - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\portable\NetworkInterface\RX\ether_callback.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 6d0225ac-cb6d-4921-a45a-8cc244ada87a - - - NetworkInterface.c - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\portable\NetworkInterface\RX\NetworkInterface.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 6d0225ac-cb6d-4921-a45a-8cc244ada87a - - - aws_greengrass_discovery.c - File - ..\..\..\..\lib\greengrass\aws_greengrass_discovery.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 27cd59ef-cea9-4b73-8a03-6dbf756e2153 - - - aws_helper_secure_connect.c - File - ..\..\..\..\lib\greengrass\aws_helper_secure_connect.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 27cd59ef-cea9-4b73-8a03-6dbf756e2153 - - - private - Category - 07820263-c65e-47e8-ad5c-7fc4eb669938 - - - aws_appversion32.h - File - ..\..\..\..\lib\include\aws_appversion32.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 07820263-c65e-47e8-ad5c-7fc4eb669938 - - - aws_crypto.h - File - ..\..\..\..\lib\include\aws_crypto.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 07820263-c65e-47e8-ad5c-7fc4eb669938 - - - aws_greengrass_discovery.h - File - ..\..\..\..\lib\include\aws_greengrass_discovery.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 07820263-c65e-47e8-ad5c-7fc4eb669938 - - - aws_mqtt_agent.h - File - ..\..\..\..\lib\include\aws_mqtt_agent.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 07820263-c65e-47e8-ad5c-7fc4eb669938 - - - aws_mqtt_lib.h - File - ..\..\..\..\lib\include\aws_mqtt_lib.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 07820263-c65e-47e8-ad5c-7fc4eb669938 - - - aws_ota_agent.h - File - ..\..\..\..\lib\include\aws_ota_agent.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 07820263-c65e-47e8-ad5c-7fc4eb669938 - - - aws_pkcs11.h - File - ..\..\..\..\lib\include\aws_pkcs11.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 07820263-c65e-47e8-ad5c-7fc4eb669938 - - - aws_secure_sockets.h - File - ..\..\..\..\lib\include\aws_secure_sockets.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 07820263-c65e-47e8-ad5c-7fc4eb669938 - - - aws_shadow.h - File - ..\..\..\..\lib\include\aws_shadow.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 07820263-c65e-47e8-ad5c-7fc4eb669938 - - - aws_system_init.h - File - ..\..\..\..\lib\include\aws_system_init.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 07820263-c65e-47e8-ad5c-7fc4eb669938 - - - aws_tls.h - File - ..\..\..\..\lib\include\aws_tls.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 07820263-c65e-47e8-ad5c-7fc4eb669938 - - - aws_wifi.h - File - ..\..\..\..\lib\include\aws_wifi.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 07820263-c65e-47e8-ad5c-7fc4eb669938 - - - event_groups.h - File - ..\..\..\..\lib\include\event_groups.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 07820263-c65e-47e8-ad5c-7fc4eb669938 - - - FreeRTOS.h - File - ..\..\..\..\lib\include\FreeRTOS.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 07820263-c65e-47e8-ad5c-7fc4eb669938 - - - message_buffer.h - File - ..\..\..\..\lib\include\message_buffer.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 07820263-c65e-47e8-ad5c-7fc4eb669938 - - - queue.h - File - ..\..\..\..\lib\include\queue.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 07820263-c65e-47e8-ad5c-7fc4eb669938 - - - semphr.h - File - ..\..\..\..\lib\include\semphr.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 07820263-c65e-47e8-ad5c-7fc4eb669938 - - - stream_buffer.h - File - ..\..\..\..\lib\include\stream_buffer.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 07820263-c65e-47e8-ad5c-7fc4eb669938 - - - task.h - File - ..\..\..\..\lib\include\task.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 07820263-c65e-47e8-ad5c-7fc4eb669938 - - - timers.h - File - ..\..\..\..\lib\include\timers.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 07820263-c65e-47e8-ad5c-7fc4eb669938 - - - aws_bufferpool.h - File - ..\..\..\..\lib\include\private\aws_bufferpool.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - aws_default_root_certificates.h - File - ..\..\..\..\lib\include\private\aws_default_root_certificates.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - aws_doubly_linked_list.h - File - ..\..\..\..\lib\include\private\aws_doubly_linked_list.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - aws_ggd_config_defaults.h - File - ..\..\..\..\lib\include\private\aws_ggd_config_defaults.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - aws_helper_secure_connect.h - File - ..\..\..\..\lib\include\private\aws_helper_secure_connect.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - aws_lib_init.h - File - ..\..\..\..\lib\include\private\aws_lib_init.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - aws_mqtt_agent_config_defaults.h - File - ..\..\..\..\lib\include\private\aws_mqtt_agent_config_defaults.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - aws_mqtt_buffer.h - File - ..\..\..\..\lib\include\private\aws_mqtt_buffer.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - aws_mqtt_config_defaults.h - File - ..\..\..\..\lib\include\private\aws_mqtt_config_defaults.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - aws_ota_agent_internal.h - File - ..\..\..\..\lib\include\private\aws_ota_agent_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - aws_ota_cbor_internal.h - File - ..\..\..\..\lib\include\private\aws_ota_cbor_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - aws_ota_cbor.h - File - ..\..\..\..\lib\include\private\aws_ota_cbor.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - aws_ota_pal.h - File - ..\..\..\..\lib\include\private\aws_ota_pal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - aws_ota_types.h - File - ..\..\..\..\lib\include\private\aws_ota_types.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - aws_secure_sockets_config_defaults.h - File - ..\..\..\..\lib\include\private\aws_secure_sockets_config_defaults.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - aws_shadow_config_defaults.h - File - ..\..\..\..\lib\include\private\aws_shadow_config_defaults.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - aws_shadow_json.h - File - ..\..\..\..\lib\include\private\aws_shadow_json.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - deprecated_definitions.h - File - ..\..\..\..\lib\include\private\deprecated_definitions.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - list.h - File - ..\..\..\..\lib\include\private\list.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - mpu_wrappers.h - File - ..\..\..\..\lib\include\private\mpu_wrappers.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - portable.h - File - ..\..\..\..\lib\include\private\portable.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - projdefs.h - File - ..\..\..\..\lib\include\private\projdefs.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - stack_macros.h - File - ..\..\..\..\lib\include\private\stack_macros.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - threading_alt.h - File - ..\..\..\..\lib\include\private\threading_alt.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42f7561a-0a86-4458-8ff7-2c15d4b2d8ae - - - aws_mqtt_agent.c - File - ..\..\..\..\lib\mqtt\aws_mqtt_agent.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 5eb151b5-a01d-401e-87dd-e6334955b8c0 - - - aws_mqtt_lib.c - File - ..\..\..\..\lib\mqtt\aws_mqtt_lib.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 5eb151b5-a01d-401e-87dd-e6334955b8c0 - - - aws_pkcs11_mbedtls.c - File - ..\..\..\..\lib\pkcs11\mbedtls\aws_pkcs11_mbedtls.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - c7e2bc78-665a-459d-be65-b6f8ee57550e - - - aws_pkcs11_pal.c - File - ..\..\..\..\lib\pkcs11\portable\renesas\rx64m-gr-kaede\aws_pkcs11_pal.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - c7e2bc78-665a-459d-be65-b6f8ee57550e - - - aws_secure_sockets.c - File - ..\..\..\..\lib\secure_sockets\portable\renesas\rx64m-gr-kaede\aws_secure_sockets.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - cd19b677-ae63-4b5c-a021-f9bac93be77c - - - aws_shadow.c - File - ..\..\..\..\lib\shadow\aws_shadow.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 92dd5f18-f7df-4520-b321-1901e8205735 - - - aws_shadow_json.c - File - ..\..\..\..\lib\shadow\aws_shadow_json.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 92dd5f18-f7df-4520-b321-1901e8205735 - - - aws_tls.c - File - ..\..\..\..\lib\tls\aws_tls.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 6f9f5b42-1018-427f-b251-8ecadea1345c - - - aws_system_init.c - File - ..\..\..\..\lib\utils\aws_system_init.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - bacfe5ea-46dd-46ec-9fb9-4c5f5e2f8d89 - - - jsmn - Category - a7a08570-fe96-47d3-b900-a62960cc7c3c - - - mbedtls - Category - a7a08570-fe96-47d3-b900-a62960cc7c3c - - - mcu_vendor - Category - a7a08570-fe96-47d3-b900-a62960cc7c3c - - - pkcs11 - Category - a7a08570-fe96-47d3-b900-a62960cc7c3c - - - tinycbor - Category - a7a08570-fe96-47d3-b900-a62960cc7c3c - - - jsmn.c - File - ..\..\..\..\lib\third_party\jsmn\jsmn.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - dafdaf97-2118-4aa5-8c0e-3dde51f51d12 - - - jsmn.h - File - ..\..\..\..\lib\third_party\jsmn\jsmn.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - dafdaf97-2118-4aa5-8c0e-3dde51f51d12 - - - include - Category - f81f2056-d6d7-4983-937a-e52659407146 - - - library - Category - f81f2056-d6d7-4983-937a-e52659407146 - - - LICENSE - File - ..\..\..\..\lib\third_party\mbedtls\LICENSE - f81f2056-d6d7-4983-937a-e52659407146 - - - mbedtls - Category - 004f756a-4262-44aa-ac6d-f385da3c3db9 - - - aes.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\aes.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - aesni.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\aesni.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - arc4.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\arc4.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - asn1.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\asn1.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - asn1write.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\asn1write.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - base64.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\base64.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - bignum.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\bignum.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - blowfish.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\blowfish.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - bn_mul.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\bn_mul.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - camellia.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\camellia.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - ccm.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ccm.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - certs.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\certs.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - check_config.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\check_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - cipher.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\cipher.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - cipher_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\cipher_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - cmac.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\cmac.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - compat-1.3.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\compat-1.3.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - config.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - ctr_drbg.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ctr_drbg.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - debug.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\debug.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - des.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\des.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - dhm.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\dhm.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - ecdh.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ecdh.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - ecdsa.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ecdsa.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - ecjpake.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ecjpake.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - ecp.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ecp.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - ecp_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ecp_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - entropy.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\entropy.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - entropy_poll.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\entropy_poll.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - error.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\error.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - gcm.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\gcm.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - havege.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\havege.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - hmac_drbg.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\hmac_drbg.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - md.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\md.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - md2.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\md2.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - md4.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\md4.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - md5.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\md5.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - md_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\md_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - memory_buffer_alloc.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\memory_buffer_alloc.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - net.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\net.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - net_sockets.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\net_sockets.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - oid.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\oid.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - padlock.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\padlock.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - pem.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\pem.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - pk.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\pk.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - pkcs12.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\pkcs12.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - pkcs5.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\pkcs5.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - pk_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\pk_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - platform.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\platform.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - platform_time.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\platform_time.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - platform_util.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\platform_util.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - ripemd160.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ripemd160.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - rsa_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\rsa_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - rsa.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\rsa.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - sha1.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\sha1.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - sha256.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\sha256.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - sha512.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\sha512.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - ssl.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - ssl_cache.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl_cache.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - ssl_ciphersuites.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl_ciphersuites.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - ssl_cookie.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl_cookie.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - ssl_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - ssl_ticket.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl_ticket.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - threading.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\threading.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - timing.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\timing.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - version.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\version.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - x509.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\x509.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - x509_crl.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\x509_crl.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - x509_crt.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\x509_crt.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - x509_csr.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\x509_csr.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - xtea.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\xtea.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca14b23a-5b92-4ea6-b133-4823e78891b7 - - - aes.c - File - ..\..\..\..\lib\third_party\mbedtls\library\aes.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - aesni.c - File - ..\..\..\..\lib\third_party\mbedtls\library\aesni.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - arc4.c - File - ..\..\..\..\lib\third_party\mbedtls\library\arc4.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - asn1parse.c - File - ..\..\..\..\lib\third_party\mbedtls\library\asn1parse.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - asn1write.c - File - ..\..\..\..\lib\third_party\mbedtls\library\asn1write.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - base64.c - File - ..\..\..\..\lib\third_party\mbedtls\library\base64.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - bignum.c - File - ..\..\..\..\lib\third_party\mbedtls\library\bignum.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - blowfish.c - File - ..\..\..\..\lib\third_party\mbedtls\library\blowfish.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - camellia.c - File - ..\..\..\..\lib\third_party\mbedtls\library\camellia.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - ccm.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ccm.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - certs.c - File - ..\..\..\..\lib\third_party\mbedtls\library\certs.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - cipher.c - File - ..\..\..\..\lib\third_party\mbedtls\library\cipher.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - cipher_wrap.c - File - ..\..\..\..\lib\third_party\mbedtls\library\cipher_wrap.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - cmac.c - File - ..\..\..\..\lib\third_party\mbedtls\library\cmac.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - ctr_drbg.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ctr_drbg.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - debug.c - File - ..\..\..\..\lib\third_party\mbedtls\library\debug.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - des.c - File - ..\..\..\..\lib\third_party\mbedtls\library\des.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - dhm.c - File - ..\..\..\..\lib\third_party\mbedtls\library\dhm.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - ecdh.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ecdh.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - ecdsa.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ecdsa.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - ecjpake.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ecjpake.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - ecp.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ecp.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - ecp_curves.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ecp_curves.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - entropy.c - File - ..\..\..\..\lib\third_party\mbedtls\library\entropy.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - entropy_poll.c - File - ..\..\..\..\lib\third_party\mbedtls\library\entropy_poll.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - error.c - File - ..\..\..\..\lib\third_party\mbedtls\library\error.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - gcm.c - File - ..\..\..\..\lib\third_party\mbedtls\library\gcm.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - havege.c - File - ..\..\..\..\lib\third_party\mbedtls\library\havege.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - hmac_drbg.c - File - ..\..\..\..\lib\third_party\mbedtls\library\hmac_drbg.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - md.c - File - ..\..\..\..\lib\third_party\mbedtls\library\md.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - md2.c - File - ..\..\..\..\lib\third_party\mbedtls\library\md2.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - md4.c - File - ..\..\..\..\lib\third_party\mbedtls\library\md4.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - md5.c - File - ..\..\..\..\lib\third_party\mbedtls\library\md5.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - md_wrap.c - File - ..\..\..\..\lib\third_party\mbedtls\library\md_wrap.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - memory_buffer_alloc.c - File - ..\..\..\..\lib\third_party\mbedtls\library\memory_buffer_alloc.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - net_sockets.c - File - ..\..\..\..\lib\third_party\mbedtls\library\net_sockets.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - oid.c - File - ..\..\..\..\lib\third_party\mbedtls\library\oid.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - padlock.c - File - ..\..\..\..\lib\third_party\mbedtls\library\padlock.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - pem.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pem.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - pk.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pk.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - pkcs12.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pkcs12.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - pkcs5.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pkcs5.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - pkparse.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pkparse.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - pkwrite.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pkwrite.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - pk_wrap.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pk_wrap.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - platform.c - File - ..\..\..\..\lib\third_party\mbedtls\library\platform.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - platform_util.c - File - ..\..\..\..\lib\third_party\mbedtls\library\platform_util.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - ripemd160.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ripemd160.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - rsa_internal.c - File - ..\..\..\..\lib\third_party\mbedtls\library\rsa_internal.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - rsa.c - File - ..\..\..\..\lib\third_party\mbedtls\library\rsa.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - sha1.c - File - ..\..\..\..\lib\third_party\mbedtls\library\sha1.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - sha256.c - File - ..\..\..\..\lib\third_party\mbedtls\library\sha256.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - sha512.c - File - ..\..\..\..\lib\third_party\mbedtls\library\sha512.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - ssl_cache.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_cache.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - ssl_ciphersuites.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_ciphersuites.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - ssl_cli.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_cli.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - ssl_cookie.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_cookie.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - ssl_srv.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_srv.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - ssl_ticket.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_ticket.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - ssl_tls.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_tls.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9db0dc2d-a442-481d-9c9e-20c04958224f - - - threading.c - File - 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ref - Category - 7901ca1e-4316-48b0-ac7f-9ebcaf81017b - - - src - Category - 7901ca1e-4316-48b0-ac7f-9ebcaf81017b - - - r_byteq_if.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_byteq\r_byteq_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 7901ca1e-4316-48b0-ac7f-9ebcaf81017b - - - readme.txt - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_byteq\readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - 7901ca1e-4316-48b0-ac7f-9ebcaf81017b - - - r01an1683jj0160_rx.pdf - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_byteq\doc\r01an1683jj0160_rx.pdf - 7668824f-e36e-4bf1-9e58-9b6a6683de6f - - - r_byteq_config_reference.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_byteq\ref\r_byteq_config_reference.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 6a476ea1-1bfd-4a3b-8068-edc4bd1f8424 - - - r_byteq.c - File - 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167aabda-67d5-4bca-8f38-141557481bc3 - - - flash_type_4 - Category - 167aabda-67d5-4bca-8f38-141557481bc3 - - - r_flash_fcu.c - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_flash_rx\src\r_flash_fcu.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 167aabda-67d5-4bca-8f38-141557481bc3 - - - r_flash_fcu.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_flash_rx\src\r_flash_fcu.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 167aabda-67d5-4bca-8f38-141557481bc3 - - - r_flash_group.c - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_flash_rx\src\r_flash_group.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 167aabda-67d5-4bca-8f38-141557481bc3 - - - r_flash_group.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_flash_rx\src\r_flash_group.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 167aabda-67d5-4bca-8f38-141557481bc3 - - - r_flash_rx.c - File - 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..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_s12ad_rx\src\r_s12ad_rx.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 328e8608-86b4-4892-b33f-cfa961833380 - - - r_s12ad_rx_private.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_s12ad_rx\src\r_s12ad_rx_private.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 328e8608-86b4-4892-b33f-cfa961833380 - - - targets - Category - 328e8608-86b4-4892-b33f-cfa961833380 - - - rx64m - Category - 2cabae9f-9ffc-450b-8b79-92d8ff91cb54 - - - r_s12ad_rx64m.c - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_s12ad_rx\src\targets\rx64m\r_s12ad_rx64m.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 10bf7e21-8ff3-4745-b2a6-05f6f4662494 - - - r_s12ad_rx64m_if.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_s12ad_rx\src\targets\rx64m\r_s12ad_rx64m_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 10bf7e21-8ff3-4745-b2a6-05f6f4662494 - - - general - Category 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ff981303-d0ea-4a34-b27b-c268915d1ddc - - - r_smc_cgc.c - File - src\smc_gen\general\r_smc_cgc.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ff981303-d0ea-4a34-b27b-c268915d1ddc - - - r_smc_cgc.h - File - src\smc_gen\general\r_smc_cgc.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff981303-d0ea-4a34-b27b-c268915d1ddc - - - r_smc_cgc_user.c - File - src\smc_gen\general\r_smc_cgc_user.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ff981303-d0ea-4a34-b27b-c268915d1ddc - - - r_smc_entry.h - File - src\smc_gen\general\r_smc_entry.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff981303-d0ea-4a34-b27b-c268915d1ddc - - - r_smc_interrupt.c - File - src\smc_gen\general\r_smc_interrupt.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ff981303-d0ea-4a34-b27b-c268915d1ddc - - - r_smc_interrupt.h - File - src\smc_gen\general\r_smc_interrupt.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ff981303-d0ea-4a34-b27b-c268915d1ddc - - - platform.h - File - src\smc_gen\r_bsp\platform.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - d3c1a442-933e-45f6-985f-d01994b2563a - - - readme.txt - File - src\smc_gen\r_bsp\readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - d3c1a442-933e-45f6-985f-d01994b2563a - - - board - Category - d3c1a442-933e-45f6-985f-d01994b2563a - - - doc - Category - d3c1a442-933e-45f6-985f-d01994b2563a - - - mcu - Category - d3c1a442-933e-45f6-985f-d01994b2563a - - - generic_rx64m - Category - fb889c49-9290-44bd-a0f7-806d4cf071ad - - - user - Category - fb889c49-9290-44bd-a0f7-806d4cf071ad - - - dbsct.c - File - src\smc_gen\r_bsp\board\generic_rx64m\dbsct.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 5f221ee3-2faa-470c-b958-b34d526f24c3 - - - hwsetup.c - File - src\smc_gen\r_bsp\board\generic_rx64m\hwsetup.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 5f221ee3-2faa-470c-b958-b34d526f24c3 - - - hwsetup.h - File - src\smc_gen\r_bsp\board\generic_rx64m\hwsetup.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 5f221ee3-2faa-470c-b958-b34d526f24c3 - - - lowlvl.c - File - src\smc_gen\r_bsp\board\generic_rx64m\lowlvl.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 5f221ee3-2faa-470c-b958-b34d526f24c3 - - - lowsrc.c - File - src\smc_gen\r_bsp\board\generic_rx64m\lowsrc.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 5f221ee3-2faa-470c-b958-b34d526f24c3 - - - lowsrc.h - File - src\smc_gen\r_bsp\board\generic_rx64m\lowsrc.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 5f221ee3-2faa-470c-b958-b34d526f24c3 - - - resetprg.c - File - src\smc_gen\r_bsp\board\generic_rx64m\resetprg.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 5f221ee3-2faa-470c-b958-b34d526f24c3 - - - r_bsp.h - File - src\smc_gen\r_bsp\board\generic_rx64m\r_bsp.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 5f221ee3-2faa-470c-b958-b34d526f24c3 - - - r_bsp_config_reference.h - File - src\smc_gen\r_bsp\board\generic_rx64m\r_bsp_config_reference.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 5f221ee3-2faa-470c-b958-b34d526f24c3 - - - r_bsp_interrupt_config_reference.h - File - src\smc_gen\r_bsp\board\generic_rx64m\r_bsp_interrupt_config_reference.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 5f221ee3-2faa-470c-b958-b34d526f24c3 - - - sbrk.c - File - src\smc_gen\r_bsp\board\generic_rx64m\sbrk.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 5f221ee3-2faa-470c-b958-b34d526f24c3 - - - vecttbl.c - File - src\smc_gen\r_bsp\board\generic_rx64m\vecttbl.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 5f221ee3-2faa-470c-b958-b34d526f24c3 - - - vecttbl.h - File - src\smc_gen\r_bsp\board\generic_rx64m\vecttbl.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 5f221ee3-2faa-470c-b958-b34d526f24c3 - - - r_bsp.h - File - src\smc_gen\r_bsp\board\user\r_bsp.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - a78e68bf-c5a8-4f45-b0ba-4d02c2e9389e - - - en - Category - bdb956b4-e312-46fe-afbf-f75558bf2df5 - - - ja - Category - bdb956b4-e312-46fe-afbf-f75558bf2df5 - - - r01an1685ej0380-rx.pdf - File - src\smc_gen\r_bsp\doc\en\r01an1685ej0380-rx.pdf - 4d3b9d8b-dbcc-43ad-a97c-df0e9c50c7e4 - - - r01an1685jj0380-rx.pdf - File - src\smc_gen\r_bsp\doc\ja\r01an1685jj0380-rx.pdf - 19b9518a-3d71-4f07-abe4-70d2f2360788 - - - all - Category - 6715da3a-68e0-4bce-94ab-aac93d2da647 - - - rx64m - Category - 6715da3a-68e0-4bce-94ab-aac93d2da647 - - - r_bsp_common.c - File - src\smc_gen\r_bsp\mcu\all\r_bsp_common.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 46f1620e-6ace-488a-abe4-a4146c38d613 - - - r_bsp_common.h - File - src\smc_gen\r_bsp\mcu\all\r_bsp_common.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 46f1620e-6ace-488a-abe4-a4146c38d613 - - - r_typedefs.h - File - src\smc_gen\r_bsp\mcu\all\r_typedefs.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 46f1620e-6ace-488a-abe4-a4146c38d613 - - - cpu.c - File - src\smc_gen\r_bsp\mcu\rx64m\cpu.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 28d411de-2f0c-45d9-b69c-052c6ec5554e - - - cpu.h - File - src\smc_gen\r_bsp\mcu\rx64m\cpu.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 28d411de-2f0c-45d9-b69c-052c6ec5554e - - - locking.c - File - src\smc_gen\r_bsp\mcu\rx64m\locking.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 28d411de-2f0c-45d9-b69c-052c6ec5554e - - - locking.h - File - src\smc_gen\r_bsp\mcu\rx64m\locking.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 28d411de-2f0c-45d9-b69c-052c6ec5554e - - - mcu_clocks.c - File - src\smc_gen\r_bsp\mcu\rx64m\mcu_clocks.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 28d411de-2f0c-45d9-b69c-052c6ec5554e - - - mcu_info.h - File - src\smc_gen\r_bsp\mcu\rx64m\mcu_info.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 28d411de-2f0c-45d9-b69c-052c6ec5554e - - - mcu_init.c - File - src\smc_gen\r_bsp\mcu\rx64m\mcu_init.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 28d411de-2f0c-45d9-b69c-052c6ec5554e - - - mcu_init.h - File - src\smc_gen\r_bsp\mcu\rx64m\mcu_init.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 28d411de-2f0c-45d9-b69c-052c6ec5554e - - - mcu_interrupts.c - File - src\smc_gen\r_bsp\mcu\rx64m\mcu_interrupts.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 28d411de-2f0c-45d9-b69c-052c6ec5554e - - - mcu_interrupts.h - File - src\smc_gen\r_bsp\mcu\rx64m\mcu_interrupts.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 28d411de-2f0c-45d9-b69c-052c6ec5554e - - - mcu_locks.c - File - src\smc_gen\r_bsp\mcu\rx64m\mcu_locks.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 28d411de-2f0c-45d9-b69c-052c6ec5554e - - - mcu_locks.h - File - src\smc_gen\r_bsp\mcu\rx64m\mcu_locks.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 28d411de-2f0c-45d9-b69c-052c6ec5554e - - - mcu_mapped_interrupts.c - File - src\smc_gen\r_bsp\mcu\rx64m\mcu_mapped_interrupts.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 28d411de-2f0c-45d9-b69c-052c6ec5554e - - - mcu_mapped_interrupts.h - File - src\smc_gen\r_bsp\mcu\rx64m\mcu_mapped_interrupts.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 28d411de-2f0c-45d9-b69c-052c6ec5554e - - - mcu_mapped_interrupts_private.h - File - src\smc_gen\r_bsp\mcu\rx64m\mcu_mapped_interrupts_private.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 28d411de-2f0c-45d9-b69c-052c6ec5554e - - - mcu_startup.c - File - src\smc_gen\r_bsp\mcu\rx64m\mcu_startup.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 28d411de-2f0c-45d9-b69c-052c6ec5554e - - - mcu_startup.h - File - src\smc_gen\r_bsp\mcu\rx64m\mcu_startup.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 28d411de-2f0c-45d9-b69c-052c6ec5554e - - - register_access - Category - 28d411de-2f0c-45d9-b69c-052c6ec5554e - - - iodefine.h - File - src\smc_gen\r_bsp\mcu\rx64m\register_access\iodefine.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - e95f4a23-8303-484f-bb8d-6e2dcfb2e3e1 - - - readme.txt - File - src\smc_gen\r_byteq\readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - d62d08b0-e8c5-4994-aace-dc550a9cb4b1 - - - r_byteq_if.h - File - src\smc_gen\r_byteq\r_byteq_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - d62d08b0-e8c5-4994-aace-dc550a9cb4b1 - - - doc - Category - d62d08b0-e8c5-4994-aace-dc550a9cb4b1 - - - ref - Category - d62d08b0-e8c5-4994-aace-dc550a9cb4b1 - - - src - Category - d62d08b0-e8c5-4994-aace-dc550a9cb4b1 - - - r01an1683jj0160_rx.pdf - File - src\smc_gen\r_byteq\doc\r01an1683jj0160_rx.pdf - e6f43043-1ecf-43e1-aa4e-79d2348a81ab - - - r_byteq_config_reference.h - File - src\smc_gen\r_byteq\ref\r_byteq_config_reference.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 67e7ce0f-4b35-4877-8693-2fbe27288f31 - - - r_byteq.c - File - src\smc_gen\r_byteq\src\r_byteq.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 38386875-70b8-4561-8078-46a976286a28 - - - r_byteq_private.h - File - src\smc_gen\r_byteq\src\r_byteq_private.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 38386875-70b8-4561-8078-46a976286a28 - - - r_bsp_config.h - File - src\smc_gen\r_config\r_bsp_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 0c9c4ee4-3283-4d88-af8f-8dc3dd08e885 - - - r_bsp_config_readme.txt - File - src\smc_gen\r_config\r_bsp_config_readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - 0c9c4ee4-3283-4d88-af8f-8dc3dd08e885 - - - r_bsp_interrupt_config.h - File - src\smc_gen\r_config\r_bsp_interrupt_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 0c9c4ee4-3283-4d88-af8f-8dc3dd08e885 - - - r_ether_rx_config.h - File - src\smc_gen\r_config\r_ether_rx_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 0c9c4ee4-3283-4d88-af8f-8dc3dd08e885 - - - r_flash_rx_config.h - File - src\smc_gen\r_config\r_flash_rx_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 0c9c4ee4-3283-4d88-af8f-8dc3dd08e885 - - - r_byteq_config.h - File - src\smc_gen\r_config\r_byteq_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 0c9c4ee4-3283-4d88-af8f-8dc3dd08e885 - - - r_sci_rx_config.h - File - src\smc_gen\r_config\r_sci_rx_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 0c9c4ee4-3283-4d88-af8f-8dc3dd08e885 - - - r_s12ad_rx_config.h - File - src\smc_gen\r_config\r_s12ad_rx_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 0c9c4ee4-3283-4d88-af8f-8dc3dd08e885 - - - readme.txt - File - src\smc_gen\r_ether_rx\readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - a9cadd73-0a42-41a1-a8d8-55148edb9029 - - - r_ether_rx_if.h - File - src\smc_gen\r_ether_rx\r_ether_rx_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - a9cadd73-0a42-41a1-a8d8-55148edb9029 - - - doc - Category - a9cadd73-0a42-41a1-a8d8-55148edb9029 - - - ref - Category - a9cadd73-0a42-41a1-a8d8-55148edb9029 - - - src - Category - a9cadd73-0a42-41a1-a8d8-55148edb9029 - - - en - Category - 74c764f2-629b-4240-a7e5-0c9292214fe8 - - - ja - Category - 74c764f2-629b-4240-a7e5-0c9292214fe8 - - - r01an2009ej0115-rx.pdf - File - src\smc_gen\r_ether_rx\doc\en\r01an2009ej0115-rx.pdf - d22c0c64-da9a-4ade-844d-1f3c7d0703f8 - - - r01an2009jj0115-rx.pdf - File - src\smc_gen\r_ether_rx\doc\ja\r01an2009jj0115-rx.pdf - a4bb7665-301c-4b24-955b-c8ceb4e1db68 - - - r_ether_rx_config_reference.h - File - src\smc_gen\r_ether_rx\ref\r_ether_rx_config_reference.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - dbd69e66-11b9-4445-962a-0a8c8116ba10 - - - r_ether_rx.c - File - src\smc_gen\r_ether_rx\src\r_ether_rx.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 29da55cd-6ca1-4b06-9126-fcc066013972 - - - r_ether_rx_private.h - File - src\smc_gen\r_ether_rx\src\r_ether_rx_private.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 29da55cd-6ca1-4b06-9126-fcc066013972 - - - phy - Category - 29da55cd-6ca1-4b06-9126-fcc066013972 - - - targets - Category - 29da55cd-6ca1-4b06-9126-fcc066013972 - - - phy.c - File - src\smc_gen\r_ether_rx\src\phy\phy.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - f8f4a249-0dde-4756-9230-b9a2ba4cc23e - - - phy.h - File - src\smc_gen\r_ether_rx\src\phy\phy.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - f8f4a249-0dde-4756-9230-b9a2ba4cc23e - - - rx64m - Category - 522c9668-1881-4495-97af-c02416314b28 - - - r_ether_setting_rx64m.c - File - src\smc_gen\r_ether_rx\src\targets\rx64m\r_ether_setting_rx64m.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 5d08e91f-de7c-48e5-8a57-cf4a36b808c9 - - - readme.txt - File - src\smc_gen\r_flash_rx\readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - 5432f0a2-0895-4210-83de-85cba8e1ddf1 - - - r_flash_rx_if.h - File - src\smc_gen\r_flash_rx\r_flash_rx_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 5432f0a2-0895-4210-83de-85cba8e1ddf1 - - - doc - Category - 5432f0a2-0895-4210-83de-85cba8e1ddf1 - - - ref - Category - 5432f0a2-0895-4210-83de-85cba8e1ddf1 - - - src - Category - 5432f0a2-0895-4210-83de-85cba8e1ddf1 - - - en - Category - 42bd50ed-de6b-4173-9977-0d150c3b39b9 - - - ja - Category - 42bd50ed-de6b-4173-9977-0d150c3b39b9 - - - r01an2184eu0330-rx.pdf - File - src\smc_gen\r_flash_rx\doc\en\r01an2184eu0330-rx.pdf - 4d173755-6ce4-42eb-9a86-ba2c6b098ca4 - - - r01an2184ju0330-rx.pdf - File - src\smc_gen\r_flash_rx\doc\ja\r01an2184ju0330-rx.pdf - 6823ffb8-9772-4b72-a377-7a6ec9bcd57d - - - r_flash_rx_config_reference.h - File - src\smc_gen\r_flash_rx\ref\r_flash_rx_config_reference.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - e95908a0-e5bb-4c99-a71a-f37f6ed98241 - - - r_flash_fcu.c - File - src\smc_gen\r_flash_rx\src\r_flash_fcu.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - e00c94d4-a0d6-448b-9d91-702333802d3b - - - r_flash_fcu.h - File - src\smc_gen\r_flash_rx\src\r_flash_fcu.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - e00c94d4-a0d6-448b-9d91-702333802d3b - - - r_flash_group.c - File - src\smc_gen\r_flash_rx\src\r_flash_group.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - e00c94d4-a0d6-448b-9d91-702333802d3b - - - r_flash_group.h - File - src\smc_gen\r_flash_rx\src\r_flash_group.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - e00c94d4-a0d6-448b-9d91-702333802d3b - - - r_flash_rx.c - File - src\smc_gen\r_flash_rx\src\r_flash_rx.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - e00c94d4-a0d6-448b-9d91-702333802d3b - - - r_flash_rx.h - File - src\smc_gen\r_flash_rx\src\r_flash_rx.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - e00c94d4-a0d6-448b-9d91-702333802d3b - - - r_flash_targets.h - File - src\smc_gen\r_flash_rx\src\r_flash_targets.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - e00c94d4-a0d6-448b-9d91-702333802d3b - - - flash_type_1 - Category - e00c94d4-a0d6-448b-9d91-702333802d3b - - - flash_type_2 - Category - e00c94d4-a0d6-448b-9d91-702333802d3b - - - flash_type_3 - Category - e00c94d4-a0d6-448b-9d91-702333802d3b - - - flash_type_4 - Category - e00c94d4-a0d6-448b-9d91-702333802d3b - - - targets - Category - e00c94d4-a0d6-448b-9d91-702333802d3b - - - r_codeflash.c - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_codeflash.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - bb5739fe-1b1a-4f33-a290-3db2d5d09d27 - - - r_codeflash.h - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_codeflash.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - bb5739fe-1b1a-4f33-a290-3db2d5d09d27 - - - r_codeflash_extra.c - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_codeflash_extra.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - bb5739fe-1b1a-4f33-a290-3db2d5d09d27 - - - r_codeflash_extra.h - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_codeflash_extra.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - bb5739fe-1b1a-4f33-a290-3db2d5d09d27 - - - r_dataflash.c - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_dataflash.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - bb5739fe-1b1a-4f33-a290-3db2d5d09d27 - - - r_dataflash.h - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_dataflash.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - bb5739fe-1b1a-4f33-a290-3db2d5d09d27 - - - r_flash_common.h - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_flash_common.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - bb5739fe-1b1a-4f33-a290-3db2d5d09d27 - - - r_flash_type1.c - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_flash_type1.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - bb5739fe-1b1a-4f33-a290-3db2d5d09d27 - - - r_flash_type1_if.h - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_flash_type1_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - bb5739fe-1b1a-4f33-a290-3db2d5d09d27 - - - r_flash_utils.c - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_flash_utils.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - bb5739fe-1b1a-4f33-a290-3db2d5d09d27 - - - r_flash_type2.c - File - src\smc_gen\r_flash_rx\src\flash_type_2\r_flash_type2.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 4c487da3-f588-40c4-a5f5-35007f9857e6 - - - r_flash_type2_if.h - File - src\smc_gen\r_flash_rx\src\flash_type_2\r_flash_type2_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 4c487da3-f588-40c4-a5f5-35007f9857e6 - - - r_flash_type3.c - File - src\smc_gen\r_flash_rx\src\flash_type_3\r_flash_type3.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - f5240115-cdb1-47dc-b749-b15cc74f5ab0 - - - r_flash_type3_if.h - File - src\smc_gen\r_flash_rx\src\flash_type_3\r_flash_type3_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - f5240115-cdb1-47dc-b749-b15cc74f5ab0 - - - r_flash_type4.c - File - src\smc_gen\r_flash_rx\src\flash_type_4\r_flash_type4.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 24ed1841-ca81-4437-873f-a51a5a843330 - - - r_flash_type4_if.h - File - src\smc_gen\r_flash_rx\src\flash_type_4\r_flash_type4_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 24ed1841-ca81-4437-873f-a51a5a843330 - - - rx64m - Category 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src\smc_gen\r_pincfg\r_pinset.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42232b6f-189e-475c-88f1-58ed68578366 - - - r_sci_rx_pinset.c - File - src\smc_gen\r_pincfg\r_sci_rx_pinset.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 42232b6f-189e-475c-88f1-58ed68578366 - - - r_sci_rx_pinset.h - File - src\smc_gen\r_pincfg\r_sci_rx_pinset.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 42232b6f-189e-475c-88f1-58ed68578366 - - - readme.txt - File - src\smc_gen\r_sci_rx\readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - 15f7a81c-6e84-4a0e-89fd-057f410825a8 - - - r_sci_rx_if.h - File - src\smc_gen\r_sci_rx\r_sci_rx_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 15f7a81c-6e84-4a0e-89fd-057f410825a8 - - - doc - Category - 15f7a81c-6e84-4a0e-89fd-057f410825a8 - - - ref - Category - 15f7a81c-6e84-4a0e-89fd-057f410825a8 - - - src - Category - 15f7a81c-6e84-4a0e-89fd-057f410825a8 - - - en - Category - 97221bb8-13f0-4595-9636-3e8657a9011c - - - ja - Category - 97221bb8-13f0-4595-9636-3e8657a9011c - - - r01an1815ej0201-rx.pdf - File - src\smc_gen\r_sci_rx\doc\en\r01an1815ej0201-rx.pdf - bfb4cc0c-6660-41d4-a73b-1503028fbecd - - - r01an1815jj0201-rx.pdf - File - src\smc_gen\r_sci_rx\doc\ja\r01an1815jj0201-rx.pdf - a8d681df-946e-4a55-bdda-03af16210f7f - - - r_sci_rx_config_reference.h - File - src\smc_gen\r_sci_rx\ref\r_sci_rx_config_reference.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ba3621dc-4f08-4f35-93c9-5e9897698c3f - - - r_sci_rx.c - File - src\smc_gen\r_sci_rx\src\r_sci_rx.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 946fcdb9-d768-43b0-a206-3b4953b5679d - - - r_sci_rx_platform.h - File - src\smc_gen\r_sci_rx\src\r_sci_rx_platform.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 946fcdb9-d768-43b0-a206-3b4953b5679d - - - r_sci_rx_private.h - File - src\smc_gen\r_sci_rx\src\r_sci_rx_private.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 946fcdb9-d768-43b0-a206-3b4953b5679d - - - targets - Category - 946fcdb9-d768-43b0-a206-3b4953b5679d - - - rx64m - Category - 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2147483647 - No - DivisionBy_1 - No - 1200000 - No - ExternalCoverageCpuExecution - 4 - 4290772992 - 2147483647 - 2147483647 - 2147483647 - No - False - RisingEdge - False - RisingEdge - False - 1 - False - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - - - 90536345-15c8-40cb-957c-e59974e4bf78 - - - - - C:\Renesas\AmazonFreeRTOS\amazon-freertos-1.2.2\demos\renesas\rx64m-gr-kaede\ccrx-csplus - C:\Program Files (x86)\Renesas Electronics\SmartConfigurator\RX\eclipse\SmartConfigurator.exe - e25dd63d-6159-4f8f-ac55-65d7fb7dd108 - aws_demos.scfg - - - - - 7d577131-4ec1-4e88-968d-89381f6c178a - - - - - 1.1 - - - False - False - False - True - Yes - Nanosecond - False - False - False - False - False - True - FilesNotToAnalyze - 0 - All - 0 - False - %ProjectName%.mtfl - %ProjectName%.mtvl - 10 - - - RealtimeSampling - - Synchronized - AtProgramStop - 20 - 1000000 - LineChart - False - PaleGreen - PaleTurquoise - 40ff0a4f - 405be416 - 40056def - 40ff541c - False - Auto - Channel01 - 0 - Rising - 0 - Orange - 10 - None - - - - - - - - - - - - - - - - - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - c0ff0a4f - c05be416 - c0056dff - c0ff541c - c04fc1ff - c0a932ff - c0ffd91c - c0ff30a5 - c0bee02f - c05510ff - c0ff97e4 - c0913a37 - c0c68e15 - c0317f0c - c060493e - c072808e - - - - - 8.01.00.00 - - - \ No newline at end of file diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/aws_demos.scfg b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/aws_demos.scfg deleted file mode 100644 index 82f10f23a8b..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/aws_demos.scfg +++ /dev/null @@ -1,739 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/aws_demos_build_path_check.bat b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/aws_demos_build_path_check.bat deleted file mode 100644 index 70ff37d5d85..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/aws_demos_build_path_check.bat +++ /dev/null @@ -1,11 +0,0 @@ -@echo off -rem ################################################################################ -rem # This batch file executes some preprocess for build -rem ################################################################################ - -if not exist "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" ( - echo ERROR: Unable to find "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" - exit 2 -) - -"%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" %* diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/aws_demos_link_order_import.mtls b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/aws_demos_link_order_import.mtls deleted file mode 100644 index 818fd5d5c54..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/aws_demos_link_order_import.mtls +++ /dev/null @@ -1,174 +0,0 @@ -port_asm.obj -aws_demo_runner.obj -aws_dev_mode_key_provisioning.obj -aws_greengrass_discovery_demo.obj -aws_hello_world.obj -aws_logging_task_dynamic_buffers.obj -aws_ota_update_demo.obj -aws_shadow_lightbulb_on_off.obj -aws_subscribe_publish_loop.obj -aws_tcp_echo_client_separate_tasks.obj -aws_tcp_echo_client_single_task.obj -main.obj -event_groups.obj -list.obj -heap_4.obj -port.obj -queue.obj -stream_buffer.obj -tasks.obj -timers.obj -FreeRTOS_ARP.obj -FreeRTOS_DHCP.obj -FreeRTOS_DNS.obj -FreeRTOS_IP.obj -FreeRTOS_Sockets.obj -FreeRTOS_Stream_Buffer.obj -FreeRTOS_TCP_IP.obj -FreeRTOS_TCP_WIN.obj -FreeRTOS_UDP_IP.obj -BufferAllocation_2.obj -NetworkInterface.obj -ether_callback.obj -aws_bufferpool_static_thread_safe.obj -aws_crypto.obj -aws_greengrass_discovery.obj -aws_helper_secure_connect.obj -aws_mqtt_agent.obj -aws_mqtt_lib.obj -aws_ota_agent.obj -aws_ota_cbor.obj -aws_ota_pal.obj -aws_pkcs11_mbedtls.obj -aws_pkcs11_pal.obj -aws_secure_sockets.obj -aws_shadow.obj -aws_shadow_json.obj -aws_tls.obj -aws_system_init.obj -jsmn.obj -aes.obj -aesni.obj -arc4.obj -asn1parse.obj -asn1write.obj -base64.obj -bignum.obj -blowfish.obj -camellia.obj -ccm.obj -certs.obj -cipher.obj -cipher_wrap.obj -cmac.obj -ctr_drbg.obj -debug.obj -des.obj -dhm.obj -ecdh.obj -ecdsa.obj -ecjpake.obj -ecp.obj -ecp_curves.obj -entropy.obj -entropy_poll.obj -error.obj -gcm.obj -havege.obj -hmac_drbg.obj -md.obj -md2.obj -md4.obj -md5.obj -md_wrap.obj -memory_buffer_alloc.obj -net_sockets.obj -oid.obj -padlock.obj -pem.obj -pk.obj -pk_wrap.obj -pkcs12.obj -pkcs5.obj -pkparse.obj -pkwrite.obj -platform.obj -platform_util.obj -ripemd160.obj -rsa.obj -rsa_internal.obj -sha1.obj -sha256.obj -sha512.obj -ssl_cache.obj -ssl_ciphersuites.obj -ssl_cli.obj -ssl_cookie.obj -ssl_srv.obj -ssl_ticket.obj -ssl_tls.obj -threading.obj -timing.obj -version.obj -version_features.obj -x509.obj -x509_create.obj -x509_crl.obj -x509_crt.obj -x509_csr.obj -x509write_crt.obj -x509write_csr.obj -xtea.obj -cborencoder.obj -cborencoder_close_container_checked.obj -cborerrorstrings.obj -cborparser.obj -cborparser_dup_string.obj -cborpretty.obj -dbsct.obj -lowlvl.obj -lowsrc.obj -resetprg.obj -sbrk.obj -r_bsp_hwsetup_reference.obj -clkconf.obj -vecttbl.obj -r_bsp_common.obj -cpu.obj -locking.obj -mcu_clocks.obj -mcu_init.obj -mcu_interrupts.obj -mcu_locks.obj -mcu_mapped_interrupts.obj -mcu_startup.obj -r_byteq.obj -phy.obj -r_ether_rx.obj -r_ether_setting_rx64m.obj -r_codeflash.obj -r_codeflash_extra.obj -r_dataflash.obj -r_flash_type1.obj -r_flash_utils.obj -r_flash_type2.obj -r_flash_type3.obj -r_flash_type4.obj -r_flash_fcu.obj -r_flash_group.obj -r_flash_rx.obj -r_sci_rx.obj -r_sci_rx64m.obj -r_sci_rx64m_data.obj -exit.obj -entropy_hardware_poll.obj -freertos_start.obj -freertos_ip_hook.obj -serial_term_uart.obj -r_cg_hardware_setup.obj -r_smc_cgc.obj -r_smc_cgc_user.obj -r_smc_interrupt.obj -Pin.obj -r_ether_rx_pinset.obj -r_sci_rx_pinset.obj diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/attention!.txt b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/attention!.txt deleted file mode 100644 index eebc694d16c..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/attention!.txt +++ /dev/null @@ -1,32 +0,0 @@ -Please note that the following folders in the project window of IDEs are -so called 'linked' folders. - --------------------------------------------- -Linked folders in the project window of IDEs --------------------------------------------- - -src/FIT_modified_code/r_bsp -src/FIT_modified_code/r_byteq -src/FIT_modified_code/r_cmt_rx -src/FIT_modified_code/r_ether_rx -src/FIT_modified_code/r_flash_rx -src/FIT_modified_code/r_riic_rx -src/FIT_modified_code/r_sci_iic_rx -src/FIT_modified_code/r_sci_rx -src/amazon_freertos_common - ----------------------------------------------------------- -Folders on the File System of the WINDOWS Operating System ----------------------------------------------------------- - -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_bsp -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_byteq -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_cmt_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_ether_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_flash_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_riic_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_iic_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/amazon_freertos_common - -[EOF] diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/UNUSED_generated_code/.placeholder b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/UNUSED_generated_code/.placeholder deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_cg_hardware_setup.c b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_cg_hardware_setup.c deleted file mode 100644 index a94c6539dab..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_cg_hardware_setup.c +++ /dev/null @@ -1,99 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_hardware_setup.c -* Version : 1.3.2 -* Device(s) : R5F564MLCxFB -* Description : Initialization file for code generation configurations. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -#include "r_smc_cgc.h" -#include "r_smc_interrupt.h" -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -void r_undefined_exception(void); -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: r_undefined_exception -* Description : This function is undefined interrupt service routine -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void r_undefined_exception(void) -{ - /* Start user code for r_undefined_exception. Do not edit comment generated here */ - /* End user code. Do not edit comment generated here */ -} - -/*********************************************************************************************************************** -* Function Name: R_Systeminit -* Description : This function initializes every configuration -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Systeminit(void) -{ - /* Enable writing to registers related to operating modes, LPC, CGC and software reset */ - SYSTEM.PRCR.WORD = 0xA50BU; - - /* Enable writing to MPC pin function control registers */ - MPC.PWPR.BIT.B0WI = 0U; - MPC.PWPR.BIT.PFSWE = 1U; - - /* Initialize clocks settings */ - R_CGC_Create(); - - /* Set interrupt settings */ - R_Interrupt_Create(); - - /* Register undefined interrupt */ - R_BSP_InterruptWrite(BSP_INT_SRC_UNDEFINED_INTERRUPT,(bsp_int_cb_t)r_undefined_exception); - - /* Disable writing to MPC pin function control registers */ - MPC.PWPR.BIT.PFSWE = 0U; - MPC.PWPR.BIT.B0WI = 1U; - - /* Enable protection */ - SYSTEM.PRCR.WORD = 0xA500U; -} - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_cg_macrodriver.h b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_cg_macrodriver.h deleted file mode 100644 index 0642494f29b..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_cg_macrodriver.h +++ /dev/null @@ -1,82 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_macrodriver.h -* Version : 1.3.2 -* Device(s) : R5F564MLCxFB -* Description : Macro header file for code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef MACRODRIVER_H -#define MACRODRIVER_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "platform.h" -#include "r_smc_interrupt.h" -#include - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -#ifndef __TYPEDEF__ - -/* Status list definition */ -#define MD_STATUSBASE (0x00U) -#define MD_OK (MD_STATUSBASE + 0x00U) /* register setting OK */ -#define MD_SPT (MD_STATUSBASE + 0x01U) /* IIC stop */ -#define MD_NACK (MD_STATUSBASE + 0x02U) /* IIC no ACK */ -#define MD_BUSY1 (MD_STATUSBASE + 0x03U) /* busy 1 */ -#define MD_BUSY2 (MD_STATUSBASE + 0x04U) /* busy 2 */ - -/* Error list definition */ -#define MD_ERRORBASE (0x80U) -#define MD_ERROR (MD_ERRORBASE + 0x00U) /* error */ -#define MD_ARGERROR (MD_ERRORBASE + 0x01U) /* error argument input error */ -#define MD_ERROR1 (MD_ERRORBASE + 0x02U) /* error 1 */ -#define MD_ERROR2 (MD_ERRORBASE + 0x03U) /* error 2 */ -#define MD_ERROR3 (MD_ERRORBASE + 0x04U) /* error 3 */ -#define MD_ERROR4 (MD_ERRORBASE + 0x05U) /* error 4 */ -#define MD_ERROR5 (MD_ERRORBASE + 0x06U) /* error 5 */ - -#endif - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -#ifndef __TYPEDEF__ - typedef unsigned short MD_STATUS; - #define __TYPEDEF__ -#endif - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Systeminit(void); -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_cg_userdefine.h b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_cg_userdefine.h deleted file mode 100644 index 28af9659592..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_cg_userdefine.h +++ /dev/null @@ -1,61 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_userdefine.h -* Version : 1.3.2 -* Device(s) : R5F564MLCxFB -* Description : User header file for code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef CG_USER_DEF_H -#define CG_USER_DEF_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ -/* Start user code for register. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* Start user code for macro define. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -/* Start user code for type define. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_smc_cgc.c b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_smc_cgc.c deleted file mode 100644 index 6d24f62b9ba..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_smc_cgc.c +++ /dev/null @@ -1,44 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc.c -* Version : 1.2.0 -* Device(s) : R5F564MLCxFB -* Description : This file implements cgc setting -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -#include "r_smc_cgc.h" -#include "platform.h" - -/*********************************************************************************************************************** -* Function Name: R_CGC_Create -* Description : This function Used to initializes the clock generator -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_CGC_Create(void) -{ - R_CGC_Create_UserInit(); -} diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_smc_cgc.h b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_smc_cgc.h deleted file mode 100644 index bf8e5be0332..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_smc_cgc.h +++ /dev/null @@ -1,217 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc.h -* Version : 1.2.0 -* Device(s) : R5F564MLCxFB -* Description : This file implements cgc setting. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_CGC_H -#define SMC_CGC_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ -/* - System Clock Control Register (SCKCR) -*/ -/* Peripheral Module Clock D (PCLKD) */ -#define _00000000_CGC_PCLKD_DIV_1 (0x00000000UL) /* x1 */ -#define _00000001_CGC_PCLKD_DIV_2 (0x00000001UL) /* x1/2 */ -#define _00000002_CGC_PCLKD_DIV_4 (0x00000002UL) /* x1/4 */ -#define _00000003_CGC_PCLKD_DIV_8 (0x00000003UL) /* x1/8 */ -#define _00000004_CGC_PCLKD_DIV_16 (0x00000004UL) /* x1/16 */ -#define _00000005_CGC_PCLKD_DIV_32 (0x00000005UL) /* x1/32 */ -#define _00000006_CGC_PCLKD_DIV_64 (0x00000006UL) /* x1/64 */ -/* Peripheral Module Clock C (PCLKC) */ -#define _00000000_CGC_PCLKC_DIV_1 (0x00000000UL) /* x1 */ -#define _00000010_CGC_PCLKC_DIV_2 (0x00000010UL) /* x1/2 */ -#define _00000020_CGC_PCLKC_DIV_4 (0x00000020UL) /* x1/4 */ -#define _00000030_CGC_PCLKC_DIV_8 (0x00000030UL) /* x1/8 */ -#define _00000040_CGC_PCLKC_DIV_16 (0x00000040UL) /* x1/16 */ -#define _00000050_CGC_PCLKC_DIV_32 (0x00000050UL) /* x1/32 */ -#define _00000060_CGC_PCLKC_DIV_64 (0x00000060UL) /* x1/64 */ -/* Peripheral Module Clock B (PCLKB) */ -#define _00000000_CGC_PCLKB_DIV_1 (0x00000000UL) /* x1 */ -#define _00000100_CGC_PCLKB_DIV_2 (0x00000100UL) /* x1/2 */ -#define _00000200_CGC_PCLKB_DIV_4 (0x00000200UL) /* x1/4 */ -#define _00000300_CGC_PCLKB_DIV_8 (0x00000300UL) /* x1/8 */ -#define _00000400_CGC_PCLKB_DIV_16 (0x00000400UL) /* x1/16 */ -#define _00000500_CGC_PCLKB_DIV_32 (0x00000500UL) /* x1/32 */ -#define _00000600_CGC_PCLKB_DIV_64 (0x00000600UL) /* x1/64 */ -/* Peripheral Module Clock A (PCLKA) */ -#define _00000000_CGC_PCLKA_DIV_1 (0x00000000UL) /* x1 */ -#define _00001000_CGC_PCLKA_DIV_2 (0x00001000UL) /* x1/2 */ -#define _00002000_CGC_PCLKA_DIV_4 (0x00002000UL) /* x1/4 */ -#define _00003000_CGC_PCLKA_DIV_8 (0x00003000UL) /* x1/8 */ -#define _00004000_CGC_PCLKA_DIV_16 (0x00004000UL) /* x1/16 */ -#define _00005000_CGC_PCLKA_DIV_32 (0x00005000UL) /* x1/32 */ -#define _00006000_CGC_PCLKA_DIV_64 (0x00006000UL) /* x1/64 */ -/* External Bus Clock (BCLK) */ -#define _00000000_CGC_BCLK_DIV_1 (0x00000000UL) /* x1 */ -#define _00010000_CGC_BCLK_DIV_2 (0x00010000UL) /* x1/2 */ -#define _00020000_CGC_BCLK_DIV_4 (0x00020000UL) /* x1/4 */ -#define _00030000_CGC_BCLK_DIV_8 (0x00030000UL) /* x1/8 */ -#define _00040000_CGC_BCLK_DIV_16 (0x00040000UL) /* x1/16 */ -#define _00050000_CGC_BCLK_DIV_32 (0x00050000UL) /* x1/32 */ -#define _00060000_CGC_BCLK_DIV_64 (0x00060000UL) /* x1/64 */ -/* System Clock (ICLK) */ -#define _00000000_CGC_ICLK_DIV_1 (0x00000000UL) /* x1 */ -#define _01000000_CGC_ICLK_DIV_2 (0x01000000UL) /* x1/2 */ -#define _02000000_CGC_ICLK_DIV_4 (0x02000000UL) /* x1/4 */ -#define _03000000_CGC_ICLK_DIV_8 (0x03000000UL) /* x1/8 */ -#define _04000000_CGC_ICLK_DIV_16 (0x04000000UL) /* x1/16 */ -#define _05000000_CGC_ICLK_DIV_32 (0x05000000UL) /* x1/32 */ -#define _06000000_CGC_ICLK_DIV_64 (0x06000000UL) /* x1/64 */ -/* System Clock (FCLK) */ -#define _00000000_CGC_FCLK_DIV_1 (0x00000000UL) /* x1 */ -#define _10000000_CGC_FCLK_DIV_2 (0x10000000UL) /* x1/2 */ -#define _20000000_CGC_FCLK_DIV_4 (0x20000000UL) /* x1/4 */ -#define _30000000_CGC_FCLK_DIV_8 (0x30000000UL) /* x1/8 */ -#define _40000000_CGC_FCLK_DIV_16 (0x40000000UL) /* x1/16 */ -#define _50000000_CGC_FCLK_DIV_32 (0x50000000UL) /* x1/32 */ -#define _60000000_CGC_FCLK_DIV_64 (0x60000000UL) /* x1/64 */ - -/* - System Clock Control Register 2 (SCKCR2) -*/ -#define _0010_CGC_UCLK_DIV_1 (0x0010U) /* x1/2 */ -#define _0020_CGC_UCLK_DIV_3 (0x0020U) /* x1/3 */ -#define _0030_CGC_UCLK_DIV_4 (0x0030U) /* x1/4 */ -#define _0040_CGC_UCLK_DIV_5 (0x0040U) /* x1/5 */ -#define _0001_SCKCR2_BIT0 (0x0001U) /* RESERVE BIT0 */ - -/* - System Clock Control Register 3 (SCKCR3) -*/ -#define _0000_CGC_CLOCKSOURCE_LOCO (0x0000U) /* LOCO */ -#define _0100_CGC_CLOCKSOURCE_HOCO (0x0100U) /* HOCO */ -#define _0200_CGC_CLOCKSOURCE_MAINCLK (0x0200U) /* Main clock oscillator */ -#define _0300_CGC_CLOCKSOURCE_SUBCLK (0x0300U) /* Sub-clock oscillator */ -#define _0400_CGC_CLOCKSOURCE_PLL (0x0400U) /* PLL circuit */ - -/* - PLL Control Register (PLLCR) -*/ -/* PLL Input Frequency Division Ratio Select (PLIDIV[1:0]) */ -#define _0000_CGC_PLL_FREQ_DIV_1 (0x0000U) /* x1 */ -#define _0001_CGC_PLL_FREQ_DIV_2 (0x0001U) /* x1/2 */ -#define _0002_CGC_PLL_FREQ_DIV_3 (0x0002U) /* x1/3 */ -/* PLL Clock Source Select (PLLSRCSEL) */ -#define _0000_CGC_PLL_SOURCE_MAIN (0x0000U) /* Main clock oscillator */ -#define _0010_CGC_PLL_SOURCE_HOCO (0x0010U) /* HOCO */ -/* Frequency Multiplication Factor Select (STC[5:0]) */ -#define _1300_CGC_PLL_FREQ_MUL_10_0 (0x1300U) /* x10.0 */ -#define _1400_CGC_PLL_FREQ_MUL_10_5 (0x1400U) /* x10.5 */ -#define _1500_CGC_PLL_FREQ_MUL_11_0 (0x1500U) /* x11.0 */ -#define _1600_CGC_PLL_FREQ_MUL_11_5 (0x1600U) /* x11.5 */ -#define _1700_CGC_PLL_FREQ_MUL_12_0 (0x1700U) /* x12.0 */ -#define _1800_CGC_PLL_FREQ_MUL_12_5 (0x1800U) /* x12.5 */ -#define _1900_CGC_PLL_FREQ_MUL_13_0 (0x1900U) /* x13.0 */ -#define _1A00_CGC_PLL_FREQ_MUL_13_5 (0x1A00U) /* x13.5 */ -#define _1B00_CGC_PLL_FREQ_MUL_14_0 (0x1B00U) /* x14.0 */ -#define _1C00_CGC_PLL_FREQ_MUL_14_5 (0x1C00U) /* x14.5 */ -#define _1D00_CGC_PLL_FREQ_MUL_15_0 (0x1D00U) /* x15.0 */ -#define _1E00_CGC_PLL_FREQ_MUL_15_5 (0x1E00U) /* x15.5 */ -#define _1F00_CGC_PLL_FREQ_MUL_16_0 (0x1F00U) /* x16.0 */ -#define _2000_CGC_PLL_FREQ_MUL_16_5 (0x2000U) /* x16.5 */ -#define _2100_CGC_PLL_FREQ_MUL_17_0 (0x2100U) /* x17.0 */ -#define _2200_CGC_PLL_FREQ_MUL_17_5 (0x2200U) /* x17.5 */ -#define _2300_CGC_PLL_FREQ_MUL_18_0 (0x2300U) /* x18.0 */ -#define _2400_CGC_PLL_FREQ_MUL_18_5 (0x2400U) /* x18.5 */ -#define _2500_CGC_PLL_FREQ_MUL_19_0 (0x2500U) /* x19.0 */ -#define _2600_CGC_PLL_FREQ_MUL_19_5 (0x2600U) /* x19.5 */ -#define _2700_CGC_PLL_FREQ_MUL_20_0 (0x2700U) /* x20.0 */ -#define _2800_CGC_PLL_FREQ_MUL_20_5 (0x2800U) /* x20.5 */ -#define _2900_CGC_PLL_FREQ_MUL_21_0 (0x2900U) /* x21.0 */ -#define _2A00_CGC_PLL_FREQ_MUL_21_5 (0x2A00U) /* x21.5 */ -#define _2B00_CGC_PLL_FREQ_MUL_22_0 (0x2B00U) /* x22.0 */ -#define _2C00_CGC_PLL_FREQ_MUL_22_5 (0x2C00U) /* x22.5 */ -#define _2D00_CGC_PLL_FREQ_MUL_23_0 (0x2D00U) /* x23.0 */ -#define _2E00_CGC_PLL_FREQ_MUL_23_5 (0x2E00U) /* x23.5 */ -#define _2F00_CGC_PLL_FREQ_MUL_24_0 (0x2F00U) /* x24.0 */ -#define _3000_CGC_PLL_FREQ_MUL_24_5 (0x3000U) /* x24.5 */ -#define _3100_CGC_PLL_FREQ_MUL_25_0 (0x3100U) /* x25.0 */ -#define _3200_CGC_PLL_FREQ_MUL_25_5 (0x3200U) /* x25.5 */ -#define _3300_CGC_PLL_FREQ_MUL_26_0 (0x3300U) /* x26.0 */ -#define _3400_CGC_PLL_FREQ_MUL_26_5 (0x3400U) /* x26.5 */ -#define _3500_CGC_PLL_FREQ_MUL_27_0 (0x3500U) /* x27.0 */ -#define _3600_CGC_PLL_FREQ_MUL_27_5 (0x3600U) /* x27.5 */ -#define _3700_CGC_PLL_FREQ_MUL_28_0 (0x3700U) /* x28.0 */ -#define _3800_CGC_PLL_FREQ_MUL_28_5 (0x3800U) /* x28.5 */ -#define _3900_CGC_PLL_FREQ_MUL_29_0 (0x3900U) /* x29.0 */ -#define _3A00_CGC_PLL_FREQ_MUL_29_5 (0x3A00U) /* x29.5 */ -#define _3B00_CGC_PLL_FREQ_MUL_30_0 (0x3B00U) /* x30.0 */ - -/* - Oscillation Stop Detection Control Register (OSTDCR) -*/ -/* Oscillation Stop Detection Interrupt Enable (OSTDIE) */ -#define _00_CGC_OSC_STOP_INT_DISABLE (0x00U) /* The oscillation stop detection interrupt is disabled */ -#define _01_CGC_OSC_STOP_INT_ENABLE (0x01U) /* The oscillation stop detection interrupt is enabled */ -/* Oscillation Stop Detection Function Enable (OSTDE) */ -#define _00_CGC_OSC_STOP_DISABLE (0x00U) /* Oscillation stop detection function is disabled */ -#define _80_CGC_OSC_STOP_ENABLE (0x80U) /* Oscillation stop detection function is enabled */ - -/* - High-Speed On-Chip Oscillator Control Register 2 (HOCOCR2) -*/ -/* HOCO Frequency Setting (HCFRQ[1:0]) */ -#define _00_CGC_HOCO_CLK_16 (0x00U) /* 16 MHz */ -#define _01_CGC_HOCO_CLK_18 (0x01U) /* 18 MHz */ -#define _02_CGC_HOCO_CLK_20 (0x02U) /* 20 MHz */ - -/* - Main Clock Oscillator Forced Oscillation Control Register (MOFCR) -*/ -/* Main Oscillator Drive Capability 2 Switching (MODRV2[1:0]) */ -#define _00_CGC_MAINOSC_UNDER24M (0x00U) /* 20.1 to 24 MHz */ -#define _10_CGC_MAINOSC_UNDER20M (0x10U) /* 16.1 to 20 MHz */ -#define _20_CGC_MAINOSC_UNDER16M (0x20U) /* 8.1 to 16 MHz */ -#define _30_CGC_MAINOSC_EQUATE8M (0x30U) /* 8 MHz */ -/* Main Clock Oscillator Switch (MOSEL) */ -#define _00_CGC_MAINOSC_RESONATOR (0x00U) /* Resonator */ -#define _40_CGC_MAINOSC_EXTERNAL (0x40U) /* External oscillator input */ - -/* - RTC Control Register 4 (RCR4) -*/ -/* Count source select */ -#define _00_RTC_SOURCE_SELECT_SUB (0x00U) /* Select sub-clock oscillator */ -#define _01_RTC_SOURCE_SELECT_MAIN_FORCED (0x01U) /* Select main clock oscillator */ -#define _53_CGC_MOSCWTCR_VALUE (0x53U) /* Main Clock Oscillator Wait Time */ -#define _21_CGC_SOSCWTCR_VALUE (0x21U) /* Sub-Clock Oscillator Wait Time */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_CGC_Create(void); -void R_CGC_Create_UserInit(); -#endif diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_smc_cgc_user.c b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_smc_cgc_user.c deleted file mode 100644 index 82454db1452..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_smc_cgc_user.c +++ /dev/null @@ -1,64 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc_user.c -* Version : 1.2.0 -* Device(s) : R5F564MLCxFB -* Description : None -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -/* Start user code for include. Do not edit comment generated here */ -#include "r_smc_cgc.h" -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: R_CGC_Create_UserInit -* Description : This function adds user code after initializing CGC -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_CGC_Create_UserInit(void) -{ - /* Start user code for code init. Do not edit comment generated here */ - /* End user code. Do not edit comment generated here */ -} - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_smc_entry.h b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_smc_entry.h deleted file mode 100644 index 505a4856744..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_smc_entry.h +++ /dev/null @@ -1,54 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_entry.h -* Version : 1.3.2 -* Device(s) : R5F564MLCxFB -* Description : SMC platform header file. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_ENTRY_H -#define SMC_ENTRY_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_smc_interrupt.c b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_smc_interrupt.c deleted file mode 100644 index 35965bf59cb..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_smc_interrupt.c +++ /dev/null @@ -1,52 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_interrupt.c -* Version : 1.1.0 -* Device(s) : R5F564MLCxFB -* Description : This file implements interrupt setting -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_smc_interrupt.h" -#include "platform.h" - -/*********************************************************************************************************************** -* Function Name: R_Interrupt_Create -* Description : This function Used to set the fast interrupt or group interrupt -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Interrupt_Create(void) -{ - /* Disable group AL1 interrupt*/ - IEN(ICU,GROUPAL1) = 0U; - - - /* Set group AL1 interrupt priority level */ - IPR(ICU,GROUPAL1) = _02_ICU_PRIORITY_LEVEL2; - - /* Enable group AL1 interrupt */ - IEN(ICU,GROUPAL1) = 1U; -} - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_smc_interrupt.h b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_smc_interrupt.h deleted file mode 100644 index d6a17660c87..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/general/r_smc_interrupt.h +++ /dev/null @@ -1,293 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_interrupt.h -* Version : 1.1.0 -* Device(s) : R5F564MLCxFB -* Description : This file implements interrupt setting. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_INTERRUPT_H -#define SMC_INTERRUPT_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/* Priority level of interrupt source. - * These macro definitions are used to set the IPR register directly - */ -#define _00_ICU_PRIORITY_LEVEL0 (0x00U) /* Level 0 (disabled) */ -#define _01_ICU_PRIORITY_LEVEL1 (0x01U) /* Level 1 */ -#define _02_ICU_PRIORITY_LEVEL2 (0x02U) /* Level 2 */ -#define _03_ICU_PRIORITY_LEVEL3 (0x03U) /* Level 3 */ -#define _04_ICU_PRIORITY_LEVEL4 (0x04U) /* Level 4 */ -#define _05_ICU_PRIORITY_LEVEL5 (0x05U) /* Level 5 */ -#define _06_ICU_PRIORITY_LEVEL6 (0x06U) /* Level 6 */ -#define _07_ICU_PRIORITY_LEVEL7 (0x07U) /* Level 7 */ -#define _08_ICU_PRIORITY_LEVEL8 (0x08U) /* Level 8 */ -#define _09_ICU_PRIORITY_LEVEL9 (0x09U) /* Level 9 */ -#define _0A_ICU_PRIORITY_LEVEL10 (0x0AU) /* Level 10 */ -#define _0B_ICU_PRIORITY_LEVEL11 (0x0BU) /* Level 11 */ -#define _0C_ICU_PRIORITY_LEVEL12 (0x0CU) /* Level 12 */ -#define _0D_ICU_PRIORITY_LEVEL13 (0x0DU) /* Level 13 */ -#define _0E_ICU_PRIORITY_LEVEL14 (0x0EU) /* Level 14 */ -#define _0F_ICU_PRIORITY_LEVEL15 (0x0FU) /* Level 15 */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -#define FAST_INTERRUPT_VECTOR (0) - -/* The macro definitions below list the full set of priority levels as selected in the Interrupts tab - * Please do not modify this file manually - */ -#define ICU_BSC_BUSERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RAM_RAMERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_FCU_FIFERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_FCU_FRDYI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_SWINT2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_SWINT_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT0_CMI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT1_CMI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_CMWI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_CMWI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USBA_D0FIFO2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USBA_D1FIFO2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_D0FIFO0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_D1FIFO0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI0_SPRI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI0_SPTI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_QSPI_SPRI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_QSPI_SPTI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SDHI_SBFAI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MMCIF_MBFAI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SSI0_SSITXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SSI0_SSIRXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SSI1_SSIRTI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SRC_IDEI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SRC_ODFI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC0_RXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC0_TXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC2_RXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC2_TXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI0_RXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI0_TXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI1_RXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI1_TXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI2_RXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI2_TXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ13_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ14_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ15_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI3_RXI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI3_TXI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI4_RXI4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI4_TXI4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI5_RXI5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI5_TXI5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI6_RXI6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI6_TXI6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_LVD1_LVD1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_LVD2_LVD2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_USBR0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_ALM_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_PRD_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USBA_USBAR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_IWDT_IWUNI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_WDT_WUNI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PDC_PCDFI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI7_RXI7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI7_TXI7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCIF8_RXIF8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCIF8_TXIF8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCIF9_RXIF9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCIF9_TXIF9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCIF10_RXIF10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCIF10_TXIF10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBE0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPAL0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPAL1_PRIORITY _02_ICU_PRIORITY_LEVEL2 -#define ICU_SCIF11_RXIF11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCIF11_TXIF11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI12_RXI12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI12_TXI12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC0I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC1I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC2I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC3I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC74I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_OST_OSTDI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EXDMAC_EXDMAC0I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EXDMAC_EXDMAC1I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT2_CMI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT3_CMI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0C_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0D_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TCI0V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TGI1B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TCI1V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TCI1U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TGI2A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TGI2B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TCI2V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TCI2U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TGI1A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3C_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_CMIA0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_CMIB0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_OVI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_CMIA1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_CMIB1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_OVI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_CMIA2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_CMIB2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_OVI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_CMIA3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_CMIB3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_OVI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3D_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TCI3V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TGI4A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TGI4B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TCI4V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TCI4U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TGI5A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TGI5B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TCI5V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TCI5U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_IC0I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_IC1I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_OC0I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_OC1I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_IC0I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_IC1I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_OC0I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_OC1I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_CUP_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_RXF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_TXF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_RXM0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_TXM0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_RXF1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_TXF1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_RXM1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_TXM1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN2_RXF2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN2_TXF2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN2_RXM2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN2_TXM2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_USBI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12ADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12GBADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12ADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12GBADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DES_DESEND_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SHA_SHADEND_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SHA_SHAEND_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RNG_RNGEND_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ELC_ELSR18I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ELC_ELSR19I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB200_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB201_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB202_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB203_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB204_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB205_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB206_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB207_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TGIA1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIA0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIB0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIC0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGID0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TCIV0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIE0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TGIB1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TCIV1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TCIU1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TGIA2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TGIB2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TCIV2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TCIU2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIA3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIB3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIC3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGID3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TCIV3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIA4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIB4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIC4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGID4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TCIV4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIU5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIV5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIW5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIA6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIB6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIC6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGID6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TCIV6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIA7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIB7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIC7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGID7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TCIV7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIA8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIB8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIC8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGID8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TCIV8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EPTPC_IPLS_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_AES_AESRDY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_AES_AESEND_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA254_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA255_PRIORITY _0F_ICU_PRIORITY_LEVEL15 - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Interrupt_Create(void); -#endif diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_bsp_config.h b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_bsp_config.h deleted file mode 100644 index 94e8e337646..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_bsp_config.h +++ /dev/null @@ -1,567 +0,0 @@ -/* Generated configuration header file - do not edit */ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_config_reference.h -* Device(s) : RX64x -* Description : The file r_bsp_config.h is used to configure your BSP. r_bsp_config.h should be included -* somewhere in your package so that the r_bsp code has access to it. This file (r_bsp_config_reference.h) -* is just a reference file that the user can use to make their own r_bsp_config.h file. -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 07.08.2013 1.00 First Release -* : 31.03.2014 1.10 Added the ability for the user to define two 'warm start' callback functions which when -* defined result in a callback from PowerON_Reset_PC() before and/or after initialization -* of the C runtime environment. Added r_bsp_config file version number, which must match -* the BSP version number or a compiler warning will result. Added ability to specify user -* defined functions for redirection of the stdio charget() and/or charput() functions. -* : 30.05.2014 1.11 Added settings for the OFS registers. -* : 13.04.2016 1.12 Added the following macro definition. -* - BSP_CFG_MAIN_CLOCK_SOURCE -* - BSP_CFG_MOSC_WAIT_TIME -* - BSP_CFG_SOSC_WAIT_TIME -* : 15.05.2017 1.20 Changed the comment of the following macro definition, because there was a mistake -* in package type. -* - BSP_CFG_MCU_PART_PACKAGE - Changed package type from LQFP to LFQFP. -* Added Character(s) of the following macro definition. -* - BSP_CFG_MCU_PART_PACKAGE - LJ = 0xA = TFLGA/100/0.65. -* - BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED - C = false = Encryption module not included, -* SDHI module not included. -* - G = true = Encryption module included, -* SDHI module not included. -* Removed Character(s) of the following macro definition. -* - BSP_CFG_MCU_PART_PACKAGE - LA = 0x6 = TFLGA/100/0.50. -* - BSP_CFG_MCU_PART_PACKAGE - JA = 0x7 = TFLGA/100/0.65. -* Added the following macro definition. -* - BSP_CFG_RTC_ENABLE -* - BSP_CFG_SOSC_DRV_CAP -* : 01.11.2017 2.00 Added the following macro definition. -* - BSP_CFG_STARTUP_DISABLE -* : 01.07.2018 2.01 Added the following macro definition. -* - BSP_CFG_CONFIGURATOR_SELECT -* Add RTOS support. FreeRTOS. Define a timer for RTOS. -* : xx.xx.xxxx x.xx Added the following macro definition for ID code protection. -* - BSP_CFG_ID_CODE_LONG_1 -* - BSP_CFG_ID_CODE_LONG_2 -* - BSP_CFG_ID_CODE_LONG_3 -* - BSP_CFG_ID_CODE_LONG_4 -* Added the following macro definition. -* - BSP_CFG_FIT_IPL_MAX -* Added support for GNUC and ICCRX. -***********************************************************************************************************************/ -#ifndef R_BSP_CONFIG_REF_HEADER_FILE -#define R_BSP_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* NOTE: - The default settings are the same as when using RSKRX64M. - Change to the settings for the user board. -*/ - -/* Start up select - 0 = Enable BSP startup program. - 1 = Disable BSP startup program. (e.g. Using user startup program.) -*/ -#define BSP_CFG_STARTUP_DISABLE (0) - -/* Enter the product part number for your MCU. This information will be used to obtain information about your MCU such - as package and memory size. - To help parse this information, the part number will be defined using multiple macros. - R 5 F 56 4M L B D FP - | | | | | | | | | Macro Name Description - | | | | | | | | |__BSP_CFG_MCU_PART_PACKAGE = Package type, number of pins, and pin pitch - | | | | | | | |____not used = Products with wide temperature range - | | | | | | |______BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED = Encryption module included/not included - | | | | | |________BSP_CFG_MCU_PART_MEMORY_SIZE = ROM, RAM, and Data Flash Capacity - | | | | |___________BSP_CFG_MCU_PART_GROUP = Group name - | | | |______________BSP_CFG_MCU_PART_SERIES = Series name - | | |________________BSP_CFG_MCU_PART_MEMORY_TYPE = Type of memory (Flash, ROMless) - | |__________________not used = Renesas MCU - |____________________not used = Renesas semiconductor product. -*/ - -/* Package type. Set the macro definition based on values below: - Character(s) = Value for macro = Package Type/Number of Pins/Pin Pitch - FC = 0x0 = LFQFP/176/0.50 - BG = 0x1 = LFBGA/176/0.80 - LC = 0x2 = TFLGA/177/0.50 - FB = 0x3 = LFQFP/144/0.50 - LK = 0x4 = TFLGA/145/0.50 - FP = 0x5 = LFQFP/100/0.50 - LJ = 0xA = TFLGA/100/0.65 -*/ -#define BSP_CFG_MCU_PART_PACKAGE (0x3) // <-- Updated by GUI. Do not edit this value manually - -/* Whether Encryption and SDHI are included or not. - Character(s) = Value for macro = Description - D = false = Encryption module not included, SDHI module included - H = true = Encryption module included, SDHI module included - C = false = Encryption module not included, SDHI module not included - G = true = Encryption module included, SDHI module not included -*/ -#define BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED (false) // <-- Updated by GUI. Do not edit this value manually - -/* ROM, RAM, and Data Flash Capacity. - Character(s) = Value for macro = ROM Size/Ram Size/Data Flash Size - L = 0x15 = 4MB/512KB/64KB - J = 0x13 = 3MB/512KB/64KB - G = 0x10 = 2.5MB/512KB/64KB - F = 0xF = 2MB/512KB/64KB -*/ -#define BSP_CFG_MCU_PART_MEMORY_SIZE (0x15) // <-- Updated by GUI. Do not edit this value manually - -/* Group name. - Character(s) = Value for macro = Description - 4M = 0x0 = RX64M Group -*/ -#define BSP_CFG_MCU_PART_GROUP (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Series name. - Character(s) = Value for macro = Description - 56 = 0x0 = RX600 Series -*/ -#define BSP_CFG_MCU_PART_SERIES (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Memory type. - Character(s) = Value for macro = Description - F = 0x0 = Flash memory version -*/ -#define BSP_CFG_MCU_PART_MEMORY_TYPE (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Whether to use 1 stack or 2. RX MCUs have the ability to use 2 stacks: an interrupt stack and a user stack. - * When using 2 stacks the user stack will be used during normal user code. When an interrupt occurs the CPU - * will automatically shift to using the interrupt stack. Having 2 stacks can make it easier to figure out how - * much stack space to allocate since the user does not have to worry about always having enough room on the - * user stack for if-and-when an interrupt occurs. Some users will not want 2 stacks though because it is not - * needed in all applications and can lead to wasted RAM (i.e. space in between stacks that is not used). - * If only 1 stack is used then the interrupt stack is the one that will be used. If 1 stack is chosen then - * the user may want to remove the 'SU' section from the linker sections to remove any linker warnings. - * - * 0 = Use 1 stack. Disable user stack. User stack size set below will be ignored. - * 1 = Use 2 stacks. User stack and interrupt stack will both be used. - */ -#define BSP_CFG_USER_STACK_ENABLE (0) - -#if defined(__CCRX__) || defined(__GNUC__) - -/* When using the user startup program, disable the following code. */ -#if (BSP_CFG_STARTUP_DISABLE == 0) - -/* If only 1 stack is chosen using BSP_CFG_USER_STACK_ENABLE then no RAM will be allocated for the user stack. */ -#if (BSP_CFG_USER_STACK_ENABLE == 1) -/* User Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. */ -#define BSP_CFG_USTACK_BYTES (0) -#endif - -/* Interrupt Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. - * If the interrupt stack is the only stack being used then the user will likely want to increase the default size - * below. - */ -#define BSP_CFG_ISTACK_BYTES (0x1000) - -#endif /* BSP_CFG_STARTUP_DISABLE == 0 */ - -/* Heap size in bytes. - To disable the heap you must follow these steps: - 1) Set this macro (BSP_CFG_HEAP_BYTES) to 0. - 2) Set the macro BSP_CFG_IO_LIB_ENABLE to 0. - 3) Disable stdio from being built into the project library. This is done by going into the Renesas RX Toolchain - settings and choosing the Standard Library section. After that choose 'Standard Library' for Category in HEW or - choose 'Contents' in E2Studio. This will present a list of modules that can be included. Uncheck the box for - stdio.h. -*/ -#define BSP_CFG_HEAP_BYTES (0) - -#endif /* defined(__CCRX__) || defined(__GNUC__) */ - -#if defined(__CCRX__) - -/* Initializes C input & output library functions. - 0 = Disable I/O library initialization in resetprg.c. If you are not using stdio then use this value. - 1 = Enable I/O library initialization in resetprg.c. This is default and needed if you are using stdio. */ -#define BSP_CFG_IO_LIB_ENABLE (1) - -#endif /* defined(__CCRX__) */ - -/* If desired the user may redirect the stdio charget() and/or charput() functions to their own respective functions - by enabling below and providing and replacing the my_sw_... function names with the names of their own functions. */ -#define BSP_CFG_USER_CHARGET_ENABLED (0) -#define BSP_CFG_USER_CHARGET_FUNCTION my_sw_charget_function - -#define BSP_CFG_USER_CHARPUT_ENABLED (0) -#define BSP_CFG_USER_CHARPUT_FUNCTION my_sw_charput_function - -/* After reset MCU will operate in Supervisor mode. To switch to User mode, set this macro to '1'. For more information - on the differences between these 2 modes see the CPU >> Processor Mode section of your MCU's hardware manual. - 0 = Stay in Supervisor mode. - 1 = Switch to User mode. -*/ -#define BSP_CFG_RUN_IN_USER_MODE (0) - -/* To get into User Boot Mode the user must control some pins on the MCU and also set some values in ROM. These values - in ROM are described in the Option-Setting Memory section of the hardware manual. This macro sets these values so - that User Boot Mode can be used. The user is still responsible for setting the MCU pins appropriately. If User Boot - is selected then the user should make sure that they setup a constant data section in their linker named 'UBSETTINGS' - at address 0xFF7FFFE8. - 0 = Single-Chip or USB Boot Mode - 1 = User Boot Mode -*/ -#define BSP_CFG_USER_BOOT_ENABLE (0) - -/* Set your desired ID code. NOTE, leave at the default (all 0xFF's) if you do not wish to use an ID code. If you set - this value and program it into the MCU then you will need to remember the ID code because the debugger will ask for - it when trying to connect. Note that the E1/E20 will ignore the ID code when programming the MCU during debugging. - If you set this value and then forget it then you can clear the ID code by connecting up in serial boot mode using - FDT. The ID Code is 16 bytes long. The macro below define the ID Code in 4-byte sections. */ -/* Lowest 4-byte section, address 0x00120050. From MSB to LSB: ID code 4, ID code 3, ID code 2, ID code 1/Control Code. - */ -#define BSP_CFG_ID_CODE_LONG_1 (0xFFFFFFFF) -/* 2nd ID Code section, address 0x00120054. From MSB to LSB: ID code 8, ID code 7, ID code 6, ID code 5. */ -#define BSP_CFG_ID_CODE_LONG_2 (0xFFFFFFFF) -/* 3rd ID Code section, address 0x00120058. From MSB to LSB: ID code 12, ID code 11, ID code 10, ID code 9. */ -#define BSP_CFG_ID_CODE_LONG_3 (0xFFFFFFFF) -/* 4th ID Code section, address 0x0012005C. From MSB to LSB: ID code 16, ID code 15, ID code 14, ID code 13. */ -#define BSP_CFG_ID_CODE_LONG_4 (0xFFFFFFFF) - -/* Clock source select (CKSEL). - 0 = Low Speed On-Chip Oscillator (LOCO) - 1 = High Speed On-Chip Oscillator (HOCO) - 2 = Main Clock Oscillator - 3 = Sub-Clock Oscillator - 4 = PLL Circuit -*/ -#define BSP_CFG_CLOCK_SOURCE (4) // <-- Updated by GUI. Do not edit this value manually - -/* The sub-clock oscillation control for using the RTC. - When '1' is selected, the registers related to RTC are initialized and the sub-clock oscillator is operated. - 0 = The RTC is not to be used. - 1 = The RTC is to be used. -*/ -#define BSP_CFG_RTC_ENABLE (0) // <-- Updated by GUI. Do not edit this value manually - -/* Sub-Clock Oscillator Drive Capacity Control (RTCDV). - 0 = Drive capacity for standard CL. - 1 = Drive capacity for low CL. -*/ -#define BSP_CFG_SOSC_DRV_CAP (0) // <-- Updated by GUI. Do not edit this value manually //standard CL by default - -/* Main clock Oscillator Switching (MOSEL). - 0 = Resonator - 1 = External clock input -*/ -#define BSP_CFG_MAIN_CLOCK_SOURCE (0) // <-- Updated by GUI. Do not edit this value manually - -/* Clock configuration options. - The input clock frequency is specified and then the system clocks are set by specifying the multipliers used. The - multiplier settings are used to set the clock registers in resetprg.c. If a 24MHz clock is used and the - ICLK is 120MHz, PCLKA is 120MHz, PCLKB is 60MHz, PCLKC is 60MHz, PCLKD is 60MHz, FCLK is 60MHz, USB Clock is 48MHz, - and BCLK is 120MHz then the settings would be: - - BSP_CFG_XTAL_HZ = 24000000 - BSP_CFG_PLL_DIV = 1 (no division) - BSP_CFG_PLL_MUL = 10.0 (24MHz x 10.0 = 240MHz) - BSP_CFG_ICK_DIV = 2 : System Clock (ICLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_ICK_DIV) = 120MHz - BSP_CFG_PCKA_DIV = 2 : Peripheral Clock A (PCLKA) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKA_DIV) = 120MHz - BSP_CFG_PCKB_DIV = 4 : Peripheral Clock B (PCLKB) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKB_DIV) = 60MHz - BSP_CFG_PCKC_DIV = 4 : Peripheral Clock C (PCLKC) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKC_DIV) = 60MHz - BSP_CFG_PCKD_DIV = 4 : Peripheral Clock D (PCLKD) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKD_DIV) = 60MHz - BSP_CFG_FCK_DIV = 4 : Flash IF Clock (FCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_FCK_DIV) = 60MHz - BSP_CFG_BCK_DIV = 2 : External Bus Clock (BCK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_BCK_DIV) = 120MHz - BSP_CFG_UCK_DIV = 5 : USB Clock (UCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_UCK_DIV) = 48MHz -*/ - -/* Input clock frequency in Hz (XTAL or EXTAL). */ -#define BSP_CFG_XTAL_HZ (12000000) // <-- Updated by GUI. Do not edit this value manually - -/* The HOCO can operate at several different frequencies. Choose which one using the macro below. - Available frequency settings: - 0 = 16MHz (default) - 1 = 18MHz - 2 = 20MHz -*/ -#define BSP_CFG_HOCO_FREQUENCY (0) // <-- Updated by GUI. Do not edit this value manually - -/* PLL clock source (PLLSRCEL). Choose which clock source to input to the PLL circuit. - Available clock sources: - 0 = Main clock (default) - 1 = HOCO -*/ -#define BSP_CFG_PLL_SRC (0) // <-- Updated by GUI. Do not edit this value manually - -/* PLL Input Frequency Division Ratio Select (PLIDIV). - Available divisors = /1 (no division), /2, /3 -*/ -#define BSP_CFG_PLL_DIV (1) // <-- Updated by GUI. Do not edit this value manually - -/* PLL Frequency Multiplication Factor Select (STC). - Available multipliers = x10.0 to x30.0 in 0.5 increments (e.g. 10.0, 10.5, 11.0, 11.5, ..., 29.0, 29.5, 30.0) -*/ -#define BSP_CFG_PLL_MUL (20.0) // <-- Updated by GUI. Do not edit this value manually - -/* System Clock Divider (ICK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_ICK_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock A Divider (PCKA). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKA_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock B Divider (PCKB). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKB_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock C Divider (PCKC). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKC_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock D Divider (PCKD). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKD_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* External Bus Clock Divider (BCLK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_BCK_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Flash IF Clock Divider (FCK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_FCK_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* USB Clock Divider Select. - Available divisors = /2, /3, /4, /5 -*/ -#define BSP_CFG_UCK_DIV (5) // <-- Updated by GUI. Do not edit this value manually - -/* Configure BCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency, 2= BCK/2 frequency -*/ -#define BSP_CFG_BCLK_OUTPUT (0) // <-- Updated by GUI. Do not edit this value manually - -/* Configure SDCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency -*/ -#define BSP_CFG_SDCLK_OUTPUT (0) // <-- Updated by GUI. Do not edit this value manually - -/* Main Clock Oscillator Wait Time (MOSCWTCR). - The value of MOSCWTCR register required for correspondence with the waiting time required to secure stable oscillation - by the main clock oscillator is obtained by using the maximum frequency for fLOCO in the formula below. - - BSP_CFG_MOSC_WAIT_TIME > (tMAINOSC * (fLOCO_max) + 16)/32 - (tMAINOSC: main clock oscillation stabilization time; fLOCO_max: maximum frequency for fLOCO) - - If tMAINOSC is 9.98 ms and fLOCO_max is 264 kHz (the period is 1/3.78 us), the formula gives - BSP_CFG_MOSC_WAIT_TIME > (9.98 ms * (264 kHZ) + 16)/32 = 82.83, so set the BSP_CFG_MOSC_WAIT_TIME to 83(53h). - - NOTE: The waiting time is not required when an external clock signal is input for the main clock oscillator. - Set the BSP_CFG_MOSC_WAIT_TIME to 00h. -*/ -#define BSP_CFG_MOSC_WAIT_TIME (0x53) // <-- Updated by GUI. Do not edit this value manually - -/* Sub-Clock Oscillator Wait Time (SOSCWTCR). - The value of SOSCWTCR register required for correspondence with the expected time to secure settling of oscillation - by the sub-clock oscillator is obtained by using the maximum frequency for fLOCO in the formula below. - - BSP_CFG_SOSC_WAIT_TIME > (tSUBOSC * (fLOCO_max) + 16)/16384 - (tSUBOSC: sub-clock oscillation stabilization time; fLOCO_max: maximum frequency for fLOCO) - - If tSUBOSC is 2 s and fLOCO is 264 kHz (the period is 1/3.78 us), the formula gives - BSP_CFG_SOSC_WAIT_TIME > (2 s * (264 kHz) +16)/16384 = 32.22, so set the BSP_CFG_SOSC_WAIT_TIME bits to 33(21h). -*/ -#define BSP_CFG_SOSC_WAIT_TIME (0x21) // <-- Updated by GUI. Do not edit this value manually - -/* Configure WDT and IWDT settings. - OFS0 - Option Function Select Register 0 - b31:b29 Reserved When reading, these bits return the value written by the user. The write value should be 1. - b28 WDTRSTIRQS - WDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b27:b26 WDTRPSS - WDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b25:b24 WDTRPES - WDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b23:b20 WDTCKS - WDT Clock Frequency Division Ratio - (1=PCLKB/4, 4=PCLKB/64, 0xF=PCLKB/128, 6=PCLKB/256, - 7=PCLKB/2048, 8=PCLKB/8192) - b19:b18 WDTTOPS - WDT Timeout Period Select (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b17 WDTSTRT - WDT Start Mode Select - (0=auto-start after reset, 1=halt after reset) - b16:b15 Reserved (set to 1) - b14 IWDTSLCSTP - IWDT Sleep Mode Count Stop Control - (0=can't stop count, 1=stop w/some low power modes) - b13 Reserved (set to 1) - b12 IWDTRSTIRQS - IWDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b11:b10 IWDTRPSS - IWDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b9:b8 IWDTRPES - IWDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b7:b4 IWDTCKS - IWDT Clock Frequency Division Ratio - (0=none, 2=/16, 3 = /32, 4=/64, 0xF=/128, 5=/256) - b3:b2 IWDTTOPS - IWDT Timeout Period Select - (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b1 IWDTSTRT - IWDT Start Mode Select - (0=auto-start after reset, 1=halt after reset) - b0 Reserved (set to 1) */ -#define BSP_CFG_OFS0_REG_VALUE (0xFFFFFFFF) // <-- Updated by GUI. Do not edit this value manually //Disable by default - -/* Configure whether voltage detection 0 circuit and HOCO are enabled after reset. - OFS1 - Option Function Select Register 1 - b31:b9 Reserved (set to 1) - b8 HOCOEN - Enable/disable HOCO oscillation after a reset (0=enable, 1=disable) - b7:b3 Reserved When reading, these bits return the value written by the user. The write value should be 1. - b2 LVDAS - Voltage Detection 0 circuit start (1=monitoring disabled) - b1:b0 VDSEL - Voltage Detection 0 level select (1=2.94v, 2=2.87v, 3=2.80v) - NOTE: If HOCO oscillation is enabled by OFS1.HOCOEN, HOCO frequency is 16MHz. - BSP_CFG_HOCO_FREQUENCY should be default value. -*/ -#define BSP_CFG_OFS1_REG_VALUE (0xFFFFFFFF) // <-- Updated by GUI. Do not edit this value manually //Disable by default - -/* Both RX64M and RX71M MCU's have a 'Trusted Memory' feature. This feature protects against - * illicit reading of blocks 8 and 9 in the code flash memory. This feature is disabled by default - * but may be enabled by setting the below to (0). - * Only 0 and 0xFFFFFFFF are valid settings. */ -#define BSP_CFG_TRUSTED_MODE_FUNCTION (0xFFFFFFFF) //Disable by default - -/* This macro lets other modules no if a RTOS is being used. - 0 = RTOS is not used. - 1 = FreeRTOS is used. - 2 = embOS is used.(This is not available.) - 3 = MicroC_OS is used.(This is not available.) - 4 = RI600V4 or RI600PX is used.(This is not available.) -*/ -/* As of today, we need a workaround to avoid the problem that the Smart Configurator does not have such GUI - yet and the BSP_CFG_RTOS_USED here is set to (0) every time of code generation by the Smart Configurator. - The BSP_CFG_RTOS_USED is set to (1) in the r_bsp.h instead of here so that the setting of here is ignored. -*/ -#if !defined(BSP_CFG_RTOS_USED) || (BSP_CFG_RTOS_USED == 0) -#if defined(BSP_CFG_RTOS_USED) -#undef BSP_CFG_RTOS_USED -#endif -#define BSP_CFG_RTOS_USED (0) // <-- Updated by GUI. Do not edit this value manually -#endif - -/* This macro is used to select which CMT channel used for system timer of RTOS. - * The setting of this macro is only valid if the macro BSP_CFG_RTOS_USED is set to a value other than 0. */ -#if (BSP_CFG_RTOS_USED != 0) -/* Setting value. - * 0 = CMT channel 0 used for system timer of RTOS (recommended to be used for RTOS). - * 1 = CMT channel 1 used for system timer of RTOS. - * 2 = CMT channel 2 used for system timer of RTOS. - * 3 = CMT channel 3 used for system timer of RTOS. - * Others = Invalid. */ -#define BSP_CFG_RTOS_SYSTEM_TIMER (0) -#endif - -/* By default modules will use global locks found in mcu_locks.c. If the user is using a RTOS and would rather use its - locking mechanisms then they can change this macro. - NOTE: If '1' is chosen for this macro then the user must also change the next macro 'BSP_CFG_USER_LOCKING_TYPE'. - 0 = Use default locking (non-RTOS) - 1 = Use user defined locking mechanism. -*/ -#define BSP_CFG_USER_LOCKING_ENABLED (0) - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to redefine the typedef - that is used for the locks. If the user is using a RTOS then they would likely redefine the typedef to be - a semaphore/mutex type of their RTOS. Use the macro below to set the type that will be used for the locks. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_TYPE bsp_lock_t - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to define the functions - that will handle the locking and unlocking. These functions should be defined below. - If BSP_CFG_USER_LOCKING_ENABLED is != 0: - R_BSP_HardwareLock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION(mcu_lock_t hw_index) - R_BSP_HardwareUnlock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION(mcu_lock_t hw_index) - NOTE:With these functions the index into the array holding the global hardware locks is passed as the parameter. - R_BSP_SoftwareLock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - R_BSP_SoftwareUnlock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - NOTE:With these functions the actual address of the lock to use is passed as the parameter. - NOTE: These functions must return a boolean. If lock was obtained or released successfully then return true. Else, - return false. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION my_hw_locking_function -#define BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION my_hw_unlocking_function -#define BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION my_sw_locking_function -#define BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION my_sw_unlocking_function - -/* If the user would like to determine if a warm start reset has occurred, then they may enable one or more of the - * following callback definitions AND provide a call back function name for the respective callback - * function (to be defined by the user). Setting BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED = 1 will result - * in a callback to the user defined my_sw_warmstart_prec_function just prior to the initialization of the C - * runtime environment by resetprg. - * - * Setting BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED = 1 will result in a callback to the user defined - * my_sw_warmstart_postc_function just after the initialization of the C runtime environment by resetprg. - */ -#define BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_PRE_C_FUNCTION my_sw_warmstart_prec_function - -#define BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_POST_C_FUNCTION my_sw_warmstart_postc_function - -/* By default FIT modules will check input parameters to be valid. This is helpful during development but some users - will want to disable this for production code. The reason for this would be to save execution time and code space. - This macro is a global setting for enabling or disabling parameter checking. Each FIT module will also have its - own local macro for this same purpose. By default the local macros will take the global value from here though - they can be overridden. Therefore, the local setting has priority over this global setting. Disabling parameter - checking should only used when inputs are known to be good and the increase in speed or decrease in code space is - needed. - 0 = Global setting for parameter checking is disabled. - 1 = Global setting for parameter checking is enabled (Default). -*/ -#define BSP_CFG_PARAM_CHECKING_ENABLE (1) - -/* This macro is used to define the voltage that is supplied to the MCU (Vcc). This macro is defined in millivolts. This - macro does not actually change anything on the MCU. Some FIT modules need this information so it is defined here. */ -#define BSP_CFG_MCU_VCC_MV (3300) // <-- Updated by GUI. Do not edit this value manually - -/* Allow initialization of auto-generated peripheral initialization code by Smart Configurator tool. - When not using the Smart Configurator, set the value of BSP_CFG_CONFIGURATOR_SELECT to 0. - 0 = Disabled (default) - 1 = Smart Configurator initialization code used -*/ -#define BSP_CFG_CONFIGURATOR_SELECT (1) // <-- Updated by GUI. Do not edit this value manually - -/* For some BSP functions, it is necessary to ensure that, while these functions are executing, interrupts from other - FIT modules do not occur. By controlling the IPL, these functions disable interrupts that are at or below the - specified interrupt priority level. - This macro sets the IPL. Range is 0x0 - 0xF. - Please set this macro more than IPR for other FIT module interrupts. - The default value is 0xF (maximum value). - Don't change if there is no special processing with higher priority than all fit modules. -*/ -#define BSP_CFG_FIT_IPL_MAX (0xF) - -/* This macro is used to select which SCI channel used for debug serial terminal. - */ -#define MY_BSP_CFG_SERIAL_TERM_SCI (7) - -#endif /* R_BSP_CONFIG_REF_HEADER_FILE */ - - - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_bsp_config_readme.txt b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_bsp_config_readme.txt deleted file mode 100644 index 6a9002cf4f3..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_bsp_config_readme.txt +++ /dev/null @@ -1,12 +0,0 @@ -FIT r_config folder -------------------- -The purpose of the r_config folder is to provide one place where the user can store all of their FIT configuration -files. Putting the files in one place makes them easy to find, backup, and put in a version control system. - -FIT Modules are distributed with a reference configuration file. These files end with '_reference.h'. For example, -the reference configuration file for the r_bsp is named r_bsp_config_reference.h. Reference configuration files are -provided so that the user always has a known-good configuration to revert to. When adding a FIT Module to a project the -user should copy this reference configuration file to this folder and remove '_reference' from the filename -(r_bsp_config_reference.h is renamed to r_bsp_config.h). For the r_bsp the reference configuration file can be found in -the 'board' folder for the currently chosen development board. For other FIT Modules the reference configuration file -can be found in the 'ref' folder of the FIT Module. diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_bsp_interrupt_config.h b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_bsp_interrupt_config.h deleted file mode 100644 index ee6bd8fb8d0..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_bsp_interrupt_config.h +++ /dev/null @@ -1,236 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_interrupt_config.h -* Description : This module maps Interrupt A & B interrupts. More information on how this is done is given below. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 14.01.2014 1.00 First Release -* : 05.15.2017 1.10 Changed the name of the following macro definition, because there was a mistake -* in the name of macro definition. -* - From XXX_TPU0_TGI0V to XXX_TPU0_TCI0V. -* - From XXX_TPU1_TGI1V to XXX_TPU1_TCI1V. -* - From XXX_TPU1_TGI1U to XXX_TPU1_TCI1U. -* - From XXX_TPU2_TGI2V to XXX_TPU2_TCI2V. -* - From XXX_TPU2_TGI2U to XXX_TPU2_TCI2U. -* - From XXX_TPU3_TGI3V to XXX_TPU3_TCI3V. -* - From XXX_TPU4_TGI4V to XXX_TPU4_TCI4V. -* - From XXX_TPU4_TGI4U to XXX_TPU4_TCI4U. -* - From XXX_TPU5_TGI5V to XXX_TPU5_TCI5V. -* - From XXX_TPU5_TGI5U to XXX_TPU5_TCI5U. -* - From XXX_MTU0_TGIV0 to XXX_MTU0_TCIV0. -* - From XXX_MTU1_TGIV1 to XXX_MTU1_TCIV1. -* - From XXX_MTU1_TGIU1 to XXX_MTU1_TCIU1. -* - From XXX_MTU2_TGIV2 to XXX_MTU2_TCIV2. -* - From XXX_MTU2_TGIU2 to XXX_MTU2_TCIU2. -* - From XXX_MTU3_TGIV3 to XXX_MTU3_TCIV3. -* - From XXX_MTU4_TGIV4 to XXX_MTU4_TCIV4. -* - From XXX_MTU6_TGIV6 to XXX_MTU6_TCIV6. -* - From XXX_MTU7_TGIV7 to XXX_MTU7_TCIV7. -* - From XXX_MTU8_TGIV8 to XXX_MTU8_TCIV8. -* Removed the following macro definition. -* - BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIU8 -***********************************************************************************************************************/ -#ifndef R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE -#define R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/* If you wish to use one of the interrupt below then set the appropriate configuration macro to the vector number you - * wish to use for that interrupt. For example, if you want to use the RTC carry interrupt (CUP) at vector 176 then you - * would do the following: - * - * #define BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP 176 - */ - -/* Interrupt B Sources. - * -Valid vector numbers are 128-207. - * -There are more vector slots for B sources than actual B sources. By default all B sources are mapped. - * -If using the 'TPU1, TGI1A' interrupt it must be vector 144 or 145. It is set to 144 by default. - * -If a peripheral interrupt is going to be used to wake up the MCU from All-Module Clock Stop Mode then it must be - * in a vector between 146 to 157. Peripheral interrupts that can do this are TMR interrupts and the 'USB0, USBI0' - * interrupt. By default the TMR interrupts are chosen since there are 12 of them and there are 12 slots. - */ -#define BSP_MAPPED_INT_CFG_B_VECT_CMT2_CMI2 128 -#define BSP_MAPPED_INT_CFG_B_VECT_CMT3_CMI3 129 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIA0 146 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIB0 147 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_OVI0 148 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIA1 149 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIB1 150 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_OVI1 151 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIA2 152 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIB2 153 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_OVI2 154 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIA3 155 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIB3 156 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_OVI3 157 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0A 130 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0B 131 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0C 132 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0D 133 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TCI0V 134 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1A 144 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1B 135 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1V 136 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1U 137 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2A 138 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2B 139 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2V 140 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2U 141 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3A 142 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3B 143 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3C 145 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3D 158 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TCI3V 159 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4A 160 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4B 161 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4V 162 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4U 163 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5A 164 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5B 165 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5V 166 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5U 167 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC0I0 168 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC1I0 169 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC0I0 170 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC1I0 171 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC0I1 172 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC1I1 173 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC0I1 174 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC1I1 175 -#define BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP 176 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXF0 177 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXF0 178 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXM0 179 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXM0 180 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXF1 181 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXF1 182 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXM1 183 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXM1 184 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN2_RXF2 185 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN2_TXF2 186 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN2_RXM2 187 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN2_TXM2 188 -#define BSP_MAPPED_INT_CFG_B_VECT_USB0_USBI0 189 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12ADI0 190 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GBADI0 191 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12ADI1 192 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GBADI1 193 -#define BSP_MAPPED_INT_CFG_B_VECT_DES_DESEND 194 -#define BSP_MAPPED_INT_CFG_B_VECT_SHA_SHADEND 195 -#define BSP_MAPPED_INT_CFG_B_VECT_SHA_SHAEND 196 -#define BSP_MAPPED_INT_CFG_B_VECT_RNG_RNGEND 197 -#define BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR18I 198 -#define BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR19I 199 - -/* Interrupt A Sources. - * -Valid vector numbers are 208-255. - * -There are more A sources than A vector slots. By default none of the GPT interrupts are mapped. - * -If using the 'MTU1, TGI1A' interrupt it must be vector 208 or 209. It is set to 208 by default. - */ -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIA0 209 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIB0 210 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIC0 211 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGID0 212 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TCIV0 213 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIE0 214 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIF0 215 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIA1 208 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIB1 216 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIV1 217 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIU1 218 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIA2 219 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIB2 220 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIV2 221 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIU2 222 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIA3 223 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIB3 224 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIC3 225 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGID3 226 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TCIV3 227 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIA4 228 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIB4 229 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIC4 230 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGID4 231 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TCIV4 232 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIU5 233 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIV5 234 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIW5 235 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIA6 236 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIB6 237 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIC6 238 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGID6 239 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TCIV6 240 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIA7 241 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIB7 242 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIC7 243 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGID7 244 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TCIV7 245 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIA8 246 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIB8 247 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIC8 248 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGID8 249 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TCIV8 250 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCIA0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCIB0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCIC0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCID0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GDTE0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCIE0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCIF0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCIV0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCIU0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPTA_ETGIN -#define BSP_MAPPED_INT_CFG_A_VECT_GPTA_ETGIP -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCIA1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCIB1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCIC1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCID1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GDTE1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCIE1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCIF1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCIV1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCIU1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCIA2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCIB2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCIC2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCID2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GDTE2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCIE2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCIF2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCIV2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCIU2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCIA3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCIB3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCIC3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCID3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GDTE3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCIE3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCIF3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCIV3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCIU3 -#define BSP_MAPPED_INT_CFG_A_VECT_EPTPC_IPLS 251 -#define BSP_MAPPED_INT_CFG_A_VECT_AES_AESRDY 252 -#define BSP_MAPPED_INT_CFG_A_VECT_AES_AESEND 253 - -#endif /* R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE */ diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_byteq_config.h b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_byteq_config.h deleted file mode 100644 index 0b4d4f9bb52..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_byteq_config.h +++ /dev/null @@ -1,59 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_byteq_config.h -* Description : Configures the byte queue memory allocation -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 24.07.2013 1.00 Initial Release -* : 11.21.2014 1.20 Removed dependency to BSP -* : 30.09.2015 1.50 Added dependency to BSP -***********************************************************************************************************************/ -#ifndef BYTEQ_CONFIG_H -#define BYTEQ_CONFIG_H - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - Available settings: - BSP_CFG_PARAM_CHECKING_ENABLE: - Utilizes the system default setting - 1: - Includes parameter checking - 0: - Compiles out parameter checking -*/ -#define BYTEQ_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY IF SHOULD USE MALLOC() TO ALLOCATE MEMORY FOR QUEUE CONTROL BLOCKS */ -#define BYTEQ_CFG_USE_HEAP_FOR_CTRL_BLKS (0) - -/* SPECIFY NUMBER OF STATIC QUEUE CONTROL BLOCKS TO SUPPORT */ -/* valid only when BYTEQ_USE_HEAP_FOR_CTRL_BLKS is set to 0 */ -#define BYTEQ_CFG_MAX_CTRL_BLKS (4) - - -#endif /* BYTEQ_CONFIG_H */ diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_ether_rx_config.h b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_ether_rx_config.h deleted file mode 100644 index ea6b31eee73..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_ether_rx_config.h +++ /dev/null @@ -1,119 +0,0 @@ -/* Generated configuration header file - do not edit */ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_ether_rx_config.h - * Version : 1.04 - * Description : Ethernet module device driver - ***********************************************************************************************************************/ -/********************************************************************************************************************** - * History : DD.MM.YYYY Version Description - * : 22.07.2014 1.00 First Release - * : 31.03.2016 1.01 Added changes for RX63N. - * : 01.10.2016 1.02 Added changes for RX65N. - * : 01.10.2017 1.03 Added changes for RX65N-2MB. - * : 08.01.2018 1.04 Changed comment. - ***********************************************************************************************************************/ - -/* Guards against multiple inclusion */ -#ifndef R_ETHER_RX_CONFIG_H - #define R_ETHER_RX_CONFIG_H - -/*********************************************************************************************************************** - Macro definitions - ***********************************************************************************************************************/ - -/* Ethernet interface select. - 0 = MII (Media Independent Interface) - 1 = RMII (Reduced Media Independent Interface) - */ - #define ETHER_CFG_MODE_SEL (1) - -/* PHY-LSI address setting for ETHER0/1. - Please set the value 31 ETHER_CFG_CH0_PHY_ADDRESS when use default setting of the RSK+RX63N. - Please set the value 30 ETHER_CFG_CH0_PHY_ADDRESS when use default setting of the RSK+RX65N/RSK+RX65N_2MB. - Please set the value 0 ETHER_CFG_CH0_PHY_ADDRESS and value 1 ETHER_CFG_CH1_PHY_ADDRESS when use default setting of the RSK+RX64M/RSK+RX71M. - */ - #define ETHER_CFG_CH0_PHY_ADDRESS (0) /* Please define the PHY-LSI address in the range of 0-31. */ - #define ETHER_CFG_CH1_PHY_ADDRESS (1) /* Please define the PHY-LSI address in the range of 0-31. */ - -/* The number of Rx descriptors. */ - #define ETHER_CFG_EMAC_RX_DESCRIPTORS (1) - -/* The number of Tx descriptors. */ - #define ETHER_CFG_EMAC_TX_DESCRIPTORS (1) - -/* Please define the size of the sending and receiving buffer in the value where one frame can surely be stored - because the driver is single-frame/single-buffer processing. */ - #define ETHER_CFG_BUFSIZE (1536) /* Must be 32-byte aligned */ - -/* EINT interrupt priority level. This definition is not used when EINT interrupt is assigned to Group interrupt. */ - #define ETHER_CFG_EINT_INT_PRIORITY (2) /* Please define the interruption level within the range of 1-15. */ - -/* Group AL1 interrupt priority level. This definition is not used when EINT interrupt is assigned to Peripheral - interrupt. */ - #define ETHER_CFG_AL1_INT_PRIORTY (2) /* Please define the interruption level within the range of 1-15. */ - -/* The register bus of PHY0/1 for ETHER0/1 select - 0 = The access of the register of PHY uses ETHER0. - 1 = The access of the register of PHY uses ETHER1. - - Please set the value 0 ETHER_CFG_CH0_PHY_ACCESS when use default setting of the RSK+RX63N. - Please set the value 0 ETHER_CFG_CH0_PHY_ACCESS when use default setting of the RSK+RX65N/RSK+RX65N_2MB. - Please set the value 1 ETHER_CFG_CH0_PHY_ACCESS and ETHER_CFG_CH1_PHY_ACCESS when use default setting of the RSK+RX64M/RSK+RX71M. - */ - #define ETHER_CFG_CH0_PHY_ACCESS (0) - #define ETHER_CFG_CH1_PHY_ACCESS (1) - -/* Define the access timing of MII/RMII register */ - #define ETHER_CFG_PHY_MII_WAIT (8) /* Plese define the value of 1 or more */ - -/* Define the waiting time for reset completion of PHY-LSI */ - #define ETHER_CFG_PHY_DELAY_RESET (0x00020000L) - -/** - * Link status read from LMON bit of ETHERC PSR register. The state is hardware dependent. - */ - #define ETHER_CFG_LINK_PRESENT (0) - -/* Use LINKSTA signal for detect link status changes - 0 = unused (use PHY-LSI status register) - 1 = use (use LINKSTA signal) - */ - #define ETHER_CFG_USE_LINKSTA (0) /* This setting is reflected in all channels */ - -/* Definition of whether or not to use KSZ8041NL of the Micrel Inc. - 0 = unused - 1 = use - */ - #define ETHER_CFG_USE_PHY_KSZ8041NL (0) - -/*********************************************************************************************************************** - Typedef definitions - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global variables - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global functions (to be accessed by other files) - ***********************************************************************************************************************/ - -#endif /* R_ETHER_RX_CONFIG_H */ diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_flash_rx_config.h b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_flash_rx_config.h deleted file mode 100644 index fbf916a0e97..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_flash_rx_config.h +++ /dev/null @@ -1,116 +0,0 @@ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_flash_rx_config_reference.h - * Description : Configures the FLASH API module for RX200 and RX600 Series MCU's. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* 12.04.2014 1.00 First Release -* 22.12.2014 1.10 Added flash type usage comments. -* 25.06.2015 1.20 Added FLASH_CFG_CODE_FLASH_RUN_FROM_ROM. -* : 12.10.2016 2.00 Modified for BSPless operation (added FLASH_CFG_USE_FIT_BSP). -***********************************************************************************************************************/ -#ifndef FLASH_CONFIG_HEADER_FILE -#define FLASH_CONFIG_HEADER_FILE - -/* Set the following value to 0 when building without using the FIT BSP Module */ -#define FLASH_CFG_USE_FIT_BSP (1) - - -/*********************************************************************************************************************** - Configuration Options - ***********************************************************************************************************************/ -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting - * Setting to 1 includes parameter checking; 0 compiles out parameter checking - */ -#define FLASH_CFG_PARAM_CHECKING_ENABLE (1) - - -/****************************************************************************** - ENABLE CODE FLASH PROGRAMMING -******************************************************************************/ -/* If you are only using data flash, set this to 0. - * Setting to 1 includes code to program the ROM area. When programming ROM, - * code must be executed from RAM, except under certain restrictions for flash - * type 3 (see section 2.14 in App Note). See section 2.13 in the App Note for - * details on how to set up code and the linker to execute code from RAM. - */ -#define FLASH_CFG_CODE_FLASH_ENABLE (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING DATA FLASH OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces data flash API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, data flash operations return immediately after the operation has been - * started. Notification of the operation completion is done via the callback - * function. - */ -#define FLASH_CFG_DATA_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING CODE FLASH (ROM) OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces ROM API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, ROM operations return immediately after the operation has been started. - * Notification of the operation completion is done via the callback function. - * When reprogramming ROM, THE RELOCATABLE VECTOR TABLE AND CORRESPONDING - * INTERRUPT ROUTINES MUST BE IN RAM. - * See sections 2.16 Usage Notes in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE CODE FLASH SELF-PROGRAMMING -******************************************************************************/ -/* Set this to 0 when programming code flash while executing in RAM. - * Set this to 1 when programming code flash while executing from another - * segment in ROM (possible only with RX64M, RX71M, RX65N-2 groups). - * See section 2.14 in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_RUN_FROM_ROM (0) - - -/****************************************************************************** - SET IPL OF FLASH READY INTERRUPT -******************************************************************************/ -#define FLASH_CFG_FLASH_READY_IPL (5) // Flash type 2 only - - -/****************************************************************************** - ENABLE OR DISABLE LOCK BIT PROTECTION -******************************************************************************/ -/* Each erasure block has a corresponding lock bit that can be used to - * protect that block from being programmed/erased after the lock bit is - * set. The use of lock bits can be used or ignored. - * Setting this to 1 will cause lock bits to be ignored and programs/erases to a - * block will not be limited. - * Setting this to 0 will cause lock bits to be used as the user configures through - * the Control command. This only applies to ROM as the DF does not have lock bits. - */ -#define FLASH_CFG_IGNORE_LOCK_BITS (1) // Flash type 2 only - - -#endif /* FLASH_CONFIG_HEADER_FILE */ diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_s12ad_rx_config.h b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_s12ad_rx_config.h deleted file mode 100644 index 0202bf133a4..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_s12ad_rx_config.h +++ /dev/null @@ -1,53 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_s12ad_rx_config.h -* Description : Configures the 12-bit A/D driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 22.07.2013 1.00 Initial Release. -* 21.04.2014 1.20 Updated for RX210 advanced features; RX110/63x support. -***********************************************************************************************************************/ -#ifndef S12AD_CONFIG_H -#define S12AD_CONFIG_H - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* - * SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting. - * Setting to 1 includes parameter checking; 0 compiles out parameter checking. - */ -#define ADC_CFG_PARAM_CHECKING_ENABLE BSP_CFG_PARAM_CHECKING_ENABLE - - -/* - * RX210 Series only; Temperature Sensor Programmable Gain Amplifier (PGA) - * SELECT PGA GAIN TO MATCH AVCC0 VOLTAGE RANGE: - * 0: 1.8V <= AVcc0 < 2.7V; default; good for all actual voltages - * 1: 2.7V <= AVcc0 < 3.6V - * 2: 3.6V <= AVcc0 < 4.5V - * 3: 4.5V <= AVcc0 <= 5.5V - */ -#define ADC_CFG_PGA_GAIN (0) - - -#endif /* S12AD_CONFIG_H */ diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_sci_rx_config.h b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_sci_rx_config.h deleted file mode 100644 index 6566d7c4a75..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_config/r_sci_rx_config.h +++ /dev/null @@ -1,171 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_config.h -* Description : Configures the SCI driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 25.09.2013 1.00 Initial Release -* 17.04.2014 1.20 Added comments for new RX110 support. -* 02.07.2014 1.30 Fixed bug that caused Group12 rx errors to only be enabled for channel 2. -* 25.11.2014 1.40 Added comments for RX113 support -* 30.09.2015 1.70 Added comments for RX23T support -* 01.10.2016 1.80 Added support for RX65N (comments and TX/RX FIFO THRESHOLD options) -* 19.12.2016 1.90 Added comments for RX24U support -* 07.03.2017 2.00 Added comments for RX130-512KB support -***********************************************************************************************************************/ -#ifndef SCI_CONFIG_H -#define SCI_CONFIG_H - -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING */ -/* Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting */ -/* Setting to 1 includes parameter checking; 0 compiles out parameter checking */ -#define SCI_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY WHETHER TO INCLUDE CODE FOR DIFFERENT SCI MODES */ -/* Setting an equate to 1 includes code specific to that mode. */ -#define SCI_CFG_ASYNC_INCLUDED (1) -#define SCI_CFG_SYNC_INCLUDED (0) -#define SCI_CFG_SSPI_INCLUDED (0) - -/* SPECIFY BYTE VALUE TO TRANSMIT WHILE CLOCKING IN DATA IN SSPI MODES */ -#define SCI_CFG_DUMMY_TX_BYTE (0xFF) - -/* SPECIFY CHANNELS TO INCLUDE SOFTWARE SUPPORT FOR 1=included, 0=not */ -/* - * NOTE: If using ASYNC mode, adjust BYTEQ_CFG_MAX_CTRL_BLKS in r_byteq_config.h - * to provide 2 queues per channel (static mode only). - * * = port connector RDKRX63N, RSKRX210, RSKRX11x - * u = channel used by the USB-UART port (G1CUSB0) - * a = this channel is used only for RX130-512KB - * RX MCU supported channels - * - * CH# 110 111 113 130 210 230 231 23T 24T 24U 63N 631 64M 71M 65N - * --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- - * CH0 X Xa X* X X X* X X X X - * CH1 X X* X* Xu X X X Xu Xu Xu X X X X X - * CH2 X X X X X Xu - * CH3 X X X X X - * CH4 X X X X X - * CH5 X X X X X X Xu X X X X X X X X - * CH6 X X X X X X X X X X X X - * CH7 X X Xu Xu X - * CH8 X Xa X X X X X X X - * CH9 X Xa X X X X X X X - * CH10 X X X - * CH11 X X X X - * CH12 X X X X X X X X X X X X -*/ - -#define SCI_CFG_CH0_INCLUDED (0) -#define SCI_CFG_CH1_INCLUDED (0) -#define SCI_CFG_CH2_INCLUDED (0) -#define SCI_CFG_CH3_INCLUDED (0) -#define SCI_CFG_CH4_INCLUDED (0) -#define SCI_CFG_CH5_INCLUDED (0) -#define SCI_CFG_CH6_INCLUDED (0) -#define SCI_CFG_CH7_INCLUDED (1) -#define SCI_CFG_CH8_INCLUDED (0) -#define SCI_CFG_CH9_INCLUDED (0) -#define SCI_CFG_CH10_INCLUDED (0) -#define SCI_CFG_CH11_INCLUDED (0) -#define SCI_CFG_CH12_INCLUDED (1) - -/* SPECIFY ASYNC MODE TX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_TX_BUFSIZ (80) -#define SCI_CFG_CH1_TX_BUFSIZ (80) -#define SCI_CFG_CH2_TX_BUFSIZ (80) -#define SCI_CFG_CH3_TX_BUFSIZ (80) -#define SCI_CFG_CH4_TX_BUFSIZ (80) -#define SCI_CFG_CH5_TX_BUFSIZ (80) -#define SCI_CFG_CH6_TX_BUFSIZ (80) -#define SCI_CFG_CH7_TX_BUFSIZ (80) -#define SCI_CFG_CH8_TX_BUFSIZ (80) -#define SCI_CFG_CH9_TX_BUFSIZ (80) -#define SCI_CFG_CH10_TX_BUFSIZ (80) -#define SCI_CFG_CH11_TX_BUFSIZ (80) -#define SCI_CFG_CH12_TX_BUFSIZ (80) - -/* SPECIFY ASYNC MODE RX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_RX_BUFSIZ (80) -#define SCI_CFG_CH1_RX_BUFSIZ (80) -#define SCI_CFG_CH2_RX_BUFSIZ (80) -#define SCI_CFG_CH3_RX_BUFSIZ (80) -#define SCI_CFG_CH4_RX_BUFSIZ (80) -#define SCI_CFG_CH5_RX_BUFSIZ (80) -#define SCI_CFG_CH6_RX_BUFSIZ (80) -#define SCI_CFG_CH7_RX_BUFSIZ (80) -#define SCI_CFG_CH8_RX_BUFSIZ (80) -#define SCI_CFG_CH9_RX_BUFSIZ (80) -#define SCI_CFG_CH10_RX_BUFSIZ (80) -#define SCI_CFG_CH11_RX_BUFSIZ (80) -#define SCI_CFG_CH12_RX_BUFSIZ (80) - -/* -* ENABLE TRANSMIT END INTERRUPT (ASYNCHRONOUS) -* This interrupt only occurs when the last bit of the last byte of data -* has been sent and the transmitter has become idle. The interrupt calls -* the user's callback function specified in R_SCI_Open() and passes it an -* SCI_EVT_TEI event. A typical use of this feature is to disable an external -* transceiver to save power. It would then be up to the user's code to -* re-enable the transceiver before sending again. Not including this feature -* reduces code space used by the interrupt. Note that this equate is only -* for including the TEI code. The interrupt itself must be enabled using an -* R_SCI_Control(hdl, SCI_CMD_EN_TEI, NULL) call. -*/ -#define SCI_CFG_TEI_INCLUDED (0) /* 1=included, 0=not */ - -/* -* SET GROUP12 (RECEIVER ERROR) INTERRUPT PRIORITY; RX63N/631 ONLY -* This #define sets the priority level for the interrupt that handles -* receiver overrun, framing, and parity errors for all SCI channels -* on the RX63N/631. It is ignored for all other parts. -*/ -#define SCI_CFG_RXERR_PRIORITY (3) /* (RX63N/631 ONLY) 1 lowest, 15 highest */ - -/* -* SET GROUPBL0 (ERI, TEI) INTERRUPT PRIORITY; RX64M/RX71M/RX65N ONLY -* SET GROUPBL1, GROUPAL0 (ERI,TEI) INTERRUPT PRIORITY; RX65N ONLY -* This sets the priority level for receiver overrun, framing, and parity errors -* as well as TEI interrupts for all SCI channels. -*/ -#define SCI_CFG_ERI_TEI_PRIORITY (3) /* (RX64M/RX71M/RX65N ONLY) 1 lowest, 15 highest */ - -/* ENABLE TX/RX FIFO; (SCIi supported MCU ONLY) 1=included, 0=not */ -#define SCI_CFG_CH10_FIFO_INCLUDED (0) -#define SCI_CFG_CH11_FIFO_INCLUDED (0) - -/* SET TX FIFO THRESHOLD; (SCIi supported MCU ONLY) 0 lowest, 15 highest */ -/* TX FIFO THRESHOLD is invalid in Clock Synchronous Mode and Simple SPI Mode. */ -/* Set the same value for TX FIFO THRESHOLD and RX FIFO THRESHOLD in Clock Synchronous Mode and Simple SPI Mode. */ -#define SCI_CFG_CH10_TX_FIFO_THRESH (8) -#define SCI_CFG_CH11_TX_FIFO_THRESH (8) - -/* SET RX FIFO THRESHOLD; (SCIi supported MCU ONLY) 1 lowest, 15 highest */ -#define SCI_CFG_CH10_RX_FIFO_THRESH (8) -#define SCI_CFG_CH11_RX_FIFO_THRESH (8) - - -#endif /* SCI_CONFIG_H */ diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_pincfg/Pin.c b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_pincfg/Pin.c deleted file mode 100644 index f8f40ab689b..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_pincfg/Pin.c +++ /dev/null @@ -1,111 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : Pin.c -* Version : 1.0.2 -* Device(s) : R5F564MLCxFB -* Description : This file implements SMC pin code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -/* Start user code for include. Do not edit comment generated here */ -#include "Pin.h" -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: R_Pins_Create -* Description : This function initializes Smart Configurator pins -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Pins_Create(void) -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set ET0_MDC pin */ - MPC.P72PFS.BYTE = 0x11U; - PORT7.PMR.BYTE |= 0x04U; - - /* Set ET0_MDIO pin */ - MPC.P71PFS.BYTE = 0x11U; - PORT7.PMR.BYTE |= 0x02U; - - /* Set REF50CK0 pin */ - MPC.P76PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x40U; - - /* Set RMII0_CRS_DV pin */ - MPC.P83PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x08U; - - /* Set RMII0_RXD0 pin */ - MPC.P75PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x20U; - - /* Set RMII0_RXD1 pin */ - MPC.P74PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x10U; - - /* Set RMII0_RX_ER pin */ - MPC.P77PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x80U; - - /* Set RMII0_TXD0 pin */ - MPC.P81PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x02U; - - /* Set RMII0_TXD1 pin */ - MPC.P82PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x04U; - - /* Set RMII0_TXD_EN pin */ - MPC.P80PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x01U; - - /* Set RXD7 pin */ - MPC.P92PFS.BYTE = 0x0AU; - PORT9.PMR.BYTE |= 0x04U; - - /* Set TXD7 pin */ - PORT9.PODR.BYTE |= 0x01U; - MPC.P90PFS.BYTE = 0x0AU; - PORT9.PDR.BYTE |= 0x01U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_pincfg/Pin.h b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_pincfg/Pin.h deleted file mode 100644 index 5a207267b88..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_pincfg/Pin.h +++ /dev/null @@ -1,50 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : Pin.h -* Version : 1.0.2 -* Device(s) : R5F564MLCxFB -* Description : This file implements SMC pin code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef PIN_H -#define PIN_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Pins_Create(void); -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_pincfg/r_ether_rx_pinset.c b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_pincfg/r_ether_rx_pinset.c deleted file mode 100644 index 75cb3960a9a..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_pincfg/r_ether_rx_pinset.c +++ /dev/null @@ -1,90 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_ether_rx_pinset.c -* Version : 1.0.2 -* Device(s) : R5F564MLCxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_ether_rx_pinset.h" -#include "platform.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: R_ETHER_PinSet_ETHERC0_RMII -* Description : This function initializes pins for r_ether_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_ETHER_PinSet_ETHERC0_RMII() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set REF50CK0 pin */ - MPC.P76PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B6 = 1U; - - /* Set RMII0_TXD_EN pin */ - MPC.P80PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B0 = 1U; - - /* Set RMII0_TXD1 pin */ - MPC.P82PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B2 = 1U; - - /* Set RMII0_TXD0 pin */ - MPC.P81PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B1 = 1U; - - /* Set RMII0_RXD1 pin */ - MPC.P74PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B4 = 1U; - - /* Set RMII0_RXD0 pin */ - MPC.P75PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B5 = 1U; - - /* Set RMII0_RX_ER pin */ - MPC.P77PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B7 = 1U; - - /* Set RMII0_CRS_DV pin */ - MPC.P83PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B3 = 1U; - - /* Set ET0_MDC pin */ - MPC.P72PFS.BYTE = 0x11U; - PORT7.PMR.BIT.B2 = 1U; - - /* Set ET0_MDIO pin */ - MPC.P71PFS.BYTE = 0x11U; - PORT7.PMR.BIT.B1 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_pincfg/r_ether_rx_pinset.h b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_pincfg/r_ether_rx_pinset.h deleted file mode 100644 index 36a0aa4b7c2..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_pincfg/r_ether_rx_pinset.h +++ /dev/null @@ -1,41 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_ether_rx_pinset.h -* Version : 1.0.2 -* Device(s) : R5F564MLCxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef R_ETHER_RX_H -#define R_ETHER_RX_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -void R_ETHER_PinSet_ETHERC0_RMII(); - -#endif diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_pincfg/r_pinset.h b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_pincfg/r_pinset.h deleted file mode 100644 index 78eb1dfbb97..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_pincfg/r_pinset.h +++ /dev/null @@ -1,35 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_pinset.h.h -* Version : 1.0.1 -* Description : Declares all pin code headers into a single file -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef R_PINSET_H -#define R_PINSET_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_sci_rx_pinset.h" -#include "r_ether_rx_pinset.h" - -#endif /* R_PINSET_H */ diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_pincfg/r_sci_rx_pinset.c b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_pincfg/r_sci_rx_pinset.c deleted file mode 100644 index e850756e0df..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_pincfg/r_sci_rx_pinset.c +++ /dev/null @@ -1,58 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_pinset.c -* Version : 1.0.2 -* Device(s) : R5F564MLCxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_sci_rx_pinset.h" -#include "platform.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: R_SCI_PinSet_SCI7 -* Description : This function initializes pins for r_sci_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_SCI_PinSet_SCI7() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set RXD7/SMISO7 pin */ - MPC.P92PFS.BYTE = 0x0AU; - PORT9.PMR.BIT.B2 = 1U; - - /* Set TXD7/SMOSI7 pin */ - MPC.P90PFS.BYTE = 0x0AU; - PORT9.PMR.BIT.B0 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_pincfg/r_sci_rx_pinset.h b/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_pincfg/r_sci_rx_pinset.h deleted file mode 100644 index f02781f4708..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-csplus/src/smc_gen/r_pincfg/r_sci_rx_pinset.h +++ /dev/null @@ -1,41 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_pinset.h -* Version : 1.0.2 -* Device(s) : R5F564MLCxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef R_SCI_RX_H -#define R_SCI_RX_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -void R_SCI_PinSet_SCI7(); - -#endif diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.cproject b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.cproject deleted file mode 100644 index c774da3a511..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.cproject +++ /dev/null @@ -1,185 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.gitignore b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.gitignore deleted file mode 100644 index 11e355d8bc7..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.gitignore +++ /dev/null @@ -1,3 +0,0 @@ -/HardwareDebug/ -/.settings/ -/trash/ \ No newline at end of file diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.project b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.project deleted file mode 100644 index 21ec9917e42..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.project +++ /dev/null @@ -1,536 +0,0 @@ - - - aws_demos - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - application_code - 2 - PARENT-1-PROJECT_LOC/common/application_code - - - config_files - 2 - PARENT-1-PROJECT_LOC/common/config_files - - - lib - 2 - virtual:/virtual - - - application_code/common_demos - 2 - virtual:/virtual - - - lib/aws - 2 - virtual:/virtual - - - lib/third_party - 2 - virtual:/virtual - - - src/FIT_modified_code - 2 - virtual:/virtual - - - src/amazon_freertos_common - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/amazon_freertos_common - - - application_code/common_demos/include - 2 - AWS_IOT_MCU_ROOT/demos/common/include - - - application_code/common_demos/source - 2 - virtual:/virtual - - - lib/aws/FreeRTOS - 2 - AWS_IOT_MCU_ROOT/lib/FreeRTOS - - - lib/aws/FreeRTOS-Plus-TCP - 2 - AWS_IOT_MCU_ROOT/lib/FreeRTOS-Plus-TCP - - - lib/aws/bufferpool - 2 - AWS_IOT_MCU_ROOT/lib/bufferpool - - - lib/aws/crypto - 2 - AWS_IOT_MCU_ROOT/lib/crypto - - - lib/aws/greengrass - 2 - AWS_IOT_MCU_ROOT/lib/greengrass - - - lib/aws/include - 2 - AWS_IOT_MCU_ROOT/lib/include - - - lib/aws/mqtt - 2 - AWS_IOT_MCU_ROOT/lib/mqtt - - - lib/aws/pkcs11 - 2 - AWS_IOT_MCU_ROOT/lib/pkcs11/portable/renesas/rx64m-gr-kaede - - - lib/aws/secure_sockets - 2 - AWS_IOT_MCU_ROOT/lib/secure_sockets/portable/renesas/rx64m-gr-kaede - - - lib/aws/shadow - 2 - AWS_IOT_MCU_ROOT/lib/shadow - - - lib/aws/tls - 2 - AWS_IOT_MCU_ROOT/lib/tls - - - lib/aws/utils - 2 - AWS_IOT_MCU_ROOT/lib/utils - - - lib/aws/wifi - 2 - AWS_IOT_MCU_ROOT/lib/wifi/portable/renesas/rx64m-gr-kaede - - - lib/third_party/jsmn - 2 - AWS_IOT_MCU_ROOT/lib/third_party/jsmn - - - lib/third_party/mbedtls - 2 - virtual:/virtual - - - lib/third_party/mcu_vendor - 2 - virtual:/virtual - - - lib/third_party/pkcs11 - 2 - AWS_IOT_MCU_ROOT/lib/third_party/pkcs11 - - - lib/third_party/tinycbor - 2 - AWS_IOT_MCU_ROOT/lib/third_party/tinycbor - - - src/FIT_modified_code/Please exclude unnecessary r_xxx from build - 1 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/.files/Please%20exclude%20unnecessary%20r_xxx%20from%20build - - - src/FIT_modified_code/attention!.txt - 1 - PROJECT_LOC/src/attention!.txt - - - src/FIT_modified_code/r_bsp - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_bsp - - - src/FIT_modified_code/r_byteq - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_byteq - - - src/FIT_modified_code/r_cmt_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_cmt_rx - - - src/FIT_modified_code/r_ether_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_ether_rx - - - src/FIT_modified_code/r_flash_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_flash_rx - - - src/FIT_modified_code/r_riic_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_riic_rx - - - src/FIT_modified_code/r_s12ad_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_s12ad_rx - - - src/FIT_modified_code/r_sci_iic_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_iic_rx - - - src/FIT_modified_code/r_sci_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_rx - - - application_code/common_demos/include/aws_application_version.h - 1 - AWS_IOT_MCU_ROOT/demos/common/include/aws_application_version.h - - - application_code/common_demos/include/aws_clientcredential_keys.h - 1 - AWS_IOT_MCU_ROOT/demos/common/include/aws_clientcredential_keys.h - - - application_code/common_demos/include/aws_dev_mode_key_provisioning.h - 1 - AWS_IOT_MCU_ROOT/demos/common/include/aws_dev_mode_key_provisioning.h - - - application_code/common_demos/source/aws_demo_runner.c - 1 - AWS_IOT_MCU_ROOT/demos/common/demo_runner/aws_demo_runner.c - - - application_code/common_demos/source/aws_dev_mode_key_provisioning.c - 1 - AWS_IOT_MCU_ROOT/demos/common/devmode_key_provisioning/aws_dev_mode_key_provisioning.c - - - application_code/common_demos/source/aws_greengrass_discovery_demo.c - 1 - AWS_IOT_MCU_ROOT/demos/common/greengrass_connectivity/aws_greengrass_discovery_demo.c - - - application_code/common_demos/source/aws_hello_world.c - 1 - AWS_IOT_MCU_ROOT/demos/common/mqtt/aws_hello_world.c - - - application_code/common_demos/source/aws_logging_task_dynamic_buffers.c - 1 - AWS_IOT_MCU_ROOT/demos/common/logging/aws_logging_task_dynamic_buffers.c - - - application_code/common_demos/source/aws_shadow_lightbulb_on_off.c - 1 - AWS_IOT_MCU_ROOT/demos/common/shadow/aws_shadow_lightbulb_on_off.c - - - application_code/common_demos/source/aws_subscribe_publish_loop.c - 1 - AWS_IOT_MCU_ROOT/demos/common/mqtt/aws_subscribe_publish_loop.c - - - application_code/common_demos/source/aws_tcp_echo_client_separate_tasks.c - 1 - AWS_IOT_MCU_ROOT/demos/common/tcp/aws_tcp_echo_client_separate_tasks.c - - - application_code/common_demos/source/aws_tcp_echo_client_single_task.c - 1 - AWS_IOT_MCU_ROOT/demos/common/tcp/aws_tcp_echo_client_single_task.c - - - lib/aws/pkcs11/aws_pkcs11_mbedtls.c - 1 - AWS_IOT_MCU_ROOT/lib/pkcs11/mbedtls/aws_pkcs11_mbedtls.c - - - lib/third_party/mbedtls/include - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mbedtls/include - - - lib/third_party/mbedtls/source - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mbedtls/library - - - lib/third_party/mcu_vendor/renesas - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas - - - - - 1545530907601 - - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-aws_demos_build_path_check_and_make.bat - - - - 1545530907607 - - 10 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false- - - - - 1537786054362 - src - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-attention!.txt - - - - 1536904742727 - src/amazon_freertos_common/compiler_support - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-ccrx - - - - 1536927312156 - src/amazon_freertos_common/network_support - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-onchip_rx_ether - - - - 1513514756448 - lib/aws/FreeRTOS/portable - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-Renesas - - - - 1513514757749 - lib/aws/FreeRTOS/portable - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-MemMang - - - - 1513514757807 - lib/aws/FreeRTOS/portable - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-* - - - - 1509693556349 - lib/aws/include/private - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-*.c - - - - 1536905062046 - lib/third_party/mcu_vendor/renesas - 10 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-tools - - - - 1536291011837 - src/FIT_modified_code/r_bsp/board - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-true-all|rx64m|generic_rx64m - - - - 1536291077902 - src/FIT_modified_code/r_bsp/mcu - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-true-all|rx64m - - - - 1513514967899 - lib/aws/FreeRTOS/portable/MemMang - 5 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-heap_4.c - - - - 1513515128489 - lib/aws/FreeRTOS/portable/Renesas - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-RX600v2 - - - - 1539520892012 - src/FIT_modified_code/r_bsp/board/all - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-true-reset_program\.S|iar_call_inits\.s - - - - 1564441882426 - src/FIT_modified_code/r_ether_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx64m - - - - 1564441856894 - src/FIT_modified_code/r_flash_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx64m - - - - 1535360922766 - src/FIT_modified_code/r_riic_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx64m - - - - 1545530870597 - src/FIT_modified_code/r_s12ad_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx64m - - - - 1535360980389 - src/FIT_modified_code/r_sci_iic_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx64m - - - - 1564441820170 - src/FIT_modified_code/r_sci_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx64m - - - - 1515504232772 - lib/aws/FreeRTOS-Plus-TCP/source/portable/BufferManagement - 5 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-BufferAllocation_2.c - - - - 1515504311064 - lib/aws/FreeRTOS-Plus-TCP/source/portable/Compiler - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-Renesas - - - - 1515491646756 - lib/aws/FreeRTOS-Plus-TCP/source/portable/NetworkInterface - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-RX - - - - 1537708651935 - src/FIT_modified_code/r_bsp/mcu/rx64m/register_access - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-ccrx - - - - - - AWS_IOT_MCU_ROOT - $%7BPARENT-4-PROJECT_LOC%7D - - - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/CodeGenerator/cgprojectDatas.datas b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/CodeGenerator/cgprojectDatas.datas deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/Dependency_Scan_Preferences.prefs b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/Dependency_Scan_Preferences.prefs deleted file mode 100644 index 52d4e3fd03b..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/Dependency_Scan_Preferences.prefs +++ /dev/null @@ -1,2 +0,0 @@ -DependecyMode=ScanBuildDep -eclipse.preferences.version=1 diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/com.renesas.cdt.managedbuild.renesas.ccrx.prefs b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/com.renesas.cdt.managedbuild.renesas.ccrx.prefs deleted file mode 100644 index e4449c99ff6..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/com.renesas.cdt.managedbuild.renesas.ccrx.prefs +++ /dev/null @@ -1,6 +0,0 @@ -com.renesas.cdt.managedbuild.renesas.ccrx.common.option.checkRtos=unusedRtos -com.renesas.cdt.managedbuild.renesas.ccrx.rtosConfig.option.cfgFilePath=../generate/${ArtifactName}.cfg -com.renesas.cdt.managedbuild.renesas.ccrx.rtosConfig.option.rtosName=None -com.renesas.cdt.managedbuild.renesas.ccrx.rtosConfig.option.rtosPath= -com.renesas.cdt.managedbuild.renesas.ccrx.rtosConfig.option.rtosVersion= -eclipse.preferences.version=1 diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/com.renesas.smc.e2studio.qe.xml b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/com.renesas.smc.e2studio.qe.xml deleted file mode 100644 index 0a29c559cb3..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/com.renesas.smc.e2studio.qe.xml +++ /dev/null @@ -1,47 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/e2studio_project.prefs b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/e2studio_project.prefs deleted file mode 100644 index 1c7d26eaa3e..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/e2studio_project.prefs +++ /dev/null @@ -1,3 +0,0 @@ -# -#Fri Aug 17 10:14:32 JST 2018 -activeConfiguration=com.renesas.cdt.managedbuild.renesas.ccrx.hardwaredebug.configuration.216582545 diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/fittemp/r_ether_rx.ftl b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/fittemp/r_ether_rx.ftl deleted file mode 100644 index 2bb8ed85d3b..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/fittemp/r_ether_rx.ftl +++ /dev/null @@ -1,45 +0,0 @@ -<#-- - Copyright(C) 2015 Renesas Electronics Corporation - RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY - This program must be used solely for the purpose for which it was furnished - by Renesas Electronics Corporation. No part of this program may be reproduced - or disclosed to others, in any form, without the prior written permission of - Renesas Electronics Corporation. ---> -<#-- = DECLARE FUNCTION INFORMATION HERE =================== --> -<#assign Function_Base_Name = "R_ETHER_PinSet"> -<#assign Function_Description = "This function initializes pins for r_ether_rx module"> -<#assign Function_Arg = "none"> -<#assign Function_Ret = "none"> -<#assign Version = 1.00> - -<#-- = DECLARE FUNCTION CONTENT HERE ======================= --> -<#macro initialsection postfix> -<#assign Function_Name = "${Function_Base_Name}${postfix}"> -<#include "lib/functionheader.ftl"> -void ${Function_Name}() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - -<#macro peripheralpincode pin> - - -<#macro channelpincode pin> - - /* Set ${pin.pinName} pin */ - MPC.${pin.assignedPinName}PFS.BYTE = 0x${pin.pinMPC}U; - PORT${pin.portNum}.PMR.BIT.B${pin.pinBitNum} = 1U; - - -<#macro endsection> - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - - -<#macro headerfilesection postfix> -void ${Function_Base_Name}${postfix}(); - - -<#-- = END OF FILE ========================================= --> \ No newline at end of file diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/fittemp/r_sci_rx.ftl b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/fittemp/r_sci_rx.ftl deleted file mode 100644 index a505f3edde7..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/fittemp/r_sci_rx.ftl +++ /dev/null @@ -1,85 +0,0 @@ -<#-- - Copyright(C) 2015 Renesas Electronics Corporation - RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY - This program must be used solely for the purpose for which it was furnished - by Renesas Electronics Corporation. No part of this program may be reproduced - or disclosed to others, in any form, without the prior written permission of - Renesas Electronics Corporation. ---> -<#-- = DECLARE FUNCTION INFORMATION HERE =================== --> -<#-- - (Step 1) Explanation: These variables are necessary information for the function header. - Please fill up or leave blank, but do not delete ---> -<#assign Function_Base_Name = "R_SCI_PinSet"> -<#assign Function_Description = "This function initializes pins for r_sci_rx module"> -<#assign Function_Arg = "none"> -<#assign Function_Ret = "none"> -<#assign Version = 1.00> - -<#-- = DECLARE FUNCTION CONTENT HERE ======================= --> -<#-- - (Step 2) Explanation: Function content. - - Macro [initialsection] : - Any text that goes into this section will be printed out 1 time per function - input [postfix] :Use this variable to add the channel number to the function base name. ---> -<#macro initialsection postfix> -<#assign Function_Name = "${Function_Base_Name}${postfix}"> -<#include "lib/functionheader.ftl"> -void ${Function_Name}() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - -<#-- - (Step 3) Explanation: Function content. - - Macro [peripheralpincode] : Any text that goes into this section will be printed out 1 time per peripheral - - input [pin] : Available info includes: - pin.pinName :The name of pin, eg “SSLA0†- pin.assignedPinName :The pin assigned to, eg “P32†- pin.pinMPC :The port number of assigned pin, eg “P32†has portNume = “3†- pin.portNum :The bit number of the assigned pin, eg “P32†has pinBitNum = “2†- pin.pinBitNum :The value of MPC ---> -<#macro peripheralpincode pin> - - -<#-- - (Step 4) Explanation: Function content. - - Macro [channelpincode] : Any text that goes into this section will be printed out 1 time per channel - - input [pin] : Same as above ---> -<#macro channelpincode pin> - - /* Set ${pin.pinName} pin */ - MPC.${pin.assignedPinName}PFS.BYTE = 0x${pin.pinMPC}U; - PORT${pin.portNum}.PMR.BIT.B${pin.pinBitNum} = 1U; - - -<#macro channelpincodeextra pin postfix> - - -<#-- - (Step 5) Explanation: Function content. - - Macro [endsection] : Any text that goes into this section will be printed out 1 time last ---> -<#macro endsection> - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - - -<#-- - (Step 6) Explanation: Header file content - - Macro [headerfilesection] : Any text that goes into this section will be printed out 1 time in the header file - - input [postfix] :Use this variable to add the channel number to the function base name. ---> -<#macro headerfilesection postfix> -void ${Function_Base_Name}${postfix}(); - - -<#macro headerfilesectionExtra postfix> - - -<#-- = END OF FILE ========================================= --> \ No newline at end of file diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/language.settings.xml b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/language.settings.xml deleted file mode 100644 index 6adefee8b07..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/language.settings.xml +++ /dev/null @@ -1,18 +0,0 @@ - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/renesasPGModel.xml b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/renesasPGModel.xml deleted file mode 100644 index 7c0780cd586..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/.settings/renesasPGModel.xml +++ /dev/null @@ -1,5 +0,0 @@ - - - LITTLE - - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/aws_demos.scfg b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/aws_demos.scfg deleted file mode 100644 index 82f10f23a8b..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/aws_demos.scfg +++ /dev/null @@ -1,739 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/aws_demos_build_path_check_and_make.bat b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/aws_demos_build_path_check_and_make.bat deleted file mode 100644 index 047f6e34780..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/aws_demos_build_path_check_and_make.bat +++ /dev/null @@ -1,11 +0,0 @@ -@echo off -rem ################################################################################ -rem # This batch file executes some preprocess for build and then executes the make -rem ################################################################################ - -if not exist "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" ( - echo ERROR: Unable to find "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" - exit 2 -) - -"%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" %* diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/rx64m_gr_kaede_aws HardwareDebug.launch b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/rx64m_gr_kaede_aws HardwareDebug.launch deleted file mode 100644 index 4faa1a3421f..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/rx64m_gr_kaede_aws HardwareDebug.launch +++ /dev/null @@ -1,147 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/attention!.txt b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/attention!.txt deleted file mode 100644 index eebc694d16c..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/attention!.txt +++ /dev/null @@ -1,32 +0,0 @@ -Please note that the following folders in the project window of IDEs are -so called 'linked' folders. - --------------------------------------------- -Linked folders in the project window of IDEs --------------------------------------------- - -src/FIT_modified_code/r_bsp -src/FIT_modified_code/r_byteq -src/FIT_modified_code/r_cmt_rx -src/FIT_modified_code/r_ether_rx -src/FIT_modified_code/r_flash_rx -src/FIT_modified_code/r_riic_rx -src/FIT_modified_code/r_sci_iic_rx -src/FIT_modified_code/r_sci_rx -src/amazon_freertos_common - ----------------------------------------------------------- -Folders on the File System of the WINDOWS Operating System ----------------------------------------------------------- - -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_bsp -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_byteq -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_cmt_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_ether_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_flash_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_riic_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_iic_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/amazon_freertos_common - -[EOF] diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/UNUSED_generated_code/.placeholder b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/UNUSED_generated_code/.placeholder deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_cg_hardware_setup.c b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_cg_hardware_setup.c deleted file mode 100644 index a94c6539dab..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_cg_hardware_setup.c +++ /dev/null @@ -1,99 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_hardware_setup.c -* Version : 1.3.2 -* Device(s) : R5F564MLCxFB -* Description : Initialization file for code generation configurations. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -#include "r_smc_cgc.h" -#include "r_smc_interrupt.h" -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -void r_undefined_exception(void); -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: r_undefined_exception -* Description : This function is undefined interrupt service routine -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void r_undefined_exception(void) -{ - /* Start user code for r_undefined_exception. Do not edit comment generated here */ - /* End user code. Do not edit comment generated here */ -} - -/*********************************************************************************************************************** -* Function Name: R_Systeminit -* Description : This function initializes every configuration -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Systeminit(void) -{ - /* Enable writing to registers related to operating modes, LPC, CGC and software reset */ - SYSTEM.PRCR.WORD = 0xA50BU; - - /* Enable writing to MPC pin function control registers */ - MPC.PWPR.BIT.B0WI = 0U; - MPC.PWPR.BIT.PFSWE = 1U; - - /* Initialize clocks settings */ - R_CGC_Create(); - - /* Set interrupt settings */ - R_Interrupt_Create(); - - /* Register undefined interrupt */ - R_BSP_InterruptWrite(BSP_INT_SRC_UNDEFINED_INTERRUPT,(bsp_int_cb_t)r_undefined_exception); - - /* Disable writing to MPC pin function control registers */ - MPC.PWPR.BIT.PFSWE = 0U; - MPC.PWPR.BIT.B0WI = 1U; - - /* Enable protection */ - SYSTEM.PRCR.WORD = 0xA500U; -} - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_cg_macrodriver.h b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_cg_macrodriver.h deleted file mode 100644 index 0642494f29b..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_cg_macrodriver.h +++ /dev/null @@ -1,82 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_macrodriver.h -* Version : 1.3.2 -* Device(s) : R5F564MLCxFB -* Description : Macro header file for code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef MACRODRIVER_H -#define MACRODRIVER_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "platform.h" -#include "r_smc_interrupt.h" -#include - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -#ifndef __TYPEDEF__ - -/* Status list definition */ -#define MD_STATUSBASE (0x00U) -#define MD_OK (MD_STATUSBASE + 0x00U) /* register setting OK */ -#define MD_SPT (MD_STATUSBASE + 0x01U) /* IIC stop */ -#define MD_NACK (MD_STATUSBASE + 0x02U) /* IIC no ACK */ -#define MD_BUSY1 (MD_STATUSBASE + 0x03U) /* busy 1 */ -#define MD_BUSY2 (MD_STATUSBASE + 0x04U) /* busy 2 */ - -/* Error list definition */ -#define MD_ERRORBASE (0x80U) -#define MD_ERROR (MD_ERRORBASE + 0x00U) /* error */ -#define MD_ARGERROR (MD_ERRORBASE + 0x01U) /* error argument input error */ -#define MD_ERROR1 (MD_ERRORBASE + 0x02U) /* error 1 */ -#define MD_ERROR2 (MD_ERRORBASE + 0x03U) /* error 2 */ -#define MD_ERROR3 (MD_ERRORBASE + 0x04U) /* error 3 */ -#define MD_ERROR4 (MD_ERRORBASE + 0x05U) /* error 4 */ -#define MD_ERROR5 (MD_ERRORBASE + 0x06U) /* error 5 */ - -#endif - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -#ifndef __TYPEDEF__ - typedef unsigned short MD_STATUS; - #define __TYPEDEF__ -#endif - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Systeminit(void); -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_cg_userdefine.h b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_cg_userdefine.h deleted file mode 100644 index 28af9659592..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_cg_userdefine.h +++ /dev/null @@ -1,61 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_userdefine.h -* Version : 1.3.2 -* Device(s) : R5F564MLCxFB -* Description : User header file for code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef CG_USER_DEF_H -#define CG_USER_DEF_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ -/* Start user code for register. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* Start user code for macro define. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -/* Start user code for type define. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_smc_cgc.c b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_smc_cgc.c deleted file mode 100644 index 6d24f62b9ba..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_smc_cgc.c +++ /dev/null @@ -1,44 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc.c -* Version : 1.2.0 -* Device(s) : R5F564MLCxFB -* Description : This file implements cgc setting -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -#include "r_smc_cgc.h" -#include "platform.h" - -/*********************************************************************************************************************** -* Function Name: R_CGC_Create -* Description : This function Used to initializes the clock generator -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_CGC_Create(void) -{ - R_CGC_Create_UserInit(); -} diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_smc_cgc.h b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_smc_cgc.h deleted file mode 100644 index bf8e5be0332..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_smc_cgc.h +++ /dev/null @@ -1,217 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc.h -* Version : 1.2.0 -* Device(s) : R5F564MLCxFB -* Description : This file implements cgc setting. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_CGC_H -#define SMC_CGC_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ -/* - System Clock Control Register (SCKCR) -*/ -/* Peripheral Module Clock D (PCLKD) */ -#define _00000000_CGC_PCLKD_DIV_1 (0x00000000UL) /* x1 */ -#define _00000001_CGC_PCLKD_DIV_2 (0x00000001UL) /* x1/2 */ -#define _00000002_CGC_PCLKD_DIV_4 (0x00000002UL) /* x1/4 */ -#define _00000003_CGC_PCLKD_DIV_8 (0x00000003UL) /* x1/8 */ -#define _00000004_CGC_PCLKD_DIV_16 (0x00000004UL) /* x1/16 */ -#define _00000005_CGC_PCLKD_DIV_32 (0x00000005UL) /* x1/32 */ -#define _00000006_CGC_PCLKD_DIV_64 (0x00000006UL) /* x1/64 */ -/* Peripheral Module Clock C (PCLKC) */ -#define _00000000_CGC_PCLKC_DIV_1 (0x00000000UL) /* x1 */ -#define _00000010_CGC_PCLKC_DIV_2 (0x00000010UL) /* x1/2 */ -#define _00000020_CGC_PCLKC_DIV_4 (0x00000020UL) /* x1/4 */ -#define _00000030_CGC_PCLKC_DIV_8 (0x00000030UL) /* x1/8 */ -#define _00000040_CGC_PCLKC_DIV_16 (0x00000040UL) /* x1/16 */ -#define _00000050_CGC_PCLKC_DIV_32 (0x00000050UL) /* x1/32 */ -#define _00000060_CGC_PCLKC_DIV_64 (0x00000060UL) /* x1/64 */ -/* Peripheral Module Clock B (PCLKB) */ -#define _00000000_CGC_PCLKB_DIV_1 (0x00000000UL) /* x1 */ -#define _00000100_CGC_PCLKB_DIV_2 (0x00000100UL) /* x1/2 */ -#define _00000200_CGC_PCLKB_DIV_4 (0x00000200UL) /* x1/4 */ -#define _00000300_CGC_PCLKB_DIV_8 (0x00000300UL) /* x1/8 */ -#define _00000400_CGC_PCLKB_DIV_16 (0x00000400UL) /* x1/16 */ -#define _00000500_CGC_PCLKB_DIV_32 (0x00000500UL) /* x1/32 */ -#define _00000600_CGC_PCLKB_DIV_64 (0x00000600UL) /* x1/64 */ -/* Peripheral Module Clock A (PCLKA) */ -#define _00000000_CGC_PCLKA_DIV_1 (0x00000000UL) /* x1 */ -#define _00001000_CGC_PCLKA_DIV_2 (0x00001000UL) /* x1/2 */ -#define _00002000_CGC_PCLKA_DIV_4 (0x00002000UL) /* x1/4 */ -#define _00003000_CGC_PCLKA_DIV_8 (0x00003000UL) /* x1/8 */ -#define _00004000_CGC_PCLKA_DIV_16 (0x00004000UL) /* x1/16 */ -#define _00005000_CGC_PCLKA_DIV_32 (0x00005000UL) /* x1/32 */ -#define _00006000_CGC_PCLKA_DIV_64 (0x00006000UL) /* x1/64 */ -/* External Bus Clock (BCLK) */ -#define _00000000_CGC_BCLK_DIV_1 (0x00000000UL) /* x1 */ -#define _00010000_CGC_BCLK_DIV_2 (0x00010000UL) /* x1/2 */ -#define _00020000_CGC_BCLK_DIV_4 (0x00020000UL) /* x1/4 */ -#define _00030000_CGC_BCLK_DIV_8 (0x00030000UL) /* x1/8 */ -#define _00040000_CGC_BCLK_DIV_16 (0x00040000UL) /* x1/16 */ -#define _00050000_CGC_BCLK_DIV_32 (0x00050000UL) /* x1/32 */ -#define _00060000_CGC_BCLK_DIV_64 (0x00060000UL) /* x1/64 */ -/* System Clock (ICLK) */ -#define _00000000_CGC_ICLK_DIV_1 (0x00000000UL) /* x1 */ -#define _01000000_CGC_ICLK_DIV_2 (0x01000000UL) /* x1/2 */ -#define _02000000_CGC_ICLK_DIV_4 (0x02000000UL) /* x1/4 */ -#define _03000000_CGC_ICLK_DIV_8 (0x03000000UL) /* x1/8 */ -#define _04000000_CGC_ICLK_DIV_16 (0x04000000UL) /* x1/16 */ -#define _05000000_CGC_ICLK_DIV_32 (0x05000000UL) /* x1/32 */ -#define _06000000_CGC_ICLK_DIV_64 (0x06000000UL) /* x1/64 */ -/* System Clock (FCLK) */ -#define _00000000_CGC_FCLK_DIV_1 (0x00000000UL) /* x1 */ -#define _10000000_CGC_FCLK_DIV_2 (0x10000000UL) /* x1/2 */ -#define _20000000_CGC_FCLK_DIV_4 (0x20000000UL) /* x1/4 */ -#define _30000000_CGC_FCLK_DIV_8 (0x30000000UL) /* x1/8 */ -#define _40000000_CGC_FCLK_DIV_16 (0x40000000UL) /* x1/16 */ -#define _50000000_CGC_FCLK_DIV_32 (0x50000000UL) /* x1/32 */ -#define _60000000_CGC_FCLK_DIV_64 (0x60000000UL) /* x1/64 */ - -/* - System Clock Control Register 2 (SCKCR2) -*/ -#define _0010_CGC_UCLK_DIV_1 (0x0010U) /* x1/2 */ -#define _0020_CGC_UCLK_DIV_3 (0x0020U) /* x1/3 */ -#define _0030_CGC_UCLK_DIV_4 (0x0030U) /* x1/4 */ -#define _0040_CGC_UCLK_DIV_5 (0x0040U) /* x1/5 */ -#define _0001_SCKCR2_BIT0 (0x0001U) /* RESERVE BIT0 */ - -/* - System Clock Control Register 3 (SCKCR3) -*/ -#define _0000_CGC_CLOCKSOURCE_LOCO (0x0000U) /* LOCO */ -#define _0100_CGC_CLOCKSOURCE_HOCO (0x0100U) /* HOCO */ -#define _0200_CGC_CLOCKSOURCE_MAINCLK (0x0200U) /* Main clock oscillator */ -#define _0300_CGC_CLOCKSOURCE_SUBCLK (0x0300U) /* Sub-clock oscillator */ -#define _0400_CGC_CLOCKSOURCE_PLL (0x0400U) /* PLL circuit */ - -/* - PLL Control Register (PLLCR) -*/ -/* PLL Input Frequency Division Ratio Select (PLIDIV[1:0]) */ -#define _0000_CGC_PLL_FREQ_DIV_1 (0x0000U) /* x1 */ -#define _0001_CGC_PLL_FREQ_DIV_2 (0x0001U) /* x1/2 */ -#define _0002_CGC_PLL_FREQ_DIV_3 (0x0002U) /* x1/3 */ -/* PLL Clock Source Select (PLLSRCSEL) */ -#define _0000_CGC_PLL_SOURCE_MAIN (0x0000U) /* Main clock oscillator */ -#define _0010_CGC_PLL_SOURCE_HOCO (0x0010U) /* HOCO */ -/* Frequency Multiplication Factor Select (STC[5:0]) */ -#define _1300_CGC_PLL_FREQ_MUL_10_0 (0x1300U) /* x10.0 */ -#define _1400_CGC_PLL_FREQ_MUL_10_5 (0x1400U) /* x10.5 */ -#define _1500_CGC_PLL_FREQ_MUL_11_0 (0x1500U) /* x11.0 */ -#define _1600_CGC_PLL_FREQ_MUL_11_5 (0x1600U) /* x11.5 */ -#define _1700_CGC_PLL_FREQ_MUL_12_0 (0x1700U) /* x12.0 */ -#define _1800_CGC_PLL_FREQ_MUL_12_5 (0x1800U) /* x12.5 */ -#define _1900_CGC_PLL_FREQ_MUL_13_0 (0x1900U) /* x13.0 */ -#define _1A00_CGC_PLL_FREQ_MUL_13_5 (0x1A00U) /* x13.5 */ -#define _1B00_CGC_PLL_FREQ_MUL_14_0 (0x1B00U) /* x14.0 */ -#define _1C00_CGC_PLL_FREQ_MUL_14_5 (0x1C00U) /* x14.5 */ -#define _1D00_CGC_PLL_FREQ_MUL_15_0 (0x1D00U) /* x15.0 */ -#define _1E00_CGC_PLL_FREQ_MUL_15_5 (0x1E00U) /* x15.5 */ -#define _1F00_CGC_PLL_FREQ_MUL_16_0 (0x1F00U) /* x16.0 */ -#define _2000_CGC_PLL_FREQ_MUL_16_5 (0x2000U) /* x16.5 */ -#define _2100_CGC_PLL_FREQ_MUL_17_0 (0x2100U) /* x17.0 */ -#define _2200_CGC_PLL_FREQ_MUL_17_5 (0x2200U) /* x17.5 */ -#define _2300_CGC_PLL_FREQ_MUL_18_0 (0x2300U) /* x18.0 */ -#define _2400_CGC_PLL_FREQ_MUL_18_5 (0x2400U) /* x18.5 */ -#define _2500_CGC_PLL_FREQ_MUL_19_0 (0x2500U) /* x19.0 */ -#define _2600_CGC_PLL_FREQ_MUL_19_5 (0x2600U) /* x19.5 */ -#define _2700_CGC_PLL_FREQ_MUL_20_0 (0x2700U) /* x20.0 */ -#define _2800_CGC_PLL_FREQ_MUL_20_5 (0x2800U) /* x20.5 */ -#define _2900_CGC_PLL_FREQ_MUL_21_0 (0x2900U) /* x21.0 */ -#define _2A00_CGC_PLL_FREQ_MUL_21_5 (0x2A00U) /* x21.5 */ -#define _2B00_CGC_PLL_FREQ_MUL_22_0 (0x2B00U) /* x22.0 */ -#define _2C00_CGC_PLL_FREQ_MUL_22_5 (0x2C00U) /* x22.5 */ -#define _2D00_CGC_PLL_FREQ_MUL_23_0 (0x2D00U) /* x23.0 */ -#define _2E00_CGC_PLL_FREQ_MUL_23_5 (0x2E00U) /* x23.5 */ -#define _2F00_CGC_PLL_FREQ_MUL_24_0 (0x2F00U) /* x24.0 */ -#define _3000_CGC_PLL_FREQ_MUL_24_5 (0x3000U) /* x24.5 */ -#define _3100_CGC_PLL_FREQ_MUL_25_0 (0x3100U) /* x25.0 */ -#define _3200_CGC_PLL_FREQ_MUL_25_5 (0x3200U) /* x25.5 */ -#define _3300_CGC_PLL_FREQ_MUL_26_0 (0x3300U) /* x26.0 */ -#define _3400_CGC_PLL_FREQ_MUL_26_5 (0x3400U) /* x26.5 */ -#define _3500_CGC_PLL_FREQ_MUL_27_0 (0x3500U) /* x27.0 */ -#define _3600_CGC_PLL_FREQ_MUL_27_5 (0x3600U) /* x27.5 */ -#define _3700_CGC_PLL_FREQ_MUL_28_0 (0x3700U) /* x28.0 */ -#define _3800_CGC_PLL_FREQ_MUL_28_5 (0x3800U) /* x28.5 */ -#define _3900_CGC_PLL_FREQ_MUL_29_0 (0x3900U) /* x29.0 */ -#define _3A00_CGC_PLL_FREQ_MUL_29_5 (0x3A00U) /* x29.5 */ -#define _3B00_CGC_PLL_FREQ_MUL_30_0 (0x3B00U) /* x30.0 */ - -/* - Oscillation Stop Detection Control Register (OSTDCR) -*/ -/* Oscillation Stop Detection Interrupt Enable (OSTDIE) */ -#define _00_CGC_OSC_STOP_INT_DISABLE (0x00U) /* The oscillation stop detection interrupt is disabled */ -#define _01_CGC_OSC_STOP_INT_ENABLE (0x01U) /* The oscillation stop detection interrupt is enabled */ -/* Oscillation Stop Detection Function Enable (OSTDE) */ -#define _00_CGC_OSC_STOP_DISABLE (0x00U) /* Oscillation stop detection function is disabled */ -#define _80_CGC_OSC_STOP_ENABLE (0x80U) /* Oscillation stop detection function is enabled */ - -/* - High-Speed On-Chip Oscillator Control Register 2 (HOCOCR2) -*/ -/* HOCO Frequency Setting (HCFRQ[1:0]) */ -#define _00_CGC_HOCO_CLK_16 (0x00U) /* 16 MHz */ -#define _01_CGC_HOCO_CLK_18 (0x01U) /* 18 MHz */ -#define _02_CGC_HOCO_CLK_20 (0x02U) /* 20 MHz */ - -/* - Main Clock Oscillator Forced Oscillation Control Register (MOFCR) -*/ -/* Main Oscillator Drive Capability 2 Switching (MODRV2[1:0]) */ -#define _00_CGC_MAINOSC_UNDER24M (0x00U) /* 20.1 to 24 MHz */ -#define _10_CGC_MAINOSC_UNDER20M (0x10U) /* 16.1 to 20 MHz */ -#define _20_CGC_MAINOSC_UNDER16M (0x20U) /* 8.1 to 16 MHz */ -#define _30_CGC_MAINOSC_EQUATE8M (0x30U) /* 8 MHz */ -/* Main Clock Oscillator Switch (MOSEL) */ -#define _00_CGC_MAINOSC_RESONATOR (0x00U) /* Resonator */ -#define _40_CGC_MAINOSC_EXTERNAL (0x40U) /* External oscillator input */ - -/* - RTC Control Register 4 (RCR4) -*/ -/* Count source select */ -#define _00_RTC_SOURCE_SELECT_SUB (0x00U) /* Select sub-clock oscillator */ -#define _01_RTC_SOURCE_SELECT_MAIN_FORCED (0x01U) /* Select main clock oscillator */ -#define _53_CGC_MOSCWTCR_VALUE (0x53U) /* Main Clock Oscillator Wait Time */ -#define _21_CGC_SOSCWTCR_VALUE (0x21U) /* Sub-Clock Oscillator Wait Time */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_CGC_Create(void); -void R_CGC_Create_UserInit(); -#endif diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_smc_cgc_user.c b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_smc_cgc_user.c deleted file mode 100644 index 82454db1452..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_smc_cgc_user.c +++ /dev/null @@ -1,64 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc_user.c -* Version : 1.2.0 -* Device(s) : R5F564MLCxFB -* Description : None -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -/* Start user code for include. Do not edit comment generated here */ -#include "r_smc_cgc.h" -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: R_CGC_Create_UserInit -* Description : This function adds user code after initializing CGC -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_CGC_Create_UserInit(void) -{ - /* Start user code for code init. Do not edit comment generated here */ - /* End user code. Do not edit comment generated here */ -} - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_smc_entry.h b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_smc_entry.h deleted file mode 100644 index 505a4856744..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_smc_entry.h +++ /dev/null @@ -1,54 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_entry.h -* Version : 1.3.2 -* Device(s) : R5F564MLCxFB -* Description : SMC platform header file. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_ENTRY_H -#define SMC_ENTRY_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_smc_interrupt.c b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_smc_interrupt.c deleted file mode 100644 index 35965bf59cb..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_smc_interrupt.c +++ /dev/null @@ -1,52 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_interrupt.c -* Version : 1.1.0 -* Device(s) : R5F564MLCxFB -* Description : This file implements interrupt setting -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_smc_interrupt.h" -#include "platform.h" - -/*********************************************************************************************************************** -* Function Name: R_Interrupt_Create -* Description : This function Used to set the fast interrupt or group interrupt -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Interrupt_Create(void) -{ - /* Disable group AL1 interrupt*/ - IEN(ICU,GROUPAL1) = 0U; - - - /* Set group AL1 interrupt priority level */ - IPR(ICU,GROUPAL1) = _02_ICU_PRIORITY_LEVEL2; - - /* Enable group AL1 interrupt */ - IEN(ICU,GROUPAL1) = 1U; -} - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_smc_interrupt.h b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_smc_interrupt.h deleted file mode 100644 index d6a17660c87..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/general/r_smc_interrupt.h +++ /dev/null @@ -1,293 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_interrupt.h -* Version : 1.1.0 -* Device(s) : R5F564MLCxFB -* Description : This file implements interrupt setting. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_INTERRUPT_H -#define SMC_INTERRUPT_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/* Priority level of interrupt source. - * These macro definitions are used to set the IPR register directly - */ -#define _00_ICU_PRIORITY_LEVEL0 (0x00U) /* Level 0 (disabled) */ -#define _01_ICU_PRIORITY_LEVEL1 (0x01U) /* Level 1 */ -#define _02_ICU_PRIORITY_LEVEL2 (0x02U) /* Level 2 */ -#define _03_ICU_PRIORITY_LEVEL3 (0x03U) /* Level 3 */ -#define _04_ICU_PRIORITY_LEVEL4 (0x04U) /* Level 4 */ -#define _05_ICU_PRIORITY_LEVEL5 (0x05U) /* Level 5 */ -#define _06_ICU_PRIORITY_LEVEL6 (0x06U) /* Level 6 */ -#define _07_ICU_PRIORITY_LEVEL7 (0x07U) /* Level 7 */ -#define _08_ICU_PRIORITY_LEVEL8 (0x08U) /* Level 8 */ -#define _09_ICU_PRIORITY_LEVEL9 (0x09U) /* Level 9 */ -#define _0A_ICU_PRIORITY_LEVEL10 (0x0AU) /* Level 10 */ -#define _0B_ICU_PRIORITY_LEVEL11 (0x0BU) /* Level 11 */ -#define _0C_ICU_PRIORITY_LEVEL12 (0x0CU) /* Level 12 */ -#define _0D_ICU_PRIORITY_LEVEL13 (0x0DU) /* Level 13 */ -#define _0E_ICU_PRIORITY_LEVEL14 (0x0EU) /* Level 14 */ -#define _0F_ICU_PRIORITY_LEVEL15 (0x0FU) /* Level 15 */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -#define FAST_INTERRUPT_VECTOR (0) - -/* The macro definitions below list the full set of priority levels as selected in the Interrupts tab - * Please do not modify this file manually - */ -#define ICU_BSC_BUSERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RAM_RAMERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_FCU_FIFERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_FCU_FRDYI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_SWINT2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_SWINT_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT0_CMI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT1_CMI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_CMWI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_CMWI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USBA_D0FIFO2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USBA_D1FIFO2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_D0FIFO0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_D1FIFO0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI0_SPRI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI0_SPTI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_QSPI_SPRI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_QSPI_SPTI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SDHI_SBFAI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MMCIF_MBFAI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SSI0_SSITXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SSI0_SSIRXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SSI1_SSIRTI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SRC_IDEI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SRC_ODFI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC0_RXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC0_TXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC2_RXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC2_TXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI0_RXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI0_TXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI1_RXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI1_TXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI2_RXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI2_TXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ13_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ14_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ15_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI3_RXI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI3_TXI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI4_RXI4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI4_TXI4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI5_RXI5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI5_TXI5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI6_RXI6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI6_TXI6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_LVD1_LVD1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_LVD2_LVD2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_USBR0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_ALM_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_PRD_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USBA_USBAR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_IWDT_IWUNI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_WDT_WUNI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PDC_PCDFI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI7_RXI7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI7_TXI7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCIF8_RXIF8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCIF8_TXIF8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCIF9_RXIF9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCIF9_TXIF9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCIF10_RXIF10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCIF10_TXIF10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBE0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPAL0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPAL1_PRIORITY _02_ICU_PRIORITY_LEVEL2 -#define ICU_SCIF11_RXIF11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCIF11_TXIF11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI12_RXI12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI12_TXI12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC0I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC1I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC2I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC3I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC74I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_OST_OSTDI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EXDMAC_EXDMAC0I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EXDMAC_EXDMAC1I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT2_CMI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT3_CMI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0C_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0D_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TCI0V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TGI1B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TCI1V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TCI1U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TGI2A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TGI2B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TCI2V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TCI2U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TGI1A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3C_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_CMIA0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_CMIB0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_OVI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_CMIA1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_CMIB1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_OVI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_CMIA2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_CMIB2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_OVI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_CMIA3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_CMIB3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_OVI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3D_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TCI3V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TGI4A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TGI4B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TCI4V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TCI4U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TGI5A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TGI5B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TCI5V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TCI5U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_IC0I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_IC1I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_OC0I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_OC1I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_IC0I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_IC1I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_OC0I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_OC1I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_CUP_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_RXF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_TXF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_RXM0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_TXM0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_RXF1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_TXF1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_RXM1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_TXM1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN2_RXF2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN2_TXF2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN2_RXM2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN2_TXM2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_USBI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12ADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12GBADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12ADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12GBADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DES_DESEND_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SHA_SHADEND_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SHA_SHAEND_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RNG_RNGEND_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ELC_ELSR18I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ELC_ELSR19I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB200_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB201_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB202_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB203_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB204_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB205_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB206_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB207_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TGIA1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIA0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIB0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIC0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGID0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TCIV0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIE0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TGIB1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TCIV1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TCIU1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TGIA2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TGIB2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TCIV2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TCIU2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIA3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIB3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIC3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGID3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TCIV3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIA4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIB4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIC4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGID4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TCIV4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIU5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIV5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIW5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIA6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIB6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIC6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGID6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TCIV6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIA7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIB7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIC7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGID7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TCIV7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIA8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIB8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIC8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGID8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TCIV8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EPTPC_IPLS_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_AES_AESRDY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_AES_AESEND_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA254_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA255_PRIORITY _0F_ICU_PRIORITY_LEVEL15 - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Interrupt_Create(void); -#endif diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_bsp_config.h b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_bsp_config.h deleted file mode 100644 index 94e8e337646..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_bsp_config.h +++ /dev/null @@ -1,567 +0,0 @@ -/* Generated configuration header file - do not edit */ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_config_reference.h -* Device(s) : RX64x -* Description : The file r_bsp_config.h is used to configure your BSP. r_bsp_config.h should be included -* somewhere in your package so that the r_bsp code has access to it. This file (r_bsp_config_reference.h) -* is just a reference file that the user can use to make their own r_bsp_config.h file. -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 07.08.2013 1.00 First Release -* : 31.03.2014 1.10 Added the ability for the user to define two 'warm start' callback functions which when -* defined result in a callback from PowerON_Reset_PC() before and/or after initialization -* of the C runtime environment. Added r_bsp_config file version number, which must match -* the BSP version number or a compiler warning will result. Added ability to specify user -* defined functions for redirection of the stdio charget() and/or charput() functions. -* : 30.05.2014 1.11 Added settings for the OFS registers. -* : 13.04.2016 1.12 Added the following macro definition. -* - BSP_CFG_MAIN_CLOCK_SOURCE -* - BSP_CFG_MOSC_WAIT_TIME -* - BSP_CFG_SOSC_WAIT_TIME -* : 15.05.2017 1.20 Changed the comment of the following macro definition, because there was a mistake -* in package type. -* - BSP_CFG_MCU_PART_PACKAGE - Changed package type from LQFP to LFQFP. -* Added Character(s) of the following macro definition. -* - BSP_CFG_MCU_PART_PACKAGE - LJ = 0xA = TFLGA/100/0.65. -* - BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED - C = false = Encryption module not included, -* SDHI module not included. -* - G = true = Encryption module included, -* SDHI module not included. -* Removed Character(s) of the following macro definition. -* - BSP_CFG_MCU_PART_PACKAGE - LA = 0x6 = TFLGA/100/0.50. -* - BSP_CFG_MCU_PART_PACKAGE - JA = 0x7 = TFLGA/100/0.65. -* Added the following macro definition. -* - BSP_CFG_RTC_ENABLE -* - BSP_CFG_SOSC_DRV_CAP -* : 01.11.2017 2.00 Added the following macro definition. -* - BSP_CFG_STARTUP_DISABLE -* : 01.07.2018 2.01 Added the following macro definition. -* - BSP_CFG_CONFIGURATOR_SELECT -* Add RTOS support. FreeRTOS. Define a timer for RTOS. -* : xx.xx.xxxx x.xx Added the following macro definition for ID code protection. -* - BSP_CFG_ID_CODE_LONG_1 -* - BSP_CFG_ID_CODE_LONG_2 -* - BSP_CFG_ID_CODE_LONG_3 -* - BSP_CFG_ID_CODE_LONG_4 -* Added the following macro definition. -* - BSP_CFG_FIT_IPL_MAX -* Added support for GNUC and ICCRX. -***********************************************************************************************************************/ -#ifndef R_BSP_CONFIG_REF_HEADER_FILE -#define R_BSP_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* NOTE: - The default settings are the same as when using RSKRX64M. - Change to the settings for the user board. -*/ - -/* Start up select - 0 = Enable BSP startup program. - 1 = Disable BSP startup program. (e.g. Using user startup program.) -*/ -#define BSP_CFG_STARTUP_DISABLE (0) - -/* Enter the product part number for your MCU. This information will be used to obtain information about your MCU such - as package and memory size. - To help parse this information, the part number will be defined using multiple macros. - R 5 F 56 4M L B D FP - | | | | | | | | | Macro Name Description - | | | | | | | | |__BSP_CFG_MCU_PART_PACKAGE = Package type, number of pins, and pin pitch - | | | | | | | |____not used = Products with wide temperature range - | | | | | | |______BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED = Encryption module included/not included - | | | | | |________BSP_CFG_MCU_PART_MEMORY_SIZE = ROM, RAM, and Data Flash Capacity - | | | | |___________BSP_CFG_MCU_PART_GROUP = Group name - | | | |______________BSP_CFG_MCU_PART_SERIES = Series name - | | |________________BSP_CFG_MCU_PART_MEMORY_TYPE = Type of memory (Flash, ROMless) - | |__________________not used = Renesas MCU - |____________________not used = Renesas semiconductor product. -*/ - -/* Package type. Set the macro definition based on values below: - Character(s) = Value for macro = Package Type/Number of Pins/Pin Pitch - FC = 0x0 = LFQFP/176/0.50 - BG = 0x1 = LFBGA/176/0.80 - LC = 0x2 = TFLGA/177/0.50 - FB = 0x3 = LFQFP/144/0.50 - LK = 0x4 = TFLGA/145/0.50 - FP = 0x5 = LFQFP/100/0.50 - LJ = 0xA = TFLGA/100/0.65 -*/ -#define BSP_CFG_MCU_PART_PACKAGE (0x3) // <-- Updated by GUI. Do not edit this value manually - -/* Whether Encryption and SDHI are included or not. - Character(s) = Value for macro = Description - D = false = Encryption module not included, SDHI module included - H = true = Encryption module included, SDHI module included - C = false = Encryption module not included, SDHI module not included - G = true = Encryption module included, SDHI module not included -*/ -#define BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED (false) // <-- Updated by GUI. Do not edit this value manually - -/* ROM, RAM, and Data Flash Capacity. - Character(s) = Value for macro = ROM Size/Ram Size/Data Flash Size - L = 0x15 = 4MB/512KB/64KB - J = 0x13 = 3MB/512KB/64KB - G = 0x10 = 2.5MB/512KB/64KB - F = 0xF = 2MB/512KB/64KB -*/ -#define BSP_CFG_MCU_PART_MEMORY_SIZE (0x15) // <-- Updated by GUI. Do not edit this value manually - -/* Group name. - Character(s) = Value for macro = Description - 4M = 0x0 = RX64M Group -*/ -#define BSP_CFG_MCU_PART_GROUP (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Series name. - Character(s) = Value for macro = Description - 56 = 0x0 = RX600 Series -*/ -#define BSP_CFG_MCU_PART_SERIES (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Memory type. - Character(s) = Value for macro = Description - F = 0x0 = Flash memory version -*/ -#define BSP_CFG_MCU_PART_MEMORY_TYPE (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Whether to use 1 stack or 2. RX MCUs have the ability to use 2 stacks: an interrupt stack and a user stack. - * When using 2 stacks the user stack will be used during normal user code. When an interrupt occurs the CPU - * will automatically shift to using the interrupt stack. Having 2 stacks can make it easier to figure out how - * much stack space to allocate since the user does not have to worry about always having enough room on the - * user stack for if-and-when an interrupt occurs. Some users will not want 2 stacks though because it is not - * needed in all applications and can lead to wasted RAM (i.e. space in between stacks that is not used). - * If only 1 stack is used then the interrupt stack is the one that will be used. If 1 stack is chosen then - * the user may want to remove the 'SU' section from the linker sections to remove any linker warnings. - * - * 0 = Use 1 stack. Disable user stack. User stack size set below will be ignored. - * 1 = Use 2 stacks. User stack and interrupt stack will both be used. - */ -#define BSP_CFG_USER_STACK_ENABLE (0) - -#if defined(__CCRX__) || defined(__GNUC__) - -/* When using the user startup program, disable the following code. */ -#if (BSP_CFG_STARTUP_DISABLE == 0) - -/* If only 1 stack is chosen using BSP_CFG_USER_STACK_ENABLE then no RAM will be allocated for the user stack. */ -#if (BSP_CFG_USER_STACK_ENABLE == 1) -/* User Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. */ -#define BSP_CFG_USTACK_BYTES (0) -#endif - -/* Interrupt Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. - * If the interrupt stack is the only stack being used then the user will likely want to increase the default size - * below. - */ -#define BSP_CFG_ISTACK_BYTES (0x1000) - -#endif /* BSP_CFG_STARTUP_DISABLE == 0 */ - -/* Heap size in bytes. - To disable the heap you must follow these steps: - 1) Set this macro (BSP_CFG_HEAP_BYTES) to 0. - 2) Set the macro BSP_CFG_IO_LIB_ENABLE to 0. - 3) Disable stdio from being built into the project library. This is done by going into the Renesas RX Toolchain - settings and choosing the Standard Library section. After that choose 'Standard Library' for Category in HEW or - choose 'Contents' in E2Studio. This will present a list of modules that can be included. Uncheck the box for - stdio.h. -*/ -#define BSP_CFG_HEAP_BYTES (0) - -#endif /* defined(__CCRX__) || defined(__GNUC__) */ - -#if defined(__CCRX__) - -/* Initializes C input & output library functions. - 0 = Disable I/O library initialization in resetprg.c. If you are not using stdio then use this value. - 1 = Enable I/O library initialization in resetprg.c. This is default and needed if you are using stdio. */ -#define BSP_CFG_IO_LIB_ENABLE (1) - -#endif /* defined(__CCRX__) */ - -/* If desired the user may redirect the stdio charget() and/or charput() functions to their own respective functions - by enabling below and providing and replacing the my_sw_... function names with the names of their own functions. */ -#define BSP_CFG_USER_CHARGET_ENABLED (0) -#define BSP_CFG_USER_CHARGET_FUNCTION my_sw_charget_function - -#define BSP_CFG_USER_CHARPUT_ENABLED (0) -#define BSP_CFG_USER_CHARPUT_FUNCTION my_sw_charput_function - -/* After reset MCU will operate in Supervisor mode. To switch to User mode, set this macro to '1'. For more information - on the differences between these 2 modes see the CPU >> Processor Mode section of your MCU's hardware manual. - 0 = Stay in Supervisor mode. - 1 = Switch to User mode. -*/ -#define BSP_CFG_RUN_IN_USER_MODE (0) - -/* To get into User Boot Mode the user must control some pins on the MCU and also set some values in ROM. These values - in ROM are described in the Option-Setting Memory section of the hardware manual. This macro sets these values so - that User Boot Mode can be used. The user is still responsible for setting the MCU pins appropriately. If User Boot - is selected then the user should make sure that they setup a constant data section in their linker named 'UBSETTINGS' - at address 0xFF7FFFE8. - 0 = Single-Chip or USB Boot Mode - 1 = User Boot Mode -*/ -#define BSP_CFG_USER_BOOT_ENABLE (0) - -/* Set your desired ID code. NOTE, leave at the default (all 0xFF's) if you do not wish to use an ID code. If you set - this value and program it into the MCU then you will need to remember the ID code because the debugger will ask for - it when trying to connect. Note that the E1/E20 will ignore the ID code when programming the MCU during debugging. - If you set this value and then forget it then you can clear the ID code by connecting up in serial boot mode using - FDT. The ID Code is 16 bytes long. The macro below define the ID Code in 4-byte sections. */ -/* Lowest 4-byte section, address 0x00120050. From MSB to LSB: ID code 4, ID code 3, ID code 2, ID code 1/Control Code. - */ -#define BSP_CFG_ID_CODE_LONG_1 (0xFFFFFFFF) -/* 2nd ID Code section, address 0x00120054. From MSB to LSB: ID code 8, ID code 7, ID code 6, ID code 5. */ -#define BSP_CFG_ID_CODE_LONG_2 (0xFFFFFFFF) -/* 3rd ID Code section, address 0x00120058. From MSB to LSB: ID code 12, ID code 11, ID code 10, ID code 9. */ -#define BSP_CFG_ID_CODE_LONG_3 (0xFFFFFFFF) -/* 4th ID Code section, address 0x0012005C. From MSB to LSB: ID code 16, ID code 15, ID code 14, ID code 13. */ -#define BSP_CFG_ID_CODE_LONG_4 (0xFFFFFFFF) - -/* Clock source select (CKSEL). - 0 = Low Speed On-Chip Oscillator (LOCO) - 1 = High Speed On-Chip Oscillator (HOCO) - 2 = Main Clock Oscillator - 3 = Sub-Clock Oscillator - 4 = PLL Circuit -*/ -#define BSP_CFG_CLOCK_SOURCE (4) // <-- Updated by GUI. Do not edit this value manually - -/* The sub-clock oscillation control for using the RTC. - When '1' is selected, the registers related to RTC are initialized and the sub-clock oscillator is operated. - 0 = The RTC is not to be used. - 1 = The RTC is to be used. -*/ -#define BSP_CFG_RTC_ENABLE (0) // <-- Updated by GUI. Do not edit this value manually - -/* Sub-Clock Oscillator Drive Capacity Control (RTCDV). - 0 = Drive capacity for standard CL. - 1 = Drive capacity for low CL. -*/ -#define BSP_CFG_SOSC_DRV_CAP (0) // <-- Updated by GUI. Do not edit this value manually //standard CL by default - -/* Main clock Oscillator Switching (MOSEL). - 0 = Resonator - 1 = External clock input -*/ -#define BSP_CFG_MAIN_CLOCK_SOURCE (0) // <-- Updated by GUI. Do not edit this value manually - -/* Clock configuration options. - The input clock frequency is specified and then the system clocks are set by specifying the multipliers used. The - multiplier settings are used to set the clock registers in resetprg.c. If a 24MHz clock is used and the - ICLK is 120MHz, PCLKA is 120MHz, PCLKB is 60MHz, PCLKC is 60MHz, PCLKD is 60MHz, FCLK is 60MHz, USB Clock is 48MHz, - and BCLK is 120MHz then the settings would be: - - BSP_CFG_XTAL_HZ = 24000000 - BSP_CFG_PLL_DIV = 1 (no division) - BSP_CFG_PLL_MUL = 10.0 (24MHz x 10.0 = 240MHz) - BSP_CFG_ICK_DIV = 2 : System Clock (ICLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_ICK_DIV) = 120MHz - BSP_CFG_PCKA_DIV = 2 : Peripheral Clock A (PCLKA) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKA_DIV) = 120MHz - BSP_CFG_PCKB_DIV = 4 : Peripheral Clock B (PCLKB) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKB_DIV) = 60MHz - BSP_CFG_PCKC_DIV = 4 : Peripheral Clock C (PCLKC) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKC_DIV) = 60MHz - BSP_CFG_PCKD_DIV = 4 : Peripheral Clock D (PCLKD) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKD_DIV) = 60MHz - BSP_CFG_FCK_DIV = 4 : Flash IF Clock (FCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_FCK_DIV) = 60MHz - BSP_CFG_BCK_DIV = 2 : External Bus Clock (BCK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_BCK_DIV) = 120MHz - BSP_CFG_UCK_DIV = 5 : USB Clock (UCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_UCK_DIV) = 48MHz -*/ - -/* Input clock frequency in Hz (XTAL or EXTAL). */ -#define BSP_CFG_XTAL_HZ (12000000) // <-- Updated by GUI. Do not edit this value manually - -/* The HOCO can operate at several different frequencies. Choose which one using the macro below. - Available frequency settings: - 0 = 16MHz (default) - 1 = 18MHz - 2 = 20MHz -*/ -#define BSP_CFG_HOCO_FREQUENCY (0) // <-- Updated by GUI. Do not edit this value manually - -/* PLL clock source (PLLSRCEL). Choose which clock source to input to the PLL circuit. - Available clock sources: - 0 = Main clock (default) - 1 = HOCO -*/ -#define BSP_CFG_PLL_SRC (0) // <-- Updated by GUI. Do not edit this value manually - -/* PLL Input Frequency Division Ratio Select (PLIDIV). - Available divisors = /1 (no division), /2, /3 -*/ -#define BSP_CFG_PLL_DIV (1) // <-- Updated by GUI. Do not edit this value manually - -/* PLL Frequency Multiplication Factor Select (STC). - Available multipliers = x10.0 to x30.0 in 0.5 increments (e.g. 10.0, 10.5, 11.0, 11.5, ..., 29.0, 29.5, 30.0) -*/ -#define BSP_CFG_PLL_MUL (20.0) // <-- Updated by GUI. Do not edit this value manually - -/* System Clock Divider (ICK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_ICK_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock A Divider (PCKA). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKA_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock B Divider (PCKB). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKB_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock C Divider (PCKC). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKC_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock D Divider (PCKD). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKD_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* External Bus Clock Divider (BCLK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_BCK_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Flash IF Clock Divider (FCK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_FCK_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* USB Clock Divider Select. - Available divisors = /2, /3, /4, /5 -*/ -#define BSP_CFG_UCK_DIV (5) // <-- Updated by GUI. Do not edit this value manually - -/* Configure BCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency, 2= BCK/2 frequency -*/ -#define BSP_CFG_BCLK_OUTPUT (0) // <-- Updated by GUI. Do not edit this value manually - -/* Configure SDCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency -*/ -#define BSP_CFG_SDCLK_OUTPUT (0) // <-- Updated by GUI. Do not edit this value manually - -/* Main Clock Oscillator Wait Time (MOSCWTCR). - The value of MOSCWTCR register required for correspondence with the waiting time required to secure stable oscillation - by the main clock oscillator is obtained by using the maximum frequency for fLOCO in the formula below. - - BSP_CFG_MOSC_WAIT_TIME > (tMAINOSC * (fLOCO_max) + 16)/32 - (tMAINOSC: main clock oscillation stabilization time; fLOCO_max: maximum frequency for fLOCO) - - If tMAINOSC is 9.98 ms and fLOCO_max is 264 kHz (the period is 1/3.78 us), the formula gives - BSP_CFG_MOSC_WAIT_TIME > (9.98 ms * (264 kHZ) + 16)/32 = 82.83, so set the BSP_CFG_MOSC_WAIT_TIME to 83(53h). - - NOTE: The waiting time is not required when an external clock signal is input for the main clock oscillator. - Set the BSP_CFG_MOSC_WAIT_TIME to 00h. -*/ -#define BSP_CFG_MOSC_WAIT_TIME (0x53) // <-- Updated by GUI. Do not edit this value manually - -/* Sub-Clock Oscillator Wait Time (SOSCWTCR). - The value of SOSCWTCR register required for correspondence with the expected time to secure settling of oscillation - by the sub-clock oscillator is obtained by using the maximum frequency for fLOCO in the formula below. - - BSP_CFG_SOSC_WAIT_TIME > (tSUBOSC * (fLOCO_max) + 16)/16384 - (tSUBOSC: sub-clock oscillation stabilization time; fLOCO_max: maximum frequency for fLOCO) - - If tSUBOSC is 2 s and fLOCO is 264 kHz (the period is 1/3.78 us), the formula gives - BSP_CFG_SOSC_WAIT_TIME > (2 s * (264 kHz) +16)/16384 = 32.22, so set the BSP_CFG_SOSC_WAIT_TIME bits to 33(21h). -*/ -#define BSP_CFG_SOSC_WAIT_TIME (0x21) // <-- Updated by GUI. Do not edit this value manually - -/* Configure WDT and IWDT settings. - OFS0 - Option Function Select Register 0 - b31:b29 Reserved When reading, these bits return the value written by the user. The write value should be 1. - b28 WDTRSTIRQS - WDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b27:b26 WDTRPSS - WDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b25:b24 WDTRPES - WDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b23:b20 WDTCKS - WDT Clock Frequency Division Ratio - (1=PCLKB/4, 4=PCLKB/64, 0xF=PCLKB/128, 6=PCLKB/256, - 7=PCLKB/2048, 8=PCLKB/8192) - b19:b18 WDTTOPS - WDT Timeout Period Select (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b17 WDTSTRT - WDT Start Mode Select - (0=auto-start after reset, 1=halt after reset) - b16:b15 Reserved (set to 1) - b14 IWDTSLCSTP - IWDT Sleep Mode Count Stop Control - (0=can't stop count, 1=stop w/some low power modes) - b13 Reserved (set to 1) - b12 IWDTRSTIRQS - IWDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b11:b10 IWDTRPSS - IWDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b9:b8 IWDTRPES - IWDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b7:b4 IWDTCKS - IWDT Clock Frequency Division Ratio - (0=none, 2=/16, 3 = /32, 4=/64, 0xF=/128, 5=/256) - b3:b2 IWDTTOPS - IWDT Timeout Period Select - (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b1 IWDTSTRT - IWDT Start Mode Select - (0=auto-start after reset, 1=halt after reset) - b0 Reserved (set to 1) */ -#define BSP_CFG_OFS0_REG_VALUE (0xFFFFFFFF) // <-- Updated by GUI. Do not edit this value manually //Disable by default - -/* Configure whether voltage detection 0 circuit and HOCO are enabled after reset. - OFS1 - Option Function Select Register 1 - b31:b9 Reserved (set to 1) - b8 HOCOEN - Enable/disable HOCO oscillation after a reset (0=enable, 1=disable) - b7:b3 Reserved When reading, these bits return the value written by the user. The write value should be 1. - b2 LVDAS - Voltage Detection 0 circuit start (1=monitoring disabled) - b1:b0 VDSEL - Voltage Detection 0 level select (1=2.94v, 2=2.87v, 3=2.80v) - NOTE: If HOCO oscillation is enabled by OFS1.HOCOEN, HOCO frequency is 16MHz. - BSP_CFG_HOCO_FREQUENCY should be default value. -*/ -#define BSP_CFG_OFS1_REG_VALUE (0xFFFFFFFF) // <-- Updated by GUI. Do not edit this value manually //Disable by default - -/* Both RX64M and RX71M MCU's have a 'Trusted Memory' feature. This feature protects against - * illicit reading of blocks 8 and 9 in the code flash memory. This feature is disabled by default - * but may be enabled by setting the below to (0). - * Only 0 and 0xFFFFFFFF are valid settings. */ -#define BSP_CFG_TRUSTED_MODE_FUNCTION (0xFFFFFFFF) //Disable by default - -/* This macro lets other modules no if a RTOS is being used. - 0 = RTOS is not used. - 1 = FreeRTOS is used. - 2 = embOS is used.(This is not available.) - 3 = MicroC_OS is used.(This is not available.) - 4 = RI600V4 or RI600PX is used.(This is not available.) -*/ -/* As of today, we need a workaround to avoid the problem that the Smart Configurator does not have such GUI - yet and the BSP_CFG_RTOS_USED here is set to (0) every time of code generation by the Smart Configurator. - The BSP_CFG_RTOS_USED is set to (1) in the r_bsp.h instead of here so that the setting of here is ignored. -*/ -#if !defined(BSP_CFG_RTOS_USED) || (BSP_CFG_RTOS_USED == 0) -#if defined(BSP_CFG_RTOS_USED) -#undef BSP_CFG_RTOS_USED -#endif -#define BSP_CFG_RTOS_USED (0) // <-- Updated by GUI. Do not edit this value manually -#endif - -/* This macro is used to select which CMT channel used for system timer of RTOS. - * The setting of this macro is only valid if the macro BSP_CFG_RTOS_USED is set to a value other than 0. */ -#if (BSP_CFG_RTOS_USED != 0) -/* Setting value. - * 0 = CMT channel 0 used for system timer of RTOS (recommended to be used for RTOS). - * 1 = CMT channel 1 used for system timer of RTOS. - * 2 = CMT channel 2 used for system timer of RTOS. - * 3 = CMT channel 3 used for system timer of RTOS. - * Others = Invalid. */ -#define BSP_CFG_RTOS_SYSTEM_TIMER (0) -#endif - -/* By default modules will use global locks found in mcu_locks.c. If the user is using a RTOS and would rather use its - locking mechanisms then they can change this macro. - NOTE: If '1' is chosen for this macro then the user must also change the next macro 'BSP_CFG_USER_LOCKING_TYPE'. - 0 = Use default locking (non-RTOS) - 1 = Use user defined locking mechanism. -*/ -#define BSP_CFG_USER_LOCKING_ENABLED (0) - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to redefine the typedef - that is used for the locks. If the user is using a RTOS then they would likely redefine the typedef to be - a semaphore/mutex type of their RTOS. Use the macro below to set the type that will be used for the locks. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_TYPE bsp_lock_t - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to define the functions - that will handle the locking and unlocking. These functions should be defined below. - If BSP_CFG_USER_LOCKING_ENABLED is != 0: - R_BSP_HardwareLock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION(mcu_lock_t hw_index) - R_BSP_HardwareUnlock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION(mcu_lock_t hw_index) - NOTE:With these functions the index into the array holding the global hardware locks is passed as the parameter. - R_BSP_SoftwareLock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - R_BSP_SoftwareUnlock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - NOTE:With these functions the actual address of the lock to use is passed as the parameter. - NOTE: These functions must return a boolean. If lock was obtained or released successfully then return true. Else, - return false. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION my_hw_locking_function -#define BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION my_hw_unlocking_function -#define BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION my_sw_locking_function -#define BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION my_sw_unlocking_function - -/* If the user would like to determine if a warm start reset has occurred, then they may enable one or more of the - * following callback definitions AND provide a call back function name for the respective callback - * function (to be defined by the user). Setting BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED = 1 will result - * in a callback to the user defined my_sw_warmstart_prec_function just prior to the initialization of the C - * runtime environment by resetprg. - * - * Setting BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED = 1 will result in a callback to the user defined - * my_sw_warmstart_postc_function just after the initialization of the C runtime environment by resetprg. - */ -#define BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_PRE_C_FUNCTION my_sw_warmstart_prec_function - -#define BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_POST_C_FUNCTION my_sw_warmstart_postc_function - -/* By default FIT modules will check input parameters to be valid. This is helpful during development but some users - will want to disable this for production code. The reason for this would be to save execution time and code space. - This macro is a global setting for enabling or disabling parameter checking. Each FIT module will also have its - own local macro for this same purpose. By default the local macros will take the global value from here though - they can be overridden. Therefore, the local setting has priority over this global setting. Disabling parameter - checking should only used when inputs are known to be good and the increase in speed or decrease in code space is - needed. - 0 = Global setting for parameter checking is disabled. - 1 = Global setting for parameter checking is enabled (Default). -*/ -#define BSP_CFG_PARAM_CHECKING_ENABLE (1) - -/* This macro is used to define the voltage that is supplied to the MCU (Vcc). This macro is defined in millivolts. This - macro does not actually change anything on the MCU. Some FIT modules need this information so it is defined here. */ -#define BSP_CFG_MCU_VCC_MV (3300) // <-- Updated by GUI. Do not edit this value manually - -/* Allow initialization of auto-generated peripheral initialization code by Smart Configurator tool. - When not using the Smart Configurator, set the value of BSP_CFG_CONFIGURATOR_SELECT to 0. - 0 = Disabled (default) - 1 = Smart Configurator initialization code used -*/ -#define BSP_CFG_CONFIGURATOR_SELECT (1) // <-- Updated by GUI. Do not edit this value manually - -/* For some BSP functions, it is necessary to ensure that, while these functions are executing, interrupts from other - FIT modules do not occur. By controlling the IPL, these functions disable interrupts that are at or below the - specified interrupt priority level. - This macro sets the IPL. Range is 0x0 - 0xF. - Please set this macro more than IPR for other FIT module interrupts. - The default value is 0xF (maximum value). - Don't change if there is no special processing with higher priority than all fit modules. -*/ -#define BSP_CFG_FIT_IPL_MAX (0xF) - -/* This macro is used to select which SCI channel used for debug serial terminal. - */ -#define MY_BSP_CFG_SERIAL_TERM_SCI (7) - -#endif /* R_BSP_CONFIG_REF_HEADER_FILE */ - - - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_bsp_config_readme.txt b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_bsp_config_readme.txt deleted file mode 100644 index 6a9002cf4f3..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_bsp_config_readme.txt +++ /dev/null @@ -1,12 +0,0 @@ -FIT r_config folder -------------------- -The purpose of the r_config folder is to provide one place where the user can store all of their FIT configuration -files. Putting the files in one place makes them easy to find, backup, and put in a version control system. - -FIT Modules are distributed with a reference configuration file. These files end with '_reference.h'. For example, -the reference configuration file for the r_bsp is named r_bsp_config_reference.h. Reference configuration files are -provided so that the user always has a known-good configuration to revert to. When adding a FIT Module to a project the -user should copy this reference configuration file to this folder and remove '_reference' from the filename -(r_bsp_config_reference.h is renamed to r_bsp_config.h). For the r_bsp the reference configuration file can be found in -the 'board' folder for the currently chosen development board. For other FIT Modules the reference configuration file -can be found in the 'ref' folder of the FIT Module. diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_bsp_interrupt_config.h b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_bsp_interrupt_config.h deleted file mode 100644 index ee6bd8fb8d0..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_bsp_interrupt_config.h +++ /dev/null @@ -1,236 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_interrupt_config.h -* Description : This module maps Interrupt A & B interrupts. More information on how this is done is given below. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 14.01.2014 1.00 First Release -* : 05.15.2017 1.10 Changed the name of the following macro definition, because there was a mistake -* in the name of macro definition. -* - From XXX_TPU0_TGI0V to XXX_TPU0_TCI0V. -* - From XXX_TPU1_TGI1V to XXX_TPU1_TCI1V. -* - From XXX_TPU1_TGI1U to XXX_TPU1_TCI1U. -* - From XXX_TPU2_TGI2V to XXX_TPU2_TCI2V. -* - From XXX_TPU2_TGI2U to XXX_TPU2_TCI2U. -* - From XXX_TPU3_TGI3V to XXX_TPU3_TCI3V. -* - From XXX_TPU4_TGI4V to XXX_TPU4_TCI4V. -* - From XXX_TPU4_TGI4U to XXX_TPU4_TCI4U. -* - From XXX_TPU5_TGI5V to XXX_TPU5_TCI5V. -* - From XXX_TPU5_TGI5U to XXX_TPU5_TCI5U. -* - From XXX_MTU0_TGIV0 to XXX_MTU0_TCIV0. -* - From XXX_MTU1_TGIV1 to XXX_MTU1_TCIV1. -* - From XXX_MTU1_TGIU1 to XXX_MTU1_TCIU1. -* - From XXX_MTU2_TGIV2 to XXX_MTU2_TCIV2. -* - From XXX_MTU2_TGIU2 to XXX_MTU2_TCIU2. -* - From XXX_MTU3_TGIV3 to XXX_MTU3_TCIV3. -* - From XXX_MTU4_TGIV4 to XXX_MTU4_TCIV4. -* - From XXX_MTU6_TGIV6 to XXX_MTU6_TCIV6. -* - From XXX_MTU7_TGIV7 to XXX_MTU7_TCIV7. -* - From XXX_MTU8_TGIV8 to XXX_MTU8_TCIV8. -* Removed the following macro definition. -* - BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIU8 -***********************************************************************************************************************/ -#ifndef R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE -#define R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/* If you wish to use one of the interrupt below then set the appropriate configuration macro to the vector number you - * wish to use for that interrupt. For example, if you want to use the RTC carry interrupt (CUP) at vector 176 then you - * would do the following: - * - * #define BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP 176 - */ - -/* Interrupt B Sources. - * -Valid vector numbers are 128-207. - * -There are more vector slots for B sources than actual B sources. By default all B sources are mapped. - * -If using the 'TPU1, TGI1A' interrupt it must be vector 144 or 145. It is set to 144 by default. - * -If a peripheral interrupt is going to be used to wake up the MCU from All-Module Clock Stop Mode then it must be - * in a vector between 146 to 157. Peripheral interrupts that can do this are TMR interrupts and the 'USB0, USBI0' - * interrupt. By default the TMR interrupts are chosen since there are 12 of them and there are 12 slots. - */ -#define BSP_MAPPED_INT_CFG_B_VECT_CMT2_CMI2 128 -#define BSP_MAPPED_INT_CFG_B_VECT_CMT3_CMI3 129 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIA0 146 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIB0 147 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_OVI0 148 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIA1 149 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIB1 150 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_OVI1 151 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIA2 152 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIB2 153 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_OVI2 154 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIA3 155 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIB3 156 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_OVI3 157 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0A 130 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0B 131 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0C 132 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0D 133 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TCI0V 134 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1A 144 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1B 135 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1V 136 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1U 137 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2A 138 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2B 139 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2V 140 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2U 141 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3A 142 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3B 143 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3C 145 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3D 158 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TCI3V 159 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4A 160 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4B 161 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4V 162 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4U 163 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5A 164 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5B 165 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5V 166 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5U 167 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC0I0 168 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC1I0 169 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC0I0 170 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC1I0 171 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC0I1 172 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC1I1 173 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC0I1 174 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC1I1 175 -#define BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP 176 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXF0 177 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXF0 178 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXM0 179 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXM0 180 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXF1 181 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXF1 182 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXM1 183 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXM1 184 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN2_RXF2 185 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN2_TXF2 186 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN2_RXM2 187 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN2_TXM2 188 -#define BSP_MAPPED_INT_CFG_B_VECT_USB0_USBI0 189 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12ADI0 190 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GBADI0 191 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12ADI1 192 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GBADI1 193 -#define BSP_MAPPED_INT_CFG_B_VECT_DES_DESEND 194 -#define BSP_MAPPED_INT_CFG_B_VECT_SHA_SHADEND 195 -#define BSP_MAPPED_INT_CFG_B_VECT_SHA_SHAEND 196 -#define BSP_MAPPED_INT_CFG_B_VECT_RNG_RNGEND 197 -#define BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR18I 198 -#define BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR19I 199 - -/* Interrupt A Sources. - * -Valid vector numbers are 208-255. - * -There are more A sources than A vector slots. By default none of the GPT interrupts are mapped. - * -If using the 'MTU1, TGI1A' interrupt it must be vector 208 or 209. It is set to 208 by default. - */ -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIA0 209 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIB0 210 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIC0 211 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGID0 212 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TCIV0 213 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIE0 214 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIF0 215 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIA1 208 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIB1 216 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIV1 217 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIU1 218 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIA2 219 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIB2 220 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIV2 221 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIU2 222 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIA3 223 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIB3 224 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIC3 225 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGID3 226 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TCIV3 227 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIA4 228 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIB4 229 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIC4 230 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGID4 231 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TCIV4 232 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIU5 233 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIV5 234 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIW5 235 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIA6 236 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIB6 237 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIC6 238 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGID6 239 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TCIV6 240 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIA7 241 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIB7 242 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIC7 243 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGID7 244 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TCIV7 245 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIA8 246 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIB8 247 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIC8 248 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGID8 249 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TCIV8 250 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCIA0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCIB0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCIC0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCID0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GDTE0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCIE0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCIF0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCIV0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCIU0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPTA_ETGIN -#define BSP_MAPPED_INT_CFG_A_VECT_GPTA_ETGIP -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCIA1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCIB1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCIC1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCID1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GDTE1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCIE1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCIF1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCIV1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCIU1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCIA2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCIB2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCIC2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCID2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GDTE2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCIE2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCIF2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCIV2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCIU2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCIA3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCIB3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCIC3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCID3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GDTE3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCIE3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCIF3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCIV3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCIU3 -#define BSP_MAPPED_INT_CFG_A_VECT_EPTPC_IPLS 251 -#define BSP_MAPPED_INT_CFG_A_VECT_AES_AESRDY 252 -#define BSP_MAPPED_INT_CFG_A_VECT_AES_AESEND 253 - -#endif /* R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE */ diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_byteq_config.h b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_byteq_config.h deleted file mode 100644 index 0b4d4f9bb52..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_byteq_config.h +++ /dev/null @@ -1,59 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_byteq_config.h -* Description : Configures the byte queue memory allocation -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 24.07.2013 1.00 Initial Release -* : 11.21.2014 1.20 Removed dependency to BSP -* : 30.09.2015 1.50 Added dependency to BSP -***********************************************************************************************************************/ -#ifndef BYTEQ_CONFIG_H -#define BYTEQ_CONFIG_H - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - Available settings: - BSP_CFG_PARAM_CHECKING_ENABLE: - Utilizes the system default setting - 1: - Includes parameter checking - 0: - Compiles out parameter checking -*/ -#define BYTEQ_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY IF SHOULD USE MALLOC() TO ALLOCATE MEMORY FOR QUEUE CONTROL BLOCKS */ -#define BYTEQ_CFG_USE_HEAP_FOR_CTRL_BLKS (0) - -/* SPECIFY NUMBER OF STATIC QUEUE CONTROL BLOCKS TO SUPPORT */ -/* valid only when BYTEQ_USE_HEAP_FOR_CTRL_BLKS is set to 0 */ -#define BYTEQ_CFG_MAX_CTRL_BLKS (4) - - -#endif /* BYTEQ_CONFIG_H */ diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_ether_rx_config.h b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_ether_rx_config.h deleted file mode 100644 index ea6b31eee73..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_ether_rx_config.h +++ /dev/null @@ -1,119 +0,0 @@ -/* Generated configuration header file - do not edit */ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_ether_rx_config.h - * Version : 1.04 - * Description : Ethernet module device driver - ***********************************************************************************************************************/ -/********************************************************************************************************************** - * History : DD.MM.YYYY Version Description - * : 22.07.2014 1.00 First Release - * : 31.03.2016 1.01 Added changes for RX63N. - * : 01.10.2016 1.02 Added changes for RX65N. - * : 01.10.2017 1.03 Added changes for RX65N-2MB. - * : 08.01.2018 1.04 Changed comment. - ***********************************************************************************************************************/ - -/* Guards against multiple inclusion */ -#ifndef R_ETHER_RX_CONFIG_H - #define R_ETHER_RX_CONFIG_H - -/*********************************************************************************************************************** - Macro definitions - ***********************************************************************************************************************/ - -/* Ethernet interface select. - 0 = MII (Media Independent Interface) - 1 = RMII (Reduced Media Independent Interface) - */ - #define ETHER_CFG_MODE_SEL (1) - -/* PHY-LSI address setting for ETHER0/1. - Please set the value 31 ETHER_CFG_CH0_PHY_ADDRESS when use default setting of the RSK+RX63N. - Please set the value 30 ETHER_CFG_CH0_PHY_ADDRESS when use default setting of the RSK+RX65N/RSK+RX65N_2MB. - Please set the value 0 ETHER_CFG_CH0_PHY_ADDRESS and value 1 ETHER_CFG_CH1_PHY_ADDRESS when use default setting of the RSK+RX64M/RSK+RX71M. - */ - #define ETHER_CFG_CH0_PHY_ADDRESS (0) /* Please define the PHY-LSI address in the range of 0-31. */ - #define ETHER_CFG_CH1_PHY_ADDRESS (1) /* Please define the PHY-LSI address in the range of 0-31. */ - -/* The number of Rx descriptors. */ - #define ETHER_CFG_EMAC_RX_DESCRIPTORS (1) - -/* The number of Tx descriptors. */ - #define ETHER_CFG_EMAC_TX_DESCRIPTORS (1) - -/* Please define the size of the sending and receiving buffer in the value where one frame can surely be stored - because the driver is single-frame/single-buffer processing. */ - #define ETHER_CFG_BUFSIZE (1536) /* Must be 32-byte aligned */ - -/* EINT interrupt priority level. This definition is not used when EINT interrupt is assigned to Group interrupt. */ - #define ETHER_CFG_EINT_INT_PRIORITY (2) /* Please define the interruption level within the range of 1-15. */ - -/* Group AL1 interrupt priority level. This definition is not used when EINT interrupt is assigned to Peripheral - interrupt. */ - #define ETHER_CFG_AL1_INT_PRIORTY (2) /* Please define the interruption level within the range of 1-15. */ - -/* The register bus of PHY0/1 for ETHER0/1 select - 0 = The access of the register of PHY uses ETHER0. - 1 = The access of the register of PHY uses ETHER1. - - Please set the value 0 ETHER_CFG_CH0_PHY_ACCESS when use default setting of the RSK+RX63N. - Please set the value 0 ETHER_CFG_CH0_PHY_ACCESS when use default setting of the RSK+RX65N/RSK+RX65N_2MB. - Please set the value 1 ETHER_CFG_CH0_PHY_ACCESS and ETHER_CFG_CH1_PHY_ACCESS when use default setting of the RSK+RX64M/RSK+RX71M. - */ - #define ETHER_CFG_CH0_PHY_ACCESS (0) - #define ETHER_CFG_CH1_PHY_ACCESS (1) - -/* Define the access timing of MII/RMII register */ - #define ETHER_CFG_PHY_MII_WAIT (8) /* Plese define the value of 1 or more */ - -/* Define the waiting time for reset completion of PHY-LSI */ - #define ETHER_CFG_PHY_DELAY_RESET (0x00020000L) - -/** - * Link status read from LMON bit of ETHERC PSR register. The state is hardware dependent. - */ - #define ETHER_CFG_LINK_PRESENT (0) - -/* Use LINKSTA signal for detect link status changes - 0 = unused (use PHY-LSI status register) - 1 = use (use LINKSTA signal) - */ - #define ETHER_CFG_USE_LINKSTA (0) /* This setting is reflected in all channels */ - -/* Definition of whether or not to use KSZ8041NL of the Micrel Inc. - 0 = unused - 1 = use - */ - #define ETHER_CFG_USE_PHY_KSZ8041NL (0) - -/*********************************************************************************************************************** - Typedef definitions - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global variables - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global functions (to be accessed by other files) - ***********************************************************************************************************************/ - -#endif /* R_ETHER_RX_CONFIG_H */ diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_flash_rx_config.h b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_flash_rx_config.h deleted file mode 100644 index fbf916a0e97..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_flash_rx_config.h +++ /dev/null @@ -1,116 +0,0 @@ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_flash_rx_config_reference.h - * Description : Configures the FLASH API module for RX200 and RX600 Series MCU's. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* 12.04.2014 1.00 First Release -* 22.12.2014 1.10 Added flash type usage comments. -* 25.06.2015 1.20 Added FLASH_CFG_CODE_FLASH_RUN_FROM_ROM. -* : 12.10.2016 2.00 Modified for BSPless operation (added FLASH_CFG_USE_FIT_BSP). -***********************************************************************************************************************/ -#ifndef FLASH_CONFIG_HEADER_FILE -#define FLASH_CONFIG_HEADER_FILE - -/* Set the following value to 0 when building without using the FIT BSP Module */ -#define FLASH_CFG_USE_FIT_BSP (1) - - -/*********************************************************************************************************************** - Configuration Options - ***********************************************************************************************************************/ -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting - * Setting to 1 includes parameter checking; 0 compiles out parameter checking - */ -#define FLASH_CFG_PARAM_CHECKING_ENABLE (1) - - -/****************************************************************************** - ENABLE CODE FLASH PROGRAMMING -******************************************************************************/ -/* If you are only using data flash, set this to 0. - * Setting to 1 includes code to program the ROM area. When programming ROM, - * code must be executed from RAM, except under certain restrictions for flash - * type 3 (see section 2.14 in App Note). See section 2.13 in the App Note for - * details on how to set up code and the linker to execute code from RAM. - */ -#define FLASH_CFG_CODE_FLASH_ENABLE (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING DATA FLASH OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces data flash API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, data flash operations return immediately after the operation has been - * started. Notification of the operation completion is done via the callback - * function. - */ -#define FLASH_CFG_DATA_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING CODE FLASH (ROM) OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces ROM API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, ROM operations return immediately after the operation has been started. - * Notification of the operation completion is done via the callback function. - * When reprogramming ROM, THE RELOCATABLE VECTOR TABLE AND CORRESPONDING - * INTERRUPT ROUTINES MUST BE IN RAM. - * See sections 2.16 Usage Notes in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE CODE FLASH SELF-PROGRAMMING -******************************************************************************/ -/* Set this to 0 when programming code flash while executing in RAM. - * Set this to 1 when programming code flash while executing from another - * segment in ROM (possible only with RX64M, RX71M, RX65N-2 groups). - * See section 2.14 in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_RUN_FROM_ROM (0) - - -/****************************************************************************** - SET IPL OF FLASH READY INTERRUPT -******************************************************************************/ -#define FLASH_CFG_FLASH_READY_IPL (5) // Flash type 2 only - - -/****************************************************************************** - ENABLE OR DISABLE LOCK BIT PROTECTION -******************************************************************************/ -/* Each erasure block has a corresponding lock bit that can be used to - * protect that block from being programmed/erased after the lock bit is - * set. The use of lock bits can be used or ignored. - * Setting this to 1 will cause lock bits to be ignored and programs/erases to a - * block will not be limited. - * Setting this to 0 will cause lock bits to be used as the user configures through - * the Control command. This only applies to ROM as the DF does not have lock bits. - */ -#define FLASH_CFG_IGNORE_LOCK_BITS (1) // Flash type 2 only - - -#endif /* FLASH_CONFIG_HEADER_FILE */ diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_s12ad_rx_config.h b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_s12ad_rx_config.h deleted file mode 100644 index 0202bf133a4..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_s12ad_rx_config.h +++ /dev/null @@ -1,53 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_s12ad_rx_config.h -* Description : Configures the 12-bit A/D driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 22.07.2013 1.00 Initial Release. -* 21.04.2014 1.20 Updated for RX210 advanced features; RX110/63x support. -***********************************************************************************************************************/ -#ifndef S12AD_CONFIG_H -#define S12AD_CONFIG_H - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* - * SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting. - * Setting to 1 includes parameter checking; 0 compiles out parameter checking. - */ -#define ADC_CFG_PARAM_CHECKING_ENABLE BSP_CFG_PARAM_CHECKING_ENABLE - - -/* - * RX210 Series only; Temperature Sensor Programmable Gain Amplifier (PGA) - * SELECT PGA GAIN TO MATCH AVCC0 VOLTAGE RANGE: - * 0: 1.8V <= AVcc0 < 2.7V; default; good for all actual voltages - * 1: 2.7V <= AVcc0 < 3.6V - * 2: 3.6V <= AVcc0 < 4.5V - * 3: 4.5V <= AVcc0 <= 5.5V - */ -#define ADC_CFG_PGA_GAIN (0) - - -#endif /* S12AD_CONFIG_H */ diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_sci_rx_config.h b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_sci_rx_config.h deleted file mode 100644 index 6566d7c4a75..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_config/r_sci_rx_config.h +++ /dev/null @@ -1,171 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_config.h -* Description : Configures the SCI driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 25.09.2013 1.00 Initial Release -* 17.04.2014 1.20 Added comments for new RX110 support. -* 02.07.2014 1.30 Fixed bug that caused Group12 rx errors to only be enabled for channel 2. -* 25.11.2014 1.40 Added comments for RX113 support -* 30.09.2015 1.70 Added comments for RX23T support -* 01.10.2016 1.80 Added support for RX65N (comments and TX/RX FIFO THRESHOLD options) -* 19.12.2016 1.90 Added comments for RX24U support -* 07.03.2017 2.00 Added comments for RX130-512KB support -***********************************************************************************************************************/ -#ifndef SCI_CONFIG_H -#define SCI_CONFIG_H - -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING */ -/* Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting */ -/* Setting to 1 includes parameter checking; 0 compiles out parameter checking */ -#define SCI_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY WHETHER TO INCLUDE CODE FOR DIFFERENT SCI MODES */ -/* Setting an equate to 1 includes code specific to that mode. */ -#define SCI_CFG_ASYNC_INCLUDED (1) -#define SCI_CFG_SYNC_INCLUDED (0) -#define SCI_CFG_SSPI_INCLUDED (0) - -/* SPECIFY BYTE VALUE TO TRANSMIT WHILE CLOCKING IN DATA IN SSPI MODES */ -#define SCI_CFG_DUMMY_TX_BYTE (0xFF) - -/* SPECIFY CHANNELS TO INCLUDE SOFTWARE SUPPORT FOR 1=included, 0=not */ -/* - * NOTE: If using ASYNC mode, adjust BYTEQ_CFG_MAX_CTRL_BLKS in r_byteq_config.h - * to provide 2 queues per channel (static mode only). - * * = port connector RDKRX63N, RSKRX210, RSKRX11x - * u = channel used by the USB-UART port (G1CUSB0) - * a = this channel is used only for RX130-512KB - * RX MCU supported channels - * - * CH# 110 111 113 130 210 230 231 23T 24T 24U 63N 631 64M 71M 65N - * --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- - * CH0 X Xa X* X X X* X X X X - * CH1 X X* X* Xu X X X Xu Xu Xu X X X X X - * CH2 X X X X X Xu - * CH3 X X X X X - * CH4 X X X X X - * CH5 X X X X X X Xu X X X X X X X X - * CH6 X X X X X X X X X X X X - * CH7 X X Xu Xu X - * CH8 X Xa X X X X X X X - * CH9 X Xa X X X X X X X - * CH10 X X X - * CH11 X X X X - * CH12 X X X X X X X X X X X X -*/ - -#define SCI_CFG_CH0_INCLUDED (0) -#define SCI_CFG_CH1_INCLUDED (0) -#define SCI_CFG_CH2_INCLUDED (0) -#define SCI_CFG_CH3_INCLUDED (0) -#define SCI_CFG_CH4_INCLUDED (0) -#define SCI_CFG_CH5_INCLUDED (0) -#define SCI_CFG_CH6_INCLUDED (0) -#define SCI_CFG_CH7_INCLUDED (1) -#define SCI_CFG_CH8_INCLUDED (0) -#define SCI_CFG_CH9_INCLUDED (0) -#define SCI_CFG_CH10_INCLUDED (0) -#define SCI_CFG_CH11_INCLUDED (0) -#define SCI_CFG_CH12_INCLUDED (1) - -/* SPECIFY ASYNC MODE TX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_TX_BUFSIZ (80) -#define SCI_CFG_CH1_TX_BUFSIZ (80) -#define SCI_CFG_CH2_TX_BUFSIZ (80) -#define SCI_CFG_CH3_TX_BUFSIZ (80) -#define SCI_CFG_CH4_TX_BUFSIZ (80) -#define SCI_CFG_CH5_TX_BUFSIZ (80) -#define SCI_CFG_CH6_TX_BUFSIZ (80) -#define SCI_CFG_CH7_TX_BUFSIZ (80) -#define SCI_CFG_CH8_TX_BUFSIZ (80) -#define SCI_CFG_CH9_TX_BUFSIZ (80) -#define SCI_CFG_CH10_TX_BUFSIZ (80) -#define SCI_CFG_CH11_TX_BUFSIZ (80) -#define SCI_CFG_CH12_TX_BUFSIZ (80) - -/* SPECIFY ASYNC MODE RX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_RX_BUFSIZ (80) -#define SCI_CFG_CH1_RX_BUFSIZ (80) -#define SCI_CFG_CH2_RX_BUFSIZ (80) -#define SCI_CFG_CH3_RX_BUFSIZ (80) -#define SCI_CFG_CH4_RX_BUFSIZ (80) -#define SCI_CFG_CH5_RX_BUFSIZ (80) -#define SCI_CFG_CH6_RX_BUFSIZ (80) -#define SCI_CFG_CH7_RX_BUFSIZ (80) -#define SCI_CFG_CH8_RX_BUFSIZ (80) -#define SCI_CFG_CH9_RX_BUFSIZ (80) -#define SCI_CFG_CH10_RX_BUFSIZ (80) -#define SCI_CFG_CH11_RX_BUFSIZ (80) -#define SCI_CFG_CH12_RX_BUFSIZ (80) - -/* -* ENABLE TRANSMIT END INTERRUPT (ASYNCHRONOUS) -* This interrupt only occurs when the last bit of the last byte of data -* has been sent and the transmitter has become idle. The interrupt calls -* the user's callback function specified in R_SCI_Open() and passes it an -* SCI_EVT_TEI event. A typical use of this feature is to disable an external -* transceiver to save power. It would then be up to the user's code to -* re-enable the transceiver before sending again. Not including this feature -* reduces code space used by the interrupt. Note that this equate is only -* for including the TEI code. The interrupt itself must be enabled using an -* R_SCI_Control(hdl, SCI_CMD_EN_TEI, NULL) call. -*/ -#define SCI_CFG_TEI_INCLUDED (0) /* 1=included, 0=not */ - -/* -* SET GROUP12 (RECEIVER ERROR) INTERRUPT PRIORITY; RX63N/631 ONLY -* This #define sets the priority level for the interrupt that handles -* receiver overrun, framing, and parity errors for all SCI channels -* on the RX63N/631. It is ignored for all other parts. -*/ -#define SCI_CFG_RXERR_PRIORITY (3) /* (RX63N/631 ONLY) 1 lowest, 15 highest */ - -/* -* SET GROUPBL0 (ERI, TEI) INTERRUPT PRIORITY; RX64M/RX71M/RX65N ONLY -* SET GROUPBL1, GROUPAL0 (ERI,TEI) INTERRUPT PRIORITY; RX65N ONLY -* This sets the priority level for receiver overrun, framing, and parity errors -* as well as TEI interrupts for all SCI channels. -*/ -#define SCI_CFG_ERI_TEI_PRIORITY (3) /* (RX64M/RX71M/RX65N ONLY) 1 lowest, 15 highest */ - -/* ENABLE TX/RX FIFO; (SCIi supported MCU ONLY) 1=included, 0=not */ -#define SCI_CFG_CH10_FIFO_INCLUDED (0) -#define SCI_CFG_CH11_FIFO_INCLUDED (0) - -/* SET TX FIFO THRESHOLD; (SCIi supported MCU ONLY) 0 lowest, 15 highest */ -/* TX FIFO THRESHOLD is invalid in Clock Synchronous Mode and Simple SPI Mode. */ -/* Set the same value for TX FIFO THRESHOLD and RX FIFO THRESHOLD in Clock Synchronous Mode and Simple SPI Mode. */ -#define SCI_CFG_CH10_TX_FIFO_THRESH (8) -#define SCI_CFG_CH11_TX_FIFO_THRESH (8) - -/* SET RX FIFO THRESHOLD; (SCIi supported MCU ONLY) 1 lowest, 15 highest */ -#define SCI_CFG_CH10_RX_FIFO_THRESH (8) -#define SCI_CFG_CH11_RX_FIFO_THRESH (8) - - -#endif /* SCI_CONFIG_H */ diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_pincfg/Pin.c b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_pincfg/Pin.c deleted file mode 100644 index f8f40ab689b..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_pincfg/Pin.c +++ /dev/null @@ -1,111 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : Pin.c -* Version : 1.0.2 -* Device(s) : R5F564MLCxFB -* Description : This file implements SMC pin code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -/* Start user code for include. Do not edit comment generated here */ -#include "Pin.h" -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: R_Pins_Create -* Description : This function initializes Smart Configurator pins -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Pins_Create(void) -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set ET0_MDC pin */ - MPC.P72PFS.BYTE = 0x11U; - PORT7.PMR.BYTE |= 0x04U; - - /* Set ET0_MDIO pin */ - MPC.P71PFS.BYTE = 0x11U; - PORT7.PMR.BYTE |= 0x02U; - - /* Set REF50CK0 pin */ - MPC.P76PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x40U; - - /* Set RMII0_CRS_DV pin */ - MPC.P83PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x08U; - - /* Set RMII0_RXD0 pin */ - MPC.P75PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x20U; - - /* Set RMII0_RXD1 pin */ - MPC.P74PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x10U; - - /* Set RMII0_RX_ER pin */ - MPC.P77PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x80U; - - /* Set RMII0_TXD0 pin */ - MPC.P81PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x02U; - - /* Set RMII0_TXD1 pin */ - MPC.P82PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x04U; - - /* Set RMII0_TXD_EN pin */ - MPC.P80PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x01U; - - /* Set RXD7 pin */ - MPC.P92PFS.BYTE = 0x0AU; - PORT9.PMR.BYTE |= 0x04U; - - /* Set TXD7 pin */ - PORT9.PODR.BYTE |= 0x01U; - MPC.P90PFS.BYTE = 0x0AU; - PORT9.PDR.BYTE |= 0x01U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_pincfg/Pin.h b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_pincfg/Pin.h deleted file mode 100644 index 5a207267b88..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_pincfg/Pin.h +++ /dev/null @@ -1,50 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : Pin.h -* Version : 1.0.2 -* Device(s) : R5F564MLCxFB -* Description : This file implements SMC pin code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef PIN_H -#define PIN_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Pins_Create(void); -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_pincfg/r_ether_rx_pinset.c b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_pincfg/r_ether_rx_pinset.c deleted file mode 100644 index 75cb3960a9a..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_pincfg/r_ether_rx_pinset.c +++ /dev/null @@ -1,90 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_ether_rx_pinset.c -* Version : 1.0.2 -* Device(s) : R5F564MLCxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_ether_rx_pinset.h" -#include "platform.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: R_ETHER_PinSet_ETHERC0_RMII -* Description : This function initializes pins for r_ether_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_ETHER_PinSet_ETHERC0_RMII() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set REF50CK0 pin */ - MPC.P76PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B6 = 1U; - - /* Set RMII0_TXD_EN pin */ - MPC.P80PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B0 = 1U; - - /* Set RMII0_TXD1 pin */ - MPC.P82PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B2 = 1U; - - /* Set RMII0_TXD0 pin */ - MPC.P81PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B1 = 1U; - - /* Set RMII0_RXD1 pin */ - MPC.P74PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B4 = 1U; - - /* Set RMII0_RXD0 pin */ - MPC.P75PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B5 = 1U; - - /* Set RMII0_RX_ER pin */ - MPC.P77PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B7 = 1U; - - /* Set RMII0_CRS_DV pin */ - MPC.P83PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B3 = 1U; - - /* Set ET0_MDC pin */ - MPC.P72PFS.BYTE = 0x11U; - PORT7.PMR.BIT.B2 = 1U; - - /* Set ET0_MDIO pin */ - MPC.P71PFS.BYTE = 0x11U; - PORT7.PMR.BIT.B1 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_pincfg/r_ether_rx_pinset.h b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_pincfg/r_ether_rx_pinset.h deleted file mode 100644 index 36a0aa4b7c2..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_pincfg/r_ether_rx_pinset.h +++ /dev/null @@ -1,41 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_ether_rx_pinset.h -* Version : 1.0.2 -* Device(s) : R5F564MLCxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef R_ETHER_RX_H -#define R_ETHER_RX_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -void R_ETHER_PinSet_ETHERC0_RMII(); - -#endif diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_pincfg/r_pinset.h b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_pincfg/r_pinset.h deleted file mode 100644 index 78eb1dfbb97..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_pincfg/r_pinset.h +++ /dev/null @@ -1,35 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_pinset.h.h -* Version : 1.0.1 -* Description : Declares all pin code headers into a single file -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef R_PINSET_H -#define R_PINSET_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_sci_rx_pinset.h" -#include "r_ether_rx_pinset.h" - -#endif /* R_PINSET_H */ diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_pincfg/r_sci_rx_pinset.c b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_pincfg/r_sci_rx_pinset.c deleted file mode 100644 index e850756e0df..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_pincfg/r_sci_rx_pinset.c +++ /dev/null @@ -1,58 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_pinset.c -* Version : 1.0.2 -* Device(s) : R5F564MLCxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_sci_rx_pinset.h" -#include "platform.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: R_SCI_PinSet_SCI7 -* Description : This function initializes pins for r_sci_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_SCI_PinSet_SCI7() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set RXD7/SMISO7 pin */ - MPC.P92PFS.BYTE = 0x0AU; - PORT9.PMR.BIT.B2 = 1U; - - /* Set TXD7/SMOSI7 pin */ - MPC.P90PFS.BYTE = 0x0AU; - PORT9.PMR.BIT.B0 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_pincfg/r_sci_rx_pinset.h b/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_pincfg/r_sci_rx_pinset.h deleted file mode 100644 index f02781f4708..00000000000 --- a/demos/renesas/rx64m-gr-kaede/ccrx-e2studio/src/smc_gen/r_pincfg/r_sci_rx_pinset.h +++ /dev/null @@ -1,41 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_pinset.h -* Version : 1.0.2 -* Device(s) : R5F564MLCxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef R_SCI_RX_H -#define R_SCI_RX_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -void R_SCI_PinSet_SCI7(); - -#endif diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.cproject b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.cproject deleted file mode 100644 index 69bc7691275..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.cproject +++ /dev/null @@ -1,342 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.gitignore b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.gitignore deleted file mode 100644 index 11e355d8bc7..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.gitignore +++ /dev/null @@ -1,3 +0,0 @@ -/HardwareDebug/ -/.settings/ -/trash/ \ No newline at end of file diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.project b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.project deleted file mode 100644 index 282e5d5faf2..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.project +++ /dev/null @@ -1,542 +0,0 @@ - - - aws_demos - - - - - - org.eclipse.xtext.ui.shared.xtextBuilder - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - org.eclipse.xtext.ui.shared.xtextNature - - - - application_code - 2 - PARENT-1-PROJECT_LOC/common/application_code - - - config_files - 2 - PARENT-1-PROJECT_LOC/common/config_files - - - lib - 2 - virtual:/virtual - - - application_code/common_demos - 2 - virtual:/virtual - - - lib/aws - 2 - virtual:/virtual - - - lib/third_party - 2 - virtual:/virtual - - - src/FIT_modified_code - 2 - virtual:/virtual - - - src/amazon_freertos_common - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/amazon_freertos_common - - - application_code/common_demos/include - 2 - AWS_IOT_MCU_ROOT/demos/common/include - - - application_code/common_demos/source - 2 - virtual:/virtual - - - lib/aws/FreeRTOS - 2 - AWS_IOT_MCU_ROOT/lib/FreeRTOS - - - lib/aws/FreeRTOS-Plus-TCP - 2 - AWS_IOT_MCU_ROOT/lib/FreeRTOS-Plus-TCP - - - lib/aws/bufferpool - 2 - AWS_IOT_MCU_ROOT/lib/bufferpool - - - lib/aws/crypto - 2 - AWS_IOT_MCU_ROOT/lib/crypto - - - lib/aws/greengrass - 2 - AWS_IOT_MCU_ROOT/lib/greengrass - - - lib/aws/include - 2 - AWS_IOT_MCU_ROOT/lib/include - - - lib/aws/mqtt - 2 - AWS_IOT_MCU_ROOT/lib/mqtt - - - lib/aws/pkcs11 - 2 - AWS_IOT_MCU_ROOT/lib/pkcs11/portable/renesas/rx64m-gr-kaede - - - lib/aws/secure_sockets - 2 - AWS_IOT_MCU_ROOT/lib/secure_sockets/portable/renesas/rx64m-gr-kaede - - - lib/aws/shadow - 2 - AWS_IOT_MCU_ROOT/lib/shadow - - - lib/aws/tls - 2 - AWS_IOT_MCU_ROOT/lib/tls - - - lib/aws/utils - 2 - AWS_IOT_MCU_ROOT/lib/utils - - - lib/aws/wifi - 2 - AWS_IOT_MCU_ROOT/lib/wifi/portable/renesas/rx64m-gr-kaede - - - lib/third_party/jsmn - 2 - AWS_IOT_MCU_ROOT/lib/third_party/jsmn - - - lib/third_party/mbedtls - 2 - virtual:/virtual - - - lib/third_party/mcu_vendor - 2 - virtual:/virtual - - - lib/third_party/pkcs11 - 2 - AWS_IOT_MCU_ROOT/lib/third_party/pkcs11 - - - lib/third_party/tinycbor - 2 - AWS_IOT_MCU_ROOT/lib/third_party/tinycbor - - - src/FIT_modified_code/Please exclude unnecessary r_xxx from build - 1 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/.files/Please%20exclude%20unnecessary%20r_xxx%20from%20build - - - src/FIT_modified_code/attention!.txt - 1 - PROJECT_LOC/src/attention!.txt - - - src/FIT_modified_code/r_bsp - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_bsp - - - src/FIT_modified_code/r_byteq - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_byteq - - - src/FIT_modified_code/r_cmt_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_cmt_rx - - - src/FIT_modified_code/r_ether_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_ether_rx - - - src/FIT_modified_code/r_flash_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_flash_rx - - - src/FIT_modified_code/r_riic_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_riic_rx - - - src/FIT_modified_code/r_s12ad_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_s12ad_rx - - - src/FIT_modified_code/r_sci_iic_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_iic_rx - - - src/FIT_modified_code/r_sci_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_rx - - - application_code/common_demos/include/aws_application_version.h - 1 - AWS_IOT_MCU_ROOT/demos/common/include/aws_application_version.h - - - application_code/common_demos/include/aws_clientcredential_keys.h - 1 - AWS_IOT_MCU_ROOT/demos/common/include/aws_clientcredential_keys.h - - - application_code/common_demos/include/aws_dev_mode_key_provisioning.h - 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- - - 1535360922766 - src/FIT_modified_code/r_riic_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx64m - - - - 1545532460145 - src/FIT_modified_code/r_s12ad_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx64m - - - - 1535360980389 - src/FIT_modified_code/r_sci_iic_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx64m - - - - 1564441820170 - src/FIT_modified_code/r_sci_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx64m - - - - 1515504232772 - lib/aws/FreeRTOS-Plus-TCP/source/portable/BufferManagement - 5 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-BufferAllocation_2.c - - - - 1515504311064 - lib/aws/FreeRTOS-Plus-TCP/source/portable/Compiler - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-GCC - - - - 1515491646756 - lib/aws/FreeRTOS-Plus-TCP/source/portable/NetworkInterface - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-RX - - - - 1537708651935 - src/FIT_modified_code/r_bsp/mcu/rx64m/register_access - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-gnuc - - - - - - AWS_IOT_MCU_ROOT - $%7BPARENT-4-PROJECT_LOC%7D - - - diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.settings/CodeGenerator/cgprojectDatas.datas b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.settings/CodeGenerator/cgprojectDatas.datas deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.settings/com.renesas.smc.e2studio.qe.xml b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.settings/com.renesas.smc.e2studio.qe.xml deleted file mode 100644 index 159ed383805..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.settings/com.renesas.smc.e2studio.qe.xml +++ /dev/null @@ -1,42 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.settings/e2studio_project.prefs b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.settings/e2studio_project.prefs deleted file mode 100644 index 50203530f3d..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.settings/e2studio_project.prefs +++ /dev/null @@ -1,2 +0,0 @@ -# -#Fri Aug 17 10:14:32 JST 2018 diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.settings/fittemp/r_ether_rx.ftl b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.settings/fittemp/r_ether_rx.ftl deleted file mode 100644 index 2bb8ed85d3b..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.settings/fittemp/r_ether_rx.ftl +++ /dev/null @@ -1,45 +0,0 @@ -<#-- - Copyright(C) 2015 Renesas Electronics Corporation - RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY - This program must be used solely for the purpose for which it was furnished - by Renesas Electronics Corporation. No part of this program may be reproduced - or disclosed to others, in any form, without the prior written permission of - Renesas Electronics Corporation. ---> -<#-- = DECLARE FUNCTION INFORMATION HERE =================== --> -<#assign Function_Base_Name = "R_ETHER_PinSet"> -<#assign Function_Description = "This function initializes pins for r_ether_rx module"> -<#assign Function_Arg = "none"> -<#assign Function_Ret = "none"> -<#assign Version = 1.00> - -<#-- = DECLARE FUNCTION CONTENT HERE ======================= --> -<#macro initialsection postfix> -<#assign Function_Name = "${Function_Base_Name}${postfix}"> -<#include "lib/functionheader.ftl"> -void ${Function_Name}() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - -<#macro peripheralpincode pin> - - -<#macro channelpincode pin> - - /* Set ${pin.pinName} pin */ - MPC.${pin.assignedPinName}PFS.BYTE = 0x${pin.pinMPC}U; - PORT${pin.portNum}.PMR.BIT.B${pin.pinBitNum} = 1U; - - -<#macro endsection> - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - - -<#macro headerfilesection postfix> -void ${Function_Base_Name}${postfix}(); - - -<#-- = END OF FILE ========================================= --> \ No newline at end of file diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.settings/fittemp/r_sci_rx.ftl b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.settings/fittemp/r_sci_rx.ftl deleted file mode 100644 index a505f3edde7..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.settings/fittemp/r_sci_rx.ftl +++ /dev/null @@ -1,85 +0,0 @@ -<#-- - Copyright(C) 2015 Renesas Electronics Corporation - RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY - This program must be used solely for the purpose for which it was furnished - by Renesas Electronics Corporation. No part of this program may be reproduced - or disclosed to others, in any form, without the prior written permission of - Renesas Electronics Corporation. ---> -<#-- = DECLARE FUNCTION INFORMATION HERE =================== --> -<#-- - (Step 1) Explanation: These variables are necessary information for the function header. - Please fill up or leave blank, but do not delete ---> -<#assign Function_Base_Name = "R_SCI_PinSet"> -<#assign Function_Description = "This function initializes pins for r_sci_rx module"> -<#assign Function_Arg = "none"> -<#assign Function_Ret = "none"> -<#assign Version = 1.00> - -<#-- = DECLARE FUNCTION CONTENT HERE ======================= --> -<#-- - (Step 2) Explanation: Function content. - - Macro [initialsection] : - Any text that goes into this section will be printed out 1 time per function - input [postfix] :Use this variable to add the channel number to the function base name. ---> -<#macro initialsection postfix> -<#assign Function_Name = "${Function_Base_Name}${postfix}"> -<#include "lib/functionheader.ftl"> -void ${Function_Name}() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - -<#-- - (Step 3) Explanation: Function content. - - Macro [peripheralpincode] : Any text that goes into this section will be printed out 1 time per peripheral - - input [pin] : Available info includes: - pin.pinName :The name of pin, eg “SSLA0†- pin.assignedPinName :The pin assigned to, eg “P32†- pin.pinMPC :The port number of assigned pin, eg “P32†has portNume = “3†- pin.portNum :The bit number of the assigned pin, eg “P32†has pinBitNum = “2†- pin.pinBitNum :The value of MPC ---> -<#macro peripheralpincode pin> - - -<#-- - (Step 4) Explanation: Function content. - - Macro [channelpincode] : Any text that goes into this section will be printed out 1 time per channel - - input [pin] : Same as above ---> -<#macro channelpincode pin> - - /* Set ${pin.pinName} pin */ - MPC.${pin.assignedPinName}PFS.BYTE = 0x${pin.pinMPC}U; - PORT${pin.portNum}.PMR.BIT.B${pin.pinBitNum} = 1U; - - -<#macro channelpincodeextra pin postfix> - - -<#-- - (Step 5) Explanation: Function content. - - Macro [endsection] : Any text that goes into this section will be printed out 1 time last ---> -<#macro endsection> - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - - -<#-- - (Step 6) Explanation: Header file content - - Macro [headerfilesection] : Any text that goes into this section will be printed out 1 time in the header file - - input [postfix] :Use this variable to add the channel number to the function base name. ---> -<#macro headerfilesection postfix> -void ${Function_Base_Name}${postfix}(); - - -<#macro headerfilesectionExtra postfix> - - -<#-- = END OF FILE ========================================= --> \ No newline at end of file diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.settings/language.settings.xml b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.settings/language.settings.xml deleted file mode 100644 index d9903cb6208..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.settings/language.settings.xml +++ /dev/null @@ -1,21 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.settings/org.eclipse.cdt.managedbuilder.core.prefs b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.settings/org.eclipse.cdt.managedbuilder.core.prefs deleted file mode 100644 index 817b60cba1c..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/.settings/org.eclipse.cdt.managedbuilder.core.prefs +++ /dev/null @@ -1,9 +0,0 @@ -eclipse.preferences.version=1 -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/CPATH/delimiter=; -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/CPATH/operation=remove -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/C_INCLUDE_PATH/delimiter=; -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/C_INCLUDE_PATH/operation=remove -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/LIBRARY_PATH/delimiter=; -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/LIBRARY_PATH/operation=remove -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/append=true -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/appendContributed=true diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/aws_demos.scfg b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/aws_demos.scfg deleted file mode 100644 index b8c0fd64b24..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/aws_demos.scfg +++ /dev/null @@ -1,492 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/aws_demos_build_path_check_and_make.bat b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/aws_demos_build_path_check_and_make.bat deleted file mode 100644 index 047f6e34780..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/aws_demos_build_path_check_and_make.bat +++ /dev/null @@ -1,11 +0,0 @@ -@echo off -rem ################################################################################ -rem # This batch file executes some preprocess for build and then executes the make -rem ################################################################################ - -if not exist "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" ( - echo ERROR: Unable to find "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" - exit 2 -) - -"%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" %* diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/rx64m_gr_kaede_aws HardwareDebug.launch b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/rx64m_gr_kaede_aws HardwareDebug.launch deleted file mode 100644 index e94db00b7f7..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/rx64m_gr_kaede_aws HardwareDebug.launch +++ /dev/null @@ -1,147 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_config/r_byteq_config.h b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_config/r_byteq_config.h deleted file mode 100644 index 0b4d4f9bb52..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_config/r_byteq_config.h +++ /dev/null @@ -1,59 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_byteq_config.h -* Description : Configures the byte queue memory allocation -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 24.07.2013 1.00 Initial Release -* : 11.21.2014 1.20 Removed dependency to BSP -* : 30.09.2015 1.50 Added dependency to BSP -***********************************************************************************************************************/ -#ifndef BYTEQ_CONFIG_H -#define BYTEQ_CONFIG_H - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - Available settings: - BSP_CFG_PARAM_CHECKING_ENABLE: - Utilizes the system default setting - 1: - Includes parameter checking - 0: - Compiles out parameter checking -*/ -#define BYTEQ_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY IF SHOULD USE MALLOC() TO ALLOCATE MEMORY FOR QUEUE CONTROL BLOCKS */ -#define BYTEQ_CFG_USE_HEAP_FOR_CTRL_BLKS (0) - -/* SPECIFY NUMBER OF STATIC QUEUE CONTROL BLOCKS TO SUPPORT */ -/* valid only when BYTEQ_USE_HEAP_FOR_CTRL_BLKS is set to 0 */ -#define BYTEQ_CFG_MAX_CTRL_BLKS (4) - - -#endif /* BYTEQ_CONFIG_H */ diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_config/r_cmt_rx_config.h b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_config/r_cmt_rx_config.h deleted file mode 100644 index bfb0bc72d76..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_config/r_cmt_rx_config.h +++ /dev/null @@ -1,37 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_cmt_rx_config.h -* Description : Configures the r_cmt_rx code. -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 06.11.2013 2.00 First GSCE Release. -***********************************************************************************************************************/ -#ifndef CMT_CONFIG_HEADER_FILE -#define CMT_CONFIG_HEADER_FILE - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ -/* The interrupt priority level to be used for CMT interrupts. */ -#define CMT_RX_CFG_IPR (5) - -#endif /* CMT_CONFIG_HEADER_FILE */ - - diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_config/r_ether_rx_config.h b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_config/r_ether_rx_config.h deleted file mode 100644 index ea6b31eee73..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_config/r_ether_rx_config.h +++ /dev/null @@ -1,119 +0,0 @@ -/* Generated configuration header file - do not edit */ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_ether_rx_config.h - * Version : 1.04 - * Description : Ethernet module device driver - ***********************************************************************************************************************/ -/********************************************************************************************************************** - * History : DD.MM.YYYY Version Description - * : 22.07.2014 1.00 First Release - * : 31.03.2016 1.01 Added changes for RX63N. - * : 01.10.2016 1.02 Added changes for RX65N. - * : 01.10.2017 1.03 Added changes for RX65N-2MB. - * : 08.01.2018 1.04 Changed comment. - ***********************************************************************************************************************/ - -/* Guards against multiple inclusion */ -#ifndef R_ETHER_RX_CONFIG_H - #define R_ETHER_RX_CONFIG_H - -/*********************************************************************************************************************** - Macro definitions - ***********************************************************************************************************************/ - -/* Ethernet interface select. - 0 = MII (Media Independent Interface) - 1 = RMII (Reduced Media Independent Interface) - */ - #define ETHER_CFG_MODE_SEL (1) - -/* PHY-LSI address setting for ETHER0/1. - Please set the value 31 ETHER_CFG_CH0_PHY_ADDRESS when use default setting of the RSK+RX63N. - Please set the value 30 ETHER_CFG_CH0_PHY_ADDRESS when use default setting of the RSK+RX65N/RSK+RX65N_2MB. - Please set the value 0 ETHER_CFG_CH0_PHY_ADDRESS and value 1 ETHER_CFG_CH1_PHY_ADDRESS when use default setting of the RSK+RX64M/RSK+RX71M. - */ - #define ETHER_CFG_CH0_PHY_ADDRESS (0) /* Please define the PHY-LSI address in the range of 0-31. */ - #define ETHER_CFG_CH1_PHY_ADDRESS (1) /* Please define the PHY-LSI address in the range of 0-31. */ - -/* The number of Rx descriptors. */ - #define ETHER_CFG_EMAC_RX_DESCRIPTORS (1) - -/* The number of Tx descriptors. */ - #define ETHER_CFG_EMAC_TX_DESCRIPTORS (1) - -/* Please define the size of the sending and receiving buffer in the value where one frame can surely be stored - because the driver is single-frame/single-buffer processing. */ - #define ETHER_CFG_BUFSIZE (1536) /* Must be 32-byte aligned */ - -/* EINT interrupt priority level. This definition is not used when EINT interrupt is assigned to Group interrupt. */ - #define ETHER_CFG_EINT_INT_PRIORITY (2) /* Please define the interruption level within the range of 1-15. */ - -/* Group AL1 interrupt priority level. This definition is not used when EINT interrupt is assigned to Peripheral - interrupt. */ - #define ETHER_CFG_AL1_INT_PRIORTY (2) /* Please define the interruption level within the range of 1-15. */ - -/* The register bus of PHY0/1 for ETHER0/1 select - 0 = The access of the register of PHY uses ETHER0. - 1 = The access of the register of PHY uses ETHER1. - - Please set the value 0 ETHER_CFG_CH0_PHY_ACCESS when use default setting of the RSK+RX63N. - Please set the value 0 ETHER_CFG_CH0_PHY_ACCESS when use default setting of the RSK+RX65N/RSK+RX65N_2MB. - Please set the value 1 ETHER_CFG_CH0_PHY_ACCESS and ETHER_CFG_CH1_PHY_ACCESS when use default setting of the RSK+RX64M/RSK+RX71M. - */ - #define ETHER_CFG_CH0_PHY_ACCESS (0) - #define ETHER_CFG_CH1_PHY_ACCESS (1) - -/* Define the access timing of MII/RMII register */ - #define ETHER_CFG_PHY_MII_WAIT (8) /* Plese define the value of 1 or more */ - -/* Define the waiting time for reset completion of PHY-LSI */ - #define ETHER_CFG_PHY_DELAY_RESET (0x00020000L) - -/** - * Link status read from LMON bit of ETHERC PSR register. The state is hardware dependent. - */ - #define ETHER_CFG_LINK_PRESENT (0) - -/* Use LINKSTA signal for detect link status changes - 0 = unused (use PHY-LSI status register) - 1 = use (use LINKSTA signal) - */ - #define ETHER_CFG_USE_LINKSTA (0) /* This setting is reflected in all channels */ - -/* Definition of whether or not to use KSZ8041NL of the Micrel Inc. - 0 = unused - 1 = use - */ - #define ETHER_CFG_USE_PHY_KSZ8041NL (0) - -/*********************************************************************************************************************** - Typedef definitions - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global variables - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global functions (to be accessed by other files) - ***********************************************************************************************************************/ - -#endif /* R_ETHER_RX_CONFIG_H */ diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_config/r_flash_rx_config.h b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_config/r_flash_rx_config.h deleted file mode 100644 index fbf916a0e97..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_config/r_flash_rx_config.h +++ /dev/null @@ -1,116 +0,0 @@ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_flash_rx_config_reference.h - * Description : Configures the FLASH API module for RX200 and RX600 Series MCU's. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* 12.04.2014 1.00 First Release -* 22.12.2014 1.10 Added flash type usage comments. -* 25.06.2015 1.20 Added FLASH_CFG_CODE_FLASH_RUN_FROM_ROM. -* : 12.10.2016 2.00 Modified for BSPless operation (added FLASH_CFG_USE_FIT_BSP). -***********************************************************************************************************************/ -#ifndef FLASH_CONFIG_HEADER_FILE -#define FLASH_CONFIG_HEADER_FILE - -/* Set the following value to 0 when building without using the FIT BSP Module */ -#define FLASH_CFG_USE_FIT_BSP (1) - - -/*********************************************************************************************************************** - Configuration Options - ***********************************************************************************************************************/ -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting - * Setting to 1 includes parameter checking; 0 compiles out parameter checking - */ -#define FLASH_CFG_PARAM_CHECKING_ENABLE (1) - - -/****************************************************************************** - ENABLE CODE FLASH PROGRAMMING -******************************************************************************/ -/* If you are only using data flash, set this to 0. - * Setting to 1 includes code to program the ROM area. When programming ROM, - * code must be executed from RAM, except under certain restrictions for flash - * type 3 (see section 2.14 in App Note). See section 2.13 in the App Note for - * details on how to set up code and the linker to execute code from RAM. - */ -#define FLASH_CFG_CODE_FLASH_ENABLE (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING DATA FLASH OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces data flash API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, data flash operations return immediately after the operation has been - * started. Notification of the operation completion is done via the callback - * function. - */ -#define FLASH_CFG_DATA_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING CODE FLASH (ROM) OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces ROM API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, ROM operations return immediately after the operation has been started. - * Notification of the operation completion is done via the callback function. - * When reprogramming ROM, THE RELOCATABLE VECTOR TABLE AND CORRESPONDING - * INTERRUPT ROUTINES MUST BE IN RAM. - * See sections 2.16 Usage Notes in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE CODE FLASH SELF-PROGRAMMING -******************************************************************************/ -/* Set this to 0 when programming code flash while executing in RAM. - * Set this to 1 when programming code flash while executing from another - * segment in ROM (possible only with RX64M, RX71M, RX65N-2 groups). - * See section 2.14 in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_RUN_FROM_ROM (0) - - -/****************************************************************************** - SET IPL OF FLASH READY INTERRUPT -******************************************************************************/ -#define FLASH_CFG_FLASH_READY_IPL (5) // Flash type 2 only - - -/****************************************************************************** - ENABLE OR DISABLE LOCK BIT PROTECTION -******************************************************************************/ -/* Each erasure block has a corresponding lock bit that can be used to - * protect that block from being programmed/erased after the lock bit is - * set. The use of lock bits can be used or ignored. - * Setting this to 1 will cause lock bits to be ignored and programs/erases to a - * block will not be limited. - * Setting this to 0 will cause lock bits to be used as the user configures through - * the Control command. This only applies to ROM as the DF does not have lock bits. - */ -#define FLASH_CFG_IGNORE_LOCK_BITS (1) // Flash type 2 only - - -#endif /* FLASH_CONFIG_HEADER_FILE */ diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_config/r_s12ad_rx_config.h b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_config/r_s12ad_rx_config.h deleted file mode 100644 index 0202bf133a4..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_config/r_s12ad_rx_config.h +++ /dev/null @@ -1,53 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_s12ad_rx_config.h -* Description : Configures the 12-bit A/D driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 22.07.2013 1.00 Initial Release. -* 21.04.2014 1.20 Updated for RX210 advanced features; RX110/63x support. -***********************************************************************************************************************/ -#ifndef S12AD_CONFIG_H -#define S12AD_CONFIG_H - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* - * SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting. - * Setting to 1 includes parameter checking; 0 compiles out parameter checking. - */ -#define ADC_CFG_PARAM_CHECKING_ENABLE BSP_CFG_PARAM_CHECKING_ENABLE - - -/* - * RX210 Series only; Temperature Sensor Programmable Gain Amplifier (PGA) - * SELECT PGA GAIN TO MATCH AVCC0 VOLTAGE RANGE: - * 0: 1.8V <= AVcc0 < 2.7V; default; good for all actual voltages - * 1: 2.7V <= AVcc0 < 3.6V - * 2: 3.6V <= AVcc0 < 4.5V - * 3: 4.5V <= AVcc0 <= 5.5V - */ -#define ADC_CFG_PGA_GAIN (0) - - -#endif /* S12AD_CONFIG_H */ diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_config/r_sci_rx_config.h b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_config/r_sci_rx_config.h deleted file mode 100644 index 6566d7c4a75..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_config/r_sci_rx_config.h +++ /dev/null @@ -1,171 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_config.h -* Description : Configures the SCI driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 25.09.2013 1.00 Initial Release -* 17.04.2014 1.20 Added comments for new RX110 support. -* 02.07.2014 1.30 Fixed bug that caused Group12 rx errors to only be enabled for channel 2. -* 25.11.2014 1.40 Added comments for RX113 support -* 30.09.2015 1.70 Added comments for RX23T support -* 01.10.2016 1.80 Added support for RX65N (comments and TX/RX FIFO THRESHOLD options) -* 19.12.2016 1.90 Added comments for RX24U support -* 07.03.2017 2.00 Added comments for RX130-512KB support -***********************************************************************************************************************/ -#ifndef SCI_CONFIG_H -#define SCI_CONFIG_H - -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING */ -/* Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting */ -/* Setting to 1 includes parameter checking; 0 compiles out parameter checking */ -#define SCI_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY WHETHER TO INCLUDE CODE FOR DIFFERENT SCI MODES */ -/* Setting an equate to 1 includes code specific to that mode. */ -#define SCI_CFG_ASYNC_INCLUDED (1) -#define SCI_CFG_SYNC_INCLUDED (0) -#define SCI_CFG_SSPI_INCLUDED (0) - -/* SPECIFY BYTE VALUE TO TRANSMIT WHILE CLOCKING IN DATA IN SSPI MODES */ -#define SCI_CFG_DUMMY_TX_BYTE (0xFF) - -/* SPECIFY CHANNELS TO INCLUDE SOFTWARE SUPPORT FOR 1=included, 0=not */ -/* - * NOTE: If using ASYNC mode, adjust BYTEQ_CFG_MAX_CTRL_BLKS in r_byteq_config.h - * to provide 2 queues per channel (static mode only). - * * = port connector RDKRX63N, RSKRX210, RSKRX11x - * u = channel used by the USB-UART port (G1CUSB0) - * a = this channel is used only for RX130-512KB - * RX MCU supported channels - * - * CH# 110 111 113 130 210 230 231 23T 24T 24U 63N 631 64M 71M 65N - * --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- - * CH0 X Xa X* X X X* X X X X - * CH1 X X* X* Xu X X X Xu Xu Xu X X X X X - * CH2 X X X X X Xu - * CH3 X X X X X - * CH4 X X X X X - * CH5 X X X X X X Xu X X X X X X X X - * CH6 X X X X X X X X X X X X - * CH7 X X Xu Xu X - * CH8 X Xa X X X X X X X - * CH9 X Xa X X X X X X X - * CH10 X X X - * CH11 X X X X - * CH12 X X X X X X X X X X X X -*/ - -#define SCI_CFG_CH0_INCLUDED (0) -#define SCI_CFG_CH1_INCLUDED (0) -#define SCI_CFG_CH2_INCLUDED (0) -#define SCI_CFG_CH3_INCLUDED (0) -#define SCI_CFG_CH4_INCLUDED (0) -#define SCI_CFG_CH5_INCLUDED (0) -#define SCI_CFG_CH6_INCLUDED (0) -#define SCI_CFG_CH7_INCLUDED (1) -#define SCI_CFG_CH8_INCLUDED (0) -#define SCI_CFG_CH9_INCLUDED (0) -#define SCI_CFG_CH10_INCLUDED (0) -#define SCI_CFG_CH11_INCLUDED (0) -#define SCI_CFG_CH12_INCLUDED (1) - -/* SPECIFY ASYNC MODE TX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_TX_BUFSIZ (80) -#define SCI_CFG_CH1_TX_BUFSIZ (80) -#define SCI_CFG_CH2_TX_BUFSIZ (80) -#define SCI_CFG_CH3_TX_BUFSIZ (80) -#define SCI_CFG_CH4_TX_BUFSIZ (80) -#define SCI_CFG_CH5_TX_BUFSIZ (80) -#define SCI_CFG_CH6_TX_BUFSIZ (80) -#define SCI_CFG_CH7_TX_BUFSIZ (80) -#define SCI_CFG_CH8_TX_BUFSIZ (80) -#define SCI_CFG_CH9_TX_BUFSIZ (80) -#define SCI_CFG_CH10_TX_BUFSIZ (80) -#define SCI_CFG_CH11_TX_BUFSIZ (80) -#define SCI_CFG_CH12_TX_BUFSIZ (80) - -/* SPECIFY ASYNC MODE RX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_RX_BUFSIZ (80) -#define SCI_CFG_CH1_RX_BUFSIZ (80) -#define SCI_CFG_CH2_RX_BUFSIZ (80) -#define SCI_CFG_CH3_RX_BUFSIZ (80) -#define SCI_CFG_CH4_RX_BUFSIZ (80) -#define SCI_CFG_CH5_RX_BUFSIZ (80) -#define SCI_CFG_CH6_RX_BUFSIZ (80) -#define SCI_CFG_CH7_RX_BUFSIZ (80) -#define SCI_CFG_CH8_RX_BUFSIZ (80) -#define SCI_CFG_CH9_RX_BUFSIZ (80) -#define SCI_CFG_CH10_RX_BUFSIZ (80) -#define SCI_CFG_CH11_RX_BUFSIZ (80) -#define SCI_CFG_CH12_RX_BUFSIZ (80) - -/* -* ENABLE TRANSMIT END INTERRUPT (ASYNCHRONOUS) -* This interrupt only occurs when the last bit of the last byte of data -* has been sent and the transmitter has become idle. The interrupt calls -* the user's callback function specified in R_SCI_Open() and passes it an -* SCI_EVT_TEI event. A typical use of this feature is to disable an external -* transceiver to save power. It would then be up to the user's code to -* re-enable the transceiver before sending again. Not including this feature -* reduces code space used by the interrupt. Note that this equate is only -* for including the TEI code. The interrupt itself must be enabled using an -* R_SCI_Control(hdl, SCI_CMD_EN_TEI, NULL) call. -*/ -#define SCI_CFG_TEI_INCLUDED (0) /* 1=included, 0=not */ - -/* -* SET GROUP12 (RECEIVER ERROR) INTERRUPT PRIORITY; RX63N/631 ONLY -* This #define sets the priority level for the interrupt that handles -* receiver overrun, framing, and parity errors for all SCI channels -* on the RX63N/631. It is ignored for all other parts. -*/ -#define SCI_CFG_RXERR_PRIORITY (3) /* (RX63N/631 ONLY) 1 lowest, 15 highest */ - -/* -* SET GROUPBL0 (ERI, TEI) INTERRUPT PRIORITY; RX64M/RX71M/RX65N ONLY -* SET GROUPBL1, GROUPAL0 (ERI,TEI) INTERRUPT PRIORITY; RX65N ONLY -* This sets the priority level for receiver overrun, framing, and parity errors -* as well as TEI interrupts for all SCI channels. -*/ -#define SCI_CFG_ERI_TEI_PRIORITY (3) /* (RX64M/RX71M/RX65N ONLY) 1 lowest, 15 highest */ - -/* ENABLE TX/RX FIFO; (SCIi supported MCU ONLY) 1=included, 0=not */ -#define SCI_CFG_CH10_FIFO_INCLUDED (0) -#define SCI_CFG_CH11_FIFO_INCLUDED (0) - -/* SET TX FIFO THRESHOLD; (SCIi supported MCU ONLY) 0 lowest, 15 highest */ -/* TX FIFO THRESHOLD is invalid in Clock Synchronous Mode and Simple SPI Mode. */ -/* Set the same value for TX FIFO THRESHOLD and RX FIFO THRESHOLD in Clock Synchronous Mode and Simple SPI Mode. */ -#define SCI_CFG_CH10_TX_FIFO_THRESH (8) -#define SCI_CFG_CH11_TX_FIFO_THRESH (8) - -/* SET RX FIFO THRESHOLD; (SCIi supported MCU ONLY) 1 lowest, 15 highest */ -#define SCI_CFG_CH10_RX_FIFO_THRESH (8) -#define SCI_CFG_CH11_RX_FIFO_THRESH (8) - - -#endif /* SCI_CONFIG_H */ diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_ether_rx_pinset.c b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_ether_rx_pinset.c deleted file mode 100644 index 4acd7beeb80..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_ether_rx_pinset.c +++ /dev/null @@ -1,90 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_ether_rx_pinset.c -* Version : 1.0.2 -* Device(s) : R5F564MLCxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2018-08-19 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_ether_rx_pinset.h" -#include "platform.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: R_ETHER_PinSet_ETHERC0_RMII -* Description : This function initializes pins for r_ether_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_ETHER_PinSet_ETHERC0_RMII(void) -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set REF50CK0 pin */ - MPC.P76PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B6 = 1U; - - /* Set RMII0_TXD_EN pin */ - MPC.P80PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B0 = 1U; - - /* Set RMII0_TXD1 pin */ - MPC.P82PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B2 = 1U; - - /* Set RMII0_TXD0 pin */ - MPC.P81PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B1 = 1U; - - /* Set RMII0_RXD1 pin */ - MPC.P74PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B4 = 1U; - - /* Set RMII0_RXD0 pin */ - MPC.P75PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B5 = 1U; - - /* Set RMII0_RX_ER pin */ - MPC.P77PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B7 = 1U; - - /* Set RMII0_CRS_DV pin */ - MPC.P83PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B3 = 1U; - - /* Set ET0_MDC pin */ - MPC.P72PFS.BYTE = 0x11U; - PORT7.PMR.BIT.B2 = 1U; - - /* Set ET0_MDIO pin */ - MPC.P71PFS.BYTE = 0x11U; - PORT7.PMR.BIT.B1 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_ether_rx_pinset.h b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_ether_rx_pinset.h deleted file mode 100644 index e4235713c5c..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_ether_rx_pinset.h +++ /dev/null @@ -1,41 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_ether_rx_pinset.h -* Version : 1.0.2 -* Device(s) : R5F564MLCxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2018-08-19 -***********************************************************************************************************************/ - -#ifndef R_ETHER_RX_H -#define R_ETHER_RX_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -void R_ETHER_PinSet_ETHERC0_RMII(void); - -#endif diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_pinset.h b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_pinset.h deleted file mode 100644 index 44f4b3f4d77..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_pinset.h +++ /dev/null @@ -1,35 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_pinset.h.h -* Version : 1.0.1 -* Description : Declares all pin code headers into a single file -* Creation Date: 2018-08-19 -***********************************************************************************************************************/ - -#ifndef R_PINSET_H -#define R_PINSET_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_sci_rx_pinset.h" -#include "r_ether_rx_pinset.h" - -#endif /* R_PINSET_H */ diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_sci_rx_pinset.c b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_sci_rx_pinset.c deleted file mode 100644 index 4468b72e49f..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_sci_rx_pinset.c +++ /dev/null @@ -1,58 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_pinset.c -* Version : 1.0.2 -* Device(s) : R5F564MLCxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2018-08-19 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_sci_rx_pinset.h" -#include "platform.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: R_SCI_PinSet_SCI7 -* Description : This function initializes pins for r_sci_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_SCI_PinSet_SCI7(void) -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set RXD7/SMISO7 pin */ - MPC.P92PFS.BYTE = 0x0AU; - PORT9.PMR.BIT.B2 = 1U; - - /* Set TXD7/SMOSI7 pin */ - MPC.P90PFS.BYTE = 0x0AU; - PORT9.PMR.BIT.B0 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_sci_rx_pinset.h b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_sci_rx_pinset.h deleted file mode 100644 index 0b527fd6f0e..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_sci_rx_pinset.h +++ /dev/null @@ -1,41 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_pinset.h -* Version : 1.0.2 -* Device(s) : R5F564MLCxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2018-08-19 -***********************************************************************************************************************/ - -#ifndef R_SCI_RX_H -#define R_SCI_RX_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -void R_SCI_PinSet_SCI7(void); - -#endif diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/attention!.txt b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/attention!.txt deleted file mode 100644 index eebc694d16c..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/attention!.txt +++ /dev/null @@ -1,32 +0,0 @@ -Please note that the following folders in the project window of IDEs are -so called 'linked' folders. - --------------------------------------------- -Linked folders in the project window of IDEs --------------------------------------------- - -src/FIT_modified_code/r_bsp -src/FIT_modified_code/r_byteq -src/FIT_modified_code/r_cmt_rx -src/FIT_modified_code/r_ether_rx -src/FIT_modified_code/r_flash_rx -src/FIT_modified_code/r_riic_rx -src/FIT_modified_code/r_sci_iic_rx -src/FIT_modified_code/r_sci_rx -src/amazon_freertos_common - ----------------------------------------------------------- -Folders on the File System of the WINDOWS Operating System ----------------------------------------------------------- - -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_bsp -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_byteq -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_cmt_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_ether_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_flash_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_riic_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_iic_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/amazon_freertos_common - -[EOF] diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/linker_script.ld b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/linker_script.ld deleted file mode 100644 index 47a949c532f..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/linker_script.ld +++ /dev/null @@ -1,193 +0,0 @@ -MEMORY -{ - RAM : ORIGIN = 0x0, LENGTH = 524288 - ROM : ORIGIN = 0xFFC00000, LENGTH = 4194304 - OFS : ORIGIN = 0x120000, LENGTH = 256 -DATAFLASH (!rx) : ORIGIN = 0x00100000, LENGTH = 65536 -} - -SECTIONS -{ - .exvectors 0xFFFFFF80 : AT(0xFFFFFF80) - { - _exvectors_start = .; - KEEP(*(.exvectors)) - _exvectors_end = .; - } >ROM - .fvectors 0xFFFFFFFC : AT(0xFFFFFFFC) - { - KEEP(*(.fvectors)) - } >ROM - .text 0xFFC00000 : AT(0xFFC00000) - { - *(.text) - *(.text.*) - *(P) - etext = .; - } >ROM - .rvectors : - { - _rvectors_start = .; - INCLUDE ../src/linker_script_rvectors.ld_inc - _rvectors_end = .; - } >ROM - .init : - { - KEEP(*(.init)) - __preinit_array_start = .; - KEEP(*(.preinit_array)) - __preinit_array_end = .; - __init_array_start = (. + 3) & ~ 3; - KEEP(*(.init_array)) - KEEP(*(SORT(.init_array.*))) - __init_array_end = .; - __fini_array_start = .; - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - __fini_array_end = .; - } >ROM - .fini : - { - KEEP(*(.fini)) - } >ROM - .got : - { - *(.got) - *(.got.plt) - } >ROM - .rodata : - { - *(.rodata) - *(.rodata.*) - *(C_1) - *(C_2) - *(C) - _erodata = .; - } >ROM - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } >ROM - .eh_frame : - { - *(.eh_frame) - } >ROM - .jcr : - { - *(.jcr) - } >ROM - .tors : - { - __CTOR_LIST__ = .; - . = ALIGN(2); - ___ctors = .; - *(.ctors) - ___ctors_end = .; - __CTOR_END__ = .; - __DTOR_LIST__ = .; - ___dtors = .; - *(.dtors) - ___dtors_end = .; - __DTOR_END__ = .; - . = ALIGN(2); - _mdata = .; - } >ROM - .r_bsp_NULL 0 : AT(0) - { - . += 0x100; - _r_bsp_NULL_end = .; - } >RAM - /* - * .r_bsp_ustack BLOCK(4) : - * { - * KEEP(*(.r_bsp_ustack)) - * } > RAM - * .ustack : - * { - * _ustack = .; - * } > RAM - */ - .r_bsp_istack BLOCK(4) : - { - KEEP(*(.r_bsp_istack)) - } >RAM - .istack : - { - _istack = .; - } >RAM - .data : AT(_mdata) - { - _data = .; - *(.data) - *(.data.*) - *(D) - *(D_1) - *(D_2) - _edata = .; - } >RAM - .gcc_exc : - { - *(.gcc_exc) - } >RAM - .bss : - { - _bss = .; - *(.bss) - *(.bss.**) - *(COMMON) - *(B) - *(B_1) - *(B_2) - _ebss = .; - _end = .; - } >RAM - B_ETHERNET_BUFFERS_1 BLOCK(32) : - { - _B_ETHERNET_BUFFERS_1_start = .; - *(B_ETHERNET_BUFFERS_1) - _B_ETHERNET_BUFFERS_1_end = .; - } >RAM - B_RX_DESC_1 : - { - _B_RX_DESC_1_start = .; - *(B_RX_DESC_1) - _B_RX_DESC_1_end = .; - } >RAM - B_TX_DESC_1 : - { - _B_TX_DESC_1_start = .; - *(B_TX_DESC_1) - _B_TX_DESC_1_end = .; - } >RAM - .ofs1 0x120040 : AT(0x120040) - { - KEEP(*(.ofs1)) - } >OFS - .ofs2 0x120048 : AT(0x120048) - { - KEEP(*(.ofs2)) - } >OFS - .ofs3 0x120050 : AT(0x120050) - { - KEEP(*(.ofs3)) - } >OFS - .ofs4 0x120060 : AT(0x120060) - { - KEEP(*(.ofs4)) - } >OFS - C_PKCS11_STORAGE_1 : - { - } >DATAFLASH C_PKCS11_STORAGE_MIRROR_1 : -{ -} >DATAFLASH - - - - - - - - -} - - diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/linker_script_rvectors.ld_inc b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/linker_script_rvectors.ld_inc deleted file mode 100644 index 818dda33da0..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/linker_script_rvectors.ld_inc +++ /dev/null @@ -1,256 +0,0 @@ - LONG(DEFINED($tableentry$0$.rvectors) ? $tableentry$0$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$1$.rvectors) ? $tableentry$1$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$2$.rvectors) ? $tableentry$2$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$3$.rvectors) ? $tableentry$3$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$4$.rvectors) ? $tableentry$4$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$5$.rvectors) ? $tableentry$5$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$6$.rvectors) ? $tableentry$6$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$7$.rvectors) ? $tableentry$7$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$8$.rvectors) ? $tableentry$8$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$9$.rvectors) ? $tableentry$9$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$10$.rvectors) ? $tableentry$10$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$11$.rvectors) ? $tableentry$11$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$12$.rvectors) ? $tableentry$12$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$13$.rvectors) ? $tableentry$13$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$14$.rvectors) ? $tableentry$14$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$15$.rvectors) ? $tableentry$15$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$16$.rvectors) ? $tableentry$16$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$17$.rvectors) ? $tableentry$17$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$18$.rvectors) ? $tableentry$18$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$19$.rvectors) ? $tableentry$19$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$20$.rvectors) ? $tableentry$20$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$21$.rvectors) ? $tableentry$21$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$22$.rvectors) ? $tableentry$22$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$23$.rvectors) ? $tableentry$23$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$24$.rvectors) ? $tableentry$24$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$25$.rvectors) ? $tableentry$25$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$26$.rvectors) ? $tableentry$26$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$27$.rvectors) ? $tableentry$27$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$28$.rvectors) ? $tableentry$28$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$29$.rvectors) ? $tableentry$29$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$30$.rvectors) ? $tableentry$30$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$31$.rvectors) ? $tableentry$31$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$32$.rvectors) ? $tableentry$32$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$33$.rvectors) ? $tableentry$33$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$34$.rvectors) ? $tableentry$34$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$35$.rvectors) ? $tableentry$35$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$36$.rvectors) ? $tableentry$36$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$37$.rvectors) ? $tableentry$37$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$38$.rvectors) ? $tableentry$38$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$39$.rvectors) ? $tableentry$39$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$40$.rvectors) ? $tableentry$40$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$41$.rvectors) ? $tableentry$41$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$42$.rvectors) ? $tableentry$42$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$43$.rvectors) ? $tableentry$43$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$44$.rvectors) ? $tableentry$44$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$45$.rvectors) ? $tableentry$45$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$46$.rvectors) ? $tableentry$46$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$47$.rvectors) ? $tableentry$47$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$48$.rvectors) ? $tableentry$48$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$49$.rvectors) ? $tableentry$49$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$50$.rvectors) ? $tableentry$50$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$51$.rvectors) ? $tableentry$51$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$52$.rvectors) ? $tableentry$52$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$53$.rvectors) ? $tableentry$53$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$54$.rvectors) ? $tableentry$54$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$55$.rvectors) ? $tableentry$55$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$56$.rvectors) ? $tableentry$56$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$57$.rvectors) ? $tableentry$57$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$58$.rvectors) ? $tableentry$58$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$59$.rvectors) ? $tableentry$59$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$60$.rvectors) ? $tableentry$60$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$61$.rvectors) ? $tableentry$61$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$62$.rvectors) ? $tableentry$62$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$63$.rvectors) ? $tableentry$63$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$64$.rvectors) ? $tableentry$64$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$65$.rvectors) ? $tableentry$65$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$66$.rvectors) ? $tableentry$66$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$67$.rvectors) ? $tableentry$67$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$68$.rvectors) ? $tableentry$68$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$69$.rvectors) ? $tableentry$69$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$70$.rvectors) ? $tableentry$70$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$71$.rvectors) ? $tableentry$71$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$72$.rvectors) ? $tableentry$72$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$73$.rvectors) ? $tableentry$73$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$74$.rvectors) ? $tableentry$74$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$75$.rvectors) ? $tableentry$75$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$76$.rvectors) ? $tableentry$76$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$77$.rvectors) ? $tableentry$77$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$78$.rvectors) ? $tableentry$78$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$79$.rvectors) ? $tableentry$79$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$80$.rvectors) ? $tableentry$80$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$81$.rvectors) ? $tableentry$81$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$82$.rvectors) ? $tableentry$82$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$83$.rvectors) ? $tableentry$83$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$84$.rvectors) ? $tableentry$84$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$85$.rvectors) ? $tableentry$85$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$86$.rvectors) ? $tableentry$86$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$87$.rvectors) ? $tableentry$87$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$88$.rvectors) ? $tableentry$88$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$89$.rvectors) ? $tableentry$89$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$90$.rvectors) ? $tableentry$90$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$91$.rvectors) ? $tableentry$91$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$92$.rvectors) ? $tableentry$92$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$93$.rvectors) ? $tableentry$93$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$94$.rvectors) ? $tableentry$94$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$95$.rvectors) ? $tableentry$95$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$96$.rvectors) ? $tableentry$96$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$97$.rvectors) ? $tableentry$97$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$98$.rvectors) ? $tableentry$98$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$99$.rvectors) ? $tableentry$99$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); 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- LONG(DEFINED($tableentry$247$.rvectors) ? $tableentry$247$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$248$.rvectors) ? $tableentry$248$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$249$.rvectors) ? $tableentry$249$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$250$.rvectors) ? $tableentry$250$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$251$.rvectors) ? $tableentry$251$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$252$.rvectors) ? $tableentry$252$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$253$.rvectors) ? $tableentry$253$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$254$.rvectors) ? $tableentry$254$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$255$.rvectors) ? $tableentry$255$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/UNUSED_generated_code/.placeholder b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/UNUSED_generated_code/.placeholder deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_cg_hardware_setup.c b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_cg_hardware_setup.c deleted file mode 100644 index e67b26bd9a3..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_cg_hardware_setup.c +++ /dev/null @@ -1,115 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_hardware_setup.c -* Version : 1.3.2 -* Device(s) : R5F564MLCxFB -* Description : Initialization file for code generation configurations. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -#include "r_smc_cgc.h" -#include "r_smc_interrupt.h" -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ - -/* Workaround to set group interrupt priority level when it is not set in the generated function */ -static void R_Interrupt_Create_Workaround(void); -static void R_Interrupt_Create_Workaround(void) -{ - /* Call the generated function */ - R_Interrupt_Create(); - - /* Disable group AL1 interrupt*/ - IEN(ICU,GROUPAL1) = 0U; - - /* Set group AL1 interrupt priority level */ - IPR(ICU,GROUPAL1) = _02_ICU_PRIORITY_LEVEL2; - - /* Enable group AL1 interrupt */ - IEN(ICU,GROUPAL1) = 1U; -} -#define R_Interrupt_Create R_Interrupt_Create_Workaround - -void r_undefined_exception(void); -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: r_undefined_exception -* Description : This function is undefined interrupt service routine -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void r_undefined_exception(void) -{ - /* Start user code for r_undefined_exception. Do not edit comment generated here */ - /* End user code. Do not edit comment generated here */ -} - -/*********************************************************************************************************************** -* Function Name: R_Systeminit -* Description : This function initializes every configuration -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Systeminit(void) -{ - /* Enable writing to registers related to operating modes, LPC, CGC and software reset */ - SYSTEM.PRCR.WORD = 0xA50BU; - - /* Enable writing to MPC pin function control registers */ - MPC.PWPR.BIT.B0WI = 0U; - MPC.PWPR.BIT.PFSWE = 1U; - - /* Initialize clocks settings */ - R_CGC_Create(); - - /* Register undefined interrupt */ - R_BSP_InterruptWrite(BSP_INT_SRC_UNDEFINED_INTERRUPT,(bsp_int_cb_t)r_undefined_exception); - - /* Disable writing to MPC pin function control registers */ - MPC.PWPR.BIT.PFSWE = 0U; - MPC.PWPR.BIT.B0WI = 1U; - - /* Enable protection */ - SYSTEM.PRCR.WORD = 0xA500U; -} - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_cg_interrupt_handlers.h b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_cg_interrupt_handlers.h deleted file mode 100644 index 11fc8fe01e4..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_cg_interrupt_handlers.h +++ /dev/null @@ -1,72 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_interrupt_handlers.h -* Version : 1.3.2 -* Device(s) : R5F564MLCxFB -* Description : This file declares interrupt handlers. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef INTERRUPT_HANDLERS_H -#define INTERRUPT_HANDLERS_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* BSC BUSERR */ -void bus_error_isr(void) __attribute__ ((interrupt)); - -/* ICU GROUPBL0 */ -void group_bl0_handler_isr(void) __attribute__ ((interrupt)); - -/* ICU GROUPBL1 */ -void group_bl1_handler_isr(void) __attribute__ ((interrupt)); - -/* ICU GROUPAL0 */ -void group_al0_handler_isr(void) __attribute__ ((interrupt)); - -/* ICU GROUPAL1 */ -void group_al1_handler_isr(void) __attribute__ ((interrupt)); - -/* Idle Vectors */ -void undefined_interrupt_source_isr(void) __attribute__ ((interrupt)); -/* Start user code for function. Do not edit comment generated here */ - -#include "r_cg_vector_pragma.h" - -/* End user code. Do not edit comment generated here */ -#endif diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_cg_macrodriver.h b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_cg_macrodriver.h deleted file mode 100644 index fbc16bedba5..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_cg_macrodriver.h +++ /dev/null @@ -1,86 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_macrodriver.h -* Version : 1.3.2 -* Device(s) : R5F564MLCxFB -* Description : Macro header file for code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef MACRODRIVER_H -#define MACRODRIVER_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "platform.h" -#include "r_smc_interrupt.h" -#include "r_cg_interrupt_handlers.h" - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -#ifndef __TYPEDEF__ - -/* Status list definition */ -#define MD_STATUSBASE (0x00U) -#define MD_OK (MD_STATUSBASE + 0x00U) /* register setting OK */ -#define MD_SPT (MD_STATUSBASE + 0x01U) /* IIC stop */ -#define MD_NACK (MD_STATUSBASE + 0x02U) /* IIC no ACK */ -#define MD_BUSY1 (MD_STATUSBASE + 0x03U) /* busy 1 */ -#define MD_BUSY2 (MD_STATUSBASE + 0x04U) /* busy 2 */ - -/* Error list definition */ -#define MD_ERRORBASE (0x80U) -#define MD_ERROR (MD_ERRORBASE + 0x00U) /* error */ -#define MD_ARGERROR (MD_ERRORBASE + 0x01U) /* error argument input error */ -#define MD_ERROR1 (MD_ERRORBASE + 0x02U) /* error 1 */ -#define MD_ERROR2 (MD_ERRORBASE + 0x03U) /* error 2 */ -#define MD_ERROR3 (MD_ERRORBASE + 0x04U) /* error 3 */ -#define MD_ERROR4 (MD_ERRORBASE + 0x05U) /* error 4 */ -#define MD_ERROR5 (MD_ERRORBASE + 0x06U) /* error 5 */ - -#define nop() asm("nop;") -#define brk() asm("brk;") -#define wait() asm("wait;") - -#endif - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -#ifndef __TYPEDEF__ - typedef unsigned short MD_STATUS; - #define __TYPEDEF__ -#endif - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Systeminit(void); -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_cg_userdefine.h b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_cg_userdefine.h deleted file mode 100644 index 28af9659592..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_cg_userdefine.h +++ /dev/null @@ -1,61 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_userdefine.h -* Version : 1.3.2 -* Device(s) : R5F564MLCxFB -* Description : User header file for code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef CG_USER_DEF_H -#define CG_USER_DEF_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ -/* Start user code for register. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* Start user code for macro define. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -/* Start user code for type define. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_cg_vector_pragma.h b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_cg_vector_pragma.h deleted file mode 100644 index 124b4b2b661..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_cg_vector_pragma.h +++ /dev/null @@ -1,5 +0,0 @@ -R_PRAGMA_INTERRUPT(bus_error_isr, 16) -R_PRAGMA_INTERRUPT(group_bl0_handler_isr, 110) -R_PRAGMA_INTERRUPT(group_bl1_handler_isr, 111) -R_PRAGMA_INTERRUPT(group_al0_handler_isr, 112) -R_PRAGMA_INTERRUPT(group_al1_handler_isr, 113) diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_cg_vector_table.c b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_cg_vector_table.c deleted file mode 100644 index 57cb6bbacea..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_cg_vector_table.c +++ /dev/null @@ -1,564 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_vector_table.c -* Version : 1.3.2 -* Device(s) : R5F564MLCxFB -* Description : This file implements interrupt vector table. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -void * const Reserved_Vector[] __attribute((section(".rvectors"))) = -{ - /* 0x0000 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0004 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0008 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x000C Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0010 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0014 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0018 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x001C Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0020 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0024 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0028 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x002C Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0030 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0034 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0038 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x003C Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0040 BSC BUSERR */ - bus_error_isr, - /* 0x0044 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0048 RAM RAMERR */ - undefined_interrupt_source_isr, - /* 0x004C Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0050 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0054 FCU FIFERR */ - undefined_interrupt_source_isr, - /* 0x0058 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x005C FCU FRDYI */ - undefined_interrupt_source_isr, - /* 0x0060 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0064 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0068 ICU SWINT2 */ - undefined_interrupt_source_isr, - /* 0x006C ICU SWINT */ - undefined_interrupt_source_isr, - /* 0x0070 CMT0 CMI0 */ - undefined_interrupt_source_isr, - /* 0x0074 CMT1 CMI1 */ - undefined_interrupt_source_isr, - /* 0x0078 CMTW0 CMWI0 */ - undefined_interrupt_source_isr, - /* 0x007C CMTW1 CMWI1 */ - undefined_interrupt_source_isr, - /* 0x0080 USBA D0FIFO2 */ - undefined_interrupt_source_isr, - /* 0x0084 USBA D1FIFO2 */ - undefined_interrupt_source_isr, - /* 0x0088 USB0 D0FIFO0 */ - undefined_interrupt_source_isr, - /* 0x008C USB0 D1FIFO0 */ - undefined_interrupt_source_isr, - /* 0x0090 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0094 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0098 RSPI0 SPRI0 */ - undefined_interrupt_source_isr, - /* 0x009C RSPI0 SPTI0 */ - undefined_interrupt_source_isr, - /* 0x00A0 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x00A4 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x00A8 QSPI SPRI */ - undefined_interrupt_source_isr, - /* 0x00AC QSPI SPTI */ - undefined_interrupt_source_isr, - /* 0x00B0 SDHI SBFAI */ - undefined_interrupt_source_isr, - /* 0x00B4 MMCIF MBFAI */ - undefined_interrupt_source_isr, - /* 0x00B8 SSI0 SSITXI0 */ - undefined_interrupt_source_isr, - /* 0x00BC SSI0 SSIRXI0 */ - undefined_interrupt_source_isr, - /* 0x00C0 SSI1 SSIRTI1 */ - undefined_interrupt_source_isr, - /* 0x00C4 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x00C8 SRC IDEI */ - undefined_interrupt_source_isr, - /* 0x00CC SRC ODFI */ - undefined_interrupt_source_isr, - /* 0x00D0 RIIC0 RXI0 */ - undefined_interrupt_source_isr, - /* 0x00D4 RIIC0 TXI0 */ - undefined_interrupt_source_isr, - /* 0x00D8 RIIC2 RXI2 */ - undefined_interrupt_source_isr, - /* 0x00DC RIIC2 TXI2 */ - undefined_interrupt_source_isr, - /* 0x00E0 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x00E4 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x00E8 SCI0 RXI0 */ - undefined_interrupt_source_isr, - /* 0x00EC SCI0 TXI0 */ - undefined_interrupt_source_isr, - /* 0x00F0 SCI1 RXI1 */ - undefined_interrupt_source_isr, - /* 0x00F4 SCI1 TXI1 */ - undefined_interrupt_source_isr, - /* 0x00F8 SCI2 RXI2 */ - undefined_interrupt_source_isr, - /* 0x00FC SCI2 TXI2 */ - undefined_interrupt_source_isr, - /* 0x0100 ICU IRQ0 */ - undefined_interrupt_source_isr, - /* 0x0104 ICU IRQ1 */ - undefined_interrupt_source_isr, - /* 0x0108 ICU IRQ2 */ - undefined_interrupt_source_isr, - /* 0x010C ICU IRQ3 */ - undefined_interrupt_source_isr, - /* 0x0110 ICU IRQ4 */ - undefined_interrupt_source_isr, - /* 0x0114 ICU IRQ5 */ - undefined_interrupt_source_isr, - /* 0x0118 ICU IRQ6 */ - undefined_interrupt_source_isr, - /* 0x011C ICU IRQ7 */ - undefined_interrupt_source_isr, - /* 0x0120 ICU IRQ8 */ - undefined_interrupt_source_isr, - /* 0x0124 ICU IRQ9 */ - undefined_interrupt_source_isr, - /* 0x0128 ICU IRQ10 */ - undefined_interrupt_source_isr, - /* 0x012C ICU IRQ11 */ - undefined_interrupt_source_isr, - /* 0x0130 ICU IRQ12 */ - undefined_interrupt_source_isr, - /* 0x0134 ICU IRQ13 */ - undefined_interrupt_source_isr, - /* 0x0138 ICU IRQ14 */ - undefined_interrupt_source_isr, - /* 0x013C ICU IRQ15 */ - undefined_interrupt_source_isr, - /* 0x0140 SCI3 RXI3 */ - undefined_interrupt_source_isr, - /* 0x0144 SCI3 TXI3 */ - undefined_interrupt_source_isr, - /* 0x0148 SCI4 RXI4 */ - undefined_interrupt_source_isr, - /* 0x014C SCI4 TXI4 */ - undefined_interrupt_source_isr, - /* 0x0150 SCI5 RXI5 */ - undefined_interrupt_source_isr, - /* 0x0154 SCI5 TXI5 */ - undefined_interrupt_source_isr, - /* 0x0158 SCI6 RXI6 */ - undefined_interrupt_source_isr, - /* 0x015C SCI6 TXI6 */ - undefined_interrupt_source_isr, - /* 0x0160 LVD1 LVD1 */ - undefined_interrupt_source_isr, - /* 0x0164 LVD2 LVD2 */ - undefined_interrupt_source_isr, - /* 0x0168 USB0 USBR0 */ - undefined_interrupt_source_isr, - /* 0x016C Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0170 RTC ALM */ - undefined_interrupt_source_isr, - /* 0x0174 RTC PRD */ - undefined_interrupt_source_isr, - /* 0x0178 USBA USBAR */ - undefined_interrupt_source_isr, - /* 0x017C IWDT IWUNI */ - undefined_interrupt_source_isr, - /* 0x0180 WDT WUNI */ - undefined_interrupt_source_isr, - /* 0x0184 PDC PCDFI */ - undefined_interrupt_source_isr, - /* 0x0188 SCI7 RXI7 */ - undefined_interrupt_source_isr, - /* 0x018C SCI7 TXI7 */ - undefined_interrupt_source_isr, - /* 0x0190 SCIF8 RXIF8 */ - undefined_interrupt_source_isr, - /* 0x0194 SCIF8 TXIF8 */ - undefined_interrupt_source_isr, - /* 0x0198 SCIF9 RXIF9 */ - undefined_interrupt_source_isr, - /* 0x019C SCIF9 TXIF9 */ - undefined_interrupt_source_isr, - /* 0x01A0 SCIF10 RXIF10 */ - undefined_interrupt_source_isr, - /* 0x01A4 SCIF10 TXIF10 */ - undefined_interrupt_source_isr, - /* 0x01A8 ICU GROUPBE0 */ - undefined_interrupt_source_isr, - /* 0x01AC Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x01B0 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x01B4 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x01B8 ICU GROUPBL0 */ - group_bl0_handler_isr, - /* 0x01BC ICU GROUPBL1 */ - group_bl1_handler_isr, - /* 0x01C0 ICU GROUPAL0 */ - group_al0_handler_isr, - /* 0x01C4 ICU GROUPAL1 */ - group_al1_handler_isr, - /* 0x01C8 SCIF11 RXIF11 */ - undefined_interrupt_source_isr, - /* 0x01CC SCIF11 TXIF11 */ - undefined_interrupt_source_isr, - /* 0x01D0 SCI12 RXI12 */ - undefined_interrupt_source_isr, - /* 0x01D4 SCI12 TXI12 */ - undefined_interrupt_source_isr, - /* 0x01D8 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x01DC Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x01E0 DMAC DMAC0I */ - undefined_interrupt_source_isr, - /* 0x01E4 DMAC DMAC1I */ - undefined_interrupt_source_isr, - /* 0x01E8 DMAC DMAC2I */ - undefined_interrupt_source_isr, - /* 0x01EC DMAC DMAC3I */ - undefined_interrupt_source_isr, - /* 0x01F0 DMAC DMAC74I */ - undefined_interrupt_source_isr, - /* 0x01F4 OST OSTDI */ - undefined_interrupt_source_isr, - /* 0x01F8 EXDMAC EXDMAC0I */ - undefined_interrupt_source_isr, - /* 0x01FC EXDMAC EXDMAC1I */ - undefined_interrupt_source_isr, - /* 0x0200 PERIB INTB128 */ - undefined_interrupt_source_isr, - /* 0x0204 PERIB INTB129 */ - undefined_interrupt_source_isr, - /* 0x0208 PERIB INTB130 */ - undefined_interrupt_source_isr, - /* 0x020C PERIB INTB131 */ - undefined_interrupt_source_isr, - /* 0x0210 PERIB INTB132 */ - undefined_interrupt_source_isr, - /* 0x0214 PERIB INTB133 */ - undefined_interrupt_source_isr, - /* 0x0218 PERIB INTB134 */ - undefined_interrupt_source_isr, - /* 0x021C PERIB INTB135 */ - undefined_interrupt_source_isr, - /* 0x0220 PERIB INTB136 */ - undefined_interrupt_source_isr, - /* 0x0224 PERIB INTB137 */ - undefined_interrupt_source_isr, - /* 0x0228 PERIB INTB138 */ - undefined_interrupt_source_isr, - /* 0x022C PERIB INTB139 */ - undefined_interrupt_source_isr, - /* 0x0230 PERIB INTB140 */ - undefined_interrupt_source_isr, - /* 0x0234 PERIB INTB141 */ - undefined_interrupt_source_isr, - /* 0x0238 PERIB INTB142 */ - undefined_interrupt_source_isr, - /* 0x023C PERIB INTB143 */ - undefined_interrupt_source_isr, - /* 0x0240 PERIB INTB144 */ - undefined_interrupt_source_isr, - /* 0x0244 PERIB INTB145 */ - undefined_interrupt_source_isr, - /* 0x0248 PERIB INTB146 */ - undefined_interrupt_source_isr, - /* 0x024C PERIB INTB147 */ - undefined_interrupt_source_isr, - /* 0x0250 PERIB INTB148 */ - undefined_interrupt_source_isr, - /* 0x0254 PERIB INTB149 */ - undefined_interrupt_source_isr, - /* 0x0258 PERIB INTB150 */ - undefined_interrupt_source_isr, - /* 0x025C PERIB INTB151 */ - undefined_interrupt_source_isr, - /* 0x0260 PERIB INTB152 */ - undefined_interrupt_source_isr, - /* 0x0264 PERIB INTB153 */ - undefined_interrupt_source_isr, - /* 0x0268 PERIB INTB154 */ - undefined_interrupt_source_isr, - /* 0x026C PERIB INTB155 */ - undefined_interrupt_source_isr, - /* 0x0270 PERIB INTB156 */ - undefined_interrupt_source_isr, - /* 0x0274 PERIB INTB157 */ - undefined_interrupt_source_isr, - /* 0x0278 PERIB INTB158 */ - undefined_interrupt_source_isr, - /* 0x027C PERIB INTB159 */ - undefined_interrupt_source_isr, - /* 0x0280 PERIB INTB160 */ - undefined_interrupt_source_isr, - /* 0x0284 PERIB INTB161 */ - undefined_interrupt_source_isr, - /* 0x0288 PERIB INTB162 */ - undefined_interrupt_source_isr, - /* 0x028C PERIB INTB163 */ - undefined_interrupt_source_isr, - /* 0x0290 PERIB INTB164 */ - undefined_interrupt_source_isr, - /* 0x0294 PERIB INTB165 */ - undefined_interrupt_source_isr, - /* 0x0298 PERIB INTB166 */ - undefined_interrupt_source_isr, - /* 0x029C PERIB INTB167 */ - undefined_interrupt_source_isr, - /* 0x02A0 PERIB INTB168 */ - undefined_interrupt_source_isr, - /* 0x02A4 PERIB INTB169 */ - undefined_interrupt_source_isr, - /* 0x02A8 PERIB INTB170 */ - undefined_interrupt_source_isr, - /* 0x02AC PERIB INTB171 */ - undefined_interrupt_source_isr, - /* 0x02B0 PERIB INTB172 */ - undefined_interrupt_source_isr, - /* 0x02B4 PERIB INTB173 */ - undefined_interrupt_source_isr, - /* 0x02B8 PERIB INTB174 */ - undefined_interrupt_source_isr, - /* 0x02BC PERIB INTB175 */ - undefined_interrupt_source_isr, - /* 0x02C0 PERIB INTB176 */ - undefined_interrupt_source_isr, - /* 0x02C4 PERIB INTB177 */ - undefined_interrupt_source_isr, - /* 0x02C8 PERIB INTB178 */ - undefined_interrupt_source_isr, - /* 0x02CC PERIB INTB179 */ - undefined_interrupt_source_isr, - /* 0x02D0 PERIB INTB180 */ - undefined_interrupt_source_isr, - /* 0x02D4 PERIB INTB181 */ - undefined_interrupt_source_isr, - /* 0x02D8 PERIB INTB182 */ - undefined_interrupt_source_isr, - /* 0x02DC PERIB INTB183 */ - undefined_interrupt_source_isr, - /* 0x02E0 PERIB INTB184 */ - undefined_interrupt_source_isr, - /* 0x02E4 PERIB INTB185 */ - undefined_interrupt_source_isr, - /* 0x02E8 PERIB INTB186 */ - undefined_interrupt_source_isr, - /* 0x02EC PERIB INTB187 */ - undefined_interrupt_source_isr, - /* 0x02F0 PERIB INTB188 */ - undefined_interrupt_source_isr, - /* 0x02F4 PERIB INTB189 */ - undefined_interrupt_source_isr, - /* 0x02F8 PERIB INTB190 */ - undefined_interrupt_source_isr, - /* 0x02FC PERIB INTB191 */ - undefined_interrupt_source_isr, - /* 0x0300 PERIB INTB192 */ - undefined_interrupt_source_isr, - /* 0x0304 PERIB INTB193 */ - undefined_interrupt_source_isr, - /* 0x0308 PERIB INTB194 */ - undefined_interrupt_source_isr, - /* 0x030C PERIB INTB195 */ - undefined_interrupt_source_isr, - /* 0x0310 PERIB INTB196 */ - undefined_interrupt_source_isr, - /* 0x0314 PERIB INTB197 */ - undefined_interrupt_source_isr, - /* 0x0318 PERIB INTB198 */ - undefined_interrupt_source_isr, - /* 0x031C PERIB INTB199 */ - undefined_interrupt_source_isr, - /* 0x0320 PERIB INTB200 */ - undefined_interrupt_source_isr, - /* 0x0324 PERIB INTB201 */ - undefined_interrupt_source_isr, - /* 0x0328 PERIB INTB202 */ - undefined_interrupt_source_isr, - /* 0x032C PERIB INTB203 */ - undefined_interrupt_source_isr, - /* 0x0330 PERIB INTB204 */ - undefined_interrupt_source_isr, - /* 0x0334 PERIB INTB205 */ - undefined_interrupt_source_isr, - /* 0x0338 PERIB INTB206 */ - undefined_interrupt_source_isr, - /* 0x033C PERIB INTB207 */ - undefined_interrupt_source_isr, - /* 0x0340 PERIA INTA208 */ - undefined_interrupt_source_isr, - /* 0x0344 PERIA INTA209 */ - undefined_interrupt_source_isr, - /* 0x0348 PERIA INTA210 */ - undefined_interrupt_source_isr, - /* 0x034C PERIA INTA211 */ - undefined_interrupt_source_isr, - /* 0x0350 PERIA INTA212 */ - undefined_interrupt_source_isr, - /* 0x0354 PERIA INTA213 */ - undefined_interrupt_source_isr, - /* 0x0358 PERIA INTA214 */ - undefined_interrupt_source_isr, - /* 0x035C PERIA INTA215 */ - undefined_interrupt_source_isr, - /* 0x0360 PERIA INTA216 */ - undefined_interrupt_source_isr, - /* 0x0364 PERIA INTA217 */ - undefined_interrupt_source_isr, - /* 0x0368 PERIA INTA218 */ - undefined_interrupt_source_isr, - /* 0x036C PERIA INTA219 */ - undefined_interrupt_source_isr, - /* 0x0370 PERIA INTA220 */ - undefined_interrupt_source_isr, - /* 0x0374 PERIA INTA221 */ - undefined_interrupt_source_isr, - /* 0x0378 PERIA INTA222 */ - undefined_interrupt_source_isr, - /* 0x037C PERIA INTA223 */ - undefined_interrupt_source_isr, - /* 0x0380 PERIA INTA224 */ - undefined_interrupt_source_isr, - /* 0x0384 PERIA INTA225 */ - undefined_interrupt_source_isr, - /* 0x0388 PERIA INTA226 */ - undefined_interrupt_source_isr, - /* 0x038C PERIA INTA227 */ - undefined_interrupt_source_isr, - /* 0x0390 PERIA INTA228 */ - undefined_interrupt_source_isr, - /* 0x0394 PERIA INTA229 */ - undefined_interrupt_source_isr, - /* 0x0398 PERIA INTA230 */ - undefined_interrupt_source_isr, - /* 0x039C PERIA INTA231 */ - undefined_interrupt_source_isr, - /* 0x03A0 PERIA INTA232 */ - undefined_interrupt_source_isr, - /* 0x03A4 PERIA INTA233 */ - undefined_interrupt_source_isr, - /* 0x03A8 PERIA INTA234 */ - undefined_interrupt_source_isr, - /* 0x03AC PERIA INTA235 */ - undefined_interrupt_source_isr, - /* 0x03B0 PERIA INTA236 */ - undefined_interrupt_source_isr, - /* 0x03B4 PERIA INTA237 */ - undefined_interrupt_source_isr, - /* 0x03B8 PERIA INTA238 */ - undefined_interrupt_source_isr, - /* 0x03BC PERIA INTA239 */ - undefined_interrupt_source_isr, - /* 0x03C0 PERIA INTA240 */ - undefined_interrupt_source_isr, - /* 0x03C4 PERIA INTA241 */ - undefined_interrupt_source_isr, - /* 0x03C8 PERIA INTA242 */ - undefined_interrupt_source_isr, - /* 0x03CC PERIA INTA243 */ - undefined_interrupt_source_isr, - /* 0x03D0 PERIA INTA244 */ - undefined_interrupt_source_isr, - /* 0x03D4 PERIA INTA245 */ - undefined_interrupt_source_isr, - /* 0x03D8 PERIA INTA246 */ - undefined_interrupt_source_isr, - /* 0x03DC PERIA INTA247 */ - undefined_interrupt_source_isr, - /* 0x03E0 PERIA INTA248 */ - undefined_interrupt_source_isr, - /* 0x03E4 PERIA INTA249 */ - undefined_interrupt_source_isr, - /* 0x03E8 PERIA INTA250 */ - undefined_interrupt_source_isr, - /* 0x03EC PERIA INTA251 */ - undefined_interrupt_source_isr, - /* 0x03F0 PERIA INTA252 */ - undefined_interrupt_source_isr, - /* 0x03F4 PERIA INTA253 */ - undefined_interrupt_source_isr, - /* 0x03F8 PERIA INTA254 */ - undefined_interrupt_source_isr, - /* 0x03FC PERIA INTA255 */ - undefined_interrupt_source_isr -}; -/* Start user code for global. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_smc_cgc.c b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_smc_cgc.c deleted file mode 100644 index 6d24f62b9ba..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_smc_cgc.c +++ /dev/null @@ -1,44 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc.c -* Version : 1.2.0 -* Device(s) : R5F564MLCxFB -* Description : This file implements cgc setting -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -#include "r_smc_cgc.h" -#include "platform.h" - -/*********************************************************************************************************************** -* Function Name: R_CGC_Create -* Description : This function Used to initializes the clock generator -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_CGC_Create(void) -{ - R_CGC_Create_UserInit(); -} diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_smc_cgc.h b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_smc_cgc.h deleted file mode 100644 index bf8e5be0332..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_smc_cgc.h +++ /dev/null @@ -1,217 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc.h -* Version : 1.2.0 -* Device(s) : R5F564MLCxFB -* Description : This file implements cgc setting. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_CGC_H -#define SMC_CGC_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ -/* - System Clock Control Register (SCKCR) -*/ -/* Peripheral Module Clock D (PCLKD) */ -#define _00000000_CGC_PCLKD_DIV_1 (0x00000000UL) /* x1 */ -#define _00000001_CGC_PCLKD_DIV_2 (0x00000001UL) /* x1/2 */ -#define _00000002_CGC_PCLKD_DIV_4 (0x00000002UL) /* x1/4 */ -#define _00000003_CGC_PCLKD_DIV_8 (0x00000003UL) /* x1/8 */ -#define _00000004_CGC_PCLKD_DIV_16 (0x00000004UL) /* x1/16 */ -#define _00000005_CGC_PCLKD_DIV_32 (0x00000005UL) /* x1/32 */ -#define _00000006_CGC_PCLKD_DIV_64 (0x00000006UL) /* x1/64 */ -/* Peripheral Module Clock C (PCLKC) */ -#define _00000000_CGC_PCLKC_DIV_1 (0x00000000UL) /* x1 */ -#define _00000010_CGC_PCLKC_DIV_2 (0x00000010UL) /* x1/2 */ -#define _00000020_CGC_PCLKC_DIV_4 (0x00000020UL) /* x1/4 */ -#define _00000030_CGC_PCLKC_DIV_8 (0x00000030UL) /* x1/8 */ -#define _00000040_CGC_PCLKC_DIV_16 (0x00000040UL) /* x1/16 */ -#define _00000050_CGC_PCLKC_DIV_32 (0x00000050UL) /* x1/32 */ -#define _00000060_CGC_PCLKC_DIV_64 (0x00000060UL) /* x1/64 */ -/* Peripheral Module Clock B (PCLKB) */ -#define _00000000_CGC_PCLKB_DIV_1 (0x00000000UL) /* x1 */ -#define _00000100_CGC_PCLKB_DIV_2 (0x00000100UL) /* x1/2 */ -#define _00000200_CGC_PCLKB_DIV_4 (0x00000200UL) /* x1/4 */ -#define _00000300_CGC_PCLKB_DIV_8 (0x00000300UL) /* x1/8 */ -#define _00000400_CGC_PCLKB_DIV_16 (0x00000400UL) /* x1/16 */ -#define _00000500_CGC_PCLKB_DIV_32 (0x00000500UL) /* x1/32 */ -#define _00000600_CGC_PCLKB_DIV_64 (0x00000600UL) /* x1/64 */ -/* Peripheral Module Clock A (PCLKA) */ -#define _00000000_CGC_PCLKA_DIV_1 (0x00000000UL) /* x1 */ -#define _00001000_CGC_PCLKA_DIV_2 (0x00001000UL) /* x1/2 */ -#define _00002000_CGC_PCLKA_DIV_4 (0x00002000UL) /* x1/4 */ -#define _00003000_CGC_PCLKA_DIV_8 (0x00003000UL) /* x1/8 */ -#define _00004000_CGC_PCLKA_DIV_16 (0x00004000UL) /* x1/16 */ -#define _00005000_CGC_PCLKA_DIV_32 (0x00005000UL) /* x1/32 */ -#define _00006000_CGC_PCLKA_DIV_64 (0x00006000UL) /* x1/64 */ -/* External Bus Clock (BCLK) */ -#define _00000000_CGC_BCLK_DIV_1 (0x00000000UL) /* x1 */ -#define _00010000_CGC_BCLK_DIV_2 (0x00010000UL) /* x1/2 */ -#define _00020000_CGC_BCLK_DIV_4 (0x00020000UL) /* x1/4 */ -#define _00030000_CGC_BCLK_DIV_8 (0x00030000UL) /* x1/8 */ -#define _00040000_CGC_BCLK_DIV_16 (0x00040000UL) /* x1/16 */ -#define _00050000_CGC_BCLK_DIV_32 (0x00050000UL) /* x1/32 */ -#define _00060000_CGC_BCLK_DIV_64 (0x00060000UL) /* x1/64 */ -/* System Clock (ICLK) */ -#define _00000000_CGC_ICLK_DIV_1 (0x00000000UL) /* x1 */ -#define _01000000_CGC_ICLK_DIV_2 (0x01000000UL) /* x1/2 */ -#define _02000000_CGC_ICLK_DIV_4 (0x02000000UL) /* x1/4 */ -#define _03000000_CGC_ICLK_DIV_8 (0x03000000UL) /* x1/8 */ -#define _04000000_CGC_ICLK_DIV_16 (0x04000000UL) /* x1/16 */ -#define _05000000_CGC_ICLK_DIV_32 (0x05000000UL) /* x1/32 */ -#define _06000000_CGC_ICLK_DIV_64 (0x06000000UL) /* x1/64 */ -/* System Clock (FCLK) */ -#define _00000000_CGC_FCLK_DIV_1 (0x00000000UL) /* x1 */ -#define _10000000_CGC_FCLK_DIV_2 (0x10000000UL) /* x1/2 */ -#define _20000000_CGC_FCLK_DIV_4 (0x20000000UL) /* x1/4 */ -#define _30000000_CGC_FCLK_DIV_8 (0x30000000UL) /* x1/8 */ -#define _40000000_CGC_FCLK_DIV_16 (0x40000000UL) /* x1/16 */ -#define _50000000_CGC_FCLK_DIV_32 (0x50000000UL) /* x1/32 */ -#define _60000000_CGC_FCLK_DIV_64 (0x60000000UL) /* x1/64 */ - -/* - System Clock Control Register 2 (SCKCR2) -*/ -#define _0010_CGC_UCLK_DIV_1 (0x0010U) /* x1/2 */ -#define _0020_CGC_UCLK_DIV_3 (0x0020U) /* x1/3 */ -#define _0030_CGC_UCLK_DIV_4 (0x0030U) /* x1/4 */ -#define _0040_CGC_UCLK_DIV_5 (0x0040U) /* x1/5 */ -#define _0001_SCKCR2_BIT0 (0x0001U) /* RESERVE BIT0 */ - -/* - System Clock Control Register 3 (SCKCR3) -*/ -#define _0000_CGC_CLOCKSOURCE_LOCO (0x0000U) /* LOCO */ -#define _0100_CGC_CLOCKSOURCE_HOCO (0x0100U) /* HOCO */ -#define _0200_CGC_CLOCKSOURCE_MAINCLK (0x0200U) /* Main clock oscillator */ -#define _0300_CGC_CLOCKSOURCE_SUBCLK (0x0300U) /* Sub-clock oscillator */ -#define _0400_CGC_CLOCKSOURCE_PLL (0x0400U) /* PLL circuit */ - -/* - PLL Control Register (PLLCR) -*/ -/* PLL Input Frequency Division Ratio Select (PLIDIV[1:0]) */ -#define _0000_CGC_PLL_FREQ_DIV_1 (0x0000U) /* x1 */ -#define _0001_CGC_PLL_FREQ_DIV_2 (0x0001U) /* x1/2 */ -#define _0002_CGC_PLL_FREQ_DIV_3 (0x0002U) /* x1/3 */ -/* PLL Clock Source Select (PLLSRCSEL) */ -#define _0000_CGC_PLL_SOURCE_MAIN (0x0000U) /* Main clock oscillator */ -#define _0010_CGC_PLL_SOURCE_HOCO (0x0010U) /* HOCO */ -/* Frequency Multiplication Factor Select (STC[5:0]) */ -#define _1300_CGC_PLL_FREQ_MUL_10_0 (0x1300U) /* x10.0 */ -#define _1400_CGC_PLL_FREQ_MUL_10_5 (0x1400U) /* x10.5 */ -#define _1500_CGC_PLL_FREQ_MUL_11_0 (0x1500U) /* x11.0 */ -#define _1600_CGC_PLL_FREQ_MUL_11_5 (0x1600U) /* x11.5 */ -#define _1700_CGC_PLL_FREQ_MUL_12_0 (0x1700U) /* x12.0 */ -#define _1800_CGC_PLL_FREQ_MUL_12_5 (0x1800U) /* x12.5 */ -#define _1900_CGC_PLL_FREQ_MUL_13_0 (0x1900U) /* x13.0 */ -#define _1A00_CGC_PLL_FREQ_MUL_13_5 (0x1A00U) /* x13.5 */ -#define _1B00_CGC_PLL_FREQ_MUL_14_0 (0x1B00U) /* x14.0 */ -#define _1C00_CGC_PLL_FREQ_MUL_14_5 (0x1C00U) /* x14.5 */ -#define _1D00_CGC_PLL_FREQ_MUL_15_0 (0x1D00U) /* x15.0 */ -#define _1E00_CGC_PLL_FREQ_MUL_15_5 (0x1E00U) /* x15.5 */ -#define _1F00_CGC_PLL_FREQ_MUL_16_0 (0x1F00U) /* x16.0 */ -#define _2000_CGC_PLL_FREQ_MUL_16_5 (0x2000U) /* x16.5 */ -#define _2100_CGC_PLL_FREQ_MUL_17_0 (0x2100U) /* x17.0 */ -#define _2200_CGC_PLL_FREQ_MUL_17_5 (0x2200U) /* x17.5 */ -#define _2300_CGC_PLL_FREQ_MUL_18_0 (0x2300U) /* x18.0 */ -#define _2400_CGC_PLL_FREQ_MUL_18_5 (0x2400U) /* x18.5 */ -#define _2500_CGC_PLL_FREQ_MUL_19_0 (0x2500U) /* x19.0 */ -#define _2600_CGC_PLL_FREQ_MUL_19_5 (0x2600U) /* x19.5 */ -#define _2700_CGC_PLL_FREQ_MUL_20_0 (0x2700U) /* x20.0 */ -#define _2800_CGC_PLL_FREQ_MUL_20_5 (0x2800U) /* x20.5 */ -#define _2900_CGC_PLL_FREQ_MUL_21_0 (0x2900U) /* x21.0 */ -#define _2A00_CGC_PLL_FREQ_MUL_21_5 (0x2A00U) /* x21.5 */ -#define _2B00_CGC_PLL_FREQ_MUL_22_0 (0x2B00U) /* x22.0 */ -#define _2C00_CGC_PLL_FREQ_MUL_22_5 (0x2C00U) /* x22.5 */ -#define _2D00_CGC_PLL_FREQ_MUL_23_0 (0x2D00U) /* x23.0 */ -#define _2E00_CGC_PLL_FREQ_MUL_23_5 (0x2E00U) /* x23.5 */ -#define _2F00_CGC_PLL_FREQ_MUL_24_0 (0x2F00U) /* x24.0 */ -#define _3000_CGC_PLL_FREQ_MUL_24_5 (0x3000U) /* x24.5 */ -#define _3100_CGC_PLL_FREQ_MUL_25_0 (0x3100U) /* x25.0 */ -#define _3200_CGC_PLL_FREQ_MUL_25_5 (0x3200U) /* x25.5 */ -#define _3300_CGC_PLL_FREQ_MUL_26_0 (0x3300U) /* x26.0 */ -#define _3400_CGC_PLL_FREQ_MUL_26_5 (0x3400U) /* x26.5 */ -#define _3500_CGC_PLL_FREQ_MUL_27_0 (0x3500U) /* x27.0 */ -#define _3600_CGC_PLL_FREQ_MUL_27_5 (0x3600U) /* x27.5 */ -#define _3700_CGC_PLL_FREQ_MUL_28_0 (0x3700U) /* x28.0 */ -#define _3800_CGC_PLL_FREQ_MUL_28_5 (0x3800U) /* x28.5 */ -#define _3900_CGC_PLL_FREQ_MUL_29_0 (0x3900U) /* x29.0 */ -#define _3A00_CGC_PLL_FREQ_MUL_29_5 (0x3A00U) /* x29.5 */ -#define _3B00_CGC_PLL_FREQ_MUL_30_0 (0x3B00U) /* x30.0 */ - -/* - Oscillation Stop Detection Control Register (OSTDCR) -*/ -/* Oscillation Stop Detection Interrupt Enable (OSTDIE) */ -#define _00_CGC_OSC_STOP_INT_DISABLE (0x00U) /* The oscillation stop detection interrupt is disabled */ -#define _01_CGC_OSC_STOP_INT_ENABLE (0x01U) /* The oscillation stop detection interrupt is enabled */ -/* Oscillation Stop Detection Function Enable (OSTDE) */ -#define _00_CGC_OSC_STOP_DISABLE (0x00U) /* Oscillation stop detection function is disabled */ -#define _80_CGC_OSC_STOP_ENABLE (0x80U) /* Oscillation stop detection function is enabled */ - -/* - High-Speed On-Chip Oscillator Control Register 2 (HOCOCR2) -*/ -/* HOCO Frequency Setting (HCFRQ[1:0]) */ -#define _00_CGC_HOCO_CLK_16 (0x00U) /* 16 MHz */ -#define _01_CGC_HOCO_CLK_18 (0x01U) /* 18 MHz */ -#define _02_CGC_HOCO_CLK_20 (0x02U) /* 20 MHz */ - -/* - Main Clock Oscillator Forced Oscillation Control Register (MOFCR) -*/ -/* Main Oscillator Drive Capability 2 Switching (MODRV2[1:0]) */ -#define _00_CGC_MAINOSC_UNDER24M (0x00U) /* 20.1 to 24 MHz */ -#define _10_CGC_MAINOSC_UNDER20M (0x10U) /* 16.1 to 20 MHz */ -#define _20_CGC_MAINOSC_UNDER16M (0x20U) /* 8.1 to 16 MHz */ -#define _30_CGC_MAINOSC_EQUATE8M (0x30U) /* 8 MHz */ -/* Main Clock Oscillator Switch (MOSEL) */ -#define _00_CGC_MAINOSC_RESONATOR (0x00U) /* Resonator */ -#define _40_CGC_MAINOSC_EXTERNAL (0x40U) /* External oscillator input */ - -/* - RTC Control Register 4 (RCR4) -*/ -/* Count source select */ -#define _00_RTC_SOURCE_SELECT_SUB (0x00U) /* Select sub-clock oscillator */ -#define _01_RTC_SOURCE_SELECT_MAIN_FORCED (0x01U) /* Select main clock oscillator */ -#define _53_CGC_MOSCWTCR_VALUE (0x53U) /* Main Clock Oscillator Wait Time */ -#define _21_CGC_SOSCWTCR_VALUE (0x21U) /* Sub-Clock Oscillator Wait Time */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_CGC_Create(void); -void R_CGC_Create_UserInit(); -#endif diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_smc_cgc_user.c b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_smc_cgc_user.c deleted file mode 100644 index 3cd44cfaab8..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_smc_cgc_user.c +++ /dev/null @@ -1,64 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc_user.c -* Version : 1.2.0 -* Device(s) : R5F564MLCxFB -* Description : None -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -/* Start user code for include. Do not edit comment generated here */ -#include "r_smc_cgc.h" -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: R_CGC_Create_UserInit -* Description : This function adds user code after initializing CGC -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_CGC_Create_UserInit(void) -{ - /* Start user code for code init. Do not edit comment generated here */ - /* End user code. Do not edit comment generated here */ -} - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_smc_entry.h b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_smc_entry.h deleted file mode 100644 index 505a4856744..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_smc_entry.h +++ /dev/null @@ -1,54 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_entry.h -* Version : 1.3.2 -* Device(s) : R5F564MLCxFB -* Description : SMC platform header file. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_ENTRY_H -#define SMC_ENTRY_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_smc_interrupt.c b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_smc_interrupt.c deleted file mode 100644 index 64c010d2169..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_smc_interrupt.c +++ /dev/null @@ -1,44 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_interrupt.c -* Version : 1.1.0 -* Device(s) : R5F564MLCxFB -* Description : This file implements interrupt setting -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_smc_interrupt.h" -#include "platform.h" - -/*********************************************************************************************************************** -* Function Name: R_Interrupt_Create -* Description : This function Used to set the fast interrupt or group interrupt -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Interrupt_Create(void) -{ - /* No fast interrupt and group settings have been configured in the Interrupts tab. */ -} - diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_smc_interrupt.h b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_smc_interrupt.h deleted file mode 100644 index e31a98bf4ed..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/general/r_smc_interrupt.h +++ /dev/null @@ -1,291 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_interrupt.h -* Version : 1.1.0 -* Device(s) : R5F564MLCxFB -* Description : This file implements interrupt setting. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_INTERRUPT_H -#define SMC_INTERRUPT_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/* Priority level of interrupt source. - * These macro definitions are used to set the IPR register directly - */ -#define _00_ICU_PRIORITY_LEVEL0 (0x00U) /* Level 0 (disabled) */ -#define _01_ICU_PRIORITY_LEVEL1 (0x01U) /* Level 1 */ -#define _02_ICU_PRIORITY_LEVEL2 (0x02U) /* Level 2 */ -#define _03_ICU_PRIORITY_LEVEL3 (0x03U) /* Level 3 */ -#define _04_ICU_PRIORITY_LEVEL4 (0x04U) /* Level 4 */ -#define _05_ICU_PRIORITY_LEVEL5 (0x05U) /* Level 5 */ -#define _06_ICU_PRIORITY_LEVEL6 (0x06U) /* Level 6 */ -#define _07_ICU_PRIORITY_LEVEL7 (0x07U) /* Level 7 */ -#define _08_ICU_PRIORITY_LEVEL8 (0x08U) /* Level 8 */ -#define _09_ICU_PRIORITY_LEVEL9 (0x09U) /* Level 9 */ -#define _0A_ICU_PRIORITY_LEVEL10 (0x0AU) /* Level 10 */ -#define _0B_ICU_PRIORITY_LEVEL11 (0x0BU) /* Level 11 */ -#define _0C_ICU_PRIORITY_LEVEL12 (0x0CU) /* Level 12 */ -#define _0D_ICU_PRIORITY_LEVEL13 (0x0DU) /* Level 13 */ -#define _0E_ICU_PRIORITY_LEVEL14 (0x0EU) /* Level 14 */ -#define _0F_ICU_PRIORITY_LEVEL15 (0x0FU) /* Level 15 */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* The macro definitions below list the full set of priority levels as selected in the Interrupts tab - * Please do not modify this file manually - */ -#define ICU_BSC_BUSERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RAM_RAMERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_FCU_FIFERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_FCU_FRDYI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_SWINT2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_SWINT_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT0_CMI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT1_CMI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_CMWI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_CMWI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USBA_D0FIFO2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USBA_D1FIFO2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_D0FIFO0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_D1FIFO0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI0_SPRI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI0_SPTI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_QSPI_SPRI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_QSPI_SPTI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SDHI_SBFAI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MMCIF_MBFAI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SSI0_SSITXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SSI0_SSIRXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SSI1_SSIRTI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SRC_IDEI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SRC_ODFI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC0_RXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC0_TXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC2_RXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC2_TXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI0_RXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI0_TXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI1_RXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI1_TXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI2_RXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI2_TXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ13_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ14_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ15_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI3_RXI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI3_TXI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI4_RXI4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI4_TXI4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI5_RXI5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI5_TXI5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI6_RXI6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI6_TXI6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_LVD1_LVD1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_LVD2_LVD2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_USBR0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_ALM_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_PRD_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USBA_USBAR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_IWDT_IWUNI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_WDT_WUNI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PDC_PCDFI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI7_RXI7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI7_TXI7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCIF8_RXIF8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCIF8_TXIF8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCIF9_RXIF9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCIF9_TXIF9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCIF10_RXIF10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCIF10_TXIF10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBE0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPAL0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPAL1_PRIORITY _02_ICU_PRIORITY_LEVEL2 -#define ICU_SCIF11_RXIF11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCIF11_TXIF11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI12_RXI12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI12_TXI12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC0I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC1I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC2I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC3I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC74I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_OST_OSTDI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EXDMAC_EXDMAC0I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EXDMAC_EXDMAC1I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT2_CMI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT3_CMI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0C_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0D_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TCI0V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TGI1B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TCI1V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TCI1U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TGI2A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TGI2B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TCI2V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TCI2U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TGI1A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3C_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_CMIA0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_CMIB0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_OVI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_CMIA1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_CMIB1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_OVI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_CMIA2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_CMIB2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_OVI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_CMIA3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_CMIB3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_OVI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3D_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TCI3V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TGI4A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TGI4B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TCI4V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TCI4U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TGI5A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TGI5B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TCI5V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TCI5U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_IC0I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_IC1I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_OC0I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_OC1I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_IC0I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_IC1I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_OC0I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_OC1I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_CUP_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_RXF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_TXF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_RXM0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_TXM0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_RXF1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_TXF1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_RXM1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_TXM1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN2_RXF2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN2_TXF2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN2_RXM2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN2_TXM2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_USBI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12ADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12GBADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12ADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12GBADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DES_DESEND_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SHA_SHADEND_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SHA_SHAEND_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RNG_RNGEND_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ELC_ELSR18I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ELC_ELSR19I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB200_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB201_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB202_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB203_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB204_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB205_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB206_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB207_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TGIA1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIA0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIB0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIC0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGID0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TCIV0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIE0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TGIB1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TCIV1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TCIU1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TGIA2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TGIB2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TCIV2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TCIU2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIA3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIB3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIC3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGID3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TCIV3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIA4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIB4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIC4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGID4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TCIV4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIU5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIV5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIW5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIA6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIB6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIC6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGID6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TCIV6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIA7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIB7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIC7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGID7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TCIV7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIA8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIB8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIC8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGID8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TCIV8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EPTPC_IPLS_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_AES_AESRDY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_AES_AESEND_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA254_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA255_PRIORITY _0F_ICU_PRIORITY_LEVEL15 - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Interrupt_Create(void); -#endif diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/r_config/r_bsp_config.h b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/r_config/r_bsp_config.h deleted file mode 100644 index 94e8e337646..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/r_config/r_bsp_config.h +++ /dev/null @@ -1,567 +0,0 @@ -/* Generated configuration header file - do not edit */ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_config_reference.h -* Device(s) : RX64x -* Description : The file r_bsp_config.h is used to configure your BSP. r_bsp_config.h should be included -* somewhere in your package so that the r_bsp code has access to it. This file (r_bsp_config_reference.h) -* is just a reference file that the user can use to make their own r_bsp_config.h file. -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 07.08.2013 1.00 First Release -* : 31.03.2014 1.10 Added the ability for the user to define two 'warm start' callback functions which when -* defined result in a callback from PowerON_Reset_PC() before and/or after initialization -* of the C runtime environment. Added r_bsp_config file version number, which must match -* the BSP version number or a compiler warning will result. Added ability to specify user -* defined functions for redirection of the stdio charget() and/or charput() functions. -* : 30.05.2014 1.11 Added settings for the OFS registers. -* : 13.04.2016 1.12 Added the following macro definition. -* - BSP_CFG_MAIN_CLOCK_SOURCE -* - BSP_CFG_MOSC_WAIT_TIME -* - BSP_CFG_SOSC_WAIT_TIME -* : 15.05.2017 1.20 Changed the comment of the following macro definition, because there was a mistake -* in package type. -* - BSP_CFG_MCU_PART_PACKAGE - Changed package type from LQFP to LFQFP. -* Added Character(s) of the following macro definition. -* - BSP_CFG_MCU_PART_PACKAGE - LJ = 0xA = TFLGA/100/0.65. -* - BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED - C = false = Encryption module not included, -* SDHI module not included. -* - G = true = Encryption module included, -* SDHI module not included. -* Removed Character(s) of the following macro definition. -* - BSP_CFG_MCU_PART_PACKAGE - LA = 0x6 = TFLGA/100/0.50. -* - BSP_CFG_MCU_PART_PACKAGE - JA = 0x7 = TFLGA/100/0.65. -* Added the following macro definition. -* - BSP_CFG_RTC_ENABLE -* - BSP_CFG_SOSC_DRV_CAP -* : 01.11.2017 2.00 Added the following macro definition. -* - BSP_CFG_STARTUP_DISABLE -* : 01.07.2018 2.01 Added the following macro definition. -* - BSP_CFG_CONFIGURATOR_SELECT -* Add RTOS support. FreeRTOS. Define a timer for RTOS. -* : xx.xx.xxxx x.xx Added the following macro definition for ID code protection. -* - BSP_CFG_ID_CODE_LONG_1 -* - BSP_CFG_ID_CODE_LONG_2 -* - BSP_CFG_ID_CODE_LONG_3 -* - BSP_CFG_ID_CODE_LONG_4 -* Added the following macro definition. -* - BSP_CFG_FIT_IPL_MAX -* Added support for GNUC and ICCRX. -***********************************************************************************************************************/ -#ifndef R_BSP_CONFIG_REF_HEADER_FILE -#define R_BSP_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* NOTE: - The default settings are the same as when using RSKRX64M. - Change to the settings for the user board. -*/ - -/* Start up select - 0 = Enable BSP startup program. - 1 = Disable BSP startup program. (e.g. Using user startup program.) -*/ -#define BSP_CFG_STARTUP_DISABLE (0) - -/* Enter the product part number for your MCU. This information will be used to obtain information about your MCU such - as package and memory size. - To help parse this information, the part number will be defined using multiple macros. - R 5 F 56 4M L B D FP - | | | | | | | | | Macro Name Description - | | | | | | | | |__BSP_CFG_MCU_PART_PACKAGE = Package type, number of pins, and pin pitch - | | | | | | | |____not used = Products with wide temperature range - | | | | | | |______BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED = Encryption module included/not included - | | | | | |________BSP_CFG_MCU_PART_MEMORY_SIZE = ROM, RAM, and Data Flash Capacity - | | | | |___________BSP_CFG_MCU_PART_GROUP = Group name - | | | |______________BSP_CFG_MCU_PART_SERIES = Series name - | | |________________BSP_CFG_MCU_PART_MEMORY_TYPE = Type of memory (Flash, ROMless) - | |__________________not used = Renesas MCU - |____________________not used = Renesas semiconductor product. -*/ - -/* Package type. Set the macro definition based on values below: - Character(s) = Value for macro = Package Type/Number of Pins/Pin Pitch - FC = 0x0 = LFQFP/176/0.50 - BG = 0x1 = LFBGA/176/0.80 - LC = 0x2 = TFLGA/177/0.50 - FB = 0x3 = LFQFP/144/0.50 - LK = 0x4 = TFLGA/145/0.50 - FP = 0x5 = LFQFP/100/0.50 - LJ = 0xA = TFLGA/100/0.65 -*/ -#define BSP_CFG_MCU_PART_PACKAGE (0x3) // <-- Updated by GUI. Do not edit this value manually - -/* Whether Encryption and SDHI are included or not. - Character(s) = Value for macro = Description - D = false = Encryption module not included, SDHI module included - H = true = Encryption module included, SDHI module included - C = false = Encryption module not included, SDHI module not included - G = true = Encryption module included, SDHI module not included -*/ -#define BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED (false) // <-- Updated by GUI. Do not edit this value manually - -/* ROM, RAM, and Data Flash Capacity. - Character(s) = Value for macro = ROM Size/Ram Size/Data Flash Size - L = 0x15 = 4MB/512KB/64KB - J = 0x13 = 3MB/512KB/64KB - G = 0x10 = 2.5MB/512KB/64KB - F = 0xF = 2MB/512KB/64KB -*/ -#define BSP_CFG_MCU_PART_MEMORY_SIZE (0x15) // <-- Updated by GUI. Do not edit this value manually - -/* Group name. - Character(s) = Value for macro = Description - 4M = 0x0 = RX64M Group -*/ -#define BSP_CFG_MCU_PART_GROUP (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Series name. - Character(s) = Value for macro = Description - 56 = 0x0 = RX600 Series -*/ -#define BSP_CFG_MCU_PART_SERIES (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Memory type. - Character(s) = Value for macro = Description - F = 0x0 = Flash memory version -*/ -#define BSP_CFG_MCU_PART_MEMORY_TYPE (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Whether to use 1 stack or 2. RX MCUs have the ability to use 2 stacks: an interrupt stack and a user stack. - * When using 2 stacks the user stack will be used during normal user code. When an interrupt occurs the CPU - * will automatically shift to using the interrupt stack. Having 2 stacks can make it easier to figure out how - * much stack space to allocate since the user does not have to worry about always having enough room on the - * user stack for if-and-when an interrupt occurs. Some users will not want 2 stacks though because it is not - * needed in all applications and can lead to wasted RAM (i.e. space in between stacks that is not used). - * If only 1 stack is used then the interrupt stack is the one that will be used. If 1 stack is chosen then - * the user may want to remove the 'SU' section from the linker sections to remove any linker warnings. - * - * 0 = Use 1 stack. Disable user stack. User stack size set below will be ignored. - * 1 = Use 2 stacks. User stack and interrupt stack will both be used. - */ -#define BSP_CFG_USER_STACK_ENABLE (0) - -#if defined(__CCRX__) || defined(__GNUC__) - -/* When using the user startup program, disable the following code. */ -#if (BSP_CFG_STARTUP_DISABLE == 0) - -/* If only 1 stack is chosen using BSP_CFG_USER_STACK_ENABLE then no RAM will be allocated for the user stack. */ -#if (BSP_CFG_USER_STACK_ENABLE == 1) -/* User Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. */ -#define BSP_CFG_USTACK_BYTES (0) -#endif - -/* Interrupt Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. - * If the interrupt stack is the only stack being used then the user will likely want to increase the default size - * below. - */ -#define BSP_CFG_ISTACK_BYTES (0x1000) - -#endif /* BSP_CFG_STARTUP_DISABLE == 0 */ - -/* Heap size in bytes. - To disable the heap you must follow these steps: - 1) Set this macro (BSP_CFG_HEAP_BYTES) to 0. - 2) Set the macro BSP_CFG_IO_LIB_ENABLE to 0. - 3) Disable stdio from being built into the project library. This is done by going into the Renesas RX Toolchain - settings and choosing the Standard Library section. After that choose 'Standard Library' for Category in HEW or - choose 'Contents' in E2Studio. This will present a list of modules that can be included. Uncheck the box for - stdio.h. -*/ -#define BSP_CFG_HEAP_BYTES (0) - -#endif /* defined(__CCRX__) || defined(__GNUC__) */ - -#if defined(__CCRX__) - -/* Initializes C input & output library functions. - 0 = Disable I/O library initialization in resetprg.c. If you are not using stdio then use this value. - 1 = Enable I/O library initialization in resetprg.c. This is default and needed if you are using stdio. */ -#define BSP_CFG_IO_LIB_ENABLE (1) - -#endif /* defined(__CCRX__) */ - -/* If desired the user may redirect the stdio charget() and/or charput() functions to their own respective functions - by enabling below and providing and replacing the my_sw_... function names with the names of their own functions. */ -#define BSP_CFG_USER_CHARGET_ENABLED (0) -#define BSP_CFG_USER_CHARGET_FUNCTION my_sw_charget_function - -#define BSP_CFG_USER_CHARPUT_ENABLED (0) -#define BSP_CFG_USER_CHARPUT_FUNCTION my_sw_charput_function - -/* After reset MCU will operate in Supervisor mode. To switch to User mode, set this macro to '1'. For more information - on the differences between these 2 modes see the CPU >> Processor Mode section of your MCU's hardware manual. - 0 = Stay in Supervisor mode. - 1 = Switch to User mode. -*/ -#define BSP_CFG_RUN_IN_USER_MODE (0) - -/* To get into User Boot Mode the user must control some pins on the MCU and also set some values in ROM. These values - in ROM are described in the Option-Setting Memory section of the hardware manual. This macro sets these values so - that User Boot Mode can be used. The user is still responsible for setting the MCU pins appropriately. If User Boot - is selected then the user should make sure that they setup a constant data section in their linker named 'UBSETTINGS' - at address 0xFF7FFFE8. - 0 = Single-Chip or USB Boot Mode - 1 = User Boot Mode -*/ -#define BSP_CFG_USER_BOOT_ENABLE (0) - -/* Set your desired ID code. NOTE, leave at the default (all 0xFF's) if you do not wish to use an ID code. If you set - this value and program it into the MCU then you will need to remember the ID code because the debugger will ask for - it when trying to connect. Note that the E1/E20 will ignore the ID code when programming the MCU during debugging. - If you set this value and then forget it then you can clear the ID code by connecting up in serial boot mode using - FDT. The ID Code is 16 bytes long. The macro below define the ID Code in 4-byte sections. */ -/* Lowest 4-byte section, address 0x00120050. From MSB to LSB: ID code 4, ID code 3, ID code 2, ID code 1/Control Code. - */ -#define BSP_CFG_ID_CODE_LONG_1 (0xFFFFFFFF) -/* 2nd ID Code section, address 0x00120054. From MSB to LSB: ID code 8, ID code 7, ID code 6, ID code 5. */ -#define BSP_CFG_ID_CODE_LONG_2 (0xFFFFFFFF) -/* 3rd ID Code section, address 0x00120058. From MSB to LSB: ID code 12, ID code 11, ID code 10, ID code 9. */ -#define BSP_CFG_ID_CODE_LONG_3 (0xFFFFFFFF) -/* 4th ID Code section, address 0x0012005C. From MSB to LSB: ID code 16, ID code 15, ID code 14, ID code 13. */ -#define BSP_CFG_ID_CODE_LONG_4 (0xFFFFFFFF) - -/* Clock source select (CKSEL). - 0 = Low Speed On-Chip Oscillator (LOCO) - 1 = High Speed On-Chip Oscillator (HOCO) - 2 = Main Clock Oscillator - 3 = Sub-Clock Oscillator - 4 = PLL Circuit -*/ -#define BSP_CFG_CLOCK_SOURCE (4) // <-- Updated by GUI. Do not edit this value manually - -/* The sub-clock oscillation control for using the RTC. - When '1' is selected, the registers related to RTC are initialized and the sub-clock oscillator is operated. - 0 = The RTC is not to be used. - 1 = The RTC is to be used. -*/ -#define BSP_CFG_RTC_ENABLE (0) // <-- Updated by GUI. Do not edit this value manually - -/* Sub-Clock Oscillator Drive Capacity Control (RTCDV). - 0 = Drive capacity for standard CL. - 1 = Drive capacity for low CL. -*/ -#define BSP_CFG_SOSC_DRV_CAP (0) // <-- Updated by GUI. Do not edit this value manually //standard CL by default - -/* Main clock Oscillator Switching (MOSEL). - 0 = Resonator - 1 = External clock input -*/ -#define BSP_CFG_MAIN_CLOCK_SOURCE (0) // <-- Updated by GUI. Do not edit this value manually - -/* Clock configuration options. - The input clock frequency is specified and then the system clocks are set by specifying the multipliers used. The - multiplier settings are used to set the clock registers in resetprg.c. If a 24MHz clock is used and the - ICLK is 120MHz, PCLKA is 120MHz, PCLKB is 60MHz, PCLKC is 60MHz, PCLKD is 60MHz, FCLK is 60MHz, USB Clock is 48MHz, - and BCLK is 120MHz then the settings would be: - - BSP_CFG_XTAL_HZ = 24000000 - BSP_CFG_PLL_DIV = 1 (no division) - BSP_CFG_PLL_MUL = 10.0 (24MHz x 10.0 = 240MHz) - BSP_CFG_ICK_DIV = 2 : System Clock (ICLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_ICK_DIV) = 120MHz - BSP_CFG_PCKA_DIV = 2 : Peripheral Clock A (PCLKA) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKA_DIV) = 120MHz - BSP_CFG_PCKB_DIV = 4 : Peripheral Clock B (PCLKB) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKB_DIV) = 60MHz - BSP_CFG_PCKC_DIV = 4 : Peripheral Clock C (PCLKC) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKC_DIV) = 60MHz - BSP_CFG_PCKD_DIV = 4 : Peripheral Clock D (PCLKD) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKD_DIV) = 60MHz - BSP_CFG_FCK_DIV = 4 : Flash IF Clock (FCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_FCK_DIV) = 60MHz - BSP_CFG_BCK_DIV = 2 : External Bus Clock (BCK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_BCK_DIV) = 120MHz - BSP_CFG_UCK_DIV = 5 : USB Clock (UCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_UCK_DIV) = 48MHz -*/ - -/* Input clock frequency in Hz (XTAL or EXTAL). */ -#define BSP_CFG_XTAL_HZ (12000000) // <-- Updated by GUI. Do not edit this value manually - -/* The HOCO can operate at several different frequencies. Choose which one using the macro below. - Available frequency settings: - 0 = 16MHz (default) - 1 = 18MHz - 2 = 20MHz -*/ -#define BSP_CFG_HOCO_FREQUENCY (0) // <-- Updated by GUI. Do not edit this value manually - -/* PLL clock source (PLLSRCEL). Choose which clock source to input to the PLL circuit. - Available clock sources: - 0 = Main clock (default) - 1 = HOCO -*/ -#define BSP_CFG_PLL_SRC (0) // <-- Updated by GUI. Do not edit this value manually - -/* PLL Input Frequency Division Ratio Select (PLIDIV). - Available divisors = /1 (no division), /2, /3 -*/ -#define BSP_CFG_PLL_DIV (1) // <-- Updated by GUI. Do not edit this value manually - -/* PLL Frequency Multiplication Factor Select (STC). - Available multipliers = x10.0 to x30.0 in 0.5 increments (e.g. 10.0, 10.5, 11.0, 11.5, ..., 29.0, 29.5, 30.0) -*/ -#define BSP_CFG_PLL_MUL (20.0) // <-- Updated by GUI. Do not edit this value manually - -/* System Clock Divider (ICK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_ICK_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock A Divider (PCKA). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKA_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock B Divider (PCKB). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKB_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock C Divider (PCKC). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKC_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock D Divider (PCKD). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKD_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* External Bus Clock Divider (BCLK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_BCK_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Flash IF Clock Divider (FCK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_FCK_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* USB Clock Divider Select. - Available divisors = /2, /3, /4, /5 -*/ -#define BSP_CFG_UCK_DIV (5) // <-- Updated by GUI. Do not edit this value manually - -/* Configure BCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency, 2= BCK/2 frequency -*/ -#define BSP_CFG_BCLK_OUTPUT (0) // <-- Updated by GUI. Do not edit this value manually - -/* Configure SDCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency -*/ -#define BSP_CFG_SDCLK_OUTPUT (0) // <-- Updated by GUI. Do not edit this value manually - -/* Main Clock Oscillator Wait Time (MOSCWTCR). - The value of MOSCWTCR register required for correspondence with the waiting time required to secure stable oscillation - by the main clock oscillator is obtained by using the maximum frequency for fLOCO in the formula below. - - BSP_CFG_MOSC_WAIT_TIME > (tMAINOSC * (fLOCO_max) + 16)/32 - (tMAINOSC: main clock oscillation stabilization time; fLOCO_max: maximum frequency for fLOCO) - - If tMAINOSC is 9.98 ms and fLOCO_max is 264 kHz (the period is 1/3.78 us), the formula gives - BSP_CFG_MOSC_WAIT_TIME > (9.98 ms * (264 kHZ) + 16)/32 = 82.83, so set the BSP_CFG_MOSC_WAIT_TIME to 83(53h). - - NOTE: The waiting time is not required when an external clock signal is input for the main clock oscillator. - Set the BSP_CFG_MOSC_WAIT_TIME to 00h. -*/ -#define BSP_CFG_MOSC_WAIT_TIME (0x53) // <-- Updated by GUI. Do not edit this value manually - -/* Sub-Clock Oscillator Wait Time (SOSCWTCR). - The value of SOSCWTCR register required for correspondence with the expected time to secure settling of oscillation - by the sub-clock oscillator is obtained by using the maximum frequency for fLOCO in the formula below. - - BSP_CFG_SOSC_WAIT_TIME > (tSUBOSC * (fLOCO_max) + 16)/16384 - (tSUBOSC: sub-clock oscillation stabilization time; fLOCO_max: maximum frequency for fLOCO) - - If tSUBOSC is 2 s and fLOCO is 264 kHz (the period is 1/3.78 us), the formula gives - BSP_CFG_SOSC_WAIT_TIME > (2 s * (264 kHz) +16)/16384 = 32.22, so set the BSP_CFG_SOSC_WAIT_TIME bits to 33(21h). -*/ -#define BSP_CFG_SOSC_WAIT_TIME (0x21) // <-- Updated by GUI. Do not edit this value manually - -/* Configure WDT and IWDT settings. - OFS0 - Option Function Select Register 0 - b31:b29 Reserved When reading, these bits return the value written by the user. The write value should be 1. - b28 WDTRSTIRQS - WDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b27:b26 WDTRPSS - WDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b25:b24 WDTRPES - WDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b23:b20 WDTCKS - WDT Clock Frequency Division Ratio - (1=PCLKB/4, 4=PCLKB/64, 0xF=PCLKB/128, 6=PCLKB/256, - 7=PCLKB/2048, 8=PCLKB/8192) - b19:b18 WDTTOPS - WDT Timeout Period Select (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b17 WDTSTRT - WDT Start Mode Select - (0=auto-start after reset, 1=halt after reset) - b16:b15 Reserved (set to 1) - b14 IWDTSLCSTP - IWDT Sleep Mode Count Stop Control - (0=can't stop count, 1=stop w/some low power modes) - b13 Reserved (set to 1) - b12 IWDTRSTIRQS - IWDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b11:b10 IWDTRPSS - IWDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b9:b8 IWDTRPES - IWDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b7:b4 IWDTCKS - IWDT Clock Frequency Division Ratio - (0=none, 2=/16, 3 = /32, 4=/64, 0xF=/128, 5=/256) - b3:b2 IWDTTOPS - IWDT Timeout Period Select - (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b1 IWDTSTRT - IWDT Start Mode Select - (0=auto-start after reset, 1=halt after reset) - b0 Reserved (set to 1) */ -#define BSP_CFG_OFS0_REG_VALUE (0xFFFFFFFF) // <-- Updated by GUI. Do not edit this value manually //Disable by default - -/* Configure whether voltage detection 0 circuit and HOCO are enabled after reset. - OFS1 - Option Function Select Register 1 - b31:b9 Reserved (set to 1) - b8 HOCOEN - Enable/disable HOCO oscillation after a reset (0=enable, 1=disable) - b7:b3 Reserved When reading, these bits return the value written by the user. The write value should be 1. - b2 LVDAS - Voltage Detection 0 circuit start (1=monitoring disabled) - b1:b0 VDSEL - Voltage Detection 0 level select (1=2.94v, 2=2.87v, 3=2.80v) - NOTE: If HOCO oscillation is enabled by OFS1.HOCOEN, HOCO frequency is 16MHz. - BSP_CFG_HOCO_FREQUENCY should be default value. -*/ -#define BSP_CFG_OFS1_REG_VALUE (0xFFFFFFFF) // <-- Updated by GUI. Do not edit this value manually //Disable by default - -/* Both RX64M and RX71M MCU's have a 'Trusted Memory' feature. This feature protects against - * illicit reading of blocks 8 and 9 in the code flash memory. This feature is disabled by default - * but may be enabled by setting the below to (0). - * Only 0 and 0xFFFFFFFF are valid settings. */ -#define BSP_CFG_TRUSTED_MODE_FUNCTION (0xFFFFFFFF) //Disable by default - -/* This macro lets other modules no if a RTOS is being used. - 0 = RTOS is not used. - 1 = FreeRTOS is used. - 2 = embOS is used.(This is not available.) - 3 = MicroC_OS is used.(This is not available.) - 4 = RI600V4 or RI600PX is used.(This is not available.) -*/ -/* As of today, we need a workaround to avoid the problem that the Smart Configurator does not have such GUI - yet and the BSP_CFG_RTOS_USED here is set to (0) every time of code generation by the Smart Configurator. - The BSP_CFG_RTOS_USED is set to (1) in the r_bsp.h instead of here so that the setting of here is ignored. -*/ -#if !defined(BSP_CFG_RTOS_USED) || (BSP_CFG_RTOS_USED == 0) -#if defined(BSP_CFG_RTOS_USED) -#undef BSP_CFG_RTOS_USED -#endif -#define BSP_CFG_RTOS_USED (0) // <-- Updated by GUI. Do not edit this value manually -#endif - -/* This macro is used to select which CMT channel used for system timer of RTOS. - * The setting of this macro is only valid if the macro BSP_CFG_RTOS_USED is set to a value other than 0. */ -#if (BSP_CFG_RTOS_USED != 0) -/* Setting value. - * 0 = CMT channel 0 used for system timer of RTOS (recommended to be used for RTOS). - * 1 = CMT channel 1 used for system timer of RTOS. - * 2 = CMT channel 2 used for system timer of RTOS. - * 3 = CMT channel 3 used for system timer of RTOS. - * Others = Invalid. */ -#define BSP_CFG_RTOS_SYSTEM_TIMER (0) -#endif - -/* By default modules will use global locks found in mcu_locks.c. If the user is using a RTOS and would rather use its - locking mechanisms then they can change this macro. - NOTE: If '1' is chosen for this macro then the user must also change the next macro 'BSP_CFG_USER_LOCKING_TYPE'. - 0 = Use default locking (non-RTOS) - 1 = Use user defined locking mechanism. -*/ -#define BSP_CFG_USER_LOCKING_ENABLED (0) - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to redefine the typedef - that is used for the locks. If the user is using a RTOS then they would likely redefine the typedef to be - a semaphore/mutex type of their RTOS. Use the macro below to set the type that will be used for the locks. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_TYPE bsp_lock_t - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to define the functions - that will handle the locking and unlocking. These functions should be defined below. - If BSP_CFG_USER_LOCKING_ENABLED is != 0: - R_BSP_HardwareLock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION(mcu_lock_t hw_index) - R_BSP_HardwareUnlock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION(mcu_lock_t hw_index) - NOTE:With these functions the index into the array holding the global hardware locks is passed as the parameter. - R_BSP_SoftwareLock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - R_BSP_SoftwareUnlock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - NOTE:With these functions the actual address of the lock to use is passed as the parameter. - NOTE: These functions must return a boolean. If lock was obtained or released successfully then return true. Else, - return false. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION my_hw_locking_function -#define BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION my_hw_unlocking_function -#define BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION my_sw_locking_function -#define BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION my_sw_unlocking_function - -/* If the user would like to determine if a warm start reset has occurred, then they may enable one or more of the - * following callback definitions AND provide a call back function name for the respective callback - * function (to be defined by the user). Setting BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED = 1 will result - * in a callback to the user defined my_sw_warmstart_prec_function just prior to the initialization of the C - * runtime environment by resetprg. - * - * Setting BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED = 1 will result in a callback to the user defined - * my_sw_warmstart_postc_function just after the initialization of the C runtime environment by resetprg. - */ -#define BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_PRE_C_FUNCTION my_sw_warmstart_prec_function - -#define BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_POST_C_FUNCTION my_sw_warmstart_postc_function - -/* By default FIT modules will check input parameters to be valid. This is helpful during development but some users - will want to disable this for production code. The reason for this would be to save execution time and code space. - This macro is a global setting for enabling or disabling parameter checking. Each FIT module will also have its - own local macro for this same purpose. By default the local macros will take the global value from here though - they can be overridden. Therefore, the local setting has priority over this global setting. Disabling parameter - checking should only used when inputs are known to be good and the increase in speed or decrease in code space is - needed. - 0 = Global setting for parameter checking is disabled. - 1 = Global setting for parameter checking is enabled (Default). -*/ -#define BSP_CFG_PARAM_CHECKING_ENABLE (1) - -/* This macro is used to define the voltage that is supplied to the MCU (Vcc). This macro is defined in millivolts. This - macro does not actually change anything on the MCU. Some FIT modules need this information so it is defined here. */ -#define BSP_CFG_MCU_VCC_MV (3300) // <-- Updated by GUI. Do not edit this value manually - -/* Allow initialization of auto-generated peripheral initialization code by Smart Configurator tool. - When not using the Smart Configurator, set the value of BSP_CFG_CONFIGURATOR_SELECT to 0. - 0 = Disabled (default) - 1 = Smart Configurator initialization code used -*/ -#define BSP_CFG_CONFIGURATOR_SELECT (1) // <-- Updated by GUI. Do not edit this value manually - -/* For some BSP functions, it is necessary to ensure that, while these functions are executing, interrupts from other - FIT modules do not occur. By controlling the IPL, these functions disable interrupts that are at or below the - specified interrupt priority level. - This macro sets the IPL. Range is 0x0 - 0xF. - Please set this macro more than IPR for other FIT module interrupts. - The default value is 0xF (maximum value). - Don't change if there is no special processing with higher priority than all fit modules. -*/ -#define BSP_CFG_FIT_IPL_MAX (0xF) - -/* This macro is used to select which SCI channel used for debug serial terminal. - */ -#define MY_BSP_CFG_SERIAL_TERM_SCI (7) - -#endif /* R_BSP_CONFIG_REF_HEADER_FILE */ - - - diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/r_config/r_bsp_config_readme.txt b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/r_config/r_bsp_config_readme.txt deleted file mode 100644 index 6a9002cf4f3..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/r_config/r_bsp_config_readme.txt +++ /dev/null @@ -1,12 +0,0 @@ -FIT r_config folder -------------------- -The purpose of the r_config folder is to provide one place where the user can store all of their FIT configuration -files. Putting the files in one place makes them easy to find, backup, and put in a version control system. - -FIT Modules are distributed with a reference configuration file. These files end with '_reference.h'. For example, -the reference configuration file for the r_bsp is named r_bsp_config_reference.h. Reference configuration files are -provided so that the user always has a known-good configuration to revert to. When adding a FIT Module to a project the -user should copy this reference configuration file to this folder and remove '_reference' from the filename -(r_bsp_config_reference.h is renamed to r_bsp_config.h). For the r_bsp the reference configuration file can be found in -the 'board' folder for the currently chosen development board. For other FIT Modules the reference configuration file -can be found in the 'ref' folder of the FIT Module. diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/r_config/r_bsp_interrupt_config.h b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/r_config/r_bsp_interrupt_config.h deleted file mode 100644 index ee6bd8fb8d0..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/r_config/r_bsp_interrupt_config.h +++ /dev/null @@ -1,236 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_interrupt_config.h -* Description : This module maps Interrupt A & B interrupts. More information on how this is done is given below. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 14.01.2014 1.00 First Release -* : 05.15.2017 1.10 Changed the name of the following macro definition, because there was a mistake -* in the name of macro definition. -* - From XXX_TPU0_TGI0V to XXX_TPU0_TCI0V. -* - From XXX_TPU1_TGI1V to XXX_TPU1_TCI1V. -* - From XXX_TPU1_TGI1U to XXX_TPU1_TCI1U. -* - From XXX_TPU2_TGI2V to XXX_TPU2_TCI2V. -* - From XXX_TPU2_TGI2U to XXX_TPU2_TCI2U. -* - From XXX_TPU3_TGI3V to XXX_TPU3_TCI3V. -* - From XXX_TPU4_TGI4V to XXX_TPU4_TCI4V. -* - From XXX_TPU4_TGI4U to XXX_TPU4_TCI4U. -* - From XXX_TPU5_TGI5V to XXX_TPU5_TCI5V. -* - From XXX_TPU5_TGI5U to XXX_TPU5_TCI5U. -* - From XXX_MTU0_TGIV0 to XXX_MTU0_TCIV0. -* - From XXX_MTU1_TGIV1 to XXX_MTU1_TCIV1. -* - From XXX_MTU1_TGIU1 to XXX_MTU1_TCIU1. -* - From XXX_MTU2_TGIV2 to XXX_MTU2_TCIV2. -* - From XXX_MTU2_TGIU2 to XXX_MTU2_TCIU2. -* - From XXX_MTU3_TGIV3 to XXX_MTU3_TCIV3. -* - From XXX_MTU4_TGIV4 to XXX_MTU4_TCIV4. -* - From XXX_MTU6_TGIV6 to XXX_MTU6_TCIV6. -* - From XXX_MTU7_TGIV7 to XXX_MTU7_TCIV7. -* - From XXX_MTU8_TGIV8 to XXX_MTU8_TCIV8. -* Removed the following macro definition. -* - BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIU8 -***********************************************************************************************************************/ -#ifndef R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE -#define R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/* If you wish to use one of the interrupt below then set the appropriate configuration macro to the vector number you - * wish to use for that interrupt. For example, if you want to use the RTC carry interrupt (CUP) at vector 176 then you - * would do the following: - * - * #define BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP 176 - */ - -/* Interrupt B Sources. - * -Valid vector numbers are 128-207. - * -There are more vector slots for B sources than actual B sources. By default all B sources are mapped. - * -If using the 'TPU1, TGI1A' interrupt it must be vector 144 or 145. It is set to 144 by default. - * -If a peripheral interrupt is going to be used to wake up the MCU from All-Module Clock Stop Mode then it must be - * in a vector between 146 to 157. Peripheral interrupts that can do this are TMR interrupts and the 'USB0, USBI0' - * interrupt. By default the TMR interrupts are chosen since there are 12 of them and there are 12 slots. - */ -#define BSP_MAPPED_INT_CFG_B_VECT_CMT2_CMI2 128 -#define BSP_MAPPED_INT_CFG_B_VECT_CMT3_CMI3 129 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIA0 146 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIB0 147 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_OVI0 148 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIA1 149 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIB1 150 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_OVI1 151 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIA2 152 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIB2 153 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_OVI2 154 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIA3 155 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIB3 156 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_OVI3 157 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0A 130 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0B 131 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0C 132 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0D 133 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TCI0V 134 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1A 144 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1B 135 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1V 136 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1U 137 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2A 138 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2B 139 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2V 140 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2U 141 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3A 142 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3B 143 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3C 145 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3D 158 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TCI3V 159 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4A 160 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4B 161 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4V 162 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4U 163 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5A 164 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5B 165 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5V 166 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5U 167 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC0I0 168 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC1I0 169 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC0I0 170 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC1I0 171 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC0I1 172 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC1I1 173 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC0I1 174 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC1I1 175 -#define BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP 176 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXF0 177 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXF0 178 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXM0 179 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXM0 180 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXF1 181 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXF1 182 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXM1 183 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXM1 184 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN2_RXF2 185 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN2_TXF2 186 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN2_RXM2 187 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN2_TXM2 188 -#define BSP_MAPPED_INT_CFG_B_VECT_USB0_USBI0 189 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12ADI0 190 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GBADI0 191 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12ADI1 192 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GBADI1 193 -#define BSP_MAPPED_INT_CFG_B_VECT_DES_DESEND 194 -#define BSP_MAPPED_INT_CFG_B_VECT_SHA_SHADEND 195 -#define BSP_MAPPED_INT_CFG_B_VECT_SHA_SHAEND 196 -#define BSP_MAPPED_INT_CFG_B_VECT_RNG_RNGEND 197 -#define BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR18I 198 -#define BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR19I 199 - -/* Interrupt A Sources. - * -Valid vector numbers are 208-255. - * -There are more A sources than A vector slots. By default none of the GPT interrupts are mapped. - * -If using the 'MTU1, TGI1A' interrupt it must be vector 208 or 209. It is set to 208 by default. - */ -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIA0 209 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIB0 210 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIC0 211 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGID0 212 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TCIV0 213 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIE0 214 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIF0 215 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIA1 208 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIB1 216 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIV1 217 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIU1 218 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIA2 219 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIB2 220 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIV2 221 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIU2 222 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIA3 223 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIB3 224 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIC3 225 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGID3 226 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TCIV3 227 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIA4 228 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIB4 229 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIC4 230 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGID4 231 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TCIV4 232 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIU5 233 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIV5 234 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIW5 235 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIA6 236 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIB6 237 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIC6 238 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGID6 239 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TCIV6 240 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIA7 241 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIB7 242 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIC7 243 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGID7 244 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TCIV7 245 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIA8 246 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIB8 247 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIC8 248 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGID8 249 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TCIV8 250 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCIA0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCIB0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCIC0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCID0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GDTE0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCIE0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCIF0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCIV0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT0_GTCIU0 -#define BSP_MAPPED_INT_CFG_A_VECT_GPTA_ETGIN -#define BSP_MAPPED_INT_CFG_A_VECT_GPTA_ETGIP -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCIA1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCIB1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCIC1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCID1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GDTE1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCIE1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCIF1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCIV1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT1_GTCIU1 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCIA2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCIB2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCIC2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCID2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GDTE2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCIE2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCIF2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCIV2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT2_GTCIU2 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCIA3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCIB3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCIC3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCID3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GDTE3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCIE3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCIF3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCIV3 -#define BSP_MAPPED_INT_CFG_A_VECT_GPT3_GTCIU3 -#define BSP_MAPPED_INT_CFG_A_VECT_EPTPC_IPLS 251 -#define BSP_MAPPED_INT_CFG_A_VECT_AES_AESRDY 252 -#define BSP_MAPPED_INT_CFG_A_VECT_AES_AESEND 253 - -#endif /* R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE */ diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/r_pincfg/Pin.c b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/r_pincfg/Pin.c deleted file mode 100644 index 07a9a94ab6b..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/r_pincfg/Pin.c +++ /dev/null @@ -1,111 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : Pin.c -* Version : 1.0.2 -* Device(s) : R5F564MLCxFB -* Description : This file implements SMC pin code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -/* Start user code for include. Do not edit comment generated here */ -#include "Pin.h" -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: R_Pins_Create -* Description : This function initializes Smart Configurator pins -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Pins_Create(void) -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set ET0_MDC pin */ - MPC.P72PFS.BYTE = 0x11U; - PORT7.PMR.BYTE |= 0x04U; - - /* Set ET0_MDIO pin */ - MPC.P71PFS.BYTE = 0x11U; - PORT7.PMR.BYTE |= 0x02U; - - /* Set REF50CK0 pin */ - MPC.P76PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x40U; - - /* Set RMII0_CRS_DV pin */ - MPC.P83PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x08U; - - /* Set RMII0_RXD0 pin */ - MPC.P75PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x20U; - - /* Set RMII0_RXD1 pin */ - MPC.P74PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x10U; - - /* Set RMII0_RX_ER pin */ - MPC.P77PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x80U; - - /* Set RMII0_TXD0 pin */ - MPC.P81PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x02U; - - /* Set RMII0_TXD1 pin */ - MPC.P82PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x04U; - - /* Set RMII0_TXD_EN pin */ - MPC.P80PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x01U; - - /* Set RXD7 pin */ - MPC.P92PFS.BYTE = 0x0AU; - PORT9.PMR.BYTE |= 0x04U; - - /* Set TXD7 pin */ - PORT9.PODR.BYTE |= 0x01U; - MPC.P90PFS.BYTE = 0x0AU; - PORT9.PDR.BYTE |= 0x01U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/r_pincfg/Pin.h b/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/r_pincfg/Pin.h deleted file mode 100644 index 5a207267b88..00000000000 --- a/demos/renesas/rx64m-gr-kaede/gnurx-e2studio/src/smc_gen/r_pincfg/Pin.h +++ /dev/null @@ -1,50 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : Pin.h -* Version : 1.0.2 -* Device(s) : R5F564MLCxFB -* Description : This file implements SMC pin code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef PIN_H -#define PIN_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Pins_Create(void); -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/.gitignore b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/.gitignore deleted file mode 100644 index 6ea78411070..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/.gitignore +++ /dev/null @@ -1,4 +0,0 @@ -/HardwareDebug/ -*.mtud -*.rcpe -*.mtsp diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/.settings/fittemp/r_sci_rx.ftl b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/.settings/fittemp/r_sci_rx.ftl deleted file mode 100644 index 62879ddbbe9..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/.settings/fittemp/r_sci_rx.ftl +++ /dev/null @@ -1,85 +0,0 @@ -<#-- - Copyright(C) 2015 Renesas Electronics Corporation - RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY - This program must be used solely for the purpose for which it was furnished - by Renesas Electronics Corporation. No part of this program may be reproduced - or disclosed to others, in any form, without the prior written permission of - Renesas Electronics Corporation. ---> -<#-- = DECLARE FUNCTION INFORMATION HERE =================== --> -<#-- - (Step 1) Explanation: These variables are necessary information for the function header. - Please fill up or leave blank, but do not delete ---> -<#assign Function_Base_Name = "R_SCI_PinSet"> -<#assign Function_Description = "This function initializes pins for r_sci_rx module"> -<#assign Function_Arg = "none"> -<#assign Function_Ret = "none"> -<#assign Version = 1.00> - -<#-- = DECLARE FUNCTION CONTENT HERE ======================= --> -<#-- - (Step 2) Explanation: Function content. - - Macro [initialsection] : - Any text that goes into this section will be printed out 1 time per function - input [postfix] :Use this variable to add the channel number to the function base name. ---> -<#macro initialsection postfix> -<#assign Function_Name = "${Function_Base_Name}${postfix}"> -<#include "lib/functionheader.ftl"> -void ${Function_Name}() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - -<#-- - (Step 3) Explanation: Function content. - - Macro [peripheralpincode] : Any text that goes into this section will be printed out 1 time per peripheral - - input [pin] : Available info includes: - pin.pinName :The name of pin, eg “SSLA0†- pin.assignedPinName :The pin assigned to, eg “P32†- pin.pinMPC :The port number of assigned pin, eg “P32†has portNume = “3†- pin.portNum :The bit number of the assigned pin, eg “P32†has pinBitNum = “2†- pin.pinBitNum :The value of MPC ---> -<#macro peripheralpincode pin> - - -<#-- - (Step 4) Explanation: Function content. - - Macro [channelpincode] : Any text that goes into this section will be printed out 1 time per channel - - input [pin] : Same as above ---> -<#macro channelpincode pin> - - /* Set ${pin.pinName} pin */ - MPC.${pin.assignedPinName}PFS.BYTE = 0x${pin.pinMPC}U; - PORT${pin.portNum}.PMR.BIT.B${pin.pinBitNum} = 1U; - - -<#macro channelpincodeextra pin postfix> - - -<#-- - (Step 5) Explanation: Function content. - - Macro [endsection] : Any text that goes into this section will be printed out 1 time last ---> -<#macro endsection> - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - - -<#-- - (Step 6) Explanation: Header file content - - Macro [headerfilesection] : Any text that goes into this section will be printed out 1 time in the header file - - input [postfix] :Use this variable to add the channel number to the function base name. ---> -<#macro headerfilesection postfix> -void ${Function_Base_Name}${postfix}(); - - -<#macro headerfilesectionExtra postfix> - - -<#-- = END OF FILE ========================================= --> \ No newline at end of file diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/aws_demos.mtpj b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/aws_demos.mtpj deleted file mode 100644 index e19873c65e2..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/aws_demos.mtpj +++ /dev/null @@ -1,11553 +0,0 @@ - - 9.01.00.00 - - - 2.0 - 9.1 - 241f7faf-8d29-4cd8-9625-74bf3297957b - 508da99e-cf9a-4861-9777-238509978d5e - 5ee77abd-530e-4003-bcf7-c86f93be0155 - fb98844b-2c27-4275-9804-f6e63e204da0 - 241f7faf-8d29-4cd8-9625-74bf3297957b - - - application_code - Category - 5ee77abd-530e-4003-bcf7-c86f93be0155 - - - config_files - Category - 5ee77abd-530e-4003-bcf7-c86f93be0155 - - - lib - Category - 5ee77abd-530e-4003-bcf7-c86f93be0155 - - - src - Category - 5ee77abd-530e-4003-bcf7-c86f93be0155 - - - Smart Configurator - Category - 5ee77abd-530e-4003-bcf7-c86f93be0155 - - - common_demos - Category - 558f1cb4-8360-477f-ac58-5d8f7f51f027 - - - renesas_code - Category - 558f1cb4-8360-477f-ac58-5d8f7f51f027 - - - main.c - File - ..\common\application_code\main.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 558f1cb4-8360-477f-ac58-5d8f7f51f027 - - - include - Category - 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File - ..\..\..\..\lib\FreeRTOS\stream_buffer.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 8fde26bf-fcea-4daa-ac1b-206bc64af9f0 - - - tasks.c - File - ..\..\..\..\lib\FreeRTOS\tasks.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 8fde26bf-fcea-4daa-ac1b-206bc64af9f0 - - - timers.c - File - ..\..\..\..\lib\FreeRTOS\timers.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 8fde26bf-fcea-4daa-ac1b-206bc64af9f0 - - - MemMang - Category - 1830c2a5-3ba4-497d-bcb0-72ecdc1fec97 - - - Renesas - Category - 1830c2a5-3ba4-497d-bcb0-72ecdc1fec97 - - - heap_4.c - File - ..\..\..\..\lib\FreeRTOS\portable\MemMang\heap_4.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 3808b8ee-2643-47cc-b6d1-cc81b61004a2 - - - RX600v2 - Category - 9809ad9e-8819-4e38-adf5-26d550df057b - - - port.c - File - ..\..\..\..\lib\FreeRTOS\portable\Renesas\RX600v2\port.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 0b4d1935-80d1-40dc-8f49-33741620886b - - - port_asm.src - File - ..\..\..\..\lib\FreeRTOS\portable\Renesas\RX600v2\port_asm.src - f654126d-e7ad-426d-be34-8455271d959b - 0b4d1935-80d1-40dc-8f49-33741620886b - - - portmacro.h - File - ..\..\..\..\lib\FreeRTOS\portable\Renesas\RX600v2\portmacro.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 0b4d1935-80d1-40dc-8f49-33741620886b - - - aws_greengrass_discovery.c - File - ..\..\..\..\lib\greengrass\aws_greengrass_discovery.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 0114b29b-41bd-4720-897b-5ab7b3efc3c9 - - - aws_helper_secure_connect.c - File - ..\..\..\..\lib\greengrass\aws_helper_secure_connect.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 0114b29b-41bd-4720-897b-5ab7b3efc3c9 - - - private - Category - ca2bec6a-5518-4882-903e-42a283a645a3 - - - aws_appversion32.h - File - ..\..\..\..\lib\include\aws_appversion32.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2bec6a-5518-4882-903e-42a283a645a3 - - - aws_crypto.h - File - ..\..\..\..\lib\include\aws_crypto.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2bec6a-5518-4882-903e-42a283a645a3 - - - aws_greengrass_discovery.h - File - ..\..\..\..\lib\include\aws_greengrass_discovery.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2bec6a-5518-4882-903e-42a283a645a3 - - - aws_mqtt_agent.h - File - ..\..\..\..\lib\include\aws_mqtt_agent.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2bec6a-5518-4882-903e-42a283a645a3 - - - aws_mqtt_lib.h - File - ..\..\..\..\lib\include\aws_mqtt_lib.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2bec6a-5518-4882-903e-42a283a645a3 - - - aws_ota_agent.h - File - ..\..\..\..\lib\include\aws_ota_agent.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2bec6a-5518-4882-903e-42a283a645a3 - - - aws_pkcs11.h - File - ..\..\..\..\lib\include\aws_pkcs11.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2bec6a-5518-4882-903e-42a283a645a3 - - - aws_secure_sockets.h - File - ..\..\..\..\lib\include\aws_secure_sockets.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2bec6a-5518-4882-903e-42a283a645a3 - - - aws_shadow.h - File - ..\..\..\..\lib\include\aws_shadow.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2bec6a-5518-4882-903e-42a283a645a3 - - - aws_system_init.h - File - ..\..\..\..\lib\include\aws_system_init.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2bec6a-5518-4882-903e-42a283a645a3 - - - aws_tls.h - File - ..\..\..\..\lib\include\aws_tls.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2bec6a-5518-4882-903e-42a283a645a3 - - - aws_wifi.h - File - ..\..\..\..\lib\include\aws_wifi.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2bec6a-5518-4882-903e-42a283a645a3 - - - event_groups.h - File - ..\..\..\..\lib\include\event_groups.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2bec6a-5518-4882-903e-42a283a645a3 - - - FreeRTOS.h - File - ..\..\..\..\lib\include\FreeRTOS.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2bec6a-5518-4882-903e-42a283a645a3 - - - message_buffer.h - File - ..\..\..\..\lib\include\message_buffer.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2bec6a-5518-4882-903e-42a283a645a3 - - - queue.h - File - ..\..\..\..\lib\include\queue.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2bec6a-5518-4882-903e-42a283a645a3 - - - semphr.h - File - ..\..\..\..\lib\include\semphr.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2bec6a-5518-4882-903e-42a283a645a3 - - - stream_buffer.h - File - ..\..\..\..\lib\include\stream_buffer.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2bec6a-5518-4882-903e-42a283a645a3 - - - task.h - File - ..\..\..\..\lib\include\task.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2bec6a-5518-4882-903e-42a283a645a3 - - - timers.h - File - ..\..\..\..\lib\include\timers.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2bec6a-5518-4882-903e-42a283a645a3 - - - aws_bufferpool.h - File - ..\..\..\..\lib\include\private\aws_bufferpool.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - aws_default_root_certificates.h - File - ..\..\..\..\lib\include\private\aws_default_root_certificates.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - aws_doubly_linked_list.h - File - ..\..\..\..\lib\include\private\aws_doubly_linked_list.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - aws_ggd_config_defaults.h - File - ..\..\..\..\lib\include\private\aws_ggd_config_defaults.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - aws_helper_secure_connect.h - File - ..\..\..\..\lib\include\private\aws_helper_secure_connect.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - aws_lib_init.h - File - ..\..\..\..\lib\include\private\aws_lib_init.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - aws_mqtt_agent_config_defaults.h - File - ..\..\..\..\lib\include\private\aws_mqtt_agent_config_defaults.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - aws_mqtt_buffer.h - File - ..\..\..\..\lib\include\private\aws_mqtt_buffer.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - aws_mqtt_config_defaults.h - File - ..\..\..\..\lib\include\private\aws_mqtt_config_defaults.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - aws_ota_agent_internal.h - File - ..\..\..\..\lib\include\private\aws_ota_agent_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - aws_ota_cbor_internal.h - File - ..\..\..\..\lib\include\private\aws_ota_cbor_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - aws_ota_cbor.h - File - ..\..\..\..\lib\include\private\aws_ota_cbor.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - aws_ota_pal.h - File - ..\..\..\..\lib\include\private\aws_ota_pal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - aws_ota_types.h - File - ..\..\..\..\lib\include\private\aws_ota_types.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - aws_secure_sockets_config_defaults.h - File - ..\..\..\..\lib\include\private\aws_secure_sockets_config_defaults.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - aws_shadow_config_defaults.h - File - ..\..\..\..\lib\include\private\aws_shadow_config_defaults.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - aws_shadow_json.h - File - ..\..\..\..\lib\include\private\aws_shadow_json.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - deprecated_definitions.h - File - ..\..\..\..\lib\include\private\deprecated_definitions.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - list.h - File - ..\..\..\..\lib\include\private\list.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - mpu_wrappers.h - File - ..\..\..\..\lib\include\private\mpu_wrappers.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - portable.h - File - ..\..\..\..\lib\include\private\portable.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - projdefs.h - File - ..\..\..\..\lib\include\private\projdefs.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - stack_macros.h - File - ..\..\..\..\lib\include\private\stack_macros.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - threading_alt.h - File - ..\..\..\..\lib\include\private\threading_alt.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3b16ad49-2ec4-4ec5-9a1d-99bc937cbd77 - - - aws_mqtt_agent.c - File - ..\..\..\..\lib\mqtt\aws_mqtt_agent.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ff530884-2e1f-4fae-bd18-56ec1d9a18c2 - - - aws_mqtt_lib.c - File - ..\..\..\..\lib\mqtt\aws_mqtt_lib.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ff530884-2e1f-4fae-bd18-56ec1d9a18c2 - - - aws_pkcs11_mbedtls.c - File - ..\..\..\..\lib\pkcs11\mbedtls\aws_pkcs11_mbedtls.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 43f9b474-0027-48d6-aa16-623398b226de - - - aws_pkcs11_pal.c - File - ..\..\..\..\lib\pkcs11\portable\renesas\rx65n-cloud-kit-uart-sx-ulpgn\aws_pkcs11_pal.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 43f9b474-0027-48d6-aa16-623398b226de - - - aws_secure_sockets.c - File - ..\..\..\..\lib\secure_sockets\portable\renesas\rx65n-cloud-kit-uart-sx-ulpgn\aws_secure_sockets.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - eda26ef0-cb93-455b-9137-05feb9cc79fd - - - aws_shadow.c - File - ..\..\..\..\lib\shadow\aws_shadow.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 2bfd35a3-f4f8-459a-b696-99d90a83af04 - - - aws_shadow_json.c - File - ..\..\..\..\lib\shadow\aws_shadow_json.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 2bfd35a3-f4f8-459a-b696-99d90a83af04 - - - aws_tls.c - File - ..\..\..\..\lib\tls\aws_tls.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 46cda52b-1fb2-4e6f-88b9-3add292a35d8 - - - aws_system_init.c - File - ..\..\..\..\lib\utils\aws_system_init.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ccf5b5cd-323a-4f87-b221-e6f089eb2386 - - - aws_wifi.c - File - ..\..\..\..\lib\wifi\portable\renesas\rx65n-cloud-kit-uart-sx-ulpgn\aws_wifi.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - a80c1319-d799-4d00-a890-47301a6bc510 - - - jsmn - Category - d24fb8e5-acbf-44eb-918c-df20ccf6d7b0 - - - mbedtls - Category - d24fb8e5-acbf-44eb-918c-df20ccf6d7b0 - - - mcu_vendor - Category - d24fb8e5-acbf-44eb-918c-df20ccf6d7b0 - - - pkcs11 - Category - d24fb8e5-acbf-44eb-918c-df20ccf6d7b0 - - - tinycbor - Category - d24fb8e5-acbf-44eb-918c-df20ccf6d7b0 - - - jsmn.c - File - ..\..\..\..\lib\third_party\jsmn\jsmn.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - c5ba7b95-72df-4b6b-9b96-48f15e4480d3 - - - jsmn.h - File - ..\..\..\..\lib\third_party\jsmn\jsmn.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - c5ba7b95-72df-4b6b-9b96-48f15e4480d3 - - - include - Category - 290b5f74-648f-49f3-a3e0-82ddff8a568c - - - library - Category - 290b5f74-648f-49f3-a3e0-82ddff8a568c - - - LICENSE - File - ..\..\..\..\lib\third_party\mbedtls\LICENSE - 290b5f74-648f-49f3-a3e0-82ddff8a568c - - - mbedtls - Category - fedb67fd-faef-4f00-90c0-63ce36cbe986 - - - aes.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\aes.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - aesni.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\aesni.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - arc4.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\arc4.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - asn1.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\asn1.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - asn1write.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\asn1write.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - base64.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\base64.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - bignum.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\bignum.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - blowfish.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\blowfish.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - bn_mul.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\bn_mul.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - camellia.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\camellia.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - ccm.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ccm.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - certs.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\certs.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - check_config.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\check_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - cipher.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\cipher.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - cipher_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\cipher_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - cmac.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\cmac.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - compat-1.3.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\compat-1.3.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - config.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - ctr_drbg.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ctr_drbg.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - debug.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\debug.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - des.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\des.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - dhm.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\dhm.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - ecdh.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ecdh.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - ecdsa.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ecdsa.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - ecjpake.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ecjpake.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - ecp.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ecp.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - ecp_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ecp_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - entropy.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\entropy.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - entropy_poll.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\entropy_poll.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - error.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\error.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - gcm.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\gcm.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - havege.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\havege.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - hmac_drbg.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\hmac_drbg.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - md.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\md.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - md2.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\md2.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - md4.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\md4.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - md5.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\md5.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - md_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\md_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - memory_buffer_alloc.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\memory_buffer_alloc.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - net.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\net.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - net_sockets.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\net_sockets.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - oid.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\oid.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - padlock.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\padlock.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - pem.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\pem.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - pk.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\pk.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - pkcs12.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\pkcs12.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - pkcs5.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\pkcs5.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - pk_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\pk_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - platform.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\platform.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - platform_time.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\platform_time.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - platform_util.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\platform_util.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - ripemd160.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ripemd160.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - rsa_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\rsa_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - rsa.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\rsa.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - sha1.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\sha1.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - sha256.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\sha256.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - sha512.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\sha512.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - ssl.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - ssl_cache.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl_cache.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - ssl_ciphersuites.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl_ciphersuites.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - ssl_cookie.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl_cookie.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - ssl_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - ssl_ticket.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl_ticket.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - threading.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\threading.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - timing.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\timing.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - version.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\version.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - x509.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\x509.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - x509_crl.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\x509_crl.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - x509_crt.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\x509_crt.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - x509_csr.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\x509_csr.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - xtea.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\xtea.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 2c7f2153-c8fd-4fe5-bae8-96e55d379c30 - - - aes.c - File - ..\..\..\..\lib\third_party\mbedtls\library\aes.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - aesni.c - File - ..\..\..\..\lib\third_party\mbedtls\library\aesni.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - arc4.c - File - ..\..\..\..\lib\third_party\mbedtls\library\arc4.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - asn1parse.c - File - ..\..\..\..\lib\third_party\mbedtls\library\asn1parse.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - asn1write.c - File - ..\..\..\..\lib\third_party\mbedtls\library\asn1write.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - base64.c - File - ..\..\..\..\lib\third_party\mbedtls\library\base64.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - bignum.c - File - ..\..\..\..\lib\third_party\mbedtls\library\bignum.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - blowfish.c - File - ..\..\..\..\lib\third_party\mbedtls\library\blowfish.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - camellia.c - File - ..\..\..\..\lib\third_party\mbedtls\library\camellia.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - ccm.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ccm.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - certs.c - File - ..\..\..\..\lib\third_party\mbedtls\library\certs.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - cipher.c - File - ..\..\..\..\lib\third_party\mbedtls\library\cipher.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - cipher_wrap.c - File - ..\..\..\..\lib\third_party\mbedtls\library\cipher_wrap.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - cmac.c - File - ..\..\..\..\lib\third_party\mbedtls\library\cmac.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - ctr_drbg.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ctr_drbg.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - debug.c - File - ..\..\..\..\lib\third_party\mbedtls\library\debug.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - des.c - File - ..\..\..\..\lib\third_party\mbedtls\library\des.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - dhm.c - File - ..\..\..\..\lib\third_party\mbedtls\library\dhm.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - ecdh.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ecdh.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - ecdsa.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ecdsa.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - ecjpake.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ecjpake.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - ecp.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ecp.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - ecp_curves.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ecp_curves.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - entropy.c - File - ..\..\..\..\lib\third_party\mbedtls\library\entropy.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - entropy_poll.c - File - ..\..\..\..\lib\third_party\mbedtls\library\entropy_poll.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - error.c - File - ..\..\..\..\lib\third_party\mbedtls\library\error.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - gcm.c - File - ..\..\..\..\lib\third_party\mbedtls\library\gcm.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - havege.c - File - ..\..\..\..\lib\third_party\mbedtls\library\havege.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - hmac_drbg.c - File - ..\..\..\..\lib\third_party\mbedtls\library\hmac_drbg.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - md.c - File - ..\..\..\..\lib\third_party\mbedtls\library\md.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - md2.c - File - ..\..\..\..\lib\third_party\mbedtls\library\md2.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - md4.c - File - ..\..\..\..\lib\third_party\mbedtls\library\md4.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - md5.c - File - ..\..\..\..\lib\third_party\mbedtls\library\md5.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - md_wrap.c - File - ..\..\..\..\lib\third_party\mbedtls\library\md_wrap.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - memory_buffer_alloc.c - File - ..\..\..\..\lib\third_party\mbedtls\library\memory_buffer_alloc.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - net_sockets.c - File - ..\..\..\..\lib\third_party\mbedtls\library\net_sockets.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - oid.c - File - ..\..\..\..\lib\third_party\mbedtls\library\oid.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - padlock.c - File - ..\..\..\..\lib\third_party\mbedtls\library\padlock.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - pem.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pem.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - pk.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pk.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - pkcs12.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pkcs12.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - pkcs5.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pkcs5.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - pkparse.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pkparse.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - pkwrite.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pkwrite.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - pk_wrap.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pk_wrap.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - platform.c - File - ..\..\..\..\lib\third_party\mbedtls\library\platform.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - platform_util.c - File - ..\..\..\..\lib\third_party\mbedtls\library\platform_util.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - ripemd160.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ripemd160.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - rsa_internal.c - File - ..\..\..\..\lib\third_party\mbedtls\library\rsa_internal.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - rsa.c - File - ..\..\..\..\lib\third_party\mbedtls\library\rsa.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - sha1.c - File - ..\..\..\..\lib\third_party\mbedtls\library\sha1.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - sha256.c - File - ..\..\..\..\lib\third_party\mbedtls\library\sha256.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - sha512.c - File - ..\..\..\..\lib\third_party\mbedtls\library\sha512.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - ssl_cache.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_cache.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - ssl_ciphersuites.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_ciphersuites.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - ssl_cli.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_cli.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - ssl_cookie.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_cookie.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - ssl_srv.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_srv.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - ssl_ticket.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_ticket.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - ssl_tls.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_tls.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - threading.c - File - ..\..\..\..\lib\third_party\mbedtls\library\threading.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - timing.c - File - ..\..\..\..\lib\third_party\mbedtls\library\timing.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - version.c - File - ..\..\..\..\lib\third_party\mbedtls\library\version.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - version_features.c - File - ..\..\..\..\lib\third_party\mbedtls\library\version_features.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - x509.c - File - ..\..\..\..\lib\third_party\mbedtls\library\x509.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - x509write_crt.c - File - ..\..\..\..\lib\third_party\mbedtls\library\x509write_crt.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - x509write_csr.c - File - ..\..\..\..\lib\third_party\mbedtls\library\x509write_csr.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - x509_create.c - File - ..\..\..\..\lib\third_party\mbedtls\library\x509_create.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - x509_crl.c - File - ..\..\..\..\lib\third_party\mbedtls\library\x509_crl.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - x509_crt.c - File - ..\..\..\..\lib\third_party\mbedtls\library\x509_crt.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - x509_csr.c - File - ..\..\..\..\lib\third_party\mbedtls\library\x509_csr.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - xtea.c - File - ..\..\..\..\lib\third_party\mbedtls\library\xtea.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d044b529-0ea4-4ef9-9820-9b917eae6b0e - - - renesas - Category - 9899b014-cf9c-4c2c-b887-f2a30213d588 - - - amazon_freertos_common - Category - 3863ed64-cb9f-4ebc-b063-3fa8aba74414 - b2e0d829-a712-4849-b688-ac2ef1a2492f - - - FIT - Category - 3863ed64-cb9f-4ebc-b063-3fa8aba74414 - - - pkcs11.h - File - ..\..\..\..\lib\third_party\pkcs11\pkcs11.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 7ad126e2-35b1-4b16-bb94-66d390587b86 - - - pkcs11f.h - File - ..\..\..\..\lib\third_party\pkcs11\pkcs11f.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 7ad126e2-35b1-4b16-bb94-66d390587b86 - - - pkcs11t.h - File - ..\..\..\..\lib\third_party\pkcs11\pkcs11t.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 7ad126e2-35b1-4b16-bb94-66d390587b86 - - - assert_p.h - File - ..\..\..\..\lib\third_party\tinycbor\assert_p.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2dbc9b-9e64-4944-84a7-060f3129324f - - - cbor.h - File - ..\..\..\..\lib\third_party\tinycbor\cbor.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2dbc9b-9e64-4944-84a7-060f3129324f - - - cborconstants_p.h - File - ..\..\..\..\lib\third_party\tinycbor\cborconstants_p.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2dbc9b-9e64-4944-84a7-060f3129324f - - - cborencoder.c - File - ..\..\..\..\lib\third_party\tinycbor\cborencoder.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ca2dbc9b-9e64-4944-84a7-060f3129324f - - - cborencoder_close_container_checked.c - File - ..\..\..\..\lib\third_party\tinycbor\cborencoder_close_container_checked.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ca2dbc9b-9e64-4944-84a7-060f3129324f - - - cborerrorstrings.c - File - ..\..\..\..\lib\third_party\tinycbor\cborerrorstrings.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ca2dbc9b-9e64-4944-84a7-060f3129324f - - - cborparser.c - File - ..\..\..\..\lib\third_party\tinycbor\cborparser.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ca2dbc9b-9e64-4944-84a7-060f3129324f - - - cborparser_dup_string.c - File - ..\..\..\..\lib\third_party\tinycbor\cborparser_dup_string.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ca2dbc9b-9e64-4944-84a7-060f3129324f - - - cborpretty.c - File - ..\..\..\..\lib\third_party\tinycbor\cborpretty.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ca2dbc9b-9e64-4944-84a7-060f3129324f - - - compilersupport_p.h - File - ..\..\..\..\lib\third_party\tinycbor\compilersupport_p.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2dbc9b-9e64-4944-84a7-060f3129324f - - - extract_number_p.h - File - ..\..\..\..\lib\third_party\tinycbor\extract_number_p.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2dbc9b-9e64-4944-84a7-060f3129324f - - - math_support_p.h - File - ..\..\..\..\lib\third_party\tinycbor\math_support_p.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ca2dbc9b-9e64-4944-84a7-060f3129324f - - - LICENSE - File - ..\..\..\..\lib\third_party\tinycbor\LICENSE - ca2dbc9b-9e64-4944-84a7-060f3129324f - - - amazon_freertos_common - Category - 9e083c77-d73b-453d-9e70-f3db10924cb7 - 4b15a201-d894-4ec9-a97e-f742c0842273 - - - FIT_modified_code - Category - 9e083c77-d73b-453d-9e70-f3db10924cb7 - - - compiler_support - Category - de2d55bf-91c6-4fe9-9cdf-d0944dc7a81e - - - network_support - Category - de2d55bf-91c6-4fe9-9cdf-d0944dc7a81e - e5b341e4-87b0-4a31-9725-c5a731bfbb3e - - - croutine.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\amazon_freertos_common\croutine.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - de2d55bf-91c6-4fe9-9cdf-d0944dc7a81e - - - entropy_hardware_poll.c - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\amazon_freertos_common\entropy_hardware_poll.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - de2d55bf-91c6-4fe9-9cdf-d0944dc7a81e - - - freertos_start.c - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\amazon_freertos_common\freertos_start.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - de2d55bf-91c6-4fe9-9cdf-d0944dc7a81e - - - freertos_start.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\amazon_freertos_common\freertos_start.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - de2d55bf-91c6-4fe9-9cdf-d0944dc7a81e - - - serial_term_uart.c - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\amazon_freertos_common\serial_term_uart.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - de2d55bf-91c6-4fe9-9cdf-d0944dc7a81e - - - serial_term_uart.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\amazon_freertos_common\serial_term_uart.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - de2d55bf-91c6-4fe9-9cdf-d0944dc7a81e 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bd008f5b-82b0-41f7-a3da-4693e24eb003 - - - en - Category - 1dcefb79-6cda-41c9-89e8-5c8b33effd3a - - - ja - Category - 1dcefb79-6cda-41c9-89e8-5c8b33effd3a - - - r01an1692ej0220-rx.pdf - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_riic_rx\doc\en\r01an1692ej0220-rx.pdf - 41d84f62-5adf-4028-a1ee-0392c4601734 - - - r01an1692jj0220-rx.pdf - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_riic_rx\doc\ja\r01an1692jj0220-rx.pdf - 9a8470db-0d28-4e63-8cd3-baff551fe6b3 - - - r_riic_rx_config_reference.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_riic_rx\ref\r_riic_rx_config_reference.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - b771fea0-02ad-48bb-b828-f0177063c646 - - - r_riic_rx_pin_config_reference.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_riic_rx\ref\r_riic_rx_pin_config_reference.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 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Category - 9186ea42-bca4-4fc4-b679-4814a304e1cf - - - ref - Category - 9186ea42-bca4-4fc4-b679-4814a304e1cf - - - src - Category - 9186ea42-bca4-4fc4-b679-4814a304e1cf - - - r_sci_iic_rx_if.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_sci_iic_rx\r_sci_iic_rx_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 9186ea42-bca4-4fc4-b679-4814a304e1cf - - - readme.txt - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_sci_iic_rx\readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - 9186ea42-bca4-4fc4-b679-4814a304e1cf - - - en - Category - e0c0b061-a4c4-4156-8289-53346f399f4e - - - ja - Category - e0c0b061-a4c4-4156-8289-53346f399f4e - - - r01an1691ej0220-rx.pdf - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_sci_iic_rx\doc\en\r01an1691ej0220-rx.pdf - 9d10638f-204d-4025-902c-b8a8261b42d2 - - - r01an1691jj0220-rx.pdf - File - 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..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_sci_iic_rx\src\r_sci_iic_rx_platform.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - b6914e23-f4dc-4cfa-b786-273f04125833 - - - r_sci_iic_rx_private.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_sci_iic_rx\src\r_sci_iic_rx_private.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - b6914e23-f4dc-4cfa-b786-273f04125833 - - - targets - Category - b6914e23-f4dc-4cfa-b786-273f04125833 - - - rx65n - Category - 286aeaba-fea3-4b28-abd2-738bd5930068 - - - r_sci_iic_rx65n.c - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_sci_iic_rx\src\targets\rx65n\r_sci_iic_rx65n.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - a8f03cb9-43c1-4e61-bbbd-054355776f9b - - - r_sci_iic_rx65n_private.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_sci_iic_rx\src\targets\rx65n\r_sci_iic_rx65n_private.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - a8f03cb9-43c1-4e61-bbbd-054355776f9b - - - doc - Category - fd7d81ab-0b38-4ee1-80f0-39974d5ef1a8 - - - ref - Category - fd7d81ab-0b38-4ee1-80f0-39974d5ef1a8 - - - src - Category - fd7d81ab-0b38-4ee1-80f0-39974d5ef1a8 - - - r_sci_rx_if.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_sci_rx\r_sci_rx_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - fd7d81ab-0b38-4ee1-80f0-39974d5ef1a8 - - - readme.txt - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_sci_rx\readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - fd7d81ab-0b38-4ee1-80f0-39974d5ef1a8 - - - en - Category - e61ecc35-4ba6-40b4-84de-ab1f35dc2cac - - - ja - Category - e61ecc35-4ba6-40b4-84de-ab1f35dc2cac - - - r01an1815ej0201-rx.pdf - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_sci_rx\doc\en\r01an1815ej0201-rx.pdf - 0dba9175-f65d-4aa3-b5fe-45c4dcacfc4d - - - r01an1815jj0201-rx.pdf - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_sci_rx\doc\ja\r01an1815jj0201-rx.pdf - ef4e37a7-20cf-4536-9570-4580f5ee26c3 - - - r_sci_rx_config_reference.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_sci_rx\ref\r_sci_rx_config_reference.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 24574068-e276-436d-97bd-4f4f757b7b6f - - - r_sci_rx.c - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_sci_rx\src\r_sci_rx.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 83e23043-d9ae-4122-8b25-a8abc5c86ae1 - - - r_sci_rx_platform.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_sci_rx\src\r_sci_rx_platform.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 83e23043-d9ae-4122-8b25-a8abc5c86ae1 - - - r_sci_rx_private.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_sci_rx\src\r_sci_rx_private.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 83e23043-d9ae-4122-8b25-a8abc5c86ae1 - - - targets - Category - 83e23043-d9ae-4122-8b25-a8abc5c86ae1 - - - rx65n - Category - 4c2ff5cd-e371-4e20-abe5-654af8b33bc5 - - - r_sci_rx65n.c - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_sci_rx\src\targets\rx65n\r_sci_rx65n.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d1c9ef02-9627-49b0-b7a1-b8cdf899d0dc - - - r_sci_rx65n_data.c - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_sci_rx\src\targets\rx65n\r_sci_rx65n_data.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d1c9ef02-9627-49b0-b7a1-b8cdf899d0dc - - - r_sci_rx65n_private.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_sci_rx\src\targets\rx65n\r_sci_rx65n_private.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - d1c9ef02-9627-49b0-b7a1-b8cdf899d0dc - - - general - Category - 93298d6c-d5d0-4e48-8856-76e602249073 - - - r_bsp - Category - 93298d6c-d5d0-4e48-8856-76e602249073 - - - r_byteq - Category - 93298d6c-d5d0-4e48-8856-76e602249073 - - - r_config - Category - 93298d6c-d5d0-4e48-8856-76e602249073 - - - r_flash_rx - Category - 93298d6c-d5d0-4e48-8856-76e602249073 - - - r_pincfg - Category - 93298d6c-d5d0-4e48-8856-76e602249073 - - - r_sci_rx - Category - 93298d6c-d5d0-4e48-8856-76e602249073 - - - r_s12ad_rx - Category - 93298d6c-d5d0-4e48-8856-76e602249073 - - - r_cg_hardware_setup.c - File - src\smc_gen\general\r_cg_hardware_setup.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 569a450a-6148-4571-87ad-d23891dc1bd4 - - - r_cg_macrodriver.h - File - src\smc_gen\general\r_cg_macrodriver.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 569a450a-6148-4571-87ad-d23891dc1bd4 - - - r_cg_userdefine.h - File - src\smc_gen\general\r_cg_userdefine.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 569a450a-6148-4571-87ad-d23891dc1bd4 - - - r_smc_cgc.c - File - src\smc_gen\general\r_smc_cgc.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 569a450a-6148-4571-87ad-d23891dc1bd4 - - - r_smc_cgc.h - File - src\smc_gen\general\r_smc_cgc.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 569a450a-6148-4571-87ad-d23891dc1bd4 - - - r_smc_cgc_user.c - File - src\smc_gen\general\r_smc_cgc_user.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 569a450a-6148-4571-87ad-d23891dc1bd4 - - - r_smc_entry.h - File - src\smc_gen\general\r_smc_entry.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 569a450a-6148-4571-87ad-d23891dc1bd4 - - - r_smc_interrupt.c - File - src\smc_gen\general\r_smc_interrupt.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 569a450a-6148-4571-87ad-d23891dc1bd4 - - - r_smc_interrupt.h - File - src\smc_gen\general\r_smc_interrupt.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 569a450a-6148-4571-87ad-d23891dc1bd4 - - - platform.h - File - src\smc_gen\r_bsp\platform.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 682261e9-932d-478c-a7a5-0a39a68d4316 - - - readme.txt - File - src\smc_gen\r_bsp\readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - 682261e9-932d-478c-a7a5-0a39a68d4316 - - - board - Category - 682261e9-932d-478c-a7a5-0a39a68d4316 - - - doc - Category - 682261e9-932d-478c-a7a5-0a39a68d4316 - - - mcu - Category - 682261e9-932d-478c-a7a5-0a39a68d4316 - - - generic_rx65n - Category - 06b102af-48b0-4791-bff4-2843d55a36b6 - - - user - Category - 06b102af-48b0-4791-bff4-2843d55a36b6 - - - dbsct.c - File - src\smc_gen\r_bsp\board\generic_rx65n\dbsct.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 65a1de97-e343-4447-a3de-f89bac455aa1 - - - hwsetup.c - File - src\smc_gen\r_bsp\board\generic_rx65n\hwsetup.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 65a1de97-e343-4447-a3de-f89bac455aa1 - - - hwsetup.h - File - src\smc_gen\r_bsp\board\generic_rx65n\hwsetup.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 65a1de97-e343-4447-a3de-f89bac455aa1 - - - lowlvl.c - File - src\smc_gen\r_bsp\board\generic_rx65n\lowlvl.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 65a1de97-e343-4447-a3de-f89bac455aa1 - - - lowsrc.c - File - src\smc_gen\r_bsp\board\generic_rx65n\lowsrc.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 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src\smc_gen\r_bsp\mcu\all\r_bsp_common.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 320d7639-0209-48cb-9029-d65c87c95097 - - - r_bsp_common.h - File - src\smc_gen\r_bsp\mcu\all\r_bsp_common.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 320d7639-0209-48cb-9029-d65c87c95097 - - - r_typedefs.h - File - src\smc_gen\r_bsp\mcu\all\r_typedefs.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 320d7639-0209-48cb-9029-d65c87c95097 - - - cpu.c - File - src\smc_gen\r_bsp\mcu\rx65n\cpu.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 3edcebbf-47d6-4b57-8157-16baa12e9187 - - - cpu.h - File - src\smc_gen\r_bsp\mcu\rx65n\cpu.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3edcebbf-47d6-4b57-8157-16baa12e9187 - - - locking.c - File - src\smc_gen\r_bsp\mcu\rx65n\locking.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 3edcebbf-47d6-4b57-8157-16baa12e9187 - - - locking.h - File - src\smc_gen\r_bsp\mcu\rx65n\locking.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3edcebbf-47d6-4b57-8157-16baa12e9187 - - - mcu_clocks.c - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_clocks.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 3edcebbf-47d6-4b57-8157-16baa12e9187 - - - mcu_info.h - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_info.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3edcebbf-47d6-4b57-8157-16baa12e9187 - - - mcu_init.c - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_init.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 3edcebbf-47d6-4b57-8157-16baa12e9187 - - - mcu_init.h - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_init.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3edcebbf-47d6-4b57-8157-16baa12e9187 - - - mcu_interrupts.c - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_interrupts.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 3edcebbf-47d6-4b57-8157-16baa12e9187 - - - mcu_interrupts.h - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_interrupts.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3edcebbf-47d6-4b57-8157-16baa12e9187 - - - mcu_locks.c - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_locks.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 3edcebbf-47d6-4b57-8157-16baa12e9187 - - - mcu_locks.h - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_locks.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3edcebbf-47d6-4b57-8157-16baa12e9187 - - - mcu_mapped_interrupts.c - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_mapped_interrupts.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 3edcebbf-47d6-4b57-8157-16baa12e9187 - - - mcu_mapped_interrupts.h - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_mapped_interrupts.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3edcebbf-47d6-4b57-8157-16baa12e9187 - - - mcu_mapped_interrupts_private.h - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_mapped_interrupts_private.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3edcebbf-47d6-4b57-8157-16baa12e9187 - - - mcu_startup.c - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_startup.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 3edcebbf-47d6-4b57-8157-16baa12e9187 - - - mcu_startup.h - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_startup.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 3edcebbf-47d6-4b57-8157-16baa12e9187 - - - register_access - Category - 3edcebbf-47d6-4b57-8157-16baa12e9187 - - - iodefine.h - File - src\smc_gen\r_bsp\mcu\rx65n\register_access\iodefine.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - d9a62f67-1506-40fd-898a-7cf9704918e5 - - - readme.txt - File - src\smc_gen\r_byteq\readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - a87344d3-997f-4494-952d-4361ab01e1f2 - - - r_byteq_if.h - File - src\smc_gen\r_byteq\r_byteq_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - a87344d3-997f-4494-952d-4361ab01e1f2 - - - doc - Category - a87344d3-997f-4494-952d-4361ab01e1f2 - - - ref - Category - a87344d3-997f-4494-952d-4361ab01e1f2 - - - src - Category - a87344d3-997f-4494-952d-4361ab01e1f2 - - - r01an1683jj0160_rx.pdf - File - src\smc_gen\r_byteq\doc\r01an1683jj0160_rx.pdf - 614d3077-dba1-4905-8521-0a548ff7a6ad - - - r_byteq_config_reference.h - File - src\smc_gen\r_byteq\ref\r_byteq_config_reference.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - fb347024-389f-48d7-8c55-3c47f24e6f9c - - - r_byteq.c - File - src\smc_gen\r_byteq\src\r_byteq.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 53cad8f1-fb50-4f38-8546-7b6c4c7b0534 - - - r_byteq_private.h - File - src\smc_gen\r_byteq\src\r_byteq_private.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 53cad8f1-fb50-4f38-8546-7b6c4c7b0534 - - - r_bsp_config.h - File - src\smc_gen\r_config\r_bsp_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 53ccf9fc-3615-4f14-9c38-6db1260d003f - - - r_bsp_config_readme.txt - File - src\smc_gen\r_config\r_bsp_config_readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - 53ccf9fc-3615-4f14-9c38-6db1260d003f - - - r_bsp_interrupt_config.h - File - src\smc_gen\r_config\r_bsp_interrupt_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 53ccf9fc-3615-4f14-9c38-6db1260d003f - - - r_flash_rx_config.h - File - src\smc_gen\r_config\r_flash_rx_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 53ccf9fc-3615-4f14-9c38-6db1260d003f - - - r_byteq_config.h - File - src\smc_gen\r_config\r_byteq_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 53ccf9fc-3615-4f14-9c38-6db1260d003f - - - r_sci_rx_config.h - File - src\smc_gen\r_config\r_sci_rx_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 53ccf9fc-3615-4f14-9c38-6db1260d003f - - - r_s12ad_rx_config.h - File - src\smc_gen\r_config\r_s12ad_rx_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 53ccf9fc-3615-4f14-9c38-6db1260d003f - - - readme.txt - File - src\smc_gen\r_flash_rx\readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - c16bcf00-20dd-4a5e-9fcb-846ee57a9be8 - - - r_flash_rx_if.h - File - src\smc_gen\r_flash_rx\r_flash_rx_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - c16bcf00-20dd-4a5e-9fcb-846ee57a9be8 - - - doc - Category - c16bcf00-20dd-4a5e-9fcb-846ee57a9be8 - - - ref - Category - c16bcf00-20dd-4a5e-9fcb-846ee57a9be8 - - - src - Category - c16bcf00-20dd-4a5e-9fcb-846ee57a9be8 - - - en - Category - b779c420-4405-4b14-a60a-07543a2d9ae4 - - - ja - Category - b779c420-4405-4b14-a60a-07543a2d9ae4 - - - r01an2184eu0330-rx.pdf - File - src\smc_gen\r_flash_rx\doc\en\r01an2184eu0330-rx.pdf - b5546fcf-eada-44e5-bc71-8922dc456e6f - - - r01an2184ju0330-rx.pdf - File - src\smc_gen\r_flash_rx\doc\ja\r01an2184ju0330-rx.pdf - aa249f72-a573-466a-8e0d-c740dd83f354 - - - r_flash_rx_config_reference.h - File - src\smc_gen\r_flash_rx\ref\r_flash_rx_config_reference.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 50988d90-f049-4d6e-b95b-c8496d81925b - - - r_flash_fcu.c - File - src\smc_gen\r_flash_rx\src\r_flash_fcu.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 30b30756-6c7c-411c-b38a-3db7575dc2ed - - - r_flash_fcu.h - File - src\smc_gen\r_flash_rx\src\r_flash_fcu.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 30b30756-6c7c-411c-b38a-3db7575dc2ed - - - r_flash_group.c - File - src\smc_gen\r_flash_rx\src\r_flash_group.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 30b30756-6c7c-411c-b38a-3db7575dc2ed - - - r_flash_group.h - File - src\smc_gen\r_flash_rx\src\r_flash_group.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 30b30756-6c7c-411c-b38a-3db7575dc2ed - - - r_flash_rx.c - File - src\smc_gen\r_flash_rx\src\r_flash_rx.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 30b30756-6c7c-411c-b38a-3db7575dc2ed - - - r_flash_rx.h - File - src\smc_gen\r_flash_rx\src\r_flash_rx.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 30b30756-6c7c-411c-b38a-3db7575dc2ed - - - r_flash_targets.h - File - src\smc_gen\r_flash_rx\src\r_flash_targets.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 30b30756-6c7c-411c-b38a-3db7575dc2ed - - - flash_type_1 - Category - 30b30756-6c7c-411c-b38a-3db7575dc2ed - - - flash_type_2 - Category - 30b30756-6c7c-411c-b38a-3db7575dc2ed - - - flash_type_3 - Category - 30b30756-6c7c-411c-b38a-3db7575dc2ed - - - flash_type_4 - Category - 30b30756-6c7c-411c-b38a-3db7575dc2ed - - - targets - Category - 30b30756-6c7c-411c-b38a-3db7575dc2ed - - - r_codeflash.c - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_codeflash.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 51af1287-bebf-4aa8-9edc-f8fec9cd62ec - - - r_codeflash.h - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_codeflash.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 51af1287-bebf-4aa8-9edc-f8fec9cd62ec - - - r_codeflash_extra.c - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_codeflash_extra.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 51af1287-bebf-4aa8-9edc-f8fec9cd62ec - - - r_codeflash_extra.h - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_codeflash_extra.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 51af1287-bebf-4aa8-9edc-f8fec9cd62ec - - - r_dataflash.c - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_dataflash.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 51af1287-bebf-4aa8-9edc-f8fec9cd62ec - - - r_dataflash.h - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_dataflash.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 51af1287-bebf-4aa8-9edc-f8fec9cd62ec - - - r_flash_common.h - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_flash_common.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 51af1287-bebf-4aa8-9edc-f8fec9cd62ec - - - r_flash_type1.c - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_flash_type1.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 51af1287-bebf-4aa8-9edc-f8fec9cd62ec - - - r_flash_type1_if.h - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_flash_type1_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 51af1287-bebf-4aa8-9edc-f8fec9cd62ec - - - r_flash_utils.c - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_flash_utils.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 51af1287-bebf-4aa8-9edc-f8fec9cd62ec - - - r_flash_type2.c - File - src\smc_gen\r_flash_rx\src\flash_type_2\r_flash_type2.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 5d5fc204-3d66-44c9-b0ce-e37fec716e24 - - - r_flash_type2_if.h - File - src\smc_gen\r_flash_rx\src\flash_type_2\r_flash_type2_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 5d5fc204-3d66-44c9-b0ce-e37fec716e24 - - - r_flash_type3.c - File - src\smc_gen\r_flash_rx\src\flash_type_3\r_flash_type3.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 1a3403a5-9c57-4e7d-adbb-0f5d14b2d1a5 - - - r_flash_type3_if.h - File - src\smc_gen\r_flash_rx\src\flash_type_3\r_flash_type3_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 1a3403a5-9c57-4e7d-adbb-0f5d14b2d1a5 - - - r_flash_type4.c - File - src\smc_gen\r_flash_rx\src\flash_type_4\r_flash_type4.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ccc12463-58cf-4698-b95a-073b0cb40093 - - - r_flash_type4_if.h - File - src\smc_gen\r_flash_rx\src\flash_type_4\r_flash_type4_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ccc12463-58cf-4698-b95a-073b0cb40093 - - - rx65n - Category - bde5de2d-af00-43c9-8bc2-970f245eec92 - - - r_flash_rx65n.h - File - src\smc_gen\r_flash_rx\src\targets\rx65n\r_flash_rx65n.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - b5579183-5998-4cbc-ad25-7429a3fd31e2 - - - r_mcu_config_reference.h - File - src\smc_gen\r_flash_rx\src\targets\rx65n\r_mcu_config_reference.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - b5579183-5998-4cbc-ad25-7429a3fd31e2 - - - Pin.c - File - src\smc_gen\r_pincfg\Pin.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 20b0caa5-c1ab-4d29-8f8a-194ef3879a50 - - - Pin.h - File - src\smc_gen\r_pincfg\Pin.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 20b0caa5-c1ab-4d29-8f8a-194ef3879a50 - - - r_pinset.h - File - src\smc_gen\r_pincfg\r_pinset.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 20b0caa5-c1ab-4d29-8f8a-194ef3879a50 - - - r_sci_rx_pinset.c - File - src\smc_gen\r_pincfg\r_sci_rx_pinset.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 20b0caa5-c1ab-4d29-8f8a-194ef3879a50 - - - r_sci_rx_pinset.h - File - src\smc_gen\r_pincfg\r_sci_rx_pinset.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 20b0caa5-c1ab-4d29-8f8a-194ef3879a50 - - - readme.txt - File - src\smc_gen\r_sci_rx\readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - d09310da-f89b-44d1-8c6d-4829784b7f7a - - - r_sci_rx_if.h - File - src\smc_gen\r_sci_rx\r_sci_rx_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - d09310da-f89b-44d1-8c6d-4829784b7f7a - - - doc - Category - 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InternalRom - 4292870144 - 4294967295 - 0 - 8 - True - False - None - Little - Same - Yes - No - Yes - 500 - Yes - Yes - No - 500 - HardwareBreak - No - No - No - No - - No - - 261584 - Trace - Free - Branch - Branch - Cpu - DonotOutput - TraceMemory_01MB - No - 2147483647 - No - DivisionBy_1 - No - 1200000 - No - ExternalCoverageCpuExecution - 4 - 4290772992 - 2147483647 - 2147483647 - 2147483647 - No - False - RisingEdge - False - RisingEdge - False - 1 - False - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - - - 90536345-15c8-40cb-957c-e59974e4bf78 - - - - - C:\Renesas\AmazonFreeRTOS\amazon-freertos-1.2.2\demos\renesas\rx65n-tb-uart-sx-ulpgn\ccrx-csplus - C:\Program Files (x86)\Renesas Electronics\SmartConfigurator\RX\eclipse\SmartConfigurator.exe - 93298d6c-d5d0-4e48-8856-76e602249073 - aws_demos.scfg - - - - - 7d577131-4ec1-4e88-968d-89381f6c178a - - - - - 1.1 - - - False - False - False - True - Yes - Nanosecond - False - False - False - False - False - True - FilesNotToAnalyze - 0 - All - 0 - False - %ProjectName%.mtfl - %ProjectName%.mtvl - 10 - - - RealtimeSampling - - Synchronized - AtProgramStop - 20 - 1000000 - LineChart - False - PaleGreen - PaleTurquoise - 40ff0a4f - 405be416 - 40056def - 40ff541c - False - Auto - Channel01 - 0 - Rising - 0 - Orange - 10 - None - - - - - - - - - - - - - - - - - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - c0ff0a4f - c05be416 - c0056dff - c0ff541c - c04fc1ff - c0a932ff - c0ffd91c - c0ff30a5 - c0bee02f - c05510ff - c0ff97e4 - c0913a37 - c0c68e15 - c0317f0c - c060493e - c072808e - - - - - 8.01.00.00 - - - \ No newline at end of file diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/aws_demos.scfg b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/aws_demos.scfg deleted file mode 100644 index d2da9f230e2..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/aws_demos.scfg +++ /dev/null @@ -1,666 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/aws_demos_build_path_check.bat b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/aws_demos_build_path_check.bat deleted file mode 100644 index 70ff37d5d85..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/aws_demos_build_path_check.bat +++ /dev/null @@ -1,11 +0,0 @@ -@echo off -rem ################################################################################ -rem # This batch file executes some preprocess for build -rem ################################################################################ - -if not exist "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" ( - echo ERROR: Unable to find "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" - exit 2 -) - -"%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" %* diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/aws_demos_link_order_import.mtls b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/aws_demos_link_order_import.mtls deleted file mode 100644 index 9357335e700..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/aws_demos_link_order_import.mtls +++ /dev/null @@ -1,159 +0,0 @@ -port_asm.obj -aws_demo_runner.obj -aws_dev_mode_key_provisioning.obj -aws_greengrass_discovery_demo.obj -aws_hello_world.obj -aws_logging_task_dynamic_buffers.obj -aws_ota_update_demo.obj -aws_shadow_lightbulb_on_off.obj -aws_subscribe_publish_loop.obj -aws_tcp_echo_client_separate_tasks.obj -aws_tcp_echo_client_single_task.obj -main.obj -event_groups.obj -list.obj -heap_4.obj -port.obj -queue.obj -stream_buffer.obj -tasks.obj -timers.obj -aws_bufferpool_static_thread_safe.obj -aws_crypto.obj -aws_greengrass_discovery.obj -aws_helper_secure_connect.obj -aws_mqtt_agent.obj -aws_mqtt_lib.obj -aws_ota_agent.obj -aws_ota_cbor.obj -aws_ota_pal.obj -aws_pkcs11_mbedtls.obj -aws_pkcs11_pal.obj -aws_secure_sockets.obj -aws_shadow.obj -aws_shadow_json.obj -aws_tls.obj -aws_system_init.obj -aws_wifi.obj -jsmn.obj -aes.obj -aesni.obj -arc4.obj -asn1parse.obj -asn1write.obj -base64.obj -bignum.obj -blowfish.obj -camellia.obj -ccm.obj -certs.obj -cipher.obj -cipher_wrap.obj -cmac.obj -ctr_drbg.obj -debug.obj -des.obj -dhm.obj -ecdh.obj -ecdsa.obj -ecjpake.obj -ecp.obj -ecp_curves.obj -entropy.obj -entropy_poll.obj -error.obj -gcm.obj -havege.obj -hmac_drbg.obj -md.obj -md2.obj -md4.obj -md5.obj -md_wrap.obj -memory_buffer_alloc.obj -net_sockets.obj -oid.obj -padlock.obj -pem.obj -pk.obj -pk_wrap.obj -pkcs12.obj -pkcs5.obj -pkparse.obj -pkwrite.obj -platform.obj -platform_util.obj -ripemd160.obj -rsa.obj -rsa_internal.obj -sha1.obj -sha256.obj -sha512.obj -ssl_cache.obj -ssl_ciphersuites.obj -ssl_cli.obj -ssl_cookie.obj -ssl_srv.obj -ssl_ticket.obj -ssl_tls.obj -threading.obj -timing.obj -version.obj -version_features.obj -x509.obj -x509_create.obj -x509_crl.obj -x509_crt.obj -x509_csr.obj -x509write_crt.obj -x509write_csr.obj -xtea.obj -cborencoder.obj -cborencoder_close_container_checked.obj -cborerrorstrings.obj -cborparser.obj -cborparser_dup_string.obj -cborpretty.obj -dbsct.obj -lowlvl.obj -lowsrc.obj -resetprg.obj -sbrk.obj -r_bsp_hwsetup_reference.obj -clkconf.obj -vecttbl.obj -r_bsp_common.obj -cpu.obj -locking.obj -mcu_clocks.obj -mcu_init.obj -mcu_interrupts.obj -mcu_locks.obj -mcu_mapped_interrupts.obj -mcu_startup.obj -r_byteq.obj -r_codeflash.obj -r_codeflash_extra.obj -r_dataflash.obj -r_flash_type1.obj -r_flash_utils.obj -r_flash_type2.obj -r_flash_type3.obj -r_flash_type4.obj -r_flash_fcu.obj -r_flash_group.obj -r_flash_rx.obj -r_sci_rx.obj -r_sci_rx65n.obj -r_sci_rx65n_data.obj -exit.obj -entropy_hardware_poll.obj -freertos_start.obj -sx_ulpgn_driver.obj -serial_term_uart.obj -r_cg_hardware_setup.obj -r_smc_cgc.obj -r_smc_cgc_user.obj -r_smc_interrupt.obj -Pin.obj -r_sci_rx_pinset.obj diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/attention!.txt b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/attention!.txt deleted file mode 100644 index b03e86e3868..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/attention!.txt +++ /dev/null @@ -1,30 +0,0 @@ -Please note that the following folders in the project window of IDEs are -so called 'linked' folders. - --------------------------------------------- -Linked folders in the project window of IDEs --------------------------------------------- - -src/FIT_modified_code/r_bsp -src/FIT_modified_code/r_byteq -src/FIT_modified_code/r_cmt_rx -src/FIT_modified_code/r_flash_rx -src/FIT_modified_code/r_riic_rx -src/FIT_modified_code/r_sci_iic_rx -src/FIT_modified_code/r_sci_rx -src/amazon_freertos_common - ----------------------------------------------------------- -Folders on the File System of the WINDOWS Operating System ----------------------------------------------------------- - -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_bsp -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_byteq -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_cmt_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_flash_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_riic_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_iic_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/amazon_freertos_common - -[EOF] diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/UNUSED_generated_code/.placeholder b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/UNUSED_generated_code/.placeholder deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_cg_hardware_setup.c b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_cg_hardware_setup.c deleted file mode 100644 index b725d4b7027..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_cg_hardware_setup.c +++ /dev/null @@ -1,96 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_hardware_setup.c -* Version : 1.2.3 -* Device(s) : R5F565NEDxFP -* Description : Initialization file for code generation configurations. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -#include "r_smc_cgc.h" -#include "r_smc_interrupt.h" -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -void r_undefined_exception(void); -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: r_undefined_exception -* Description : This function is undefined interrupt service routine -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void r_undefined_exception(void) -{ - /* Start user code for r_undefined_exception. Do not edit comment generated here */ - /* End user code. Do not edit comment generated here */ -} - -/*********************************************************************************************************************** -* Function Name: R_Systeminit -* Description : This function initializes every configuration -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Systeminit(void) -{ - /* Enable writing to registers related to operating modes, LPC, CGC and software reset */ - SYSTEM.PRCR.WORD = 0xA50BU; - - /* Enable writing to MPC pin function control registers */ - MPC.PWPR.BIT.B0WI = 0U; - MPC.PWPR.BIT.PFSWE = 1U; - - /* Initialize clocks settings */ - R_CGC_Create(); - - /* Register undefined interrupt */ - R_BSP_InterruptWrite(BSP_INT_SRC_UNDEFINED_INTERRUPT,(bsp_int_cb_t)r_undefined_exception); - - /* Disable writing to MPC pin function control registers */ - MPC.PWPR.BIT.PFSWE = 0U; - MPC.PWPR.BIT.B0WI = 1U; - - /* Enable protection */ - SYSTEM.PRCR.WORD = 0xA500U; -} - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_cg_macrodriver.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_cg_macrodriver.h deleted file mode 100644 index d8b6581fffb..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_cg_macrodriver.h +++ /dev/null @@ -1,82 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_macrodriver.h -* Version : 1.2.3 -* Device(s) : R5F565NEDxFP -* Description : Macro header file for code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef MACRODRIVER_H -#define MACRODRIVER_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "platform.h" -#include "r_smc_interrupt.h" -#include - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -#ifndef __TYPEDEF__ - -/* Status list definition */ -#define MD_STATUSBASE (0x00U) -#define MD_OK (MD_STATUSBASE + 0x00U) /* register setting OK */ -#define MD_SPT (MD_STATUSBASE + 0x01U) /* IIC stop */ -#define MD_NACK (MD_STATUSBASE + 0x02U) /* IIC no ACK */ -#define MD_BUSY1 (MD_STATUSBASE + 0x03U) /* busy 1 */ -#define MD_BUSY2 (MD_STATUSBASE + 0x04U) /* busy 2 */ - -/* Error list definition */ -#define MD_ERRORBASE (0x80U) -#define MD_ERROR (MD_ERRORBASE + 0x00U) /* error */ -#define MD_ARGERROR (MD_ERRORBASE + 0x01U) /* error argument input error */ -#define MD_ERROR1 (MD_ERRORBASE + 0x02U) /* error 1 */ -#define MD_ERROR2 (MD_ERRORBASE + 0x03U) /* error 2 */ -#define MD_ERROR3 (MD_ERRORBASE + 0x04U) /* error 3 */ -#define MD_ERROR4 (MD_ERRORBASE + 0x05U) /* error 4 */ -#define MD_ERROR5 (MD_ERRORBASE + 0x06U) /* error 5 */ - -#endif - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -#ifndef __TYPEDEF__ - typedef unsigned short MD_STATUS; - #define __TYPEDEF__ -#endif - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Systeminit(void); -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_cg_userdefine.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_cg_userdefine.h deleted file mode 100644 index fd38beed71a..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_cg_userdefine.h +++ /dev/null @@ -1,61 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_userdefine.h -* Version : 1.2.3 -* Device(s) : R5F565NEDxFP -* Description : User header file for code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef CG_USER_DEF_H -#define CG_USER_DEF_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ -/* Start user code for register. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* Start user code for macro define. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -/* Start user code for type define. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_smc_cgc.c b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_smc_cgc.c deleted file mode 100644 index 32aac4fb8d7..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_smc_cgc.c +++ /dev/null @@ -1,45 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc.c -* Version : 1.2.0 -* Device(s) : R5F565NEDxFP -* Description : This file implements cgc setting -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -#include "r_smc_cgc.h" -#include "platform.h" - -/*********************************************************************************************************************** -* Function Name: R_CGC_Create -* Description : This function Used to initializes the clock generator -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_CGC_Create(void) -{ - - R_CGC_Create_UserInit(); -} diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_smc_cgc.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_smc_cgc.h deleted file mode 100644 index 2cd4c48584a..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_smc_cgc.h +++ /dev/null @@ -1,217 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc.h -* Version : 1.2.0 -* Device(s) : R5F565NEDxFP -* Description : This file implements cgc setting. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_CGC_H -#define SMC_CGC_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ -/* - System Clock Control Register (SCKCR) -*/ -/* Peripheral Module Clock D (PCLKD) */ -#define _00000000_CGC_PCLKD_DIV_1 (0x00000000UL) /* x1 */ -#define _00000001_CGC_PCLKD_DIV_2 (0x00000001UL) /* x1/2 */ -#define _00000002_CGC_PCLKD_DIV_4 (0x00000002UL) /* x1/4 */ -#define _00000003_CGC_PCLKD_DIV_8 (0x00000003UL) /* x1/8 */ -#define _00000004_CGC_PCLKD_DIV_16 (0x00000004UL) /* x1/16 */ -#define _00000005_CGC_PCLKD_DIV_32 (0x00000005UL) /* x1/32 */ -#define _00000006_CGC_PCLKD_DIV_64 (0x00000006UL) /* x1/64 */ -/* Peripheral Module Clock C (PCLKC) */ -#define _00000000_CGC_PCLKC_DIV_1 (0x00000000UL) /* x1 */ -#define _00000010_CGC_PCLKC_DIV_2 (0x00000010UL) /* x1/2 */ -#define _00000020_CGC_PCLKC_DIV_4 (0x00000020UL) /* x1/4 */ -#define _00000030_CGC_PCLKC_DIV_8 (0x00000030UL) /* x1/8 */ -#define _00000040_CGC_PCLKC_DIV_16 (0x00000040UL) /* x1/16 */ -#define _00000050_CGC_PCLKC_DIV_32 (0x00000050UL) /* x1/32 */ -#define _00000060_CGC_PCLKC_DIV_64 (0x00000060UL) /* x1/64 */ -/* Peripheral Module Clock B (PCLKB) */ -#define _00000000_CGC_PCLKB_DIV_1 (0x00000000UL) /* x1 */ -#define _00000100_CGC_PCLKB_DIV_2 (0x00000100UL) /* x1/2 */ -#define _00000200_CGC_PCLKB_DIV_4 (0x00000200UL) /* x1/4 */ -#define _00000300_CGC_PCLKB_DIV_8 (0x00000300UL) /* x1/8 */ -#define _00000400_CGC_PCLKB_DIV_16 (0x00000400UL) /* x1/16 */ -#define _00000500_CGC_PCLKB_DIV_32 (0x00000500UL) /* x1/32 */ -#define _00000600_CGC_PCLKB_DIV_64 (0x00000600UL) /* x1/64 */ -/* Peripheral Module Clock A (PCLKA) */ -#define _00000000_CGC_PCLKA_DIV_1 (0x00000000UL) /* x1 */ -#define _00001000_CGC_PCLKA_DIV_2 (0x00001000UL) /* x1/2 */ -#define _00002000_CGC_PCLKA_DIV_4 (0x00002000UL) /* x1/4 */ -#define _00003000_CGC_PCLKA_DIV_8 (0x00003000UL) /* x1/8 */ -#define _00004000_CGC_PCLKA_DIV_16 (0x00004000UL) /* x1/16 */ -#define _00005000_CGC_PCLKA_DIV_32 (0x00005000UL) /* x1/32 */ -#define _00006000_CGC_PCLKA_DIV_64 (0x00006000UL) /* x1/64 */ -/* External Bus Clock (BCLK) */ -#define _00000000_CGC_BCLK_DIV_1 (0x00000000UL) /* x1 */ -#define _00010000_CGC_BCLK_DIV_2 (0x00010000UL) /* x1/2 */ -#define _00020000_CGC_BCLK_DIV_4 (0x00020000UL) /* x1/4 */ -#define _00030000_CGC_BCLK_DIV_8 (0x00030000UL) /* x1/8 */ -#define _00040000_CGC_BCLK_DIV_16 (0x00040000UL) /* x1/16 */ -#define _00050000_CGC_BCLK_DIV_32 (0x00050000UL) /* x1/32 */ -#define _00060000_CGC_BCLK_DIV_64 (0x00060000UL) /* x1/64 */ -/* System Clock (ICLK) */ -#define _00000000_CGC_ICLK_DIV_1 (0x00000000UL) /* x1 */ -#define _01000000_CGC_ICLK_DIV_2 (0x01000000UL) /* x1/2 */ -#define _02000000_CGC_ICLK_DIV_4 (0x02000000UL) /* x1/4 */ -#define _03000000_CGC_ICLK_DIV_8 (0x03000000UL) /* x1/8 */ -#define _04000000_CGC_ICLK_DIV_16 (0x04000000UL) /* x1/16 */ -#define _05000000_CGC_ICLK_DIV_32 (0x05000000UL) /* x1/32 */ -#define _06000000_CGC_ICLK_DIV_64 (0x06000000UL) /* x1/64 */ -/* System Clock (FCLK) */ -#define _00000000_CGC_FCLK_DIV_1 (0x00000000UL) /* x1 */ -#define _10000000_CGC_FCLK_DIV_2 (0x10000000UL) /* x1/2 */ -#define _20000000_CGC_FCLK_DIV_4 (0x20000000UL) /* x1/4 */ -#define _30000000_CGC_FCLK_DIV_8 (0x30000000UL) /* x1/8 */ -#define _40000000_CGC_FCLK_DIV_16 (0x40000000UL) /* x1/16 */ -#define _50000000_CGC_FCLK_DIV_32 (0x50000000UL) /* x1/32 */ -#define _60000000_CGC_FCLK_DIV_64 (0x60000000UL) /* x1/64 */ - -/* - System Clock Control Register 2 (SCKCR2) -*/ -#define _0010_CGC_UCLK_DIV_1 (0x0010U) /* x1/2 */ -#define _0020_CGC_UCLK_DIV_3 (0x0020U) /* x1/3 */ -#define _0030_CGC_UCLK_DIV_4 (0x0030U) /* x1/4 */ -#define _0040_CGC_UCLK_DIV_5 (0x0040U) /* x1/5 */ -#define _0001_SCKCR2_BIT0 (0x0001U) /* RESERVE BIT0 */ - -/* - System Clock Control Register 3 (SCKCR3) -*/ -#define _0000_CGC_CLOCKSOURCE_LOCO (0x0000U) /* LOCO */ -#define _0100_CGC_CLOCKSOURCE_HOCO (0x0100U) /* HOCO */ -#define _0200_CGC_CLOCKSOURCE_MAINCLK (0x0200U) /* Main clock oscillator */ -#define _0300_CGC_CLOCKSOURCE_SUBCLK (0x0300U) /* Sub-clock oscillator */ -#define _0400_CGC_CLOCKSOURCE_PLL (0x0400U) /* PLL circuit */ - -/* - PLL Control Register (PLLCR) -*/ -/* PLL Input Frequency Division Ratio Select (PLIDIV[1:0]) */ -#define _0000_CGC_PLL_FREQ_DIV_1 (0x0000U) /* x1 */ -#define _0001_CGC_PLL_FREQ_DIV_2 (0x0001U) /* x1/2 */ -#define _0002_CGC_PLL_FREQ_DIV_3 (0x0002U) /* x1/3 */ -/* PLL Clock Source Select (PLLSRCSEL) */ -#define _0000_CGC_PLL_SOURCE_MAIN (0x0000U) /* Main clock oscillator */ -#define _0010_CGC_PLL_SOURCE_HOCO (0x0010U) /* HOCO */ -/* Frequency Multiplication Factor Select (STC[5:0]) */ -#define _1300_CGC_PLL_FREQ_MUL_10_0 (0x1300U) /* x10.0 */ -#define _1400_CGC_PLL_FREQ_MUL_10_5 (0x1400U) /* x10.5 */ -#define _1500_CGC_PLL_FREQ_MUL_11_0 (0x1500U) /* x11.0 */ -#define _1600_CGC_PLL_FREQ_MUL_11_5 (0x1600U) /* x11.5 */ -#define _1700_CGC_PLL_FREQ_MUL_12_0 (0x1700U) /* x12.0 */ -#define _1800_CGC_PLL_FREQ_MUL_12_5 (0x1800U) /* x12.5 */ -#define _1900_CGC_PLL_FREQ_MUL_13_0 (0x1900U) /* x13.0 */ -#define _1A00_CGC_PLL_FREQ_MUL_13_5 (0x1A00U) /* x13.5 */ -#define _1B00_CGC_PLL_FREQ_MUL_14_0 (0x1B00U) /* x14.0 */ -#define _1C00_CGC_PLL_FREQ_MUL_14_5 (0x1C00U) /* x14.5 */ -#define _1D00_CGC_PLL_FREQ_MUL_15_0 (0x1D00U) /* x15.0 */ -#define _1E00_CGC_PLL_FREQ_MUL_15_5 (0x1E00U) /* x15.5 */ -#define _1F00_CGC_PLL_FREQ_MUL_16_0 (0x1F00U) /* x16.0 */ -#define _2000_CGC_PLL_FREQ_MUL_16_5 (0x2000U) /* x16.5 */ -#define _2100_CGC_PLL_FREQ_MUL_17_0 (0x2100U) /* x17.0 */ -#define _2200_CGC_PLL_FREQ_MUL_17_5 (0x2200U) /* x17.5 */ -#define _2300_CGC_PLL_FREQ_MUL_18_0 (0x2300U) /* x18.0 */ -#define _2400_CGC_PLL_FREQ_MUL_18_5 (0x2400U) /* x18.5 */ -#define _2500_CGC_PLL_FREQ_MUL_19_0 (0x2500U) /* x19.0 */ -#define _2600_CGC_PLL_FREQ_MUL_19_5 (0x2600U) /* x19.5 */ -#define _2700_CGC_PLL_FREQ_MUL_20_0 (0x2700U) /* x20.0 */ -#define _2800_CGC_PLL_FREQ_MUL_20_5 (0x2800U) /* x20.5 */ -#define _2900_CGC_PLL_FREQ_MUL_21_0 (0x2900U) /* x21.0 */ -#define _2A00_CGC_PLL_FREQ_MUL_21_5 (0x2A00U) /* x21.5 */ -#define _2B00_CGC_PLL_FREQ_MUL_22_0 (0x2B00U) /* x22.0 */ -#define _2C00_CGC_PLL_FREQ_MUL_22_5 (0x2C00U) /* x22.5 */ -#define _2D00_CGC_PLL_FREQ_MUL_23_0 (0x2D00U) /* x23.0 */ -#define _2E00_CGC_PLL_FREQ_MUL_23_5 (0x2E00U) /* x23.5 */ -#define _2F00_CGC_PLL_FREQ_MUL_24_0 (0x2F00U) /* x24.0 */ -#define _3000_CGC_PLL_FREQ_MUL_24_5 (0x3000U) /* x24.5 */ -#define _3100_CGC_PLL_FREQ_MUL_25_0 (0x3100U) /* x25.0 */ -#define _3200_CGC_PLL_FREQ_MUL_25_5 (0x3200U) /* x25.5 */ -#define _3300_CGC_PLL_FREQ_MUL_26_0 (0x3300U) /* x26.0 */ -#define _3400_CGC_PLL_FREQ_MUL_26_5 (0x3400U) /* x26.5 */ -#define _3500_CGC_PLL_FREQ_MUL_27_0 (0x3500U) /* x27.0 */ -#define _3600_CGC_PLL_FREQ_MUL_27_5 (0x3600U) /* x27.5 */ -#define _3700_CGC_PLL_FREQ_MUL_28_0 (0x3700U) /* x28.0 */ -#define _3800_CGC_PLL_FREQ_MUL_28_5 (0x3800U) /* x28.5 */ -#define _3900_CGC_PLL_FREQ_MUL_29_0 (0x3900U) /* x29.0 */ -#define _3A00_CGC_PLL_FREQ_MUL_29_5 (0x3A00U) /* x29.5 */ -#define _3B00_CGC_PLL_FREQ_MUL_30_0 (0x3B00U) /* x30.0 */ - -/* - Oscillation Stop Detection Control Register (OSTDCR) -*/ -/* Oscillation Stop Detection Interrupt Enable (OSTDIE) */ -#define _00_CGC_OSC_STOP_INT_DISABLE (0x00U) /* The oscillation stop detection interrupt is disabled */ -#define _01_CGC_OSC_STOP_INT_ENABLE (0x01U) /* The oscillation stop detection interrupt is enabled */ -/* Oscillation Stop Detection Function Enable (OSTDE) */ -#define _00_CGC_OSC_STOP_DISABLE (0x00U) /* Oscillation stop detection function is disabled */ -#define _80_CGC_OSC_STOP_ENABLE (0x80U) /* Oscillation stop detection function is enabled */ - -/* - High-Speed On-Chip Oscillator Control Register 2 (HOCOCR2) -*/ -/* HOCO Frequency Setting (HCFRQ[1:0]) */ -#define _00_CGC_HOCO_CLK_16 (0x00U) /* 16 MHz */ -#define _01_CGC_HOCO_CLK_18 (0x01U) /* 18 MHz */ -#define _02_CGC_HOCO_CLK_20 (0x02U) /* 20 MHz */ - -/* - Main Clock Oscillator Forced Oscillation Control Register (MOFCR) -*/ -/* Main Oscillator Drive Capability 2 Switching (MODRV2[1:0]) */ -#define _00_CGC_MAINOSC_UNDER24M (0x00U) /* 20.1 to 24 MHz */ -#define _10_CGC_MAINOSC_UNDER20M (0x10U) /* 16.1 to 20 MHz */ -#define _20_CGC_MAINOSC_UNDER16M (0x20U) /* 8.1 to 16 MHz */ -#define _30_CGC_MAINOSC_EQUATE8M (0x30U) /* 8 MHz */ -/* Main Clock Oscillator Switch (MOSEL) */ -#define _00_CGC_MAINOSC_RESONATOR (0x00U) /* Resonator */ -#define _40_CGC_MAINOSC_EXTERNAL (0x40U) /* External oscillator input */ - -/* - RTC Control Register 4 (RCR4) -*/ -/* Count source select */ -#define _00_RTC_SOURCE_SELECT_SUB (0x00U) /* Select sub-clock oscillator */ -#define _01_RTC_SOURCE_SELECT_MAIN_FORCED (0x01U) /* Select main clock oscillator */ -#define _53_CGC_MOSCWTCR_VALUE (0x53U) /* Main Clock Oscillator Wait Time */ -#define _21_CGC_SOSCWTCR_VALUE (0x21U) /* Sub-Clock Oscillator Wait Time */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_CGC_Create(void); -void R_CGC_Create_UserInit(); -#endif diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_smc_cgc_user.c b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_smc_cgc_user.c deleted file mode 100644 index 24e8d8298f5..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_smc_cgc_user.c +++ /dev/null @@ -1,64 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc_user.c -* Version : 1.2.0 -* Device(s) : R5F565NEDxFP -* Description : None -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -/* Start user code for include. Do not edit comment generated here */ -#include "r_smc_cgc.h" -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: R_CGC_Create_UserInit -* Description : This function adds user code after initializing CGC -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_CGC_Create_UserInit(void) -{ - /* Start user code for code init. Do not edit comment generated here */ - /* End user code. Do not edit comment generated here */ -} - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_smc_entry.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_smc_entry.h deleted file mode 100644 index eb12c57a7b8..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_smc_entry.h +++ /dev/null @@ -1,54 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_entry.h -* Version : 1.2.3 -* Device(s) : R5F565NEDxFP -* Description : SMC platform header file. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_ENTRY_H -#define SMC_ENTRY_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_smc_interrupt.c b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_smc_interrupt.c deleted file mode 100644 index 5bbd3a04486..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_smc_interrupt.c +++ /dev/null @@ -1,44 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_interrupt.c -* Version : 1.1.0 -* Device(s) : R5F565NEDxFP -* Description : This file implements interrupt setting -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_smc_interrupt.h" -#include "platform.h" - -/*********************************************************************************************************************** -* Function Name: R_Interrupt_Create -* Description : This function Used to set the fast interrupt or group interrupt -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Interrupt_Create(void) -{ - /* No fast interrupt and group settings have been configured in the Interrupts tab. */ -} - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_smc_interrupt.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_smc_interrupt.h deleted file mode 100644 index b4d31a6c65f..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/general/r_smc_interrupt.h +++ /dev/null @@ -1,292 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_interrupt.h -* Version : 1.1.0 -* Device(s) : R5F565NEDxFP -* Description : This file implements interrupt setting. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_INTERRUPT_H -#define SMC_INTERRUPT_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/* Priority level of interrupt source. - * These macro definitions are used to set the IPR register directly - */ -#define _00_ICU_PRIORITY_LEVEL0 (0x00U) /* Level 0 (disabled) */ -#define _01_ICU_PRIORITY_LEVEL1 (0x01U) /* Level 1 */ -#define _02_ICU_PRIORITY_LEVEL2 (0x02U) /* Level 2 */ -#define _03_ICU_PRIORITY_LEVEL3 (0x03U) /* Level 3 */ -#define _04_ICU_PRIORITY_LEVEL4 (0x04U) /* Level 4 */ -#define _05_ICU_PRIORITY_LEVEL5 (0x05U) /* Level 5 */ -#define _06_ICU_PRIORITY_LEVEL6 (0x06U) /* Level 6 */ -#define _07_ICU_PRIORITY_LEVEL7 (0x07U) /* Level 7 */ -#define _08_ICU_PRIORITY_LEVEL8 (0x08U) /* Level 8 */ -#define _09_ICU_PRIORITY_LEVEL9 (0x09U) /* Level 9 */ -#define _0A_ICU_PRIORITY_LEVEL10 (0x0AU) /* Level 10 */ -#define _0B_ICU_PRIORITY_LEVEL11 (0x0BU) /* Level 11 */ -#define _0C_ICU_PRIORITY_LEVEL12 (0x0CU) /* Level 12 */ -#define _0D_ICU_PRIORITY_LEVEL13 (0x0DU) /* Level 13 */ -#define _0E_ICU_PRIORITY_LEVEL14 (0x0EU) /* Level 14 */ -#define _0F_ICU_PRIORITY_LEVEL15 (0x0FU) /* Level 15 */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -#define FAST_INTERRUPT_VECTOR (0) - -/* The macro definitions below list the full set of priority levels as selected in the Interrupts tab - * Please do not modify this file manually - */ -#define ICU_BSC_BUSERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RAM_RAMERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_FCU_FIFERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_FCU_FRDYI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_SWINT2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_SWINT_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT0_CMI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT1_CMI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_CMWI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_CMWI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_D0FIFO0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_D1FIFO0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI0_SPRI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI0_SPTI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI1_SPRI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI1_SPTI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_QSPI_SPRI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_QSPI_SPTI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SDHI_SBFAI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MMCIF_MBFAI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC1_RXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC1_TXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC0_RXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC0_TXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC2_RXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC2_TXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI0_RXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI0_TXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI1_RXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI1_TXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI2_RXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI2_TXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ13_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ14_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ15_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI3_RXI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI3_TXI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI4_RXI4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI4_TXI4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI5_RXI5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI5_TXI5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI6_RXI6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI6_TXI6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_LVD1_LVD1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_LVD2_LVD2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_USBR0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_ALM_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_PRD_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_IWDT_IWUNI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_WDT_WUNI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PDC_PCDFI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI7_RXI7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI7_TXI7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI8_RXI8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI8_TXI8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI9_RXI9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI9_TXI9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI10_RXI10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI10_TXI10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBE0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI2_SPRI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI2_SPTI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPAL0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPAL1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI11_RXI11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI11_TXI11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI12_RXI12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI12_TXI12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC0I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC1I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC2I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC3I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC74I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_OST_OSTDI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EXDMAC_EXDMAC0I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EXDMAC_EXDMAC1I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT2_CMI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT3_CMI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0C_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0D_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TCI0V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TGI1B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TCI1V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TCI1U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TGI2A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TGI2B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TCI2V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TCI2U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TGI1A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3C_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_CMIA0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_CMIB0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_OVI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_CMIA1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_CMIB1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_OVI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_CMIA2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_CMIB2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_OVI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_CMIA3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_CMIB3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_OVI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3D_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TCI3V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TGI4A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TGI4B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TCI4V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TCI4U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TGI5A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TGI5B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TCI5V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TCI5U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_IC0I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_IC1I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_OC0I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_OC1I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_IC0I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_IC1I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_OC0I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_OC1I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_CUP_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_RXF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_TXF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_RXM0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_TXM0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_RXF1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_TXF1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_RXM1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_TXM1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_USBI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12ADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12GBADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12GCADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12ADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12GBADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12GCADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB192_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ELC_ELSR18I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ELC_ELSR19I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_PROC_BUSY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_ROMOK_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_LONG_PLG_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_TEST_BUSY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_WRRDY0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_WRRDY1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_WRRDY4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_RDRDY0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_RDRDY1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_INTEGRATE_WRRDY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_INTEGRATE_RDRDY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB206_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB207_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TGIA1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIA0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIB0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIC0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGID0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TCIV0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIE0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TGIB1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TCIV1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TCIU1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TGIA2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TGIB2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TCIV2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TCIU2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIA3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIB3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIC3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGID3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TCIV3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIA4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIB4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIC4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGID4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TCIV4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIU5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIV5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIW5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIA6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIB6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIC6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGID6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TCIV6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIA7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIB7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIC7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGID7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TCIV7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIA8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIB8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIC8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGID8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TCIV8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA251_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA252_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA253_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA254_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA255_PRIORITY _0F_ICU_PRIORITY_LEVEL15 - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Interrupt_Create(void); -#endif diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_config/r_bsp_config.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_config/r_bsp_config.h deleted file mode 100644 index 44597ffea37..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_config/r_bsp_config.h +++ /dev/null @@ -1,637 +0,0 @@ -/* Generated configuration header file - do not edit */ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_config_reference.h -* Device(s) : RX65N -* Description : The file r_bsp_config.h is used to configure your BSP. r_bsp_config.h should be included -* somewhere in your package so that the r_bsp code has access to it. This file (r_bsp_config_reference.h) -* is just a reference file that the user can use to make their own r_bsp_config.h file. -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 15.05.2017 1.00 First Release -* : 01.12.2017 1.01 Added the following macro definition. -* - BSP_CFG_EBMAPCR_1ST_PRIORITY -* - BSP_CFG_EBMAPCR_2ND_PRIORITY -* - BSP_CFG_EBMAPCR_3RD_PRIORITY -* - BSP_CFG_EBMAPCR_4TH_PRIORITY -* - BSP_CFG_EBMAPCR_5TH_PRIORITY -* : 01.07.2018 1.02 Added the following macro definition. -* - BSP_CFG_CONFIGURATOR_SELECT -* Add RTOS support. FreeRTOS. Define a timer for RTOS. -* : 27.07.2018 1.03 Modified the comment of PLL clock source. -* Added the following macro definition for ID code protection. -* - BSP_CFG_ID_CODE_LONG_1 -* - BSP_CFG_ID_CODE_LONG_2 -* - BSP_CFG_ID_CODE_LONG_3 -* - BSP_CFG_ID_CODE_LONG_4 -* Added the following macro definition. -* - BSP_CFG_FIT_IPL_MAX -* : xx.xx.xxxx 1.04 Added support for GNUC and ICCRX. -***********************************************************************************************************************/ -#ifndef R_BSP_CONFIG_REF_HEADER_FILE -#define R_BSP_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* NOTE: - The default settings are the same as when using RSKRX65N-2MB. - Change to the settings for the user board. -*/ - -/* Start up select - 0 = Enable BSP startup program. - 1 = Disable BSP startup program. (e.g. Using user startup program.) -*/ -#define BSP_CFG_STARTUP_DISABLE (0) - -/* Enter the product part number for your MCU. This information will be used to obtain information about your MCU such - as package and memory size. - To help parse this information, the part number will be defined using multiple macros. - R 5 F 56 5N E D D FP - | | | | | | | | | Macro Name Description - | | | | | | | | |__BSP_CFG_MCU_PART_PACKAGE = Package type, number of pins, and pin pitch - | | | | | | | |____not used = Products with wide temperature range - | | | | | | |______BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED = Encryption module included/not included - | | | | | |________BSP_CFG_MCU_PART_MEMORY_SIZE = ROM, RAM, and Data Flash Capacity - | | | | |___________BSP_CFG_MCU_PART_GROUP = Group name - | | | |______________BSP_CFG_MCU_PART_SERIES = Series name - | | |________________BSP_CFG_MCU_PART_MEMORY_TYPE = Type of memory (Flash, ROMless) - | |__________________not used = Renesas MCU - |____________________not used = Renesas semiconductor product. - */ - -/* Package type. Set the macro definition based on values below: - Character(s) = Value for macro = Package Type/Number of Pins/Pin Pitch - FC = 0x0 = LFQFP/176/0.50 - BG = 0x1 = LFBGA/176/0.80 - LC = 0x2 = TFLGA/177/0.50 - FB = 0x3 = LFQFP/144/0.50 - LK = 0x4 = TFLGA/145/0.50 - FP = 0x5 = LFQFP/100/0.50 - LJ = 0xA = TFLGA/100/0.65 -*/ -#define BSP_CFG_MCU_PART_PACKAGE (0x5) // <-- Updated by GUI. Do not edit this value manually - -/* Whether Encryption and SDHI/SDSI are included or not. - Character(s) = Value for macro = Description - A = false = Encryption module not included, SDHI/SDSI module not included - B = false = Encryption module not included, SDHI/SDSI module included - D = false = Encryption module not included, SDHI/SDSI module included, dual-bank structure - E = true = Encryption module included, SDHI/SDSI module not included - F = true = Encryption module included, SDHI/SDSI module included - H = true = Encryption module included, SDHI/SDSI module included, dual-bank structure -*/ -#define BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED (false) // <-- Updated by GUI. Do not edit this value manually - -/* ROM, RAM, and Data Flash Capacity. - Character(s) = Value for macro = ROM Size/Ram Size/Data Flash Size - 4 = 0x4 = 512KB/256KB/Not equipped - 7 = 0x7 = 768KB/256KB/Not equipped - 9 = 0x9 = 1MB/256KB/Not equipped - C = 0xC = 1.5MB/640KB/32KB - E = 0xE = 2MB/640KB/32KB - NOTE: When the RAM capacity is 640KB, the RAM areas are not contiguous. -*/ -#define BSP_CFG_MCU_PART_MEMORY_SIZE (0xE) // <-- Updated by GUI. Do not edit this value manually - -/* Group name. - Character(s) = Value for macro = Description - 5N/51 = 0x0 = RX65N Group/RX651 Group -*/ -#define BSP_CFG_MCU_PART_GROUP (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Series name. - Character(s) = Value for macro = Description - 56 = 0x0 = RX600 Series -*/ -#define BSP_CFG_MCU_PART_SERIES (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Memory type. - Character(s) = Value for macro = Description - F = 0x0 = Flash memory version -*/ -#define BSP_CFG_MCU_PART_MEMORY_TYPE (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Whether to use 1 stack or 2. RX MCUs have the ability to use 2 stacks: an interrupt stack and a user stack. - * When using 2 stacks the user stack will be used during normal user code. When an interrupt occurs the CPU - * will automatically shift to using the interrupt stack. Having 2 stacks can make it easier to figure out how - * much stack space to allocate since the user does not have to worry about always having enough room on the - * user stack for if-and-when an interrupt occurs. Some users will not want 2 stacks though because it is not - * needed in all applications and can lead to wasted RAM (i.e. space in between stacks that is not used). - * If only 1 stack is used then the interrupt stack is the one that will be used. If 1 stack is chosen then - * the user may want to remove the 'SU' section from the linker sections to remove any linker warnings. - * - * 0 = Use 1 stack. Disable user stack. User stack size set below will be ignored. - * 1 = Use 2 stacks. User stack and interrupt stack will both be used. - */ -#define BSP_CFG_USER_STACK_ENABLE (0) - -#if defined(__CCRX__) || defined(__GNUC__) - -/* When using the user startup program, disable the following code. */ -#if (BSP_CFG_STARTUP_DISABLE == 0) - -/* If only 1 stack is chosen using BSP_CFG_USER_STACK_ENABLE then no RAM will be allocated for the user stack. */ -#if (BSP_CFG_USER_STACK_ENABLE == 1) -/* User Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. */ -#define BSP_CFG_USTACK_BYTES (0) -#endif - -/* Interrupt Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. - * If the interrupt stack is the only stack being used then the user will likely want to increase the default size - * below. - */ -#define BSP_CFG_ISTACK_BYTES (0x1000) - -#endif /* BSP_CFG_STARTUP_DISABLE == 0 */ - -/* Heap size in bytes. - To disable the heap you must follow these steps: - 1) Set this macro (BSP_CFG_HEAP_BYTES) to 0. - 2) Set the macro BSP_CFG_IO_LIB_ENABLE to 0. - 3) Disable stdio from being built into the project library. This is done by going into the Renesas RX Toolchain - settings and choosing the Standard Library section. After that choose 'Standard Library' for Category in HEW or - choose 'Contents' in E2Studio. This will present a list of modules that can be included. Uncheck the box for - stdio.h. -*/ -#define BSP_CFG_HEAP_BYTES (0) - -#endif /* defined(__CCRX__) || defined(__GNUC__) */ - -#if defined(__CCRX__) - -/* Initializes C input & output library functions. - 0 = Disable I/O library initialization in resetprg.c. If you are not using stdio then use this value. - 1 = Enable I/O library initialization in resetprg.c. This is default and needed if you are using stdio. */ -#define BSP_CFG_IO_LIB_ENABLE (1) - -#endif /* defined(__CCRX__) */ - -/* If desired the user may redirect the stdio charget() and/or charput() functions to their own respective functions - by enabling below and providing and replacing the my_sw_... function names with the names of their own functions. */ -#define BSP_CFG_USER_CHARGET_ENABLED (0) -#define BSP_CFG_USER_CHARGET_FUNCTION my_sw_charget_function - -#define BSP_CFG_USER_CHARPUT_ENABLED (0) -#define BSP_CFG_USER_CHARPUT_FUNCTION my_sw_charput_function - -/* After reset MCU will operate in Supervisor mode. To switch to User mode, set this macro to '1'. For more information - on the differences between these 2 modes see the CPU >> Processor Mode section of your MCU's hardware manual. - 0 = Stay in Supervisor mode. - 1 = Switch to User mode. -*/ -#define BSP_CFG_RUN_IN_USER_MODE (0) - -/* Set your desired ID code. NOTE, leave at the default (all 0xFF's) if you do not wish to use an ID code. If you set - this value and program it into the MCU then you will need to remember the ID code because the debugger will ask for - it when trying to connect. Note that the E1/E20 will ignore the ID code when programming the MCU during debugging. - If you set this value and then forget it then you can clear the ID code by connecting up in serial boot mode using - FDT. The ID Code is 16 bytes long. The macro below define the ID Code in 4-byte sections. */ -/* Lowest 4-byte section, address 0xFE7F5D50. From MSB to LSB: ID code 4, ID code 3, ID code 2, ID code 1/Control Code. - */ -#define BSP_CFG_ID_CODE_LONG_1 (0xFFFFFFFF) -/* 2nd ID Code section, address 0xFE7F5D54. From MSB to LSB: ID code 8, ID code 7, ID code 6, ID code 5. */ -#define BSP_CFG_ID_CODE_LONG_2 (0xFFFFFFFF) -/* 3rd ID Code section, address 0xFE7F5D58. From MSB to LSB: ID code 12, ID code 11, ID code 10, ID code 9. */ -#define BSP_CFG_ID_CODE_LONG_3 (0xFFFFFFFF) -/* 4th ID Code section, address 0xFE7F5D5C. From MSB to LSB: ID code 16, ID code 15, ID code 14, ID code 13. */ -#define BSP_CFG_ID_CODE_LONG_4 (0xFFFFFFFF) - -/* Clock source select (CKSEL). - 0 = Low Speed On-Chip Oscillator (LOCO) - 1 = High Speed On-Chip Oscillator (HOCO) - 2 = Main Clock Oscillator - 3 = Sub-Clock Oscillator - 4 = PLL Circuit -*/ -#define BSP_CFG_CLOCK_SOURCE (4) // <-- Updated by GUI. Do not edit this value manually - -/* Main clock Oscillator Switching (MOSEL). - 0 = Resonator - 1 = External clock input -*/ -#define BSP_CFG_MAIN_CLOCK_SOURCE (0) // <-- Updated by GUI. Do not edit this value manually - -/* The sub-clock oscillation control for using the RTC. - When '1' is selected, the registers related to RTC are initialized and the sub-clock oscillator is operated. - 0 = The RTC is not to be used. - 1 = The RTC is to be used. -*/ -#define BSP_CFG_RTC_ENABLE (0) // <-- Updated by GUI. Do not edit this value manually - -/* Sub-Clock Oscillator Drive Capacity Control (RTCDV). - 0 = Drive capacity for standard CL. - 1 = Drive capacity for low CL. -*/ -#define BSP_CFG_SOSC_DRV_CAP (0) // <-- Updated by GUI. Do not edit this value manually //standard CL by default - -/* Clock configuration options. - The input clock frequency is specified and then the system clocks are set by specifying the multipliers used. The - multiplier settings are used to set the clock registers in resetprg.c. If a 24MHz clock is used and the - ICLK is 120MHz, PCLKA is 120MHz, PCLKB is 60MHz, PCLKC is 60MHz, PCLKD is 60MHz, FCLK is 60MHz, USB Clock is 48MHz, - and BCLK is 120MHz then the settings would be: - - BSP_CFG_XTAL_HZ = 24000000 - BSP_CFG_PLL_DIV = 1 (no division) - BSP_CFG_PLL_MUL = 10.0 (24MHz x 10.0 = 240MHz) - BSP_CFG_ICK_DIV = 2 : System Clock (ICLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_ICK_DIV) = 120MHz - BSP_CFG_PCKA_DIV = 2 : Peripheral Clock A (PCLKA) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKA_DIV) = 120MHz - BSP_CFG_PCKB_DIV = 4 : Peripheral Clock B (PCLKB) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKB_DIV) = 60MHz - BSP_CFG_PCKC_DIV = 4 : Peripheral Clock C (PCLKC) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKC_DIV) = 60MHz - BSP_CFG_PCKD_DIV = 4 : Peripheral Clock D (PCLKD) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKD_DIV) = 60MHz - BSP_CFG_FCK_DIV = 4 : Flash IF Clock (FCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_FCK_DIV) = 60MHz - BSP_CFG_BCK_DIV = 2 : External Bus Clock (BCK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_BCK_DIV) = 120MHz - BSP_CFG_UCK_DIV = 5 : USB Clock (UCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_UCK_DIV) = 48MHz -*/ - -/* Input clock frequency in Hz (XTAL or EXTAL). */ -#define BSP_CFG_XTAL_HZ (12000000) // <-- Updated by GUI. Do not edit this value manually - -/* The HOCO can operate at several different frequencies. Choose which one using the macro below. - Available frequency settings: - 0 = 16MHz (default) - 1 = 18MHz - 2 = 20MHz -*/ -#define BSP_CFG_HOCO_FREQUENCY (2) // <-- Updated by GUI. Do not edit this value manually - -/* PLL clock source (PLLSRCSEL). Choose which clock source to input to the PLL circuit. - Available clock sources: - 0 = Main clock (default) - 1 = HOCO -*/ -#define BSP_CFG_PLL_SRC (1) // <-- Updated by GUI. Do not edit this value manually - -/* PLL Input Frequency Division Ratio Select (PLIDIV). - Available divisors = /1 (no division), /2, /3 -*/ -#define BSP_CFG_PLL_DIV (1) // <-- Updated by GUI. Do not edit this value manually - -/* PLL Frequency Multiplication Factor Select (STC). - Available multipliers = x10.0 to x30.0 in 0.5 increments (e.g. 10.0, 10.5, 11.0, 11.5, ..., 29.0, 29.5, 30.0) -*/ -#define BSP_CFG_PLL_MUL (12.0) // <-- Updated by GUI. Do not edit this value manually - -/* System Clock Divider (ICK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_ICK_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock A Divider (PCKA). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKA_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock B Divider (PCKB). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKB_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock C Divider (PCKC). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKC_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock D Divider (PCKD). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKD_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* External Bus Clock Divider (BCLK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_BCK_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Flash IF Clock Divider (FCK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_FCK_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* USB Clock Divider Select. - Available divisors = /2, /3, /4, /5 -*/ -#define BSP_CFG_UCK_DIV (5) // <-- Updated by GUI. Do not edit this value manually - -/* Configure BCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency, 2= BCK/2 frequency -*/ -#define BSP_CFG_BCLK_OUTPUT (0) // <-- Updated by GUI. Do not edit this value manually - -/* Configure SDCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency -*/ -#define BSP_CFG_SDCLK_OUTPUT (0) // <-- Updated by GUI. Do not edit this value manually - -/* Main Clock Oscillator Wait Time (MOSCWTCR). - The value of MOSCWTCR register required for correspondence with the waiting time required to secure stable oscillation - by the main clock oscillator is obtained by using the maximum frequency for fLOCO in the formula below. - - BSP_CFG_MOSC_WAIT_TIME > (tMAINOSC * (fLOCO_max) + 16)/32 - (tMAINOSC: main clock oscillation stabilization time; fLOCO_max: maximum frequency for fLOCO) - - If tMAINOSC is 9.98 ms and fLOCO_max is 264 kHz (the period is 1/3.78 us), the formula gives - BSP_CFG_MOSC_WAIT_TIME > (9.98 ms * (264 kHZ) + 16)/32 = 82.83, so set the BSP_CFG_MOSC_WAIT_TIME to 83(53h). - - NOTE: The waiting time is not required when an external clock signal is input for the main clock oscillator. - Set the BSP_CFG_MOSC_WAIT_TIME to 00h. -*/ -#define BSP_CFG_MOSC_WAIT_TIME (0x53) // <-- Updated by GUI. Do not edit this value manually - -/* Sub-Clock Oscillator Wait Time (SOSCWTCR). - The value of SOSCWTCR register required for correspondence with the expected time to secure settling of oscillation - by the sub-clock oscillator is obtained by using the maximum frequency for fLOCO in the formula below. - - BSP_CFG_SOSC_WAIT_TIME > (tSUBOSC * (fLOCO_max) + 16)/16384 - (tSUBOSC: sub-clock oscillation stabilization time; fLOCO_max: maximum frequency for fLOCO) - - If tSUBOSC is 2 s and fLOCO is 264 kHz (the period is 1/3.78 us), the formula gives - BSP_CFG_SOSC_WAIT_TIME > (2 s * (264 kHz) +16)/16384 = 32.22, so set the BSP_CFG_SOSC_WAIT_TIME bits to 33(21h). -*/ -#define BSP_CFG_SOSC_WAIT_TIME (0x21) // <-- Updated by GUI. Do not edit this value manually - -/* ROM Cache Enable Register (ROMCE). - 0 = ROM cache operation disabled. - 1 = ROM cache operation enabled. -*/ -#define BSP_CFG_ROM_CACHE_ENABLE (0) - -/* Configure WDT and IWDT settings. - OFS0 - Option Function Select Register 0 - b31:b29 Reserved When reading, these bits return the value written by the user. The write value should be 1. - b28 WDTRSTIRQS - WDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b27:b26 WDTRPSS - WDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b25:b24 WDTRPES - WDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b23:b20 WDTCKS - WDT Clock Frequency Division Ratio - (1=PCLKB/4, 4=PCLKB/64, 0xF=PCLKB/128, 6=PCLKB/256, - 7=PCLKB/2048, 8=PCLKB/8192) - b19:b18 WDTTOPS - WDT Timeout Period Select (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b17 WDTSTRT - WDT Start Mode Select - (0=auto-start after reset, 1=halt after reset) - b16:b15 Reserved (set to 1) - b14 IWDTSLCSTP - IWDT Sleep Mode Count Stop Control - (0=can't stop count, 1=stop w/some low power modes) - b13 Reserved (set to 1) - b12 IWDTRSTIRQS - IWDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b11:b10 IWDTRPSS - IWDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b9:b8 IWDTRPES - IWDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b7:b4 IWDTCKS - IWDT Clock Frequency Division Ratio - (0=none, 2=/16, 3 = /32, 4=/64, 0xF=/128, 5=/256) - b3:b2 IWDTTOPS - IWDT Timeout Period Select - (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b1 IWDTSTRT - IWDT Start Mode Select - (0=auto-start after reset, 1=halt after reset) - b0 Reserved (set to 1) -*/ -#define BSP_CFG_OFS0_REG_VALUE (0xFFFFFFFF) // <-- Updated by GUI. Do not edit this value manually //Disable by default - -/* Configure whether voltage detection 0 circuit and HOCO are enabled after reset. - OFS1 - Option Function Select Register 1 - b31:b9 Reserved (set to 1) - b8 HOCOEN - Enable/disable HOCO oscillation after a reset (0=enable, 1=disable) - b7:b3 Reserved When reading, these bits return the value written by the user. The write value should be 1. - b2 LVDAS - Voltage Detection 0 circuit start (1=monitoring disabled) - b1:b0 VDSEL - Voltage Detection 0 level select (1=2.94v, 2=2.87v, 3=2.80v) - NOTE: If HOCO oscillation is enabled by OFS1.HOCOEN, HOCO frequency is 16MHz. - BSP_CFG_HOCO_FREQUENCY should be default value. -*/ -#define BSP_CFG_OFS1_REG_VALUE (0xFFFFFFFF) // <-- Updated by GUI. Do not edit this value manually //Disable by default - -/* Trusted memory is facility to prevent the reading of blocks 8 and 9 and blocks 46 and 47 (in dual mode) in - the code flash memory by third party software. This feature is disabled by default. - TMEF - TM Enable Flag Register - b31 Reserved (set to 1) - b30:b28 TMEFDB - Dual-Bank TM Enable - 000: The TM function in the address range from FFEE 0000h to - FFEE FFFFh is enabled in dual mode. - - 111: The TM function in the address range from FFEE 0000h to - FFEE FFFFh is disabled in dual mode. - b27 Reserved (set to 1) - b26:b24 TMEFF - TM Enable - 000: TM function is enabled. - - 111: TM function is disabled. - b23:b0 Reserved (set to 1) - NOTE: If the dual bank function has not been incorporated in a device, - TMEFDB bits [b30:b26] are reserved area. -*/ -#define BSP_CFG_TRUSTED_MODE_FUNCTION (0xFFFFFFFF) //Disable by default - -/* Configure FAW register is used to set the write protection flag and boot area select flag - for setting the flash access window startaddress and flash access window end address. - FAW - Flash Access Window Setting Register - b31 BTFLG - Boot Area Select Flag - 0: FFFF C000h to FFFF DFFFh are used as the boot area - - 1: FFFF E000h to FFFF FFFFh are used as the boot area - b30:b28 Reserved - When reading, these bits return the value written by the user.The write value should be 1. - b27:b16 FAWE - Flash Access Window End Address - Flash access window end address - b15 FSPR - Access Window Protection Flag - 0: With protection (P/E disabled) - - 1: Without protection (P/E enabled) - b14:b12 Reserved - When reading, these bits return the value written by the user.The write value should be 1. - b11:b0 FAWS - Flash Access Window Start Address - Flash access window start address - NOTE: Once 0 is written to this bit, the bit can never be restored to 1. - Therefore, the access window and the BTFLG bit never be set again or the TM function - never be disabled once it has been enabled. - Exercise extra caution when handling the FSPR bit. -*/ -#define BSP_CFG_FAW_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* The ROM code protection register is a function to prohibit reading from or programming to the flash memory - when the flash programmer is used during off-board programming. - ROMCODE - ROM Code Protection Register - b31:b0 ROM Code - 0000 0000h: ROM code protection enabled (ROM code protection 1). - 0000 0001h: ROM code protection enabled (ROM code protection 2). - Other than above: ROM code protection disabled. - Note. The ROMCODE register should be set in 32-bit units. -*/ -#define BSP_CFG_ROMCODE_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* Select the bank mode of dual-bank function of the code flash memory. - 0 = Dual mode. - 1 = Linear mode. - NOTE: If the dual bank function has been incorporated in a device, select the bank mode in this macro. - Default setting of the bank mode is linear mode. - If the dual bank function has not been incorporated in a device, this macro should be 1. -*/ -#define BSP_CFG_CODE_FLASH_BANK_MODE (1) //Linear mode by default - -/* Select the startup bank of the program when dual bank function is in dual mode. - 0 = The address range of bank 1 from FFE00000h to FFEFFFFFh and bank 0 from FFF00000h to FFFFFFFFh. - 1 = The address range of bank 1 from FFF00000h to FFFFFFFFh and bank 0 from FFE00000h to FFEFFFFFh. - NOTE: If the dual bank function has been incorporated in a device, select the start bank in this macro. - Default setting of the start bank is bank0. - If the dual bank function has not been incorporated in a device, this macro should be 0. -*/ -#define BSP_CFG_CODE_FLASH_START_BANK (0) //Bank0 by default - -/* This macro lets other modules no if a RTOS is being used. - 0 = RTOS is not used. - 1 = FreeRTOS is used. - 2 = embOS is used.(This is not available.) - 3 = MicroC_OS is used.(This is not available.) - 4 = RI600V4 or RI600PX is used.(This is not available.) -*/ -/* As of today, we need a workaround to avoid the problem that the Smart Configurator does not have such GUI - yet and the BSP_CFG_RTOS_USED here is set to (0) every time of code generation by the Smart Configurator. - The BSP_CFG_RTOS_USED is set to (1) in the r_bsp.h instead of here so that the setting of here is ignored. -*/ -#if !defined(BSP_CFG_RTOS_USED) || (BSP_CFG_RTOS_USED == 0) -#if defined(BSP_CFG_RTOS_USED) -#undef BSP_CFG_RTOS_USED -#endif -#define BSP_CFG_RTOS_USED (0) // <-- Updated by GUI. Do not edit this value manually -#endif - -/* This macro is used to select which CMT channel used for system timer of RTOS. - * The setting of this macro is only valid if the macro BSP_CFG_RTOS_USED is set to a value other than 0. */ -#if (BSP_CFG_RTOS_USED != 0) -/* Setting value. - * 0 = CMT channel 0 used for system timer of RTOS (recommended to be used for RTOS). - * 1 = CMT channel 1 used for system timer of RTOS. - * 2 = CMT channel 2 used for system timer of RTOS. - * 3 = CMT channel 3 used for system timer of RTOS. - * Others = Invalid. */ -#define BSP_CFG_RTOS_SYSTEM_TIMER (0) -#endif - -/* By default modules will use global locks found in mcu_locks.c. If the user is using a RTOS and would rather use its - locking mechanisms then they can change this macro. - NOTE: If '1' is chosen for this macro then the user must also change the next macro 'BSP_CFG_USER_LOCKING_TYPE'. - 0 = Use default locking (non-RTOS) - 1 = Use user defined locking mechanism. -*/ -#define BSP_CFG_USER_LOCKING_ENABLED (0) - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to redefine the typedef - that is used for the locks. If the user is using a RTOS then they would likely redefine the typedef to be - a semaphore/mutex type of their RTOS. Use the macro below to set the type that will be used for the locks. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_TYPE bsp_lock_t - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to define the functions - that will handle the locking and unlocking. These functions should be defined below. - If BSP_CFG_USER_LOCKING_ENABLED is != 0: - R_BSP_HardwareLock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION(mcu_lock_t hw_index) - R_BSP_HardwareUnlock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION(mcu_lock_t hw_index) - NOTE:With these functions the index into the array holding the global hardware locks is passed as the parameter. - R_BSP_SoftwareLock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - R_BSP_SoftwareUnlock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - NOTE:With these functions the actual address of the lock to use is passed as the parameter. - NOTE: These functions must return a boolean. If lock was obtained or released successfully then return true. Else, - return false. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION my_hw_locking_function -#define BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION my_hw_unlocking_function -#define BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION my_sw_locking_function -#define BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION my_sw_unlocking_function - -/* If the user would like to determine if a warm start reset has occurred, then they may enable one or more of the - * following callback definitions AND provide a call back function name for the respective callback - * function (to be defined by the user). Setting BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED = 1 will result - * in a callback to the user defined my_sw_warmstart_prec_function just prior to the initialization of the C - * runtime environment by resetprg. - * - * Setting BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED = 1 will result in a callback to the user defined - * my_sw_warmstart_postc_function just after the initialization of the C runtime environment by resetprg. - */ -#define BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_PRE_C_FUNCTION my_sw_warmstart_prec_function - -#define BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_POST_C_FUNCTION my_sw_warmstart_postc_function - -/* By default FIT modules will check input parameters to be valid. This is helpful during development but some users - will want to disable this for production code. The reason for this would be to save execution time and code space. - This macro is a global setting for enabling or disabling parameter checking. Each FIT module will also have its - own local macro for this same purpose. By default the local macros will take the global value from here though - they can be overridden. Therefore, the local setting has priority over this global setting. Disabling parameter - checking should only used when inputs are known to be good and the increase in speed or decrease in code space is - needed. - 0 = Global setting for parameter checking is disabled. - 1 = Global setting for parameter checking is enabled (Default). -*/ -#define BSP_CFG_PARAM_CHECKING_ENABLE (1) - -/* The extended bus master has five transfer sources: EDMAC, GLCDC-GRA1 (GLCDC graphics 1 data read), GLCDCGRA2 (GLCDC - graphics 2 data read), DRW2D-TX (DRW2D texture data read), and DRW2D-FB (DRW2D frame buffer data read write and - display list data read). - The default priority order in bsp is below - GLCDC-GRA1 > GLCDC-GRA2 > DRW2D-TX > DRW2D-FB > EDMAC. - Priority can be changed with this macro. - - Extended Bus Master Priority setting - 0 = GLCDC graphics 1 data read - 1 = DRW2D texture data read - 2 = DRW2D frame buffer data read write and display list data read - 3 = GLCDC graphics 2 data read - 4 = EDMAC - - Note : This macro is only available for products with at least 1.5 Mbytes of code flash memory. - Settings other than above are prohibited. - Duplicate priority settings can not be made. -*/ -#define BSP_CFG_EBMAPCR_1ST_PRIORITY (0) /* Extended Bus Master 1st Priority Selection */ -#define BSP_CFG_EBMAPCR_2ND_PRIORITY (3) /* Extended Bus Master 2nd Priority Selection */ -#define BSP_CFG_EBMAPCR_3RD_PRIORITY (1) /* Extended Bus Master 3rd Priority Selection */ -#define BSP_CFG_EBMAPCR_4TH_PRIORITY (2) /* Extended Bus Master 4th Priority Selection */ -#define BSP_CFG_EBMAPCR_5TH_PRIORITY (4) /* Extended Bus Master 5th Priority Selection */ - -/* This macro is used to define the voltage that is supplied to the MCU (Vcc). This macro is defined in millivolts. This - macro does not actually change anything on the MCU. Some FIT modules need this information so it is defined here. */ -#define BSP_CFG_MCU_VCC_MV (3300) // <-- Updated by GUI. Do not edit this value manually - -/* Allow initialization of auto-generated peripheral initialization code by Smart Configurator tool. - When not using the Smart Configurator, set the value of BSP_CFG_CONFIGURATOR_SELECT to 0. - 0 = Disabled (default) - 1 = Smart Configurator initialization code used -*/ -#define BSP_CFG_CONFIGURATOR_SELECT (1) // <-- Updated by GUI. Do not edit this value manually - -/* For some BSP functions, it is necessary to ensure that, while these functions are executing, interrupts from other - FIT modules do not occur. By controlling the IPL, these functions disable interrupts that are at or below the - specified interrupt priority level. - This macro sets the IPL. Range is 0x0 - 0xF. - Please set this macro more than IPR for other FIT module interrupts. - The default value is 0xF (maximum value). - Don't change if there is no special processing with higher priority than all fit modules. -*/ -#define BSP_CFG_FIT_IPL_MAX (0xF) - -/* This macro is used to select which SCI channel used for debug serial terminal. - */ -#define MY_BSP_CFG_SERIAL_TERM_SCI (5) - -/* This macro is used to select which SCI channel used for UART WiFi module. - */ -#define MY_BSP_CFG_UART_WIFI_SCI (0) -#define ULPGN_HSUART1_RTS_PDR PORT2.PDR.BIT.B2 /*PMOD PinNo.4 */ -#define ULPGN_HSUART1_RTS_PODR PORT2.PODR.BIT.B2 /*PMOD PinNo.4 */ -#define MY_BSP_CFG_UART_WIFI_SECOND_SCI (1) -#define ULPGN_RESET_PORT_PDR PORTD.PDR.BIT.B0 /*PMOD PinNo.8 */ -#define ULPGN_RESET_PORT_PODR PORTD.PODR.BIT.B0 /*PMOD PinNo.8 */ - - -#endif /* R_BSP_CONFIG_REF_HEADER_FILE */ - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_config/r_bsp_config_readme.txt b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_config/r_bsp_config_readme.txt deleted file mode 100644 index 6a9002cf4f3..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_config/r_bsp_config_readme.txt +++ /dev/null @@ -1,12 +0,0 @@ -FIT r_config folder -------------------- -The purpose of the r_config folder is to provide one place where the user can store all of their FIT configuration -files. Putting the files in one place makes them easy to find, backup, and put in a version control system. - -FIT Modules are distributed with a reference configuration file. These files end with '_reference.h'. For example, -the reference configuration file for the r_bsp is named r_bsp_config_reference.h. Reference configuration files are -provided so that the user always has a known-good configuration to revert to. When adding a FIT Module to a project the -user should copy this reference configuration file to this folder and remove '_reference' from the filename -(r_bsp_config_reference.h is renamed to r_bsp_config.h). For the r_bsp the reference configuration file can be found in -the 'board' folder for the currently chosen development board. For other FIT Modules the reference configuration file -can be found in the 'ref' folder of the FIT Module. diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_config/r_bsp_interrupt_config.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_config/r_bsp_interrupt_config.h deleted file mode 100644 index 1346f175b23..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_config/r_bsp_interrupt_config.h +++ /dev/null @@ -1,214 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_interrupt_config.h -* Description : This module maps Interrupt A & B interrupts. More information on how this is done is given below. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -* : 15.05.2017 2.00 Changed the name of the following macro definition, because there was a mistake -* in the name of macro definition. -* - From XXX_TPU0_TGI0V to XXX_TPU0_TCI0V. -* - From XXX_TPU1_TGI1V to XXX_TPU1_TCI1V. -* - From XXX_TPU1_TGI1U to XXX_TPU1_TCI1U. -* - From XXX_TPU2_TGI2V to XXX_TPU2_TCI2V. -* - From XXX_TPU2_TGI2U to XXX_TPU2_TCI2U. -* - From XXX_TPU3_TGI3V to XXX_TPU3_TCI3V. -* - From XXX_TPU4_TGI4V to XXX_TPU4_TCI4V. -* - From XXX_TPU4_TGI4U to XXX_TPU4_TCI4U. -* - From XXX_TPU5_TGI5V to XXX_TPU5_TCI5V. -* - From XXX_TPU5_TGI5U to XXX_TPU5_TCI5U. -* - From XXX_MTU0_TGIV0 to XXX_MTU0_TCIV0. -* - From XXX_MTU1_TGIV1 to XXX_MTU1_TCIV1. -* - From XXX_MTU1_TGIU1 to XXX_MTU1_TCIU1. -* - From XXX_MTU2_TGIV2 to XXX_MTU2_TCIV2. -* - From XXX_MTU2_TGIU2 to XXX_MTU2_TCIU2. -* - From XXX_MTU3_TGIV3 to XXX_MTU3_TCIV3. -* - From XXX_MTU4_TGIV4 to XXX_MTU4_TCIV4. -* - From XXX_MTU6_TGIV6 to XXX_MTU6_TCIV6. -* - From XXX_MTU7_TGIV7 to XXX_MTU7_TCIV7. -* - From XXX_MTU8_TGIV8 to XXX_MTU8_TCIV8. -* Added select processing of the following software configurable interrupt source. -* - TSIP_PROC_BUSY -* - TSIP_ROMOK -* - TSIP_LONG_PLG -* - TSIP_TEST_BUSY -* - TSIP_WRRDY0 -* - TSIP_WRRDY1 -* - TSIP_WRRDY4 -* - TSIP_RDRDY0 -* - TSIP_RDRDY1 -* - TSIP_INTEGRATE_WRRDY -* - TSIP_INTEGRATE_RDRDY -***********************************************************************************************************************/ -#ifndef R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE -#define R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/* If you wish to use one of the interrupt below then set the appropriate configuration macro to the vector number you - * wish to use for that interrupt. For example, if you want to use the RTC carry interrupt (CUP) at vector 176 then you - * would do the following: - * - * #define BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP 176 - */ - -/* Interrupt B Sources. - * -Valid vector numbers are 128-207. - * -There are more vector slots for B sources than actual B sources. By default all B sources are mapped. - * -If using the 'TPU1, TGI1A' interrupt it must be vector 144 or 145. It is set to 144 by default. - * -If a peripheral interrupt is going to be used to wake up the MCU from All-Module Clock Stop Mode then it must be - * in a vector between 146 to 157. Peripheral interrupts that can do this are TMR interrupts and the 'USB0, USBI0' - * interrupt. By default the TMR interrupts are chosen since there are 12 of them and there are 12 slots. - */ -#define BSP_MAPPED_INT_CFG_B_VECT_CMT2_CMI2 128 -#define BSP_MAPPED_INT_CFG_B_VECT_CMT3_CMI3 129 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIA0 146 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIB0 147 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_OVI0 148 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIA1 149 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIB1 150 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_OVI1 151 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIA2 152 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIB2 153 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_OVI2 154 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIA3 155 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIB3 156 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_OVI3 157 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0A 130 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0B 131 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0C 132 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0D 133 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TCI0V 134 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1A 144 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1B 135 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1V 136 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1U 137 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2A 138 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2B 139 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2V 140 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2U 141 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3A 142 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3B 143 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3C 145 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3D 158 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TCI3V 159 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4A 160 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4B 161 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4V 162 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4U 163 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5A 164 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5B 165 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5V 166 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5U 167 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC0I0 168 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC1I0 169 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC0I0 170 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC1I0 171 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC0I1 172 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC1I1 173 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC0I1 174 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC1I1 175 -#define BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP 176 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXF0 177 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXF0 178 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXM0 179 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXM0 180 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXF1 181 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXF1 182 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXM1 183 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXM1 184 -#define BSP_MAPPED_INT_CFG_B_VECT_USB0_USBI0 185 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12ADI0 186 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GBADI0 187 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GCADI0 188 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12ADI1 189 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GBADI1 190 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GCADI1 191 -#define BSP_MAPPED_INT_CFG_B_VECT_RNG_RNGEND -#define BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR18I 193 -#define BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR19I 194 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_PROC_BUSY 195 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_ROMOK 196 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_LONG_PLG 197 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_TEST_BUSY 198 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY0 199 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY1 200 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY4 201 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY0 202 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY1 203 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_WRRDY 204 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_RDRDY 205 - -/* Interrupt A Sources. - * -Valid vector numbers are 208-255. - * -There are more A sources than A vector slots. By default none of the GPT interrupts are mapped. - * -If using the 'MTU1, TGI1A' interrupt it must be vector 208 or 209. It is set to 208 by default. - */ -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIA0 209 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIB0 210 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIC0 211 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGID0 212 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TCIV0 213 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIE0 214 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIF0 215 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIA1 208 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIB1 216 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIV1 217 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIU1 218 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIA2 219 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIB2 220 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIV2 221 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIU2 222 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIA3 223 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIB3 224 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIC3 225 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGID3 226 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TCIV3 227 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIA4 228 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIB4 229 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIC4 230 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGID4 231 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TCIV4 232 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIU5 233 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIV5 234 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIW5 235 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIA6 236 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIB6 237 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIC6 238 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGID6 239 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TCIV6 240 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIA7 241 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIB7 242 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIC7 243 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGID7 244 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TCIV7 245 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIA8 246 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIB8 247 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIC8 248 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGID8 249 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TCIV8 250 -#define BSP_MAPPED_INT_CFG_A_VECT_AES_AESRDY -#define BSP_MAPPED_INT_CFG_A_VECT_AES_AESEND - -#endif /* R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE */ - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_config/r_byteq_config.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_config/r_byteq_config.h deleted file mode 100644 index c5b4439ae6f..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_config/r_byteq_config.h +++ /dev/null @@ -1,59 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_byteq_config.h -* Description : Configures the byte queue memory allocation -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 24.07.2013 1.00 Initial Release -* : 11.21.2014 1.20 Removed dependency to BSP -* : 30.09.2015 1.50 Added dependency to BSP -***********************************************************************************************************************/ -#ifndef BYTEQ_CONFIG_H -#define BYTEQ_CONFIG_H - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - Available settings: - BSP_CFG_PARAM_CHECKING_ENABLE: - Utilizes the system default setting - 1: - Includes parameter checking - 0: - Compiles out parameter checking -*/ -#define BYTEQ_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY IF SHOULD USE MALLOC() TO ALLOCATE MEMORY FOR QUEUE CONTROL BLOCKS */ -#define BYTEQ_CFG_USE_HEAP_FOR_CTRL_BLKS (0) - -/* SPECIFY NUMBER OF STATIC QUEUE CONTROL BLOCKS TO SUPPORT */ -/* valid only when BYTEQ_USE_HEAP_FOR_CTRL_BLKS is set to 0 */ -#define BYTEQ_CFG_MAX_CTRL_BLKS (6 + 4) - - -#endif /* BYTEQ_CONFIG_H */ diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_config/r_flash_rx_config.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_config/r_flash_rx_config.h deleted file mode 100644 index fbf916a0e97..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_config/r_flash_rx_config.h +++ /dev/null @@ -1,116 +0,0 @@ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_flash_rx_config_reference.h - * Description : Configures the FLASH API module for RX200 and RX600 Series MCU's. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* 12.04.2014 1.00 First Release -* 22.12.2014 1.10 Added flash type usage comments. -* 25.06.2015 1.20 Added FLASH_CFG_CODE_FLASH_RUN_FROM_ROM. -* : 12.10.2016 2.00 Modified for BSPless operation (added FLASH_CFG_USE_FIT_BSP). -***********************************************************************************************************************/ -#ifndef FLASH_CONFIG_HEADER_FILE -#define FLASH_CONFIG_HEADER_FILE - -/* Set the following value to 0 when building without using the FIT BSP Module */ -#define FLASH_CFG_USE_FIT_BSP (1) - - -/*********************************************************************************************************************** - Configuration Options - ***********************************************************************************************************************/ -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting - * Setting to 1 includes parameter checking; 0 compiles out parameter checking - */ -#define FLASH_CFG_PARAM_CHECKING_ENABLE (1) - - -/****************************************************************************** - ENABLE CODE FLASH PROGRAMMING -******************************************************************************/ -/* If you are only using data flash, set this to 0. - * Setting to 1 includes code to program the ROM area. When programming ROM, - * code must be executed from RAM, except under certain restrictions for flash - * type 3 (see section 2.14 in App Note). See section 2.13 in the App Note for - * details on how to set up code and the linker to execute code from RAM. - */ -#define FLASH_CFG_CODE_FLASH_ENABLE (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING DATA FLASH OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces data flash API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, data flash operations return immediately after the operation has been - * started. Notification of the operation completion is done via the callback - * function. - */ -#define FLASH_CFG_DATA_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING CODE FLASH (ROM) OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces ROM API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, ROM operations return immediately after the operation has been started. - * Notification of the operation completion is done via the callback function. - * When reprogramming ROM, THE RELOCATABLE VECTOR TABLE AND CORRESPONDING - * INTERRUPT ROUTINES MUST BE IN RAM. - * See sections 2.16 Usage Notes in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE CODE FLASH SELF-PROGRAMMING -******************************************************************************/ -/* Set this to 0 when programming code flash while executing in RAM. - * Set this to 1 when programming code flash while executing from another - * segment in ROM (possible only with RX64M, RX71M, RX65N-2 groups). - * See section 2.14 in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_RUN_FROM_ROM (0) - - -/****************************************************************************** - SET IPL OF FLASH READY INTERRUPT -******************************************************************************/ -#define FLASH_CFG_FLASH_READY_IPL (5) // Flash type 2 only - - -/****************************************************************************** - ENABLE OR DISABLE LOCK BIT PROTECTION -******************************************************************************/ -/* Each erasure block has a corresponding lock bit that can be used to - * protect that block from being programmed/erased after the lock bit is - * set. The use of lock bits can be used or ignored. - * Setting this to 1 will cause lock bits to be ignored and programs/erases to a - * block will not be limited. - * Setting this to 0 will cause lock bits to be used as the user configures through - * the Control command. This only applies to ROM as the DF does not have lock bits. - */ -#define FLASH_CFG_IGNORE_LOCK_BITS (1) // Flash type 2 only - - -#endif /* FLASH_CONFIG_HEADER_FILE */ diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_config/r_s12ad_rx_config.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_config/r_s12ad_rx_config.h deleted file mode 100644 index 0202bf133a4..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_config/r_s12ad_rx_config.h +++ /dev/null @@ -1,53 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_s12ad_rx_config.h -* Description : Configures the 12-bit A/D driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 22.07.2013 1.00 Initial Release. -* 21.04.2014 1.20 Updated for RX210 advanced features; RX110/63x support. -***********************************************************************************************************************/ -#ifndef S12AD_CONFIG_H -#define S12AD_CONFIG_H - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* - * SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting. - * Setting to 1 includes parameter checking; 0 compiles out parameter checking. - */ -#define ADC_CFG_PARAM_CHECKING_ENABLE BSP_CFG_PARAM_CHECKING_ENABLE - - -/* - * RX210 Series only; Temperature Sensor Programmable Gain Amplifier (PGA) - * SELECT PGA GAIN TO MATCH AVCC0 VOLTAGE RANGE: - * 0: 1.8V <= AVcc0 < 2.7V; default; good for all actual voltages - * 1: 2.7V <= AVcc0 < 3.6V - * 2: 3.6V <= AVcc0 < 4.5V - * 3: 4.5V <= AVcc0 <= 5.5V - */ -#define ADC_CFG_PGA_GAIN (0) - - -#endif /* S12AD_CONFIG_H */ diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_config/r_sci_rx_config.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_config/r_sci_rx_config.h deleted file mode 100644 index dca437ce842..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_config/r_sci_rx_config.h +++ /dev/null @@ -1,171 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_config.h -* Description : Configures the SCI driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 25.09.2013 1.00 Initial Release -* 17.04.2014 1.20 Added comments for new RX110 support. -* 02.07.2014 1.30 Fixed bug that caused Group12 rx errors to only be enabled for channel 2. -* 25.11.2014 1.40 Added comments for RX113 support -* 30.09.2015 1.70 Added comments for RX23T support -* 01.10.2016 1.80 Added support for RX65N (comments and TX/RX FIFO THRESHOLD options) -* 19.12.2016 1.90 Added comments for RX24U support -* 07.03.2017 2.00 Added comments for RX130-512KB support -***********************************************************************************************************************/ -#ifndef SCI_CONFIG_H -#define SCI_CONFIG_H - -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING */ -/* Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting */ -/* Setting to 1 includes parameter checking; 0 compiles out parameter checking */ -#define SCI_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY WHETHER TO INCLUDE CODE FOR DIFFERENT SCI MODES */ -/* Setting an equate to 1 includes code specific to that mode. */ -#define SCI_CFG_ASYNC_INCLUDED (1) -#define SCI_CFG_SYNC_INCLUDED (0) -#define SCI_CFG_SSPI_INCLUDED (0) - -/* SPECIFY BYTE VALUE TO TRANSMIT WHILE CLOCKING IN DATA IN SSPI MODES */ -#define SCI_CFG_DUMMY_TX_BYTE (0xFF) - -/* SPECIFY CHANNELS TO INCLUDE SOFTWARE SUPPORT FOR 1=included, 0=not */ -/* - * NOTE: If using ASYNC mode, adjust BYTEQ_CFG_MAX_CTRL_BLKS in r_byteq_config.h - * to provide 2 queues per channel (static mode only). - * * = port connector RDKRX63N, RSKRX210, RSKRX11x - * u = channel used by the USB-UART port (G1CUSB0) - * a = this channel is used only for RX130-512KB - * RX MCU supported channels - * - * CH# 110 111 113 130 210 230 231 23T 24T 24U 63N 631 64M 71M 65N - * --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- - * CH0 X Xa X* X X X* X X X X - * CH1 X X* X* Xu X X X Xu Xu Xu X X X X X - * CH2 X X X X X Xu - * CH3 X X X X X - * CH4 X X X X X - * CH5 X X X X X X Xu X X X X X X X X - * CH6 X X X X X X X X X X X X - * CH7 X X Xu Xu X - * CH8 X Xa X X X X X X X - * CH9 X Xa X X X X X X X - * CH10 X X X - * CH11 X X X X - * CH12 X X X X X X X X X X X X -*/ - -#define SCI_CFG_CH0_INCLUDED (1) -#define SCI_CFG_CH1_INCLUDED (1) -#define SCI_CFG_CH2_INCLUDED (0) -#define SCI_CFG_CH3_INCLUDED (0) -#define SCI_CFG_CH4_INCLUDED (0) -#define SCI_CFG_CH5_INCLUDED (1) -#define SCI_CFG_CH6_INCLUDED (0) -#define SCI_CFG_CH7_INCLUDED (0) -#define SCI_CFG_CH8_INCLUDED (0) -#define SCI_CFG_CH9_INCLUDED (0) -#define SCI_CFG_CH10_INCLUDED (0) -#define SCI_CFG_CH11_INCLUDED (0) -#define SCI_CFG_CH12_INCLUDED (0) - -/* SPECIFY ASYNC MODE TX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_TX_BUFSIZ (1460) -#define SCI_CFG_CH1_TX_BUFSIZ (1460) -#define SCI_CFG_CH2_TX_BUFSIZ (80) -#define SCI_CFG_CH3_TX_BUFSIZ (80) -#define SCI_CFG_CH4_TX_BUFSIZ (80) -#define SCI_CFG_CH5_TX_BUFSIZ (80) -#define SCI_CFG_CH6_TX_BUFSIZ (80) -#define SCI_CFG_CH7_TX_BUFSIZ (80) -#define SCI_CFG_CH8_TX_BUFSIZ (80) -#define SCI_CFG_CH9_TX_BUFSIZ (80) -#define SCI_CFG_CH10_TX_BUFSIZ (80) -#define SCI_CFG_CH11_TX_BUFSIZ (80) -#define SCI_CFG_CH12_TX_BUFSIZ (80) - -/* SPECIFY ASYNC MODE RX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_RX_BUFSIZ (4096) -#define SCI_CFG_CH1_RX_BUFSIZ (2048) -#define SCI_CFG_CH2_RX_BUFSIZ (80) -#define SCI_CFG_CH3_RX_BUFSIZ (80) -#define SCI_CFG_CH4_RX_BUFSIZ (80) -#define SCI_CFG_CH5_RX_BUFSIZ (80) -#define SCI_CFG_CH6_RX_BUFSIZ (80) -#define SCI_CFG_CH7_RX_BUFSIZ (80) -#define SCI_CFG_CH8_RX_BUFSIZ (80) -#define SCI_CFG_CH9_RX_BUFSIZ (80) -#define SCI_CFG_CH10_RX_BUFSIZ (80) -#define SCI_CFG_CH11_RX_BUFSIZ (80) -#define SCI_CFG_CH12_RX_BUFSIZ (80) - -/* -* ENABLE TRANSMIT END INTERRUPT (ASYNCHRONOUS) -* This interrupt only occurs when the last bit of the last byte of data -* has been sent and the transmitter has become idle. The interrupt calls -* the user's callback function specified in R_SCI_Open() and passes it an -* SCI_EVT_TEI event. A typical use of this feature is to disable an external -* transceiver to save power. It would then be up to the user's code to -* re-enable the transceiver before sending again. Not including this feature -* reduces code space used by the interrupt. Note that this equate is only -* for including the TEI code. The interrupt itself must be enabled using an -* R_SCI_Control(hdl, SCI_CMD_EN_TEI, NULL) call. -*/ -#define SCI_CFG_TEI_INCLUDED (1) /* 1=included, 0=not */ - -/* -* SET GROUP12 (RECEIVER ERROR) INTERRUPT PRIORITY; RX63N/631 ONLY -* This #define sets the priority level for the interrupt that handles -* receiver overrun, framing, and parity errors for all SCI channels -* on the RX63N/631. It is ignored for all other parts. -*/ -#define SCI_CFG_RXERR_PRIORITY (3) /* (RX63N/631 ONLY) 1 lowest, 15 highest */ - -/* -* SET GROUPBL0 (ERI, TEI) INTERRUPT PRIORITY; RX64M/RX71M/RX65N ONLY -* SET GROUPBL1, GROUPAL0 (ERI,TEI) INTERRUPT PRIORITY; RX65N ONLY -* This sets the priority level for receiver overrun, framing, and parity errors -* as well as TEI interrupts for all SCI channels. -*/ -#define SCI_CFG_ERI_TEI_PRIORITY (3) /* (RX64M/RX71M/RX65N ONLY) 1 lowest, 15 highest */ - -/* ENABLE TX/RX FIFO; (SCIi supported MCU ONLY) 1=included, 0=not */ -#define SCI_CFG_CH10_FIFO_INCLUDED (0) -#define SCI_CFG_CH11_FIFO_INCLUDED (0) - -/* SET TX FIFO THRESHOLD; (SCIi supported MCU ONLY) 0 lowest, 15 highest */ -/* TX FIFO THRESHOLD is invalid in Clock Synchronous Mode and Simple SPI Mode. */ -/* Set the same value for TX FIFO THRESHOLD and RX FIFO THRESHOLD in Clock Synchronous Mode and Simple SPI Mode. */ -#define SCI_CFG_CH10_TX_FIFO_THRESH (8) -#define SCI_CFG_CH11_TX_FIFO_THRESH (8) - -/* SET RX FIFO THRESHOLD; (SCIi supported MCU ONLY) 1 lowest, 15 highest */ -#define SCI_CFG_CH10_RX_FIFO_THRESH (8) -#define SCI_CFG_CH11_RX_FIFO_THRESH (8) - - -#endif /* SCI_CONFIG_H */ diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_pincfg/Pin.c b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_pincfg/Pin.c deleted file mode 100644 index 2b9b79b08e7..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_pincfg/Pin.c +++ /dev/null @@ -1,93 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : Pin.c -* Version : 1.0.2 -* Device(s) : R5F565NEDxFP -* Description : This file implements SMC pin code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -/* Start user code for include. Do not edit comment generated here */ -#include "Pin.h" -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: R_Pins_Create -* Description : This function initializes Smart Configurator pins -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Pins_Create(void) -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set CTS0# pin */ - MPC.P23PFS.BYTE = 0x0BU; - PORT2.PMR.BYTE |= 0x08U; - - /* Set RXD0 pin */ - MPC.P21PFS.BYTE = 0x0AU; - PORT2.PMR.BYTE |= 0x02U; - - /* Set RXD1 pin */ - MPC.P30PFS.BYTE = 0x0AU; - PORT3.PMR.BYTE |= 0x01U; - - /* Set RXD5 pin */ - MPC.PA3PFS.BYTE = 0x0AU; - PORTA.PMR.BYTE |= 0x08U; - - /* Set TXD0 pin */ - PORT2.PODR.BYTE |= 0x01U; - MPC.P20PFS.BYTE = 0x0AU; - PORT2.PDR.BYTE |= 0x01U; - - /* Set TXD1 pin */ - PORT2.PODR.BYTE |= 0x40U; - MPC.P26PFS.BYTE = 0x0AU; - PORT2.PDR.BYTE |= 0x40U; - - /* Set TXD5 pin */ - PORTA.PODR.BYTE |= 0x10U; - MPC.PA4PFS.BYTE = 0x0AU; - PORTA.PDR.BYTE |= 0x10U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_pincfg/Pin.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_pincfg/Pin.h deleted file mode 100644 index 0547e097cff..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_pincfg/Pin.h +++ /dev/null @@ -1,50 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : Pin.h -* Version : 1.0.2 -* Device(s) : R5F565NEDxFP -* Description : This file implements SMC pin code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef PIN_H -#define PIN_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Pins_Create(void); -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_pincfg/r_pinset.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_pincfg/r_pinset.h deleted file mode 100644 index 59bbc3758f8..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_pincfg/r_pinset.h +++ /dev/null @@ -1,34 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_pinset.h.h -* Version : 1.0.1 -* Description : Declares all pin code headers into a single file -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef R_PINSET_H -#define R_PINSET_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_sci_rx_pinset.h" - -#endif /* R_PINSET_H */ diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_pincfg/r_sci_rx_pinset.c b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_pincfg/r_sci_rx_pinset.c deleted file mode 100644 index 63e0a745be2..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_pincfg/r_sci_rx_pinset.c +++ /dev/null @@ -1,104 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_pinset.c -* Version : 1.0.2 -* Device(s) : R5F565NEDxFP -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_sci_rx_pinset.h" -#include "platform.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: R_SCI_PinSet_SCI0 -* Description : This function initializes pins for r_sci_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_SCI_PinSet_SCI0() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set RXD0/SMISO0 pin */ - MPC.P21PFS.BYTE = 0x0AU; - PORT2.PMR.BIT.B1 = 1U; - - /* Set TXD0/SMOSI0 pin */ - MPC.P20PFS.BYTE = 0x0AU; - PORT2.PMR.BIT.B0 = 1U; - - /* Set CTS0#/RTS0#/SS0# pin */ - MPC.P23PFS.BYTE = 0x0BU; - PORT2.PMR.BIT.B3 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - -/*********************************************************************************************************************** -* Function Name: R_SCI_PinSet_SCI1 -* Description : This function initializes pins for r_sci_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_SCI_PinSet_SCI1() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set RXD1/SMISO1 pin */ - MPC.P30PFS.BYTE = 0x0AU; - PORT3.PMR.BIT.B0 = 1U; - - /* Set TXD1/SMOSI1 pin */ - MPC.P26PFS.BYTE = 0x0AU; - PORT2.PMR.BIT.B6 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - -/*********************************************************************************************************************** -* Function Name: R_SCI_PinSet_SCI5 -* Description : This function initializes pins for r_sci_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_SCI_PinSet_SCI5() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set RXD5/SMISO5 pin */ - MPC.PA3PFS.BYTE = 0x0AU; - PORTA.PMR.BIT.B3 = 1U; - - /* Set TXD5/SMOSI5 pin */ - MPC.PA4PFS.BYTE = 0x0AU; - PORTA.PMR.BIT.B4 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_pincfg/r_sci_rx_pinset.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_pincfg/r_sci_rx_pinset.h deleted file mode 100644 index 983b3762c03..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-csplus/src/smc_gen/r_pincfg/r_sci_rx_pinset.h +++ /dev/null @@ -1,43 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_pinset.h -* Version : 1.0.2 -* Device(s) : R5F565NEDxFP -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef R_SCI_RX_H -#define R_SCI_RX_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -void R_SCI_PinSet_SCI0(); -void R_SCI_PinSet_SCI1(); -void R_SCI_PinSet_SCI5(); - -#endif diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.cproject b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.cproject deleted file mode 100644 index e2019c75505..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.cproject +++ /dev/null @@ -1,185 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.gitignore b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.gitignore deleted file mode 100644 index 11e355d8bc7..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.gitignore +++ /dev/null @@ -1,3 +0,0 @@ -/HardwareDebug/ -/.settings/ -/trash/ \ No newline at end of file diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.project b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.project deleted file mode 100644 index a090b16e806..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.project +++ /dev/null @@ -1,481 +0,0 @@ - - - aws_demos - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - application_code - 2 - PARENT-1-PROJECT_LOC/common/application_code - - - config_files - 2 - PARENT-1-PROJECT_LOC/common/config_files - - - lib - 2 - virtual:/virtual - - - application_code/common_demos - 2 - virtual:/virtual - - - lib/aws - 2 - virtual:/virtual - - - lib/third_party - 2 - virtual:/virtual - - - src/FIT_modified_code - 2 - virtual:/virtual - - - src/amazon_freertos_common - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/amazon_freertos_common - - - application_code/common_demos/include - 2 - AWS_IOT_MCU_ROOT/demos/common/include - - - application_code/common_demos/source - 2 - virtual:/virtual - - - lib/aws/FreeRTOS - 2 - AWS_IOT_MCU_ROOT/lib/FreeRTOS - - - lib/aws/bufferpool - 2 - AWS_IOT_MCU_ROOT/lib/bufferpool - - - lib/aws/crypto - 2 - AWS_IOT_MCU_ROOT/lib/crypto - - - lib/aws/greengrass - 2 - AWS_IOT_MCU_ROOT/lib/greengrass - - - lib/aws/include - 2 - AWS_IOT_MCU_ROOT/lib/include - - - lib/aws/mqtt - 2 - AWS_IOT_MCU_ROOT/lib/mqtt - - - lib/aws/pkcs11 - 2 - AWS_IOT_MCU_ROOT/lib/pkcs11/portable/renesas/rx65n-cloud-kit-uart-sx-ulpgn - - - lib/aws/secure_sockets - 2 - AWS_IOT_MCU_ROOT/lib/secure_sockets/portable/renesas/rx65n-cloud-kit-uart-sx-ulpgn - - - lib/aws/shadow - 2 - AWS_IOT_MCU_ROOT/lib/shadow - - - lib/aws/tls - 2 - AWS_IOT_MCU_ROOT/lib/tls - - - lib/aws/utils - 2 - AWS_IOT_MCU_ROOT/lib/utils - - - lib/aws/wifi - 2 - AWS_IOT_MCU_ROOT/lib/wifi/portable/renesas/rx65n-cloud-kit-uart-sx-ulpgn - - - lib/third_party/jsmn - 2 - AWS_IOT_MCU_ROOT/lib/third_party/jsmn - - - lib/third_party/mbedtls - 2 - virtual:/virtual - - - lib/third_party/mcu_vendor - 2 - virtual:/virtual - - - lib/third_party/pkcs11 - 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- - src/FIT_modified_code/r_s12ad_rx - 2 - PARENT-4-PROJECT_LOC/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_s12ad_rx - - - src/FIT_modified_code/r_sci_iic_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_iic_rx - - - src/FIT_modified_code/r_sci_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_rx - - - application_code/common_demos/include/aws_application_version.h - 1 - AWS_IOT_MCU_ROOT/demos/common/include/aws_application_version.h - - - application_code/common_demos/include/aws_clientcredential_keys.h - 1 - AWS_IOT_MCU_ROOT/demos/common/include/aws_clientcredential_keys.h - - - application_code/common_demos/include/aws_dev_mode_key_provisioning.h - 1 - AWS_IOT_MCU_ROOT/demos/common/include/aws_dev_mode_key_provisioning.h - - - application_code/common_demos/source/aws_demo_runner.c - 1 - AWS_IOT_MCU_ROOT/demos/common/demo_runner/aws_demo_runner.c - - - application_code/common_demos/source/aws_dev_mode_key_provisioning.c - 1 - AWS_IOT_MCU_ROOT/demos/common/devmode_key_provisioning/aws_dev_mode_key_provisioning.c - - - application_code/common_demos/source/aws_greengrass_discovery_demo.c - 1 - AWS_IOT_MCU_ROOT/demos/common/greengrass_connectivity/aws_greengrass_discovery_demo.c - - - application_code/common_demos/source/aws_hello_world.c - 1 - AWS_IOT_MCU_ROOT/demos/common/mqtt/aws_hello_world.c - - - application_code/common_demos/source/aws_logging_task_dynamic_buffers.c - 1 - AWS_IOT_MCU_ROOT/demos/common/logging/aws_logging_task_dynamic_buffers.c - - - application_code/common_demos/source/aws_shadow_lightbulb_on_off.c - 1 - AWS_IOT_MCU_ROOT/demos/common/shadow/aws_shadow_lightbulb_on_off.c - - - application_code/common_demos/source/aws_subscribe_publish_loop.c - 1 - AWS_IOT_MCU_ROOT/demos/common/mqtt/aws_subscribe_publish_loop.c - - - application_code/common_demos/source/aws_tcp_echo_client_separate_tasks.c - 1 - AWS_IOT_MCU_ROOT/demos/common/tcp/aws_tcp_echo_client_separate_tasks.c - - - application_code/common_demos/source/aws_tcp_echo_client_single_task.c - 1 - AWS_IOT_MCU_ROOT/demos/common/tcp/aws_tcp_echo_client_single_task.c - - - lib/aws/pkcs11/aws_pkcs11_mbedtls.c - 1 - AWS_IOT_MCU_ROOT/lib/pkcs11/mbedtls/aws_pkcs11_mbedtls.c - - - lib/third_party/mbedtls/include - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mbedtls/include - - - lib/third_party/mbedtls/source - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mbedtls/library - - - lib/third_party/mcu_vendor/renesas - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas - - - - - 1545979743954 - - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-aws_demos_build_path_check_and_make.bat - - - - 1545979743996 - - 10 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false- - - - - 1537786054362 - src - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-attention!.txt - - - - 1536904742727 - src/amazon_freertos_common/compiler_support - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-ccrx - - - - 1545979704268 - src/amazon_freertos_common/network_support - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-uart_sx_ulpgn - - - - 1513514756448 - lib/aws/FreeRTOS/portable - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-Renesas - - - - 1513514757749 - lib/aws/FreeRTOS/portable - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-MemMang - - - - 1513514757807 - lib/aws/FreeRTOS/portable - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-* - - - - 1509693556349 - lib/aws/include/private - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-*.c - - - - 1536905062046 - lib/third_party/mcu_vendor/renesas - 10 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-tools - - - - 1536291011837 - src/FIT_modified_code/r_bsp/board - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-true-all|rx65n|generic_rx65n - - - - 1536291077902 - src/FIT_modified_code/r_bsp/mcu - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-true-all|rx65n - - - - 1513514967899 - lib/aws/FreeRTOS/portable/MemMang - 5 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-heap_4.c - - - - 1513515128489 - lib/aws/FreeRTOS/portable/Renesas - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-RX600v2 - - - - 1539520892012 - src/FIT_modified_code/r_bsp/board/all - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-true-reset_program\.S|iar_call_inits\.s - - - - 1564441856894 - src/FIT_modified_code/r_flash_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx65n - - - - 1535360922766 - src/FIT_modified_code/r_riic_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx65n - - - - 1535360980389 - src/FIT_modified_code/r_sci_iic_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx65n - - - - 1564441820170 - src/FIT_modified_code/r_sci_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx65n - - - - 1537708651935 - src/FIT_modified_code/r_bsp/mcu/rx65n/register_access - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-ccrx - - - - - - AWS_IOT_MCU_ROOT - $%7BPARENT-4-PROJECT_LOC%7D - - - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/CodeGenerator/cgprojectDatas.datas b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/CodeGenerator/cgprojectDatas.datas deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/Dependency_Scan_Preferences.prefs b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/Dependency_Scan_Preferences.prefs deleted file mode 100644 index 52d4e3fd03b..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/Dependency_Scan_Preferences.prefs +++ /dev/null @@ -1,2 +0,0 @@ -DependecyMode=ScanBuildDep -eclipse.preferences.version=1 diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/com.renesas.cdt.managedbuild.renesas.ccrx.prefs b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/com.renesas.cdt.managedbuild.renesas.ccrx.prefs deleted file mode 100644 index e4449c99ff6..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/com.renesas.cdt.managedbuild.renesas.ccrx.prefs +++ /dev/null @@ -1,6 +0,0 @@ -com.renesas.cdt.managedbuild.renesas.ccrx.common.option.checkRtos=unusedRtos -com.renesas.cdt.managedbuild.renesas.ccrx.rtosConfig.option.cfgFilePath=../generate/${ArtifactName}.cfg -com.renesas.cdt.managedbuild.renesas.ccrx.rtosConfig.option.rtosName=None -com.renesas.cdt.managedbuild.renesas.ccrx.rtosConfig.option.rtosPath= -com.renesas.cdt.managedbuild.renesas.ccrx.rtosConfig.option.rtosVersion= -eclipse.preferences.version=1 diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/com.renesas.smc.e2studio.qe.xml b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/com.renesas.smc.e2studio.qe.xml deleted file mode 100644 index ecb5628438f..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/com.renesas.smc.e2studio.qe.xml +++ /dev/null @@ -1,41 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/e2studio_project.prefs b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/e2studio_project.prefs deleted file mode 100644 index b723c881a4e..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/e2studio_project.prefs +++ /dev/null @@ -1,2 +0,0 @@ -# -#Thu Feb 07 11:54:45 JST 2019 diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/fittemp/r_sci_rx.ftl b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/fittemp/r_sci_rx.ftl deleted file mode 100644 index 62879ddbbe9..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/fittemp/r_sci_rx.ftl +++ /dev/null @@ -1,85 +0,0 @@ -<#-- - Copyright(C) 2015 Renesas Electronics Corporation - RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY - This program must be used solely for the purpose for which it was furnished - by Renesas Electronics Corporation. No part of this program may be reproduced - or disclosed to others, in any form, without the prior written permission of - Renesas Electronics Corporation. ---> -<#-- = DECLARE FUNCTION INFORMATION HERE =================== --> -<#-- - (Step 1) Explanation: These variables are necessary information for the function header. - Please fill up or leave blank, but do not delete ---> -<#assign Function_Base_Name = "R_SCI_PinSet"> -<#assign Function_Description = "This function initializes pins for r_sci_rx module"> -<#assign Function_Arg = "none"> -<#assign Function_Ret = "none"> -<#assign Version = 1.00> - -<#-- = DECLARE FUNCTION CONTENT HERE ======================= --> -<#-- - (Step 2) Explanation: Function content. - - Macro [initialsection] : - Any text that goes into this section will be printed out 1 time per function - input [postfix] :Use this variable to add the channel number to the function base name. ---> -<#macro initialsection postfix> -<#assign Function_Name = "${Function_Base_Name}${postfix}"> -<#include "lib/functionheader.ftl"> -void ${Function_Name}() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - -<#-- - (Step 3) Explanation: Function content. - - Macro [peripheralpincode] : Any text that goes into this section will be printed out 1 time per peripheral - - input [pin] : Available info includes: - pin.pinName :The name of pin, eg “SSLA0†- pin.assignedPinName :The pin assigned to, eg “P32†- pin.pinMPC :The port number of assigned pin, eg “P32†has portNume = “3†- pin.portNum :The bit number of the assigned pin, eg “P32†has pinBitNum = “2†- pin.pinBitNum :The value of MPC ---> -<#macro peripheralpincode pin> - - -<#-- - (Step 4) Explanation: Function content. - - Macro [channelpincode] : Any text that goes into this section will be printed out 1 time per channel - - input [pin] : Same as above ---> -<#macro channelpincode pin> - - /* Set ${pin.pinName} pin */ - MPC.${pin.assignedPinName}PFS.BYTE = 0x${pin.pinMPC}U; - PORT${pin.portNum}.PMR.BIT.B${pin.pinBitNum} = 1U; - - -<#macro channelpincodeextra pin postfix> - - -<#-- - (Step 5) Explanation: Function content. - - Macro [endsection] : Any text that goes into this section will be printed out 1 time last ---> -<#macro endsection> - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - - -<#-- - (Step 6) Explanation: Header file content - - Macro [headerfilesection] : Any text that goes into this section will be printed out 1 time in the header file - - input [postfix] :Use this variable to add the channel number to the function base name. ---> -<#macro headerfilesection postfix> -void ${Function_Base_Name}${postfix}(); - - -<#macro headerfilesectionExtra postfix> - - -<#-- = END OF FILE ========================================= --> \ No newline at end of file diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/language.settings.xml b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/language.settings.xml deleted file mode 100644 index 6adefee8b07..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/language.settings.xml +++ /dev/null @@ -1,18 +0,0 @@ - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/renesasPGModel.xml b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/renesasPGModel.xml deleted file mode 100644 index 7c0780cd586..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/.settings/renesasPGModel.xml +++ /dev/null @@ -1,5 +0,0 @@ - - - LITTLE - - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/aws_demos.scfg b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/aws_demos.scfg deleted file mode 100644 index 2d6be853849..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/aws_demos.scfg +++ /dev/null @@ -1,666 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/aws_demos_build_path_check_and_make.bat b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/aws_demos_build_path_check_and_make.bat deleted file mode 100644 index 047f6e34780..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/aws_demos_build_path_check_and_make.bat +++ /dev/null @@ -1,11 +0,0 @@ -@echo off -rem ################################################################################ -rem # This batch file executes some preprocess for build and then executes the make -rem ################################################################################ - -if not exist "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" ( - echo ERROR: Unable to find "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" - exit 2 -) - -"%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" %* diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/rx65n_tb_aws HardwareDebug.launch b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/rx65n_tb_aws HardwareDebug.launch deleted file mode 100644 index d44ebcdefff..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/rx65n_tb_aws HardwareDebug.launch +++ /dev/null @@ -1,156 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/attention!.txt b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/attention!.txt deleted file mode 100644 index b03e86e3868..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/attention!.txt +++ /dev/null @@ -1,30 +0,0 @@ -Please note that the following folders in the project window of IDEs are -so called 'linked' folders. - --------------------------------------------- -Linked folders in the project window of IDEs --------------------------------------------- - -src/FIT_modified_code/r_bsp -src/FIT_modified_code/r_byteq -src/FIT_modified_code/r_cmt_rx -src/FIT_modified_code/r_flash_rx -src/FIT_modified_code/r_riic_rx -src/FIT_modified_code/r_sci_iic_rx -src/FIT_modified_code/r_sci_rx -src/amazon_freertos_common - ----------------------------------------------------------- -Folders on the File System of the WINDOWS Operating System ----------------------------------------------------------- - -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_bsp -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_byteq -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_cmt_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_flash_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_riic_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_iic_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/amazon_freertos_common - -[EOF] diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/UNUSED_generated_code/.placeholder b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/UNUSED_generated_code/.placeholder deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_cg_hardware_setup.c b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_cg_hardware_setup.c deleted file mode 100644 index b725d4b7027..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_cg_hardware_setup.c +++ /dev/null @@ -1,96 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_hardware_setup.c -* Version : 1.2.3 -* Device(s) : R5F565NEDxFP -* Description : Initialization file for code generation configurations. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -#include "r_smc_cgc.h" -#include "r_smc_interrupt.h" -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -void r_undefined_exception(void); -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: r_undefined_exception -* Description : This function is undefined interrupt service routine -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void r_undefined_exception(void) -{ - /* Start user code for r_undefined_exception. Do not edit comment generated here */ - /* End user code. Do not edit comment generated here */ -} - -/*********************************************************************************************************************** -* Function Name: R_Systeminit -* Description : This function initializes every configuration -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Systeminit(void) -{ - /* Enable writing to registers related to operating modes, LPC, CGC and software reset */ - SYSTEM.PRCR.WORD = 0xA50BU; - - /* Enable writing to MPC pin function control registers */ - MPC.PWPR.BIT.B0WI = 0U; - MPC.PWPR.BIT.PFSWE = 1U; - - /* Initialize clocks settings */ - R_CGC_Create(); - - /* Register undefined interrupt */ - R_BSP_InterruptWrite(BSP_INT_SRC_UNDEFINED_INTERRUPT,(bsp_int_cb_t)r_undefined_exception); - - /* Disable writing to MPC pin function control registers */ - MPC.PWPR.BIT.PFSWE = 0U; - MPC.PWPR.BIT.B0WI = 1U; - - /* Enable protection */ - SYSTEM.PRCR.WORD = 0xA500U; -} - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_cg_macrodriver.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_cg_macrodriver.h deleted file mode 100644 index d8b6581fffb..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_cg_macrodriver.h +++ /dev/null @@ -1,82 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_macrodriver.h -* Version : 1.2.3 -* Device(s) : R5F565NEDxFP -* Description : Macro header file for code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef MACRODRIVER_H -#define MACRODRIVER_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "platform.h" -#include "r_smc_interrupt.h" -#include - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -#ifndef __TYPEDEF__ - -/* Status list definition */ -#define MD_STATUSBASE (0x00U) -#define MD_OK (MD_STATUSBASE + 0x00U) /* register setting OK */ -#define MD_SPT (MD_STATUSBASE + 0x01U) /* IIC stop */ -#define MD_NACK (MD_STATUSBASE + 0x02U) /* IIC no ACK */ -#define MD_BUSY1 (MD_STATUSBASE + 0x03U) /* busy 1 */ -#define MD_BUSY2 (MD_STATUSBASE + 0x04U) /* busy 2 */ - -/* Error list definition */ -#define MD_ERRORBASE (0x80U) -#define MD_ERROR (MD_ERRORBASE + 0x00U) /* error */ -#define MD_ARGERROR (MD_ERRORBASE + 0x01U) /* error argument input error */ -#define MD_ERROR1 (MD_ERRORBASE + 0x02U) /* error 1 */ -#define MD_ERROR2 (MD_ERRORBASE + 0x03U) /* error 2 */ -#define MD_ERROR3 (MD_ERRORBASE + 0x04U) /* error 3 */ -#define MD_ERROR4 (MD_ERRORBASE + 0x05U) /* error 4 */ -#define MD_ERROR5 (MD_ERRORBASE + 0x06U) /* error 5 */ - -#endif - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -#ifndef __TYPEDEF__ - typedef unsigned short MD_STATUS; - #define __TYPEDEF__ -#endif - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Systeminit(void); -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_cg_userdefine.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_cg_userdefine.h deleted file mode 100644 index fd38beed71a..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_cg_userdefine.h +++ /dev/null @@ -1,61 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_userdefine.h -* Version : 1.2.3 -* Device(s) : R5F565NEDxFP -* Description : User header file for code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef CG_USER_DEF_H -#define CG_USER_DEF_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ -/* Start user code for register. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* Start user code for macro define. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -/* Start user code for type define. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_smc_cgc.c b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_smc_cgc.c deleted file mode 100644 index 32aac4fb8d7..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_smc_cgc.c +++ /dev/null @@ -1,45 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc.c -* Version : 1.2.0 -* Device(s) : R5F565NEDxFP -* Description : This file implements cgc setting -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -#include "r_smc_cgc.h" -#include "platform.h" - -/*********************************************************************************************************************** -* Function Name: R_CGC_Create -* Description : This function Used to initializes the clock generator -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_CGC_Create(void) -{ - - R_CGC_Create_UserInit(); -} diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_smc_cgc.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_smc_cgc.h deleted file mode 100644 index 2cd4c48584a..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_smc_cgc.h +++ /dev/null @@ -1,217 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc.h -* Version : 1.2.0 -* Device(s) : R5F565NEDxFP -* Description : This file implements cgc setting. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_CGC_H -#define SMC_CGC_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ -/* - System Clock Control Register (SCKCR) -*/ -/* Peripheral Module Clock D (PCLKD) */ -#define _00000000_CGC_PCLKD_DIV_1 (0x00000000UL) /* x1 */ -#define _00000001_CGC_PCLKD_DIV_2 (0x00000001UL) /* x1/2 */ -#define _00000002_CGC_PCLKD_DIV_4 (0x00000002UL) /* x1/4 */ -#define _00000003_CGC_PCLKD_DIV_8 (0x00000003UL) /* x1/8 */ -#define _00000004_CGC_PCLKD_DIV_16 (0x00000004UL) /* x1/16 */ -#define _00000005_CGC_PCLKD_DIV_32 (0x00000005UL) /* x1/32 */ -#define _00000006_CGC_PCLKD_DIV_64 (0x00000006UL) /* x1/64 */ -/* Peripheral Module Clock C (PCLKC) */ -#define _00000000_CGC_PCLKC_DIV_1 (0x00000000UL) /* x1 */ -#define _00000010_CGC_PCLKC_DIV_2 (0x00000010UL) /* x1/2 */ -#define _00000020_CGC_PCLKC_DIV_4 (0x00000020UL) /* x1/4 */ -#define _00000030_CGC_PCLKC_DIV_8 (0x00000030UL) /* x1/8 */ -#define _00000040_CGC_PCLKC_DIV_16 (0x00000040UL) /* x1/16 */ -#define _00000050_CGC_PCLKC_DIV_32 (0x00000050UL) /* x1/32 */ -#define _00000060_CGC_PCLKC_DIV_64 (0x00000060UL) /* x1/64 */ -/* Peripheral Module Clock B (PCLKB) */ -#define _00000000_CGC_PCLKB_DIV_1 (0x00000000UL) /* x1 */ -#define _00000100_CGC_PCLKB_DIV_2 (0x00000100UL) /* x1/2 */ -#define _00000200_CGC_PCLKB_DIV_4 (0x00000200UL) /* x1/4 */ -#define _00000300_CGC_PCLKB_DIV_8 (0x00000300UL) /* x1/8 */ -#define _00000400_CGC_PCLKB_DIV_16 (0x00000400UL) /* x1/16 */ -#define _00000500_CGC_PCLKB_DIV_32 (0x00000500UL) /* x1/32 */ -#define _00000600_CGC_PCLKB_DIV_64 (0x00000600UL) /* x1/64 */ -/* Peripheral Module Clock A (PCLKA) */ -#define _00000000_CGC_PCLKA_DIV_1 (0x00000000UL) /* x1 */ -#define _00001000_CGC_PCLKA_DIV_2 (0x00001000UL) /* x1/2 */ -#define _00002000_CGC_PCLKA_DIV_4 (0x00002000UL) /* x1/4 */ -#define _00003000_CGC_PCLKA_DIV_8 (0x00003000UL) /* x1/8 */ -#define _00004000_CGC_PCLKA_DIV_16 (0x00004000UL) /* x1/16 */ -#define _00005000_CGC_PCLKA_DIV_32 (0x00005000UL) /* x1/32 */ -#define _00006000_CGC_PCLKA_DIV_64 (0x00006000UL) /* x1/64 */ -/* External Bus Clock (BCLK) */ -#define _00000000_CGC_BCLK_DIV_1 (0x00000000UL) /* x1 */ -#define _00010000_CGC_BCLK_DIV_2 (0x00010000UL) /* x1/2 */ -#define _00020000_CGC_BCLK_DIV_4 (0x00020000UL) /* x1/4 */ -#define _00030000_CGC_BCLK_DIV_8 (0x00030000UL) /* x1/8 */ -#define _00040000_CGC_BCLK_DIV_16 (0x00040000UL) /* x1/16 */ -#define _00050000_CGC_BCLK_DIV_32 (0x00050000UL) /* x1/32 */ -#define _00060000_CGC_BCLK_DIV_64 (0x00060000UL) /* x1/64 */ -/* System Clock (ICLK) */ -#define _00000000_CGC_ICLK_DIV_1 (0x00000000UL) /* x1 */ -#define _01000000_CGC_ICLK_DIV_2 (0x01000000UL) /* x1/2 */ -#define _02000000_CGC_ICLK_DIV_4 (0x02000000UL) /* x1/4 */ -#define _03000000_CGC_ICLK_DIV_8 (0x03000000UL) /* x1/8 */ -#define _04000000_CGC_ICLK_DIV_16 (0x04000000UL) /* x1/16 */ -#define _05000000_CGC_ICLK_DIV_32 (0x05000000UL) /* x1/32 */ -#define _06000000_CGC_ICLK_DIV_64 (0x06000000UL) /* x1/64 */ -/* System Clock (FCLK) */ -#define _00000000_CGC_FCLK_DIV_1 (0x00000000UL) /* x1 */ -#define _10000000_CGC_FCLK_DIV_2 (0x10000000UL) /* x1/2 */ -#define _20000000_CGC_FCLK_DIV_4 (0x20000000UL) /* x1/4 */ -#define _30000000_CGC_FCLK_DIV_8 (0x30000000UL) /* x1/8 */ -#define _40000000_CGC_FCLK_DIV_16 (0x40000000UL) /* x1/16 */ -#define _50000000_CGC_FCLK_DIV_32 (0x50000000UL) /* x1/32 */ -#define _60000000_CGC_FCLK_DIV_64 (0x60000000UL) /* x1/64 */ - -/* - System Clock Control Register 2 (SCKCR2) -*/ -#define _0010_CGC_UCLK_DIV_1 (0x0010U) /* x1/2 */ -#define _0020_CGC_UCLK_DIV_3 (0x0020U) /* x1/3 */ -#define _0030_CGC_UCLK_DIV_4 (0x0030U) /* x1/4 */ -#define _0040_CGC_UCLK_DIV_5 (0x0040U) /* x1/5 */ -#define _0001_SCKCR2_BIT0 (0x0001U) /* RESERVE BIT0 */ - -/* - System Clock Control Register 3 (SCKCR3) -*/ -#define _0000_CGC_CLOCKSOURCE_LOCO (0x0000U) /* LOCO */ -#define _0100_CGC_CLOCKSOURCE_HOCO (0x0100U) /* HOCO */ -#define _0200_CGC_CLOCKSOURCE_MAINCLK (0x0200U) /* Main clock oscillator */ -#define _0300_CGC_CLOCKSOURCE_SUBCLK (0x0300U) /* Sub-clock oscillator */ -#define _0400_CGC_CLOCKSOURCE_PLL (0x0400U) /* PLL circuit */ - -/* - PLL Control Register (PLLCR) -*/ -/* PLL Input Frequency Division Ratio Select (PLIDIV[1:0]) */ -#define _0000_CGC_PLL_FREQ_DIV_1 (0x0000U) /* x1 */ -#define _0001_CGC_PLL_FREQ_DIV_2 (0x0001U) /* x1/2 */ -#define _0002_CGC_PLL_FREQ_DIV_3 (0x0002U) /* x1/3 */ -/* PLL Clock Source Select (PLLSRCSEL) */ -#define _0000_CGC_PLL_SOURCE_MAIN (0x0000U) /* Main clock oscillator */ -#define _0010_CGC_PLL_SOURCE_HOCO (0x0010U) /* HOCO */ -/* Frequency Multiplication Factor Select (STC[5:0]) */ -#define _1300_CGC_PLL_FREQ_MUL_10_0 (0x1300U) /* x10.0 */ -#define _1400_CGC_PLL_FREQ_MUL_10_5 (0x1400U) /* x10.5 */ -#define _1500_CGC_PLL_FREQ_MUL_11_0 (0x1500U) /* x11.0 */ -#define _1600_CGC_PLL_FREQ_MUL_11_5 (0x1600U) /* x11.5 */ -#define _1700_CGC_PLL_FREQ_MUL_12_0 (0x1700U) /* x12.0 */ -#define _1800_CGC_PLL_FREQ_MUL_12_5 (0x1800U) /* x12.5 */ -#define _1900_CGC_PLL_FREQ_MUL_13_0 (0x1900U) /* x13.0 */ -#define _1A00_CGC_PLL_FREQ_MUL_13_5 (0x1A00U) /* x13.5 */ -#define _1B00_CGC_PLL_FREQ_MUL_14_0 (0x1B00U) /* x14.0 */ -#define _1C00_CGC_PLL_FREQ_MUL_14_5 (0x1C00U) /* x14.5 */ -#define _1D00_CGC_PLL_FREQ_MUL_15_0 (0x1D00U) /* x15.0 */ -#define _1E00_CGC_PLL_FREQ_MUL_15_5 (0x1E00U) /* x15.5 */ -#define _1F00_CGC_PLL_FREQ_MUL_16_0 (0x1F00U) /* x16.0 */ -#define _2000_CGC_PLL_FREQ_MUL_16_5 (0x2000U) /* x16.5 */ -#define _2100_CGC_PLL_FREQ_MUL_17_0 (0x2100U) /* x17.0 */ -#define _2200_CGC_PLL_FREQ_MUL_17_5 (0x2200U) /* x17.5 */ -#define _2300_CGC_PLL_FREQ_MUL_18_0 (0x2300U) /* x18.0 */ -#define _2400_CGC_PLL_FREQ_MUL_18_5 (0x2400U) /* x18.5 */ -#define _2500_CGC_PLL_FREQ_MUL_19_0 (0x2500U) /* x19.0 */ -#define _2600_CGC_PLL_FREQ_MUL_19_5 (0x2600U) /* x19.5 */ -#define _2700_CGC_PLL_FREQ_MUL_20_0 (0x2700U) /* x20.0 */ -#define _2800_CGC_PLL_FREQ_MUL_20_5 (0x2800U) /* x20.5 */ -#define _2900_CGC_PLL_FREQ_MUL_21_0 (0x2900U) /* x21.0 */ -#define _2A00_CGC_PLL_FREQ_MUL_21_5 (0x2A00U) /* x21.5 */ -#define _2B00_CGC_PLL_FREQ_MUL_22_0 (0x2B00U) /* x22.0 */ -#define _2C00_CGC_PLL_FREQ_MUL_22_5 (0x2C00U) /* x22.5 */ -#define _2D00_CGC_PLL_FREQ_MUL_23_0 (0x2D00U) /* x23.0 */ -#define _2E00_CGC_PLL_FREQ_MUL_23_5 (0x2E00U) /* x23.5 */ -#define _2F00_CGC_PLL_FREQ_MUL_24_0 (0x2F00U) /* x24.0 */ -#define _3000_CGC_PLL_FREQ_MUL_24_5 (0x3000U) /* x24.5 */ -#define _3100_CGC_PLL_FREQ_MUL_25_0 (0x3100U) /* x25.0 */ -#define _3200_CGC_PLL_FREQ_MUL_25_5 (0x3200U) /* x25.5 */ -#define _3300_CGC_PLL_FREQ_MUL_26_0 (0x3300U) /* x26.0 */ -#define _3400_CGC_PLL_FREQ_MUL_26_5 (0x3400U) /* x26.5 */ -#define _3500_CGC_PLL_FREQ_MUL_27_0 (0x3500U) /* x27.0 */ -#define _3600_CGC_PLL_FREQ_MUL_27_5 (0x3600U) /* x27.5 */ -#define _3700_CGC_PLL_FREQ_MUL_28_0 (0x3700U) /* x28.0 */ -#define _3800_CGC_PLL_FREQ_MUL_28_5 (0x3800U) /* x28.5 */ -#define _3900_CGC_PLL_FREQ_MUL_29_0 (0x3900U) /* x29.0 */ -#define _3A00_CGC_PLL_FREQ_MUL_29_5 (0x3A00U) /* x29.5 */ -#define _3B00_CGC_PLL_FREQ_MUL_30_0 (0x3B00U) /* x30.0 */ - -/* - Oscillation Stop Detection Control Register (OSTDCR) -*/ -/* Oscillation Stop Detection Interrupt Enable (OSTDIE) */ -#define _00_CGC_OSC_STOP_INT_DISABLE (0x00U) /* The oscillation stop detection interrupt is disabled */ -#define _01_CGC_OSC_STOP_INT_ENABLE (0x01U) /* The oscillation stop detection interrupt is enabled */ -/* Oscillation Stop Detection Function Enable (OSTDE) */ -#define _00_CGC_OSC_STOP_DISABLE (0x00U) /* Oscillation stop detection function is disabled */ -#define _80_CGC_OSC_STOP_ENABLE (0x80U) /* Oscillation stop detection function is enabled */ - -/* - High-Speed On-Chip Oscillator Control Register 2 (HOCOCR2) -*/ -/* HOCO Frequency Setting (HCFRQ[1:0]) */ -#define _00_CGC_HOCO_CLK_16 (0x00U) /* 16 MHz */ -#define _01_CGC_HOCO_CLK_18 (0x01U) /* 18 MHz */ -#define _02_CGC_HOCO_CLK_20 (0x02U) /* 20 MHz */ - -/* - Main Clock Oscillator Forced Oscillation Control Register (MOFCR) -*/ -/* Main Oscillator Drive Capability 2 Switching (MODRV2[1:0]) */ -#define _00_CGC_MAINOSC_UNDER24M (0x00U) /* 20.1 to 24 MHz */ -#define _10_CGC_MAINOSC_UNDER20M (0x10U) /* 16.1 to 20 MHz */ -#define _20_CGC_MAINOSC_UNDER16M (0x20U) /* 8.1 to 16 MHz */ -#define _30_CGC_MAINOSC_EQUATE8M (0x30U) /* 8 MHz */ -/* Main Clock Oscillator Switch (MOSEL) */ -#define _00_CGC_MAINOSC_RESONATOR (0x00U) /* Resonator */ -#define _40_CGC_MAINOSC_EXTERNAL (0x40U) /* External oscillator input */ - -/* - RTC Control Register 4 (RCR4) -*/ -/* Count source select */ -#define _00_RTC_SOURCE_SELECT_SUB (0x00U) /* Select sub-clock oscillator */ -#define _01_RTC_SOURCE_SELECT_MAIN_FORCED (0x01U) /* Select main clock oscillator */ -#define _53_CGC_MOSCWTCR_VALUE (0x53U) /* Main Clock Oscillator Wait Time */ -#define _21_CGC_SOSCWTCR_VALUE (0x21U) /* Sub-Clock Oscillator Wait Time */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_CGC_Create(void); -void R_CGC_Create_UserInit(); -#endif diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_smc_cgc_user.c b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_smc_cgc_user.c deleted file mode 100644 index 24e8d8298f5..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_smc_cgc_user.c +++ /dev/null @@ -1,64 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc_user.c -* Version : 1.2.0 -* Device(s) : R5F565NEDxFP -* Description : None -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -/* Start user code for include. Do not edit comment generated here */ -#include "r_smc_cgc.h" -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: R_CGC_Create_UserInit -* Description : This function adds user code after initializing CGC -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_CGC_Create_UserInit(void) -{ - /* Start user code for code init. Do not edit comment generated here */ - /* End user code. Do not edit comment generated here */ -} - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_smc_entry.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_smc_entry.h deleted file mode 100644 index eb12c57a7b8..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_smc_entry.h +++ /dev/null @@ -1,54 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_entry.h -* Version : 1.2.3 -* Device(s) : R5F565NEDxFP -* Description : SMC platform header file. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_ENTRY_H -#define SMC_ENTRY_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_smc_interrupt.c b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_smc_interrupt.c deleted file mode 100644 index 5bbd3a04486..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_smc_interrupt.c +++ /dev/null @@ -1,44 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_interrupt.c -* Version : 1.1.0 -* Device(s) : R5F565NEDxFP -* Description : This file implements interrupt setting -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_smc_interrupt.h" -#include "platform.h" - -/*********************************************************************************************************************** -* Function Name: R_Interrupt_Create -* Description : This function Used to set the fast interrupt or group interrupt -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Interrupt_Create(void) -{ - /* No fast interrupt and group settings have been configured in the Interrupts tab. */ -} - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_smc_interrupt.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_smc_interrupt.h deleted file mode 100644 index b4d31a6c65f..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/general/r_smc_interrupt.h +++ /dev/null @@ -1,292 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_interrupt.h -* Version : 1.1.0 -* Device(s) : R5F565NEDxFP -* Description : This file implements interrupt setting. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_INTERRUPT_H -#define SMC_INTERRUPT_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/* Priority level of interrupt source. - * These macro definitions are used to set the IPR register directly - */ -#define _00_ICU_PRIORITY_LEVEL0 (0x00U) /* Level 0 (disabled) */ -#define _01_ICU_PRIORITY_LEVEL1 (0x01U) /* Level 1 */ -#define _02_ICU_PRIORITY_LEVEL2 (0x02U) /* Level 2 */ -#define _03_ICU_PRIORITY_LEVEL3 (0x03U) /* Level 3 */ -#define _04_ICU_PRIORITY_LEVEL4 (0x04U) /* Level 4 */ -#define _05_ICU_PRIORITY_LEVEL5 (0x05U) /* Level 5 */ -#define _06_ICU_PRIORITY_LEVEL6 (0x06U) /* Level 6 */ -#define _07_ICU_PRIORITY_LEVEL7 (0x07U) /* Level 7 */ -#define _08_ICU_PRIORITY_LEVEL8 (0x08U) /* Level 8 */ -#define _09_ICU_PRIORITY_LEVEL9 (0x09U) /* Level 9 */ -#define _0A_ICU_PRIORITY_LEVEL10 (0x0AU) /* Level 10 */ -#define _0B_ICU_PRIORITY_LEVEL11 (0x0BU) /* Level 11 */ -#define _0C_ICU_PRIORITY_LEVEL12 (0x0CU) /* Level 12 */ -#define _0D_ICU_PRIORITY_LEVEL13 (0x0DU) /* Level 13 */ -#define _0E_ICU_PRIORITY_LEVEL14 (0x0EU) /* Level 14 */ -#define _0F_ICU_PRIORITY_LEVEL15 (0x0FU) /* Level 15 */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -#define FAST_INTERRUPT_VECTOR (0) - -/* The macro definitions below list the full set of priority levels as selected in the Interrupts tab - * Please do not modify this file manually - */ -#define ICU_BSC_BUSERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RAM_RAMERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_FCU_FIFERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_FCU_FRDYI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_SWINT2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_SWINT_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT0_CMI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT1_CMI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_CMWI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_CMWI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_D0FIFO0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_D1FIFO0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI0_SPRI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI0_SPTI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI1_SPRI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI1_SPTI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_QSPI_SPRI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_QSPI_SPTI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SDHI_SBFAI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MMCIF_MBFAI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC1_RXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC1_TXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC0_RXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC0_TXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC2_RXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC2_TXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI0_RXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI0_TXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI1_RXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI1_TXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI2_RXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI2_TXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ13_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ14_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ15_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI3_RXI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI3_TXI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI4_RXI4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI4_TXI4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI5_RXI5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI5_TXI5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI6_RXI6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI6_TXI6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_LVD1_LVD1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_LVD2_LVD2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_USBR0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_ALM_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_PRD_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_IWDT_IWUNI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_WDT_WUNI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PDC_PCDFI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI7_RXI7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI7_TXI7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI8_RXI8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI8_TXI8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI9_RXI9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI9_TXI9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI10_RXI10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI10_TXI10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBE0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI2_SPRI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI2_SPTI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPAL0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPAL1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI11_RXI11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI11_TXI11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI12_RXI12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI12_TXI12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC0I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC1I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC2I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC3I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC74I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_OST_OSTDI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EXDMAC_EXDMAC0I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EXDMAC_EXDMAC1I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT2_CMI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT3_CMI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0C_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0D_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TCI0V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TGI1B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TCI1V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TCI1U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TGI2A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TGI2B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TCI2V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TCI2U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TGI1A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3C_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_CMIA0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_CMIB0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_OVI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_CMIA1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_CMIB1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_OVI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_CMIA2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_CMIB2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_OVI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_CMIA3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_CMIB3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_OVI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3D_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TCI3V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TGI4A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TGI4B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TCI4V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TCI4U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TGI5A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TGI5B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TCI5V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TCI5U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_IC0I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_IC1I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_OC0I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_OC1I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_IC0I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_IC1I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_OC0I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_OC1I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_CUP_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_RXF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_TXF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_RXM0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_TXM0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_RXF1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_TXF1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_RXM1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_TXM1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_USBI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12ADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12GBADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12GCADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12ADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12GBADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12GCADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB192_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ELC_ELSR18I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ELC_ELSR19I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_PROC_BUSY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_ROMOK_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_LONG_PLG_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_TEST_BUSY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_WRRDY0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_WRRDY1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_WRRDY4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_RDRDY0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_RDRDY1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_INTEGRATE_WRRDY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_INTEGRATE_RDRDY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB206_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB207_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TGIA1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIA0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIB0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIC0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGID0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TCIV0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIE0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TGIB1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TCIV1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TCIU1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TGIA2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TGIB2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TCIV2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TCIU2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIA3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIB3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIC3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGID3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TCIV3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIA4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIB4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIC4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGID4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TCIV4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIU5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIV5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIW5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIA6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIB6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIC6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGID6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TCIV6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIA7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIB7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIC7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGID7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TCIV7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIA8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIB8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIC8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGID8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TCIV8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA251_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA252_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA253_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA254_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA255_PRIORITY _0F_ICU_PRIORITY_LEVEL15 - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Interrupt_Create(void); -#endif diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_config/r_bsp_config.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_config/r_bsp_config.h deleted file mode 100644 index aa84c072ce5..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_config/r_bsp_config.h +++ /dev/null @@ -1,636 +0,0 @@ -/* Generated configuration header file - do not edit */ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_config_reference.h -* Device(s) : RX65N -* Description : The file r_bsp_config.h is used to configure your BSP. r_bsp_config.h should be included -* somewhere in your package so that the r_bsp code has access to it. This file (r_bsp_config_reference.h) -* is just a reference file that the user can use to make their own r_bsp_config.h file. -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 15.05.2017 1.00 First Release -* : 01.12.2017 1.01 Added the following macro definition. -* - BSP_CFG_EBMAPCR_1ST_PRIORITY -* - BSP_CFG_EBMAPCR_2ND_PRIORITY -* - BSP_CFG_EBMAPCR_3RD_PRIORITY -* - BSP_CFG_EBMAPCR_4TH_PRIORITY -* - BSP_CFG_EBMAPCR_5TH_PRIORITY -* : 01.07.2018 1.02 Added the following macro definition. -* - BSP_CFG_CONFIGURATOR_SELECT -* Add RTOS support. FreeRTOS. Define a timer for RTOS. -* : 27.07.2018 1.03 Modified the comment of PLL clock source. -* Added the following macro definition for ID code protection. -* - BSP_CFG_ID_CODE_LONG_1 -* - BSP_CFG_ID_CODE_LONG_2 -* - BSP_CFG_ID_CODE_LONG_3 -* - BSP_CFG_ID_CODE_LONG_4 -* Added the following macro definition. -* - BSP_CFG_FIT_IPL_MAX -* : xx.xx.xxxx 1.04 Added support for GNUC and ICCRX. -***********************************************************************************************************************/ -#ifndef R_BSP_CONFIG_REF_HEADER_FILE -#define R_BSP_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* NOTE: - The default settings are the same as when using RSKRX65N-2MB. - Change to the settings for the user board. -*/ - -/* Start up select - 0 = Enable BSP startup program. - 1 = Disable BSP startup program. (e.g. Using user startup program.) -*/ -#define BSP_CFG_STARTUP_DISABLE (0) - -/* Enter the product part number for your MCU. This information will be used to obtain information about your MCU such - as package and memory size. - To help parse this information, the part number will be defined using multiple macros. - R 5 F 56 5N E D D FP - | | | | | | | | | Macro Name Description - | | | | | | | | |__BSP_CFG_MCU_PART_PACKAGE = Package type, number of pins, and pin pitch - | | | | | | | |____not used = Products with wide temperature range - | | | | | | |______BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED = Encryption module included/not included - | | | | | |________BSP_CFG_MCU_PART_MEMORY_SIZE = ROM, RAM, and Data Flash Capacity - | | | | |___________BSP_CFG_MCU_PART_GROUP = Group name - | | | |______________BSP_CFG_MCU_PART_SERIES = Series name - | | |________________BSP_CFG_MCU_PART_MEMORY_TYPE = Type of memory (Flash, ROMless) - | |__________________not used = Renesas MCU - |____________________not used = Renesas semiconductor product. - */ - -/* Package type. Set the macro definition based on values below: - Character(s) = Value for macro = Package Type/Number of Pins/Pin Pitch - FC = 0x0 = LFQFP/176/0.50 - BG = 0x1 = LFBGA/176/0.80 - LC = 0x2 = TFLGA/177/0.50 - FB = 0x3 = LFQFP/144/0.50 - LK = 0x4 = TFLGA/145/0.50 - FP = 0x5 = LFQFP/100/0.50 - LJ = 0xA = TFLGA/100/0.65 -*/ -#define BSP_CFG_MCU_PART_PACKAGE (0x5) // <-- Updated by GUI. Do not edit this value manually - -/* Whether Encryption and SDHI/SDSI are included or not. - Character(s) = Value for macro = Description - A = false = Encryption module not included, SDHI/SDSI module not included - B = false = Encryption module not included, SDHI/SDSI module included - D = false = Encryption module not included, SDHI/SDSI module included, dual-bank structure - E = true = Encryption module included, SDHI/SDSI module not included - F = true = Encryption module included, SDHI/SDSI module included - H = true = Encryption module included, SDHI/SDSI module included, dual-bank structure -*/ -#define BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED (false) // <-- Updated by GUI. Do not edit this value manually - -/* ROM, RAM, and Data Flash Capacity. - Character(s) = Value for macro = ROM Size/Ram Size/Data Flash Size - 4 = 0x4 = 512KB/256KB/Not equipped - 7 = 0x7 = 768KB/256KB/Not equipped - 9 = 0x9 = 1MB/256KB/Not equipped - C = 0xC = 1.5MB/640KB/32KB - E = 0xE = 2MB/640KB/32KB - NOTE: When the RAM capacity is 640KB, the RAM areas are not contiguous. -*/ -#define BSP_CFG_MCU_PART_MEMORY_SIZE (0xE) // <-- Updated by GUI. Do not edit this value manually - -/* Group name. - Character(s) = Value for macro = Description - 5N/51 = 0x0 = RX65N Group/RX651 Group -*/ -#define BSP_CFG_MCU_PART_GROUP (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Series name. - Character(s) = Value for macro = Description - 56 = 0x0 = RX600 Series -*/ -#define BSP_CFG_MCU_PART_SERIES (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Memory type. - Character(s) = Value for macro = Description - F = 0x0 = Flash memory version -*/ -#define BSP_CFG_MCU_PART_MEMORY_TYPE (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Whether to use 1 stack or 2. RX MCUs have the ability to use 2 stacks: an interrupt stack and a user stack. - * When using 2 stacks the user stack will be used during normal user code. When an interrupt occurs the CPU - * will automatically shift to using the interrupt stack. Having 2 stacks can make it easier to figure out how - * much stack space to allocate since the user does not have to worry about always having enough room on the - * user stack for if-and-when an interrupt occurs. Some users will not want 2 stacks though because it is not - * needed in all applications and can lead to wasted RAM (i.e. space in between stacks that is not used). - * If only 1 stack is used then the interrupt stack is the one that will be used. If 1 stack is chosen then - * the user may want to remove the 'SU' section from the linker sections to remove any linker warnings. - * - * 0 = Use 1 stack. Disable user stack. User stack size set below will be ignored. - * 1 = Use 2 stacks. User stack and interrupt stack will both be used. - */ -#define BSP_CFG_USER_STACK_ENABLE (0) - -#if defined(__CCRX__) || defined(__GNUC__) - -/* When using the user startup program, disable the following code. */ -#if (BSP_CFG_STARTUP_DISABLE == 0) - -/* If only 1 stack is chosen using BSP_CFG_USER_STACK_ENABLE then no RAM will be allocated for the user stack. */ -#if (BSP_CFG_USER_STACK_ENABLE == 1) -/* User Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. */ -#define BSP_CFG_USTACK_BYTES (0) -#endif - -/* Interrupt Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. - * If the interrupt stack is the only stack being used then the user will likely want to increase the default size - * below. - */ -#define BSP_CFG_ISTACK_BYTES (0x1000) - -#endif /* BSP_CFG_STARTUP_DISABLE == 0 */ - -/* Heap size in bytes. - To disable the heap you must follow these steps: - 1) Set this macro (BSP_CFG_HEAP_BYTES) to 0. - 2) Set the macro BSP_CFG_IO_LIB_ENABLE to 0. - 3) Disable stdio from being built into the project library. This is done by going into the Renesas RX Toolchain - settings and choosing the Standard Library section. After that choose 'Standard Library' for Category in HEW or - choose 'Contents' in E2Studio. This will present a list of modules that can be included. Uncheck the box for - stdio.h. -*/ -#define BSP_CFG_HEAP_BYTES (0) - -#endif /* defined(__CCRX__) || defined(__GNUC__) */ - -#if defined(__CCRX__) - -/* Initializes C input & output library functions. - 0 = Disable I/O library initialization in resetprg.c. If you are not using stdio then use this value. - 1 = Enable I/O library initialization in resetprg.c. This is default and needed if you are using stdio. */ -#define BSP_CFG_IO_LIB_ENABLE (1) - -#endif /* defined(__CCRX__) */ - -/* If desired the user may redirect the stdio charget() and/or charput() functions to their own respective functions - by enabling below and providing and replacing the my_sw_... function names with the names of their own functions. */ -#define BSP_CFG_USER_CHARGET_ENABLED (0) -#define BSP_CFG_USER_CHARGET_FUNCTION my_sw_charget_function - -#define BSP_CFG_USER_CHARPUT_ENABLED (0) -#define BSP_CFG_USER_CHARPUT_FUNCTION my_sw_charput_function - -/* After reset MCU will operate in Supervisor mode. To switch to User mode, set this macro to '1'. For more information - on the differences between these 2 modes see the CPU >> Processor Mode section of your MCU's hardware manual. - 0 = Stay in Supervisor mode. - 1 = Switch to User mode. -*/ -#define BSP_CFG_RUN_IN_USER_MODE (0) - -/* Set your desired ID code. NOTE, leave at the default (all 0xFF's) if you do not wish to use an ID code. If you set - this value and program it into the MCU then you will need to remember the ID code because the debugger will ask for - it when trying to connect. Note that the E1/E20 will ignore the ID code when programming the MCU during debugging. - If you set this value and then forget it then you can clear the ID code by connecting up in serial boot mode using - FDT. The ID Code is 16 bytes long. The macro below define the ID Code in 4-byte sections. */ -/* Lowest 4-byte section, address 0xFE7F5D50. From MSB to LSB: ID code 4, ID code 3, ID code 2, ID code 1/Control Code. - */ -#define BSP_CFG_ID_CODE_LONG_1 (0xFFFFFFFF) -/* 2nd ID Code section, address 0xFE7F5D54. From MSB to LSB: ID code 8, ID code 7, ID code 6, ID code 5. */ -#define BSP_CFG_ID_CODE_LONG_2 (0xFFFFFFFF) -/* 3rd ID Code section, address 0xFE7F5D58. From MSB to LSB: ID code 12, ID code 11, ID code 10, ID code 9. */ -#define BSP_CFG_ID_CODE_LONG_3 (0xFFFFFFFF) -/* 4th ID Code section, address 0xFE7F5D5C. From MSB to LSB: ID code 16, ID code 15, ID code 14, ID code 13. */ -#define BSP_CFG_ID_CODE_LONG_4 (0xFFFFFFFF) - -/* Clock source select (CKSEL). - 0 = Low Speed On-Chip Oscillator (LOCO) - 1 = High Speed On-Chip Oscillator (HOCO) - 2 = Main Clock Oscillator - 3 = Sub-Clock Oscillator - 4 = PLL Circuit -*/ -#define BSP_CFG_CLOCK_SOURCE (4) // <-- Updated by GUI. Do not edit this value manually - -/* Main clock Oscillator Switching (MOSEL). - 0 = Resonator - 1 = External clock input -*/ -#define BSP_CFG_MAIN_CLOCK_SOURCE (0) // <-- Updated by GUI. Do not edit this value manually - -/* The sub-clock oscillation control for using the RTC. - When '1' is selected, the registers related to RTC are initialized and the sub-clock oscillator is operated. - 0 = The RTC is not to be used. - 1 = The RTC is to be used. -*/ -#define BSP_CFG_RTC_ENABLE (0) // <-- Updated by GUI. Do not edit this value manually - -/* Sub-Clock Oscillator Drive Capacity Control (RTCDV). - 0 = Drive capacity for standard CL. - 1 = Drive capacity for low CL. -*/ -#define BSP_CFG_SOSC_DRV_CAP (0) // <-- Updated by GUI. Do not edit this value manually //standard CL by default - -/* Clock configuration options. - The input clock frequency is specified and then the system clocks are set by specifying the multipliers used. The - multiplier settings are used to set the clock registers in resetprg.c. If a 24MHz clock is used and the - ICLK is 120MHz, PCLKA is 120MHz, PCLKB is 60MHz, PCLKC is 60MHz, PCLKD is 60MHz, FCLK is 60MHz, USB Clock is 48MHz, - and BCLK is 120MHz then the settings would be: - - BSP_CFG_XTAL_HZ = 24000000 - BSP_CFG_PLL_DIV = 1 (no division) - BSP_CFG_PLL_MUL = 10.0 (24MHz x 10.0 = 240MHz) - BSP_CFG_ICK_DIV = 2 : System Clock (ICLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_ICK_DIV) = 120MHz - BSP_CFG_PCKA_DIV = 2 : Peripheral Clock A (PCLKA) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKA_DIV) = 120MHz - BSP_CFG_PCKB_DIV = 4 : Peripheral Clock B (PCLKB) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKB_DIV) = 60MHz - BSP_CFG_PCKC_DIV = 4 : Peripheral Clock C (PCLKC) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKC_DIV) = 60MHz - BSP_CFG_PCKD_DIV = 4 : Peripheral Clock D (PCLKD) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKD_DIV) = 60MHz - BSP_CFG_FCK_DIV = 4 : Flash IF Clock (FCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_FCK_DIV) = 60MHz - BSP_CFG_BCK_DIV = 2 : External Bus Clock (BCK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_BCK_DIV) = 120MHz - BSP_CFG_UCK_DIV = 5 : USB Clock (UCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_UCK_DIV) = 48MHz -*/ - -/* Input clock frequency in Hz (XTAL or EXTAL). */ -#define BSP_CFG_XTAL_HZ (12000000) // <-- Updated by GUI. Do not edit this value manually - -/* The HOCO can operate at several different frequencies. Choose which one using the macro below. - Available frequency settings: - 0 = 16MHz (default) - 1 = 18MHz - 2 = 20MHz -*/ -#define BSP_CFG_HOCO_FREQUENCY (2) // <-- Updated by GUI. Do not edit this value manually - -/* PLL clock source (PLLSRCSEL). Choose which clock source to input to the PLL circuit. - Available clock sources: - 0 = Main clock (default) - 1 = HOCO -*/ -#define BSP_CFG_PLL_SRC (1) // <-- Updated by GUI. Do not edit this value manually - -/* PLL Input Frequency Division Ratio Select (PLIDIV). - Available divisors = /1 (no division), /2, /3 -*/ -#define BSP_CFG_PLL_DIV (1) // <-- Updated by GUI. Do not edit this value manually - -/* PLL Frequency Multiplication Factor Select (STC). - Available multipliers = x10.0 to x30.0 in 0.5 increments (e.g. 10.0, 10.5, 11.0, 11.5, ..., 29.0, 29.5, 30.0) -*/ -#define BSP_CFG_PLL_MUL (12.0) // <-- Updated by GUI. Do not edit this value manually - -/* System Clock Divider (ICK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_ICK_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock A Divider (PCKA). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKA_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock B Divider (PCKB). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKB_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock C Divider (PCKC). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKC_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock D Divider (PCKD). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKD_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* External Bus Clock Divider (BCLK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_BCK_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Flash IF Clock Divider (FCK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_FCK_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* USB Clock Divider Select. - Available divisors = /2, /3, /4, /5 -*/ -#define BSP_CFG_UCK_DIV (5) // <-- Updated by GUI. Do not edit this value manually - -/* Configure BCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency, 2= BCK/2 frequency -*/ -#define BSP_CFG_BCLK_OUTPUT (0) // <-- Updated by GUI. Do not edit this value manually - -/* Configure SDCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency -*/ -#define BSP_CFG_SDCLK_OUTPUT (0) // <-- Updated by GUI. Do not edit this value manually - -/* Main Clock Oscillator Wait Time (MOSCWTCR). - The value of MOSCWTCR register required for correspondence with the waiting time required to secure stable oscillation - by the main clock oscillator is obtained by using the maximum frequency for fLOCO in the formula below. - - BSP_CFG_MOSC_WAIT_TIME > (tMAINOSC * (fLOCO_max) + 16)/32 - (tMAINOSC: main clock oscillation stabilization time; fLOCO_max: maximum frequency for fLOCO) - - If tMAINOSC is 9.98 ms and fLOCO_max is 264 kHz (the period is 1/3.78 us), the formula gives - BSP_CFG_MOSC_WAIT_TIME > (9.98 ms * (264 kHZ) + 16)/32 = 82.83, so set the BSP_CFG_MOSC_WAIT_TIME to 83(53h). - - NOTE: The waiting time is not required when an external clock signal is input for the main clock oscillator. - Set the BSP_CFG_MOSC_WAIT_TIME to 00h. -*/ -#define BSP_CFG_MOSC_WAIT_TIME (0x53) // <-- Updated by GUI. Do not edit this value manually - -/* Sub-Clock Oscillator Wait Time (SOSCWTCR). - The value of SOSCWTCR register required for correspondence with the expected time to secure settling of oscillation - by the sub-clock oscillator is obtained by using the maximum frequency for fLOCO in the formula below. - - BSP_CFG_SOSC_WAIT_TIME > (tSUBOSC * (fLOCO_max) + 16)/16384 - (tSUBOSC: sub-clock oscillation stabilization time; fLOCO_max: maximum frequency for fLOCO) - - If tSUBOSC is 2 s and fLOCO is 264 kHz (the period is 1/3.78 us), the formula gives - BSP_CFG_SOSC_WAIT_TIME > (2 s * (264 kHz) +16)/16384 = 32.22, so set the BSP_CFG_SOSC_WAIT_TIME bits to 33(21h). -*/ -#define BSP_CFG_SOSC_WAIT_TIME (0x21) // <-- Updated by GUI. Do not edit this value manually - -/* ROM Cache Enable Register (ROMCE). - 0 = ROM cache operation disabled. - 1 = ROM cache operation enabled. -*/ -#define BSP_CFG_ROM_CACHE_ENABLE (0) - -/* Configure WDT and IWDT settings. - OFS0 - Option Function Select Register 0 - b31:b29 Reserved When reading, these bits return the value written by the user. The write value should be 1. - b28 WDTRSTIRQS - WDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b27:b26 WDTRPSS - WDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b25:b24 WDTRPES - WDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b23:b20 WDTCKS - WDT Clock Frequency Division Ratio - (1=PCLKB/4, 4=PCLKB/64, 0xF=PCLKB/128, 6=PCLKB/256, - 7=PCLKB/2048, 8=PCLKB/8192) - b19:b18 WDTTOPS - WDT Timeout Period Select (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b17 WDTSTRT - WDT Start Mode Select - (0=auto-start after reset, 1=halt after reset) - b16:b15 Reserved (set to 1) - b14 IWDTSLCSTP - IWDT Sleep Mode Count Stop Control - (0=can't stop count, 1=stop w/some low power modes) - b13 Reserved (set to 1) - b12 IWDTRSTIRQS - IWDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b11:b10 IWDTRPSS - IWDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b9:b8 IWDTRPES - IWDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b7:b4 IWDTCKS - IWDT Clock Frequency Division Ratio - (0=none, 2=/16, 3 = /32, 4=/64, 0xF=/128, 5=/256) - b3:b2 IWDTTOPS - IWDT Timeout Period Select - (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b1 IWDTSTRT - IWDT Start Mode Select - (0=auto-start after reset, 1=halt after reset) - b0 Reserved (set to 1) -*/ -#define BSP_CFG_OFS0_REG_VALUE (0xFFFFFFFF) // <-- Updated by GUI. Do not edit this value manually //Disable by default - -/* Configure whether voltage detection 0 circuit and HOCO are enabled after reset. - OFS1 - Option Function Select Register 1 - b31:b9 Reserved (set to 1) - b8 HOCOEN - Enable/disable HOCO oscillation after a reset (0=enable, 1=disable) - b7:b3 Reserved When reading, these bits return the value written by the user. The write value should be 1. - b2 LVDAS - Voltage Detection 0 circuit start (1=monitoring disabled) - b1:b0 VDSEL - Voltage Detection 0 level select (1=2.94v, 2=2.87v, 3=2.80v) - NOTE: If HOCO oscillation is enabled by OFS1.HOCOEN, HOCO frequency is 16MHz. - BSP_CFG_HOCO_FREQUENCY should be default value. -*/ -#define BSP_CFG_OFS1_REG_VALUE (0xFFFFFFFF) // <-- Updated by GUI. Do not edit this value manually //Disable by default - -/* Trusted memory is facility to prevent the reading of blocks 8 and 9 and blocks 46 and 47 (in dual mode) in - the code flash memory by third party software. This feature is disabled by default. - TMEF - TM Enable Flag Register - b31 Reserved (set to 1) - b30:b28 TMEFDB - Dual-Bank TM Enable - 000: The TM function in the address range from FFEE 0000h to - FFEE FFFFh is enabled in dual mode. - - 111: The TM function in the address range from FFEE 0000h to - FFEE FFFFh is disabled in dual mode. - b27 Reserved (set to 1) - b26:b24 TMEFF - TM Enable - 000: TM function is enabled. - - 111: TM function is disabled. - b23:b0 Reserved (set to 1) - NOTE: If the dual bank function has not been incorporated in a device, - TMEFDB bits [b30:b26] are reserved area. -*/ -#define BSP_CFG_TRUSTED_MODE_FUNCTION (0xFFFFFFFF) //Disable by default - -/* Configure FAW register is used to set the write protection flag and boot area select flag - for setting the flash access window startaddress and flash access window end address. - FAW - Flash Access Window Setting Register - b31 BTFLG - Boot Area Select Flag - 0: FFFF C000h to FFFF DFFFh are used as the boot area - - 1: FFFF E000h to FFFF FFFFh are used as the boot area - b30:b28 Reserved - When reading, these bits return the value written by the user.The write value should be 1. - b27:b16 FAWE - Flash Access Window End Address - Flash access window end address - b15 FSPR - Access Window Protection Flag - 0: With protection (P/E disabled) - - 1: Without protection (P/E enabled) - b14:b12 Reserved - When reading, these bits return the value written by the user.The write value should be 1. - b11:b0 FAWS - Flash Access Window Start Address - Flash access window start address - NOTE: Once 0 is written to this bit, the bit can never be restored to 1. - Therefore, the access window and the BTFLG bit never be set again or the TM function - never be disabled once it has been enabled. - Exercise extra caution when handling the FSPR bit. -*/ -#define BSP_CFG_FAW_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* The ROM code protection register is a function to prohibit reading from or programming to the flash memory - when the flash programmer is used during off-board programming. - ROMCODE - ROM Code Protection Register - b31:b0 ROM Code - 0000 0000h: ROM code protection enabled (ROM code protection 1). - 0000 0001h: ROM code protection enabled (ROM code protection 2). - Other than above: ROM code protection disabled. - Note. The ROMCODE register should be set in 32-bit units. -*/ -#define BSP_CFG_ROMCODE_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* Select the bank mode of dual-bank function of the code flash memory. - 0 = Dual mode. - 1 = Linear mode. - NOTE: If the dual bank function has been incorporated in a device, select the bank mode in this macro. - Default setting of the bank mode is linear mode. - If the dual bank function has not been incorporated in a device, this macro should be 1. -*/ -#define BSP_CFG_CODE_FLASH_BANK_MODE (1) //Linear mode by default - -/* Select the startup bank of the program when dual bank function is in dual mode. - 0 = The address range of bank 1 from FFE00000h to FFEFFFFFh and bank 0 from FFF00000h to FFFFFFFFh. - 1 = The address range of bank 1 from FFF00000h to FFFFFFFFh and bank 0 from FFE00000h to FFEFFFFFh. - NOTE: If the dual bank function has been incorporated in a device, select the start bank in this macro. - Default setting of the start bank is bank0. - If the dual bank function has not been incorporated in a device, this macro should be 0. -*/ -#define BSP_CFG_CODE_FLASH_START_BANK (0) //Bank0 by default - -/* This macro lets other modules no if a RTOS is being used. - 0 = RTOS is not used. - 1 = FreeRTOS is used. - 2 = embOS is used.(This is not available.) - 3 = MicroC_OS is used.(This is not available.) - 4 = RI600V4 or RI600PX is used.(This is not available.) -*/ -/* As of today, we need a workaround to avoid the problem that the Smart Configurator does not have such GUI - yet and the BSP_CFG_RTOS_USED here is set to (0) every time of code generation by the Smart Configurator. - The BSP_CFG_RTOS_USED is set to (1) in the r_bsp.h instead of here so that the setting of here is ignored. -*/ -#if !defined(BSP_CFG_RTOS_USED) || (BSP_CFG_RTOS_USED == 0) -#if defined(BSP_CFG_RTOS_USED) -#undef BSP_CFG_RTOS_USED -#endif -#define BSP_CFG_RTOS_USED (0) // <-- Updated by GUI. Do not edit this value manually -#endif - -/* This macro is used to select which CMT channel used for system timer of RTOS. - * The setting of this macro is only valid if the macro BSP_CFG_RTOS_USED is set to a value other than 0. */ -#if (BSP_CFG_RTOS_USED != 0) -/* Setting value. - * 0 = CMT channel 0 used for system timer of RTOS (recommended to be used for RTOS). - * 1 = CMT channel 1 used for system timer of RTOS. - * 2 = CMT channel 2 used for system timer of RTOS. - * 3 = CMT channel 3 used for system timer of RTOS. - * Others = Invalid. */ -#define BSP_CFG_RTOS_SYSTEM_TIMER (0) -#endif - -/* By default modules will use global locks found in mcu_locks.c. If the user is using a RTOS and would rather use its - locking mechanisms then they can change this macro. - NOTE: If '1' is chosen for this macro then the user must also change the next macro 'BSP_CFG_USER_LOCKING_TYPE'. - 0 = Use default locking (non-RTOS) - 1 = Use user defined locking mechanism. -*/ -#define BSP_CFG_USER_LOCKING_ENABLED (0) - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to redefine the typedef - that is used for the locks. If the user is using a RTOS then they would likely redefine the typedef to be - a semaphore/mutex type of their RTOS. Use the macro below to set the type that will be used for the locks. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_TYPE bsp_lock_t - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to define the functions - that will handle the locking and unlocking. These functions should be defined below. - If BSP_CFG_USER_LOCKING_ENABLED is != 0: - R_BSP_HardwareLock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION(mcu_lock_t hw_index) - R_BSP_HardwareUnlock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION(mcu_lock_t hw_index) - NOTE:With these functions the index into the array holding the global hardware locks is passed as the parameter. - R_BSP_SoftwareLock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - R_BSP_SoftwareUnlock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - NOTE:With these functions the actual address of the lock to use is passed as the parameter. - NOTE: These functions must return a boolean. If lock was obtained or released successfully then return true. Else, - return false. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION my_hw_locking_function -#define BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION my_hw_unlocking_function -#define BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION my_sw_locking_function -#define BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION my_sw_unlocking_function - -/* If the user would like to determine if a warm start reset has occurred, then they may enable one or more of the - * following callback definitions AND provide a call back function name for the respective callback - * function (to be defined by the user). Setting BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED = 1 will result - * in a callback to the user defined my_sw_warmstart_prec_function just prior to the initialization of the C - * runtime environment by resetprg. - * - * Setting BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED = 1 will result in a callback to the user defined - * my_sw_warmstart_postc_function just after the initialization of the C runtime environment by resetprg. - */ -#define BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_PRE_C_FUNCTION my_sw_warmstart_prec_function - -#define BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_POST_C_FUNCTION my_sw_warmstart_postc_function - -/* By default FIT modules will check input parameters to be valid. This is helpful during development but some users - will want to disable this for production code. The reason for this would be to save execution time and code space. - This macro is a global setting for enabling or disabling parameter checking. Each FIT module will also have its - own local macro for this same purpose. By default the local macros will take the global value from here though - they can be overridden. Therefore, the local setting has priority over this global setting. Disabling parameter - checking should only used when inputs are known to be good and the increase in speed or decrease in code space is - needed. - 0 = Global setting for parameter checking is disabled. - 1 = Global setting for parameter checking is enabled (Default). -*/ -#define BSP_CFG_PARAM_CHECKING_ENABLE (1) - -/* The extended bus master has five transfer sources: EDMAC, GLCDC-GRA1 (GLCDC graphics 1 data read), GLCDCGRA2 (GLCDC - graphics 2 data read), DRW2D-TX (DRW2D texture data read), and DRW2D-FB (DRW2D frame buffer data read write and - display list data read). - The default priority order in bsp is below - GLCDC-GRA1 > GLCDC-GRA2 > DRW2D-TX > DRW2D-FB > EDMAC. - Priority can be changed with this macro. - - Extended Bus Master Priority setting - 0 = GLCDC graphics 1 data read - 1 = DRW2D texture data read - 2 = DRW2D frame buffer data read write and display list data read - 3 = GLCDC graphics 2 data read - 4 = EDMAC - - Note : This macro is only available for products with at least 1.5 Mbytes of code flash memory. - Settings other than above are prohibited. - Duplicate priority settings can not be made. -*/ -#define BSP_CFG_EBMAPCR_1ST_PRIORITY (0) /* Extended Bus Master 1st Priority Selection */ -#define BSP_CFG_EBMAPCR_2ND_PRIORITY (3) /* Extended Bus Master 2nd Priority Selection */ -#define BSP_CFG_EBMAPCR_3RD_PRIORITY (1) /* Extended Bus Master 3rd Priority Selection */ -#define BSP_CFG_EBMAPCR_4TH_PRIORITY (2) /* Extended Bus Master 4th Priority Selection */ -#define BSP_CFG_EBMAPCR_5TH_PRIORITY (4) /* Extended Bus Master 5th Priority Selection */ - -/* This macro is used to define the voltage that is supplied to the MCU (Vcc). This macro is defined in millivolts. This - macro does not actually change anything on the MCU. Some FIT modules need this information so it is defined here. */ -#define BSP_CFG_MCU_VCC_MV (3300) // <-- Updated by GUI. Do not edit this value manually - -/* Allow initialization of auto-generated peripheral initialization code by Smart Configurator tool. - When not using the Smart Configurator, set the value of BSP_CFG_CONFIGURATOR_SELECT to 0. - 0 = Disabled (default) - 1 = Smart Configurator initialization code used -*/ -#define BSP_CFG_CONFIGURATOR_SELECT (1) // <-- Updated by GUI. Do not edit this value manually - -/* For some BSP functions, it is necessary to ensure that, while these functions are executing, interrupts from other - FIT modules do not occur. By controlling the IPL, these functions disable interrupts that are at or below the - specified interrupt priority level. - This macro sets the IPL. Range is 0x0 - 0xF. - Please set this macro more than IPR for other FIT module interrupts. - The default value is 0xF (maximum value). - Don't change if there is no special processing with higher priority than all fit modules. -*/ -#define BSP_CFG_FIT_IPL_MAX (0xF) - -/* This macro is used to select which SCI channel used for debug serial terminal. - */ -#define MY_BSP_CFG_SERIAL_TERM_SCI (5) - -/* This macro is used to select which SCI channel used for UART WiFi module. - */ -#define MY_BSP_CFG_UART_WIFI_SCI (0) -#define ULPGN_HSUART1_RTS_PDR PORT2.PDR.BIT.B2 /*PMOD PinNo.4 */ -#define ULPGN_HSUART1_RTS_PODR PORT2.PODR.BIT.B2 /*PMOD PinNo.4 */ -#define MY_BSP_CFG_UART_WIFI_SECOND_SCI (1) -#define ULPGN_RESET_PORT_PDR PORTD.PDR.BIT.B0 /*PMOD PinNo.8 */ -#define ULPGN_RESET_PORT_PODR PORTD.PODR.BIT.B0 /*PMOD PinNo.8 */ - -#endif /* R_BSP_CONFIG_REF_HEADER_FILE */ - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_config/r_bsp_config_readme.txt b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_config/r_bsp_config_readme.txt deleted file mode 100644 index 6a9002cf4f3..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_config/r_bsp_config_readme.txt +++ /dev/null @@ -1,12 +0,0 @@ -FIT r_config folder -------------------- -The purpose of the r_config folder is to provide one place where the user can store all of their FIT configuration -files. Putting the files in one place makes them easy to find, backup, and put in a version control system. - -FIT Modules are distributed with a reference configuration file. These files end with '_reference.h'. For example, -the reference configuration file for the r_bsp is named r_bsp_config_reference.h. Reference configuration files are -provided so that the user always has a known-good configuration to revert to. When adding a FIT Module to a project the -user should copy this reference configuration file to this folder and remove '_reference' from the filename -(r_bsp_config_reference.h is renamed to r_bsp_config.h). For the r_bsp the reference configuration file can be found in -the 'board' folder for the currently chosen development board. For other FIT Modules the reference configuration file -can be found in the 'ref' folder of the FIT Module. diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_config/r_bsp_interrupt_config.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_config/r_bsp_interrupt_config.h deleted file mode 100644 index 1346f175b23..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_config/r_bsp_interrupt_config.h +++ /dev/null @@ -1,214 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_interrupt_config.h -* Description : This module maps Interrupt A & B interrupts. More information on how this is done is given below. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -* : 15.05.2017 2.00 Changed the name of the following macro definition, because there was a mistake -* in the name of macro definition. -* - From XXX_TPU0_TGI0V to XXX_TPU0_TCI0V. -* - From XXX_TPU1_TGI1V to XXX_TPU1_TCI1V. -* - From XXX_TPU1_TGI1U to XXX_TPU1_TCI1U. -* - From XXX_TPU2_TGI2V to XXX_TPU2_TCI2V. -* - From XXX_TPU2_TGI2U to XXX_TPU2_TCI2U. -* - From XXX_TPU3_TGI3V to XXX_TPU3_TCI3V. -* - From XXX_TPU4_TGI4V to XXX_TPU4_TCI4V. -* - From XXX_TPU4_TGI4U to XXX_TPU4_TCI4U. -* - From XXX_TPU5_TGI5V to XXX_TPU5_TCI5V. -* - From XXX_TPU5_TGI5U to XXX_TPU5_TCI5U. -* - From XXX_MTU0_TGIV0 to XXX_MTU0_TCIV0. -* - From XXX_MTU1_TGIV1 to XXX_MTU1_TCIV1. -* - From XXX_MTU1_TGIU1 to XXX_MTU1_TCIU1. -* - From XXX_MTU2_TGIV2 to XXX_MTU2_TCIV2. -* - From XXX_MTU2_TGIU2 to XXX_MTU2_TCIU2. -* - From XXX_MTU3_TGIV3 to XXX_MTU3_TCIV3. -* - From XXX_MTU4_TGIV4 to XXX_MTU4_TCIV4. -* - From XXX_MTU6_TGIV6 to XXX_MTU6_TCIV6. -* - From XXX_MTU7_TGIV7 to XXX_MTU7_TCIV7. -* - From XXX_MTU8_TGIV8 to XXX_MTU8_TCIV8. -* Added select processing of the following software configurable interrupt source. -* - TSIP_PROC_BUSY -* - TSIP_ROMOK -* - TSIP_LONG_PLG -* - TSIP_TEST_BUSY -* - TSIP_WRRDY0 -* - TSIP_WRRDY1 -* - TSIP_WRRDY4 -* - TSIP_RDRDY0 -* - TSIP_RDRDY1 -* - TSIP_INTEGRATE_WRRDY -* - TSIP_INTEGRATE_RDRDY -***********************************************************************************************************************/ -#ifndef R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE -#define R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/* If you wish to use one of the interrupt below then set the appropriate configuration macro to the vector number you - * wish to use for that interrupt. For example, if you want to use the RTC carry interrupt (CUP) at vector 176 then you - * would do the following: - * - * #define BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP 176 - */ - -/* Interrupt B Sources. - * -Valid vector numbers are 128-207. - * -There are more vector slots for B sources than actual B sources. By default all B sources are mapped. - * -If using the 'TPU1, TGI1A' interrupt it must be vector 144 or 145. It is set to 144 by default. - * -If a peripheral interrupt is going to be used to wake up the MCU from All-Module Clock Stop Mode then it must be - * in a vector between 146 to 157. Peripheral interrupts that can do this are TMR interrupts and the 'USB0, USBI0' - * interrupt. By default the TMR interrupts are chosen since there are 12 of them and there are 12 slots. - */ -#define BSP_MAPPED_INT_CFG_B_VECT_CMT2_CMI2 128 -#define BSP_MAPPED_INT_CFG_B_VECT_CMT3_CMI3 129 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIA0 146 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIB0 147 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_OVI0 148 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIA1 149 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIB1 150 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_OVI1 151 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIA2 152 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIB2 153 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_OVI2 154 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIA3 155 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIB3 156 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_OVI3 157 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0A 130 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0B 131 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0C 132 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0D 133 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TCI0V 134 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1A 144 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1B 135 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1V 136 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1U 137 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2A 138 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2B 139 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2V 140 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2U 141 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3A 142 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3B 143 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3C 145 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3D 158 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TCI3V 159 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4A 160 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4B 161 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4V 162 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4U 163 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5A 164 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5B 165 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5V 166 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5U 167 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC0I0 168 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC1I0 169 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC0I0 170 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC1I0 171 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC0I1 172 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC1I1 173 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC0I1 174 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC1I1 175 -#define BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP 176 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXF0 177 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXF0 178 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXM0 179 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXM0 180 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXF1 181 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXF1 182 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXM1 183 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXM1 184 -#define BSP_MAPPED_INT_CFG_B_VECT_USB0_USBI0 185 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12ADI0 186 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GBADI0 187 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GCADI0 188 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12ADI1 189 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GBADI1 190 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GCADI1 191 -#define BSP_MAPPED_INT_CFG_B_VECT_RNG_RNGEND -#define BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR18I 193 -#define BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR19I 194 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_PROC_BUSY 195 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_ROMOK 196 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_LONG_PLG 197 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_TEST_BUSY 198 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY0 199 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY1 200 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY4 201 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY0 202 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY1 203 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_WRRDY 204 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_RDRDY 205 - -/* Interrupt A Sources. - * -Valid vector numbers are 208-255. - * -There are more A sources than A vector slots. By default none of the GPT interrupts are mapped. - * -If using the 'MTU1, TGI1A' interrupt it must be vector 208 or 209. It is set to 208 by default. - */ -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIA0 209 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIB0 210 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIC0 211 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGID0 212 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TCIV0 213 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIE0 214 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIF0 215 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIA1 208 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIB1 216 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIV1 217 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIU1 218 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIA2 219 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIB2 220 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIV2 221 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIU2 222 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIA3 223 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIB3 224 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIC3 225 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGID3 226 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TCIV3 227 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIA4 228 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIB4 229 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIC4 230 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGID4 231 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TCIV4 232 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIU5 233 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIV5 234 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIW5 235 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIA6 236 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIB6 237 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIC6 238 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGID6 239 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TCIV6 240 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIA7 241 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIB7 242 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIC7 243 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGID7 244 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TCIV7 245 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIA8 246 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIB8 247 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIC8 248 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGID8 249 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TCIV8 250 -#define BSP_MAPPED_INT_CFG_A_VECT_AES_AESRDY -#define BSP_MAPPED_INT_CFG_A_VECT_AES_AESEND - -#endif /* R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE */ - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_config/r_byteq_config.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_config/r_byteq_config.h deleted file mode 100644 index 2895339dd24..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_config/r_byteq_config.h +++ /dev/null @@ -1,59 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_byteq_config.h -* Description : Configures the byte queue memory allocation -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 24.07.2013 1.00 Initial Release -* : 11.21.2014 1.20 Removed dependency to BSP -* : 30.09.2015 1.50 Added dependency to BSP -***********************************************************************************************************************/ -#ifndef BYTEQ_CONFIG_H -#define BYTEQ_CONFIG_H - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - Available settings: - BSP_CFG_PARAM_CHECKING_ENABLE: - Utilizes the system default setting - 1: - Includes parameter checking - 0: - Compiles out parameter checking -*/ -#define BYTEQ_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY IF SHOULD USE MALLOC() TO ALLOCATE MEMORY FOR QUEUE CONTROL BLOCKS */ -#define BYTEQ_CFG_USE_HEAP_FOR_CTRL_BLKS (0) - -/* SPECIFY NUMBER OF STATIC QUEUE CONTROL BLOCKS TO SUPPORT */ -/* valid only when BYTEQ_USE_HEAP_FOR_CTRL_BLKS is set to 0 */ -#define BYTEQ_CFG_MAX_CTRL_BLKS (8 + 4) - - -#endif /* BYTEQ_CONFIG_H */ diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_config/r_flash_rx_config.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_config/r_flash_rx_config.h deleted file mode 100644 index fbf916a0e97..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_config/r_flash_rx_config.h +++ /dev/null @@ -1,116 +0,0 @@ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_flash_rx_config_reference.h - * Description : Configures the FLASH API module for RX200 and RX600 Series MCU's. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* 12.04.2014 1.00 First Release -* 22.12.2014 1.10 Added flash type usage comments. -* 25.06.2015 1.20 Added FLASH_CFG_CODE_FLASH_RUN_FROM_ROM. -* : 12.10.2016 2.00 Modified for BSPless operation (added FLASH_CFG_USE_FIT_BSP). -***********************************************************************************************************************/ -#ifndef FLASH_CONFIG_HEADER_FILE -#define FLASH_CONFIG_HEADER_FILE - -/* Set the following value to 0 when building without using the FIT BSP Module */ -#define FLASH_CFG_USE_FIT_BSP (1) - - -/*********************************************************************************************************************** - Configuration Options - ***********************************************************************************************************************/ -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting - * Setting to 1 includes parameter checking; 0 compiles out parameter checking - */ -#define FLASH_CFG_PARAM_CHECKING_ENABLE (1) - - -/****************************************************************************** - ENABLE CODE FLASH PROGRAMMING -******************************************************************************/ -/* If you are only using data flash, set this to 0. - * Setting to 1 includes code to program the ROM area. When programming ROM, - * code must be executed from RAM, except under certain restrictions for flash - * type 3 (see section 2.14 in App Note). See section 2.13 in the App Note for - * details on how to set up code and the linker to execute code from RAM. - */ -#define FLASH_CFG_CODE_FLASH_ENABLE (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING DATA FLASH OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces data flash API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, data flash operations return immediately after the operation has been - * started. Notification of the operation completion is done via the callback - * function. - */ -#define FLASH_CFG_DATA_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING CODE FLASH (ROM) OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces ROM API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, ROM operations return immediately after the operation has been started. - * Notification of the operation completion is done via the callback function. - * When reprogramming ROM, THE RELOCATABLE VECTOR TABLE AND CORRESPONDING - * INTERRUPT ROUTINES MUST BE IN RAM. - * See sections 2.16 Usage Notes in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE CODE FLASH SELF-PROGRAMMING -******************************************************************************/ -/* Set this to 0 when programming code flash while executing in RAM. - * Set this to 1 when programming code flash while executing from another - * segment in ROM (possible only with RX64M, RX71M, RX65N-2 groups). - * See section 2.14 in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_RUN_FROM_ROM (0) - - -/****************************************************************************** - SET IPL OF FLASH READY INTERRUPT -******************************************************************************/ -#define FLASH_CFG_FLASH_READY_IPL (5) // Flash type 2 only - - -/****************************************************************************** - ENABLE OR DISABLE LOCK BIT PROTECTION -******************************************************************************/ -/* Each erasure block has a corresponding lock bit that can be used to - * protect that block from being programmed/erased after the lock bit is - * set. The use of lock bits can be used or ignored. - * Setting this to 1 will cause lock bits to be ignored and programs/erases to a - * block will not be limited. - * Setting this to 0 will cause lock bits to be used as the user configures through - * the Control command. This only applies to ROM as the DF does not have lock bits. - */ -#define FLASH_CFG_IGNORE_LOCK_BITS (1) // Flash type 2 only - - -#endif /* FLASH_CONFIG_HEADER_FILE */ diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_config/r_s12ad_rx_config.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_config/r_s12ad_rx_config.h deleted file mode 100644 index 0202bf133a4..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_config/r_s12ad_rx_config.h +++ /dev/null @@ -1,53 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_s12ad_rx_config.h -* Description : Configures the 12-bit A/D driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 22.07.2013 1.00 Initial Release. -* 21.04.2014 1.20 Updated for RX210 advanced features; RX110/63x support. -***********************************************************************************************************************/ -#ifndef S12AD_CONFIG_H -#define S12AD_CONFIG_H - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* - * SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting. - * Setting to 1 includes parameter checking; 0 compiles out parameter checking. - */ -#define ADC_CFG_PARAM_CHECKING_ENABLE BSP_CFG_PARAM_CHECKING_ENABLE - - -/* - * RX210 Series only; Temperature Sensor Programmable Gain Amplifier (PGA) - * SELECT PGA GAIN TO MATCH AVCC0 VOLTAGE RANGE: - * 0: 1.8V <= AVcc0 < 2.7V; default; good for all actual voltages - * 1: 2.7V <= AVcc0 < 3.6V - * 2: 3.6V <= AVcc0 < 4.5V - * 3: 4.5V <= AVcc0 <= 5.5V - */ -#define ADC_CFG_PGA_GAIN (0) - - -#endif /* S12AD_CONFIG_H */ diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_config/r_sci_rx_config.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_config/r_sci_rx_config.h deleted file mode 100644 index 37ba29ab2b2..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_config/r_sci_rx_config.h +++ /dev/null @@ -1,171 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_config.h -* Description : Configures the SCI driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 25.09.2013 1.00 Initial Release -* 17.04.2014 1.20 Added comments for new RX110 support. -* 02.07.2014 1.30 Fixed bug that caused Group12 rx errors to only be enabled for channel 2. -* 25.11.2014 1.40 Added comments for RX113 support -* 30.09.2015 1.70 Added comments for RX23T support -* 01.10.2016 1.80 Added support for RX65N (comments and TX/RX FIFO THRESHOLD options) -* 19.12.2016 1.90 Added comments for RX24U support -* 07.03.2017 2.00 Added comments for RX130-512KB support -***********************************************************************************************************************/ -#ifndef SCI_CONFIG_H -#define SCI_CONFIG_H - -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING */ -/* Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting */ -/* Setting to 1 includes parameter checking; 0 compiles out parameter checking */ -#define SCI_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY WHETHER TO INCLUDE CODE FOR DIFFERENT SCI MODES */ -/* Setting an equate to 1 includes code specific to that mode. */ -#define SCI_CFG_ASYNC_INCLUDED (1) -#define SCI_CFG_SYNC_INCLUDED (0) -#define SCI_CFG_SSPI_INCLUDED (0) - -/* SPECIFY BYTE VALUE TO TRANSMIT WHILE CLOCKING IN DATA IN SSPI MODES */ -#define SCI_CFG_DUMMY_TX_BYTE (0xFF) - -/* SPECIFY CHANNELS TO INCLUDE SOFTWARE SUPPORT FOR 1=included, 0=not */ -/* - * NOTE: If using ASYNC mode, adjust BYTEQ_CFG_MAX_CTRL_BLKS in r_byteq_config.h - * to provide 2 queues per channel (static mode only). - * * = port connector RDKRX63N, RSKRX210, RSKRX11x - * u = channel used by the USB-UART port (G1CUSB0) - * a = this channel is used only for RX130-512KB - * RX MCU supported channels - * - * CH# 110 111 113 130 210 230 231 23T 24T 24U 63N 631 64M 71M 65N - * --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- - * CH0 X Xa X* X X X* X X X X - * CH1 X X* X* Xu X X X Xu Xu Xu X X X X X - * CH2 X X X X X Xu - * CH3 X X X X X - * CH4 X X X X X - * CH5 X X X X X X Xu X X X X X X X X - * CH6 X X X X X X X X X X X X - * CH7 X X Xu Xu X - * CH8 X Xa X X X X X X X - * CH9 X Xa X X X X X X X - * CH10 X X X - * CH11 X X X X - * CH12 X X X X X X X X X X X X -*/ - -#define SCI_CFG_CH0_INCLUDED (1) -#define SCI_CFG_CH1_INCLUDED (1) -#define SCI_CFG_CH2_INCLUDED (0) -#define SCI_CFG_CH3_INCLUDED (0) -#define SCI_CFG_CH4_INCLUDED (0) -#define SCI_CFG_CH5_INCLUDED (1) -#define SCI_CFG_CH6_INCLUDED (0) -#define SCI_CFG_CH7_INCLUDED (0) -#define SCI_CFG_CH8_INCLUDED (0) -#define SCI_CFG_CH9_INCLUDED (0) -#define SCI_CFG_CH10_INCLUDED (1) -#define SCI_CFG_CH11_INCLUDED (0) -#define SCI_CFG_CH12_INCLUDED (0) - -/* SPECIFY ASYNC MODE TX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_TX_BUFSIZ (1460) -#define SCI_CFG_CH1_TX_BUFSIZ (1460) -#define SCI_CFG_CH2_TX_BUFSIZ (80) -#define SCI_CFG_CH3_TX_BUFSIZ (80) -#define SCI_CFG_CH4_TX_BUFSIZ (80) -#define SCI_CFG_CH5_TX_BUFSIZ (1000) -#define SCI_CFG_CH6_TX_BUFSIZ (80) -#define SCI_CFG_CH7_TX_BUFSIZ (80) -#define SCI_CFG_CH8_TX_BUFSIZ (80) -#define SCI_CFG_CH9_TX_BUFSIZ (80) -#define SCI_CFG_CH10_TX_BUFSIZ (80) -#define SCI_CFG_CH11_TX_BUFSIZ (80) -#define SCI_CFG_CH12_TX_BUFSIZ (80) - -/* SPECIFY ASYNC MODE RX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_RX_BUFSIZ (4096) -#define SCI_CFG_CH1_RX_BUFSIZ (2048) -#define SCI_CFG_CH2_RX_BUFSIZ (80) -#define SCI_CFG_CH3_RX_BUFSIZ (80) -#define SCI_CFG_CH4_RX_BUFSIZ (80) -#define SCI_CFG_CH5_RX_BUFSIZ (1000) -#define SCI_CFG_CH6_RX_BUFSIZ (80) -#define SCI_CFG_CH7_RX_BUFSIZ (80) -#define SCI_CFG_CH8_RX_BUFSIZ (80) -#define SCI_CFG_CH9_RX_BUFSIZ (80) -#define SCI_CFG_CH10_RX_BUFSIZ (2048) -#define SCI_CFG_CH11_RX_BUFSIZ (80) -#define SCI_CFG_CH12_RX_BUFSIZ (80) - -/* -* ENABLE TRANSMIT END INTERRUPT (ASYNCHRONOUS) -* This interrupt only occurs when the last bit of the last byte of data -* has been sent and the transmitter has become idle. The interrupt calls -* the user's callback function specified in R_SCI_Open() and passes it an -* SCI_EVT_TEI event. A typical use of this feature is to disable an external -* transceiver to save power. It would then be up to the user's code to -* re-enable the transceiver before sending again. Not including this feature -* reduces code space used by the interrupt. Note that this equate is only -* for including the TEI code. The interrupt itself must be enabled using an -* R_SCI_Control(hdl, SCI_CMD_EN_TEI, NULL) call. -*/ -#define SCI_CFG_TEI_INCLUDED (1) /* 1=included, 0=not */ - -/* -* SET GROUP12 (RECEIVER ERROR) INTERRUPT PRIORITY; RX63N/631 ONLY -* This #define sets the priority level for the interrupt that handles -* receiver overrun, framing, and parity errors for all SCI channels -* on the RX63N/631. It is ignored for all other parts. -*/ -#define SCI_CFG_RXERR_PRIORITY (3) /* (RX63N/631 ONLY) 1 lowest, 15 highest */ - -/* -* SET GROUPBL0 (ERI, TEI) INTERRUPT PRIORITY; RX64M/RX71M/RX65N ONLY -* SET GROUPBL1, GROUPAL0 (ERI,TEI) INTERRUPT PRIORITY; RX65N ONLY -* This sets the priority level for receiver overrun, framing, and parity errors -* as well as TEI interrupts for all SCI channels. -*/ -#define SCI_CFG_ERI_TEI_PRIORITY (3) /* (RX64M/RX71M/RX65N ONLY) 1 lowest, 15 highest */ - -/* ENABLE TX/RX FIFO; (SCIi supported MCU ONLY) 1=included, 0=not */ -#define SCI_CFG_CH10_FIFO_INCLUDED (0) -#define SCI_CFG_CH11_FIFO_INCLUDED (0) - -/* SET TX FIFO THRESHOLD; (SCIi supported MCU ONLY) 0 lowest, 15 highest */ -/* TX FIFO THRESHOLD is invalid in Clock Synchronous Mode and Simple SPI Mode. */ -/* Set the same value for TX FIFO THRESHOLD and RX FIFO THRESHOLD in Clock Synchronous Mode and Simple SPI Mode. */ -#define SCI_CFG_CH10_TX_FIFO_THRESH (8) -#define SCI_CFG_CH11_TX_FIFO_THRESH (8) - -/* SET RX FIFO THRESHOLD; (SCIi supported MCU ONLY) 1 lowest, 15 highest */ -#define SCI_CFG_CH10_RX_FIFO_THRESH (8) -#define SCI_CFG_CH11_RX_FIFO_THRESH (8) - - -#endif /* SCI_CONFIG_H */ diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_pincfg/Pin.c b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_pincfg/Pin.c deleted file mode 100644 index 1e59927be90..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_pincfg/Pin.c +++ /dev/null @@ -1,102 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : Pin.c -* Version : 1.0.2 -* Device(s) : R5F565NEDxFP -* Description : This file implements SMC pin code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -/* Start user code for include. Do not edit comment generated here */ -#include "Pin.h" -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: R_Pins_Create -* Description : This function initializes Smart Configurator pins -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Pins_Create(void) -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set CTS0# pin */ - MPC.P23PFS.BYTE = 0x0BU; - PORT2.PMR.BYTE |= 0x08U; - - /* Set RXD0 pin */ - MPC.P21PFS.BYTE = 0x0AU; - PORT2.PMR.BYTE |= 0x02U; - - /* Set RXD1 pin */ - MPC.P30PFS.BYTE = 0x0AU; - PORT3.PMR.BYTE |= 0x01U; - - /* Set RXD5 pin */ - MPC.PA3PFS.BYTE = 0x0AU; - PORTA.PMR.BYTE |= 0x08U; - - /* Set RXD10 pin */ - MPC.PC6PFS.BYTE = 0x24U; - PORTC.PMR.BYTE |= 0x40U; - - /* Set TXD0 pin */ - PORT2.PODR.BYTE |= 0x01U; - MPC.P20PFS.BYTE = 0x0AU; - PORT2.PDR.BYTE |= 0x01U; - - /* Set TXD1 pin */ - PORT2.PODR.BYTE |= 0x40U; - MPC.P26PFS.BYTE = 0x0AU; - PORT2.PDR.BYTE |= 0x40U; - - /* Set TXD5 pin */ - PORTA.PODR.BYTE |= 0x10U; - MPC.PA4PFS.BYTE = 0x0AU; - PORTA.PDR.BYTE |= 0x10U; - - /* Set TXD10 pin */ - PORTC.PODR.BYTE |= 0x80U; - MPC.PC7PFS.BYTE = 0x24U; - PORTC.PDR.BYTE |= 0x80U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_pincfg/Pin.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_pincfg/Pin.h deleted file mode 100644 index 0547e097cff..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_pincfg/Pin.h +++ /dev/null @@ -1,50 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : Pin.h -* Version : 1.0.2 -* Device(s) : R5F565NEDxFP -* Description : This file implements SMC pin code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef PIN_H -#define PIN_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Pins_Create(void); -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_pincfg/r_pinset.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_pincfg/r_pinset.h deleted file mode 100644 index 59bbc3758f8..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_pincfg/r_pinset.h +++ /dev/null @@ -1,34 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_pinset.h.h -* Version : 1.0.1 -* Description : Declares all pin code headers into a single file -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef R_PINSET_H -#define R_PINSET_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_sci_rx_pinset.h" - -#endif /* R_PINSET_H */ diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_pincfg/r_sci_rx_pinset.c b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_pincfg/r_sci_rx_pinset.c deleted file mode 100644 index b7c7cea3412..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_pincfg/r_sci_rx_pinset.c +++ /dev/null @@ -1,125 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_pinset.c -* Version : 1.0.2 -* Device(s) : R5F565NEDxFP -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_sci_rx_pinset.h" -#include "platform.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: R_SCI_PinSet_SCI0 -* Description : This function initializes pins for r_sci_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_SCI_PinSet_SCI0() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set RXD0/SMISO0 pin */ - MPC.P21PFS.BYTE = 0x0AU; - PORT2.PMR.BIT.B1 = 1U; - - /* Set TXD0/SMOSI0 pin */ - MPC.P20PFS.BYTE = 0x0AU; - PORT2.PMR.BIT.B0 = 1U; - - /* Set CTS0#/RTS0#/SS0# pin */ - MPC.P23PFS.BYTE = 0x0BU; - PORT2.PMR.BIT.B3 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - -/*********************************************************************************************************************** -* Function Name: R_SCI_PinSet_SCI1 -* Description : This function initializes pins for r_sci_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_SCI_PinSet_SCI1() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set RXD1/SMISO1 pin */ - MPC.P30PFS.BYTE = 0x0AU; - PORT3.PMR.BIT.B0 = 1U; - - /* Set TXD1/SMOSI1 pin */ - MPC.P26PFS.BYTE = 0x0AU; - PORT2.PMR.BIT.B6 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - -/*********************************************************************************************************************** -* Function Name: R_SCI_PinSet_SCI5 -* Description : This function initializes pins for r_sci_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_SCI_PinSet_SCI5() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set RXD5/SMISO5 pin */ - MPC.PA3PFS.BYTE = 0x0AU; - PORTA.PMR.BIT.B3 = 1U; - - /* Set TXD5/SMOSI5 pin */ - MPC.PA4PFS.BYTE = 0x0AU; - PORTA.PMR.BIT.B4 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - -/*********************************************************************************************************************** -* Function Name: R_SCI_PinSet_SCI10 -* Description : This function initializes pins for r_sci_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_SCI_PinSet_SCI10() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set RXD10/SMISO10/SSCL10 pin */ - MPC.PC6PFS.BYTE = 0x24U; - PORTC.PMR.BIT.B6 = 1U; - - /* Set TXD10/SMOSI10/SSDA10 pin */ - MPC.PC7PFS.BYTE = 0x24U; - PORTC.PMR.BIT.B7 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_pincfg/r_sci_rx_pinset.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_pincfg/r_sci_rx_pinset.h deleted file mode 100644 index 38dbb443fee..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/ccrx-e2studio/src/smc_gen/r_pincfg/r_sci_rx_pinset.h +++ /dev/null @@ -1,44 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_pinset.h -* Version : 1.0.2 -* Device(s) : R5F565NEDxFP -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef R_SCI_RX_H -#define R_SCI_RX_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -void R_SCI_PinSet_SCI0(); -void R_SCI_PinSet_SCI1(); -void R_SCI_PinSet_SCI5(); -void R_SCI_PinSet_SCI10(); - -#endif diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.cproject b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.cproject deleted file mode 100644 index ec9f5982aae..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.cproject +++ /dev/null @@ -1,327 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.gitignore b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.gitignore deleted file mode 100644 index 11e355d8bc7..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.gitignore +++ /dev/null @@ -1,3 +0,0 @@ -/HardwareDebug/ -/.settings/ -/trash/ \ No newline at end of file diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.project b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.project deleted file mode 100644 index add27196446..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.project +++ /dev/null @@ -1,487 +0,0 @@ - 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1.0-name-matches-false-false-rx65n - - - - 1537708651935 - src/FIT_modified_code/r_bsp/mcu/rx65n/register_access - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-gnuc - - - - - - AWS_IOT_MCU_ROOT - $%7BPARENT-4-PROJECT_LOC%7D - - - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.settings/CodeGenerator/cgprojectDatas.datas b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.settings/CodeGenerator/cgprojectDatas.datas deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.settings/com.renesas.smc.e2studio.qe.xml b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.settings/com.renesas.smc.e2studio.qe.xml deleted file mode 100644 index 9ef4d206a9d..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.settings/com.renesas.smc.e2studio.qe.xml +++ /dev/null @@ -1,35 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.settings/e2studio_project.prefs b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.settings/e2studio_project.prefs deleted file mode 100644 index 586494834b2..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.settings/e2studio_project.prefs +++ /dev/null @@ -1,2 +0,0 @@ -# -#Thu Feb 07 14:01:19 JST 2019 diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.settings/fittemp/r_sci_rx.ftl b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.settings/fittemp/r_sci_rx.ftl deleted file mode 100644 index 62879ddbbe9..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.settings/fittemp/r_sci_rx.ftl +++ /dev/null @@ -1,85 +0,0 @@ -<#-- - Copyright(C) 2015 Renesas Electronics Corporation - RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY - This program must be used solely for the purpose for which it was furnished - by Renesas Electronics Corporation. No part of this program may be reproduced - or disclosed to others, in any form, without the prior written permission of - Renesas Electronics Corporation. ---> -<#-- = DECLARE FUNCTION INFORMATION HERE =================== --> -<#-- - (Step 1) Explanation: These variables are necessary information for the function header. - Please fill up or leave blank, but do not delete ---> -<#assign Function_Base_Name = "R_SCI_PinSet"> -<#assign Function_Description = "This function initializes pins for r_sci_rx module"> -<#assign Function_Arg = "none"> -<#assign Function_Ret = "none"> -<#assign Version = 1.00> - -<#-- = DECLARE FUNCTION CONTENT HERE ======================= --> -<#-- - (Step 2) Explanation: Function content. - - Macro [initialsection] : - Any text that goes into this section will be printed out 1 time per function - input [postfix] :Use this variable to add the channel number to the function base name. ---> -<#macro initialsection postfix> -<#assign Function_Name = "${Function_Base_Name}${postfix}"> -<#include "lib/functionheader.ftl"> -void ${Function_Name}() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - -<#-- - (Step 3) Explanation: Function content. - - Macro [peripheralpincode] : Any text that goes into this section will be printed out 1 time per peripheral - - input [pin] : Available info includes: - pin.pinName :The name of pin, eg “SSLA0†- pin.assignedPinName :The pin assigned to, eg “P32†- pin.pinMPC :The port number of assigned pin, eg “P32†has portNume = “3†- pin.portNum :The bit number of the assigned pin, eg “P32†has pinBitNum = “2†- pin.pinBitNum :The value of MPC ---> -<#macro peripheralpincode pin> - - -<#-- - (Step 4) Explanation: Function content. - - Macro [channelpincode] : Any text that goes into this section will be printed out 1 time per channel - - input [pin] : Same as above ---> -<#macro channelpincode pin> - - /* Set ${pin.pinName} pin */ - MPC.${pin.assignedPinName}PFS.BYTE = 0x${pin.pinMPC}U; - PORT${pin.portNum}.PMR.BIT.B${pin.pinBitNum} = 1U; - - -<#macro channelpincodeextra pin postfix> - - -<#-- - (Step 5) Explanation: Function content. - - Macro [endsection] : Any text that goes into this section will be printed out 1 time last ---> -<#macro endsection> - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - - -<#-- - (Step 6) Explanation: Header file content - - Macro [headerfilesection] : Any text that goes into this section will be printed out 1 time in the header file - - input [postfix] :Use this variable to add the channel number to the function base name. ---> -<#macro headerfilesection postfix> -void ${Function_Base_Name}${postfix}(); - - -<#macro headerfilesectionExtra postfix> - - -<#-- = END OF FILE ========================================= --> \ No newline at end of file diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.settings/language.settings.xml b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.settings/language.settings.xml deleted file mode 100644 index ab540c17089..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.settings/language.settings.xml +++ /dev/null @@ -1,21 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.settings/org.eclipse.cdt.managedbuilder.core.prefs b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.settings/org.eclipse.cdt.managedbuilder.core.prefs deleted file mode 100644 index 817b60cba1c..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/.settings/org.eclipse.cdt.managedbuilder.core.prefs +++ /dev/null @@ -1,9 +0,0 @@ -eclipse.preferences.version=1 -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/CPATH/delimiter=; -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/CPATH/operation=remove -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/C_INCLUDE_PATH/delimiter=; -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/C_INCLUDE_PATH/operation=remove -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/LIBRARY_PATH/delimiter=; -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/LIBRARY_PATH/operation=remove -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/append=true -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/appendContributed=true diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/aws_demos.scfg b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/aws_demos.scfg deleted file mode 100644 index 10b79aa1d21..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/aws_demos.scfg +++ /dev/null @@ -1,489 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/aws_demos_build_path_check_and_make.bat b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/aws_demos_build_path_check_and_make.bat deleted file mode 100644 index 047f6e34780..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/aws_demos_build_path_check_and_make.bat +++ /dev/null @@ -1,11 +0,0 @@ -@echo off -rem ################################################################################ -rem # This batch file executes some preprocess for build and then executes the make -rem ################################################################################ - -if not exist "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" ( - echo ERROR: Unable to find "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" - exit 2 -) - -"%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" %* diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/rx65n_tb_aws HardwareDebug.launch b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/rx65n_tb_aws HardwareDebug.launch deleted file mode 100644 index 3769aa7c21c..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/rx65n_tb_aws HardwareDebug.launch +++ /dev/null @@ -1,157 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_config/r_byteq_config.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_config/r_byteq_config.h deleted file mode 100644 index c5b4439ae6f..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_config/r_byteq_config.h +++ /dev/null @@ -1,59 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_byteq_config.h -* Description : Configures the byte queue memory allocation -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 24.07.2013 1.00 Initial Release -* : 11.21.2014 1.20 Removed dependency to BSP -* : 30.09.2015 1.50 Added dependency to BSP -***********************************************************************************************************************/ -#ifndef BYTEQ_CONFIG_H -#define BYTEQ_CONFIG_H - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - Available settings: - BSP_CFG_PARAM_CHECKING_ENABLE: - Utilizes the system default setting - 1: - Includes parameter checking - 0: - Compiles out parameter checking -*/ -#define BYTEQ_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY IF SHOULD USE MALLOC() TO ALLOCATE MEMORY FOR QUEUE CONTROL BLOCKS */ -#define BYTEQ_CFG_USE_HEAP_FOR_CTRL_BLKS (0) - -/* SPECIFY NUMBER OF STATIC QUEUE CONTROL BLOCKS TO SUPPORT */ -/* valid only when BYTEQ_USE_HEAP_FOR_CTRL_BLKS is set to 0 */ -#define BYTEQ_CFG_MAX_CTRL_BLKS (6 + 4) - - -#endif /* BYTEQ_CONFIG_H */ diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_config/r_cmt_rx_config.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_config/r_cmt_rx_config.h deleted file mode 100644 index e043e41b29d..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_config/r_cmt_rx_config.h +++ /dev/null @@ -1,37 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_cmt_rx_config.h -* Description : Configures the r_cmt_rx code. -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 06.11.2013 2.00 First GSCE Release. -***********************************************************************************************************************/ -#ifndef CMT_CONFIG_HEADER_FILE -#define CMT_CONFIG_HEADER_FILE - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ -/* The interrupt priority level to be used for CMT interrupts. */ -#define CMT_RX_CFG_IPR (5) - -#endif /* CMT_CONFIG_HEADER_FILE */ - - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_config/r_flash_rx_config.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_config/r_flash_rx_config.h deleted file mode 100644 index fbf916a0e97..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_config/r_flash_rx_config.h +++ /dev/null @@ -1,116 +0,0 @@ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_flash_rx_config_reference.h - * Description : Configures the FLASH API module for RX200 and RX600 Series MCU's. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* 12.04.2014 1.00 First Release -* 22.12.2014 1.10 Added flash type usage comments. -* 25.06.2015 1.20 Added FLASH_CFG_CODE_FLASH_RUN_FROM_ROM. -* : 12.10.2016 2.00 Modified for BSPless operation (added FLASH_CFG_USE_FIT_BSP). -***********************************************************************************************************************/ -#ifndef FLASH_CONFIG_HEADER_FILE -#define FLASH_CONFIG_HEADER_FILE - -/* Set the following value to 0 when building without using the FIT BSP Module */ -#define FLASH_CFG_USE_FIT_BSP (1) - - -/*********************************************************************************************************************** - Configuration Options - ***********************************************************************************************************************/ -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting - * Setting to 1 includes parameter checking; 0 compiles out parameter checking - */ -#define FLASH_CFG_PARAM_CHECKING_ENABLE (1) - - -/****************************************************************************** - ENABLE CODE FLASH PROGRAMMING -******************************************************************************/ -/* If you are only using data flash, set this to 0. - * Setting to 1 includes code to program the ROM area. When programming ROM, - * code must be executed from RAM, except under certain restrictions for flash - * type 3 (see section 2.14 in App Note). See section 2.13 in the App Note for - * details on how to set up code and the linker to execute code from RAM. - */ -#define FLASH_CFG_CODE_FLASH_ENABLE (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING DATA FLASH OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces data flash API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, data flash operations return immediately after the operation has been - * started. Notification of the operation completion is done via the callback - * function. - */ -#define FLASH_CFG_DATA_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING CODE FLASH (ROM) OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces ROM API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, ROM operations return immediately after the operation has been started. - * Notification of the operation completion is done via the callback function. - * When reprogramming ROM, THE RELOCATABLE VECTOR TABLE AND CORRESPONDING - * INTERRUPT ROUTINES MUST BE IN RAM. - * See sections 2.16 Usage Notes in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE CODE FLASH SELF-PROGRAMMING -******************************************************************************/ -/* Set this to 0 when programming code flash while executing in RAM. - * Set this to 1 when programming code flash while executing from another - * segment in ROM (possible only with RX64M, RX71M, RX65N-2 groups). - * See section 2.14 in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_RUN_FROM_ROM (0) - - -/****************************************************************************** - SET IPL OF FLASH READY INTERRUPT -******************************************************************************/ -#define FLASH_CFG_FLASH_READY_IPL (5) // Flash type 2 only - - -/****************************************************************************** - ENABLE OR DISABLE LOCK BIT PROTECTION -******************************************************************************/ -/* Each erasure block has a corresponding lock bit that can be used to - * protect that block from being programmed/erased after the lock bit is - * set. The use of lock bits can be used or ignored. - * Setting this to 1 will cause lock bits to be ignored and programs/erases to a - * block will not be limited. - * Setting this to 0 will cause lock bits to be used as the user configures through - * the Control command. This only applies to ROM as the DF does not have lock bits. - */ -#define FLASH_CFG_IGNORE_LOCK_BITS (1) // Flash type 2 only - - -#endif /* FLASH_CONFIG_HEADER_FILE */ diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_config/r_s12ad_rx_config.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_config/r_s12ad_rx_config.h deleted file mode 100644 index 0202bf133a4..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_config/r_s12ad_rx_config.h +++ /dev/null @@ -1,53 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_s12ad_rx_config.h -* Description : Configures the 12-bit A/D driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 22.07.2013 1.00 Initial Release. -* 21.04.2014 1.20 Updated for RX210 advanced features; RX110/63x support. -***********************************************************************************************************************/ -#ifndef S12AD_CONFIG_H -#define S12AD_CONFIG_H - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* - * SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting. - * Setting to 1 includes parameter checking; 0 compiles out parameter checking. - */ -#define ADC_CFG_PARAM_CHECKING_ENABLE BSP_CFG_PARAM_CHECKING_ENABLE - - -/* - * RX210 Series only; Temperature Sensor Programmable Gain Amplifier (PGA) - * SELECT PGA GAIN TO MATCH AVCC0 VOLTAGE RANGE: - * 0: 1.8V <= AVcc0 < 2.7V; default; good for all actual voltages - * 1: 2.7V <= AVcc0 < 3.6V - * 2: 3.6V <= AVcc0 < 4.5V - * 3: 4.5V <= AVcc0 <= 5.5V - */ -#define ADC_CFG_PGA_GAIN (0) - - -#endif /* S12AD_CONFIG_H */ diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_config/r_sci_rx_config.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_config/r_sci_rx_config.h deleted file mode 100644 index dca437ce842..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_config/r_sci_rx_config.h +++ /dev/null @@ -1,171 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_config.h -* Description : Configures the SCI driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 25.09.2013 1.00 Initial Release -* 17.04.2014 1.20 Added comments for new RX110 support. -* 02.07.2014 1.30 Fixed bug that caused Group12 rx errors to only be enabled for channel 2. -* 25.11.2014 1.40 Added comments for RX113 support -* 30.09.2015 1.70 Added comments for RX23T support -* 01.10.2016 1.80 Added support for RX65N (comments and TX/RX FIFO THRESHOLD options) -* 19.12.2016 1.90 Added comments for RX24U support -* 07.03.2017 2.00 Added comments for RX130-512KB support -***********************************************************************************************************************/ -#ifndef SCI_CONFIG_H -#define SCI_CONFIG_H - -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING */ -/* Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting */ -/* Setting to 1 includes parameter checking; 0 compiles out parameter checking */ -#define SCI_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY WHETHER TO INCLUDE CODE FOR DIFFERENT SCI MODES */ -/* Setting an equate to 1 includes code specific to that mode. */ -#define SCI_CFG_ASYNC_INCLUDED (1) -#define SCI_CFG_SYNC_INCLUDED (0) -#define SCI_CFG_SSPI_INCLUDED (0) - -/* SPECIFY BYTE VALUE TO TRANSMIT WHILE CLOCKING IN DATA IN SSPI MODES */ -#define SCI_CFG_DUMMY_TX_BYTE (0xFF) - -/* SPECIFY CHANNELS TO INCLUDE SOFTWARE SUPPORT FOR 1=included, 0=not */ -/* - * NOTE: If using ASYNC mode, adjust BYTEQ_CFG_MAX_CTRL_BLKS in r_byteq_config.h - * to provide 2 queues per channel (static mode only). - * * = port connector RDKRX63N, RSKRX210, RSKRX11x - * u = channel used by the USB-UART port (G1CUSB0) - * a = this channel is used only for RX130-512KB - * RX MCU supported channels - * - * CH# 110 111 113 130 210 230 231 23T 24T 24U 63N 631 64M 71M 65N - * --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- - * CH0 X Xa X* X X X* X X X X - * CH1 X X* X* Xu X X X Xu Xu Xu X X X X X - * CH2 X X X X X Xu - * CH3 X X X X X - * CH4 X X X X X - * CH5 X X X X X X Xu X X X X X X X X - * CH6 X X X X X X X X X X X X - * CH7 X X Xu Xu X - * CH8 X Xa X X X X X X X - * CH9 X Xa X X X X X X X - * CH10 X X X - * CH11 X X X X - * CH12 X X X X X X X X X X X X -*/ - -#define SCI_CFG_CH0_INCLUDED (1) -#define SCI_CFG_CH1_INCLUDED (1) -#define SCI_CFG_CH2_INCLUDED (0) -#define SCI_CFG_CH3_INCLUDED (0) -#define SCI_CFG_CH4_INCLUDED (0) -#define SCI_CFG_CH5_INCLUDED (1) -#define SCI_CFG_CH6_INCLUDED (0) -#define SCI_CFG_CH7_INCLUDED (0) -#define SCI_CFG_CH8_INCLUDED (0) -#define SCI_CFG_CH9_INCLUDED (0) -#define SCI_CFG_CH10_INCLUDED (0) -#define SCI_CFG_CH11_INCLUDED (0) -#define SCI_CFG_CH12_INCLUDED (0) - -/* SPECIFY ASYNC MODE TX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_TX_BUFSIZ (1460) -#define SCI_CFG_CH1_TX_BUFSIZ (1460) -#define SCI_CFG_CH2_TX_BUFSIZ (80) -#define SCI_CFG_CH3_TX_BUFSIZ (80) -#define SCI_CFG_CH4_TX_BUFSIZ (80) -#define SCI_CFG_CH5_TX_BUFSIZ (80) -#define SCI_CFG_CH6_TX_BUFSIZ (80) -#define SCI_CFG_CH7_TX_BUFSIZ (80) -#define SCI_CFG_CH8_TX_BUFSIZ (80) -#define SCI_CFG_CH9_TX_BUFSIZ (80) -#define SCI_CFG_CH10_TX_BUFSIZ (80) -#define SCI_CFG_CH11_TX_BUFSIZ (80) -#define SCI_CFG_CH12_TX_BUFSIZ (80) - -/* SPECIFY ASYNC MODE RX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_RX_BUFSIZ (4096) -#define SCI_CFG_CH1_RX_BUFSIZ (2048) -#define SCI_CFG_CH2_RX_BUFSIZ (80) -#define SCI_CFG_CH3_RX_BUFSIZ (80) -#define SCI_CFG_CH4_RX_BUFSIZ (80) -#define SCI_CFG_CH5_RX_BUFSIZ (80) -#define SCI_CFG_CH6_RX_BUFSIZ (80) -#define SCI_CFG_CH7_RX_BUFSIZ (80) -#define SCI_CFG_CH8_RX_BUFSIZ (80) -#define SCI_CFG_CH9_RX_BUFSIZ (80) -#define SCI_CFG_CH10_RX_BUFSIZ (80) -#define SCI_CFG_CH11_RX_BUFSIZ (80) -#define SCI_CFG_CH12_RX_BUFSIZ (80) - -/* -* ENABLE TRANSMIT END INTERRUPT (ASYNCHRONOUS) -* This interrupt only occurs when the last bit of the last byte of data -* has been sent and the transmitter has become idle. The interrupt calls -* the user's callback function specified in R_SCI_Open() and passes it an -* SCI_EVT_TEI event. A typical use of this feature is to disable an external -* transceiver to save power. It would then be up to the user's code to -* re-enable the transceiver before sending again. Not including this feature -* reduces code space used by the interrupt. Note that this equate is only -* for including the TEI code. The interrupt itself must be enabled using an -* R_SCI_Control(hdl, SCI_CMD_EN_TEI, NULL) call. -*/ -#define SCI_CFG_TEI_INCLUDED (1) /* 1=included, 0=not */ - -/* -* SET GROUP12 (RECEIVER ERROR) INTERRUPT PRIORITY; RX63N/631 ONLY -* This #define sets the priority level for the interrupt that handles -* receiver overrun, framing, and parity errors for all SCI channels -* on the RX63N/631. It is ignored for all other parts. -*/ -#define SCI_CFG_RXERR_PRIORITY (3) /* (RX63N/631 ONLY) 1 lowest, 15 highest */ - -/* -* SET GROUPBL0 (ERI, TEI) INTERRUPT PRIORITY; RX64M/RX71M/RX65N ONLY -* SET GROUPBL1, GROUPAL0 (ERI,TEI) INTERRUPT PRIORITY; RX65N ONLY -* This sets the priority level for receiver overrun, framing, and parity errors -* as well as TEI interrupts for all SCI channels. -*/ -#define SCI_CFG_ERI_TEI_PRIORITY (3) /* (RX64M/RX71M/RX65N ONLY) 1 lowest, 15 highest */ - -/* ENABLE TX/RX FIFO; (SCIi supported MCU ONLY) 1=included, 0=not */ -#define SCI_CFG_CH10_FIFO_INCLUDED (0) -#define SCI_CFG_CH11_FIFO_INCLUDED (0) - -/* SET TX FIFO THRESHOLD; (SCIi supported MCU ONLY) 0 lowest, 15 highest */ -/* TX FIFO THRESHOLD is invalid in Clock Synchronous Mode and Simple SPI Mode. */ -/* Set the same value for TX FIFO THRESHOLD and RX FIFO THRESHOLD in Clock Synchronous Mode and Simple SPI Mode. */ -#define SCI_CFG_CH10_TX_FIFO_THRESH (8) -#define SCI_CFG_CH11_TX_FIFO_THRESH (8) - -/* SET RX FIFO THRESHOLD; (SCIi supported MCU ONLY) 1 lowest, 15 highest */ -#define SCI_CFG_CH10_RX_FIFO_THRESH (8) -#define SCI_CFG_CH11_RX_FIFO_THRESH (8) - - -#endif /* SCI_CONFIG_H */ diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_pinset.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_pinset.h deleted file mode 100644 index 0b0978fbc5a..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_pinset.h +++ /dev/null @@ -1,34 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_pinset.h.h -* Version : 1.0.1 -* Description : Declares all pin code headers into a single file -* Creation Date: 2019-02-04 -***********************************************************************************************************************/ - -#ifndef R_PINSET_H -#define R_PINSET_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_sci_rx_pinset.h" - -#endif /* R_PINSET_H */ diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_sci_rx_pinset.c b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_sci_rx_pinset.c deleted file mode 100644 index a7f95e83b03..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_sci_rx_pinset.c +++ /dev/null @@ -1,104 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_pinset.c -* Version : 1.0.2 -* Device(s) : R5F565NEDxFP -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2019-02-04 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_sci_rx_pinset.h" -#include "platform.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: R_SCI_PinSet_SCI0 -* Description : This function initializes pins for r_sci_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_SCI_PinSet_SCI0() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set RXD0/SMISO0 pin */ - MPC.P21PFS.BYTE = 0x0AU; - PORT2.PMR.BIT.B1 = 1U; - - /* Set TXD0/SMOSI0 pin */ - MPC.P20PFS.BYTE = 0x0AU; - PORT2.PMR.BIT.B0 = 1U; - - /* Set CTS0#/RTS0#/SS0# pin */ - MPC.P23PFS.BYTE = 0x0BU; - PORT2.PMR.BIT.B3 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - -/*********************************************************************************************************************** -* Function Name: R_SCI_PinSet_SCI1 -* Description : This function initializes pins for r_sci_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_SCI_PinSet_SCI1() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set RXD1/SMISO1 pin */ - MPC.P30PFS.BYTE = 0x0AU; - PORT3.PMR.BIT.B0 = 1U; - - /* Set TXD1/SMOSI1 pin */ - MPC.P26PFS.BYTE = 0x0AU; - PORT2.PMR.BIT.B6 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - -/*********************************************************************************************************************** -* Function Name: R_SCI_PinSet_SCI5 -* Description : This function initializes pins for r_sci_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_SCI_PinSet_SCI5() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set RXD5/SMISO5 pin */ - MPC.PA3PFS.BYTE = 0x0AU; - PORTA.PMR.BIT.B3 = 1U; - - /* Set TXD5/SMOSI5 pin */ - MPC.PA4PFS.BYTE = 0x0AU; - PORTA.PMR.BIT.B4 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_sci_rx_pinset.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_sci_rx_pinset.h deleted file mode 100644 index 5a555c7c845..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_sci_rx_pinset.h +++ /dev/null @@ -1,43 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_pinset.h -* Version : 1.0.2 -* Device(s) : R5F565NEDxFP -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2019-02-04 -***********************************************************************************************************************/ - -#ifndef R_SCI_RX_H -#define R_SCI_RX_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -void R_SCI_PinSet_SCI0(); -void R_SCI_PinSet_SCI1(); -void R_SCI_PinSet_SCI5(); - -#endif diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/attention!.txt b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/attention!.txt deleted file mode 100644 index b03e86e3868..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/attention!.txt +++ /dev/null @@ -1,30 +0,0 @@ -Please note that the following folders in the project window of IDEs are -so called 'linked' folders. - --------------------------------------------- -Linked folders in the project window of IDEs --------------------------------------------- - -src/FIT_modified_code/r_bsp -src/FIT_modified_code/r_byteq -src/FIT_modified_code/r_cmt_rx -src/FIT_modified_code/r_flash_rx -src/FIT_modified_code/r_riic_rx -src/FIT_modified_code/r_sci_iic_rx -src/FIT_modified_code/r_sci_rx -src/amazon_freertos_common - ----------------------------------------------------------- -Folders on the File System of the WINDOWS Operating System ----------------------------------------------------------- - -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_bsp -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_byteq -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_cmt_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_flash_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_riic_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_iic_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/amazon_freertos_common - -[EOF] diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/linker_script.ld b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/linker_script.ld deleted file mode 100644 index c4bdd0fe91b..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/linker_script.ld +++ /dev/null @@ -1,213 +0,0 @@ -MEMORY -{ - RAM : ORIGIN = 0x0, LENGTH = 262144 - DATAFLASH (!rx) : ORIGIN = 0x100000, LENGTH = 32768 - RAMHI : ORIGIN = 0x800000, LENGTH = 393216 - ROM : ORIGIN = 0xFFF00000, LENGTH = 1048576 - OFS : ORIGIN = 0xFE7F5D00, LENGTH = 256 -} - - - - - - - - -SECTIONS -{ - .exvectors 0xFFFFFF80 : AT(0xFFFFFF80) - { - _exvectors_start = .; - KEEP(*(.exvectors)) - _exvectors_end = .; - } >ROM - .fvectors 0xFFFFFFFC : AT(0xFFFFFFFC) - { - KEEP(*(.fvectors)) - } >ROM - .text 0xFFF00000 : AT(0xFFF00000) - { - *(.text) - *(.text.*) - *(P) - etext = .; - } >ROM - .rvectors : - { - _rvectors_start = .; - INCLUDE ../src/linker_script_rvectors.ld_inc - _rvectors_end = .; - } >ROM - .init : - { - KEEP(*(.init)) - __preinit_array_start = .; - KEEP(*(.preinit_array)) - __preinit_array_end = .; - __init_array_start = (. + 3) & ~ 3; - KEEP(*(.init_array)) - KEEP(*(SORT(.init_array.*))) - __init_array_end = .; - __fini_array_start = .; - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - __fini_array_end = .; - } >ROM - .fini : - { - KEEP(*(.fini)) - } >ROM - .got : - { - *(.got) - *(.got.plt) - } >ROM - .rodata : - { - *(.rodata) - *(.rodata.*) - *(C_1) - *(C_2) - *(C) - _erodata = .; - } >ROM - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } >ROM - .eh_frame : - { - *(.eh_frame) - } >ROM - .jcr : - { - *(.jcr) - } >ROM - .tors : - { - __CTOR_LIST__ = .; - . = ALIGN(2); - ___ctors = .; - *(.ctors) - ___ctors_end = .; - __CTOR_END__ = .; - __DTOR_LIST__ = .; - ___dtors = .; - *(.dtors) - ___dtors_end = .; - __DTOR_END__ = .; - . = ALIGN(2); - _mdata = .; - } >ROM - .r_bsp_NULL 0 : AT(0) - { - . += 0x100; - _r_bsp_NULL_end = .; - } >RAM - /* - * .r_bsp_ustack BLOCK(4) : - * { - * KEEP(*(.r_bsp_ustack)) - * } > RAM - * .ustack : - * { - * _ustack = .; - * } > RAM - */ - .r_bsp_istack BLOCK(4) : - { - KEEP(*(.r_bsp_istack)) - } >RAM - .istack : - { - _istack = .; - } >RAM - .data : AT(_mdata) - { - _data = .; - *(.data) - *(.data.*) - *(D) - *(D_1) - *(D_2) - _edata = .; - } >RAM - .gcc_exc : - { - *(.gcc_exc) - } >RAM - .bss 0x800000 : AT(0x800000) - { - _bss = .; - *(.bss) - *(.bss.**) - *(COMMON) - *(B) - *(B_1) - *(B_2) - _ebss = .; - _end = .; - } >RAMHI - B_ETHERNET_BUFFERS_1 BLOCK(32) : - { - _B_ETHERNET_BUFFERS_1_start = .; - *(B_ETHERNET_BUFFERS_1) - _B_ETHERNET_BUFFERS_1_end = .; - } >RAMHI - B_RX_DESC_1 : - { - _B_RX_DESC_1_start = .; - *(B_RX_DESC_1) - _B_RX_DESC_1_end = .; - } >RAMHI - B_TX_DESC_1 : - { - _B_TX_DESC_1_start = .; - *(B_TX_DESC_1) - _B_TX_DESC_1_end = .; - } >RAMHI - .ofs1 0xFE7F5D40 : AT(0xFE7F5D00) - { - KEEP(*(.ofs1)) - } >OFS - .ofs2 0xFE7F5D48 : AT(0xFE7F5D10) - { - KEEP(*(.ofs2)) - } >OFS - .ofs3 0xFE7F5D50 : AT(0xFE7F5D40) - { - KEEP(*(.ofs3)) - } >OFS - .ofs4 0xFE7F5D10 : AT(0xFE7F5D48) - { - KEEP(*(.ofs4)) - } >OFS - .ofs5 0xFE7F5D10 : AT(0xFE7F5D50) - { - KEEP(*(.ofs5)) - } >OFS - .ofs6 0xFE7F5D10 : AT(0xFE7F5D64) - { - KEEP(*(.ofs6)) - } >OFS - .ofs7 0xFE7F5D10 : AT(0xFE7F5D70) - { - KEEP(*(.ofs7)) - } >OFS - C_PKCS11_STORAGE_1 : - { - } >DATAFLASH - C_PKCS11_STORAGE_MIRROR_1 : - { - } >DATAFLASH -} - - - - - - - - - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/linker_script_rvectors.ld_inc b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/linker_script_rvectors.ld_inc deleted file mode 100644 index 818dda33da0..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/linker_script_rvectors.ld_inc +++ /dev/null @@ -1,256 +0,0 @@ - LONG(DEFINED($tableentry$0$.rvectors) ? $tableentry$0$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$1$.rvectors) ? $tableentry$1$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$2$.rvectors) ? $tableentry$2$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$3$.rvectors) ? $tableentry$3$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$4$.rvectors) ? $tableentry$4$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$5$.rvectors) ? $tableentry$5$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$6$.rvectors) ? $tableentry$6$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$7$.rvectors) ? $tableentry$7$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$8$.rvectors) ? $tableentry$8$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$9$.rvectors) ? $tableentry$9$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$10$.rvectors) ? $tableentry$10$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$11$.rvectors) ? $tableentry$11$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$12$.rvectors) ? $tableentry$12$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$13$.rvectors) ? $tableentry$13$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$14$.rvectors) ? $tableentry$14$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$15$.rvectors) ? $tableentry$15$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$16$.rvectors) ? $tableentry$16$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$17$.rvectors) ? $tableentry$17$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$18$.rvectors) ? $tableentry$18$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$19$.rvectors) ? $tableentry$19$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$20$.rvectors) ? $tableentry$20$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$21$.rvectors) ? $tableentry$21$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$22$.rvectors) ? $tableentry$22$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$23$.rvectors) ? $tableentry$23$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$24$.rvectors) ? $tableentry$24$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$25$.rvectors) ? $tableentry$25$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$26$.rvectors) ? $tableentry$26$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$27$.rvectors) ? $tableentry$27$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$28$.rvectors) ? $tableentry$28$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$29$.rvectors) ? $tableentry$29$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$30$.rvectors) ? $tableentry$30$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$31$.rvectors) ? $tableentry$31$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$32$.rvectors) ? $tableentry$32$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$33$.rvectors) ? $tableentry$33$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$34$.rvectors) ? $tableentry$34$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$35$.rvectors) ? $tableentry$35$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$36$.rvectors) ? $tableentry$36$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$37$.rvectors) ? $tableentry$37$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$38$.rvectors) ? $tableentry$38$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$39$.rvectors) ? $tableentry$39$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$40$.rvectors) ? $tableentry$40$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$41$.rvectors) ? $tableentry$41$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$42$.rvectors) ? $tableentry$42$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$43$.rvectors) ? $tableentry$43$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$44$.rvectors) ? $tableentry$44$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$45$.rvectors) ? $tableentry$45$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$46$.rvectors) ? $tableentry$46$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$47$.rvectors) ? $tableentry$47$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$48$.rvectors) ? $tableentry$48$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$49$.rvectors) ? $tableentry$49$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$50$.rvectors) ? $tableentry$50$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$51$.rvectors) ? $tableentry$51$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$52$.rvectors) ? $tableentry$52$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$53$.rvectors) ? $tableentry$53$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$54$.rvectors) ? $tableentry$54$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$55$.rvectors) ? $tableentry$55$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$56$.rvectors) ? $tableentry$56$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$57$.rvectors) ? $tableentry$57$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$58$.rvectors) ? $tableentry$58$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$59$.rvectors) ? $tableentry$59$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$60$.rvectors) ? $tableentry$60$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$61$.rvectors) ? $tableentry$61$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$62$.rvectors) ? $tableentry$62$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$63$.rvectors) ? $tableentry$63$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$64$.rvectors) ? $tableentry$64$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$65$.rvectors) ? $tableentry$65$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$66$.rvectors) ? $tableentry$66$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$67$.rvectors) ? $tableentry$67$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$68$.rvectors) ? $tableentry$68$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$69$.rvectors) ? $tableentry$69$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$70$.rvectors) ? $tableentry$70$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$71$.rvectors) ? $tableentry$71$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$72$.rvectors) ? $tableentry$72$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$73$.rvectors) ? $tableentry$73$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$74$.rvectors) ? $tableentry$74$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$75$.rvectors) ? $tableentry$75$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$76$.rvectors) ? $tableentry$76$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$77$.rvectors) ? $tableentry$77$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$78$.rvectors) ? $tableentry$78$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$79$.rvectors) ? $tableentry$79$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$80$.rvectors) ? $tableentry$80$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$81$.rvectors) ? $tableentry$81$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$82$.rvectors) ? $tableentry$82$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$83$.rvectors) ? $tableentry$83$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$84$.rvectors) ? $tableentry$84$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$85$.rvectors) ? $tableentry$85$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$86$.rvectors) ? $tableentry$86$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$87$.rvectors) ? $tableentry$87$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$88$.rvectors) ? $tableentry$88$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$89$.rvectors) ? $tableentry$89$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$90$.rvectors) ? $tableentry$90$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$91$.rvectors) ? $tableentry$91$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$92$.rvectors) ? $tableentry$92$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$93$.rvectors) ? $tableentry$93$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$94$.rvectors) ? $tableentry$94$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$95$.rvectors) ? $tableentry$95$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$96$.rvectors) ? $tableentry$96$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$97$.rvectors) ? $tableentry$97$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$98$.rvectors) ? $tableentry$98$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$99$.rvectors) ? $tableentry$99$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$100$.rvectors) ? $tableentry$100$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$101$.rvectors) ? $tableentry$101$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$102$.rvectors) ? $tableentry$102$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$103$.rvectors) ? $tableentry$103$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$104$.rvectors) ? $tableentry$104$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$105$.rvectors) ? $tableentry$105$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$106$.rvectors) ? $tableentry$106$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$107$.rvectors) ? $tableentry$107$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$108$.rvectors) ? $tableentry$108$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$109$.rvectors) ? $tableentry$109$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$110$.rvectors) ? $tableentry$110$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$111$.rvectors) ? $tableentry$111$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$112$.rvectors) ? $tableentry$112$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); 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- LONG(DEFINED($tableentry$253$.rvectors) ? $tableentry$253$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$254$.rvectors) ? $tableentry$254$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$255$.rvectors) ? $tableentry$255$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/UNUSED_generated_code/.placeholder b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/UNUSED_generated_code/.placeholder deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_cg_hardware_setup.c b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_cg_hardware_setup.c deleted file mode 100644 index 92bb3406c21..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_cg_hardware_setup.c +++ /dev/null @@ -1,117 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_hardware_setup.c -* Version : 1.2.3 -* Device(s) : R5F565NEDxFP -* Description : Initialization file for code generation configurations. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -#include "r_smc_cgc.h" -#include "r_smc_interrupt.h" -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ - -/* Workaround to set group interrupt priority level when it is not set in the generated function */ -static void R_Interrupt_Create_Workaround(void); -static void R_Interrupt_Create_Workaround(void) -{ - /* Call the generated function */ - R_Interrupt_Create(); - - /* In case of this project, nothing more to do. But other projects may need some code like following. */ - - /* Disable group AL1 interrupt*/ - //IEN(ICU,GROUPAL1) = 0U; - - /* Set group AL1 interrupt priority level */ - //IPR(ICU,GROUPAL1) = _02_ICU_PRIORITY_LEVEL2; - - /* Enable group AL1 interrupt */ - //IEN(ICU,GROUPAL1) = 1U; -} -#define R_Interrupt_Create R_Interrupt_Create_Workaround - -void r_undefined_exception(void); -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: r_undefined_exception -* Description : This function is undefined interrupt service routine -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void r_undefined_exception(void) -{ - /* Start user code for r_undefined_exception. Do not edit comment generated here */ - /* End user code. Do not edit comment generated here */ -} - -/*********************************************************************************************************************** -* Function Name: R_Systeminit -* Description : This function initializes every configuration -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Systeminit(void) -{ - /* Enable writing to registers related to operating modes, LPC, CGC and software reset */ - SYSTEM.PRCR.WORD = 0xA50BU; - - /* Enable writing to MPC pin function control registers */ - MPC.PWPR.BIT.B0WI = 0U; - MPC.PWPR.BIT.PFSWE = 1U; - - /* Initialize clocks settings */ - R_CGC_Create(); - - /* Register undefined interrupt */ - R_BSP_InterruptWrite(BSP_INT_SRC_UNDEFINED_INTERRUPT,(bsp_int_cb_t)r_undefined_exception); - - /* Disable writing to MPC pin function control registers */ - MPC.PWPR.BIT.PFSWE = 0U; - MPC.PWPR.BIT.B0WI = 1U; - - /* Enable protection */ - SYSTEM.PRCR.WORD = 0xA500U; -} - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_cg_interrupt_handlers.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_cg_interrupt_handlers.h deleted file mode 100644 index 498aa60cb8c..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_cg_interrupt_handlers.h +++ /dev/null @@ -1,75 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_interrupt_handlers.h -* Version : 1.2.3 -* Device(s) : R5F565NEDxFP -* Description : This file declares interrupt handlers. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef INTERRUPT_HANDLERS_H -#define INTERRUPT_HANDLERS_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* BSC BUSERR */ -void bus_error_isr(void) __attribute__ ((interrupt)); - -/* ICU GROUPBL2 */ -void group_bl2_handler_isr(void) __attribute__ ((interrupt)); - -/* ICU GROUPBL0 */ -void group_bl0_handler_isr(void) __attribute__ ((interrupt)); - -/* ICU GROUPBL1 */ -void group_bl1_handler_isr(void) __attribute__ ((interrupt)); - -/* ICU GROUPAL0 */ -void group_al0_handler_isr(void) __attribute__ ((interrupt)); - -/* ICU GROUPAL1 */ -void group_al1_handler_isr(void) __attribute__ ((interrupt)); - -/* Idle Vectors */ -void undefined_interrupt_source_isr(void) __attribute__ ((interrupt)); -/* Start user code for function. Do not edit comment generated here */ - -#include "r_cg_vector_pragma.h" - -/* End user code. Do not edit comment generated here */ -#endif diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_cg_macrodriver.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_cg_macrodriver.h deleted file mode 100644 index 9989c36c2d6..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_cg_macrodriver.h +++ /dev/null @@ -1,86 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_macrodriver.h -* Version : 1.2.3 -* Device(s) : R5F565NEDxFP -* Description : Macro header file for code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef MACRODRIVER_H -#define MACRODRIVER_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "platform.h" -#include "r_smc_interrupt.h" -#include "r_cg_interrupt_handlers.h" - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -#ifndef __TYPEDEF__ - -/* Status list definition */ -#define MD_STATUSBASE (0x00U) -#define MD_OK (MD_STATUSBASE + 0x00U) /* register setting OK */ -#define MD_SPT (MD_STATUSBASE + 0x01U) /* IIC stop */ -#define MD_NACK (MD_STATUSBASE + 0x02U) /* IIC no ACK */ -#define MD_BUSY1 (MD_STATUSBASE + 0x03U) /* busy 1 */ -#define MD_BUSY2 (MD_STATUSBASE + 0x04U) /* busy 2 */ - -/* Error list definition */ -#define MD_ERRORBASE (0x80U) -#define MD_ERROR (MD_ERRORBASE + 0x00U) /* error */ -#define MD_ARGERROR (MD_ERRORBASE + 0x01U) /* error argument input error */ -#define MD_ERROR1 (MD_ERRORBASE + 0x02U) /* error 1 */ -#define MD_ERROR2 (MD_ERRORBASE + 0x03U) /* error 2 */ -#define MD_ERROR3 (MD_ERRORBASE + 0x04U) /* error 3 */ -#define MD_ERROR4 (MD_ERRORBASE + 0x05U) /* error 4 */ -#define MD_ERROR5 (MD_ERRORBASE + 0x06U) /* error 5 */ - -#define nop() asm("nop;") -#define brk() asm("brk;") -#define wait() asm("wait;") - -#endif - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -#ifndef __TYPEDEF__ - typedef unsigned short MD_STATUS; - #define __TYPEDEF__ -#endif - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Systeminit(void); -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_cg_userdefine.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_cg_userdefine.h deleted file mode 100644 index fd38beed71a..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_cg_userdefine.h +++ /dev/null @@ -1,61 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_userdefine.h -* Version : 1.2.3 -* Device(s) : R5F565NEDxFP -* Description : User header file for code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef CG_USER_DEF_H -#define CG_USER_DEF_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ -/* Start user code for register. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* Start user code for macro define. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -/* Start user code for type define. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_cg_vector_pragma.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_cg_vector_pragma.h deleted file mode 100644 index 8e7f57d5ec3..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_cg_vector_pragma.h +++ /dev/null @@ -1,6 +0,0 @@ -R_PRAGMA_INTERRUPT(bus_error_isr, 16) -R_PRAGMA_INTERRUPT(group_bl2_handler_isr, 107) -R_PRAGMA_INTERRUPT(group_bl0_handler_isr, 110) -R_PRAGMA_INTERRUPT(group_bl1_handler_isr, 111) -R_PRAGMA_INTERRUPT(group_al0_handler_isr, 112) -R_PRAGMA_INTERRUPT(group_al1_handler_isr, 113) diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_cg_vector_table.c b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_cg_vector_table.c deleted file mode 100644 index be168ab0348..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_cg_vector_table.c +++ /dev/null @@ -1,564 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_vector_table.c -* Version : 1.2.3 -* Device(s) : R5F565NEDxFP -* Description : This file implements interrupt vector table. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -void * const Reserved_Vector[] __attribute((section(".rvectors"))) = -{ - /* 0x0000 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0004 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0008 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x000C Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0010 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0014 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0018 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x001C Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0020 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0024 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0028 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x002C Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0030 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0034 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0038 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x003C Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0040 BSC BUSERR */ - bus_error_isr, - /* 0x0044 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0048 RAM RAMERR */ - undefined_interrupt_source_isr, - /* 0x004C Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0050 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0054 FCU FIFERR */ - undefined_interrupt_source_isr, - /* 0x0058 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x005C FCU FRDYI */ - undefined_interrupt_source_isr, - /* 0x0060 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0064 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0068 ICU SWINT2 */ - undefined_interrupt_source_isr, - /* 0x006C ICU SWINT */ - undefined_interrupt_source_isr, - /* 0x0070 CMT0 CMI0 */ - undefined_interrupt_source_isr, - /* 0x0074 CMT1 CMI1 */ - undefined_interrupt_source_isr, - /* 0x0078 CMTW0 CMWI0 */ - undefined_interrupt_source_isr, - /* 0x007C CMTW1 CMWI1 */ - undefined_interrupt_source_isr, - /* 0x0080 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0084 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0088 USB0 D0FIFO0 */ - undefined_interrupt_source_isr, - /* 0x008C USB0 D1FIFO0 */ - undefined_interrupt_source_isr, - /* 0x0090 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0094 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0098 RSPI0 SPRI0 */ - undefined_interrupt_source_isr, - /* 0x009C RSPI0 SPTI0 */ - undefined_interrupt_source_isr, - /* 0x00A0 RSPI1 SPRI1 */ - undefined_interrupt_source_isr, - /* 0x00A4 RSPI1 SPTI1 */ - undefined_interrupt_source_isr, - /* 0x00A8 QSPI SPRI */ - undefined_interrupt_source_isr, - /* 0x00AC QSPI SPTI */ - undefined_interrupt_source_isr, - /* 0x00B0 SDHI SBFAI */ - undefined_interrupt_source_isr, - /* 0x00B4 MMCIF MBFAI */ - undefined_interrupt_source_isr, - /* 0x00B8 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x00BC Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x00C0 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x00C4 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x00C8 RIIC1 RXI1 */ - undefined_interrupt_source_isr, - /* 0x00CC RIIC1 TXI1 */ - undefined_interrupt_source_isr, - /* 0x00D0 RIIC0 RXI0 */ - undefined_interrupt_source_isr, - /* 0x00D4 RIIC0 TXI0 */ - undefined_interrupt_source_isr, - /* 0x00D8 RIIC2 RXI2 */ - undefined_interrupt_source_isr, - /* 0x00DC RIIC2 TXI2 */ - undefined_interrupt_source_isr, - /* 0x00E0 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x00E4 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x00E8 SCI0 RXI0 */ - undefined_interrupt_source_isr, - /* 0x00EC SCI0 TXI0 */ - undefined_interrupt_source_isr, - /* 0x00F0 SCI1 RXI1 */ - undefined_interrupt_source_isr, - /* 0x00F4 SCI1 TXI1 */ - undefined_interrupt_source_isr, - /* 0x00F8 SCI2 RXI2 */ - undefined_interrupt_source_isr, - /* 0x00FC SCI2 TXI2 */ - undefined_interrupt_source_isr, - /* 0x0100 ICU IRQ0 */ - undefined_interrupt_source_isr, - /* 0x0104 ICU IRQ1 */ - undefined_interrupt_source_isr, - /* 0x0108 ICU IRQ2 */ - undefined_interrupt_source_isr, - /* 0x010C ICU IRQ3 */ - undefined_interrupt_source_isr, - /* 0x0110 ICU IRQ4 */ - undefined_interrupt_source_isr, - /* 0x0114 ICU IRQ5 */ - undefined_interrupt_source_isr, - /* 0x0118 ICU IRQ6 */ - undefined_interrupt_source_isr, - /* 0x011C ICU IRQ7 */ - undefined_interrupt_source_isr, - /* 0x0120 ICU IRQ8 */ - undefined_interrupt_source_isr, - /* 0x0124 ICU IRQ9 */ - undefined_interrupt_source_isr, - /* 0x0128 ICU IRQ10 */ - undefined_interrupt_source_isr, - /* 0x012C ICU IRQ11 */ - undefined_interrupt_source_isr, - /* 0x0130 ICU IRQ12 */ - undefined_interrupt_source_isr, - /* 0x0134 ICU IRQ13 */ - undefined_interrupt_source_isr, - /* 0x0138 ICU IRQ14 */ - undefined_interrupt_source_isr, - /* 0x013C ICU IRQ15 */ - undefined_interrupt_source_isr, - /* 0x0140 SCI3 RXI3 */ - undefined_interrupt_source_isr, - /* 0x0144 SCI3 TXI3 */ - undefined_interrupt_source_isr, - /* 0x0148 SCI4 RXI4 */ - undefined_interrupt_source_isr, - /* 0x014C SCI4 TXI4 */ - undefined_interrupt_source_isr, - /* 0x0150 SCI5 RXI5 */ - undefined_interrupt_source_isr, - /* 0x0154 SCI5 TXI5 */ - undefined_interrupt_source_isr, - /* 0x0158 SCI6 RXI6 */ - undefined_interrupt_source_isr, - /* 0x015C SCI6 TXI6 */ - undefined_interrupt_source_isr, - /* 0x0160 LVD1 LVD1 */ - undefined_interrupt_source_isr, - /* 0x0164 LVD2 LVD2 */ - undefined_interrupt_source_isr, - /* 0x0168 USB0 USBR0 */ - undefined_interrupt_source_isr, - /* 0x016C Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0170 RTC ALM */ - undefined_interrupt_source_isr, - /* 0x0174 RTC PRD */ - undefined_interrupt_source_isr, - /* 0x0178 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x017C IWDT IWUNI */ - undefined_interrupt_source_isr, - /* 0x0180 WDT WUNI */ - undefined_interrupt_source_isr, - /* 0x0184 PDC PCDFI */ - undefined_interrupt_source_isr, - /* 0x0188 SCI7 RXI7 */ - undefined_interrupt_source_isr, - /* 0x018C SCI7 TXI7 */ - undefined_interrupt_source_isr, - /* 0x0190 SCI8 RXI8 */ - undefined_interrupt_source_isr, - /* 0x0194 SCI8 TXI8 */ - undefined_interrupt_source_isr, - /* 0x0198 SCI9 RXI9 */ - undefined_interrupt_source_isr, - /* 0x019C SCI9 TXI9 */ - undefined_interrupt_source_isr, - /* 0x01A0 SCI10 RXI10 */ - undefined_interrupt_source_isr, - /* 0x01A4 SCI10 TXI10 */ - undefined_interrupt_source_isr, - /* 0x01A8 ICU GROUPBE0 */ - undefined_interrupt_source_isr, - /* 0x01AC ICU GROUPBL2 */ - group_bl2_handler_isr, - /* 0x01B0 RSPI2 SPRI2 */ - undefined_interrupt_source_isr, - /* 0x01B4 RSPI2 SPTI2 */ - undefined_interrupt_source_isr, - /* 0x01B8 ICU GROUPBL0 */ - group_bl0_handler_isr, - /* 0x01BC ICU GROUPBL1 */ - group_bl1_handler_isr, - /* 0x01C0 ICU GROUPAL0 */ - group_al0_handler_isr, - /* 0x01C4 ICU GROUPAL1 */ - group_al1_handler_isr, - /* 0x01C8 SCI11 RXI11 */ - undefined_interrupt_source_isr, - /* 0x01CC SCI11 TXI11 */ - undefined_interrupt_source_isr, - /* 0x01D0 SCI12 RXI12 */ - undefined_interrupt_source_isr, - /* 0x01D4 SCI12 TXI12 */ - undefined_interrupt_source_isr, - /* 0x01D8 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x01DC Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x01E0 DMAC DMAC0I */ - undefined_interrupt_source_isr, - /* 0x01E4 DMAC DMAC1I */ - undefined_interrupt_source_isr, - /* 0x01E8 DMAC DMAC2I */ - undefined_interrupt_source_isr, - /* 0x01EC DMAC DMAC3I */ - undefined_interrupt_source_isr, - /* 0x01F0 DMAC DMAC74I */ - undefined_interrupt_source_isr, - /* 0x01F4 OST OSTDI */ - undefined_interrupt_source_isr, - /* 0x01F8 EXDMAC EXDMAC0I */ - undefined_interrupt_source_isr, - /* 0x01FC EXDMAC EXDMAC1I */ - undefined_interrupt_source_isr, - /* 0x0200 PERIB INTB128 */ - undefined_interrupt_source_isr, - /* 0x0204 PERIB INTB129 */ - undefined_interrupt_source_isr, - /* 0x0208 PERIB INTB130 */ - undefined_interrupt_source_isr, - /* 0x020C PERIB INTB131 */ - undefined_interrupt_source_isr, - /* 0x0210 PERIB INTB132 */ - undefined_interrupt_source_isr, - /* 0x0214 PERIB INTB133 */ - undefined_interrupt_source_isr, - /* 0x0218 PERIB INTB134 */ - undefined_interrupt_source_isr, - /* 0x021C PERIB INTB135 */ - undefined_interrupt_source_isr, - /* 0x0220 PERIB INTB136 */ - undefined_interrupt_source_isr, - /* 0x0224 PERIB INTB137 */ - undefined_interrupt_source_isr, - /* 0x0228 PERIB INTB138 */ - undefined_interrupt_source_isr, - /* 0x022C PERIB INTB139 */ - undefined_interrupt_source_isr, - /* 0x0230 PERIB INTB140 */ - undefined_interrupt_source_isr, - /* 0x0234 PERIB INTB141 */ - undefined_interrupt_source_isr, - /* 0x0238 PERIB INTB142 */ - undefined_interrupt_source_isr, - /* 0x023C PERIB INTB143 */ - undefined_interrupt_source_isr, - /* 0x0240 PERIB INTB144 */ - undefined_interrupt_source_isr, - /* 0x0244 PERIB INTB145 */ - undefined_interrupt_source_isr, - /* 0x0248 PERIB INTB146 */ - undefined_interrupt_source_isr, - /* 0x024C PERIB INTB147 */ - undefined_interrupt_source_isr, - /* 0x0250 PERIB INTB148 */ - undefined_interrupt_source_isr, - /* 0x0254 PERIB INTB149 */ - undefined_interrupt_source_isr, - /* 0x0258 PERIB INTB150 */ - undefined_interrupt_source_isr, - /* 0x025C PERIB INTB151 */ - undefined_interrupt_source_isr, - /* 0x0260 PERIB INTB152 */ - undefined_interrupt_source_isr, - /* 0x0264 PERIB INTB153 */ - undefined_interrupt_source_isr, - /* 0x0268 PERIB INTB154 */ - undefined_interrupt_source_isr, - /* 0x026C PERIB INTB155 */ - undefined_interrupt_source_isr, - /* 0x0270 PERIB INTB156 */ - undefined_interrupt_source_isr, - /* 0x0274 PERIB INTB157 */ - undefined_interrupt_source_isr, - /* 0x0278 PERIB INTB158 */ - undefined_interrupt_source_isr, - /* 0x027C PERIB INTB159 */ - undefined_interrupt_source_isr, - /* 0x0280 PERIB INTB160 */ - undefined_interrupt_source_isr, - /* 0x0284 PERIB INTB161 */ - undefined_interrupt_source_isr, - /* 0x0288 PERIB INTB162 */ - undefined_interrupt_source_isr, - /* 0x028C PERIB INTB163 */ - undefined_interrupt_source_isr, - /* 0x0290 PERIB INTB164 */ - undefined_interrupt_source_isr, - /* 0x0294 PERIB INTB165 */ - undefined_interrupt_source_isr, - /* 0x0298 PERIB INTB166 */ - undefined_interrupt_source_isr, - /* 0x029C PERIB INTB167 */ - undefined_interrupt_source_isr, - /* 0x02A0 PERIB INTB168 */ - undefined_interrupt_source_isr, - /* 0x02A4 PERIB INTB169 */ - undefined_interrupt_source_isr, - /* 0x02A8 PERIB INTB170 */ - undefined_interrupt_source_isr, - /* 0x02AC PERIB INTB171 */ - undefined_interrupt_source_isr, - /* 0x02B0 PERIB INTB172 */ - undefined_interrupt_source_isr, - /* 0x02B4 PERIB INTB173 */ - undefined_interrupt_source_isr, - /* 0x02B8 PERIB INTB174 */ - undefined_interrupt_source_isr, - /* 0x02BC PERIB INTB175 */ - undefined_interrupt_source_isr, - /* 0x02C0 PERIB INTB176 */ - undefined_interrupt_source_isr, - /* 0x02C4 PERIB INTB177 */ - undefined_interrupt_source_isr, - /* 0x02C8 PERIB INTB178 */ - undefined_interrupt_source_isr, - /* 0x02CC PERIB INTB179 */ - undefined_interrupt_source_isr, - /* 0x02D0 PERIB INTB180 */ - undefined_interrupt_source_isr, - /* 0x02D4 PERIB INTB181 */ - undefined_interrupt_source_isr, - /* 0x02D8 PERIB INTB182 */ - undefined_interrupt_source_isr, - /* 0x02DC PERIB INTB183 */ - undefined_interrupt_source_isr, - /* 0x02E0 PERIB INTB184 */ - undefined_interrupt_source_isr, - /* 0x02E4 PERIB INTB185 */ - undefined_interrupt_source_isr, - /* 0x02E8 PERIB INTB186 */ - undefined_interrupt_source_isr, - /* 0x02EC PERIB INTB187 */ - undefined_interrupt_source_isr, - /* 0x02F0 PERIB INTB188 */ - undefined_interrupt_source_isr, - /* 0x02F4 PERIB INTB189 */ - undefined_interrupt_source_isr, - /* 0x02F8 PERIB INTB190 */ - undefined_interrupt_source_isr, - /* 0x02FC PERIB INTB191 */ - undefined_interrupt_source_isr, - /* 0x0300 PERIB INTB192 */ - undefined_interrupt_source_isr, - /* 0x0304 PERIB INTB193 */ - undefined_interrupt_source_isr, - /* 0x0308 PERIB INTB194 */ - undefined_interrupt_source_isr, - /* 0x030C PERIB INTB195 */ - undefined_interrupt_source_isr, - /* 0x0310 PERIB INTB196 */ - undefined_interrupt_source_isr, - /* 0x0314 PERIB INTB197 */ - undefined_interrupt_source_isr, - /* 0x0318 PERIB INTB198 */ - undefined_interrupt_source_isr, - /* 0x031C PERIB INTB199 */ - undefined_interrupt_source_isr, - /* 0x0320 PERIB INTB200 */ - undefined_interrupt_source_isr, - /* 0x0324 PERIB INTB201 */ - undefined_interrupt_source_isr, - /* 0x0328 PERIB INTB202 */ - undefined_interrupt_source_isr, - /* 0x032C PERIB INTB203 */ - undefined_interrupt_source_isr, - /* 0x0330 PERIB INTB204 */ - undefined_interrupt_source_isr, - /* 0x0334 PERIB INTB205 */ - undefined_interrupt_source_isr, - /* 0x0338 PERIB INTB206 */ - undefined_interrupt_source_isr, - /* 0x033C PERIB INTB207 */ - undefined_interrupt_source_isr, - /* 0x0340 PERIA INTA208 */ - undefined_interrupt_source_isr, - /* 0x0344 PERIA INTA209 */ - undefined_interrupt_source_isr, - /* 0x0348 PERIA INTA210 */ - undefined_interrupt_source_isr, - /* 0x034C PERIA INTA211 */ - undefined_interrupt_source_isr, - /* 0x0350 PERIA INTA212 */ - undefined_interrupt_source_isr, - /* 0x0354 PERIA INTA213 */ - undefined_interrupt_source_isr, - /* 0x0358 PERIA INTA214 */ - undefined_interrupt_source_isr, - /* 0x035C PERIA INTA215 */ - undefined_interrupt_source_isr, - /* 0x0360 PERIA INTA216 */ - undefined_interrupt_source_isr, - /* 0x0364 PERIA INTA217 */ - undefined_interrupt_source_isr, - /* 0x0368 PERIA INTA218 */ - undefined_interrupt_source_isr, - /* 0x036C PERIA INTA219 */ - undefined_interrupt_source_isr, - /* 0x0370 PERIA INTA220 */ - undefined_interrupt_source_isr, - /* 0x0374 PERIA INTA221 */ - undefined_interrupt_source_isr, - /* 0x0378 PERIA INTA222 */ - undefined_interrupt_source_isr, - /* 0x037C PERIA INTA223 */ - undefined_interrupt_source_isr, - /* 0x0380 PERIA INTA224 */ - undefined_interrupt_source_isr, - /* 0x0384 PERIA INTA225 */ - undefined_interrupt_source_isr, - /* 0x0388 PERIA INTA226 */ - undefined_interrupt_source_isr, - /* 0x038C PERIA INTA227 */ - undefined_interrupt_source_isr, - /* 0x0390 PERIA INTA228 */ - undefined_interrupt_source_isr, - /* 0x0394 PERIA INTA229 */ - undefined_interrupt_source_isr, - /* 0x0398 PERIA INTA230 */ - undefined_interrupt_source_isr, - /* 0x039C PERIA INTA231 */ - undefined_interrupt_source_isr, - /* 0x03A0 PERIA INTA232 */ - undefined_interrupt_source_isr, - /* 0x03A4 PERIA INTA233 */ - undefined_interrupt_source_isr, - /* 0x03A8 PERIA INTA234 */ - undefined_interrupt_source_isr, - /* 0x03AC PERIA INTA235 */ - undefined_interrupt_source_isr, - /* 0x03B0 PERIA INTA236 */ - undefined_interrupt_source_isr, - /* 0x03B4 PERIA INTA237 */ - undefined_interrupt_source_isr, - /* 0x03B8 PERIA INTA238 */ - undefined_interrupt_source_isr, - /* 0x03BC PERIA INTA239 */ - undefined_interrupt_source_isr, - /* 0x03C0 PERIA INTA240 */ - undefined_interrupt_source_isr, - /* 0x03C4 PERIA INTA241 */ - undefined_interrupt_source_isr, - /* 0x03C8 PERIA INTA242 */ - undefined_interrupt_source_isr, - /* 0x03CC PERIA INTA243 */ - undefined_interrupt_source_isr, - /* 0x03D0 PERIA INTA244 */ - undefined_interrupt_source_isr, - /* 0x03D4 PERIA INTA245 */ - undefined_interrupt_source_isr, - /* 0x03D8 PERIA INTA246 */ - undefined_interrupt_source_isr, - /* 0x03DC PERIA INTA247 */ - undefined_interrupt_source_isr, - /* 0x03E0 PERIA INTA248 */ - undefined_interrupt_source_isr, - /* 0x03E4 PERIA INTA249 */ - undefined_interrupt_source_isr, - /* 0x03E8 PERIA INTA250 */ - undefined_interrupt_source_isr, - /* 0x03EC PERIA INTA251 */ - undefined_interrupt_source_isr, - /* 0x03F0 PERIA INTA252 */ - undefined_interrupt_source_isr, - /* 0x03F4 PERIA INTA253 */ - undefined_interrupt_source_isr, - /* 0x03F8 PERIA INTA254 */ - undefined_interrupt_source_isr, - /* 0x03FC PERIA INTA255 */ - undefined_interrupt_source_isr -}; -/* Start user code for global. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_smc_cgc.c b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_smc_cgc.c deleted file mode 100644 index 32aac4fb8d7..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_smc_cgc.c +++ /dev/null @@ -1,45 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc.c -* Version : 1.2.0 -* Device(s) : R5F565NEDxFP -* Description : This file implements cgc setting -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -#include "r_smc_cgc.h" -#include "platform.h" - -/*********************************************************************************************************************** -* Function Name: R_CGC_Create -* Description : This function Used to initializes the clock generator -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_CGC_Create(void) -{ - - R_CGC_Create_UserInit(); -} diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_smc_cgc.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_smc_cgc.h deleted file mode 100644 index 2cd4c48584a..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_smc_cgc.h +++ /dev/null @@ -1,217 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc.h -* Version : 1.2.0 -* Device(s) : R5F565NEDxFP -* Description : This file implements cgc setting. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_CGC_H -#define SMC_CGC_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ -/* - System Clock Control Register (SCKCR) -*/ -/* Peripheral Module Clock D (PCLKD) */ -#define _00000000_CGC_PCLKD_DIV_1 (0x00000000UL) /* x1 */ -#define _00000001_CGC_PCLKD_DIV_2 (0x00000001UL) /* x1/2 */ -#define _00000002_CGC_PCLKD_DIV_4 (0x00000002UL) /* x1/4 */ -#define _00000003_CGC_PCLKD_DIV_8 (0x00000003UL) /* x1/8 */ -#define _00000004_CGC_PCLKD_DIV_16 (0x00000004UL) /* x1/16 */ -#define _00000005_CGC_PCLKD_DIV_32 (0x00000005UL) /* x1/32 */ -#define _00000006_CGC_PCLKD_DIV_64 (0x00000006UL) /* x1/64 */ -/* Peripheral Module Clock C (PCLKC) */ -#define _00000000_CGC_PCLKC_DIV_1 (0x00000000UL) /* x1 */ -#define _00000010_CGC_PCLKC_DIV_2 (0x00000010UL) /* x1/2 */ -#define _00000020_CGC_PCLKC_DIV_4 (0x00000020UL) /* x1/4 */ -#define _00000030_CGC_PCLKC_DIV_8 (0x00000030UL) /* x1/8 */ -#define _00000040_CGC_PCLKC_DIV_16 (0x00000040UL) /* x1/16 */ -#define _00000050_CGC_PCLKC_DIV_32 (0x00000050UL) /* x1/32 */ -#define _00000060_CGC_PCLKC_DIV_64 (0x00000060UL) /* x1/64 */ -/* Peripheral Module Clock B (PCLKB) */ -#define _00000000_CGC_PCLKB_DIV_1 (0x00000000UL) /* x1 */ -#define _00000100_CGC_PCLKB_DIV_2 (0x00000100UL) /* x1/2 */ -#define _00000200_CGC_PCLKB_DIV_4 (0x00000200UL) /* x1/4 */ -#define _00000300_CGC_PCLKB_DIV_8 (0x00000300UL) /* x1/8 */ -#define _00000400_CGC_PCLKB_DIV_16 (0x00000400UL) /* x1/16 */ -#define _00000500_CGC_PCLKB_DIV_32 (0x00000500UL) /* x1/32 */ -#define _00000600_CGC_PCLKB_DIV_64 (0x00000600UL) /* x1/64 */ -/* Peripheral Module Clock A (PCLKA) */ -#define _00000000_CGC_PCLKA_DIV_1 (0x00000000UL) /* x1 */ -#define _00001000_CGC_PCLKA_DIV_2 (0x00001000UL) /* x1/2 */ -#define _00002000_CGC_PCLKA_DIV_4 (0x00002000UL) /* x1/4 */ -#define _00003000_CGC_PCLKA_DIV_8 (0x00003000UL) /* x1/8 */ -#define _00004000_CGC_PCLKA_DIV_16 (0x00004000UL) /* x1/16 */ -#define _00005000_CGC_PCLKA_DIV_32 (0x00005000UL) /* x1/32 */ -#define _00006000_CGC_PCLKA_DIV_64 (0x00006000UL) /* x1/64 */ -/* External Bus Clock (BCLK) */ -#define _00000000_CGC_BCLK_DIV_1 (0x00000000UL) /* x1 */ -#define _00010000_CGC_BCLK_DIV_2 (0x00010000UL) /* x1/2 */ -#define _00020000_CGC_BCLK_DIV_4 (0x00020000UL) /* x1/4 */ -#define _00030000_CGC_BCLK_DIV_8 (0x00030000UL) /* x1/8 */ -#define _00040000_CGC_BCLK_DIV_16 (0x00040000UL) /* x1/16 */ -#define _00050000_CGC_BCLK_DIV_32 (0x00050000UL) /* x1/32 */ -#define _00060000_CGC_BCLK_DIV_64 (0x00060000UL) /* x1/64 */ -/* System Clock (ICLK) */ -#define _00000000_CGC_ICLK_DIV_1 (0x00000000UL) /* x1 */ -#define _01000000_CGC_ICLK_DIV_2 (0x01000000UL) /* x1/2 */ -#define _02000000_CGC_ICLK_DIV_4 (0x02000000UL) /* x1/4 */ -#define _03000000_CGC_ICLK_DIV_8 (0x03000000UL) /* x1/8 */ -#define _04000000_CGC_ICLK_DIV_16 (0x04000000UL) /* x1/16 */ -#define _05000000_CGC_ICLK_DIV_32 (0x05000000UL) /* x1/32 */ -#define _06000000_CGC_ICLK_DIV_64 (0x06000000UL) /* x1/64 */ -/* System Clock (FCLK) */ -#define _00000000_CGC_FCLK_DIV_1 (0x00000000UL) /* x1 */ -#define _10000000_CGC_FCLK_DIV_2 (0x10000000UL) /* x1/2 */ -#define _20000000_CGC_FCLK_DIV_4 (0x20000000UL) /* x1/4 */ -#define _30000000_CGC_FCLK_DIV_8 (0x30000000UL) /* x1/8 */ -#define _40000000_CGC_FCLK_DIV_16 (0x40000000UL) /* x1/16 */ -#define _50000000_CGC_FCLK_DIV_32 (0x50000000UL) /* x1/32 */ -#define _60000000_CGC_FCLK_DIV_64 (0x60000000UL) /* x1/64 */ - -/* - System Clock Control Register 2 (SCKCR2) -*/ -#define _0010_CGC_UCLK_DIV_1 (0x0010U) /* x1/2 */ -#define _0020_CGC_UCLK_DIV_3 (0x0020U) /* x1/3 */ -#define _0030_CGC_UCLK_DIV_4 (0x0030U) /* x1/4 */ -#define _0040_CGC_UCLK_DIV_5 (0x0040U) /* x1/5 */ -#define _0001_SCKCR2_BIT0 (0x0001U) /* RESERVE BIT0 */ - -/* - System Clock Control Register 3 (SCKCR3) -*/ -#define _0000_CGC_CLOCKSOURCE_LOCO (0x0000U) /* LOCO */ -#define _0100_CGC_CLOCKSOURCE_HOCO (0x0100U) /* HOCO */ -#define _0200_CGC_CLOCKSOURCE_MAINCLK (0x0200U) /* Main clock oscillator */ -#define _0300_CGC_CLOCKSOURCE_SUBCLK (0x0300U) /* Sub-clock oscillator */ -#define _0400_CGC_CLOCKSOURCE_PLL (0x0400U) /* PLL circuit */ - -/* - PLL Control Register (PLLCR) -*/ -/* PLL Input Frequency Division Ratio Select (PLIDIV[1:0]) */ -#define _0000_CGC_PLL_FREQ_DIV_1 (0x0000U) /* x1 */ -#define _0001_CGC_PLL_FREQ_DIV_2 (0x0001U) /* x1/2 */ -#define _0002_CGC_PLL_FREQ_DIV_3 (0x0002U) /* x1/3 */ -/* PLL Clock Source Select (PLLSRCSEL) */ -#define _0000_CGC_PLL_SOURCE_MAIN (0x0000U) /* Main clock oscillator */ -#define _0010_CGC_PLL_SOURCE_HOCO (0x0010U) /* HOCO */ -/* Frequency Multiplication Factor Select (STC[5:0]) */ -#define _1300_CGC_PLL_FREQ_MUL_10_0 (0x1300U) /* x10.0 */ -#define _1400_CGC_PLL_FREQ_MUL_10_5 (0x1400U) /* x10.5 */ -#define _1500_CGC_PLL_FREQ_MUL_11_0 (0x1500U) /* x11.0 */ -#define _1600_CGC_PLL_FREQ_MUL_11_5 (0x1600U) /* x11.5 */ -#define _1700_CGC_PLL_FREQ_MUL_12_0 (0x1700U) /* x12.0 */ -#define _1800_CGC_PLL_FREQ_MUL_12_5 (0x1800U) /* x12.5 */ -#define _1900_CGC_PLL_FREQ_MUL_13_0 (0x1900U) /* x13.0 */ -#define _1A00_CGC_PLL_FREQ_MUL_13_5 (0x1A00U) /* x13.5 */ -#define _1B00_CGC_PLL_FREQ_MUL_14_0 (0x1B00U) /* x14.0 */ -#define _1C00_CGC_PLL_FREQ_MUL_14_5 (0x1C00U) /* x14.5 */ -#define _1D00_CGC_PLL_FREQ_MUL_15_0 (0x1D00U) /* x15.0 */ -#define _1E00_CGC_PLL_FREQ_MUL_15_5 (0x1E00U) /* x15.5 */ -#define _1F00_CGC_PLL_FREQ_MUL_16_0 (0x1F00U) /* x16.0 */ -#define _2000_CGC_PLL_FREQ_MUL_16_5 (0x2000U) /* x16.5 */ -#define _2100_CGC_PLL_FREQ_MUL_17_0 (0x2100U) /* x17.0 */ -#define _2200_CGC_PLL_FREQ_MUL_17_5 (0x2200U) /* x17.5 */ -#define _2300_CGC_PLL_FREQ_MUL_18_0 (0x2300U) /* x18.0 */ -#define _2400_CGC_PLL_FREQ_MUL_18_5 (0x2400U) /* x18.5 */ -#define _2500_CGC_PLL_FREQ_MUL_19_0 (0x2500U) /* x19.0 */ -#define _2600_CGC_PLL_FREQ_MUL_19_5 (0x2600U) /* x19.5 */ -#define _2700_CGC_PLL_FREQ_MUL_20_0 (0x2700U) /* x20.0 */ -#define _2800_CGC_PLL_FREQ_MUL_20_5 (0x2800U) /* x20.5 */ -#define _2900_CGC_PLL_FREQ_MUL_21_0 (0x2900U) /* x21.0 */ -#define _2A00_CGC_PLL_FREQ_MUL_21_5 (0x2A00U) /* x21.5 */ -#define _2B00_CGC_PLL_FREQ_MUL_22_0 (0x2B00U) /* x22.0 */ -#define _2C00_CGC_PLL_FREQ_MUL_22_5 (0x2C00U) /* x22.5 */ -#define _2D00_CGC_PLL_FREQ_MUL_23_0 (0x2D00U) /* x23.0 */ -#define _2E00_CGC_PLL_FREQ_MUL_23_5 (0x2E00U) /* x23.5 */ -#define _2F00_CGC_PLL_FREQ_MUL_24_0 (0x2F00U) /* x24.0 */ -#define _3000_CGC_PLL_FREQ_MUL_24_5 (0x3000U) /* x24.5 */ -#define _3100_CGC_PLL_FREQ_MUL_25_0 (0x3100U) /* x25.0 */ -#define _3200_CGC_PLL_FREQ_MUL_25_5 (0x3200U) /* x25.5 */ -#define _3300_CGC_PLL_FREQ_MUL_26_0 (0x3300U) /* x26.0 */ -#define _3400_CGC_PLL_FREQ_MUL_26_5 (0x3400U) /* x26.5 */ -#define _3500_CGC_PLL_FREQ_MUL_27_0 (0x3500U) /* x27.0 */ -#define _3600_CGC_PLL_FREQ_MUL_27_5 (0x3600U) /* x27.5 */ -#define _3700_CGC_PLL_FREQ_MUL_28_0 (0x3700U) /* x28.0 */ -#define _3800_CGC_PLL_FREQ_MUL_28_5 (0x3800U) /* x28.5 */ -#define _3900_CGC_PLL_FREQ_MUL_29_0 (0x3900U) /* x29.0 */ -#define _3A00_CGC_PLL_FREQ_MUL_29_5 (0x3A00U) /* x29.5 */ -#define _3B00_CGC_PLL_FREQ_MUL_30_0 (0x3B00U) /* x30.0 */ - -/* - Oscillation Stop Detection Control Register (OSTDCR) -*/ -/* Oscillation Stop Detection Interrupt Enable (OSTDIE) */ -#define _00_CGC_OSC_STOP_INT_DISABLE (0x00U) /* The oscillation stop detection interrupt is disabled */ -#define _01_CGC_OSC_STOP_INT_ENABLE (0x01U) /* The oscillation stop detection interrupt is enabled */ -/* Oscillation Stop Detection Function Enable (OSTDE) */ -#define _00_CGC_OSC_STOP_DISABLE (0x00U) /* Oscillation stop detection function is disabled */ -#define _80_CGC_OSC_STOP_ENABLE (0x80U) /* Oscillation stop detection function is enabled */ - -/* - High-Speed On-Chip Oscillator Control Register 2 (HOCOCR2) -*/ -/* HOCO Frequency Setting (HCFRQ[1:0]) */ -#define _00_CGC_HOCO_CLK_16 (0x00U) /* 16 MHz */ -#define _01_CGC_HOCO_CLK_18 (0x01U) /* 18 MHz */ -#define _02_CGC_HOCO_CLK_20 (0x02U) /* 20 MHz */ - -/* - Main Clock Oscillator Forced Oscillation Control Register (MOFCR) -*/ -/* Main Oscillator Drive Capability 2 Switching (MODRV2[1:0]) */ -#define _00_CGC_MAINOSC_UNDER24M (0x00U) /* 20.1 to 24 MHz */ -#define _10_CGC_MAINOSC_UNDER20M (0x10U) /* 16.1 to 20 MHz */ -#define _20_CGC_MAINOSC_UNDER16M (0x20U) /* 8.1 to 16 MHz */ -#define _30_CGC_MAINOSC_EQUATE8M (0x30U) /* 8 MHz */ -/* Main Clock Oscillator Switch (MOSEL) */ -#define _00_CGC_MAINOSC_RESONATOR (0x00U) /* Resonator */ -#define _40_CGC_MAINOSC_EXTERNAL (0x40U) /* External oscillator input */ - -/* - RTC Control Register 4 (RCR4) -*/ -/* Count source select */ -#define _00_RTC_SOURCE_SELECT_SUB (0x00U) /* Select sub-clock oscillator */ -#define _01_RTC_SOURCE_SELECT_MAIN_FORCED (0x01U) /* Select main clock oscillator */ -#define _53_CGC_MOSCWTCR_VALUE (0x53U) /* Main Clock Oscillator Wait Time */ -#define _21_CGC_SOSCWTCR_VALUE (0x21U) /* Sub-Clock Oscillator Wait Time */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_CGC_Create(void); -void R_CGC_Create_UserInit(); -#endif diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_smc_cgc_user.c b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_smc_cgc_user.c deleted file mode 100644 index 550faa9aa46..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_smc_cgc_user.c +++ /dev/null @@ -1,64 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc_user.c -* Version : 1.2.0 -* Device(s) : R5F565NEDxFP -* Description : None -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -/* Start user code for include. Do not edit comment generated here */ -#include "r_smc_cgc.h" -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: R_CGC_Create_UserInit -* Description : This function adds user code after initializing CGC -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_CGC_Create_UserInit(void) -{ - /* Start user code for code init. Do not edit comment generated here */ - /* End user code. Do not edit comment generated here */ -} - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_smc_entry.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_smc_entry.h deleted file mode 100644 index eb12c57a7b8..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_smc_entry.h +++ /dev/null @@ -1,54 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_entry.h -* Version : 1.2.3 -* Device(s) : R5F565NEDxFP -* Description : SMC platform header file. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_ENTRY_H -#define SMC_ENTRY_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_smc_interrupt.c b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_smc_interrupt.c deleted file mode 100644 index 5bbd3a04486..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_smc_interrupt.c +++ /dev/null @@ -1,44 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_interrupt.c -* Version : 1.1.0 -* Device(s) : R5F565NEDxFP -* Description : This file implements interrupt setting -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_smc_interrupt.h" -#include "platform.h" - -/*********************************************************************************************************************** -* Function Name: R_Interrupt_Create -* Description : This function Used to set the fast interrupt or group interrupt -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Interrupt_Create(void) -{ - /* No fast interrupt and group settings have been configured in the Interrupts tab. */ -} - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_smc_interrupt.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_smc_interrupt.h deleted file mode 100644 index c79ccd19ff1..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/general/r_smc_interrupt.h +++ /dev/null @@ -1,290 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_interrupt.h -* Version : 1.1.0 -* Device(s) : R5F565NEDxFP -* Description : This file implements interrupt setting. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_INTERRUPT_H -#define SMC_INTERRUPT_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/* Priority level of interrupt source. - * These macro definitions are used to set the IPR register directly - */ -#define _00_ICU_PRIORITY_LEVEL0 (0x00U) /* Level 0 (disabled) */ -#define _01_ICU_PRIORITY_LEVEL1 (0x01U) /* Level 1 */ -#define _02_ICU_PRIORITY_LEVEL2 (0x02U) /* Level 2 */ -#define _03_ICU_PRIORITY_LEVEL3 (0x03U) /* Level 3 */ -#define _04_ICU_PRIORITY_LEVEL4 (0x04U) /* Level 4 */ -#define _05_ICU_PRIORITY_LEVEL5 (0x05U) /* Level 5 */ -#define _06_ICU_PRIORITY_LEVEL6 (0x06U) /* Level 6 */ -#define _07_ICU_PRIORITY_LEVEL7 (0x07U) /* Level 7 */ -#define _08_ICU_PRIORITY_LEVEL8 (0x08U) /* Level 8 */ -#define _09_ICU_PRIORITY_LEVEL9 (0x09U) /* Level 9 */ -#define _0A_ICU_PRIORITY_LEVEL10 (0x0AU) /* Level 10 */ -#define _0B_ICU_PRIORITY_LEVEL11 (0x0BU) /* Level 11 */ -#define _0C_ICU_PRIORITY_LEVEL12 (0x0CU) /* Level 12 */ -#define _0D_ICU_PRIORITY_LEVEL13 (0x0DU) /* Level 13 */ -#define _0E_ICU_PRIORITY_LEVEL14 (0x0EU) /* Level 14 */ -#define _0F_ICU_PRIORITY_LEVEL15 (0x0FU) /* Level 15 */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* The macro definitions below list the full set of priority levels as selected in the Interrupts tab - * Please do not modify this file manually - */ -#define ICU_BSC_BUSERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RAM_RAMERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_FCU_FIFERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_FCU_FRDYI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_SWINT2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_SWINT_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT0_CMI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT1_CMI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_CMWI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_CMWI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_D0FIFO0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_D1FIFO0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI0_SPRI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI0_SPTI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI1_SPRI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI1_SPTI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_QSPI_SPRI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_QSPI_SPTI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SDHI_SBFAI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MMCIF_MBFAI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC1_RXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC1_TXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC0_RXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC0_TXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC2_RXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC2_TXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI0_RXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI0_TXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI1_RXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI1_TXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI2_RXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI2_TXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ13_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ14_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ15_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI3_RXI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI3_TXI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI4_RXI4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI4_TXI4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI5_RXI5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI5_TXI5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI6_RXI6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI6_TXI6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_LVD1_LVD1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_LVD2_LVD2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_USBR0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_ALM_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_PRD_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_IWDT_IWUNI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_WDT_WUNI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PDC_PCDFI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI7_RXI7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI7_TXI7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI8_RXI8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI8_TXI8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI9_RXI9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI9_TXI9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI10_RXI10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI10_TXI10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBE0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI2_SPRI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI2_SPTI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPAL0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPAL1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI11_RXI11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI11_TXI11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI12_RXI12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI12_TXI12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC0I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC1I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC2I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC3I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC74I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_OST_OSTDI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EXDMAC_EXDMAC0I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EXDMAC_EXDMAC1I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT2_CMI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT3_CMI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0C_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0D_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TCI0V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TGI1B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TCI1V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TCI1U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TGI2A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TGI2B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TCI2V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TCI2U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TGI1A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3C_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_CMIA0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_CMIB0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_OVI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_CMIA1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_CMIB1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_OVI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_CMIA2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_CMIB2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_OVI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_CMIA3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_CMIB3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_OVI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3D_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TCI3V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TGI4A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TGI4B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TCI4V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TCI4U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TGI5A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TGI5B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TCI5V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TCI5U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_IC0I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_IC1I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_OC0I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_OC1I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_IC0I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_IC1I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_OC0I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_OC1I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_CUP_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_RXF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_TXF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_RXM0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_TXM0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_RXF1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_TXF1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_RXM1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_TXM1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_USBI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12ADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12GBADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12GCADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12ADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12GBADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12GCADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB192_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ELC_ELSR18I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ELC_ELSR19I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_PROC_BUSY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_ROMOK_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_LONG_PLG_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_TEST_BUSY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_WRRDY0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_WRRDY1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_WRRDY4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_RDRDY0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_RDRDY1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_INTEGRATE_WRRDY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_INTEGRATE_RDRDY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB206_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB207_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TGIA1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIA0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIB0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIC0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGID0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TCIV0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIE0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TGIB1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TCIV1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TCIU1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TGIA2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TGIB2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TCIV2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TCIU2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIA3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIB3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIC3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGID3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TCIV3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIA4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIB4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIC4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGID4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TCIV4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIU5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIV5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIW5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIA6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIB6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIC6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGID6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TCIV6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIA7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIB7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIC7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGID7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TCIV7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIA8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIB8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIC8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGID8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TCIV8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA251_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA252_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA253_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA254_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA255_PRIORITY _0F_ICU_PRIORITY_LEVEL15 - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Interrupt_Create(void); -#endif diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/r_config/r_bsp_config.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/r_config/r_bsp_config.h deleted file mode 100644 index aa84c072ce5..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/r_config/r_bsp_config.h +++ /dev/null @@ -1,636 +0,0 @@ -/* Generated configuration header file - do not edit */ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_config_reference.h -* Device(s) : RX65N -* Description : The file r_bsp_config.h is used to configure your BSP. r_bsp_config.h should be included -* somewhere in your package so that the r_bsp code has access to it. This file (r_bsp_config_reference.h) -* is just a reference file that the user can use to make their own r_bsp_config.h file. -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 15.05.2017 1.00 First Release -* : 01.12.2017 1.01 Added the following macro definition. -* - BSP_CFG_EBMAPCR_1ST_PRIORITY -* - BSP_CFG_EBMAPCR_2ND_PRIORITY -* - BSP_CFG_EBMAPCR_3RD_PRIORITY -* - BSP_CFG_EBMAPCR_4TH_PRIORITY -* - BSP_CFG_EBMAPCR_5TH_PRIORITY -* : 01.07.2018 1.02 Added the following macro definition. -* - BSP_CFG_CONFIGURATOR_SELECT -* Add RTOS support. FreeRTOS. Define a timer for RTOS. -* : 27.07.2018 1.03 Modified the comment of PLL clock source. -* Added the following macro definition for ID code protection. -* - BSP_CFG_ID_CODE_LONG_1 -* - BSP_CFG_ID_CODE_LONG_2 -* - BSP_CFG_ID_CODE_LONG_3 -* - BSP_CFG_ID_CODE_LONG_4 -* Added the following macro definition. -* - BSP_CFG_FIT_IPL_MAX -* : xx.xx.xxxx 1.04 Added support for GNUC and ICCRX. -***********************************************************************************************************************/ -#ifndef R_BSP_CONFIG_REF_HEADER_FILE -#define R_BSP_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* NOTE: - The default settings are the same as when using RSKRX65N-2MB. - Change to the settings for the user board. -*/ - -/* Start up select - 0 = Enable BSP startup program. - 1 = Disable BSP startup program. (e.g. Using user startup program.) -*/ -#define BSP_CFG_STARTUP_DISABLE (0) - -/* Enter the product part number for your MCU. This information will be used to obtain information about your MCU such - as package and memory size. - To help parse this information, the part number will be defined using multiple macros. - R 5 F 56 5N E D D FP - | | | | | | | | | Macro Name Description - | | | | | | | | |__BSP_CFG_MCU_PART_PACKAGE = Package type, number of pins, and pin pitch - | | | | | | | |____not used = Products with wide temperature range - | | | | | | |______BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED = Encryption module included/not included - | | | | | |________BSP_CFG_MCU_PART_MEMORY_SIZE = ROM, RAM, and Data Flash Capacity - | | | | |___________BSP_CFG_MCU_PART_GROUP = Group name - | | | |______________BSP_CFG_MCU_PART_SERIES = Series name - | | |________________BSP_CFG_MCU_PART_MEMORY_TYPE = Type of memory (Flash, ROMless) - | |__________________not used = Renesas MCU - |____________________not used = Renesas semiconductor product. - */ - -/* Package type. Set the macro definition based on values below: - Character(s) = Value for macro = Package Type/Number of Pins/Pin Pitch - FC = 0x0 = LFQFP/176/0.50 - BG = 0x1 = LFBGA/176/0.80 - LC = 0x2 = TFLGA/177/0.50 - FB = 0x3 = LFQFP/144/0.50 - LK = 0x4 = TFLGA/145/0.50 - FP = 0x5 = LFQFP/100/0.50 - LJ = 0xA = TFLGA/100/0.65 -*/ -#define BSP_CFG_MCU_PART_PACKAGE (0x5) // <-- Updated by GUI. Do not edit this value manually - -/* Whether Encryption and SDHI/SDSI are included or not. - Character(s) = Value for macro = Description - A = false = Encryption module not included, SDHI/SDSI module not included - B = false = Encryption module not included, SDHI/SDSI module included - D = false = Encryption module not included, SDHI/SDSI module included, dual-bank structure - E = true = Encryption module included, SDHI/SDSI module not included - F = true = Encryption module included, SDHI/SDSI module included - H = true = Encryption module included, SDHI/SDSI module included, dual-bank structure -*/ -#define BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED (false) // <-- Updated by GUI. Do not edit this value manually - -/* ROM, RAM, and Data Flash Capacity. - Character(s) = Value for macro = ROM Size/Ram Size/Data Flash Size - 4 = 0x4 = 512KB/256KB/Not equipped - 7 = 0x7 = 768KB/256KB/Not equipped - 9 = 0x9 = 1MB/256KB/Not equipped - C = 0xC = 1.5MB/640KB/32KB - E = 0xE = 2MB/640KB/32KB - NOTE: When the RAM capacity is 640KB, the RAM areas are not contiguous. -*/ -#define BSP_CFG_MCU_PART_MEMORY_SIZE (0xE) // <-- Updated by GUI. Do not edit this value manually - -/* Group name. - Character(s) = Value for macro = Description - 5N/51 = 0x0 = RX65N Group/RX651 Group -*/ -#define BSP_CFG_MCU_PART_GROUP (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Series name. - Character(s) = Value for macro = Description - 56 = 0x0 = RX600 Series -*/ -#define BSP_CFG_MCU_PART_SERIES (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Memory type. - Character(s) = Value for macro = Description - F = 0x0 = Flash memory version -*/ -#define BSP_CFG_MCU_PART_MEMORY_TYPE (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Whether to use 1 stack or 2. RX MCUs have the ability to use 2 stacks: an interrupt stack and a user stack. - * When using 2 stacks the user stack will be used during normal user code. When an interrupt occurs the CPU - * will automatically shift to using the interrupt stack. Having 2 stacks can make it easier to figure out how - * much stack space to allocate since the user does not have to worry about always having enough room on the - * user stack for if-and-when an interrupt occurs. Some users will not want 2 stacks though because it is not - * needed in all applications and can lead to wasted RAM (i.e. space in between stacks that is not used). - * If only 1 stack is used then the interrupt stack is the one that will be used. If 1 stack is chosen then - * the user may want to remove the 'SU' section from the linker sections to remove any linker warnings. - * - * 0 = Use 1 stack. Disable user stack. User stack size set below will be ignored. - * 1 = Use 2 stacks. User stack and interrupt stack will both be used. - */ -#define BSP_CFG_USER_STACK_ENABLE (0) - -#if defined(__CCRX__) || defined(__GNUC__) - -/* When using the user startup program, disable the following code. */ -#if (BSP_CFG_STARTUP_DISABLE == 0) - -/* If only 1 stack is chosen using BSP_CFG_USER_STACK_ENABLE then no RAM will be allocated for the user stack. */ -#if (BSP_CFG_USER_STACK_ENABLE == 1) -/* User Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. */ -#define BSP_CFG_USTACK_BYTES (0) -#endif - -/* Interrupt Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. - * If the interrupt stack is the only stack being used then the user will likely want to increase the default size - * below. - */ -#define BSP_CFG_ISTACK_BYTES (0x1000) - -#endif /* BSP_CFG_STARTUP_DISABLE == 0 */ - -/* Heap size in bytes. - To disable the heap you must follow these steps: - 1) Set this macro (BSP_CFG_HEAP_BYTES) to 0. - 2) Set the macro BSP_CFG_IO_LIB_ENABLE to 0. - 3) Disable stdio from being built into the project library. This is done by going into the Renesas RX Toolchain - settings and choosing the Standard Library section. After that choose 'Standard Library' for Category in HEW or - choose 'Contents' in E2Studio. This will present a list of modules that can be included. Uncheck the box for - stdio.h. -*/ -#define BSP_CFG_HEAP_BYTES (0) - -#endif /* defined(__CCRX__) || defined(__GNUC__) */ - -#if defined(__CCRX__) - -/* Initializes C input & output library functions. - 0 = Disable I/O library initialization in resetprg.c. If you are not using stdio then use this value. - 1 = Enable I/O library initialization in resetprg.c. This is default and needed if you are using stdio. */ -#define BSP_CFG_IO_LIB_ENABLE (1) - -#endif /* defined(__CCRX__) */ - -/* If desired the user may redirect the stdio charget() and/or charput() functions to their own respective functions - by enabling below and providing and replacing the my_sw_... function names with the names of their own functions. */ -#define BSP_CFG_USER_CHARGET_ENABLED (0) -#define BSP_CFG_USER_CHARGET_FUNCTION my_sw_charget_function - -#define BSP_CFG_USER_CHARPUT_ENABLED (0) -#define BSP_CFG_USER_CHARPUT_FUNCTION my_sw_charput_function - -/* After reset MCU will operate in Supervisor mode. To switch to User mode, set this macro to '1'. For more information - on the differences between these 2 modes see the CPU >> Processor Mode section of your MCU's hardware manual. - 0 = Stay in Supervisor mode. - 1 = Switch to User mode. -*/ -#define BSP_CFG_RUN_IN_USER_MODE (0) - -/* Set your desired ID code. NOTE, leave at the default (all 0xFF's) if you do not wish to use an ID code. If you set - this value and program it into the MCU then you will need to remember the ID code because the debugger will ask for - it when trying to connect. Note that the E1/E20 will ignore the ID code when programming the MCU during debugging. - If you set this value and then forget it then you can clear the ID code by connecting up in serial boot mode using - FDT. The ID Code is 16 bytes long. The macro below define the ID Code in 4-byte sections. */ -/* Lowest 4-byte section, address 0xFE7F5D50. From MSB to LSB: ID code 4, ID code 3, ID code 2, ID code 1/Control Code. - */ -#define BSP_CFG_ID_CODE_LONG_1 (0xFFFFFFFF) -/* 2nd ID Code section, address 0xFE7F5D54. From MSB to LSB: ID code 8, ID code 7, ID code 6, ID code 5. */ -#define BSP_CFG_ID_CODE_LONG_2 (0xFFFFFFFF) -/* 3rd ID Code section, address 0xFE7F5D58. From MSB to LSB: ID code 12, ID code 11, ID code 10, ID code 9. */ -#define BSP_CFG_ID_CODE_LONG_3 (0xFFFFFFFF) -/* 4th ID Code section, address 0xFE7F5D5C. From MSB to LSB: ID code 16, ID code 15, ID code 14, ID code 13. */ -#define BSP_CFG_ID_CODE_LONG_4 (0xFFFFFFFF) - -/* Clock source select (CKSEL). - 0 = Low Speed On-Chip Oscillator (LOCO) - 1 = High Speed On-Chip Oscillator (HOCO) - 2 = Main Clock Oscillator - 3 = Sub-Clock Oscillator - 4 = PLL Circuit -*/ -#define BSP_CFG_CLOCK_SOURCE (4) // <-- Updated by GUI. Do not edit this value manually - -/* Main clock Oscillator Switching (MOSEL). - 0 = Resonator - 1 = External clock input -*/ -#define BSP_CFG_MAIN_CLOCK_SOURCE (0) // <-- Updated by GUI. Do not edit this value manually - -/* The sub-clock oscillation control for using the RTC. - When '1' is selected, the registers related to RTC are initialized and the sub-clock oscillator is operated. - 0 = The RTC is not to be used. - 1 = The RTC is to be used. -*/ -#define BSP_CFG_RTC_ENABLE (0) // <-- Updated by GUI. Do not edit this value manually - -/* Sub-Clock Oscillator Drive Capacity Control (RTCDV). - 0 = Drive capacity for standard CL. - 1 = Drive capacity for low CL. -*/ -#define BSP_CFG_SOSC_DRV_CAP (0) // <-- Updated by GUI. Do not edit this value manually //standard CL by default - -/* Clock configuration options. - The input clock frequency is specified and then the system clocks are set by specifying the multipliers used. The - multiplier settings are used to set the clock registers in resetprg.c. If a 24MHz clock is used and the - ICLK is 120MHz, PCLKA is 120MHz, PCLKB is 60MHz, PCLKC is 60MHz, PCLKD is 60MHz, FCLK is 60MHz, USB Clock is 48MHz, - and BCLK is 120MHz then the settings would be: - - BSP_CFG_XTAL_HZ = 24000000 - BSP_CFG_PLL_DIV = 1 (no division) - BSP_CFG_PLL_MUL = 10.0 (24MHz x 10.0 = 240MHz) - BSP_CFG_ICK_DIV = 2 : System Clock (ICLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_ICK_DIV) = 120MHz - BSP_CFG_PCKA_DIV = 2 : Peripheral Clock A (PCLKA) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKA_DIV) = 120MHz - BSP_CFG_PCKB_DIV = 4 : Peripheral Clock B (PCLKB) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKB_DIV) = 60MHz - BSP_CFG_PCKC_DIV = 4 : Peripheral Clock C (PCLKC) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKC_DIV) = 60MHz - BSP_CFG_PCKD_DIV = 4 : Peripheral Clock D (PCLKD) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKD_DIV) = 60MHz - BSP_CFG_FCK_DIV = 4 : Flash IF Clock (FCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_FCK_DIV) = 60MHz - BSP_CFG_BCK_DIV = 2 : External Bus Clock (BCK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_BCK_DIV) = 120MHz - BSP_CFG_UCK_DIV = 5 : USB Clock (UCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_UCK_DIV) = 48MHz -*/ - -/* Input clock frequency in Hz (XTAL or EXTAL). */ -#define BSP_CFG_XTAL_HZ (12000000) // <-- Updated by GUI. Do not edit this value manually - -/* The HOCO can operate at several different frequencies. Choose which one using the macro below. - Available frequency settings: - 0 = 16MHz (default) - 1 = 18MHz - 2 = 20MHz -*/ -#define BSP_CFG_HOCO_FREQUENCY (2) // <-- Updated by GUI. Do not edit this value manually - -/* PLL clock source (PLLSRCSEL). Choose which clock source to input to the PLL circuit. - Available clock sources: - 0 = Main clock (default) - 1 = HOCO -*/ -#define BSP_CFG_PLL_SRC (1) // <-- Updated by GUI. Do not edit this value manually - -/* PLL Input Frequency Division Ratio Select (PLIDIV). - Available divisors = /1 (no division), /2, /3 -*/ -#define BSP_CFG_PLL_DIV (1) // <-- Updated by GUI. Do not edit this value manually - -/* PLL Frequency Multiplication Factor Select (STC). - Available multipliers = x10.0 to x30.0 in 0.5 increments (e.g. 10.0, 10.5, 11.0, 11.5, ..., 29.0, 29.5, 30.0) -*/ -#define BSP_CFG_PLL_MUL (12.0) // <-- Updated by GUI. Do not edit this value manually - -/* System Clock Divider (ICK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_ICK_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock A Divider (PCKA). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKA_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock B Divider (PCKB). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKB_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock C Divider (PCKC). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKC_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock D Divider (PCKD). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKD_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* External Bus Clock Divider (BCLK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_BCK_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Flash IF Clock Divider (FCK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_FCK_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* USB Clock Divider Select. - Available divisors = /2, /3, /4, /5 -*/ -#define BSP_CFG_UCK_DIV (5) // <-- Updated by GUI. Do not edit this value manually - -/* Configure BCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency, 2= BCK/2 frequency -*/ -#define BSP_CFG_BCLK_OUTPUT (0) // <-- Updated by GUI. Do not edit this value manually - -/* Configure SDCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency -*/ -#define BSP_CFG_SDCLK_OUTPUT (0) // <-- Updated by GUI. Do not edit this value manually - -/* Main Clock Oscillator Wait Time (MOSCWTCR). - The value of MOSCWTCR register required for correspondence with the waiting time required to secure stable oscillation - by the main clock oscillator is obtained by using the maximum frequency for fLOCO in the formula below. - - BSP_CFG_MOSC_WAIT_TIME > (tMAINOSC * (fLOCO_max) + 16)/32 - (tMAINOSC: main clock oscillation stabilization time; fLOCO_max: maximum frequency for fLOCO) - - If tMAINOSC is 9.98 ms and fLOCO_max is 264 kHz (the period is 1/3.78 us), the formula gives - BSP_CFG_MOSC_WAIT_TIME > (9.98 ms * (264 kHZ) + 16)/32 = 82.83, so set the BSP_CFG_MOSC_WAIT_TIME to 83(53h). - - NOTE: The waiting time is not required when an external clock signal is input for the main clock oscillator. - Set the BSP_CFG_MOSC_WAIT_TIME to 00h. -*/ -#define BSP_CFG_MOSC_WAIT_TIME (0x53) // <-- Updated by GUI. Do not edit this value manually - -/* Sub-Clock Oscillator Wait Time (SOSCWTCR). - The value of SOSCWTCR register required for correspondence with the expected time to secure settling of oscillation - by the sub-clock oscillator is obtained by using the maximum frequency for fLOCO in the formula below. - - BSP_CFG_SOSC_WAIT_TIME > (tSUBOSC * (fLOCO_max) + 16)/16384 - (tSUBOSC: sub-clock oscillation stabilization time; fLOCO_max: maximum frequency for fLOCO) - - If tSUBOSC is 2 s and fLOCO is 264 kHz (the period is 1/3.78 us), the formula gives - BSP_CFG_SOSC_WAIT_TIME > (2 s * (264 kHz) +16)/16384 = 32.22, so set the BSP_CFG_SOSC_WAIT_TIME bits to 33(21h). -*/ -#define BSP_CFG_SOSC_WAIT_TIME (0x21) // <-- Updated by GUI. Do not edit this value manually - -/* ROM Cache Enable Register (ROMCE). - 0 = ROM cache operation disabled. - 1 = ROM cache operation enabled. -*/ -#define BSP_CFG_ROM_CACHE_ENABLE (0) - -/* Configure WDT and IWDT settings. - OFS0 - Option Function Select Register 0 - b31:b29 Reserved When reading, these bits return the value written by the user. The write value should be 1. - b28 WDTRSTIRQS - WDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b27:b26 WDTRPSS - WDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b25:b24 WDTRPES - WDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b23:b20 WDTCKS - WDT Clock Frequency Division Ratio - (1=PCLKB/4, 4=PCLKB/64, 0xF=PCLKB/128, 6=PCLKB/256, - 7=PCLKB/2048, 8=PCLKB/8192) - b19:b18 WDTTOPS - WDT Timeout Period Select (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b17 WDTSTRT - WDT Start Mode Select - (0=auto-start after reset, 1=halt after reset) - b16:b15 Reserved (set to 1) - b14 IWDTSLCSTP - IWDT Sleep Mode Count Stop Control - (0=can't stop count, 1=stop w/some low power modes) - b13 Reserved (set to 1) - b12 IWDTRSTIRQS - IWDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b11:b10 IWDTRPSS - IWDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b9:b8 IWDTRPES - IWDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b7:b4 IWDTCKS - IWDT Clock Frequency Division Ratio - (0=none, 2=/16, 3 = /32, 4=/64, 0xF=/128, 5=/256) - b3:b2 IWDTTOPS - IWDT Timeout Period Select - (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b1 IWDTSTRT - IWDT Start Mode Select - (0=auto-start after reset, 1=halt after reset) - b0 Reserved (set to 1) -*/ -#define BSP_CFG_OFS0_REG_VALUE (0xFFFFFFFF) // <-- Updated by GUI. Do not edit this value manually //Disable by default - -/* Configure whether voltage detection 0 circuit and HOCO are enabled after reset. - OFS1 - Option Function Select Register 1 - b31:b9 Reserved (set to 1) - b8 HOCOEN - Enable/disable HOCO oscillation after a reset (0=enable, 1=disable) - b7:b3 Reserved When reading, these bits return the value written by the user. The write value should be 1. - b2 LVDAS - Voltage Detection 0 circuit start (1=monitoring disabled) - b1:b0 VDSEL - Voltage Detection 0 level select (1=2.94v, 2=2.87v, 3=2.80v) - NOTE: If HOCO oscillation is enabled by OFS1.HOCOEN, HOCO frequency is 16MHz. - BSP_CFG_HOCO_FREQUENCY should be default value. -*/ -#define BSP_CFG_OFS1_REG_VALUE (0xFFFFFFFF) // <-- Updated by GUI. Do not edit this value manually //Disable by default - -/* Trusted memory is facility to prevent the reading of blocks 8 and 9 and blocks 46 and 47 (in dual mode) in - the code flash memory by third party software. This feature is disabled by default. - TMEF - TM Enable Flag Register - b31 Reserved (set to 1) - b30:b28 TMEFDB - Dual-Bank TM Enable - 000: The TM function in the address range from FFEE 0000h to - FFEE FFFFh is enabled in dual mode. - - 111: The TM function in the address range from FFEE 0000h to - FFEE FFFFh is disabled in dual mode. - b27 Reserved (set to 1) - b26:b24 TMEFF - TM Enable - 000: TM function is enabled. - - 111: TM function is disabled. - b23:b0 Reserved (set to 1) - NOTE: If the dual bank function has not been incorporated in a device, - TMEFDB bits [b30:b26] are reserved area. -*/ -#define BSP_CFG_TRUSTED_MODE_FUNCTION (0xFFFFFFFF) //Disable by default - -/* Configure FAW register is used to set the write protection flag and boot area select flag - for setting the flash access window startaddress and flash access window end address. - FAW - Flash Access Window Setting Register - b31 BTFLG - Boot Area Select Flag - 0: FFFF C000h to FFFF DFFFh are used as the boot area - - 1: FFFF E000h to FFFF FFFFh are used as the boot area - b30:b28 Reserved - When reading, these bits return the value written by the user.The write value should be 1. - b27:b16 FAWE - Flash Access Window End Address - Flash access window end address - b15 FSPR - Access Window Protection Flag - 0: With protection (P/E disabled) - - 1: Without protection (P/E enabled) - b14:b12 Reserved - When reading, these bits return the value written by the user.The write value should be 1. - b11:b0 FAWS - Flash Access Window Start Address - Flash access window start address - NOTE: Once 0 is written to this bit, the bit can never be restored to 1. - Therefore, the access window and the BTFLG bit never be set again or the TM function - never be disabled once it has been enabled. - Exercise extra caution when handling the FSPR bit. -*/ -#define BSP_CFG_FAW_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* The ROM code protection register is a function to prohibit reading from or programming to the flash memory - when the flash programmer is used during off-board programming. - ROMCODE - ROM Code Protection Register - b31:b0 ROM Code - 0000 0000h: ROM code protection enabled (ROM code protection 1). - 0000 0001h: ROM code protection enabled (ROM code protection 2). - Other than above: ROM code protection disabled. - Note. The ROMCODE register should be set in 32-bit units. -*/ -#define BSP_CFG_ROMCODE_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* Select the bank mode of dual-bank function of the code flash memory. - 0 = Dual mode. - 1 = Linear mode. - NOTE: If the dual bank function has been incorporated in a device, select the bank mode in this macro. - Default setting of the bank mode is linear mode. - If the dual bank function has not been incorporated in a device, this macro should be 1. -*/ -#define BSP_CFG_CODE_FLASH_BANK_MODE (1) //Linear mode by default - -/* Select the startup bank of the program when dual bank function is in dual mode. - 0 = The address range of bank 1 from FFE00000h to FFEFFFFFh and bank 0 from FFF00000h to FFFFFFFFh. - 1 = The address range of bank 1 from FFF00000h to FFFFFFFFh and bank 0 from FFE00000h to FFEFFFFFh. - NOTE: If the dual bank function has been incorporated in a device, select the start bank in this macro. - Default setting of the start bank is bank0. - If the dual bank function has not been incorporated in a device, this macro should be 0. -*/ -#define BSP_CFG_CODE_FLASH_START_BANK (0) //Bank0 by default - -/* This macro lets other modules no if a RTOS is being used. - 0 = RTOS is not used. - 1 = FreeRTOS is used. - 2 = embOS is used.(This is not available.) - 3 = MicroC_OS is used.(This is not available.) - 4 = RI600V4 or RI600PX is used.(This is not available.) -*/ -/* As of today, we need a workaround to avoid the problem that the Smart Configurator does not have such GUI - yet and the BSP_CFG_RTOS_USED here is set to (0) every time of code generation by the Smart Configurator. - The BSP_CFG_RTOS_USED is set to (1) in the r_bsp.h instead of here so that the setting of here is ignored. -*/ -#if !defined(BSP_CFG_RTOS_USED) || (BSP_CFG_RTOS_USED == 0) -#if defined(BSP_CFG_RTOS_USED) -#undef BSP_CFG_RTOS_USED -#endif -#define BSP_CFG_RTOS_USED (0) // <-- Updated by GUI. Do not edit this value manually -#endif - -/* This macro is used to select which CMT channel used for system timer of RTOS. - * The setting of this macro is only valid if the macro BSP_CFG_RTOS_USED is set to a value other than 0. */ -#if (BSP_CFG_RTOS_USED != 0) -/* Setting value. - * 0 = CMT channel 0 used for system timer of RTOS (recommended to be used for RTOS). - * 1 = CMT channel 1 used for system timer of RTOS. - * 2 = CMT channel 2 used for system timer of RTOS. - * 3 = CMT channel 3 used for system timer of RTOS. - * Others = Invalid. */ -#define BSP_CFG_RTOS_SYSTEM_TIMER (0) -#endif - -/* By default modules will use global locks found in mcu_locks.c. If the user is using a RTOS and would rather use its - locking mechanisms then they can change this macro. - NOTE: If '1' is chosen for this macro then the user must also change the next macro 'BSP_CFG_USER_LOCKING_TYPE'. - 0 = Use default locking (non-RTOS) - 1 = Use user defined locking mechanism. -*/ -#define BSP_CFG_USER_LOCKING_ENABLED (0) - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to redefine the typedef - that is used for the locks. If the user is using a RTOS then they would likely redefine the typedef to be - a semaphore/mutex type of their RTOS. Use the macro below to set the type that will be used for the locks. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_TYPE bsp_lock_t - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to define the functions - that will handle the locking and unlocking. These functions should be defined below. - If BSP_CFG_USER_LOCKING_ENABLED is != 0: - R_BSP_HardwareLock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION(mcu_lock_t hw_index) - R_BSP_HardwareUnlock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION(mcu_lock_t hw_index) - NOTE:With these functions the index into the array holding the global hardware locks is passed as the parameter. - R_BSP_SoftwareLock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - R_BSP_SoftwareUnlock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - NOTE:With these functions the actual address of the lock to use is passed as the parameter. - NOTE: These functions must return a boolean. If lock was obtained or released successfully then return true. Else, - return false. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION my_hw_locking_function -#define BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION my_hw_unlocking_function -#define BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION my_sw_locking_function -#define BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION my_sw_unlocking_function - -/* If the user would like to determine if a warm start reset has occurred, then they may enable one or more of the - * following callback definitions AND provide a call back function name for the respective callback - * function (to be defined by the user). Setting BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED = 1 will result - * in a callback to the user defined my_sw_warmstart_prec_function just prior to the initialization of the C - * runtime environment by resetprg. - * - * Setting BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED = 1 will result in a callback to the user defined - * my_sw_warmstart_postc_function just after the initialization of the C runtime environment by resetprg. - */ -#define BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_PRE_C_FUNCTION my_sw_warmstart_prec_function - -#define BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_POST_C_FUNCTION my_sw_warmstart_postc_function - -/* By default FIT modules will check input parameters to be valid. This is helpful during development but some users - will want to disable this for production code. The reason for this would be to save execution time and code space. - This macro is a global setting for enabling or disabling parameter checking. Each FIT module will also have its - own local macro for this same purpose. By default the local macros will take the global value from here though - they can be overridden. Therefore, the local setting has priority over this global setting. Disabling parameter - checking should only used when inputs are known to be good and the increase in speed or decrease in code space is - needed. - 0 = Global setting for parameter checking is disabled. - 1 = Global setting for parameter checking is enabled (Default). -*/ -#define BSP_CFG_PARAM_CHECKING_ENABLE (1) - -/* The extended bus master has five transfer sources: EDMAC, GLCDC-GRA1 (GLCDC graphics 1 data read), GLCDCGRA2 (GLCDC - graphics 2 data read), DRW2D-TX (DRW2D texture data read), and DRW2D-FB (DRW2D frame buffer data read write and - display list data read). - The default priority order in bsp is below - GLCDC-GRA1 > GLCDC-GRA2 > DRW2D-TX > DRW2D-FB > EDMAC. - Priority can be changed with this macro. - - Extended Bus Master Priority setting - 0 = GLCDC graphics 1 data read - 1 = DRW2D texture data read - 2 = DRW2D frame buffer data read write and display list data read - 3 = GLCDC graphics 2 data read - 4 = EDMAC - - Note : This macro is only available for products with at least 1.5 Mbytes of code flash memory. - Settings other than above are prohibited. - Duplicate priority settings can not be made. -*/ -#define BSP_CFG_EBMAPCR_1ST_PRIORITY (0) /* Extended Bus Master 1st Priority Selection */ -#define BSP_CFG_EBMAPCR_2ND_PRIORITY (3) /* Extended Bus Master 2nd Priority Selection */ -#define BSP_CFG_EBMAPCR_3RD_PRIORITY (1) /* Extended Bus Master 3rd Priority Selection */ -#define BSP_CFG_EBMAPCR_4TH_PRIORITY (2) /* Extended Bus Master 4th Priority Selection */ -#define BSP_CFG_EBMAPCR_5TH_PRIORITY (4) /* Extended Bus Master 5th Priority Selection */ - -/* This macro is used to define the voltage that is supplied to the MCU (Vcc). This macro is defined in millivolts. This - macro does not actually change anything on the MCU. Some FIT modules need this information so it is defined here. */ -#define BSP_CFG_MCU_VCC_MV (3300) // <-- Updated by GUI. Do not edit this value manually - -/* Allow initialization of auto-generated peripheral initialization code by Smart Configurator tool. - When not using the Smart Configurator, set the value of BSP_CFG_CONFIGURATOR_SELECT to 0. - 0 = Disabled (default) - 1 = Smart Configurator initialization code used -*/ -#define BSP_CFG_CONFIGURATOR_SELECT (1) // <-- Updated by GUI. Do not edit this value manually - -/* For some BSP functions, it is necessary to ensure that, while these functions are executing, interrupts from other - FIT modules do not occur. By controlling the IPL, these functions disable interrupts that are at or below the - specified interrupt priority level. - This macro sets the IPL. Range is 0x0 - 0xF. - Please set this macro more than IPR for other FIT module interrupts. - The default value is 0xF (maximum value). - Don't change if there is no special processing with higher priority than all fit modules. -*/ -#define BSP_CFG_FIT_IPL_MAX (0xF) - -/* This macro is used to select which SCI channel used for debug serial terminal. - */ -#define MY_BSP_CFG_SERIAL_TERM_SCI (5) - -/* This macro is used to select which SCI channel used for UART WiFi module. - */ -#define MY_BSP_CFG_UART_WIFI_SCI (0) -#define ULPGN_HSUART1_RTS_PDR PORT2.PDR.BIT.B2 /*PMOD PinNo.4 */ -#define ULPGN_HSUART1_RTS_PODR PORT2.PODR.BIT.B2 /*PMOD PinNo.4 */ -#define MY_BSP_CFG_UART_WIFI_SECOND_SCI (1) -#define ULPGN_RESET_PORT_PDR PORTD.PDR.BIT.B0 /*PMOD PinNo.8 */ -#define ULPGN_RESET_PORT_PODR PORTD.PODR.BIT.B0 /*PMOD PinNo.8 */ - -#endif /* R_BSP_CONFIG_REF_HEADER_FILE */ - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/r_config/r_bsp_config_readme.txt b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/r_config/r_bsp_config_readme.txt deleted file mode 100644 index 6a9002cf4f3..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/r_config/r_bsp_config_readme.txt +++ /dev/null @@ -1,12 +0,0 @@ -FIT r_config folder -------------------- -The purpose of the r_config folder is to provide one place where the user can store all of their FIT configuration -files. Putting the files in one place makes them easy to find, backup, and put in a version control system. - -FIT Modules are distributed with a reference configuration file. These files end with '_reference.h'. For example, -the reference configuration file for the r_bsp is named r_bsp_config_reference.h. Reference configuration files are -provided so that the user always has a known-good configuration to revert to. When adding a FIT Module to a project the -user should copy this reference configuration file to this folder and remove '_reference' from the filename -(r_bsp_config_reference.h is renamed to r_bsp_config.h). For the r_bsp the reference configuration file can be found in -the 'board' folder for the currently chosen development board. For other FIT Modules the reference configuration file -can be found in the 'ref' folder of the FIT Module. diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/r_config/r_bsp_interrupt_config.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/r_config/r_bsp_interrupt_config.h deleted file mode 100644 index 1346f175b23..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/r_config/r_bsp_interrupt_config.h +++ /dev/null @@ -1,214 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_interrupt_config.h -* Description : This module maps Interrupt A & B interrupts. More information on how this is done is given below. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -* : 15.05.2017 2.00 Changed the name of the following macro definition, because there was a mistake -* in the name of macro definition. -* - From XXX_TPU0_TGI0V to XXX_TPU0_TCI0V. -* - From XXX_TPU1_TGI1V to XXX_TPU1_TCI1V. -* - From XXX_TPU1_TGI1U to XXX_TPU1_TCI1U. -* - From XXX_TPU2_TGI2V to XXX_TPU2_TCI2V. -* - From XXX_TPU2_TGI2U to XXX_TPU2_TCI2U. -* - From XXX_TPU3_TGI3V to XXX_TPU3_TCI3V. -* - From XXX_TPU4_TGI4V to XXX_TPU4_TCI4V. -* - From XXX_TPU4_TGI4U to XXX_TPU4_TCI4U. -* - From XXX_TPU5_TGI5V to XXX_TPU5_TCI5V. -* - From XXX_TPU5_TGI5U to XXX_TPU5_TCI5U. -* - From XXX_MTU0_TGIV0 to XXX_MTU0_TCIV0. -* - From XXX_MTU1_TGIV1 to XXX_MTU1_TCIV1. -* - From XXX_MTU1_TGIU1 to XXX_MTU1_TCIU1. -* - From XXX_MTU2_TGIV2 to XXX_MTU2_TCIV2. -* - From XXX_MTU2_TGIU2 to XXX_MTU2_TCIU2. -* - From XXX_MTU3_TGIV3 to XXX_MTU3_TCIV3. -* - From XXX_MTU4_TGIV4 to XXX_MTU4_TCIV4. -* - From XXX_MTU6_TGIV6 to XXX_MTU6_TCIV6. -* - From XXX_MTU7_TGIV7 to XXX_MTU7_TCIV7. -* - From XXX_MTU8_TGIV8 to XXX_MTU8_TCIV8. -* Added select processing of the following software configurable interrupt source. -* - TSIP_PROC_BUSY -* - TSIP_ROMOK -* - TSIP_LONG_PLG -* - TSIP_TEST_BUSY -* - TSIP_WRRDY0 -* - TSIP_WRRDY1 -* - TSIP_WRRDY4 -* - TSIP_RDRDY0 -* - TSIP_RDRDY1 -* - TSIP_INTEGRATE_WRRDY -* - TSIP_INTEGRATE_RDRDY -***********************************************************************************************************************/ -#ifndef R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE -#define R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/* If you wish to use one of the interrupt below then set the appropriate configuration macro to the vector number you - * wish to use for that interrupt. For example, if you want to use the RTC carry interrupt (CUP) at vector 176 then you - * would do the following: - * - * #define BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP 176 - */ - -/* Interrupt B Sources. - * -Valid vector numbers are 128-207. - * -There are more vector slots for B sources than actual B sources. By default all B sources are mapped. - * -If using the 'TPU1, TGI1A' interrupt it must be vector 144 or 145. It is set to 144 by default. - * -If a peripheral interrupt is going to be used to wake up the MCU from All-Module Clock Stop Mode then it must be - * in a vector between 146 to 157. Peripheral interrupts that can do this are TMR interrupts and the 'USB0, USBI0' - * interrupt. By default the TMR interrupts are chosen since there are 12 of them and there are 12 slots. - */ -#define BSP_MAPPED_INT_CFG_B_VECT_CMT2_CMI2 128 -#define BSP_MAPPED_INT_CFG_B_VECT_CMT3_CMI3 129 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIA0 146 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIB0 147 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_OVI0 148 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIA1 149 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIB1 150 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_OVI1 151 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIA2 152 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIB2 153 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_OVI2 154 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIA3 155 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIB3 156 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_OVI3 157 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0A 130 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0B 131 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0C 132 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0D 133 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TCI0V 134 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1A 144 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1B 135 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1V 136 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1U 137 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2A 138 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2B 139 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2V 140 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2U 141 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3A 142 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3B 143 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3C 145 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3D 158 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TCI3V 159 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4A 160 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4B 161 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4V 162 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4U 163 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5A 164 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5B 165 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5V 166 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5U 167 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC0I0 168 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC1I0 169 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC0I0 170 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC1I0 171 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC0I1 172 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC1I1 173 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC0I1 174 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC1I1 175 -#define BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP 176 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXF0 177 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXF0 178 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXM0 179 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXM0 180 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXF1 181 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXF1 182 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXM1 183 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXM1 184 -#define BSP_MAPPED_INT_CFG_B_VECT_USB0_USBI0 185 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12ADI0 186 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GBADI0 187 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GCADI0 188 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12ADI1 189 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GBADI1 190 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GCADI1 191 -#define BSP_MAPPED_INT_CFG_B_VECT_RNG_RNGEND -#define BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR18I 193 -#define BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR19I 194 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_PROC_BUSY 195 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_ROMOK 196 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_LONG_PLG 197 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_TEST_BUSY 198 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY0 199 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY1 200 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY4 201 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY0 202 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY1 203 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_WRRDY 204 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_RDRDY 205 - -/* Interrupt A Sources. - * -Valid vector numbers are 208-255. - * -There are more A sources than A vector slots. By default none of the GPT interrupts are mapped. - * -If using the 'MTU1, TGI1A' interrupt it must be vector 208 or 209. It is set to 208 by default. - */ -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIA0 209 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIB0 210 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIC0 211 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGID0 212 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TCIV0 213 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIE0 214 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIF0 215 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIA1 208 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIB1 216 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIV1 217 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIU1 218 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIA2 219 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIB2 220 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIV2 221 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIU2 222 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIA3 223 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIB3 224 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIC3 225 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGID3 226 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TCIV3 227 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIA4 228 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIB4 229 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIC4 230 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGID4 231 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TCIV4 232 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIU5 233 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIV5 234 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIW5 235 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIA6 236 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIB6 237 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIC6 238 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGID6 239 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TCIV6 240 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIA7 241 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIB7 242 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIC7 243 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGID7 244 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TCIV7 245 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIA8 246 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIB8 247 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIC8 248 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGID8 249 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TCIV8 250 -#define BSP_MAPPED_INT_CFG_A_VECT_AES_AESRDY -#define BSP_MAPPED_INT_CFG_A_VECT_AES_AESEND - -#endif /* R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE */ - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/r_pincfg/Pin.c b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/r_pincfg/Pin.c deleted file mode 100644 index cf47a8782cf..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/r_pincfg/Pin.c +++ /dev/null @@ -1,93 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : Pin.c -* Version : 1.0.2 -* Device(s) : R5F565NEDxFP -* Description : This file implements SMC pin code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -/* Start user code for include. Do not edit comment generated here */ -#include "Pin.h" -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: R_Pins_Create -* Description : This function initializes Smart Configurator pins -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Pins_Create(void) -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set CTS0# pin */ - MPC.P23PFS.BYTE = 0x0BU; - PORT2.PMR.BYTE |= 0x08U; - - /* Set RXD0 pin */ - MPC.P21PFS.BYTE = 0x0AU; - PORT2.PMR.BYTE |= 0x02U; - - /* Set RXD1 pin */ - MPC.P30PFS.BYTE = 0x0AU; - PORT3.PMR.BYTE |= 0x01U; - - /* Set RXD5 pin */ - MPC.PA3PFS.BYTE = 0x0AU; - PORTA.PMR.BYTE |= 0x08U; - - /* Set TXD0 pin */ - PORT2.PODR.BYTE |= 0x01U; - MPC.P20PFS.BYTE = 0x0AU; - PORT2.PDR.BYTE |= 0x01U; - - /* Set TXD1 pin */ - PORT2.PODR.BYTE |= 0x40U; - MPC.P26PFS.BYTE = 0x0AU; - PORT2.PDR.BYTE |= 0x40U; - - /* Set TXD5 pin */ - PORTA.PODR.BYTE |= 0x10U; - MPC.PA4PFS.BYTE = 0x0AU; - PORTA.PDR.BYTE |= 0x10U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/r_pincfg/Pin.h b/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/r_pincfg/Pin.h deleted file mode 100644 index 0547e097cff..00000000000 --- a/demos/renesas/rx65n-cloud-kit-uart-sx-ulpgn/gnurx-e2studio/src/smc_gen/r_pincfg/Pin.h +++ /dev/null @@ -1,50 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : Pin.h -* Version : 1.0.2 -* Device(s) : R5F565NEDxFP -* Description : This file implements SMC pin code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef PIN_H -#define PIN_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Pins_Create(void); -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/.gitignore b/demos/renesas/rx65n-envision-kit/ccrx-csplus/.gitignore deleted file mode 100644 index 6ea78411070..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/.gitignore +++ /dev/null @@ -1,4 +0,0 @@ -/HardwareDebug/ -*.mtud -*.rcpe -*.mtsp diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/.settings/fittemp/r_ether_rx.ftl b/demos/renesas/rx65n-envision-kit/ccrx-csplus/.settings/fittemp/r_ether_rx.ftl deleted file mode 100644 index c1d6f96d8c7..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/.settings/fittemp/r_ether_rx.ftl +++ /dev/null @@ -1,45 +0,0 @@ -<#-- - Copyright(C) 2015 Renesas Electronics Corporation - RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY - This program must be used solely for the purpose for which it was furnished - by Renesas Electronics Corporation. No part of this program may be reproduced - or disclosed to others, in any form, without the prior written permission of - Renesas Electronics Corporation. ---> -<#-- = DECLARE FUNCTION INFORMATION HERE =================== --> -<#assign Function_Base_Name = "R_ETHER_PinSet"> -<#assign Function_Description = "This function initializes pins for r_ether_rx module"> -<#assign Function_Arg = "none"> -<#assign Function_Ret = "none"> -<#assign Version = 1.00> - -<#-- = DECLARE FUNCTION CONTENT HERE ======================= --> -<#macro initialsection postfix> -<#assign Function_Name = "${Function_Base_Name}${postfix}"> -<#include "lib/functionheader.ftl"> -void ${Function_Name}() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - -<#macro peripheralpincode pin> - - -<#macro channelpincode pin> - - /* Set ${pin.pinName} pin */ - MPC.${pin.assignedPinName}PFS.BYTE = 0x${pin.pinMPC}U; - PORT${pin.portNum}.PMR.BIT.B${pin.pinBitNum} = 1U; - - -<#macro endsection> - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - - -<#macro headerfilesection postfix> -void ${Function_Base_Name}${postfix}(); - - -<#-- = END OF FILE ========================================= --> \ No newline at end of file diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/.settings/fittemp/r_s12ad_rx.ftl b/demos/renesas/rx65n-envision-kit/ccrx-csplus/.settings/fittemp/r_s12ad_rx.ftl deleted file mode 100644 index 41d42034c58..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/.settings/fittemp/r_s12ad_rx.ftl +++ /dev/null @@ -1,67 +0,0 @@ -<#-- - Copyright(C) 2016 Renesas Electronics Corporation - RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY - This program must be used solely for the purpose for which it was furnished - by Renesas Electronics Corporation. No part of this program may be reproduced - or disclosed to others, in any form, without the prior written permission of - Renesas Electronics Corporation. ---> -<#-- = DECLARE FUNCTION INFORMATION HERE =================== --> -<#assign Function_Base_Name = "R_ADC_PinSet"> -<#assign Function_Description = "This function initializes pins for r_s12ad_rx module"> -<#assign Function_Arg = "none"> -<#assign Function_Ret = "none"> -<#assign Version = 1.00> - -<#-- = DECLARE FUNCTION CONTENT HERE ======================= --> -<#macro initialsection postfix> -<#assign Function_Name = "${Function_Base_Name}${postfix}"> -<#include "lib/functionheader.ftl"> -void ${Function_Name}() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - -<#macro peripheralpincode pin> - - -<#macro channelpincode pin> - - <#if (pin.pinName?contains("ADTRG")?string("true","false")) == "true" || (pin.pinName?contains("ADST")?string("true","false")) == "true" > - /* Set ${pin.pinName} pin */ - MPC.${pin.assignedPinName}PFS.BYTE = 0x${pin.pinMPC}U; - PORT${pin.portNum}.PMR.BIT.B${pin.pinBitNum} = 1U; - <#else> - /* Set ${pin.pinName} pin */ - <#if headerInfo.device?contains("R5F5110")> - <#if pin.portNum != "4" && pin.portNum != "J" > - PORT${pin.portNum}.PCR.BIT.B${pin.pinBitNum} = 0U; - - <#elseif headerInfo.device?contains("R5F5111")> - <#if pin.portNum != "4" && pin.portNum != "H" && pin.portNum != "J" > - PORT${pin.portNum}.PCR.BIT.B${pin.pinBitNum} = 0U; - - <#elseif headerInfo.device?contains("R5F5113")> - <#if pin.portNum != "4" && pin.portNum != "9" && pin.portNum != "H" && pin.portNum != "J" > - PORT${pin.portNum}.PCR.BIT.B${pin.pinBitNum} = 0U; - - <#else> - PORT${pin.portNum}.PCR.BIT.B${pin.pinBitNum} = 0U; - - PORT${pin.portNum}.PDR.BIT.B${pin.pinBitNum} = 0U; - PORT${pin.portNum}.PMR.BIT.B${pin.pinBitNum} = 0U; - MPC.${pin.assignedPinName}PFS.BYTE = 0x${pin.pinMPC}U; - - - -<#macro endsection> - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - - -<#macro headerfilesection postfix> -void ${Function_Base_Name}${postfix}(); - - -<#-- = END OF FILE ========================================= --> \ No newline at end of file diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/.settings/fittemp/r_sci_rx.ftl b/demos/renesas/rx65n-envision-kit/ccrx-csplus/.settings/fittemp/r_sci_rx.ftl deleted file mode 100644 index 62879ddbbe9..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/.settings/fittemp/r_sci_rx.ftl +++ /dev/null @@ -1,85 +0,0 @@ -<#-- - Copyright(C) 2015 Renesas Electronics Corporation - RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY - This program must be used solely for the purpose for which it was furnished - by Renesas Electronics Corporation. No part of this program may be reproduced - or disclosed to others, in any form, without the prior written permission of - Renesas Electronics Corporation. ---> -<#-- = DECLARE FUNCTION INFORMATION HERE =================== --> -<#-- - (Step 1) Explanation: These variables are necessary information for the function header. - Please fill up or leave blank, but do not delete ---> -<#assign Function_Base_Name = "R_SCI_PinSet"> -<#assign Function_Description = "This function initializes pins for r_sci_rx module"> -<#assign Function_Arg = "none"> -<#assign Function_Ret = "none"> -<#assign Version = 1.00> - -<#-- = DECLARE FUNCTION CONTENT HERE ======================= --> -<#-- - (Step 2) Explanation: Function content. - - Macro [initialsection] : - Any text that goes into this section will be printed out 1 time per function - input [postfix] :Use this variable to add the channel number to the function base name. ---> -<#macro initialsection postfix> -<#assign Function_Name = "${Function_Base_Name}${postfix}"> -<#include "lib/functionheader.ftl"> -void ${Function_Name}() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - -<#-- - (Step 3) Explanation: Function content. - - Macro [peripheralpincode] : Any text that goes into this section will be printed out 1 time per peripheral - - input [pin] : Available info includes: - pin.pinName :The name of pin, eg “SSLA0†- pin.assignedPinName :The pin assigned to, eg “P32†- pin.pinMPC :The port number of assigned pin, eg “P32†has portNume = “3†- pin.portNum :The bit number of the assigned pin, eg “P32†has pinBitNum = “2†- pin.pinBitNum :The value of MPC ---> -<#macro peripheralpincode pin> - - -<#-- - (Step 4) Explanation: Function content. - - Macro [channelpincode] : Any text that goes into this section will be printed out 1 time per channel - - input [pin] : Same as above ---> -<#macro channelpincode pin> - - /* Set ${pin.pinName} pin */ - MPC.${pin.assignedPinName}PFS.BYTE = 0x${pin.pinMPC}U; - PORT${pin.portNum}.PMR.BIT.B${pin.pinBitNum} = 1U; - - -<#macro channelpincodeextra pin postfix> - - -<#-- - (Step 5) Explanation: Function content. - - Macro [endsection] : Any text that goes into this section will be printed out 1 time last ---> -<#macro endsection> - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - - -<#-- - (Step 6) Explanation: Header file content - - Macro [headerfilesection] : Any text that goes into this section will be printed out 1 time in the header file - - input [postfix] :Use this variable to add the channel number to the function base name. ---> -<#macro headerfilesection postfix> -void ${Function_Base_Name}${postfix}(); - - -<#macro headerfilesectionExtra postfix> - - -<#-- = END OF FILE ========================================= --> \ No newline at end of file diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/aws_demos.ipcf b/demos/renesas/rx65n-envision-kit/ccrx-csplus/aws_demos.ipcf deleted file mode 100644 index 1e9b904ff64..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/aws_demos.ipcf +++ /dev/null @@ -1,1031 +0,0 @@ - - - - C:\Users\Shelty\Desktop\amazon\latest\demos\renesas\rx65n-envision-kit\ccrx-csplus\src\smc_gen\general - C:\Users\Shelty\Desktop\amazon\latest\demos\renesas\rx65n-envision-kit\ccrx-csplus\src\smc_gen\r_bsp - C:\Users\Shelty\Desktop\amazon\latest\demos\renesas\rx65n-envision-kit\ccrx-csplus\src\smc_gen\r_byteq - C:\Users\Shelty\Desktop\amazon\latest\demos\renesas\rx65n-envision-kit\ccrx-csplus\src\smc_gen\r_config - C:\Users\Shelty\Desktop\amazon\latest\demos\renesas\rx65n-envision-kit\ccrx-csplus\src\smc_gen\r_ether_rx - C:\Users\Shelty\Desktop\amazon\latest\demos\renesas\rx65n-envision-kit\ccrx-csplus\src\smc_gen\r_flash_rx - C:\Users\Shelty\Desktop\amazon\latest\demos\renesas\rx65n-envision-kit\ccrx-csplus\src\smc_gen\r_pincfg - C:\Users\Shelty\Desktop\amazon\latest\demos\renesas\rx65n-envision-kit\ccrx-csplus\src\smc_gen\r_s12ad_rx - C:\Users\Shelty\Desktop\amazon\latest\demos\renesas\rx65n-envision-kit\ccrx-csplus\src\smc_gen\r_sci_rx - - - - - - .\src\smc_gen\general\r_cg_hardware_setup.c - - - - - .\src\smc_gen\general\r_cg_macrodriver.h - - - - - .\src\smc_gen\general\r_cg_userdefine.h - - - - - .\src\smc_gen\general\r_smc_cgc.c - - - - - .\src\smc_gen\general\r_smc_cgc.h - - - - - .\src\smc_gen\general\r_smc_cgc_user.c - - - - - .\src\smc_gen\general\r_smc_entry.h - - - - - .\src\smc_gen\general\r_smc_interrupt.c - - - - - .\src\smc_gen\general\r_smc_interrupt.h - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx65n\dbsct.c - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx65n\hwsetup.c - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx65n\hwsetup.h - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx65n\lowlvl.c - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx65n\lowsrc.c - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx65n\lowsrc.h - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx65n\resetprg.c - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx65n\r_bsp.h - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx65n\r_bsp_config_reference.h - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx65n\r_bsp_interrupt_config_reference.h - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx65n\sbrk.c - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx65n\vecttbl.c - - - - - - - - - .\src\smc_gen\r_bsp\board\generic_rx65n\vecttbl.h - - - - - - - - - .\src\smc_gen\r_bsp\board\user\r_bsp.h - - - - - - - - - .\src\smc_gen\r_bsp\doc\en\r01an1685ej0380-rx.pdf - - - - - - - - - .\src\smc_gen\r_bsp\doc\ja\r01an1685jj0380-rx.pdf - - - - - - - - - .\src\smc_gen\r_bsp\mcu\all\r_bsp_common.c - - - - - - - - - .\src\smc_gen\r_bsp\mcu\all\r_bsp_common.h - - - - - - - - - .\src\smc_gen\r_bsp\mcu\all\r_typedefs.h - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx65n\cpu.c - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx65n\cpu.h - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx65n\locking.c - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx65n\locking.h - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx65n\mcu_clocks.c - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx65n\mcu_info.h - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx65n\mcu_init.c - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx65n\mcu_init.h - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx65n\mcu_interrupts.c - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx65n\mcu_interrupts.h - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx65n\mcu_locks.c - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx65n\mcu_locks.h - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx65n\mcu_mapped_interrupts.c - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx65n\mcu_mapped_interrupts.h - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx65n\mcu_mapped_interrupts_private.h - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx65n\mcu_startup.c - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx65n\mcu_startup.h - - - - - - - - - - .\src\smc_gen\r_bsp\mcu\rx65n\register_access\iodefine.h - - - - - - - - .\src\smc_gen\r_bsp\platform.h - - - - - .\src\smc_gen\r_bsp\readme.txt - - - - - - .\src\smc_gen\r_byteq\doc\r01an1683jj0160_rx.pdf - - - - - - .\src\smc_gen\r_byteq\readme.txt - - - - - - .\src\smc_gen\r_byteq\ref\r_byteq_config_reference.h - - - - - - .\src\smc_gen\r_byteq\r_byteq_if.h - - - - - - .\src\smc_gen\r_byteq\src\r_byteq.c - - - - - - - .\src\smc_gen\r_byteq\src\r_byteq_private.h - - - - - - .\src\smc_gen\r_config\r_bsp_config.h - - - - - .\src\smc_gen\r_config\r_bsp_config_readme.txt - - - - - .\src\smc_gen\r_config\r_bsp_interrupt_config.h - - - - - .\src\smc_gen\r_config\r_byteq_config.h - - - - - .\src\smc_gen\r_config\r_ether_rx_config.h - - - - - .\src\smc_gen\r_config\r_flash_rx_config.h - - - - - .\src\smc_gen\r_config\r_s12ad_rx_config.h - - - - - .\src\smc_gen\r_config\r_sci_rx_config.h - - - - - - - .\src\smc_gen\r_ether_rx\doc\en\r01an2009ej0115-rx.pdf - - - - - - - - - .\src\smc_gen\r_ether_rx\doc\ja\r01an2009jj0115-rx.pdf - - - - - - - .\src\smc_gen\r_ether_rx\readme.txt - - - - - - .\src\smc_gen\r_ether_rx\ref\r_ether_rx_config_reference.h - - - - - - .\src\smc_gen\r_ether_rx\r_ether_rx_if.h - - - - - - - .\src\smc_gen\r_ether_rx\src\phy\phy.c - - - - - - - - - .\src\smc_gen\r_ether_rx\src\phy\phy.h - - - - - - - - .\src\smc_gen\r_ether_rx\src\r_ether_rx.c - - - - - - - .\src\smc_gen\r_ether_rx\src\r_ether_rx_private.h - - - - - - - - - .\src\smc_gen\r_ether_rx\src\targets\rx65n\r_ether_setting_rx65n.c - - - - - - - - - - .\src\smc_gen\r_flash_rx\doc\en\r01an2184eu0330-rx.pdf - - - - - - - - - .\src\smc_gen\r_flash_rx\doc\ja\r01an2184ju0330-rx.pdf - - - - - - - .\src\smc_gen\r_flash_rx\readme.txt - - - - - - .\src\smc_gen\r_flash_rx\ref\r_flash_rx_config_reference.h - - - - - - .\src\smc_gen\r_flash_rx\r_flash_rx_if.h - - - - - - - .\src\smc_gen\r_flash_rx\src\flash_type_1\r_codeflash.c - - - - - - - - - .\src\smc_gen\r_flash_rx\src\flash_type_1\r_codeflash.h - - - - - - - - - .\src\smc_gen\r_flash_rx\src\flash_type_1\r_codeflash_extra.c - - - - - - - - - .\src\smc_gen\r_flash_rx\src\flash_type_1\r_codeflash_extra.h - - - - - - - - - .\src\smc_gen\r_flash_rx\src\flash_type_1\r_dataflash.c - - - - - - - - - .\src\smc_gen\r_flash_rx\src\flash_type_1\r_dataflash.h - - - - - - - - - .\src\smc_gen\r_flash_rx\src\flash_type_1\r_flash_common.h - - - - - - - - - .\src\smc_gen\r_flash_rx\src\flash_type_1\r_flash_type1.c - - - - - - - - - .\src\smc_gen\r_flash_rx\src\flash_type_1\r_flash_type1_if.h - - - - - - - - - .\src\smc_gen\r_flash_rx\src\flash_type_1\r_flash_utils.c - - - - - - - - - .\src\smc_gen\r_flash_rx\src\flash_type_2\r_flash_type2.c - - - - - - - - - .\src\smc_gen\r_flash_rx\src\flash_type_2\r_flash_type2_if.h - - - - - - - - - .\src\smc_gen\r_flash_rx\src\flash_type_3\r_flash_type3.c - - - - - - - - - .\src\smc_gen\r_flash_rx\src\flash_type_3\r_flash_type3_if.h - - - - - - - - - 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91e0e7a8-6b2f-458b-84b1-11604cb0363f - - - FreeRTOS_TCP_IP.c - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\FreeRTOS_TCP_IP.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 91e0e7a8-6b2f-458b-84b1-11604cb0363f - - - FreeRTOS_TCP_WIN.c - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\FreeRTOS_TCP_WIN.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 91e0e7a8-6b2f-458b-84b1-11604cb0363f - - - FreeRTOS_UDP_IP.c - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\FreeRTOS_UDP_IP.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 91e0e7a8-6b2f-458b-84b1-11604cb0363f - - - History.txt - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\History.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - 91e0e7a8-6b2f-458b-84b1-11604cb0363f - - - readme.txt - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - 91e0e7a8-6b2f-458b-84b1-11604cb0363f - - - ReadMe.url - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\ReadMe.url - 91e0e7a8-6b2f-458b-84b1-11604cb0363f - - - BufferManagement - Category - 1c12c614-860f-4697-b788-2bc41f3d4bfc - - - Compiler - Category - 1c12c614-860f-4697-b788-2bc41f3d4bfc - - - NetworkInterface - Category - 1c12c614-860f-4697-b788-2bc41f3d4bfc - - - BufferAllocation_2.c - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\portable\BufferManagement\BufferAllocation_2.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - e5eb47d0-bda2-4809-bea8-dfdc92632742 - - - Renesas - Category - bcd4ee49-8385-4a96-b65c-09ceb1d56743 - - - pack_struct_end.h - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\portable\Compiler\Renesas\pack_struct_end.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 71c8b68f-8303-4fe2-b901-8cd3d3314c50 - - - pack_struct_start.h - File - ..\..\..\..\lib\FreeRTOS-Plus-TCP\source\portable\Compiler\Renesas\pack_struct_start.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 71c8b68f-8303-4fe2-b901-8cd3d3314c50 - - - RX - Category - fe2c7a41-bdbc-4742-afaa-b38184687cf9 - - - README_DRIVER_DISCLAIMER.txt - File - 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aws_appversion32.h - File - ..\..\..\..\lib\include\aws_appversion32.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - e8a026e0-acb3-4889-b197-0078faf896ea - - - aws_crypto.h - File - ..\..\..\..\lib\include\aws_crypto.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - e8a026e0-acb3-4889-b197-0078faf896ea - - - aws_greengrass_discovery.h - File - ..\..\..\..\lib\include\aws_greengrass_discovery.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - e8a026e0-acb3-4889-b197-0078faf896ea - - - aws_mqtt_agent.h - File - ..\..\..\..\lib\include\aws_mqtt_agent.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - e8a026e0-acb3-4889-b197-0078faf896ea - - - aws_mqtt_lib.h - File - ..\..\..\..\lib\include\aws_mqtt_lib.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - e8a026e0-acb3-4889-b197-0078faf896ea - - - aws_ota_agent.h - File - ..\..\..\..\lib\include\aws_ota_agent.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - e8a026e0-acb3-4889-b197-0078faf896ea - - - aws_pkcs11.h - File - ..\..\..\..\lib\include\aws_pkcs11.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - e8a026e0-acb3-4889-b197-0078faf896ea - - - aws_secure_sockets.h - File - ..\..\..\..\lib\include\aws_secure_sockets.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - e8a026e0-acb3-4889-b197-0078faf896ea - - - aws_shadow.h - File - ..\..\..\..\lib\include\aws_shadow.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - e8a026e0-acb3-4889-b197-0078faf896ea - - - aws_system_init.h - File - ..\..\..\..\lib\include\aws_system_init.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - e8a026e0-acb3-4889-b197-0078faf896ea - - - aws_tls.h - File - ..\..\..\..\lib\include\aws_tls.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - e8a026e0-acb3-4889-b197-0078faf896ea - - - aws_wifi.h - File - ..\..\..\..\lib\include\aws_wifi.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - e8a026e0-acb3-4889-b197-0078faf896ea - - - event_groups.h - File - ..\..\..\..\lib\include\event_groups.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - e8a026e0-acb3-4889-b197-0078faf896ea - - - FreeRTOS.h - File - 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..\..\..\..\lib\include\private\deprecated_definitions.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 8b3979f8-02cd-4cf4-abb9-ba1e0674681b - - - list.h - File - ..\..\..\..\lib\include\private\list.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 8b3979f8-02cd-4cf4-abb9-ba1e0674681b - - - mpu_wrappers.h - File - ..\..\..\..\lib\include\private\mpu_wrappers.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 8b3979f8-02cd-4cf4-abb9-ba1e0674681b - - - portable.h - File - ..\..\..\..\lib\include\private\portable.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 8b3979f8-02cd-4cf4-abb9-ba1e0674681b - - - projdefs.h - File - ..\..\..\..\lib\include\private\projdefs.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 8b3979f8-02cd-4cf4-abb9-ba1e0674681b - - - stack_macros.h - File - ..\..\..\..\lib\include\private\stack_macros.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 8b3979f8-02cd-4cf4-abb9-ba1e0674681b - - - threading_alt.h - File - ..\..\..\..\lib\include\private\threading_alt.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 8b3979f8-02cd-4cf4-abb9-ba1e0674681b - - - aws_mqtt_agent.c - File - ..\..\..\..\lib\mqtt\aws_mqtt_agent.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d89bb728-de86-4ec0-95f6-7fd616e4ed16 - - - aws_mqtt_lib.c - File - ..\..\..\..\lib\mqtt\aws_mqtt_lib.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - d89bb728-de86-4ec0-95f6-7fd616e4ed16 - - - aws_pkcs11_mbedtls.c - File - ..\..\..\..\lib\pkcs11\mbedtls\aws_pkcs11_mbedtls.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 83c333fb-45c3-4b23-8a67-5204dab28d6e - - - aws_pkcs11_pal.c - File - ..\..\..\..\lib\pkcs11\portable\renesas\rx65n-envision-kit\aws_pkcs11_pal.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 83c333fb-45c3-4b23-8a67-5204dab28d6e - - - aws_secure_sockets.c - File - ..\..\..\..\lib\secure_sockets\portable\renesas\rx65n-envision-kit\aws_secure_sockets.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 7094f798-4ca4-4994-8162-b1778cabc83d - - - aws_shadow.c - File - ..\..\..\..\lib\shadow\aws_shadow.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 695bf37f-8a06-4b69-bd30-e464ccf71517 - - - aws_shadow_json.c - File - ..\..\..\..\lib\shadow\aws_shadow_json.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 695bf37f-8a06-4b69-bd30-e464ccf71517 - - - aws_tls.c - File - ..\..\..\..\lib\tls\aws_tls.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9787e49e-034b-4bc5-8012-35320c307ae5 - - - aws_system_init.c - File - ..\..\..\..\lib\utils\aws_system_init.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - be7a1ed2-6806-4bb3-8c00-0a9be8c9eaf5 - - - jsmn - Category - 303f7f9f-2792-4106-a8ee-6a5977e36868 - - - mbedtls - Category - 303f7f9f-2792-4106-a8ee-6a5977e36868 - - - mcu_vendor - Category - 303f7f9f-2792-4106-a8ee-6a5977e36868 - - - pkcs11 - Category - 303f7f9f-2792-4106-a8ee-6a5977e36868 - - - tinycbor - Category - 303f7f9f-2792-4106-a8ee-6a5977e36868 - - - jsmn.c - File - ..\..\..\..\lib\third_party\jsmn\jsmn.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9639f578-a3aa-4ed9-a361-072c5b4a828a - - - jsmn.h - File - ..\..\..\..\lib\third_party\jsmn\jsmn.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 9639f578-a3aa-4ed9-a361-072c5b4a828a - - - include - Category - 98ea0f32-c6ed-4e2d-b3d8-122981c9537a - - - library - Category - 98ea0f32-c6ed-4e2d-b3d8-122981c9537a - - - LICENSE - File - ..\..\..\..\lib\third_party\mbedtls\LICENSE - 98ea0f32-c6ed-4e2d-b3d8-122981c9537a - - - mbedtls - Category - c97bd654-7d8e-4e77-b298-89ab56dcdf5a - - - aes.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\aes.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - aesni.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\aesni.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - arc4.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\arc4.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - asn1.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\asn1.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - asn1write.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\asn1write.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - base64.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\base64.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - bignum.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\bignum.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - blowfish.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\blowfish.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - bn_mul.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\bn_mul.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - camellia.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\camellia.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - ccm.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ccm.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - certs.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\certs.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - check_config.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\check_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - cipher.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\cipher.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - cipher_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\cipher_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - cmac.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\cmac.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - compat-1.3.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\compat-1.3.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - config.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - ctr_drbg.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ctr_drbg.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - debug.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\debug.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - des.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\des.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - dhm.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\dhm.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - ecdh.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ecdh.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - ecdsa.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ecdsa.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - ecjpake.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ecjpake.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - ecp.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ecp.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - ecp_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ecp_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - entropy.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\entropy.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - entropy_poll.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\entropy_poll.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - error.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\error.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - gcm.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\gcm.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - havege.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\havege.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - hmac_drbg.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\hmac_drbg.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - md.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\md.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - md2.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\md2.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - md4.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\md4.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - md5.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\md5.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - md_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\md_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - memory_buffer_alloc.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\memory_buffer_alloc.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - net.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\net.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - net_sockets.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\net_sockets.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - oid.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\oid.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - padlock.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\padlock.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - pem.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\pem.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - pk.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\pk.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - pkcs12.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\pkcs12.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - pkcs5.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\pkcs5.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - pk_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\pk_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - platform.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\platform.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - platform_time.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\platform_time.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - platform_util.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\platform_util.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - ripemd160.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ripemd160.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - rsa_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\rsa_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - rsa.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\rsa.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - sha1.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\sha1.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - sha256.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\sha256.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - sha512.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\sha512.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - ssl.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - ssl_cache.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl_cache.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - ssl_ciphersuites.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl_ciphersuites.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - ssl_cookie.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl_cookie.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - ssl_internal.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl_internal.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - ssl_ticket.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\ssl_ticket.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - threading.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\threading.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - timing.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\timing.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - version.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\version.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - x509.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\x509.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - x509_crl.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\x509_crl.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - x509_crt.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\x509_crt.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - x509_csr.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\x509_csr.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - xtea.h - File - ..\..\..\..\lib\third_party\mbedtls\include\mbedtls\xtea.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - eb77ee14-2e89-4825-8bef-69ca6c1017c3 - - - aes.c - File - ..\..\..\..\lib\third_party\mbedtls\library\aes.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - aesni.c - File - ..\..\..\..\lib\third_party\mbedtls\library\aesni.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - arc4.c - File - ..\..\..\..\lib\third_party\mbedtls\library\arc4.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - asn1parse.c - File - ..\..\..\..\lib\third_party\mbedtls\library\asn1parse.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - asn1write.c - File - ..\..\..\..\lib\third_party\mbedtls\library\asn1write.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - base64.c - File - ..\..\..\..\lib\third_party\mbedtls\library\base64.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - bignum.c - File - ..\..\..\..\lib\third_party\mbedtls\library\bignum.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - blowfish.c - File - ..\..\..\..\lib\third_party\mbedtls\library\blowfish.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - camellia.c - File - ..\..\..\..\lib\third_party\mbedtls\library\camellia.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - ccm.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ccm.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - certs.c - File - ..\..\..\..\lib\third_party\mbedtls\library\certs.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - cipher.c - File - ..\..\..\..\lib\third_party\mbedtls\library\cipher.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - cipher_wrap.c - File - ..\..\..\..\lib\third_party\mbedtls\library\cipher_wrap.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - cmac.c - File - ..\..\..\..\lib\third_party\mbedtls\library\cmac.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - ctr_drbg.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ctr_drbg.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - debug.c - File - ..\..\..\..\lib\third_party\mbedtls\library\debug.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - des.c - File - ..\..\..\..\lib\third_party\mbedtls\library\des.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - dhm.c - File - ..\..\..\..\lib\third_party\mbedtls\library\dhm.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - ecdh.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ecdh.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - ecdsa.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ecdsa.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - ecjpake.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ecjpake.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - ecp.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ecp.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - ecp_curves.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ecp_curves.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - entropy.c - File - ..\..\..\..\lib\third_party\mbedtls\library\entropy.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - entropy_poll.c - File - ..\..\..\..\lib\third_party\mbedtls\library\entropy_poll.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - error.c - File - ..\..\..\..\lib\third_party\mbedtls\library\error.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - gcm.c - File - ..\..\..\..\lib\third_party\mbedtls\library\gcm.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - havege.c - File - ..\..\..\..\lib\third_party\mbedtls\library\havege.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - hmac_drbg.c - File - ..\..\..\..\lib\third_party\mbedtls\library\hmac_drbg.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - md.c - File - ..\..\..\..\lib\third_party\mbedtls\library\md.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - md2.c - File - ..\..\..\..\lib\third_party\mbedtls\library\md2.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - md4.c - File - ..\..\..\..\lib\third_party\mbedtls\library\md4.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - md5.c - File - ..\..\..\..\lib\third_party\mbedtls\library\md5.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - md_wrap.c - File - ..\..\..\..\lib\third_party\mbedtls\library\md_wrap.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - memory_buffer_alloc.c - File - ..\..\..\..\lib\third_party\mbedtls\library\memory_buffer_alloc.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - net_sockets.c - File - ..\..\..\..\lib\third_party\mbedtls\library\net_sockets.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - oid.c - File - ..\..\..\..\lib\third_party\mbedtls\library\oid.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - padlock.c - File - ..\..\..\..\lib\third_party\mbedtls\library\padlock.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - pem.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pem.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - pk.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pk.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - pkcs12.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pkcs12.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - pkcs5.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pkcs5.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - pkparse.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pkparse.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - pkwrite.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pkwrite.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - pk_wrap.c - File - ..\..\..\..\lib\third_party\mbedtls\library\pk_wrap.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - platform.c - File - ..\..\..\..\lib\third_party\mbedtls\library\platform.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - platform_util.c - File - ..\..\..\..\lib\third_party\mbedtls\library\platform_util.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - ripemd160.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ripemd160.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - rsa_internal.c - File - ..\..\..\..\lib\third_party\mbedtls\library\rsa_internal.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - rsa.c - File - ..\..\..\..\lib\third_party\mbedtls\library\rsa.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - sha1.c - File - ..\..\..\..\lib\third_party\mbedtls\library\sha1.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - sha256.c - File - ..\..\..\..\lib\third_party\mbedtls\library\sha256.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - sha512.c - File - ..\..\..\..\lib\third_party\mbedtls\library\sha512.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - ssl_cache.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_cache.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - ssl_ciphersuites.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_ciphersuites.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - ssl_cli.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_cli.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - ssl_cookie.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_cookie.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - ssl_srv.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_srv.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - ssl_ticket.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_ticket.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - ssl_tls.c - File - ..\..\..\..\lib\third_party\mbedtls\library\ssl_tls.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - threading.c - File - ..\..\..\..\lib\third_party\mbedtls\library\threading.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - timing.c - File - ..\..\..\..\lib\third_party\mbedtls\library\timing.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - version.c - File - ..\..\..\..\lib\third_party\mbedtls\library\version.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - version_features.c - File - ..\..\..\..\lib\third_party\mbedtls\library\version_features.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - x509.c - File - ..\..\..\..\lib\third_party\mbedtls\library\x509.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - x509write_crt.c - File - ..\..\..\..\lib\third_party\mbedtls\library\x509write_crt.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - x509write_csr.c - File - ..\..\..\..\lib\third_party\mbedtls\library\x509write_csr.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - x509_create.c - File - ..\..\..\..\lib\third_party\mbedtls\library\x509_create.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - x509_crl.c - File - ..\..\..\..\lib\third_party\mbedtls\library\x509_crl.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - x509_crt.c - File - ..\..\..\..\lib\third_party\mbedtls\library\x509_crt.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - x509_csr.c - File - ..\..\..\..\lib\third_party\mbedtls\library\x509_csr.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - xtea.c - File - ..\..\..\..\lib\third_party\mbedtls\library\xtea.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 9f7481b9-2999-4de2-bbda-d76a454e4ae3 - - - renesas - Category - 287e4c8e-9a76-4894-a9f2-5f5e4a284845 - - - amazon_freertos_common - Category - aca4fd11-34ec-4842-bf17-b569ba85b1d9 - 7951dc85-cb74-4872-a952-883def69bb0e - - - FIT - Category - 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5f6e0726-ab87-47b1-a1ba-631aff75ba9a - - - readme.txt - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_s12ad_rx\readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - 5f6e0726-ab87-47b1-a1ba-631aff75ba9a - - - en - Category - 324c4902-9389-493d-b13b-ef6abe8211b2 - - - ja - Category - 324c4902-9389-493d-b13b-ef6abe8211b2 - - - r01an1666ej0230-rx.pdf - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_s12ad_rx\doc\en\r01an1666ej0230-rx.pdf - c171cdcc-8fdc-48c4-ab4e-5e7c2776563f - - - r01an1666jj0230-rx.pdf - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_s12ad_rx\doc\ja\r01an1666jj0230-rx.pdf - b7224c87-a985-433c-8ad9-1f1d43df72e8 - - - r_s12ad_rx_config_reference.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_s12ad_rx\ref\r_s12ad_rx_config_reference.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 1783a261-4275-4e36-b9a2-7142f276cc4e - - - r_s12ad_rx.c - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_s12ad_rx\src\r_s12ad_rx.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - de3b6e7e-d0c3-4915-8c8e-1894a4aef1d9 - - - r_s12ad_rx_private.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_s12ad_rx\src\r_s12ad_rx_private.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - de3b6e7e-d0c3-4915-8c8e-1894a4aef1d9 - - - targets - Category - de3b6e7e-d0c3-4915-8c8e-1894a4aef1d9 - - - rx65x - Category - b48b7ca9-1251-4a38-b9a0-5c8bd35ccf76 - - - r_s12ad_rx65x.c - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_s12ad_rx\src\targets\rx65x\r_s12ad_rx65x.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 36ad543b-c0fd-47f3-82ee-c2a58c902079 - - - r_s12ad_rx65x_if.h - File - ..\..\..\..\lib\third_party\mcu_vendor\renesas\FIT\RDP_v1.15_modified\r_s12ad_rx\src\targets\rx65x\r_s12ad_rx65x_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 36ad543b-c0fd-47f3-82ee-c2a58c902079 - - - general - Category - 45cbc1cb-c6d9-4f01-879e-28adbdb17e8a - - - r_bsp - Category - 45cbc1cb-c6d9-4f01-879e-28adbdb17e8a - - - r_byteq - Category - 45cbc1cb-c6d9-4f01-879e-28adbdb17e8a - - - r_config - Category - 45cbc1cb-c6d9-4f01-879e-28adbdb17e8a - - - r_ether_rx - Category - 45cbc1cb-c6d9-4f01-879e-28adbdb17e8a - - - r_flash_rx - Category - 45cbc1cb-c6d9-4f01-879e-28adbdb17e8a - - - r_pincfg - Category - 45cbc1cb-c6d9-4f01-879e-28adbdb17e8a - - - r_sci_rx - Category - 45cbc1cb-c6d9-4f01-879e-28adbdb17e8a - - - r_s12ad_rx - Category - 45cbc1cb-c6d9-4f01-879e-28adbdb17e8a - - - r_cg_hardware_setup.c - File - src\smc_gen\general\r_cg_hardware_setup.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 95f511fc-8c87-4584-96bf-1c7a4cfcab6d - - - r_cg_macrodriver.h - File - src\smc_gen\general\r_cg_macrodriver.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 95f511fc-8c87-4584-96bf-1c7a4cfcab6d - - - r_cg_userdefine.h - File - src\smc_gen\general\r_cg_userdefine.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 95f511fc-8c87-4584-96bf-1c7a4cfcab6d - - - r_smc_cgc.c - File - src\smc_gen\general\r_smc_cgc.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 95f511fc-8c87-4584-96bf-1c7a4cfcab6d - - - r_smc_cgc.h - File - src\smc_gen\general\r_smc_cgc.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 95f511fc-8c87-4584-96bf-1c7a4cfcab6d - - - r_smc_cgc_user.c - File - src\smc_gen\general\r_smc_cgc_user.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 95f511fc-8c87-4584-96bf-1c7a4cfcab6d - - - r_smc_entry.h - File - src\smc_gen\general\r_smc_entry.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 95f511fc-8c87-4584-96bf-1c7a4cfcab6d - - - r_smc_interrupt.c - File - src\smc_gen\general\r_smc_interrupt.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 95f511fc-8c87-4584-96bf-1c7a4cfcab6d - - - r_smc_interrupt.h - File - src\smc_gen\general\r_smc_interrupt.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 95f511fc-8c87-4584-96bf-1c7a4cfcab6d - - - platform.h - File - src\smc_gen\r_bsp\platform.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - b916fa15-9077-4c2a-854a-19ececcace60 - - - readme.txt - File - src\smc_gen\r_bsp\readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - b916fa15-9077-4c2a-854a-19ececcace60 - - - board - Category - b916fa15-9077-4c2a-854a-19ececcace60 - - - doc - Category - b916fa15-9077-4c2a-854a-19ececcace60 - - - mcu - Category - b916fa15-9077-4c2a-854a-19ececcace60 - - - generic_rx65n - Category - 22774d3e-7f86-4d45-aaaa-9bdfe383b1d0 - - - user - Category - 22774d3e-7f86-4d45-aaaa-9bdfe383b1d0 - - - dbsct.c - File - src\smc_gen\r_bsp\board\generic_rx65n\dbsct.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - c71429be-b523-4981-aaee-f11a389bd0e7 - - - hwsetup.c - File - src\smc_gen\r_bsp\board\generic_rx65n\hwsetup.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - c71429be-b523-4981-aaee-f11a389bd0e7 - - - hwsetup.h - File - src\smc_gen\r_bsp\board\generic_rx65n\hwsetup.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - c71429be-b523-4981-aaee-f11a389bd0e7 - - - lowlvl.c - File - src\smc_gen\r_bsp\board\generic_rx65n\lowlvl.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - c71429be-b523-4981-aaee-f11a389bd0e7 - - - lowsrc.c - File - src\smc_gen\r_bsp\board\generic_rx65n\lowsrc.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - c71429be-b523-4981-aaee-f11a389bd0e7 - - - lowsrc.h - File - src\smc_gen\r_bsp\board\generic_rx65n\lowsrc.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - c71429be-b523-4981-aaee-f11a389bd0e7 - - - resetprg.c - File - src\smc_gen\r_bsp\board\generic_rx65n\resetprg.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - c71429be-b523-4981-aaee-f11a389bd0e7 - - - r_bsp.h - File - src\smc_gen\r_bsp\board\generic_rx65n\r_bsp.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - c71429be-b523-4981-aaee-f11a389bd0e7 - - - r_bsp_config_reference.h - File - src\smc_gen\r_bsp\board\generic_rx65n\r_bsp_config_reference.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - c71429be-b523-4981-aaee-f11a389bd0e7 - - - r_bsp_interrupt_config_reference.h - File - src\smc_gen\r_bsp\board\generic_rx65n\r_bsp_interrupt_config_reference.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - c71429be-b523-4981-aaee-f11a389bd0e7 - - - sbrk.c - File - src\smc_gen\r_bsp\board\generic_rx65n\sbrk.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - c71429be-b523-4981-aaee-f11a389bd0e7 - - - vecttbl.c - File - src\smc_gen\r_bsp\board\generic_rx65n\vecttbl.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - c71429be-b523-4981-aaee-f11a389bd0e7 - - - vecttbl.h - File - src\smc_gen\r_bsp\board\generic_rx65n\vecttbl.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - c71429be-b523-4981-aaee-f11a389bd0e7 - - - r_bsp.h - File - src\smc_gen\r_bsp\board\user\r_bsp.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 6336376d-d359-4bd2-acc7-e77bd69186cb - - - en - Category - abd0981e-c9fd-4474-bf51-ef1aa883daa3 - - - ja - Category - abd0981e-c9fd-4474-bf51-ef1aa883daa3 - - - r01an1685ej0380-rx.pdf - File - src\smc_gen\r_bsp\doc\en\r01an1685ej0380-rx.pdf - 7abc882e-1857-49cc-ba2f-3ac59faa05ec - - - r01an1685jj0380-rx.pdf - File - src\smc_gen\r_bsp\doc\ja\r01an1685jj0380-rx.pdf - 71f66f76-815c-4dc0-ac57-f73d9bdbb439 - - - all - Category - c22b4058-6e11-41af-ba4e-c431a4fd2159 - - - rx65n - Category - c22b4058-6e11-41af-ba4e-c431a4fd2159 - - - r_bsp_common.c - File - src\smc_gen\r_bsp\mcu\all\r_bsp_common.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 6092fddb-f69f-4fc3-952e-3f4d779caf18 - - - r_bsp_common.h - File - src\smc_gen\r_bsp\mcu\all\r_bsp_common.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 6092fddb-f69f-4fc3-952e-3f4d779caf18 - - - r_typedefs.h - File - src\smc_gen\r_bsp\mcu\all\r_typedefs.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 6092fddb-f69f-4fc3-952e-3f4d779caf18 - - - cpu.c - File - src\smc_gen\r_bsp\mcu\rx65n\cpu.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ed47457b-c656-47fd-bada-7ad4d7b280c7 - - - cpu.h - File - src\smc_gen\r_bsp\mcu\rx65n\cpu.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ed47457b-c656-47fd-bada-7ad4d7b280c7 - - - locking.c - File - src\smc_gen\r_bsp\mcu\rx65n\locking.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ed47457b-c656-47fd-bada-7ad4d7b280c7 - - - locking.h - File - src\smc_gen\r_bsp\mcu\rx65n\locking.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ed47457b-c656-47fd-bada-7ad4d7b280c7 - - - mcu_clocks.c - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_clocks.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ed47457b-c656-47fd-bada-7ad4d7b280c7 - - - mcu_info.h - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_info.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ed47457b-c656-47fd-bada-7ad4d7b280c7 - - - mcu_init.c - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_init.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ed47457b-c656-47fd-bada-7ad4d7b280c7 - - - mcu_init.h - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_init.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ed47457b-c656-47fd-bada-7ad4d7b280c7 - - - mcu_interrupts.c - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_interrupts.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ed47457b-c656-47fd-bada-7ad4d7b280c7 - - - mcu_interrupts.h - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_interrupts.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ed47457b-c656-47fd-bada-7ad4d7b280c7 - - - mcu_locks.c - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_locks.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ed47457b-c656-47fd-bada-7ad4d7b280c7 - - - mcu_locks.h - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_locks.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ed47457b-c656-47fd-bada-7ad4d7b280c7 - - - mcu_mapped_interrupts.c - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_mapped_interrupts.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ed47457b-c656-47fd-bada-7ad4d7b280c7 - - - mcu_mapped_interrupts.h - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_mapped_interrupts.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ed47457b-c656-47fd-bada-7ad4d7b280c7 - - - mcu_mapped_interrupts_private.h - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_mapped_interrupts_private.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ed47457b-c656-47fd-bada-7ad4d7b280c7 - - - mcu_startup.c - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_startup.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ed47457b-c656-47fd-bada-7ad4d7b280c7 - - - mcu_startup.h - File - src\smc_gen\r_bsp\mcu\rx65n\mcu_startup.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ed47457b-c656-47fd-bada-7ad4d7b280c7 - - - register_access - Category - ed47457b-c656-47fd-bada-7ad4d7b280c7 - - - iodefine.h - File - src\smc_gen\r_bsp\mcu\rx65n\register_access\iodefine.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - f4436fab-cf4d-4c1a-836b-de8bd9f63486 - - - readme.txt - File - src\smc_gen\r_byteq\readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - 880f55ff-2a55-4ed3-b2a9-bb4c4bb0dca9 - - - r_byteq_if.h - File - src\smc_gen\r_byteq\r_byteq_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 880f55ff-2a55-4ed3-b2a9-bb4c4bb0dca9 - - - doc - Category - 880f55ff-2a55-4ed3-b2a9-bb4c4bb0dca9 - - - ref - Category - 880f55ff-2a55-4ed3-b2a9-bb4c4bb0dca9 - - - src - Category - 880f55ff-2a55-4ed3-b2a9-bb4c4bb0dca9 - - - r01an1683jj0160_rx.pdf - File - src\smc_gen\r_byteq\doc\r01an1683jj0160_rx.pdf - 7c8b369b-986a-4a23-b8cc-3842285971f6 - - - r_byteq_config_reference.h - File - src\smc_gen\r_byteq\ref\r_byteq_config_reference.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - bac3be91-f79c-491a-8148-7edbe32dfe78 - - - r_byteq.c - File - src\smc_gen\r_byteq\src\r_byteq.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 53754391-09f8-46cd-9d04-dc22b43fedcc - - - r_byteq_private.h - File - src\smc_gen\r_byteq\src\r_byteq_private.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 53754391-09f8-46cd-9d04-dc22b43fedcc - - - r_bsp_config.h - File - src\smc_gen\r_config\r_bsp_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 65a8a520-6b12-4583-9d4f-594500ea660a - - - r_bsp_config_readme.txt - File - src\smc_gen\r_config\r_bsp_config_readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - 65a8a520-6b12-4583-9d4f-594500ea660a - - - r_bsp_interrupt_config.h - File - src\smc_gen\r_config\r_bsp_interrupt_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 65a8a520-6b12-4583-9d4f-594500ea660a - - - r_ether_rx_config.h - File - src\smc_gen\r_config\r_ether_rx_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 65a8a520-6b12-4583-9d4f-594500ea660a - - - r_flash_rx_config.h - File - src\smc_gen\r_config\r_flash_rx_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 65a8a520-6b12-4583-9d4f-594500ea660a - - - r_byteq_config.h - File - src\smc_gen\r_config\r_byteq_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 65a8a520-6b12-4583-9d4f-594500ea660a - - - r_sci_rx_config.h - File - src\smc_gen\r_config\r_sci_rx_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 65a8a520-6b12-4583-9d4f-594500ea660a - - - r_s12ad_rx_config.h - File - src\smc_gen\r_config\r_s12ad_rx_config.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 65a8a520-6b12-4583-9d4f-594500ea660a - - - readme.txt - File - src\smc_gen\r_ether_rx\readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - 5bcd5991-84da-40c1-be1c-1bfc1d0fc1c8 - - - r_ether_rx_if.h - File - src\smc_gen\r_ether_rx\r_ether_rx_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 5bcd5991-84da-40c1-be1c-1bfc1d0fc1c8 - - - doc - Category - 5bcd5991-84da-40c1-be1c-1bfc1d0fc1c8 - - - ref - Category - 5bcd5991-84da-40c1-be1c-1bfc1d0fc1c8 - - - src - Category - 5bcd5991-84da-40c1-be1c-1bfc1d0fc1c8 - - - en - Category - 1aa45059-55cd-46cf-94e6-898035931adb - - - ja - Category - 1aa45059-55cd-46cf-94e6-898035931adb - - - r01an2009ej0115-rx.pdf - File - src\smc_gen\r_ether_rx\doc\en\r01an2009ej0115-rx.pdf - 7a53a2f4-2289-4a8f-b8bf-d4623d677d71 - - - r01an2009jj0115-rx.pdf - File - src\smc_gen\r_ether_rx\doc\ja\r01an2009jj0115-rx.pdf - 015d81f3-c9f0-4127-a213-72e95058949e - - - r_ether_rx_config_reference.h - File - src\smc_gen\r_ether_rx\ref\r_ether_rx_config_reference.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - c2c4ea41-6ceb-4224-8fde-75b6fbb7f5b3 - - - r_ether_rx.c - File - src\smc_gen\r_ether_rx\src\r_ether_rx.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 868d512a-1c91-4f0e-9955-c50e7f403deb - - - r_ether_rx_private.h - File - src\smc_gen\r_ether_rx\src\r_ether_rx_private.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 868d512a-1c91-4f0e-9955-c50e7f403deb - - - phy - Category - 868d512a-1c91-4f0e-9955-c50e7f403deb - - - targets - Category - 868d512a-1c91-4f0e-9955-c50e7f403deb - - - phy.c - File - src\smc_gen\r_ether_rx\src\phy\phy.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 00b9f0f6-fd7a-46d0-940b-ccb4272e902c - - - phy.h - File - src\smc_gen\r_ether_rx\src\phy\phy.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 00b9f0f6-fd7a-46d0-940b-ccb4272e902c - - - rx65n - Category - f094f3f8-e904-4764-bf7d-e26bc889d2de - - - r_ether_setting_rx65n.c - File - src\smc_gen\r_ether_rx\src\targets\rx65n\r_ether_setting_rx65n.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 6497f545-c1c4-4f31-989d-7e8eebd8f4fd - - - readme.txt - File - src\smc_gen\r_flash_rx\readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - 83fbc477-41b9-4176-9ef2-3f86cc980db1 - - - r_flash_rx_if.h - File - src\smc_gen\r_flash_rx\r_flash_rx_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 83fbc477-41b9-4176-9ef2-3f86cc980db1 - - - doc - Category - 83fbc477-41b9-4176-9ef2-3f86cc980db1 - - - ref - Category - 83fbc477-41b9-4176-9ef2-3f86cc980db1 - - - src - Category - 83fbc477-41b9-4176-9ef2-3f86cc980db1 - - - en - Category - 2cd158ef-ffe0-4817-9b0f-57c2d9e37b8b - - - ja - Category - 2cd158ef-ffe0-4817-9b0f-57c2d9e37b8b - - - r01an2184eu0330-rx.pdf - File - src\smc_gen\r_flash_rx\doc\en\r01an2184eu0330-rx.pdf - 1e1d7aa3-d0fe-4c5c-8363-20deb069bcd9 - - - r01an2184ju0330-rx.pdf - File - src\smc_gen\r_flash_rx\doc\ja\r01an2184ju0330-rx.pdf - 238623ab-6b2e-4579-aeee-0fc2132f121e - - - r_flash_rx_config_reference.h - File - src\smc_gen\r_flash_rx\ref\r_flash_rx_config_reference.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - fcf5183f-47cc-4d7e-a027-4e5a159b604b - - - r_flash_fcu.c - File - src\smc_gen\r_flash_rx\src\r_flash_fcu.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 8b34c9f0-ec22-4579-9bad-80790cc3668f - - - r_flash_fcu.h - File - src\smc_gen\r_flash_rx\src\r_flash_fcu.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 8b34c9f0-ec22-4579-9bad-80790cc3668f - - - r_flash_group.c - File - src\smc_gen\r_flash_rx\src\r_flash_group.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 8b34c9f0-ec22-4579-9bad-80790cc3668f - - - r_flash_group.h - File - src\smc_gen\r_flash_rx\src\r_flash_group.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 8b34c9f0-ec22-4579-9bad-80790cc3668f - - - r_flash_rx.c - File - src\smc_gen\r_flash_rx\src\r_flash_rx.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 8b34c9f0-ec22-4579-9bad-80790cc3668f - - - r_flash_rx.h - File - src\smc_gen\r_flash_rx\src\r_flash_rx.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 8b34c9f0-ec22-4579-9bad-80790cc3668f - - - r_flash_targets.h - File - src\smc_gen\r_flash_rx\src\r_flash_targets.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 8b34c9f0-ec22-4579-9bad-80790cc3668f - - - flash_type_1 - Category - 8b34c9f0-ec22-4579-9bad-80790cc3668f - - - flash_type_2 - Category - 8b34c9f0-ec22-4579-9bad-80790cc3668f - - - flash_type_3 - Category - 8b34c9f0-ec22-4579-9bad-80790cc3668f - - - flash_type_4 - Category - 8b34c9f0-ec22-4579-9bad-80790cc3668f - - - targets - Category - 8b34c9f0-ec22-4579-9bad-80790cc3668f - - - r_codeflash.c - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_codeflash.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 689e78e4-9cc4-4159-90aa-382e10067e61 - - - r_codeflash.h - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_codeflash.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 689e78e4-9cc4-4159-90aa-382e10067e61 - - - r_codeflash_extra.c - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_codeflash_extra.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 689e78e4-9cc4-4159-90aa-382e10067e61 - - - r_codeflash_extra.h - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_codeflash_extra.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 689e78e4-9cc4-4159-90aa-382e10067e61 - - - r_dataflash.c - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_dataflash.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 689e78e4-9cc4-4159-90aa-382e10067e61 - - - r_dataflash.h - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_dataflash.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 689e78e4-9cc4-4159-90aa-382e10067e61 - - - r_flash_common.h - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_flash_common.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 689e78e4-9cc4-4159-90aa-382e10067e61 - - - r_flash_type1.c - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_flash_type1.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 689e78e4-9cc4-4159-90aa-382e10067e61 - - - r_flash_type1_if.h - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_flash_type1_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 689e78e4-9cc4-4159-90aa-382e10067e61 - - - r_flash_utils.c - File - src\smc_gen\r_flash_rx\src\flash_type_1\r_flash_utils.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 689e78e4-9cc4-4159-90aa-382e10067e61 - - - r_flash_type2.c - File - src\smc_gen\r_flash_rx\src\flash_type_2\r_flash_type2.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - deb2baca-803f-49c9-aa64-113359cded6e - - - r_flash_type2_if.h - File - src\smc_gen\r_flash_rx\src\flash_type_2\r_flash_type2_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - deb2baca-803f-49c9-aa64-113359cded6e - - - r_flash_type3.c - File - src\smc_gen\r_flash_rx\src\flash_type_3\r_flash_type3.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - fa972dca-6f78-4f3e-a171-fbb8212a2ac7 - - - r_flash_type3_if.h - File - src\smc_gen\r_flash_rx\src\flash_type_3\r_flash_type3_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - fa972dca-6f78-4f3e-a171-fbb8212a2ac7 - - - r_flash_type4.c - File - src\smc_gen\r_flash_rx\src\flash_type_4\r_flash_type4.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - f26c3179-9d97-4eee-98cc-e82bcea5ef88 - - - r_flash_type4_if.h - File - src\smc_gen\r_flash_rx\src\flash_type_4\r_flash_type4_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - f26c3179-9d97-4eee-98cc-e82bcea5ef88 - - - rx65n - Category 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r01an1815ej0201-rx.pdf - File - src\smc_gen\r_sci_rx\doc\en\r01an1815ej0201-rx.pdf - 46f17a06-966a-4864-814e-cc1b3fc5dfc9 - - - r01an1815jj0201-rx.pdf - File - src\smc_gen\r_sci_rx\doc\ja\r01an1815jj0201-rx.pdf - 500feb03-e760-4398-9f64-86dca34f33e8 - - - r_sci_rx_config_reference.h - File - src\smc_gen\r_sci_rx\ref\r_sci_rx_config_reference.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - e4cd4fda-67e7-4cc7-9eca-12dd3c44fa50 - - - r_sci_rx.c - File - src\smc_gen\r_sci_rx\src\r_sci_rx.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - 104f1118-24ad-44f5-a64a-df6511ee82af - - - r_sci_rx_platform.h - File - src\smc_gen\r_sci_rx\src\r_sci_rx_platform.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 104f1118-24ad-44f5-a64a-df6511ee82af - - - r_sci_rx_private.h - File - src\smc_gen\r_sci_rx\src\r_sci_rx_private.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 104f1118-24ad-44f5-a64a-df6511ee82af - - - targets - Category - 104f1118-24ad-44f5-a64a-df6511ee82af - - - rx65n - Category - acaec669-3f10-4fea-aedb-b544d5417492 - - - r_sci_rx65n.c - File - src\smc_gen\r_sci_rx\src\targets\rx65n\r_sci_rx65n.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ee05ddca-4858-4d51-a63b-33a3fd0b3962 - - - r_sci_rx65n_data.c - File - src\smc_gen\r_sci_rx\src\targets\rx65n\r_sci_rx65n_data.c - 941832c1-fc3b-4e1b-94e8-01ea17128b42 - ee05ddca-4858-4d51-a63b-33a3fd0b3962 - - - r_sci_rx65n_private.h - File - src\smc_gen\r_sci_rx\src\targets\rx65n\r_sci_rx65n_private.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - ee05ddca-4858-4d51-a63b-33a3fd0b3962 - - - readme.txt - File - src\smc_gen\r_s12ad_rx\readme.txt - 0c88f8d6-0d0b-411f-a135-781f4df9bffa - 1ba0201a-63e2-497b-b90c-5e524b0352b7 - - - r_s12ad_rx_if.h - File - src\smc_gen\r_s12ad_rx\r_s12ad_rx_if.h - 03cad1e8-2eb3-4cde-a8a3-982423631122 - 1ba0201a-63e2-497b-b90c-5e524b0352b7 - - - doc - Category - 1ba0201a-63e2-497b-b90c-5e524b0352b7 - - - ref - Category - 1ba0201a-63e2-497b-b90c-5e524b0352b7 - - - src - Category - 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- 0 - 8 - True - False - None - Little - InternalRam - 4269768048 - 4269768095 - 0 - 8 - True - False - None - Little - NonMap - 4269768096 - 4292870143 - 0 - 8 - True - False - None - Little - InternalRom - 4292870144 - 4294967295 - 0 - 8 - True - False - None - Little - Yes - 500 - No - Yes - Nonstop - No - TraceMemory_64KB - No - No - Simulator - No - 0 - Stop - Yes - Yes - Yes - Yes - Yes - Yes - Yes - No - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - True - 15a11a74-972c-4418-b1e8-7c6b531be774 - aws_demos.abs - LoadModuleFile - Auto - 0 - 0 - True - True - False - False - 0 - 0 - 0 - True - - - 0 - R5F565NEDxFB_DUAL - Extal - 120000 - 1200000 - No - No - Use3_3V - 2147483647 - Jtag - Jtag - Jtag_06_000 - Fine_1500000 - 115200 - Hex - 4096 - RX65N - 0 - SingleChip - No - SingleChip - Little - 4 - - No - - No - - No - - No - False - Bank0 - 1 - - True - 15a11a74-972c-4418-b1e8-7c6b531be774 - HardwareDebug\aws_demos.abs - LoadModuleFile - Auto - 0 - 0 - True - True - False - False - 0 - 0 - 0 - True - True - True - False - SuspendEvent - True - XwBtAGEAaQBuAA== - 500 - True - 23 - InternalRam - 0 - 262143 - 0 - 8 - True - False - None - Little - Same - NonMap - 262144 - 524287 - 0 - 8 - True - False - None - Little - Same - Sfr - 524288 - 540671 - 0 - 8 - True - False - None - Little - Same - NonMap - 540672 - 548863 - 0 - 8 - True - False - None - Little - Same - Sfr - 548864 - 557055 - 0 - 8 - True - False - None - Little - Same - Sfr - 557056 - 655359 - 0 - 8 - True - False - None - Big - Different - Sfr - 655360 - 671743 - 0 - 8 - True - False - None - Little - Same - InternalRam - 671744 - 679935 - 0 - 8 - True - False - None - Little - Same - Sfr - 679936 - 786431 - 0 - 8 - True - False - None - Little - Same - Sfr - 786432 - 917503 - 0 - 8 - True - False - None - Big - Different - Sfr - 917504 - 1048575 - 0 - 8 - True - False - None - Little - Same - Eeprom - 1048576 - 1081343 - 0 - 8 - True - False - None - Little - Same - NonMap - 1081344 - 8372223 - 0 - 8 - True - False - None - Little - Same - Sfr - 8372224 - 8376319 - 0 - 8 - True - False - None - Little - Same - NonMap - 8376320 - 8380415 - 0 - 8 - True - False - None - Little - Same - Sfr - 8380416 - 8388607 - 0 - 8 - True - False - None - Big - Different - InternalRam - 8388608 - 8781823 - 0 - 8 - True - False - None - Little - Same - NonMap - 8781824 - 4269759743 - 0 - 8 - True - False - None - Little - Same - InternalRam - 4269759744 - 4269759871 - 0 - 8 - True - False - None - Little - Same - NonMap - 4269759872 - 4269768047 - 0 - 8 - True - False - None - Little - Same - InternalRam - 4269768048 - 4269768095 - 0 - 8 - True - False - None - Little - Same - NonMap - 4269768096 - 4292870143 - 0 - 8 - True - False - None - Little - Same - InternalRom - 4292870144 - 4294967295 - 0 - 8 - True - False - None - Little - Same - Yes - No - Yes - 500 - Yes - Yes - No - 500 - HardwareBreak - No - No - No - No - - No - - 261584 - Trace - Free - Branch - Branch - Cpu - DonotOutput - TraceMemory_01MB - No - 2147483647 - No - DivisionBy_1 - No - 1200000 - No - ExternalCoverageCpuExecution - 4 - 4290772992 - 2147483647 - 2147483647 - 2147483647 - No - False - RisingEdge - False - RisingEdge - False - 1 - False - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - - - 90536345-15c8-40cb-957c-e59974e4bf78 - - - - - C:\Renesas\AmazonFreeRTOS\amazon-freertos-1.2.2\demos\renesas\rx65n-envision-kit\ccrx-csplus - C:\Program Files (x86)\Renesas Electronics\SmartConfigurator\RX\eclipse\SmartConfigurator.exe - 45cbc1cb-c6d9-4f01-879e-28adbdb17e8a - aws_demos.scfg - - - - - 7d577131-4ec1-4e88-968d-89381f6c178a - - - - - 1.1 - - - False - False - False - True - Yes - Nanosecond - False - False - False - False - False - True - FilesNotToAnalyze - 0 - All - 0 - False - %ProjectName%.mtfl - %ProjectName%.mtvl - 10 - - - RealtimeSampling - - Synchronized - AtProgramStop - 20 - 1000000 - LineChart - False - PaleGreen - PaleTurquoise - 40ff0a4f - 405be416 - 40056def - 40ff541c - False - Auto - Channel01 - 0 - Rising - 0 - Orange - 10 - None - - - - - - - - - - - - - - - - - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - Auto - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 25.5 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - c0ff0a4f - c05be416 - c0056dff - c0ff541c - c04fc1ff - c0a932ff - c0ffd91c - c0ff30a5 - c0bee02f - c05510ff - c0ff97e4 - c0913a37 - c0c68e15 - c0317f0c - c060493e - c072808e - - - - - 8.01.00.00 - - - \ No newline at end of file diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/aws_demos.scfg b/demos/renesas/rx65n-envision-kit/ccrx-csplus/aws_demos.scfg deleted file mode 100644 index 595af398a71..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/aws_demos.scfg +++ /dev/null @@ -1,771 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/aws_demos_build_path_check.bat b/demos/renesas/rx65n-envision-kit/ccrx-csplus/aws_demos_build_path_check.bat deleted file mode 100644 index 70ff37d5d85..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/aws_demos_build_path_check.bat +++ /dev/null @@ -1,11 +0,0 @@ -@echo off -rem ################################################################################ -rem # This batch file executes some preprocess for build -rem ################################################################################ - -if not exist "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" ( - echo ERROR: Unable to find "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" - exit 2 -) - -"%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" %* diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/aws_demos_link_order_import.mtls b/demos/renesas/rx65n-envision-kit/ccrx-csplus/aws_demos_link_order_import.mtls deleted file mode 100644 index 38a6daa8476..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/aws_demos_link_order_import.mtls +++ /dev/null @@ -1,174 +0,0 @@ -port_asm.obj -aws_demo_runner.obj -aws_dev_mode_key_provisioning.obj -aws_greengrass_discovery_demo.obj -aws_hello_world.obj -aws_logging_task_dynamic_buffers.obj -aws_ota_update_demo.obj -aws_shadow_lightbulb_on_off.obj -aws_subscribe_publish_loop.obj -aws_tcp_echo_client_separate_tasks.obj -aws_tcp_echo_client_single_task.obj -main.obj -event_groups.obj -list.obj -heap_4.obj -port.obj -queue.obj -stream_buffer.obj -tasks.obj -timers.obj -FreeRTOS_ARP.obj -FreeRTOS_DHCP.obj -FreeRTOS_DNS.obj -FreeRTOS_IP.obj -FreeRTOS_Sockets.obj -FreeRTOS_Stream_Buffer.obj -FreeRTOS_TCP_IP.obj -FreeRTOS_TCP_WIN.obj -FreeRTOS_UDP_IP.obj -BufferAllocation_2.obj -NetworkInterface.obj -ether_callback.obj -aws_bufferpool_static_thread_safe.obj -aws_crypto.obj -aws_greengrass_discovery.obj -aws_helper_secure_connect.obj -aws_mqtt_agent.obj -aws_mqtt_lib.obj -aws_ota_agent.obj -aws_ota_cbor.obj -aws_ota_pal.obj -aws_pkcs11_mbedtls.obj -aws_pkcs11_pal.obj -aws_secure_sockets.obj -aws_shadow.obj -aws_shadow_json.obj -aws_tls.obj -aws_system_init.obj -jsmn.obj -aes.obj -aesni.obj -arc4.obj -asn1parse.obj -asn1write.obj -base64.obj -bignum.obj -blowfish.obj -camellia.obj -ccm.obj -certs.obj -cipher.obj -cipher_wrap.obj -cmac.obj -ctr_drbg.obj -debug.obj -des.obj -dhm.obj -ecdh.obj -ecdsa.obj -ecjpake.obj -ecp.obj -ecp_curves.obj -entropy.obj -entropy_poll.obj -error.obj -gcm.obj -havege.obj -hmac_drbg.obj -md.obj -md2.obj -md4.obj -md5.obj -md_wrap.obj -memory_buffer_alloc.obj -net_sockets.obj -oid.obj -padlock.obj -pem.obj -pk.obj -pk_wrap.obj -pkcs12.obj -pkcs5.obj -pkparse.obj -pkwrite.obj -platform.obj -platform_util.obj -ripemd160.obj -rsa.obj -rsa_internal.obj -sha1.obj -sha256.obj -sha512.obj -ssl_cache.obj -ssl_ciphersuites.obj -ssl_cli.obj -ssl_cookie.obj -ssl_srv.obj -ssl_ticket.obj -ssl_tls.obj -threading.obj -timing.obj -version.obj -version_features.obj -x509.obj -x509_create.obj -x509_crl.obj -x509_crt.obj -x509_csr.obj -x509write_crt.obj -x509write_csr.obj -xtea.obj -cborencoder.obj -cborencoder_close_container_checked.obj -cborerrorstrings.obj -cborparser.obj -cborparser_dup_string.obj -cborpretty.obj -dbsct.obj -lowlvl.obj -lowsrc.obj -resetprg.obj -sbrk.obj -r_bsp_hwsetup_reference.obj -clkconf.obj -vecttbl.obj -r_bsp_common.obj -cpu.obj -locking.obj -mcu_clocks.obj -mcu_init.obj -mcu_interrupts.obj -mcu_locks.obj -mcu_mapped_interrupts.obj -mcu_startup.obj -r_byteq.obj -phy.obj -r_ether_rx.obj -r_ether_setting_rx65n.obj -r_codeflash.obj -r_codeflash_extra.obj -r_dataflash.obj -r_flash_type1.obj -r_flash_utils.obj -r_flash_type2.obj -r_flash_type3.obj -r_flash_type4.obj -r_flash_fcu.obj -r_flash_group.obj -r_flash_rx.obj -r_sci_rx.obj -r_sci_rx65n.obj -r_sci_rx65n_data.obj -exit.obj -entropy_hardware_poll.obj -freertos_start.obj -freertos_ip_hook.obj -serial_term_uart.obj -r_cg_hardware_setup.obj -r_smc_cgc.obj -r_smc_cgc_user.obj -r_smc_interrupt.obj -Pin.obj -r_ether_rx_pinset.obj -r_sci_rx_pinset.obj diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/attention!.txt b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/attention!.txt deleted file mode 100644 index eebc694d16c..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/attention!.txt +++ /dev/null @@ -1,32 +0,0 @@ -Please note that the following folders in the project window of IDEs are -so called 'linked' folders. - --------------------------------------------- -Linked folders in the project window of IDEs --------------------------------------------- - -src/FIT_modified_code/r_bsp -src/FIT_modified_code/r_byteq -src/FIT_modified_code/r_cmt_rx -src/FIT_modified_code/r_ether_rx -src/FIT_modified_code/r_flash_rx -src/FIT_modified_code/r_riic_rx -src/FIT_modified_code/r_sci_iic_rx -src/FIT_modified_code/r_sci_rx -src/amazon_freertos_common - ----------------------------------------------------------- -Folders on the File System of the WINDOWS Operating System ----------------------------------------------------------- - -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_bsp -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_byteq -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_cmt_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_ether_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_flash_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_riic_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_iic_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/amazon_freertos_common - -[EOF] diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/UNUSED_generated_code/.placeholder b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/UNUSED_generated_code/.placeholder deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_cg_hardware_setup.c b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_cg_hardware_setup.c deleted file mode 100644 index 30cca96b468..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_cg_hardware_setup.c +++ /dev/null @@ -1,99 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_hardware_setup.c -* Version : 1.2.3 -* Device(s) : R5F565NEDxFB -* Description : Initialization file for code generation configurations. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -#include "r_smc_cgc.h" -#include "r_smc_interrupt.h" -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -void r_undefined_exception(void); -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: r_undefined_exception -* Description : This function is undefined interrupt service routine -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void r_undefined_exception(void) -{ - /* Start user code for r_undefined_exception. Do not edit comment generated here */ - /* End user code. Do not edit comment generated here */ -} - -/*********************************************************************************************************************** -* Function Name: R_Systeminit -* Description : This function initializes every configuration -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Systeminit(void) -{ - /* Enable writing to registers related to operating modes, LPC, CGC and software reset */ - SYSTEM.PRCR.WORD = 0xA50BU; - - /* Enable writing to MPC pin function control registers */ - MPC.PWPR.BIT.B0WI = 0U; - MPC.PWPR.BIT.PFSWE = 1U; - - /* Initialize clocks settings */ - R_CGC_Create(); - - /* Set interrupt settings */ - R_Interrupt_Create(); - - /* Register undefined interrupt */ - R_BSP_InterruptWrite(BSP_INT_SRC_UNDEFINED_INTERRUPT,(bsp_int_cb_t)r_undefined_exception); - - /* Disable writing to MPC pin function control registers */ - MPC.PWPR.BIT.PFSWE = 0U; - MPC.PWPR.BIT.B0WI = 1U; - - /* Enable protection */ - SYSTEM.PRCR.WORD = 0xA500U; -} - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_cg_macrodriver.h b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_cg_macrodriver.h deleted file mode 100644 index 44741cc7cce..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_cg_macrodriver.h +++ /dev/null @@ -1,82 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_macrodriver.h -* Version : 1.2.3 -* Device(s) : R5F565NEDxFB -* Description : Macro header file for code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef MACRODRIVER_H -#define MACRODRIVER_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "platform.h" -#include "r_smc_interrupt.h" -#include - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -#ifndef __TYPEDEF__ - -/* Status list definition */ -#define MD_STATUSBASE (0x00U) -#define MD_OK (MD_STATUSBASE + 0x00U) /* register setting OK */ -#define MD_SPT (MD_STATUSBASE + 0x01U) /* IIC stop */ -#define MD_NACK (MD_STATUSBASE + 0x02U) /* IIC no ACK */ -#define MD_BUSY1 (MD_STATUSBASE + 0x03U) /* busy 1 */ -#define MD_BUSY2 (MD_STATUSBASE + 0x04U) /* busy 2 */ - -/* Error list definition */ -#define MD_ERRORBASE (0x80U) -#define MD_ERROR (MD_ERRORBASE + 0x00U) /* error */ -#define MD_ARGERROR (MD_ERRORBASE + 0x01U) /* error argument input error */ -#define MD_ERROR1 (MD_ERRORBASE + 0x02U) /* error 1 */ -#define MD_ERROR2 (MD_ERRORBASE + 0x03U) /* error 2 */ -#define MD_ERROR3 (MD_ERRORBASE + 0x04U) /* error 3 */ -#define MD_ERROR4 (MD_ERRORBASE + 0x05U) /* error 4 */ -#define MD_ERROR5 (MD_ERRORBASE + 0x06U) /* error 5 */ - -#endif - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -#ifndef __TYPEDEF__ - typedef unsigned short MD_STATUS; - #define __TYPEDEF__ -#endif - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Systeminit(void); -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_cg_userdefine.h b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_cg_userdefine.h deleted file mode 100644 index e67e7f7a049..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_cg_userdefine.h +++ /dev/null @@ -1,61 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_userdefine.h -* Version : 1.2.3 -* Device(s) : R5F565NEDxFB -* Description : User header file for code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef CG_USER_DEF_H -#define CG_USER_DEF_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ -/* Start user code for register. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* Start user code for macro define. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -/* Start user code for type define. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_smc_cgc.c b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_smc_cgc.c deleted file mode 100644 index c7b885c7be0..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_smc_cgc.c +++ /dev/null @@ -1,45 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc.c -* Version : 1.2.0 -* Device(s) : R5F565NEDxFB -* Description : This file implements cgc setting -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -#include "r_smc_cgc.h" -#include "platform.h" - -/*********************************************************************************************************************** -* Function Name: R_CGC_Create -* Description : This function Used to initializes the clock generator -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_CGC_Create(void) -{ - - R_CGC_Create_UserInit(); -} diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_smc_cgc.h b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_smc_cgc.h deleted file mode 100644 index 44bf0371c22..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_smc_cgc.h +++ /dev/null @@ -1,217 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc.h -* Version : 1.2.0 -* Device(s) : R5F565NEDxFB -* Description : This file implements cgc setting. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_CGC_H -#define SMC_CGC_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ -/* - System Clock Control Register (SCKCR) -*/ -/* Peripheral Module Clock D (PCLKD) */ -#define _00000000_CGC_PCLKD_DIV_1 (0x00000000UL) /* x1 */ -#define _00000001_CGC_PCLKD_DIV_2 (0x00000001UL) /* x1/2 */ -#define _00000002_CGC_PCLKD_DIV_4 (0x00000002UL) /* x1/4 */ -#define _00000003_CGC_PCLKD_DIV_8 (0x00000003UL) /* x1/8 */ -#define _00000004_CGC_PCLKD_DIV_16 (0x00000004UL) /* x1/16 */ -#define _00000005_CGC_PCLKD_DIV_32 (0x00000005UL) /* x1/32 */ -#define _00000006_CGC_PCLKD_DIV_64 (0x00000006UL) /* x1/64 */ -/* Peripheral Module Clock C (PCLKC) */ -#define _00000000_CGC_PCLKC_DIV_1 (0x00000000UL) /* x1 */ -#define _00000010_CGC_PCLKC_DIV_2 (0x00000010UL) /* x1/2 */ -#define _00000020_CGC_PCLKC_DIV_4 (0x00000020UL) /* x1/4 */ -#define _00000030_CGC_PCLKC_DIV_8 (0x00000030UL) /* x1/8 */ -#define _00000040_CGC_PCLKC_DIV_16 (0x00000040UL) /* x1/16 */ -#define _00000050_CGC_PCLKC_DIV_32 (0x00000050UL) /* x1/32 */ -#define _00000060_CGC_PCLKC_DIV_64 (0x00000060UL) /* x1/64 */ -/* Peripheral Module Clock B (PCLKB) */ -#define _00000000_CGC_PCLKB_DIV_1 (0x00000000UL) /* x1 */ -#define _00000100_CGC_PCLKB_DIV_2 (0x00000100UL) /* x1/2 */ -#define _00000200_CGC_PCLKB_DIV_4 (0x00000200UL) /* x1/4 */ -#define _00000300_CGC_PCLKB_DIV_8 (0x00000300UL) /* x1/8 */ -#define _00000400_CGC_PCLKB_DIV_16 (0x00000400UL) /* x1/16 */ -#define _00000500_CGC_PCLKB_DIV_32 (0x00000500UL) /* x1/32 */ -#define _00000600_CGC_PCLKB_DIV_64 (0x00000600UL) /* x1/64 */ -/* Peripheral Module Clock A (PCLKA) */ -#define _00000000_CGC_PCLKA_DIV_1 (0x00000000UL) /* x1 */ -#define _00001000_CGC_PCLKA_DIV_2 (0x00001000UL) /* x1/2 */ -#define _00002000_CGC_PCLKA_DIV_4 (0x00002000UL) /* x1/4 */ -#define _00003000_CGC_PCLKA_DIV_8 (0x00003000UL) /* x1/8 */ -#define _00004000_CGC_PCLKA_DIV_16 (0x00004000UL) /* x1/16 */ -#define _00005000_CGC_PCLKA_DIV_32 (0x00005000UL) /* x1/32 */ -#define _00006000_CGC_PCLKA_DIV_64 (0x00006000UL) /* x1/64 */ -/* External Bus Clock (BCLK) */ -#define _00000000_CGC_BCLK_DIV_1 (0x00000000UL) /* x1 */ -#define _00010000_CGC_BCLK_DIV_2 (0x00010000UL) /* x1/2 */ -#define _00020000_CGC_BCLK_DIV_4 (0x00020000UL) /* x1/4 */ -#define _00030000_CGC_BCLK_DIV_8 (0x00030000UL) /* x1/8 */ -#define _00040000_CGC_BCLK_DIV_16 (0x00040000UL) /* x1/16 */ -#define _00050000_CGC_BCLK_DIV_32 (0x00050000UL) /* x1/32 */ -#define _00060000_CGC_BCLK_DIV_64 (0x00060000UL) /* x1/64 */ -/* System Clock (ICLK) */ -#define _00000000_CGC_ICLK_DIV_1 (0x00000000UL) /* x1 */ -#define _01000000_CGC_ICLK_DIV_2 (0x01000000UL) /* x1/2 */ -#define _02000000_CGC_ICLK_DIV_4 (0x02000000UL) /* x1/4 */ -#define _03000000_CGC_ICLK_DIV_8 (0x03000000UL) /* x1/8 */ -#define _04000000_CGC_ICLK_DIV_16 (0x04000000UL) /* x1/16 */ -#define _05000000_CGC_ICLK_DIV_32 (0x05000000UL) /* x1/32 */ -#define _06000000_CGC_ICLK_DIV_64 (0x06000000UL) /* x1/64 */ -/* System Clock (FCLK) */ -#define _00000000_CGC_FCLK_DIV_1 (0x00000000UL) /* x1 */ -#define _10000000_CGC_FCLK_DIV_2 (0x10000000UL) /* x1/2 */ -#define _20000000_CGC_FCLK_DIV_4 (0x20000000UL) /* x1/4 */ -#define _30000000_CGC_FCLK_DIV_8 (0x30000000UL) /* x1/8 */ -#define _40000000_CGC_FCLK_DIV_16 (0x40000000UL) /* x1/16 */ -#define _50000000_CGC_FCLK_DIV_32 (0x50000000UL) /* x1/32 */ -#define _60000000_CGC_FCLK_DIV_64 (0x60000000UL) /* x1/64 */ - -/* - System Clock Control Register 2 (SCKCR2) -*/ -#define _0010_CGC_UCLK_DIV_1 (0x0010U) /* x1/2 */ -#define _0020_CGC_UCLK_DIV_3 (0x0020U) /* x1/3 */ -#define _0030_CGC_UCLK_DIV_4 (0x0030U) /* x1/4 */ -#define _0040_CGC_UCLK_DIV_5 (0x0040U) /* x1/5 */ -#define _0001_SCKCR2_BIT0 (0x0001U) /* RESERVE BIT0 */ - -/* - System Clock Control Register 3 (SCKCR3) -*/ -#define _0000_CGC_CLOCKSOURCE_LOCO (0x0000U) /* LOCO */ -#define _0100_CGC_CLOCKSOURCE_HOCO (0x0100U) /* HOCO */ -#define _0200_CGC_CLOCKSOURCE_MAINCLK (0x0200U) /* Main clock oscillator */ -#define _0300_CGC_CLOCKSOURCE_SUBCLK (0x0300U) /* Sub-clock oscillator */ -#define _0400_CGC_CLOCKSOURCE_PLL (0x0400U) /* PLL circuit */ - -/* - PLL Control Register (PLLCR) -*/ -/* PLL Input Frequency Division Ratio Select (PLIDIV[1:0]) */ -#define _0000_CGC_PLL_FREQ_DIV_1 (0x0000U) /* x1 */ -#define _0001_CGC_PLL_FREQ_DIV_2 (0x0001U) /* x1/2 */ -#define _0002_CGC_PLL_FREQ_DIV_3 (0x0002U) /* x1/3 */ -/* PLL Clock Source Select (PLLSRCSEL) */ -#define _0000_CGC_PLL_SOURCE_MAIN (0x0000U) /* Main clock oscillator */ -#define _0010_CGC_PLL_SOURCE_HOCO (0x0010U) /* HOCO */ -/* Frequency Multiplication Factor Select (STC[5:0]) */ -#define _1300_CGC_PLL_FREQ_MUL_10_0 (0x1300U) /* x10.0 */ -#define _1400_CGC_PLL_FREQ_MUL_10_5 (0x1400U) /* x10.5 */ -#define _1500_CGC_PLL_FREQ_MUL_11_0 (0x1500U) /* x11.0 */ -#define _1600_CGC_PLL_FREQ_MUL_11_5 (0x1600U) /* x11.5 */ -#define _1700_CGC_PLL_FREQ_MUL_12_0 (0x1700U) /* x12.0 */ -#define _1800_CGC_PLL_FREQ_MUL_12_5 (0x1800U) /* x12.5 */ -#define _1900_CGC_PLL_FREQ_MUL_13_0 (0x1900U) /* x13.0 */ -#define _1A00_CGC_PLL_FREQ_MUL_13_5 (0x1A00U) /* x13.5 */ -#define _1B00_CGC_PLL_FREQ_MUL_14_0 (0x1B00U) /* x14.0 */ -#define _1C00_CGC_PLL_FREQ_MUL_14_5 (0x1C00U) /* x14.5 */ -#define _1D00_CGC_PLL_FREQ_MUL_15_0 (0x1D00U) /* x15.0 */ -#define _1E00_CGC_PLL_FREQ_MUL_15_5 (0x1E00U) /* x15.5 */ -#define _1F00_CGC_PLL_FREQ_MUL_16_0 (0x1F00U) /* x16.0 */ -#define _2000_CGC_PLL_FREQ_MUL_16_5 (0x2000U) /* x16.5 */ -#define _2100_CGC_PLL_FREQ_MUL_17_0 (0x2100U) /* x17.0 */ -#define _2200_CGC_PLL_FREQ_MUL_17_5 (0x2200U) /* x17.5 */ -#define _2300_CGC_PLL_FREQ_MUL_18_0 (0x2300U) /* x18.0 */ -#define _2400_CGC_PLL_FREQ_MUL_18_5 (0x2400U) /* x18.5 */ -#define _2500_CGC_PLL_FREQ_MUL_19_0 (0x2500U) /* x19.0 */ -#define _2600_CGC_PLL_FREQ_MUL_19_5 (0x2600U) /* x19.5 */ -#define _2700_CGC_PLL_FREQ_MUL_20_0 (0x2700U) /* x20.0 */ -#define _2800_CGC_PLL_FREQ_MUL_20_5 (0x2800U) /* x20.5 */ -#define _2900_CGC_PLL_FREQ_MUL_21_0 (0x2900U) /* x21.0 */ -#define _2A00_CGC_PLL_FREQ_MUL_21_5 (0x2A00U) /* x21.5 */ -#define _2B00_CGC_PLL_FREQ_MUL_22_0 (0x2B00U) /* x22.0 */ -#define _2C00_CGC_PLL_FREQ_MUL_22_5 (0x2C00U) /* x22.5 */ -#define _2D00_CGC_PLL_FREQ_MUL_23_0 (0x2D00U) /* x23.0 */ -#define _2E00_CGC_PLL_FREQ_MUL_23_5 (0x2E00U) /* x23.5 */ -#define _2F00_CGC_PLL_FREQ_MUL_24_0 (0x2F00U) /* x24.0 */ -#define _3000_CGC_PLL_FREQ_MUL_24_5 (0x3000U) /* x24.5 */ -#define _3100_CGC_PLL_FREQ_MUL_25_0 (0x3100U) /* x25.0 */ -#define _3200_CGC_PLL_FREQ_MUL_25_5 (0x3200U) /* x25.5 */ -#define _3300_CGC_PLL_FREQ_MUL_26_0 (0x3300U) /* x26.0 */ -#define _3400_CGC_PLL_FREQ_MUL_26_5 (0x3400U) /* x26.5 */ -#define _3500_CGC_PLL_FREQ_MUL_27_0 (0x3500U) /* x27.0 */ -#define _3600_CGC_PLL_FREQ_MUL_27_5 (0x3600U) /* x27.5 */ -#define _3700_CGC_PLL_FREQ_MUL_28_0 (0x3700U) /* x28.0 */ -#define _3800_CGC_PLL_FREQ_MUL_28_5 (0x3800U) /* x28.5 */ -#define _3900_CGC_PLL_FREQ_MUL_29_0 (0x3900U) /* x29.0 */ -#define _3A00_CGC_PLL_FREQ_MUL_29_5 (0x3A00U) /* x29.5 */ -#define _3B00_CGC_PLL_FREQ_MUL_30_0 (0x3B00U) /* x30.0 */ - -/* - Oscillation Stop Detection Control Register (OSTDCR) -*/ -/* Oscillation Stop Detection Interrupt Enable (OSTDIE) */ -#define _00_CGC_OSC_STOP_INT_DISABLE (0x00U) /* The oscillation stop detection interrupt is disabled */ -#define _01_CGC_OSC_STOP_INT_ENABLE (0x01U) /* The oscillation stop detection interrupt is enabled */ -/* Oscillation Stop Detection Function Enable (OSTDE) */ -#define _00_CGC_OSC_STOP_DISABLE (0x00U) /* Oscillation stop detection function is disabled */ -#define _80_CGC_OSC_STOP_ENABLE (0x80U) /* Oscillation stop detection function is enabled */ - -/* - High-Speed On-Chip Oscillator Control Register 2 (HOCOCR2) -*/ -/* HOCO Frequency Setting (HCFRQ[1:0]) */ -#define _00_CGC_HOCO_CLK_16 (0x00U) /* 16 MHz */ -#define _01_CGC_HOCO_CLK_18 (0x01U) /* 18 MHz */ -#define _02_CGC_HOCO_CLK_20 (0x02U) /* 20 MHz */ - -/* - Main Clock Oscillator Forced Oscillation Control Register (MOFCR) -*/ -/* Main Oscillator Drive Capability 2 Switching (MODRV2[1:0]) */ -#define _00_CGC_MAINOSC_UNDER24M (0x00U) /* 20.1 to 24 MHz */ -#define _10_CGC_MAINOSC_UNDER20M (0x10U) /* 16.1 to 20 MHz */ -#define _20_CGC_MAINOSC_UNDER16M (0x20U) /* 8.1 to 16 MHz */ -#define _30_CGC_MAINOSC_EQUATE8M (0x30U) /* 8 MHz */ -/* Main Clock Oscillator Switch (MOSEL) */ -#define _00_CGC_MAINOSC_RESONATOR (0x00U) /* Resonator */ -#define _40_CGC_MAINOSC_EXTERNAL (0x40U) /* External oscillator input */ - -/* - RTC Control Register 4 (RCR4) -*/ -/* Count source select */ -#define _00_RTC_SOURCE_SELECT_SUB (0x00U) /* Select sub-clock oscillator */ -#define _01_RTC_SOURCE_SELECT_MAIN_FORCED (0x01U) /* Select main clock oscillator */ -#define _53_CGC_MOSCWTCR_VALUE (0x53U) /* Main Clock Oscillator Wait Time */ -#define _21_CGC_SOSCWTCR_VALUE (0x21U) /* Sub-Clock Oscillator Wait Time */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_CGC_Create(void); -void R_CGC_Create_UserInit(); -#endif diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_smc_cgc_user.c b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_smc_cgc_user.c deleted file mode 100644 index c2fc1d4ce60..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_smc_cgc_user.c +++ /dev/null @@ -1,64 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc_user.c -* Version : 1.2.0 -* Device(s) : R5F565NEDxFB -* Description : None -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -/* Start user code for include. Do not edit comment generated here */ -#include "r_smc_cgc.h" -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: R_CGC_Create_UserInit -* Description : This function adds user code after initializing CGC -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_CGC_Create_UserInit(void) -{ - /* Start user code for code init. Do not edit comment generated here */ - /* End user code. Do not edit comment generated here */ -} - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_smc_entry.h b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_smc_entry.h deleted file mode 100644 index edcc8f0210c..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_smc_entry.h +++ /dev/null @@ -1,54 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_entry.h -* Version : 1.2.3 -* Device(s) : R5F565NEDxFB -* Description : SMC platform header file. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_ENTRY_H -#define SMC_ENTRY_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_smc_interrupt.c b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_smc_interrupt.c deleted file mode 100644 index 8884b7cbb09..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_smc_interrupt.c +++ /dev/null @@ -1,52 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_interrupt.c -* Version : 1.1.0 -* Device(s) : R5F565NEDxFB -* Description : This file implements interrupt setting -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_smc_interrupt.h" -#include "platform.h" - -/*********************************************************************************************************************** -* Function Name: R_Interrupt_Create -* Description : This function Used to set the fast interrupt or group interrupt -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Interrupt_Create(void) -{ - /* Disable group AL1 interrupt*/ - IEN(ICU,GROUPAL1) = 0U; - - - /* Set group AL1 interrupt priority level */ - IPR(ICU,GROUPAL1) = _02_ICU_PRIORITY_LEVEL2; - - /* Enable group AL1 interrupt */ - IEN(ICU,GROUPAL1) = 1U; -} - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_smc_interrupt.h b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_smc_interrupt.h deleted file mode 100644 index eda06304a00..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/general/r_smc_interrupt.h +++ /dev/null @@ -1,292 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_interrupt.h -* Version : 1.1.0 -* Device(s) : R5F565NEDxFB -* Description : This file implements interrupt setting. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_INTERRUPT_H -#define SMC_INTERRUPT_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/* Priority level of interrupt source. - * These macro definitions are used to set the IPR register directly - */ -#define _00_ICU_PRIORITY_LEVEL0 (0x00U) /* Level 0 (disabled) */ -#define _01_ICU_PRIORITY_LEVEL1 (0x01U) /* Level 1 */ -#define _02_ICU_PRIORITY_LEVEL2 (0x02U) /* Level 2 */ -#define _03_ICU_PRIORITY_LEVEL3 (0x03U) /* Level 3 */ -#define _04_ICU_PRIORITY_LEVEL4 (0x04U) /* Level 4 */ -#define _05_ICU_PRIORITY_LEVEL5 (0x05U) /* Level 5 */ -#define _06_ICU_PRIORITY_LEVEL6 (0x06U) /* Level 6 */ -#define _07_ICU_PRIORITY_LEVEL7 (0x07U) /* Level 7 */ -#define _08_ICU_PRIORITY_LEVEL8 (0x08U) /* Level 8 */ -#define _09_ICU_PRIORITY_LEVEL9 (0x09U) /* Level 9 */ -#define _0A_ICU_PRIORITY_LEVEL10 (0x0AU) /* Level 10 */ -#define _0B_ICU_PRIORITY_LEVEL11 (0x0BU) /* Level 11 */ -#define _0C_ICU_PRIORITY_LEVEL12 (0x0CU) /* Level 12 */ -#define _0D_ICU_PRIORITY_LEVEL13 (0x0DU) /* Level 13 */ -#define _0E_ICU_PRIORITY_LEVEL14 (0x0EU) /* Level 14 */ -#define _0F_ICU_PRIORITY_LEVEL15 (0x0FU) /* Level 15 */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -#define FAST_INTERRUPT_VECTOR (0) - -/* The macro definitions below list the full set of priority levels as selected in the Interrupts tab - * Please do not modify this file manually - */ -#define ICU_BSC_BUSERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RAM_RAMERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_FCU_FIFERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_FCU_FRDYI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_SWINT2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_SWINT_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT0_CMI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT1_CMI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_CMWI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_CMWI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_D0FIFO0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_D1FIFO0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI0_SPRI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI0_SPTI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI1_SPRI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI1_SPTI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_QSPI_SPRI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_QSPI_SPTI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SDHI_SBFAI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MMCIF_MBFAI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC1_RXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC1_TXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC0_RXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC0_TXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC2_RXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC2_TXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI0_RXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI0_TXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI1_RXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI1_TXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI2_RXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI2_TXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ13_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ14_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ15_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI3_RXI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI3_TXI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI4_RXI4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI4_TXI4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI5_RXI5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI5_TXI5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI6_RXI6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI6_TXI6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_LVD1_LVD1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_LVD2_LVD2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_USBR0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_ALM_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_PRD_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_IWDT_IWUNI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_WDT_WUNI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PDC_PCDFI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI7_RXI7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI7_TXI7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI8_RXI8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI8_TXI8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI9_RXI9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI9_TXI9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI10_RXI10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI10_TXI10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBE0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI2_SPRI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI2_SPTI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPAL0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPAL1_PRIORITY _02_ICU_PRIORITY_LEVEL2 -#define ICU_SCI11_RXI11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI11_TXI11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI12_RXI12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI12_TXI12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC0I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC1I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC2I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC3I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC74I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_OST_OSTDI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EXDMAC_EXDMAC0I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EXDMAC_EXDMAC1I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT2_CMI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT3_CMI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0C_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0D_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TCI0V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TGI1B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TCI1V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TCI1U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TGI2A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TGI2B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TCI2V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TCI2U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TGI1A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3C_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_CMIA0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_CMIB0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_OVI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_CMIA1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_CMIB1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_OVI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_CMIA2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_CMIB2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_OVI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_CMIA3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_CMIB3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_OVI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3D_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TCI3V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TGI4A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TGI4B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TCI4V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TCI4U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TGI5A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TGI5B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TCI5V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TCI5U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_IC0I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_IC1I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_OC0I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_OC1I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_IC0I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_IC1I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_OC0I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_OC1I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_CUP_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_RXF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_TXF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_RXM0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_TXM0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_RXF1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_TXF1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_RXM1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_TXM1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_USBI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12ADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12GBADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12GCADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12ADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12GBADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12GCADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB192_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ELC_ELSR18I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ELC_ELSR19I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_PROC_BUSY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_ROMOK_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_LONG_PLG_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_TEST_BUSY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_WRRDY0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_WRRDY1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_WRRDY4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_RDRDY0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_RDRDY1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_INTEGRATE_WRRDY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_INTEGRATE_RDRDY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB206_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB207_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TGIA1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIA0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIB0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIC0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGID0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TCIV0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIE0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TGIB1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TCIV1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TCIU1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TGIA2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TGIB2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TCIV2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TCIU2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIA3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIB3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIC3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGID3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TCIV3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIA4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIB4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIC4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGID4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TCIV4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIU5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIV5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIW5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIA6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIB6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIC6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGID6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TCIV6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIA7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIB7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIC7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGID7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TCIV7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIA8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIB8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIC8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGID8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TCIV8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA251_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA252_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA253_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA254_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA255_PRIORITY _0F_ICU_PRIORITY_LEVEL15 - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Interrupt_Create(void); -#endif diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_bsp_config.h b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_bsp_config.h deleted file mode 100644 index 3a661dee9e4..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_bsp_config.h +++ /dev/null @@ -1,627 +0,0 @@ -/* Generated configuration header file - do not edit */ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_config_reference.h -* Device(s) : RX65N -* Description : The file r_bsp_config.h is used to configure your BSP. r_bsp_config.h should be included -* somewhere in your package so that the r_bsp code has access to it. This file (r_bsp_config_reference.h) -* is just a reference file that the user can use to make their own r_bsp_config.h file. -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 15.05.2017 1.00 First Release -* : 01.12.2017 1.01 Added the following macro definition. -* - BSP_CFG_EBMAPCR_1ST_PRIORITY -* - BSP_CFG_EBMAPCR_2ND_PRIORITY -* - BSP_CFG_EBMAPCR_3RD_PRIORITY -* - BSP_CFG_EBMAPCR_4TH_PRIORITY -* - BSP_CFG_EBMAPCR_5TH_PRIORITY -* : 01.07.2018 1.02 Added the following macro definition. -* - BSP_CFG_CONFIGURATOR_SELECT -* Add RTOS support. FreeRTOS. Define a timer for RTOS. -* : 27.07.2018 1.03 Modified the comment of PLL clock source. -* Added the following macro definition for ID code protection. -* - BSP_CFG_ID_CODE_LONG_1 -* - BSP_CFG_ID_CODE_LONG_2 -* - BSP_CFG_ID_CODE_LONG_3 -* - BSP_CFG_ID_CODE_LONG_4 -* Added the following macro definition. -* - BSP_CFG_FIT_IPL_MAX -* : xx.xx.xxxx 1.04 Added support for GNUC and ICCRX. -***********************************************************************************************************************/ -#ifndef R_BSP_CONFIG_REF_HEADER_FILE -#define R_BSP_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* NOTE: - The default settings are the same as when using RSKRX65N-2MB. - Change to the settings for the user board. -*/ - -/* Start up select - 0 = Enable BSP startup program. - 1 = Disable BSP startup program. (e.g. Using user startup program.) -*/ -#define BSP_CFG_STARTUP_DISABLE (0) - -/* Enter the product part number for your MCU. This information will be used to obtain information about your MCU such - as package and memory size. - To help parse this information, the part number will be defined using multiple macros. - R 5 F 56 5N E D D FP - | | | | | | | | | Macro Name Description - | | | | | | | | |__BSP_CFG_MCU_PART_PACKAGE = Package type, number of pins, and pin pitch - | | | | | | | |____not used = Products with wide temperature range - | | | | | | |______BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED = Encryption module included/not included - | | | | | |________BSP_CFG_MCU_PART_MEMORY_SIZE = ROM, RAM, and Data Flash Capacity - | | | | |___________BSP_CFG_MCU_PART_GROUP = Group name - | | | |______________BSP_CFG_MCU_PART_SERIES = Series name - | | |________________BSP_CFG_MCU_PART_MEMORY_TYPE = Type of memory (Flash, ROMless) - | |__________________not used = Renesas MCU - |____________________not used = Renesas semiconductor product. - */ - -/* Package type. Set the macro definition based on values below: - Character(s) = Value for macro = Package Type/Number of Pins/Pin Pitch - FC = 0x0 = LFQFP/176/0.50 - BG = 0x1 = LFBGA/176/0.80 - LC = 0x2 = TFLGA/177/0.50 - FB = 0x3 = LFQFP/144/0.50 - LK = 0x4 = TFLGA/145/0.50 - FP = 0x5 = LFQFP/100/0.50 - LJ = 0xA = TFLGA/100/0.65 -*/ -#define BSP_CFG_MCU_PART_PACKAGE (0x3) // <-- Updated by GUI. Do not edit this value manually - -/* Whether Encryption and SDHI/SDSI are included or not. - Character(s) = Value for macro = Description - A = false = Encryption module not included, SDHI/SDSI module not included - B = false = Encryption module not included, SDHI/SDSI module included - D = false = Encryption module not included, SDHI/SDSI module included, dual-bank structure - E = true = Encryption module included, SDHI/SDSI module not included - F = true = Encryption module included, SDHI/SDSI module included - H = true = Encryption module included, SDHI/SDSI module included, dual-bank structure -*/ -#define BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED (false) // <-- Updated by GUI. Do not edit this value manually - -/* ROM, RAM, and Data Flash Capacity. - Character(s) = Value for macro = ROM Size/Ram Size/Data Flash Size - 4 = 0x4 = 512KB/256KB/Not equipped - 7 = 0x7 = 768KB/256KB/Not equipped - 9 = 0x9 = 1MB/256KB/Not equipped - C = 0xC = 1.5MB/640KB/32KB - E = 0xE = 2MB/640KB/32KB - NOTE: When the RAM capacity is 640KB, the RAM areas are not contiguous. -*/ -#define BSP_CFG_MCU_PART_MEMORY_SIZE (0xE) // <-- Updated by GUI. Do not edit this value manually - -/* Group name. - Character(s) = Value for macro = Description - 5N/51 = 0x0 = RX65N Group/RX651 Group -*/ -#define BSP_CFG_MCU_PART_GROUP (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Series name. - Character(s) = Value for macro = Description - 56 = 0x0 = RX600 Series -*/ -#define BSP_CFG_MCU_PART_SERIES (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Memory type. - Character(s) = Value for macro = Description - F = 0x0 = Flash memory version -*/ -#define BSP_CFG_MCU_PART_MEMORY_TYPE (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Whether to use 1 stack or 2. RX MCUs have the ability to use 2 stacks: an interrupt stack and a user stack. - * When using 2 stacks the user stack will be used during normal user code. When an interrupt occurs the CPU - * will automatically shift to using the interrupt stack. Having 2 stacks can make it easier to figure out how - * much stack space to allocate since the user does not have to worry about always having enough room on the - * user stack for if-and-when an interrupt occurs. Some users will not want 2 stacks though because it is not - * needed in all applications and can lead to wasted RAM (i.e. space in between stacks that is not used). - * If only 1 stack is used then the interrupt stack is the one that will be used. If 1 stack is chosen then - * the user may want to remove the 'SU' section from the linker sections to remove any linker warnings. - * - * 0 = Use 1 stack. Disable user stack. User stack size set below will be ignored. - * 1 = Use 2 stacks. User stack and interrupt stack will both be used. - */ -#define BSP_CFG_USER_STACK_ENABLE (0) - -#if defined(__CCRX__) || defined(__GNUC__) - -/* When using the user startup program, disable the following code. */ -#if (BSP_CFG_STARTUP_DISABLE == 0) - -/* If only 1 stack is chosen using BSP_CFG_USER_STACK_ENABLE then no RAM will be allocated for the user stack. */ -#if (BSP_CFG_USER_STACK_ENABLE == 1) -/* User Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. */ -#define BSP_CFG_USTACK_BYTES (0) -#endif - -/* Interrupt Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. - * If the interrupt stack is the only stack being used then the user will likely want to increase the default size - * below. - */ -#define BSP_CFG_ISTACK_BYTES (0x1000) - -#endif /* BSP_CFG_STARTUP_DISABLE == 0 */ - -/* Heap size in bytes. - To disable the heap you must follow these steps: - 1) Set this macro (BSP_CFG_HEAP_BYTES) to 0. - 2) Set the macro BSP_CFG_IO_LIB_ENABLE to 0. - 3) Disable stdio from being built into the project library. This is done by going into the Renesas RX Toolchain - settings and choosing the Standard Library section. After that choose 'Standard Library' for Category in HEW or - choose 'Contents' in E2Studio. This will present a list of modules that can be included. Uncheck the box for - stdio.h. -*/ -#define BSP_CFG_HEAP_BYTES (0) - -#endif /* defined(__CCRX__) || defined(__GNUC__) */ - -#if defined(__CCRX__) - -/* Initializes C input & output library functions. - 0 = Disable I/O library initialization in resetprg.c. If you are not using stdio then use this value. - 1 = Enable I/O library initialization in resetprg.c. This is default and needed if you are using stdio. */ -#define BSP_CFG_IO_LIB_ENABLE (1) - -#endif /* defined(__CCRX__) */ - -/* If desired the user may redirect the stdio charget() and/or charput() functions to their own respective functions - by enabling below and providing and replacing the my_sw_... function names with the names of their own functions. */ -#define BSP_CFG_USER_CHARGET_ENABLED (0) -#define BSP_CFG_USER_CHARGET_FUNCTION my_sw_charget_function - -#define BSP_CFG_USER_CHARPUT_ENABLED (0) -#define BSP_CFG_USER_CHARPUT_FUNCTION my_sw_charput_function - -/* After reset MCU will operate in Supervisor mode. To switch to User mode, set this macro to '1'. For more information - on the differences between these 2 modes see the CPU >> Processor Mode section of your MCU's hardware manual. - 0 = Stay in Supervisor mode. - 1 = Switch to User mode. -*/ -#define BSP_CFG_RUN_IN_USER_MODE (0) - -/* Set your desired ID code. NOTE, leave at the default (all 0xFF's) if you do not wish to use an ID code. If you set - this value and program it into the MCU then you will need to remember the ID code because the debugger will ask for - it when trying to connect. Note that the E1/E20 will ignore the ID code when programming the MCU during debugging. - If you set this value and then forget it then you can clear the ID code by connecting up in serial boot mode using - FDT. The ID Code is 16 bytes long. The macro below define the ID Code in 4-byte sections. */ -/* Lowest 4-byte section, address 0xFE7F5D50. From MSB to LSB: ID code 4, ID code 3, ID code 2, ID code 1/Control Code. - */ -#define BSP_CFG_ID_CODE_LONG_1 (0xFFFFFFFF) -/* 2nd ID Code section, address 0xFE7F5D54. From MSB to LSB: ID code 8, ID code 7, ID code 6, ID code 5. */ -#define BSP_CFG_ID_CODE_LONG_2 (0xFFFFFFFF) -/* 3rd ID Code section, address 0xFE7F5D58. From MSB to LSB: ID code 12, ID code 11, ID code 10, ID code 9. */ -#define BSP_CFG_ID_CODE_LONG_3 (0xFFFFFFFF) -/* 4th ID Code section, address 0xFE7F5D5C. From MSB to LSB: ID code 16, ID code 15, ID code 14, ID code 13. */ -#define BSP_CFG_ID_CODE_LONG_4 (0xFFFFFFFF) - -/* Clock source select (CKSEL). - 0 = Low Speed On-Chip Oscillator (LOCO) - 1 = High Speed On-Chip Oscillator (HOCO) - 2 = Main Clock Oscillator - 3 = Sub-Clock Oscillator - 4 = PLL Circuit -*/ -#define BSP_CFG_CLOCK_SOURCE (4) // <-- Updated by GUI. Do not edit this value manually - -/* Main clock Oscillator Switching (MOSEL). - 0 = Resonator - 1 = External clock input -*/ -#define BSP_CFG_MAIN_CLOCK_SOURCE (0) // <-- Updated by GUI. Do not edit this value manually - -/* The sub-clock oscillation control for using the RTC. - When '1' is selected, the registers related to RTC are initialized and the sub-clock oscillator is operated. - 0 = The RTC is not to be used. - 1 = The RTC is to be used. -*/ -#define BSP_CFG_RTC_ENABLE (0) // <-- Updated by GUI. Do not edit this value manually - -/* Sub-Clock Oscillator Drive Capacity Control (RTCDV). - 0 = Drive capacity for standard CL. - 1 = Drive capacity for low CL. -*/ -#define BSP_CFG_SOSC_DRV_CAP (0) // <-- Updated by GUI. Do not edit this value manually //standard CL by default - -/* Clock configuration options. - The input clock frequency is specified and then the system clocks are set by specifying the multipliers used. The - multiplier settings are used to set the clock registers in resetprg.c. If a 24MHz clock is used and the - ICLK is 120MHz, PCLKA is 120MHz, PCLKB is 60MHz, PCLKC is 60MHz, PCLKD is 60MHz, FCLK is 60MHz, USB Clock is 48MHz, - and BCLK is 120MHz then the settings would be: - - BSP_CFG_XTAL_HZ = 24000000 - BSP_CFG_PLL_DIV = 1 (no division) - BSP_CFG_PLL_MUL = 10.0 (24MHz x 10.0 = 240MHz) - BSP_CFG_ICK_DIV = 2 : System Clock (ICLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_ICK_DIV) = 120MHz - BSP_CFG_PCKA_DIV = 2 : Peripheral Clock A (PCLKA) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKA_DIV) = 120MHz - BSP_CFG_PCKB_DIV = 4 : Peripheral Clock B (PCLKB) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKB_DIV) = 60MHz - BSP_CFG_PCKC_DIV = 4 : Peripheral Clock C (PCLKC) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKC_DIV) = 60MHz - BSP_CFG_PCKD_DIV = 4 : Peripheral Clock D (PCLKD) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKD_DIV) = 60MHz - BSP_CFG_FCK_DIV = 4 : Flash IF Clock (FCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_FCK_DIV) = 60MHz - BSP_CFG_BCK_DIV = 2 : External Bus Clock (BCK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_BCK_DIV) = 120MHz - BSP_CFG_UCK_DIV = 5 : USB Clock (UCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_UCK_DIV) = 48MHz -*/ - -/* Input clock frequency in Hz (XTAL or EXTAL). */ -#define BSP_CFG_XTAL_HZ (12000000) // <-- Updated by GUI. Do not edit this value manually - -/* The HOCO can operate at several different frequencies. Choose which one using the macro below. - Available frequency settings: - 0 = 16MHz (default) - 1 = 18MHz - 2 = 20MHz -*/ -#define BSP_CFG_HOCO_FREQUENCY (0) // <-- Updated by GUI. Do not edit this value manually - -/* PLL clock source (PLLSRCEL). Choose which clock source to input to the PLL circuit. - Available clock sources: - 0 = Main clock (default) - 1 = HOCO -*/ -#define BSP_CFG_PLL_SRC (0) // <-- Updated by GUI. Do not edit this value manually - -/* PLL Input Frequency Division Ratio Select (PLIDIV). - Available divisors = /1 (no division), /2, /3 -*/ -#define BSP_CFG_PLL_DIV (1) // <-- Updated by GUI. Do not edit this value manually - -/* PLL Frequency Multiplication Factor Select (STC). - Available multipliers = x10.0 to x30.0 in 0.5 increments (e.g. 10.0, 10.5, 11.0, 11.5, ..., 29.0, 29.5, 30.0) -*/ -#define BSP_CFG_PLL_MUL (20.0) // <-- Updated by GUI. Do not edit this value manually - -/* System Clock Divider (ICK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_ICK_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock A Divider (PCKA). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKA_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock B Divider (PCKB). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKB_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock C Divider (PCKC). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKC_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock D Divider (PCKD). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKD_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* External Bus Clock Divider (BCLK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_BCK_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Flash IF Clock Divider (FCK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_FCK_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* USB Clock Divider Select. - Available divisors = /2, /3, /4, /5 -*/ -#define BSP_CFG_UCK_DIV (5) // <-- Updated by GUI. Do not edit this value manually - -/* Configure BCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency, 2= BCK/2 frequency -*/ -#define BSP_CFG_BCLK_OUTPUT (0) // <-- Updated by GUI. Do not edit this value manually - -/* Configure SDCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency -*/ -#define BSP_CFG_SDCLK_OUTPUT (0) // <-- Updated by GUI. Do not edit this value manually - -/* Main Clock Oscillator Wait Time (MOSCWTCR). - The value of MOSCWTCR register required for correspondence with the waiting time required to secure stable oscillation - by the main clock oscillator is obtained by using the maximum frequency for fLOCO in the formula below. - - BSP_CFG_MOSC_WAIT_TIME > (tMAINOSC * (fLOCO_max) + 16)/32 - (tMAINOSC: main clock oscillation stabilization time; fLOCO_max: maximum frequency for fLOCO) - - If tMAINOSC is 9.98 ms and fLOCO_max is 264 kHz (the period is 1/3.78 us), the formula gives - BSP_CFG_MOSC_WAIT_TIME > (9.98 ms * (264 kHZ) + 16)/32 = 82.83, so set the BSP_CFG_MOSC_WAIT_TIME to 83(53h). - - NOTE: The waiting time is not required when an external clock signal is input for the main clock oscillator. - Set the BSP_CFG_MOSC_WAIT_TIME to 00h. -*/ -#define BSP_CFG_MOSC_WAIT_TIME (0x53) // <-- Updated by GUI. Do not edit this value manually - -/* Sub-Clock Oscillator Wait Time (SOSCWTCR). - The value of SOSCWTCR register required for correspondence with the expected time to secure settling of oscillation - by the sub-clock oscillator is obtained by using the maximum frequency for fLOCO in the formula below. - - BSP_CFG_SOSC_WAIT_TIME > (tSUBOSC * (fLOCO_max) + 16)/16384 - (tSUBOSC: sub-clock oscillation stabilization time; fLOCO_max: maximum frequency for fLOCO) - - If tSUBOSC is 2 s and fLOCO is 264 kHz (the period is 1/3.78 us), the formula gives - BSP_CFG_SOSC_WAIT_TIME > (2 s * (264 kHz) +16)/16384 = 32.22, so set the BSP_CFG_SOSC_WAIT_TIME bits to 33(21h). -*/ -#define BSP_CFG_SOSC_WAIT_TIME (0x21) // <-- Updated by GUI. Do not edit this value manually - -/* ROM Cache Enable Register (ROMCE). - 0 = ROM cache operation disabled. - 1 = ROM cache operation enabled. -*/ -#define BSP_CFG_ROM_CACHE_ENABLE (0) - -/* Configure WDT and IWDT settings. - OFS0 - Option Function Select Register 0 - b31:b29 Reserved When reading, these bits return the value written by the user. The write value should be 1. - b28 WDTRSTIRQS - WDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b27:b26 WDTRPSS - WDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b25:b24 WDTRPES - WDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b23:b20 WDTCKS - WDT Clock Frequency Division Ratio - (1=PCLKB/4, 4=PCLKB/64, 0xF=PCLKB/128, 6=PCLKB/256, - 7=PCLKB/2048, 8=PCLKB/8192) - b19:b18 WDTTOPS - WDT Timeout Period Select (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b17 WDTSTRT - WDT Start Mode Select - (0=auto-start after reset, 1=halt after reset) - b16:b15 Reserved (set to 1) - b14 IWDTSLCSTP - IWDT Sleep Mode Count Stop Control - (0=can't stop count, 1=stop w/some low power modes) - b13 Reserved (set to 1) - b12 IWDTRSTIRQS - IWDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b11:b10 IWDTRPSS - IWDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b9:b8 IWDTRPES - IWDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b7:b4 IWDTCKS - IWDT Clock Frequency Division Ratio - (0=none, 2=/16, 3 = /32, 4=/64, 0xF=/128, 5=/256) - b3:b2 IWDTTOPS - IWDT Timeout Period Select - (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b1 IWDTSTRT - IWDT Start Mode Select - (0=auto-start after reset, 1=halt after reset) - b0 Reserved (set to 1) -*/ -#define BSP_CFG_OFS0_REG_VALUE (0xFFFFFFFF) // <-- Updated by GUI. Do not edit this value manually //Disable by default - -/* Configure whether voltage detection 0 circuit and HOCO are enabled after reset. - OFS1 - Option Function Select Register 1 - b31:b9 Reserved (set to 1) - b8 HOCOEN - Enable/disable HOCO oscillation after a reset (0=enable, 1=disable) - b7:b3 Reserved When reading, these bits return the value written by the user. The write value should be 1. - b2 LVDAS - Voltage Detection 0 circuit start (1=monitoring disabled) - b1:b0 VDSEL - Voltage Detection 0 level select (1=2.94v, 2=2.87v, 3=2.80v) - NOTE: If HOCO oscillation is enabled by OFS1.HOCOEN, HOCO frequency is 16MHz. - BSP_CFG_HOCO_FREQUENCY should be default value. -*/ -#define BSP_CFG_OFS1_REG_VALUE (0xFFFFFFFF) // <-- Updated by GUI. Do not edit this value manually //Disable by default - -/* Trusted memory is facility to prevent the reading of blocks 8 and 9 and blocks 46 and 47 (in dual mode) in - the code flash memory by third party software. This feature is disabled by default. - TMEF - TM Enable Flag Register - b31 Reserved (set to 1) - b30:b28 TMEFDB - Dual-Bank TM Enable - 000: The TM function in the address range from FFEE 0000h to - FFEE FFFFh is enabled in dual mode. - - 111: The TM function in the address range from FFEE 0000h to - FFEE FFFFh is disabled in dual mode. - b27 Reserved (set to 1) - b26:b24 TMEFF - TM Enable - 000: TM function is enabled. - - 111: TM function is disabled. - b23:b0 Reserved (set to 1) - NOTE: If the dual bank function has not been incorporated in a device, - TMEFDB bits [b30:b26] are reserved area. -*/ -#define BSP_CFG_TRUSTED_MODE_FUNCTION (0xFFFFFFFF) //Disable by default - -/* Configure FAW register is used to set the write protection flag and boot area select flag - for setting the flash access window startaddress and flash access window end address. - FAW - Flash Access Window Setting Register - b31 BTFLG - Boot Area Select Flag - 0: FFFF C000h to FFFF DFFFh are used as the boot area - - 1: FFFF E000h to FFFF FFFFh are used as the boot area - b30:b28 Reserved - When reading, these bits return the value written by the user.The write value should be 1. - b27:b16 FAWE - Flash Access Window End Address - Flash access window end address - b15 FSPR - Access Window Protection Flag - 0: With protection (P/E disabled) - - 1: Without protection (P/E enabled) - b14:b12 Reserved - When reading, these bits return the value written by the user.The write value should be 1. - b11:b0 FAWS - Flash Access Window Start Address - Flash access window start address - NOTE: Once 0 is written to this bit, the bit can never be restored to 1. - Therefore, the access window and the BTFLG bit never be set again or the TM function - never be disabled once it has been enabled. - Exercise extra caution when handling the FSPR bit. -*/ -#define BSP_CFG_FAW_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* The ROM code protection register is a function to prohibit reading from or programming to the flash memory - when the flash programmer is used during off-board programming. - ROMCODE - ROM Code Protection Register - b31:b0 ROM Code - 0000 0000h: ROM code protection enabled (ROM code protection 1). - 0000 0001h: ROM code protection enabled (ROM code protection 2). - Other than above: ROM code protection disabled. - Note. The ROMCODE register should be set in 32-bit units. -*/ -#define BSP_CFG_ROMCODE_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* Select the bank mode of dual-bank function of the code flash memory. - 0 = Dual mode. - 1 = Linear mode. - NOTE: If the dual bank function has been incorporated in a device, select the bank mode in this macro. - Default setting of the bank mode is linear mode. - If the dual bank function has not been incorporated in a device, this macro should be 1. -*/ -#define BSP_CFG_CODE_FLASH_BANK_MODE (1) //Linear mode by default - -/* Select the startup bank of the program when dual bank function is in dual mode. - 0 = The address range of bank 1 from FFE00000h to FFEFFFFFh and bank 0 from FFF00000h to FFFFFFFFh. - 1 = The address range of bank 1 from FFF00000h to FFFFFFFFh and bank 0 from FFE00000h to FFEFFFFFh. - NOTE: If the dual bank function has been incorporated in a device, select the start bank in this macro. - Default setting of the start bank is bank0. - If the dual bank function has not been incorporated in a device, this macro should be 0. -*/ -#define BSP_CFG_CODE_FLASH_START_BANK (0) //Bank0 by default - -/* This macro lets other modules no if a RTOS is being used. - 0 = RTOS is not used. - 1 = FreeRTOS is used. - 2 = embOS is used.(This is not available.) - 3 = MicroC_OS is used.(This is not available.) - 4 = RI600V4 or RI600PX is used.(This is not available.) -*/ -/* As of today, we need a workaround to avoid the problem that the Smart Configurator does not have such GUI - yet and the BSP_CFG_RTOS_USED here is set to (0) every time of code generation by the Smart Configurator. - The BSP_CFG_RTOS_USED is set to (1) in the r_bsp.h instead of here so that the setting of here is ignored. -*/ -#if !defined(BSP_CFG_RTOS_USED) || (BSP_CFG_RTOS_USED == 0) -#if defined(BSP_CFG_RTOS_USED) -#undef BSP_CFG_RTOS_USED -#endif -#define BSP_CFG_RTOS_USED (0) // <-- Updated by GUI. Do not edit this value manually -#endif - -/* This macro is used to select which CMT channel used for system timer of RTOS. - * The setting of this macro is only valid if the macro BSP_CFG_RTOS_USED is set to a value other than 0. */ -#if (BSP_CFG_RTOS_USED != 0) -/* Setting value. - * 0 = CMT channel 0 used for system timer of RTOS (recommended to be used for RTOS). - * 1 = CMT channel 1 used for system timer of RTOS. - * 2 = CMT channel 2 used for system timer of RTOS. - * 3 = CMT channel 3 used for system timer of RTOS. - * Others = Invalid. */ -#define BSP_CFG_RTOS_SYSTEM_TIMER (0) -#endif - -/* By default modules will use global locks found in mcu_locks.c. If the user is using a RTOS and would rather use its - locking mechanisms then they can change this macro. - NOTE: If '1' is chosen for this macro then the user must also change the next macro 'BSP_CFG_USER_LOCKING_TYPE'. - 0 = Use default locking (non-RTOS) - 1 = Use user defined locking mechanism. -*/ -#define BSP_CFG_USER_LOCKING_ENABLED (0) - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to redefine the typedef - that is used for the locks. If the user is using a RTOS then they would likely redefine the typedef to be - a semaphore/mutex type of their RTOS. Use the macro below to set the type that will be used for the locks. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_TYPE bsp_lock_t - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to define the functions - that will handle the locking and unlocking. These functions should be defined below. - If BSP_CFG_USER_LOCKING_ENABLED is != 0: - R_BSP_HardwareLock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION(mcu_lock_t hw_index) - R_BSP_HardwareUnlock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION(mcu_lock_t hw_index) - NOTE:With these functions the index into the array holding the global hardware locks is passed as the parameter. - R_BSP_SoftwareLock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - R_BSP_SoftwareUnlock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - NOTE:With these functions the actual address of the lock to use is passed as the parameter. - NOTE: These functions must return a boolean. If lock was obtained or released successfully then return true. Else, - return false. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION my_hw_locking_function -#define BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION my_hw_unlocking_function -#define BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION my_sw_locking_function -#define BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION my_sw_unlocking_function - -/* If the user would like to determine if a warm start reset has occurred, then they may enable one or more of the - * following callback definitions AND provide a call back function name for the respective callback - * function (to be defined by the user). Setting BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED = 1 will result - * in a callback to the user defined my_sw_warmstart_prec_function just prior to the initialization of the C - * runtime environment by resetprg. - * - * Setting BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED = 1 will result in a callback to the user defined - * my_sw_warmstart_postc_function just after the initialization of the C runtime environment by resetprg. - */ -#define BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_PRE_C_FUNCTION my_sw_warmstart_prec_function - -#define BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_POST_C_FUNCTION my_sw_warmstart_postc_function - -/* By default FIT modules will check input parameters to be valid. This is helpful during development but some users - will want to disable this for production code. The reason for this would be to save execution time and code space. - This macro is a global setting for enabling or disabling parameter checking. Each FIT module will also have its - own local macro for this same purpose. By default the local macros will take the global value from here though - they can be overridden. Therefore, the local setting has priority over this global setting. Disabling parameter - checking should only used when inputs are known to be good and the increase in speed or decrease in code space is - needed. - 0 = Global setting for parameter checking is disabled. - 1 = Global setting for parameter checking is enabled (Default). -*/ -#define BSP_CFG_PARAM_CHECKING_ENABLE (1) - -/* The extended bus master has five transfer sources: EDMAC, GLCDC-GRA1 (GLCDC graphics 1 data read), GLCDCGRA2 (GLCDC - graphics 2 data read), DRW2D-TX (DRW2D texture data read), and DRW2D-FB (DRW2D frame buffer data read write and - display list data read). - The default priority order in bsp is below - GLCDC-GRA1 > GLCDC-GRA2 > DRW2D-TX > DRW2D-FB > EDMAC. - Priority can be changed with this macro. - - Extended Bus Master Priority setting - 0 = GLCDC graphics 1 data read - 1 = DRW2D texture data read - 2 = DRW2D frame buffer data read write and display list data read - 3 = GLCDC graphics 2 data read - 4 = EDMAC - - Note : This macro is only available for products with at least 1.5 Mbytes of code flash memory. - Settings other than above are prohibited. - Duplicate priority settings can not be made. -*/ -#define BSP_CFG_EBMAPCR_1ST_PRIORITY (0) /* Extended Bus Master 1st Priority Selection */ -#define BSP_CFG_EBMAPCR_2ND_PRIORITY (3) /* Extended Bus Master 2nd Priority Selection */ -#define BSP_CFG_EBMAPCR_3RD_PRIORITY (1) /* Extended Bus Master 3rd Priority Selection */ -#define BSP_CFG_EBMAPCR_4TH_PRIORITY (2) /* Extended Bus Master 4th Priority Selection */ -#define BSP_CFG_EBMAPCR_5TH_PRIORITY (4) /* Extended Bus Master 5th Priority Selection */ - -/* This macro is used to define the voltage that is supplied to the MCU (Vcc). This macro is defined in millivolts. This - macro does not actually change anything on the MCU. Some FIT modules need this information so it is defined here. */ -#define BSP_CFG_MCU_VCC_MV (3300) // <-- Updated by GUI. Do not edit this value manually - -/* Allow initialization of auto-generated peripheral initialization code by Smart Configurator tool. - When not using the Smart Configurator, set the value of BSP_CFG_CONFIGURATOR_SELECT to 0. - 0 = Disabled (default) - 1 = Smart Configurator initialization code used -*/ -#define BSP_CFG_CONFIGURATOR_SELECT (1) // <-- Updated by GUI. Do not edit this value manually - -/* For some BSP functions, it is necessary to ensure that, while these functions are executing, interrupts from other - FIT modules do not occur. By controlling the IPL, these functions disable interrupts that are at or below the - specified interrupt priority level. - This macro sets the IPL. Range is 0x0 - 0xF. - Please set this macro more than IPR for other FIT module interrupts. - The default value is 0xF (maximum value). - Don't change if there is no special processing with higher priority than all fit modules. -*/ -#define BSP_CFG_FIT_IPL_MAX (0xF) - -/* This macro is used to select which SCI channel used for debug serial terminal. - */ -#define MY_BSP_CFG_SERIAL_TERM_SCI (2) - -#endif /* R_BSP_CONFIG_REF_HEADER_FILE */ - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_bsp_config_readme.txt b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_bsp_config_readme.txt deleted file mode 100644 index 2767f7bfe50..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_bsp_config_readme.txt +++ /dev/null @@ -1,12 +0,0 @@ -FIT r_config folder -------------------- -The purpose of the r_config folder is to provide one place where the user can store all of their FIT configuration -files. Putting the files in one place makes them easy to find, backup, and put in a version control system. - -FIT Modules are distributed with a reference configuration file. These files end with '_reference.h'. For example, -the reference configuration file for the r_bsp is named r_bsp_config_reference.h. Reference configuration files are -provided so that the user always has a known-good configuration to revert to. When adding a FIT Module to a project the -user should copy this reference configuration file to this folder and remove '_reference' from the filename -(r_bsp_config_reference.h is renamed to r_bsp_config.h). For the r_bsp the reference configuration file can be found in -the 'board' folder for the currently chosen development board. For other FIT Modules the reference configuration file -can be found in the 'ref' folder of the FIT Module. diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_bsp_interrupt_config.h b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_bsp_interrupt_config.h deleted file mode 100644 index 1346f175b23..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_bsp_interrupt_config.h +++ /dev/null @@ -1,214 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_interrupt_config.h -* Description : This module maps Interrupt A & B interrupts. More information on how this is done is given below. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -* : 15.05.2017 2.00 Changed the name of the following macro definition, because there was a mistake -* in the name of macro definition. -* - From XXX_TPU0_TGI0V to XXX_TPU0_TCI0V. -* - From XXX_TPU1_TGI1V to XXX_TPU1_TCI1V. -* - From XXX_TPU1_TGI1U to XXX_TPU1_TCI1U. -* - From XXX_TPU2_TGI2V to XXX_TPU2_TCI2V. -* - From XXX_TPU2_TGI2U to XXX_TPU2_TCI2U. -* - From XXX_TPU3_TGI3V to XXX_TPU3_TCI3V. -* - From XXX_TPU4_TGI4V to XXX_TPU4_TCI4V. -* - From XXX_TPU4_TGI4U to XXX_TPU4_TCI4U. -* - From XXX_TPU5_TGI5V to XXX_TPU5_TCI5V. -* - From XXX_TPU5_TGI5U to XXX_TPU5_TCI5U. -* - From XXX_MTU0_TGIV0 to XXX_MTU0_TCIV0. -* - From XXX_MTU1_TGIV1 to XXX_MTU1_TCIV1. -* - From XXX_MTU1_TGIU1 to XXX_MTU1_TCIU1. -* - From XXX_MTU2_TGIV2 to XXX_MTU2_TCIV2. -* - From XXX_MTU2_TGIU2 to XXX_MTU2_TCIU2. -* - From XXX_MTU3_TGIV3 to XXX_MTU3_TCIV3. -* - From XXX_MTU4_TGIV4 to XXX_MTU4_TCIV4. -* - From XXX_MTU6_TGIV6 to XXX_MTU6_TCIV6. -* - From XXX_MTU7_TGIV7 to XXX_MTU7_TCIV7. -* - From XXX_MTU8_TGIV8 to XXX_MTU8_TCIV8. -* Added select processing of the following software configurable interrupt source. -* - TSIP_PROC_BUSY -* - TSIP_ROMOK -* - TSIP_LONG_PLG -* - TSIP_TEST_BUSY -* - TSIP_WRRDY0 -* - TSIP_WRRDY1 -* - TSIP_WRRDY4 -* - TSIP_RDRDY0 -* - TSIP_RDRDY1 -* - TSIP_INTEGRATE_WRRDY -* - TSIP_INTEGRATE_RDRDY -***********************************************************************************************************************/ -#ifndef R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE -#define R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/* If you wish to use one of the interrupt below then set the appropriate configuration macro to the vector number you - * wish to use for that interrupt. For example, if you want to use the RTC carry interrupt (CUP) at vector 176 then you - * would do the following: - * - * #define BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP 176 - */ - -/* Interrupt B Sources. - * -Valid vector numbers are 128-207. - * -There are more vector slots for B sources than actual B sources. By default all B sources are mapped. - * -If using the 'TPU1, TGI1A' interrupt it must be vector 144 or 145. It is set to 144 by default. - * -If a peripheral interrupt is going to be used to wake up the MCU from All-Module Clock Stop Mode then it must be - * in a vector between 146 to 157. Peripheral interrupts that can do this are TMR interrupts and the 'USB0, USBI0' - * interrupt. By default the TMR interrupts are chosen since there are 12 of them and there are 12 slots. - */ -#define BSP_MAPPED_INT_CFG_B_VECT_CMT2_CMI2 128 -#define BSP_MAPPED_INT_CFG_B_VECT_CMT3_CMI3 129 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIA0 146 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIB0 147 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_OVI0 148 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIA1 149 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIB1 150 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_OVI1 151 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIA2 152 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIB2 153 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_OVI2 154 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIA3 155 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIB3 156 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_OVI3 157 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0A 130 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0B 131 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0C 132 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0D 133 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TCI0V 134 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1A 144 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1B 135 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1V 136 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1U 137 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2A 138 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2B 139 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2V 140 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2U 141 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3A 142 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3B 143 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3C 145 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3D 158 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TCI3V 159 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4A 160 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4B 161 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4V 162 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4U 163 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5A 164 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5B 165 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5V 166 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5U 167 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC0I0 168 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC1I0 169 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC0I0 170 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC1I0 171 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC0I1 172 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC1I1 173 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC0I1 174 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC1I1 175 -#define BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP 176 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXF0 177 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXF0 178 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXM0 179 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXM0 180 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXF1 181 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXF1 182 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXM1 183 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXM1 184 -#define BSP_MAPPED_INT_CFG_B_VECT_USB0_USBI0 185 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12ADI0 186 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GBADI0 187 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GCADI0 188 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12ADI1 189 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GBADI1 190 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GCADI1 191 -#define BSP_MAPPED_INT_CFG_B_VECT_RNG_RNGEND -#define BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR18I 193 -#define BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR19I 194 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_PROC_BUSY 195 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_ROMOK 196 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_LONG_PLG 197 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_TEST_BUSY 198 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY0 199 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY1 200 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY4 201 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY0 202 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY1 203 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_WRRDY 204 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_RDRDY 205 - -/* Interrupt A Sources. - * -Valid vector numbers are 208-255. - * -There are more A sources than A vector slots. By default none of the GPT interrupts are mapped. - * -If using the 'MTU1, TGI1A' interrupt it must be vector 208 or 209. It is set to 208 by default. - */ -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIA0 209 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIB0 210 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIC0 211 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGID0 212 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TCIV0 213 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIE0 214 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIF0 215 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIA1 208 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIB1 216 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIV1 217 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIU1 218 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIA2 219 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIB2 220 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIV2 221 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIU2 222 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIA3 223 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIB3 224 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIC3 225 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGID3 226 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TCIV3 227 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIA4 228 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIB4 229 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIC4 230 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGID4 231 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TCIV4 232 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIU5 233 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIV5 234 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIW5 235 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIA6 236 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIB6 237 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIC6 238 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGID6 239 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TCIV6 240 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIA7 241 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIB7 242 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIC7 243 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGID7 244 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TCIV7 245 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIA8 246 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIB8 247 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIC8 248 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGID8 249 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TCIV8 250 -#define BSP_MAPPED_INT_CFG_A_VECT_AES_AESRDY -#define BSP_MAPPED_INT_CFG_A_VECT_AES_AESEND - -#endif /* R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE */ - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_byteq_config.h b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_byteq_config.h deleted file mode 100644 index 907d2379240..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_byteq_config.h +++ /dev/null @@ -1,59 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_byteq_config.h -* Description : Configures the byte queue memory allocation -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 24.07.2013 1.00 Initial Release -* : 11.21.2014 1.20 Removed dependency to BSP -* : 30.09.2015 1.50 Added dependency to BSP -***********************************************************************************************************************/ -#ifndef BYTEQ_CONFIG_H -#define BYTEQ_CONFIG_H - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - Available settings: - BSP_CFG_PARAM_CHECKING_ENABLE: - Utilizes the system default setting - 1: - Includes parameter checking - 0: - Compiles out parameter checking -*/ -#define BYTEQ_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY IF SHOULD USE MALLOC() TO ALLOCATE MEMORY FOR QUEUE CONTROL BLOCKS */ -#define BYTEQ_CFG_USE_HEAP_FOR_CTRL_BLKS (0) - -/* SPECIFY NUMBER OF STATIC QUEUE CONTROL BLOCKS TO SUPPORT */ -/* valid only when BYTEQ_USE_HEAP_FOR_CTRL_BLKS is set to 0 */ -#define BYTEQ_CFG_MAX_CTRL_BLKS (4) - - -#endif /* BYTEQ_CONFIG_H */ diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_ether_rx_config.h b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_ether_rx_config.h deleted file mode 100644 index ea6b31eee73..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_ether_rx_config.h +++ /dev/null @@ -1,119 +0,0 @@ -/* Generated configuration header file - do not edit */ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_ether_rx_config.h - * Version : 1.04 - * Description : Ethernet module device driver - ***********************************************************************************************************************/ -/********************************************************************************************************************** - * History : DD.MM.YYYY Version Description - * : 22.07.2014 1.00 First Release - * : 31.03.2016 1.01 Added changes for RX63N. - * : 01.10.2016 1.02 Added changes for RX65N. - * : 01.10.2017 1.03 Added changes for RX65N-2MB. - * : 08.01.2018 1.04 Changed comment. - ***********************************************************************************************************************/ - -/* Guards against multiple inclusion */ -#ifndef R_ETHER_RX_CONFIG_H - #define R_ETHER_RX_CONFIG_H - -/*********************************************************************************************************************** - Macro definitions - ***********************************************************************************************************************/ - -/* Ethernet interface select. - 0 = MII (Media Independent Interface) - 1 = RMII (Reduced Media Independent Interface) - */ - #define ETHER_CFG_MODE_SEL (1) - -/* PHY-LSI address setting for ETHER0/1. - Please set the value 31 ETHER_CFG_CH0_PHY_ADDRESS when use default setting of the RSK+RX63N. - Please set the value 30 ETHER_CFG_CH0_PHY_ADDRESS when use default setting of the RSK+RX65N/RSK+RX65N_2MB. - Please set the value 0 ETHER_CFG_CH0_PHY_ADDRESS and value 1 ETHER_CFG_CH1_PHY_ADDRESS when use default setting of the RSK+RX64M/RSK+RX71M. - */ - #define ETHER_CFG_CH0_PHY_ADDRESS (0) /* Please define the PHY-LSI address in the range of 0-31. */ - #define ETHER_CFG_CH1_PHY_ADDRESS (1) /* Please define the PHY-LSI address in the range of 0-31. */ - -/* The number of Rx descriptors. */ - #define ETHER_CFG_EMAC_RX_DESCRIPTORS (1) - -/* The number of Tx descriptors. */ - #define ETHER_CFG_EMAC_TX_DESCRIPTORS (1) - -/* Please define the size of the sending and receiving buffer in the value where one frame can surely be stored - because the driver is single-frame/single-buffer processing. */ - #define ETHER_CFG_BUFSIZE (1536) /* Must be 32-byte aligned */ - -/* EINT interrupt priority level. This definition is not used when EINT interrupt is assigned to Group interrupt. */ - #define ETHER_CFG_EINT_INT_PRIORITY (2) /* Please define the interruption level within the range of 1-15. */ - -/* Group AL1 interrupt priority level. This definition is not used when EINT interrupt is assigned to Peripheral - interrupt. */ - #define ETHER_CFG_AL1_INT_PRIORTY (2) /* Please define the interruption level within the range of 1-15. */ - -/* The register bus of PHY0/1 for ETHER0/1 select - 0 = The access of the register of PHY uses ETHER0. - 1 = The access of the register of PHY uses ETHER1. - - Please set the value 0 ETHER_CFG_CH0_PHY_ACCESS when use default setting of the RSK+RX63N. - Please set the value 0 ETHER_CFG_CH0_PHY_ACCESS when use default setting of the RSK+RX65N/RSK+RX65N_2MB. - Please set the value 1 ETHER_CFG_CH0_PHY_ACCESS and ETHER_CFG_CH1_PHY_ACCESS when use default setting of the RSK+RX64M/RSK+RX71M. - */ - #define ETHER_CFG_CH0_PHY_ACCESS (0) - #define ETHER_CFG_CH1_PHY_ACCESS (1) - -/* Define the access timing of MII/RMII register */ - #define ETHER_CFG_PHY_MII_WAIT (8) /* Plese define the value of 1 or more */ - -/* Define the waiting time for reset completion of PHY-LSI */ - #define ETHER_CFG_PHY_DELAY_RESET (0x00020000L) - -/** - * Link status read from LMON bit of ETHERC PSR register. The state is hardware dependent. - */ - #define ETHER_CFG_LINK_PRESENT (0) - -/* Use LINKSTA signal for detect link status changes - 0 = unused (use PHY-LSI status register) - 1 = use (use LINKSTA signal) - */ - #define ETHER_CFG_USE_LINKSTA (0) /* This setting is reflected in all channels */ - -/* Definition of whether or not to use KSZ8041NL of the Micrel Inc. - 0 = unused - 1 = use - */ - #define ETHER_CFG_USE_PHY_KSZ8041NL (0) - -/*********************************************************************************************************************** - Typedef definitions - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global variables - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global functions (to be accessed by other files) - ***********************************************************************************************************************/ - -#endif /* R_ETHER_RX_CONFIG_H */ diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_flash_rx_config.h b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_flash_rx_config.h deleted file mode 100644 index f23d6a5171d..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_flash_rx_config.h +++ /dev/null @@ -1,116 +0,0 @@ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_flash_rx_config_reference.h - * Description : Configures the FLASH API module for RX200 and RX600 Series MCU's. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* 12.04.2014 1.00 First Release -* 22.12.2014 1.10 Added flash type usage comments. -* 25.06.2015 1.20 Added FLASH_CFG_CODE_FLASH_RUN_FROM_ROM. -* : 12.10.2016 2.00 Modified for BSPless operation (added FLASH_CFG_USE_FIT_BSP). -***********************************************************************************************************************/ -#ifndef FLASH_CONFIG_HEADER_FILE -#define FLASH_CONFIG_HEADER_FILE - -/* Set the following value to 0 when building without using the FIT BSP Module */ -#define FLASH_CFG_USE_FIT_BSP (1) - - -/*********************************************************************************************************************** - Configuration Options - ***********************************************************************************************************************/ -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting - * Setting to 1 includes parameter checking; 0 compiles out parameter checking - */ -#define FLASH_CFG_PARAM_CHECKING_ENABLE (1) - - -/****************************************************************************** - ENABLE CODE FLASH PROGRAMMING -******************************************************************************/ -/* If you are only using data flash, set this to 0. - * Setting to 1 includes code to program the ROM area. When programming ROM, - * code must be executed from RAM, except under certain restrictions for flash - * type 3 (see section 2.14 in App Note). See section 2.13 in the App Note for - * details on how to set up code and the linker to execute code from RAM. - */ -#define FLASH_CFG_CODE_FLASH_ENABLE (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING DATA FLASH OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces data flash API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, data flash operations return immediately after the operation has been - * started. Notification of the operation completion is done via the callback - * function. - */ -#define FLASH_CFG_DATA_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING CODE FLASH (ROM) OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces ROM API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, ROM operations return immediately after the operation has been started. - * Notification of the operation completion is done via the callback function. - * When reprogramming ROM, THE RELOCATABLE VECTOR TABLE AND CORRESPONDING - * INTERRUPT ROUTINES MUST BE IN RAM. - * See sections 2.16 Usage Notes in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE CODE FLASH SELF-PROGRAMMING -******************************************************************************/ -/* Set this to 0 when programming code flash while executing in RAM. - * Set this to 1 when programming code flash while executing from another - * segment in ROM (possible only with RX64M, RX71M, RX65N-2 groups). - * See section 2.14 in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_RUN_FROM_ROM (0) - - -/****************************************************************************** - SET IPL OF FLASH READY INTERRUPT -******************************************************************************/ -#define FLASH_CFG_FLASH_READY_IPL (5) // Flash type 2 only - - -/****************************************************************************** - ENABLE OR DISABLE LOCK BIT PROTECTION -******************************************************************************/ -/* Each erasure block has a corresponding lock bit that can be used to - * protect that block from being programmed/erased after the lock bit is - * set. The use of lock bits can be used or ignored. - * Setting this to 1 will cause lock bits to be ignored and programs/erases to a - * block will not be limited. - * Setting this to 0 will cause lock bits to be used as the user configures through - * the Control command. This only applies to ROM as the DF does not have lock bits. - */ -#define FLASH_CFG_IGNORE_LOCK_BITS (1) // Flash type 2 only - - -#endif /* FLASH_CONFIG_HEADER_FILE */ diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_s12ad_rx_config.h b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_s12ad_rx_config.h deleted file mode 100644 index 0202bf133a4..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_s12ad_rx_config.h +++ /dev/null @@ -1,53 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_s12ad_rx_config.h -* Description : Configures the 12-bit A/D driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 22.07.2013 1.00 Initial Release. -* 21.04.2014 1.20 Updated for RX210 advanced features; RX110/63x support. -***********************************************************************************************************************/ -#ifndef S12AD_CONFIG_H -#define S12AD_CONFIG_H - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* - * SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting. - * Setting to 1 includes parameter checking; 0 compiles out parameter checking. - */ -#define ADC_CFG_PARAM_CHECKING_ENABLE BSP_CFG_PARAM_CHECKING_ENABLE - - -/* - * RX210 Series only; Temperature Sensor Programmable Gain Amplifier (PGA) - * SELECT PGA GAIN TO MATCH AVCC0 VOLTAGE RANGE: - * 0: 1.8V <= AVcc0 < 2.7V; default; good for all actual voltages - * 1: 2.7V <= AVcc0 < 3.6V - * 2: 3.6V <= AVcc0 < 4.5V - * 3: 4.5V <= AVcc0 <= 5.5V - */ -#define ADC_CFG_PGA_GAIN (0) - - -#endif /* S12AD_CONFIG_H */ diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_sci_rx_config.h b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_sci_rx_config.h deleted file mode 100644 index 6471e823f0c..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_config/r_sci_rx_config.h +++ /dev/null @@ -1,171 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_config.h -* Description : Configures the SCI driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 25.09.2013 1.00 Initial Release -* 17.04.2014 1.20 Added comments for new RX110 support. -* 02.07.2014 1.30 Fixed bug that caused Group12 rx errors to only be enabled for channel 2. -* 25.11.2014 1.40 Added comments for RX113 support -* 30.09.2015 1.70 Added comments for RX23T support -* 01.10.2016 1.80 Added support for RX65N (comments and TX/RX FIFO THRESHOLD options) -* 19.12.2016 1.90 Added comments for RX24U support -* 07.03.2017 2.00 Added comments for RX130-512KB support -***********************************************************************************************************************/ -#ifndef SCI_CONFIG_H -#define SCI_CONFIG_H - -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING */ -/* Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting */ -/* Setting to 1 includes parameter checking; 0 compiles out parameter checking */ -#define SCI_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY WHETHER TO INCLUDE CODE FOR DIFFERENT SCI MODES */ -/* Setting an equate to 1 includes code specific to that mode. */ -#define SCI_CFG_ASYNC_INCLUDED (1) -#define SCI_CFG_SYNC_INCLUDED (0) -#define SCI_CFG_SSPI_INCLUDED (0) - -/* SPECIFY BYTE VALUE TO TRANSMIT WHILE CLOCKING IN DATA IN SSPI MODES */ -#define SCI_CFG_DUMMY_TX_BYTE (0xFF) - -/* SPECIFY CHANNELS TO INCLUDE SOFTWARE SUPPORT FOR 1=included, 0=not */ -/* - * NOTE: If using ASYNC mode, adjust BYTEQ_CFG_MAX_CTRL_BLKS in r_byteq_config.h - * to provide 2 queues per channel (static mode only). - * * = port connector RDKRX63N, RSKRX210, RSKRX11x - * u = channel used by the USB-UART port (G1CUSB0) - * a = this channel is used only for RX130-512KB - * RX MCU supported channels - * - * CH# 110 111 113 130 210 230 231 23T 24T 24U 63N 631 64M 71M 65N - * --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- - * CH0 X Xa X* X X X* X X X X - * CH1 X X* X* Xu X X X Xu Xu Xu X X X X X - * CH2 X X X X X Xu - * CH3 X X X X X - * CH4 X X X X X - * CH5 X X X X X X Xu X X X X X X X X - * CH6 X X X X X X X X X X X X - * CH7 X X Xu Xu X - * CH8 X Xa X X X X X X X - * CH9 X Xa X X X X X X X - * CH10 X X X - * CH11 X X X X - * CH12 X X X X X X X X X X X X -*/ - -#define SCI_CFG_CH0_INCLUDED (0) -#define SCI_CFG_CH1_INCLUDED (0) -#define SCI_CFG_CH2_INCLUDED (1) -#define SCI_CFG_CH3_INCLUDED (0) -#define SCI_CFG_CH4_INCLUDED (0) -#define SCI_CFG_CH5_INCLUDED (0) -#define SCI_CFG_CH6_INCLUDED (0) -#define SCI_CFG_CH7_INCLUDED (0) -#define SCI_CFG_CH8_INCLUDED (0) -#define SCI_CFG_CH9_INCLUDED (0) -#define SCI_CFG_CH10_INCLUDED (0) -#define SCI_CFG_CH11_INCLUDED (0) -#define SCI_CFG_CH12_INCLUDED (0) - -/* SPECIFY ASYNC MODE TX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_TX_BUFSIZ (80) -#define SCI_CFG_CH1_TX_BUFSIZ (80) -#define SCI_CFG_CH2_TX_BUFSIZ (80) -#define SCI_CFG_CH3_TX_BUFSIZ (80) -#define SCI_CFG_CH4_TX_BUFSIZ (80) -#define SCI_CFG_CH5_TX_BUFSIZ (80) -#define SCI_CFG_CH6_TX_BUFSIZ (80) -#define SCI_CFG_CH7_TX_BUFSIZ (80) -#define SCI_CFG_CH8_TX_BUFSIZ (80) -#define SCI_CFG_CH9_TX_BUFSIZ (80) -#define SCI_CFG_CH10_TX_BUFSIZ (80) -#define SCI_CFG_CH11_TX_BUFSIZ (80) -#define SCI_CFG_CH12_TX_BUFSIZ (80) - -/* SPECIFY ASYNC MODE RX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_RX_BUFSIZ (80) -#define SCI_CFG_CH1_RX_BUFSIZ (80) -#define SCI_CFG_CH2_RX_BUFSIZ (80) -#define SCI_CFG_CH3_RX_BUFSIZ (80) -#define SCI_CFG_CH4_RX_BUFSIZ (80) -#define SCI_CFG_CH5_RX_BUFSIZ (80) -#define SCI_CFG_CH6_RX_BUFSIZ (80) -#define SCI_CFG_CH7_RX_BUFSIZ (80) -#define SCI_CFG_CH8_RX_BUFSIZ (80) -#define SCI_CFG_CH9_RX_BUFSIZ (80) -#define SCI_CFG_CH10_RX_BUFSIZ (80) -#define SCI_CFG_CH11_RX_BUFSIZ (80) -#define SCI_CFG_CH12_RX_BUFSIZ (80) - -/* -* ENABLE TRANSMIT END INTERRUPT (ASYNCHRONOUS) -* This interrupt only occurs when the last bit of the last byte of data -* has been sent and the transmitter has become idle. The interrupt calls -* the user's callback function specified in R_SCI_Open() and passes it an -* SCI_EVT_TEI event. A typical use of this feature is to disable an external -* transceiver to save power. It would then be up to the user's code to -* re-enable the transceiver before sending again. Not including this feature -* reduces code space used by the interrupt. Note that this equate is only -* for including the TEI code. The interrupt itself must be enabled using an -* R_SCI_Control(hdl, SCI_CMD_EN_TEI, NULL) call. -*/ -#define SCI_CFG_TEI_INCLUDED (0) /* 1=included, 0=not */ - -/* -* SET GROUP12 (RECEIVER ERROR) INTERRUPT PRIORITY; RX63N/631 ONLY -* This #define sets the priority level for the interrupt that handles -* receiver overrun, framing, and parity errors for all SCI channels -* on the RX63N/631. It is ignored for all other parts. -*/ -#define SCI_CFG_RXERR_PRIORITY (3) /* (RX63N/631 ONLY) 1 lowest, 15 highest */ - -/* -* SET GROUPBL0 (ERI, TEI) INTERRUPT PRIORITY; RX64M/RX71M/RX65N ONLY -* SET GROUPBL1, GROUPAL0 (ERI,TEI) INTERRUPT PRIORITY; RX65N ONLY -* This sets the priority level for receiver overrun, framing, and parity errors -* as well as TEI interrupts for all SCI channels. -*/ -#define SCI_CFG_ERI_TEI_PRIORITY (3) /* (RX64M/RX71M/RX65N ONLY) 1 lowest, 15 highest */ - -/* ENABLE TX/RX FIFO; (SCIi supported MCU ONLY) 1=included, 0=not */ -#define SCI_CFG_CH10_FIFO_INCLUDED (0) -#define SCI_CFG_CH11_FIFO_INCLUDED (0) - -/* SET TX FIFO THRESHOLD; (SCIi supported MCU ONLY) 0 lowest, 15 highest */ -/* TX FIFO THRESHOLD is invalid in Clock Synchronous Mode and Simple SPI Mode. */ -/* Set the same value for TX FIFO THRESHOLD and RX FIFO THRESHOLD in Clock Synchronous Mode and Simple SPI Mode. */ -#define SCI_CFG_CH10_TX_FIFO_THRESH (8) -#define SCI_CFG_CH11_TX_FIFO_THRESH (8) - -/* SET RX FIFO THRESHOLD; (SCIi supported MCU ONLY) 1 lowest, 15 highest */ -#define SCI_CFG_CH10_RX_FIFO_THRESH (8) -#define SCI_CFG_CH11_RX_FIFO_THRESH (8) - - -#endif /* SCI_CONFIG_H */ diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_pincfg/Pin.c b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_pincfg/Pin.c deleted file mode 100644 index 0e9f7cbffe5..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_pincfg/Pin.c +++ /dev/null @@ -1,111 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : Pin.c -* Version : 1.0.2 -* Device(s) : R5F565NEDxFB -* Description : This file implements SMC pin code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -/* Start user code for include. Do not edit comment generated here */ -#include "Pin.h" -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: R_Pins_Create -* Description : This function initializes Smart Configurator pins -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Pins_Create(void) -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set ET0_MDC pin */ - MPC.P72PFS.BYTE = 0x11U; - PORT7.PMR.BYTE |= 0x04U; - - /* Set ET0_MDIO pin */ - MPC.P71PFS.BYTE = 0x11U; - PORT7.PMR.BYTE |= 0x02U; - - /* Set REF50CK0 pin */ - MPC.P76PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x40U; - - /* Set RMII0_CRS_DV pin */ - MPC.P83PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x08U; - - /* Set RMII0_RXD0 pin */ - MPC.P75PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x20U; - - /* Set RMII0_RXD1 pin */ - MPC.P74PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x10U; - - /* Set RMII0_RX_ER pin */ - MPC.P77PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x80U; - - /* Set RMII0_TXD0 pin */ - MPC.P81PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x02U; - - /* Set RMII0_TXD1 pin */ - MPC.P82PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x04U; - - /* Set RMII0_TXD_EN pin */ - MPC.P80PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x01U; - - /* Set RXD2 pin */ - MPC.P52PFS.BYTE = 0x0AU; - PORT5.PMR.BYTE |= 0x04U; - - /* Set TXD2 pin */ - PORT5.PODR.BYTE |= 0x01U; - MPC.P50PFS.BYTE = 0x0AU; - PORT5.PDR.BYTE |= 0x01U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_pincfg/Pin.h b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_pincfg/Pin.h deleted file mode 100644 index 161cdbb1940..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_pincfg/Pin.h +++ /dev/null @@ -1,50 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : Pin.h -* Version : 1.0.2 -* Device(s) : R5F565NEDxFB -* Description : This file implements SMC pin code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef PIN_H -#define PIN_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Pins_Create(void); -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_pincfg/r_ether_rx_pinset.c b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_pincfg/r_ether_rx_pinset.c deleted file mode 100644 index d51e7a0f40d..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_pincfg/r_ether_rx_pinset.c +++ /dev/null @@ -1,90 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_ether_rx_pinset.c -* Version : 1.0.2 -* Device(s) : R5F565NEDxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_ether_rx_pinset.h" -#include "platform.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: R_ETHER_PinSet_ETHERC0_RMII -* Description : This function initializes pins for r_ether_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_ETHER_PinSet_ETHERC0_RMII() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set REF50CK0 pin */ - MPC.P76PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B6 = 1U; - - /* Set RMII0_TXD_EN pin */ - MPC.P80PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B0 = 1U; - - /* Set RMII0_TXD1 pin */ - MPC.P82PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B2 = 1U; - - /* Set RMII0_TXD0 pin */ - MPC.P81PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B1 = 1U; - - /* Set RMII0_RXD1 pin */ - MPC.P74PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B4 = 1U; - - /* Set RMII0_RXD0 pin */ - MPC.P75PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B5 = 1U; - - /* Set RMII0_RX_ER pin */ - MPC.P77PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B7 = 1U; - - /* Set RMII0_CRS_DV pin */ - MPC.P83PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B3 = 1U; - - /* Set ET0_MDC pin */ - MPC.P72PFS.BYTE = 0x11U; - PORT7.PMR.BIT.B2 = 1U; - - /* Set ET0_MDIO pin */ - MPC.P71PFS.BYTE = 0x11U; - PORT7.PMR.BIT.B1 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_pincfg/r_ether_rx_pinset.h b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_pincfg/r_ether_rx_pinset.h deleted file mode 100644 index 77a5cad770a..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_pincfg/r_ether_rx_pinset.h +++ /dev/null @@ -1,41 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_ether_rx_pinset.h -* Version : 1.0.2 -* Device(s) : R5F565NEDxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef R_ETHER_RX_H -#define R_ETHER_RX_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -void R_ETHER_PinSet_ETHERC0_RMII(); - -#endif diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_pincfg/r_pinset.h b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_pincfg/r_pinset.h deleted file mode 100644 index 78eb1dfbb97..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_pincfg/r_pinset.h +++ /dev/null @@ -1,35 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_pinset.h.h -* Version : 1.0.1 -* Description : Declares all pin code headers into a single file -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef R_PINSET_H -#define R_PINSET_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_sci_rx_pinset.h" -#include "r_ether_rx_pinset.h" - -#endif /* R_PINSET_H */ diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_pincfg/r_sci_rx_pinset.c b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_pincfg/r_sci_rx_pinset.c deleted file mode 100644 index 23dc663a230..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_pincfg/r_sci_rx_pinset.c +++ /dev/null @@ -1,58 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_pinset.c -* Version : 1.0.2 -* Device(s) : R5F565NEDxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_sci_rx_pinset.h" -#include "platform.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: R_SCI_PinSet_SCI2 -* Description : This function initializes pins for r_sci_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_SCI_PinSet_SCI2() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set RXD2/SMISO2 pin */ - MPC.P52PFS.BYTE = 0x0AU; - PORT5.PMR.BIT.B2 = 1U; - - /* Set TXD2/SMOSI2 pin */ - MPC.P50PFS.BYTE = 0x0AU; - PORT5.PMR.BIT.B0 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_pincfg/r_sci_rx_pinset.h b/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_pincfg/r_sci_rx_pinset.h deleted file mode 100644 index 4f018f27601..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-csplus/src/smc_gen/r_pincfg/r_sci_rx_pinset.h +++ /dev/null @@ -1,41 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_pinset.h -* Version : 1.0.2 -* Device(s) : R5F565NEDxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef R_SCI_RX_H -#define R_SCI_RX_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -void R_SCI_PinSet_SCI2(); - -#endif diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.cproject b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.cproject deleted file mode 100644 index 88addccd03f..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.cproject +++ /dev/null @@ -1,185 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.gitignore b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.gitignore deleted file mode 100644 index 11e355d8bc7..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.gitignore +++ /dev/null @@ -1,3 +0,0 @@ -/HardwareDebug/ -/.settings/ -/trash/ \ No newline at end of file diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.project b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.project deleted file mode 100644 index 169fd7db6cf..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.project +++ /dev/null @@ -1,536 +0,0 @@ - - - aws_demos - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - application_code - 2 - PARENT-1-PROJECT_LOC/common/application_code - - - config_files - 2 - PARENT-1-PROJECT_LOC/common/config_files - - - lib - 2 - virtual:/virtual - - - application_code/common_demos - 2 - virtual:/virtual - - - lib/aws - 2 - virtual:/virtual - - - lib/third_party - 2 - virtual:/virtual - - - src/FIT_modified_code - 2 - virtual:/virtual - - - src/amazon_freertos_common - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/amazon_freertos_common - - - application_code/common_demos/include - 2 - AWS_IOT_MCU_ROOT/demos/common/include - - - application_code/common_demos/source - 2 - virtual:/virtual - - - lib/aws/FreeRTOS - 2 - AWS_IOT_MCU_ROOT/lib/FreeRTOS - - - lib/aws/FreeRTOS-Plus-TCP - 2 - AWS_IOT_MCU_ROOT/lib/FreeRTOS-Plus-TCP - - - lib/aws/bufferpool - 2 - AWS_IOT_MCU_ROOT/lib/bufferpool - - - lib/aws/crypto - 2 - AWS_IOT_MCU_ROOT/lib/crypto - - - lib/aws/greengrass - 2 - AWS_IOT_MCU_ROOT/lib/greengrass - - - lib/aws/include - 2 - AWS_IOT_MCU_ROOT/lib/include - - - lib/aws/mqtt - 2 - AWS_IOT_MCU_ROOT/lib/mqtt - - - lib/aws/pkcs11 - 2 - AWS_IOT_MCU_ROOT/lib/pkcs11/portable/renesas/rx65n-envision-kit - - - lib/aws/secure_sockets - 2 - AWS_IOT_MCU_ROOT/lib/secure_sockets/portable/renesas/rx65n-envision-kit - - - lib/aws/shadow - 2 - AWS_IOT_MCU_ROOT/lib/shadow - - - lib/aws/tls - 2 - AWS_IOT_MCU_ROOT/lib/tls - - - lib/aws/utils - 2 - AWS_IOT_MCU_ROOT/lib/utils - - - lib/aws/wifi - 2 - AWS_IOT_MCU_ROOT/lib/wifi/portable/renesas/rx65n-envision-kit - - - lib/third_party/jsmn - 2 - AWS_IOT_MCU_ROOT/lib/third_party/jsmn - - - lib/third_party/mbedtls - 2 - virtual:/virtual - - - lib/third_party/mcu_vendor - 2 - virtual:/virtual - - - lib/third_party/pkcs11 - 2 - AWS_IOT_MCU_ROOT/lib/third_party/pkcs11 - - - lib/third_party/tinycbor - 2 - AWS_IOT_MCU_ROOT/lib/third_party/tinycbor - - - src/FIT_modified_code/Please exclude unnecessary r_xxx from build - 1 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/.files/Please%20exclude%20unnecessary%20r_xxx%20from%20build - - - src/FIT_modified_code/attention!.txt - 1 - PROJECT_LOC/src/attention!.txt - - - src/FIT_modified_code/r_bsp - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_bsp - - - src/FIT_modified_code/r_byteq - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_byteq - - - src/FIT_modified_code/r_cmt_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_cmt_rx - - - src/FIT_modified_code/r_ether_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_ether_rx - - - src/FIT_modified_code/r_flash_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_flash_rx - - - src/FIT_modified_code/r_riic_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_riic_rx - - - src/FIT_modified_code/r_s12ad_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_s12ad_rx - - - src/FIT_modified_code/r_sci_iic_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_iic_rx - - - src/FIT_modified_code/r_sci_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_rx - - - application_code/common_demos/include/aws_application_version.h - 1 - AWS_IOT_MCU_ROOT/demos/common/include/aws_application_version.h - - - application_code/common_demos/include/aws_clientcredential_keys.h - 1 - AWS_IOT_MCU_ROOT/demos/common/include/aws_clientcredential_keys.h - - - application_code/common_demos/include/aws_dev_mode_key_provisioning.h - 1 - AWS_IOT_MCU_ROOT/demos/common/include/aws_dev_mode_key_provisioning.h - - - application_code/common_demos/source/aws_demo_runner.c - 1 - AWS_IOT_MCU_ROOT/demos/common/demo_runner/aws_demo_runner.c - - - application_code/common_demos/source/aws_dev_mode_key_provisioning.c - 1 - AWS_IOT_MCU_ROOT/demos/common/devmode_key_provisioning/aws_dev_mode_key_provisioning.c - - - application_code/common_demos/source/aws_greengrass_discovery_demo.c - 1 - AWS_IOT_MCU_ROOT/demos/common/greengrass_connectivity/aws_greengrass_discovery_demo.c - - - application_code/common_demos/source/aws_hello_world.c - 1 - AWS_IOT_MCU_ROOT/demos/common/mqtt/aws_hello_world.c - - - application_code/common_demos/source/aws_logging_task_dynamic_buffers.c - 1 - AWS_IOT_MCU_ROOT/demos/common/logging/aws_logging_task_dynamic_buffers.c - - - application_code/common_demos/source/aws_shadow_lightbulb_on_off.c - 1 - AWS_IOT_MCU_ROOT/demos/common/shadow/aws_shadow_lightbulb_on_off.c - - - application_code/common_demos/source/aws_subscribe_publish_loop.c - 1 - AWS_IOT_MCU_ROOT/demos/common/mqtt/aws_subscribe_publish_loop.c - - - application_code/common_demos/source/aws_tcp_echo_client_separate_tasks.c - 1 - AWS_IOT_MCU_ROOT/demos/common/tcp/aws_tcp_echo_client_separate_tasks.c - - - application_code/common_demos/source/aws_tcp_echo_client_single_task.c - 1 - AWS_IOT_MCU_ROOT/demos/common/tcp/aws_tcp_echo_client_single_task.c - - - lib/aws/pkcs11/aws_pkcs11_mbedtls.c - 1 - AWS_IOT_MCU_ROOT/lib/pkcs11/mbedtls/aws_pkcs11_mbedtls.c - - - lib/third_party/mbedtls/include - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mbedtls/include - - - lib/third_party/mbedtls/source - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mbedtls/library - - - lib/third_party/mcu_vendor/renesas - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas - - - - - 1545519950073 - - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-aws_demos_build_path_check_and_make.bat - - - - 1545519950078 - - 10 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false- - - - - 1537786054362 - src - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-attention!.txt - - - - 1536904742727 - src/amazon_freertos_common/compiler_support - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-ccrx - - - - 1536927312156 - src/amazon_freertos_common/network_support - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-onchip_rx_ether - - - - 1513514756448 - lib/aws/FreeRTOS/portable - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-Renesas - - - - 1513514757749 - lib/aws/FreeRTOS/portable - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-MemMang - - - - 1513514757807 - lib/aws/FreeRTOS/portable - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-* - - - - 1509693556349 - lib/aws/include/private - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-*.c - - - - 1536905062046 - lib/third_party/mcu_vendor/renesas - 10 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-tools - - - - 1536291011837 - src/FIT_modified_code/r_bsp/board - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-true-all|rx65n|generic_rx65n - - - - 1536291077902 - src/FIT_modified_code/r_bsp/mcu - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-true-all|rx65n - - - - 1513514967899 - lib/aws/FreeRTOS/portable/MemMang - 5 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-heap_4.c - - - - 1513515128489 - lib/aws/FreeRTOS/portable/Renesas - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-RX600v2 - - - - 1539520892012 - src/FIT_modified_code/r_bsp/board/all - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-true-reset_program\.S|iar_call_inits\.s - - - - 1564441882426 - src/FIT_modified_code/r_ether_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx65n - - - - 1564441856894 - src/FIT_modified_code/r_flash_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx65n - - - - 1535360922766 - src/FIT_modified_code/r_riic_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx65n - - - - 1545519861879 - src/FIT_modified_code/r_s12ad_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx65x - - - - 1535360980389 - src/FIT_modified_code/r_sci_iic_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx65n - - - - 1564441820170 - src/FIT_modified_code/r_sci_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx65n - - - - 1515504232772 - lib/aws/FreeRTOS-Plus-TCP/source/portable/BufferManagement - 5 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-BufferAllocation_2.c - - - - 1515504311064 - lib/aws/FreeRTOS-Plus-TCP/source/portable/Compiler - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-Renesas - - - - 1515491646756 - lib/aws/FreeRTOS-Plus-TCP/source/portable/NetworkInterface - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-RX - - - - 1537708651935 - src/FIT_modified_code/r_bsp/mcu/rx65n/register_access - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-ccrx - - - - - - AWS_IOT_MCU_ROOT - $%7BPARENT-4-PROJECT_LOC%7D - - - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/CodeGenerator/cgprojectDatas.datas b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/CodeGenerator/cgprojectDatas.datas deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/Dependency_Scan_Preferences.prefs b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/Dependency_Scan_Preferences.prefs deleted file mode 100644 index 52d4e3fd03b..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/Dependency_Scan_Preferences.prefs +++ /dev/null @@ -1,2 +0,0 @@ -DependecyMode=ScanBuildDep -eclipse.preferences.version=1 diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/com.renesas.cdt.managedbuild.renesas.ccrx.prefs b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/com.renesas.cdt.managedbuild.renesas.ccrx.prefs deleted file mode 100644 index e4449c99ff6..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/com.renesas.cdt.managedbuild.renesas.ccrx.prefs +++ /dev/null @@ -1,6 +0,0 @@ -com.renesas.cdt.managedbuild.renesas.ccrx.common.option.checkRtos=unusedRtos -com.renesas.cdt.managedbuild.renesas.ccrx.rtosConfig.option.cfgFilePath=../generate/${ArtifactName}.cfg -com.renesas.cdt.managedbuild.renesas.ccrx.rtosConfig.option.rtosName=None -com.renesas.cdt.managedbuild.renesas.ccrx.rtosConfig.option.rtosPath= -com.renesas.cdt.managedbuild.renesas.ccrx.rtosConfig.option.rtosVersion= -eclipse.preferences.version=1 diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/com.renesas.smc.e2studio.qe.xml b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/com.renesas.smc.e2studio.qe.xml deleted file mode 100644 index 5fa787eee47..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/com.renesas.smc.e2studio.qe.xml +++ /dev/null @@ -1,47 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/e2studio_project.prefs b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/e2studio_project.prefs deleted file mode 100644 index 7eb82d6a337..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/e2studio_project.prefs +++ /dev/null @@ -1,3 +0,0 @@ -# -#Fri Aug 10 22:36:17 JST 2018 -activeConfiguration=com.renesas.cdt.managedbuild.renesas.ccrx.hardwaredebug.configuration.216582545 diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/fittemp/r_ether_rx.ftl b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/fittemp/r_ether_rx.ftl deleted file mode 100644 index c1d6f96d8c7..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/fittemp/r_ether_rx.ftl +++ /dev/null @@ -1,45 +0,0 @@ -<#-- - Copyright(C) 2015 Renesas Electronics Corporation - RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY - This program must be used solely for the purpose for which it was furnished - by Renesas Electronics Corporation. No part of this program may be reproduced - or disclosed to others, in any form, without the prior written permission of - Renesas Electronics Corporation. ---> -<#-- = DECLARE FUNCTION INFORMATION HERE =================== --> -<#assign Function_Base_Name = "R_ETHER_PinSet"> -<#assign Function_Description = "This function initializes pins for r_ether_rx module"> -<#assign Function_Arg = "none"> -<#assign Function_Ret = "none"> -<#assign Version = 1.00> - -<#-- = DECLARE FUNCTION CONTENT HERE ======================= --> -<#macro initialsection postfix> -<#assign Function_Name = "${Function_Base_Name}${postfix}"> -<#include "lib/functionheader.ftl"> -void ${Function_Name}() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - -<#macro peripheralpincode pin> - - -<#macro channelpincode pin> - - /* Set ${pin.pinName} pin */ - MPC.${pin.assignedPinName}PFS.BYTE = 0x${pin.pinMPC}U; - PORT${pin.portNum}.PMR.BIT.B${pin.pinBitNum} = 1U; - - -<#macro endsection> - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - - -<#macro headerfilesection postfix> -void ${Function_Base_Name}${postfix}(); - - -<#-- = END OF FILE ========================================= --> \ No newline at end of file diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/fittemp/r_sci_rx.ftl b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/fittemp/r_sci_rx.ftl deleted file mode 100644 index 62879ddbbe9..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/fittemp/r_sci_rx.ftl +++ /dev/null @@ -1,85 +0,0 @@ -<#-- - Copyright(C) 2015 Renesas Electronics Corporation - RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY - This program must be used solely for the purpose for which it was furnished - by Renesas Electronics Corporation. No part of this program may be reproduced - or disclosed to others, in any form, without the prior written permission of - Renesas Electronics Corporation. ---> -<#-- = DECLARE FUNCTION INFORMATION HERE =================== --> -<#-- - (Step 1) Explanation: These variables are necessary information for the function header. - Please fill up or leave blank, but do not delete ---> -<#assign Function_Base_Name = "R_SCI_PinSet"> -<#assign Function_Description = "This function initializes pins for r_sci_rx module"> -<#assign Function_Arg = "none"> -<#assign Function_Ret = "none"> -<#assign Version = 1.00> - -<#-- = DECLARE FUNCTION CONTENT HERE ======================= --> -<#-- - (Step 2) Explanation: Function content. - - Macro [initialsection] : - Any text that goes into this section will be printed out 1 time per function - input [postfix] :Use this variable to add the channel number to the function base name. ---> -<#macro initialsection postfix> -<#assign Function_Name = "${Function_Base_Name}${postfix}"> -<#include "lib/functionheader.ftl"> -void ${Function_Name}() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - -<#-- - (Step 3) Explanation: Function content. - - Macro [peripheralpincode] : Any text that goes into this section will be printed out 1 time per peripheral - - input [pin] : Available info includes: - pin.pinName :The name of pin, eg “SSLA0†- pin.assignedPinName :The pin assigned to, eg “P32†- pin.pinMPC :The port number of assigned pin, eg “P32†has portNume = “3†- pin.portNum :The bit number of the assigned pin, eg “P32†has pinBitNum = “2†- pin.pinBitNum :The value of MPC ---> -<#macro peripheralpincode pin> - - -<#-- - (Step 4) Explanation: Function content. - - Macro [channelpincode] : Any text that goes into this section will be printed out 1 time per channel - - input [pin] : Same as above ---> -<#macro channelpincode pin> - - /* Set ${pin.pinName} pin */ - MPC.${pin.assignedPinName}PFS.BYTE = 0x${pin.pinMPC}U; - PORT${pin.portNum}.PMR.BIT.B${pin.pinBitNum} = 1U; - - -<#macro channelpincodeextra pin postfix> - - -<#-- - (Step 5) Explanation: Function content. - - Macro [endsection] : Any text that goes into this section will be printed out 1 time last ---> -<#macro endsection> - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - - -<#-- - (Step 6) Explanation: Header file content - - Macro [headerfilesection] : Any text that goes into this section will be printed out 1 time in the header file - - input [postfix] :Use this variable to add the channel number to the function base name. ---> -<#macro headerfilesection postfix> -void ${Function_Base_Name}${postfix}(); - - -<#macro headerfilesectionExtra postfix> - - -<#-- = END OF FILE ========================================= --> \ No newline at end of file diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/language.settings.xml b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/language.settings.xml deleted file mode 100644 index 6adefee8b07..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/language.settings.xml +++ /dev/null @@ -1,18 +0,0 @@ - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/renesasPGModel.xml b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/renesasPGModel.xml deleted file mode 100644 index 7c0780cd586..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/.settings/renesasPGModel.xml +++ /dev/null @@ -1,5 +0,0 @@ - - - LITTLE - - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/aws_demos.scfg b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/aws_demos.scfg deleted file mode 100644 index a11c5ee0756..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/aws_demos.scfg +++ /dev/null @@ -1,771 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/aws_demos_build_path_check_and_make.bat b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/aws_demos_build_path_check_and_make.bat deleted file mode 100644 index 047f6e34780..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/aws_demos_build_path_check_and_make.bat +++ /dev/null @@ -1,11 +0,0 @@ -@echo off -rem ################################################################################ -rem # This batch file executes some preprocess for build and then executes the make -rem ################################################################################ - -if not exist "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" ( - echo ERROR: Unable to find "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" - exit 2 -) - -"%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" %* diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/rx65n_envision_kit_aws HardwareDebug.launch b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/rx65n_envision_kit_aws HardwareDebug.launch deleted file mode 100644 index 378455e1368..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/rx65n_envision_kit_aws HardwareDebug.launch +++ /dev/null @@ -1,155 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/attention!.txt b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/attention!.txt deleted file mode 100644 index eebc694d16c..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/attention!.txt +++ /dev/null @@ -1,32 +0,0 @@ -Please note that the following folders in the project window of IDEs are -so called 'linked' folders. - --------------------------------------------- -Linked folders in the project window of IDEs --------------------------------------------- - -src/FIT_modified_code/r_bsp -src/FIT_modified_code/r_byteq -src/FIT_modified_code/r_cmt_rx -src/FIT_modified_code/r_ether_rx -src/FIT_modified_code/r_flash_rx -src/FIT_modified_code/r_riic_rx -src/FIT_modified_code/r_sci_iic_rx -src/FIT_modified_code/r_sci_rx -src/amazon_freertos_common - ----------------------------------------------------------- -Folders on the File System of the WINDOWS Operating System ----------------------------------------------------------- - -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_bsp -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_byteq -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_cmt_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_ether_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_flash_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_riic_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_iic_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/amazon_freertos_common - -[EOF] diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/UNUSED_generated_code/.placeholder b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/UNUSED_generated_code/.placeholder deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_cg_hardware_setup.c b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_cg_hardware_setup.c deleted file mode 100644 index 30cca96b468..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_cg_hardware_setup.c +++ /dev/null @@ -1,99 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_hardware_setup.c -* Version : 1.2.3 -* Device(s) : R5F565NEDxFB -* Description : Initialization file for code generation configurations. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -#include "r_smc_cgc.h" -#include "r_smc_interrupt.h" -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -void r_undefined_exception(void); -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: r_undefined_exception -* Description : This function is undefined interrupt service routine -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void r_undefined_exception(void) -{ - /* Start user code for r_undefined_exception. Do not edit comment generated here */ - /* End user code. Do not edit comment generated here */ -} - -/*********************************************************************************************************************** -* Function Name: R_Systeminit -* Description : This function initializes every configuration -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Systeminit(void) -{ - /* Enable writing to registers related to operating modes, LPC, CGC and software reset */ - SYSTEM.PRCR.WORD = 0xA50BU; - - /* Enable writing to MPC pin function control registers */ - MPC.PWPR.BIT.B0WI = 0U; - MPC.PWPR.BIT.PFSWE = 1U; - - /* Initialize clocks settings */ - R_CGC_Create(); - - /* Set interrupt settings */ - R_Interrupt_Create(); - - /* Register undefined interrupt */ - R_BSP_InterruptWrite(BSP_INT_SRC_UNDEFINED_INTERRUPT,(bsp_int_cb_t)r_undefined_exception); - - /* Disable writing to MPC pin function control registers */ - MPC.PWPR.BIT.PFSWE = 0U; - MPC.PWPR.BIT.B0WI = 1U; - - /* Enable protection */ - SYSTEM.PRCR.WORD = 0xA500U; -} - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_cg_macrodriver.h b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_cg_macrodriver.h deleted file mode 100644 index 44741cc7cce..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_cg_macrodriver.h +++ /dev/null @@ -1,82 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_macrodriver.h -* Version : 1.2.3 -* Device(s) : R5F565NEDxFB -* Description : Macro header file for code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef MACRODRIVER_H -#define MACRODRIVER_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "platform.h" -#include "r_smc_interrupt.h" -#include - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -#ifndef __TYPEDEF__ - -/* Status list definition */ -#define MD_STATUSBASE (0x00U) -#define MD_OK (MD_STATUSBASE + 0x00U) /* register setting OK */ -#define MD_SPT (MD_STATUSBASE + 0x01U) /* IIC stop */ -#define MD_NACK (MD_STATUSBASE + 0x02U) /* IIC no ACK */ -#define MD_BUSY1 (MD_STATUSBASE + 0x03U) /* busy 1 */ -#define MD_BUSY2 (MD_STATUSBASE + 0x04U) /* busy 2 */ - -/* Error list definition */ -#define MD_ERRORBASE (0x80U) -#define MD_ERROR (MD_ERRORBASE + 0x00U) /* error */ -#define MD_ARGERROR (MD_ERRORBASE + 0x01U) /* error argument input error */ -#define MD_ERROR1 (MD_ERRORBASE + 0x02U) /* error 1 */ -#define MD_ERROR2 (MD_ERRORBASE + 0x03U) /* error 2 */ -#define MD_ERROR3 (MD_ERRORBASE + 0x04U) /* error 3 */ -#define MD_ERROR4 (MD_ERRORBASE + 0x05U) /* error 4 */ -#define MD_ERROR5 (MD_ERRORBASE + 0x06U) /* error 5 */ - -#endif - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -#ifndef __TYPEDEF__ - typedef unsigned short MD_STATUS; - #define __TYPEDEF__ -#endif - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Systeminit(void); -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_cg_userdefine.h b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_cg_userdefine.h deleted file mode 100644 index e67e7f7a049..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_cg_userdefine.h +++ /dev/null @@ -1,61 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_userdefine.h -* Version : 1.2.3 -* Device(s) : R5F565NEDxFB -* Description : User header file for code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef CG_USER_DEF_H -#define CG_USER_DEF_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ -/* Start user code for register. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* Start user code for macro define. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -/* Start user code for type define. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_smc_cgc.c b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_smc_cgc.c deleted file mode 100644 index c7b885c7be0..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_smc_cgc.c +++ /dev/null @@ -1,45 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc.c -* Version : 1.2.0 -* Device(s) : R5F565NEDxFB -* Description : This file implements cgc setting -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -#include "r_smc_cgc.h" -#include "platform.h" - -/*********************************************************************************************************************** -* Function Name: R_CGC_Create -* Description : This function Used to initializes the clock generator -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_CGC_Create(void) -{ - - R_CGC_Create_UserInit(); -} diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_smc_cgc.h b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_smc_cgc.h deleted file mode 100644 index 44bf0371c22..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_smc_cgc.h +++ /dev/null @@ -1,217 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc.h -* Version : 1.2.0 -* Device(s) : R5F565NEDxFB -* Description : This file implements cgc setting. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_CGC_H -#define SMC_CGC_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ -/* - System Clock Control Register (SCKCR) -*/ -/* Peripheral Module Clock D (PCLKD) */ -#define _00000000_CGC_PCLKD_DIV_1 (0x00000000UL) /* x1 */ -#define _00000001_CGC_PCLKD_DIV_2 (0x00000001UL) /* x1/2 */ -#define _00000002_CGC_PCLKD_DIV_4 (0x00000002UL) /* x1/4 */ -#define _00000003_CGC_PCLKD_DIV_8 (0x00000003UL) /* x1/8 */ -#define _00000004_CGC_PCLKD_DIV_16 (0x00000004UL) /* x1/16 */ -#define _00000005_CGC_PCLKD_DIV_32 (0x00000005UL) /* x1/32 */ -#define _00000006_CGC_PCLKD_DIV_64 (0x00000006UL) /* x1/64 */ -/* Peripheral Module Clock C (PCLKC) */ -#define _00000000_CGC_PCLKC_DIV_1 (0x00000000UL) /* x1 */ -#define _00000010_CGC_PCLKC_DIV_2 (0x00000010UL) /* x1/2 */ -#define _00000020_CGC_PCLKC_DIV_4 (0x00000020UL) /* x1/4 */ -#define _00000030_CGC_PCLKC_DIV_8 (0x00000030UL) /* x1/8 */ -#define _00000040_CGC_PCLKC_DIV_16 (0x00000040UL) /* x1/16 */ -#define _00000050_CGC_PCLKC_DIV_32 (0x00000050UL) /* x1/32 */ -#define _00000060_CGC_PCLKC_DIV_64 (0x00000060UL) /* x1/64 */ -/* Peripheral Module Clock B (PCLKB) */ -#define _00000000_CGC_PCLKB_DIV_1 (0x00000000UL) /* x1 */ -#define _00000100_CGC_PCLKB_DIV_2 (0x00000100UL) /* x1/2 */ -#define _00000200_CGC_PCLKB_DIV_4 (0x00000200UL) /* x1/4 */ -#define _00000300_CGC_PCLKB_DIV_8 (0x00000300UL) /* x1/8 */ -#define _00000400_CGC_PCLKB_DIV_16 (0x00000400UL) /* x1/16 */ -#define _00000500_CGC_PCLKB_DIV_32 (0x00000500UL) /* x1/32 */ -#define _00000600_CGC_PCLKB_DIV_64 (0x00000600UL) /* x1/64 */ -/* Peripheral Module Clock A (PCLKA) */ -#define _00000000_CGC_PCLKA_DIV_1 (0x00000000UL) /* x1 */ -#define _00001000_CGC_PCLKA_DIV_2 (0x00001000UL) /* x1/2 */ -#define _00002000_CGC_PCLKA_DIV_4 (0x00002000UL) /* x1/4 */ -#define _00003000_CGC_PCLKA_DIV_8 (0x00003000UL) /* x1/8 */ -#define _00004000_CGC_PCLKA_DIV_16 (0x00004000UL) /* x1/16 */ -#define _00005000_CGC_PCLKA_DIV_32 (0x00005000UL) /* x1/32 */ -#define _00006000_CGC_PCLKA_DIV_64 (0x00006000UL) /* x1/64 */ -/* External Bus Clock (BCLK) */ -#define _00000000_CGC_BCLK_DIV_1 (0x00000000UL) /* x1 */ -#define _00010000_CGC_BCLK_DIV_2 (0x00010000UL) /* x1/2 */ -#define _00020000_CGC_BCLK_DIV_4 (0x00020000UL) /* x1/4 */ -#define _00030000_CGC_BCLK_DIV_8 (0x00030000UL) /* x1/8 */ -#define _00040000_CGC_BCLK_DIV_16 (0x00040000UL) /* x1/16 */ -#define _00050000_CGC_BCLK_DIV_32 (0x00050000UL) /* x1/32 */ -#define _00060000_CGC_BCLK_DIV_64 (0x00060000UL) /* x1/64 */ -/* System Clock (ICLK) */ -#define _00000000_CGC_ICLK_DIV_1 (0x00000000UL) /* x1 */ -#define _01000000_CGC_ICLK_DIV_2 (0x01000000UL) /* x1/2 */ -#define _02000000_CGC_ICLK_DIV_4 (0x02000000UL) /* x1/4 */ -#define _03000000_CGC_ICLK_DIV_8 (0x03000000UL) /* x1/8 */ -#define _04000000_CGC_ICLK_DIV_16 (0x04000000UL) /* x1/16 */ -#define _05000000_CGC_ICLK_DIV_32 (0x05000000UL) /* x1/32 */ -#define _06000000_CGC_ICLK_DIV_64 (0x06000000UL) /* x1/64 */ -/* System Clock (FCLK) */ -#define _00000000_CGC_FCLK_DIV_1 (0x00000000UL) /* x1 */ -#define _10000000_CGC_FCLK_DIV_2 (0x10000000UL) /* x1/2 */ -#define _20000000_CGC_FCLK_DIV_4 (0x20000000UL) /* x1/4 */ -#define _30000000_CGC_FCLK_DIV_8 (0x30000000UL) /* x1/8 */ -#define _40000000_CGC_FCLK_DIV_16 (0x40000000UL) /* x1/16 */ -#define _50000000_CGC_FCLK_DIV_32 (0x50000000UL) /* x1/32 */ -#define _60000000_CGC_FCLK_DIV_64 (0x60000000UL) /* x1/64 */ - -/* - System Clock Control Register 2 (SCKCR2) -*/ -#define _0010_CGC_UCLK_DIV_1 (0x0010U) /* x1/2 */ -#define _0020_CGC_UCLK_DIV_3 (0x0020U) /* x1/3 */ -#define _0030_CGC_UCLK_DIV_4 (0x0030U) /* x1/4 */ -#define _0040_CGC_UCLK_DIV_5 (0x0040U) /* x1/5 */ -#define _0001_SCKCR2_BIT0 (0x0001U) /* RESERVE BIT0 */ - -/* - System Clock Control Register 3 (SCKCR3) -*/ -#define _0000_CGC_CLOCKSOURCE_LOCO (0x0000U) /* LOCO */ -#define _0100_CGC_CLOCKSOURCE_HOCO (0x0100U) /* HOCO */ -#define _0200_CGC_CLOCKSOURCE_MAINCLK (0x0200U) /* Main clock oscillator */ -#define _0300_CGC_CLOCKSOURCE_SUBCLK (0x0300U) /* Sub-clock oscillator */ -#define _0400_CGC_CLOCKSOURCE_PLL (0x0400U) /* PLL circuit */ - -/* - PLL Control Register (PLLCR) -*/ -/* PLL Input Frequency Division Ratio Select (PLIDIV[1:0]) */ -#define _0000_CGC_PLL_FREQ_DIV_1 (0x0000U) /* x1 */ -#define _0001_CGC_PLL_FREQ_DIV_2 (0x0001U) /* x1/2 */ -#define _0002_CGC_PLL_FREQ_DIV_3 (0x0002U) /* x1/3 */ -/* PLL Clock Source Select (PLLSRCSEL) */ -#define _0000_CGC_PLL_SOURCE_MAIN (0x0000U) /* Main clock oscillator */ -#define _0010_CGC_PLL_SOURCE_HOCO (0x0010U) /* HOCO */ -/* Frequency Multiplication Factor Select (STC[5:0]) */ -#define _1300_CGC_PLL_FREQ_MUL_10_0 (0x1300U) /* x10.0 */ -#define _1400_CGC_PLL_FREQ_MUL_10_5 (0x1400U) /* x10.5 */ -#define _1500_CGC_PLL_FREQ_MUL_11_0 (0x1500U) /* x11.0 */ -#define _1600_CGC_PLL_FREQ_MUL_11_5 (0x1600U) /* x11.5 */ -#define _1700_CGC_PLL_FREQ_MUL_12_0 (0x1700U) /* x12.0 */ -#define _1800_CGC_PLL_FREQ_MUL_12_5 (0x1800U) /* x12.5 */ -#define _1900_CGC_PLL_FREQ_MUL_13_0 (0x1900U) /* x13.0 */ -#define _1A00_CGC_PLL_FREQ_MUL_13_5 (0x1A00U) /* x13.5 */ -#define _1B00_CGC_PLL_FREQ_MUL_14_0 (0x1B00U) /* x14.0 */ -#define _1C00_CGC_PLL_FREQ_MUL_14_5 (0x1C00U) /* x14.5 */ -#define _1D00_CGC_PLL_FREQ_MUL_15_0 (0x1D00U) /* x15.0 */ -#define _1E00_CGC_PLL_FREQ_MUL_15_5 (0x1E00U) /* x15.5 */ -#define _1F00_CGC_PLL_FREQ_MUL_16_0 (0x1F00U) /* x16.0 */ -#define _2000_CGC_PLL_FREQ_MUL_16_5 (0x2000U) /* x16.5 */ -#define _2100_CGC_PLL_FREQ_MUL_17_0 (0x2100U) /* x17.0 */ -#define _2200_CGC_PLL_FREQ_MUL_17_5 (0x2200U) /* x17.5 */ -#define _2300_CGC_PLL_FREQ_MUL_18_0 (0x2300U) /* x18.0 */ -#define _2400_CGC_PLL_FREQ_MUL_18_5 (0x2400U) /* x18.5 */ -#define _2500_CGC_PLL_FREQ_MUL_19_0 (0x2500U) /* x19.0 */ -#define _2600_CGC_PLL_FREQ_MUL_19_5 (0x2600U) /* x19.5 */ -#define _2700_CGC_PLL_FREQ_MUL_20_0 (0x2700U) /* x20.0 */ -#define _2800_CGC_PLL_FREQ_MUL_20_5 (0x2800U) /* x20.5 */ -#define _2900_CGC_PLL_FREQ_MUL_21_0 (0x2900U) /* x21.0 */ -#define _2A00_CGC_PLL_FREQ_MUL_21_5 (0x2A00U) /* x21.5 */ -#define _2B00_CGC_PLL_FREQ_MUL_22_0 (0x2B00U) /* x22.0 */ -#define _2C00_CGC_PLL_FREQ_MUL_22_5 (0x2C00U) /* x22.5 */ -#define _2D00_CGC_PLL_FREQ_MUL_23_0 (0x2D00U) /* x23.0 */ -#define _2E00_CGC_PLL_FREQ_MUL_23_5 (0x2E00U) /* x23.5 */ -#define _2F00_CGC_PLL_FREQ_MUL_24_0 (0x2F00U) /* x24.0 */ -#define _3000_CGC_PLL_FREQ_MUL_24_5 (0x3000U) /* x24.5 */ -#define _3100_CGC_PLL_FREQ_MUL_25_0 (0x3100U) /* x25.0 */ -#define _3200_CGC_PLL_FREQ_MUL_25_5 (0x3200U) /* x25.5 */ -#define _3300_CGC_PLL_FREQ_MUL_26_0 (0x3300U) /* x26.0 */ -#define _3400_CGC_PLL_FREQ_MUL_26_5 (0x3400U) /* x26.5 */ -#define _3500_CGC_PLL_FREQ_MUL_27_0 (0x3500U) /* x27.0 */ -#define _3600_CGC_PLL_FREQ_MUL_27_5 (0x3600U) /* x27.5 */ -#define _3700_CGC_PLL_FREQ_MUL_28_0 (0x3700U) /* x28.0 */ -#define _3800_CGC_PLL_FREQ_MUL_28_5 (0x3800U) /* x28.5 */ -#define _3900_CGC_PLL_FREQ_MUL_29_0 (0x3900U) /* x29.0 */ -#define _3A00_CGC_PLL_FREQ_MUL_29_5 (0x3A00U) /* x29.5 */ -#define _3B00_CGC_PLL_FREQ_MUL_30_0 (0x3B00U) /* x30.0 */ - -/* - Oscillation Stop Detection Control Register (OSTDCR) -*/ -/* Oscillation Stop Detection Interrupt Enable (OSTDIE) */ -#define _00_CGC_OSC_STOP_INT_DISABLE (0x00U) /* The oscillation stop detection interrupt is disabled */ -#define _01_CGC_OSC_STOP_INT_ENABLE (0x01U) /* The oscillation stop detection interrupt is enabled */ -/* Oscillation Stop Detection Function Enable (OSTDE) */ -#define _00_CGC_OSC_STOP_DISABLE (0x00U) /* Oscillation stop detection function is disabled */ -#define _80_CGC_OSC_STOP_ENABLE (0x80U) /* Oscillation stop detection function is enabled */ - -/* - High-Speed On-Chip Oscillator Control Register 2 (HOCOCR2) -*/ -/* HOCO Frequency Setting (HCFRQ[1:0]) */ -#define _00_CGC_HOCO_CLK_16 (0x00U) /* 16 MHz */ -#define _01_CGC_HOCO_CLK_18 (0x01U) /* 18 MHz */ -#define _02_CGC_HOCO_CLK_20 (0x02U) /* 20 MHz */ - -/* - Main Clock Oscillator Forced Oscillation Control Register (MOFCR) -*/ -/* Main Oscillator Drive Capability 2 Switching (MODRV2[1:0]) */ -#define _00_CGC_MAINOSC_UNDER24M (0x00U) /* 20.1 to 24 MHz */ -#define _10_CGC_MAINOSC_UNDER20M (0x10U) /* 16.1 to 20 MHz */ -#define _20_CGC_MAINOSC_UNDER16M (0x20U) /* 8.1 to 16 MHz */ -#define _30_CGC_MAINOSC_EQUATE8M (0x30U) /* 8 MHz */ -/* Main Clock Oscillator Switch (MOSEL) */ -#define _00_CGC_MAINOSC_RESONATOR (0x00U) /* Resonator */ -#define _40_CGC_MAINOSC_EXTERNAL (0x40U) /* External oscillator input */ - -/* - RTC Control Register 4 (RCR4) -*/ -/* Count source select */ -#define _00_RTC_SOURCE_SELECT_SUB (0x00U) /* Select sub-clock oscillator */ -#define _01_RTC_SOURCE_SELECT_MAIN_FORCED (0x01U) /* Select main clock oscillator */ -#define _53_CGC_MOSCWTCR_VALUE (0x53U) /* Main Clock Oscillator Wait Time */ -#define _21_CGC_SOSCWTCR_VALUE (0x21U) /* Sub-Clock Oscillator Wait Time */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_CGC_Create(void); -void R_CGC_Create_UserInit(); -#endif diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_smc_cgc_user.c b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_smc_cgc_user.c deleted file mode 100644 index c2fc1d4ce60..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_smc_cgc_user.c +++ /dev/null @@ -1,64 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc_user.c -* Version : 1.2.0 -* Device(s) : R5F565NEDxFB -* Description : None -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -/* Start user code for include. Do not edit comment generated here */ -#include "r_smc_cgc.h" -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: R_CGC_Create_UserInit -* Description : This function adds user code after initializing CGC -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_CGC_Create_UserInit(void) -{ - /* Start user code for code init. Do not edit comment generated here */ - /* End user code. Do not edit comment generated here */ -} - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_smc_entry.h b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_smc_entry.h deleted file mode 100644 index edcc8f0210c..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_smc_entry.h +++ /dev/null @@ -1,54 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_entry.h -* Version : 1.2.3 -* Device(s) : R5F565NEDxFB -* Description : SMC platform header file. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_ENTRY_H -#define SMC_ENTRY_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_smc_interrupt.c b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_smc_interrupt.c deleted file mode 100644 index 8884b7cbb09..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_smc_interrupt.c +++ /dev/null @@ -1,52 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_interrupt.c -* Version : 1.1.0 -* Device(s) : R5F565NEDxFB -* Description : This file implements interrupt setting -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_smc_interrupt.h" -#include "platform.h" - -/*********************************************************************************************************************** -* Function Name: R_Interrupt_Create -* Description : This function Used to set the fast interrupt or group interrupt -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Interrupt_Create(void) -{ - /* Disable group AL1 interrupt*/ - IEN(ICU,GROUPAL1) = 0U; - - - /* Set group AL1 interrupt priority level */ - IPR(ICU,GROUPAL1) = _02_ICU_PRIORITY_LEVEL2; - - /* Enable group AL1 interrupt */ - IEN(ICU,GROUPAL1) = 1U; -} - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_smc_interrupt.h b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_smc_interrupt.h deleted file mode 100644 index eda06304a00..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/general/r_smc_interrupt.h +++ /dev/null @@ -1,292 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_interrupt.h -* Version : 1.1.0 -* Device(s) : R5F565NEDxFB -* Description : This file implements interrupt setting. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_INTERRUPT_H -#define SMC_INTERRUPT_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/* Priority level of interrupt source. - * These macro definitions are used to set the IPR register directly - */ -#define _00_ICU_PRIORITY_LEVEL0 (0x00U) /* Level 0 (disabled) */ -#define _01_ICU_PRIORITY_LEVEL1 (0x01U) /* Level 1 */ -#define _02_ICU_PRIORITY_LEVEL2 (0x02U) /* Level 2 */ -#define _03_ICU_PRIORITY_LEVEL3 (0x03U) /* Level 3 */ -#define _04_ICU_PRIORITY_LEVEL4 (0x04U) /* Level 4 */ -#define _05_ICU_PRIORITY_LEVEL5 (0x05U) /* Level 5 */ -#define _06_ICU_PRIORITY_LEVEL6 (0x06U) /* Level 6 */ -#define _07_ICU_PRIORITY_LEVEL7 (0x07U) /* Level 7 */ -#define _08_ICU_PRIORITY_LEVEL8 (0x08U) /* Level 8 */ -#define _09_ICU_PRIORITY_LEVEL9 (0x09U) /* Level 9 */ -#define _0A_ICU_PRIORITY_LEVEL10 (0x0AU) /* Level 10 */ -#define _0B_ICU_PRIORITY_LEVEL11 (0x0BU) /* Level 11 */ -#define _0C_ICU_PRIORITY_LEVEL12 (0x0CU) /* Level 12 */ -#define _0D_ICU_PRIORITY_LEVEL13 (0x0DU) /* Level 13 */ -#define _0E_ICU_PRIORITY_LEVEL14 (0x0EU) /* Level 14 */ -#define _0F_ICU_PRIORITY_LEVEL15 (0x0FU) /* Level 15 */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -#define FAST_INTERRUPT_VECTOR (0) - -/* The macro definitions below list the full set of priority levels as selected in the Interrupts tab - * Please do not modify this file manually - */ -#define ICU_BSC_BUSERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RAM_RAMERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_FCU_FIFERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_FCU_FRDYI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_SWINT2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_SWINT_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT0_CMI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT1_CMI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_CMWI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_CMWI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_D0FIFO0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_D1FIFO0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI0_SPRI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI0_SPTI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI1_SPRI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI1_SPTI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_QSPI_SPRI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_QSPI_SPTI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SDHI_SBFAI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MMCIF_MBFAI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC1_RXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC1_TXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC0_RXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC0_TXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC2_RXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC2_TXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI0_RXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI0_TXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI1_RXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI1_TXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI2_RXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI2_TXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ13_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ14_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ15_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI3_RXI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI3_TXI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI4_RXI4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI4_TXI4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI5_RXI5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI5_TXI5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI6_RXI6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI6_TXI6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_LVD1_LVD1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_LVD2_LVD2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_USBR0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_ALM_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_PRD_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_IWDT_IWUNI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_WDT_WUNI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PDC_PCDFI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI7_RXI7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI7_TXI7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI8_RXI8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI8_TXI8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI9_RXI9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI9_TXI9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI10_RXI10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI10_TXI10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBE0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI2_SPRI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI2_SPTI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPAL0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPAL1_PRIORITY _02_ICU_PRIORITY_LEVEL2 -#define ICU_SCI11_RXI11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI11_TXI11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI12_RXI12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI12_TXI12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC0I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC1I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC2I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC3I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC74I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_OST_OSTDI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EXDMAC_EXDMAC0I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EXDMAC_EXDMAC1I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT2_CMI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT3_CMI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0C_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0D_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TCI0V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TGI1B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TCI1V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TCI1U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TGI2A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TGI2B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TCI2V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TCI2U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TGI1A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3C_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_CMIA0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_CMIB0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_OVI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_CMIA1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_CMIB1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_OVI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_CMIA2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_CMIB2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_OVI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_CMIA3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_CMIB3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_OVI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3D_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TCI3V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TGI4A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TGI4B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TCI4V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TCI4U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TGI5A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TGI5B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TCI5V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TCI5U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_IC0I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_IC1I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_OC0I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_OC1I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_IC0I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_IC1I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_OC0I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_OC1I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_CUP_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_RXF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_TXF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_RXM0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_TXM0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_RXF1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_TXF1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_RXM1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_TXM1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_USBI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12ADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12GBADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12GCADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12ADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12GBADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12GCADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB192_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ELC_ELSR18I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ELC_ELSR19I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_PROC_BUSY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_ROMOK_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_LONG_PLG_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_TEST_BUSY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_WRRDY0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_WRRDY1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_WRRDY4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_RDRDY0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_RDRDY1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_INTEGRATE_WRRDY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_INTEGRATE_RDRDY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB206_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB207_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TGIA1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIA0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIB0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIC0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGID0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TCIV0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIE0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TGIB1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TCIV1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TCIU1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TGIA2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TGIB2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TCIV2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TCIU2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIA3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIB3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIC3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGID3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TCIV3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIA4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIB4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIC4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGID4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TCIV4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIU5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIV5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIW5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIA6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIB6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIC6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGID6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TCIV6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIA7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIB7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIC7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGID7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TCIV7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIA8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIB8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIC8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGID8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TCIV8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA251_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA252_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA253_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA254_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA255_PRIORITY _0F_ICU_PRIORITY_LEVEL15 - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Interrupt_Create(void); -#endif diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_bsp_config.h b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_bsp_config.h deleted file mode 100644 index 3a661dee9e4..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_bsp_config.h +++ /dev/null @@ -1,627 +0,0 @@ -/* Generated configuration header file - do not edit */ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_config_reference.h -* Device(s) : RX65N -* Description : The file r_bsp_config.h is used to configure your BSP. r_bsp_config.h should be included -* somewhere in your package so that the r_bsp code has access to it. This file (r_bsp_config_reference.h) -* is just a reference file that the user can use to make their own r_bsp_config.h file. -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 15.05.2017 1.00 First Release -* : 01.12.2017 1.01 Added the following macro definition. -* - BSP_CFG_EBMAPCR_1ST_PRIORITY -* - BSP_CFG_EBMAPCR_2ND_PRIORITY -* - BSP_CFG_EBMAPCR_3RD_PRIORITY -* - BSP_CFG_EBMAPCR_4TH_PRIORITY -* - BSP_CFG_EBMAPCR_5TH_PRIORITY -* : 01.07.2018 1.02 Added the following macro definition. -* - BSP_CFG_CONFIGURATOR_SELECT -* Add RTOS support. FreeRTOS. Define a timer for RTOS. -* : 27.07.2018 1.03 Modified the comment of PLL clock source. -* Added the following macro definition for ID code protection. -* - BSP_CFG_ID_CODE_LONG_1 -* - BSP_CFG_ID_CODE_LONG_2 -* - BSP_CFG_ID_CODE_LONG_3 -* - BSP_CFG_ID_CODE_LONG_4 -* Added the following macro definition. -* - BSP_CFG_FIT_IPL_MAX -* : xx.xx.xxxx 1.04 Added support for GNUC and ICCRX. -***********************************************************************************************************************/ -#ifndef R_BSP_CONFIG_REF_HEADER_FILE -#define R_BSP_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* NOTE: - The default settings are the same as when using RSKRX65N-2MB. - Change to the settings for the user board. -*/ - -/* Start up select - 0 = Enable BSP startup program. - 1 = Disable BSP startup program. (e.g. Using user startup program.) -*/ -#define BSP_CFG_STARTUP_DISABLE (0) - -/* Enter the product part number for your MCU. This information will be used to obtain information about your MCU such - as package and memory size. - To help parse this information, the part number will be defined using multiple macros. - R 5 F 56 5N E D D FP - | | | | | | | | | Macro Name Description - | | | | | | | | |__BSP_CFG_MCU_PART_PACKAGE = Package type, number of pins, and pin pitch - | | | | | | | |____not used = Products with wide temperature range - | | | | | | |______BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED = Encryption module included/not included - | | | | | |________BSP_CFG_MCU_PART_MEMORY_SIZE = ROM, RAM, and Data Flash Capacity - | | | | |___________BSP_CFG_MCU_PART_GROUP = Group name - | | | |______________BSP_CFG_MCU_PART_SERIES = Series name - | | |________________BSP_CFG_MCU_PART_MEMORY_TYPE = Type of memory (Flash, ROMless) - | |__________________not used = Renesas MCU - |____________________not used = Renesas semiconductor product. - */ - -/* Package type. Set the macro definition based on values below: - Character(s) = Value for macro = Package Type/Number of Pins/Pin Pitch - FC = 0x0 = LFQFP/176/0.50 - BG = 0x1 = LFBGA/176/0.80 - LC = 0x2 = TFLGA/177/0.50 - FB = 0x3 = LFQFP/144/0.50 - LK = 0x4 = TFLGA/145/0.50 - FP = 0x5 = LFQFP/100/0.50 - LJ = 0xA = TFLGA/100/0.65 -*/ -#define BSP_CFG_MCU_PART_PACKAGE (0x3) // <-- Updated by GUI. Do not edit this value manually - -/* Whether Encryption and SDHI/SDSI are included or not. - Character(s) = Value for macro = Description - A = false = Encryption module not included, SDHI/SDSI module not included - B = false = Encryption module not included, SDHI/SDSI module included - D = false = Encryption module not included, SDHI/SDSI module included, dual-bank structure - E = true = Encryption module included, SDHI/SDSI module not included - F = true = Encryption module included, SDHI/SDSI module included - H = true = Encryption module included, SDHI/SDSI module included, dual-bank structure -*/ -#define BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED (false) // <-- Updated by GUI. Do not edit this value manually - -/* ROM, RAM, and Data Flash Capacity. - Character(s) = Value for macro = ROM Size/Ram Size/Data Flash Size - 4 = 0x4 = 512KB/256KB/Not equipped - 7 = 0x7 = 768KB/256KB/Not equipped - 9 = 0x9 = 1MB/256KB/Not equipped - C = 0xC = 1.5MB/640KB/32KB - E = 0xE = 2MB/640KB/32KB - NOTE: When the RAM capacity is 640KB, the RAM areas are not contiguous. -*/ -#define BSP_CFG_MCU_PART_MEMORY_SIZE (0xE) // <-- Updated by GUI. Do not edit this value manually - -/* Group name. - Character(s) = Value for macro = Description - 5N/51 = 0x0 = RX65N Group/RX651 Group -*/ -#define BSP_CFG_MCU_PART_GROUP (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Series name. - Character(s) = Value for macro = Description - 56 = 0x0 = RX600 Series -*/ -#define BSP_CFG_MCU_PART_SERIES (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Memory type. - Character(s) = Value for macro = Description - F = 0x0 = Flash memory version -*/ -#define BSP_CFG_MCU_PART_MEMORY_TYPE (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Whether to use 1 stack or 2. RX MCUs have the ability to use 2 stacks: an interrupt stack and a user stack. - * When using 2 stacks the user stack will be used during normal user code. When an interrupt occurs the CPU - * will automatically shift to using the interrupt stack. Having 2 stacks can make it easier to figure out how - * much stack space to allocate since the user does not have to worry about always having enough room on the - * user stack for if-and-when an interrupt occurs. Some users will not want 2 stacks though because it is not - * needed in all applications and can lead to wasted RAM (i.e. space in between stacks that is not used). - * If only 1 stack is used then the interrupt stack is the one that will be used. If 1 stack is chosen then - * the user may want to remove the 'SU' section from the linker sections to remove any linker warnings. - * - * 0 = Use 1 stack. Disable user stack. User stack size set below will be ignored. - * 1 = Use 2 stacks. User stack and interrupt stack will both be used. - */ -#define BSP_CFG_USER_STACK_ENABLE (0) - -#if defined(__CCRX__) || defined(__GNUC__) - -/* When using the user startup program, disable the following code. */ -#if (BSP_CFG_STARTUP_DISABLE == 0) - -/* If only 1 stack is chosen using BSP_CFG_USER_STACK_ENABLE then no RAM will be allocated for the user stack. */ -#if (BSP_CFG_USER_STACK_ENABLE == 1) -/* User Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. */ -#define BSP_CFG_USTACK_BYTES (0) -#endif - -/* Interrupt Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. - * If the interrupt stack is the only stack being used then the user will likely want to increase the default size - * below. - */ -#define BSP_CFG_ISTACK_BYTES (0x1000) - -#endif /* BSP_CFG_STARTUP_DISABLE == 0 */ - -/* Heap size in bytes. - To disable the heap you must follow these steps: - 1) Set this macro (BSP_CFG_HEAP_BYTES) to 0. - 2) Set the macro BSP_CFG_IO_LIB_ENABLE to 0. - 3) Disable stdio from being built into the project library. This is done by going into the Renesas RX Toolchain - settings and choosing the Standard Library section. After that choose 'Standard Library' for Category in HEW or - choose 'Contents' in E2Studio. This will present a list of modules that can be included. Uncheck the box for - stdio.h. -*/ -#define BSP_CFG_HEAP_BYTES (0) - -#endif /* defined(__CCRX__) || defined(__GNUC__) */ - -#if defined(__CCRX__) - -/* Initializes C input & output library functions. - 0 = Disable I/O library initialization in resetprg.c. If you are not using stdio then use this value. - 1 = Enable I/O library initialization in resetprg.c. This is default and needed if you are using stdio. */ -#define BSP_CFG_IO_LIB_ENABLE (1) - -#endif /* defined(__CCRX__) */ - -/* If desired the user may redirect the stdio charget() and/or charput() functions to their own respective functions - by enabling below and providing and replacing the my_sw_... function names with the names of their own functions. */ -#define BSP_CFG_USER_CHARGET_ENABLED (0) -#define BSP_CFG_USER_CHARGET_FUNCTION my_sw_charget_function - -#define BSP_CFG_USER_CHARPUT_ENABLED (0) -#define BSP_CFG_USER_CHARPUT_FUNCTION my_sw_charput_function - -/* After reset MCU will operate in Supervisor mode. To switch to User mode, set this macro to '1'. For more information - on the differences between these 2 modes see the CPU >> Processor Mode section of your MCU's hardware manual. - 0 = Stay in Supervisor mode. - 1 = Switch to User mode. -*/ -#define BSP_CFG_RUN_IN_USER_MODE (0) - -/* Set your desired ID code. NOTE, leave at the default (all 0xFF's) if you do not wish to use an ID code. If you set - this value and program it into the MCU then you will need to remember the ID code because the debugger will ask for - it when trying to connect. Note that the E1/E20 will ignore the ID code when programming the MCU during debugging. - If you set this value and then forget it then you can clear the ID code by connecting up in serial boot mode using - FDT. The ID Code is 16 bytes long. The macro below define the ID Code in 4-byte sections. */ -/* Lowest 4-byte section, address 0xFE7F5D50. From MSB to LSB: ID code 4, ID code 3, ID code 2, ID code 1/Control Code. - */ -#define BSP_CFG_ID_CODE_LONG_1 (0xFFFFFFFF) -/* 2nd ID Code section, address 0xFE7F5D54. From MSB to LSB: ID code 8, ID code 7, ID code 6, ID code 5. */ -#define BSP_CFG_ID_CODE_LONG_2 (0xFFFFFFFF) -/* 3rd ID Code section, address 0xFE7F5D58. From MSB to LSB: ID code 12, ID code 11, ID code 10, ID code 9. */ -#define BSP_CFG_ID_CODE_LONG_3 (0xFFFFFFFF) -/* 4th ID Code section, address 0xFE7F5D5C. From MSB to LSB: ID code 16, ID code 15, ID code 14, ID code 13. */ -#define BSP_CFG_ID_CODE_LONG_4 (0xFFFFFFFF) - -/* Clock source select (CKSEL). - 0 = Low Speed On-Chip Oscillator (LOCO) - 1 = High Speed On-Chip Oscillator (HOCO) - 2 = Main Clock Oscillator - 3 = Sub-Clock Oscillator - 4 = PLL Circuit -*/ -#define BSP_CFG_CLOCK_SOURCE (4) // <-- Updated by GUI. Do not edit this value manually - -/* Main clock Oscillator Switching (MOSEL). - 0 = Resonator - 1 = External clock input -*/ -#define BSP_CFG_MAIN_CLOCK_SOURCE (0) // <-- Updated by GUI. Do not edit this value manually - -/* The sub-clock oscillation control for using the RTC. - When '1' is selected, the registers related to RTC are initialized and the sub-clock oscillator is operated. - 0 = The RTC is not to be used. - 1 = The RTC is to be used. -*/ -#define BSP_CFG_RTC_ENABLE (0) // <-- Updated by GUI. Do not edit this value manually - -/* Sub-Clock Oscillator Drive Capacity Control (RTCDV). - 0 = Drive capacity for standard CL. - 1 = Drive capacity for low CL. -*/ -#define BSP_CFG_SOSC_DRV_CAP (0) // <-- Updated by GUI. Do not edit this value manually //standard CL by default - -/* Clock configuration options. - The input clock frequency is specified and then the system clocks are set by specifying the multipliers used. The - multiplier settings are used to set the clock registers in resetprg.c. If a 24MHz clock is used and the - ICLK is 120MHz, PCLKA is 120MHz, PCLKB is 60MHz, PCLKC is 60MHz, PCLKD is 60MHz, FCLK is 60MHz, USB Clock is 48MHz, - and BCLK is 120MHz then the settings would be: - - BSP_CFG_XTAL_HZ = 24000000 - BSP_CFG_PLL_DIV = 1 (no division) - BSP_CFG_PLL_MUL = 10.0 (24MHz x 10.0 = 240MHz) - BSP_CFG_ICK_DIV = 2 : System Clock (ICLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_ICK_DIV) = 120MHz - BSP_CFG_PCKA_DIV = 2 : Peripheral Clock A (PCLKA) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKA_DIV) = 120MHz - BSP_CFG_PCKB_DIV = 4 : Peripheral Clock B (PCLKB) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKB_DIV) = 60MHz - BSP_CFG_PCKC_DIV = 4 : Peripheral Clock C (PCLKC) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKC_DIV) = 60MHz - BSP_CFG_PCKD_DIV = 4 : Peripheral Clock D (PCLKD) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKD_DIV) = 60MHz - BSP_CFG_FCK_DIV = 4 : Flash IF Clock (FCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_FCK_DIV) = 60MHz - BSP_CFG_BCK_DIV = 2 : External Bus Clock (BCK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_BCK_DIV) = 120MHz - BSP_CFG_UCK_DIV = 5 : USB Clock (UCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_UCK_DIV) = 48MHz -*/ - -/* Input clock frequency in Hz (XTAL or EXTAL). */ -#define BSP_CFG_XTAL_HZ (12000000) // <-- Updated by GUI. Do not edit this value manually - -/* The HOCO can operate at several different frequencies. Choose which one using the macro below. - Available frequency settings: - 0 = 16MHz (default) - 1 = 18MHz - 2 = 20MHz -*/ -#define BSP_CFG_HOCO_FREQUENCY (0) // <-- Updated by GUI. Do not edit this value manually - -/* PLL clock source (PLLSRCEL). Choose which clock source to input to the PLL circuit. - Available clock sources: - 0 = Main clock (default) - 1 = HOCO -*/ -#define BSP_CFG_PLL_SRC (0) // <-- Updated by GUI. Do not edit this value manually - -/* PLL Input Frequency Division Ratio Select (PLIDIV). - Available divisors = /1 (no division), /2, /3 -*/ -#define BSP_CFG_PLL_DIV (1) // <-- Updated by GUI. Do not edit this value manually - -/* PLL Frequency Multiplication Factor Select (STC). - Available multipliers = x10.0 to x30.0 in 0.5 increments (e.g. 10.0, 10.5, 11.0, 11.5, ..., 29.0, 29.5, 30.0) -*/ -#define BSP_CFG_PLL_MUL (20.0) // <-- Updated by GUI. Do not edit this value manually - -/* System Clock Divider (ICK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_ICK_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock A Divider (PCKA). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKA_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock B Divider (PCKB). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKB_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock C Divider (PCKC). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKC_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock D Divider (PCKD). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKD_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* External Bus Clock Divider (BCLK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_BCK_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Flash IF Clock Divider (FCK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_FCK_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* USB Clock Divider Select. - Available divisors = /2, /3, /4, /5 -*/ -#define BSP_CFG_UCK_DIV (5) // <-- Updated by GUI. Do not edit this value manually - -/* Configure BCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency, 2= BCK/2 frequency -*/ -#define BSP_CFG_BCLK_OUTPUT (0) // <-- Updated by GUI. Do not edit this value manually - -/* Configure SDCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency -*/ -#define BSP_CFG_SDCLK_OUTPUT (0) // <-- Updated by GUI. Do not edit this value manually - -/* Main Clock Oscillator Wait Time (MOSCWTCR). - The value of MOSCWTCR register required for correspondence with the waiting time required to secure stable oscillation - by the main clock oscillator is obtained by using the maximum frequency for fLOCO in the formula below. - - BSP_CFG_MOSC_WAIT_TIME > (tMAINOSC * (fLOCO_max) + 16)/32 - (tMAINOSC: main clock oscillation stabilization time; fLOCO_max: maximum frequency for fLOCO) - - If tMAINOSC is 9.98 ms and fLOCO_max is 264 kHz (the period is 1/3.78 us), the formula gives - BSP_CFG_MOSC_WAIT_TIME > (9.98 ms * (264 kHZ) + 16)/32 = 82.83, so set the BSP_CFG_MOSC_WAIT_TIME to 83(53h). - - NOTE: The waiting time is not required when an external clock signal is input for the main clock oscillator. - Set the BSP_CFG_MOSC_WAIT_TIME to 00h. -*/ -#define BSP_CFG_MOSC_WAIT_TIME (0x53) // <-- Updated by GUI. Do not edit this value manually - -/* Sub-Clock Oscillator Wait Time (SOSCWTCR). - The value of SOSCWTCR register required for correspondence with the expected time to secure settling of oscillation - by the sub-clock oscillator is obtained by using the maximum frequency for fLOCO in the formula below. - - BSP_CFG_SOSC_WAIT_TIME > (tSUBOSC * (fLOCO_max) + 16)/16384 - (tSUBOSC: sub-clock oscillation stabilization time; fLOCO_max: maximum frequency for fLOCO) - - If tSUBOSC is 2 s and fLOCO is 264 kHz (the period is 1/3.78 us), the formula gives - BSP_CFG_SOSC_WAIT_TIME > (2 s * (264 kHz) +16)/16384 = 32.22, so set the BSP_CFG_SOSC_WAIT_TIME bits to 33(21h). -*/ -#define BSP_CFG_SOSC_WAIT_TIME (0x21) // <-- Updated by GUI. Do not edit this value manually - -/* ROM Cache Enable Register (ROMCE). - 0 = ROM cache operation disabled. - 1 = ROM cache operation enabled. -*/ -#define BSP_CFG_ROM_CACHE_ENABLE (0) - -/* Configure WDT and IWDT settings. - OFS0 - Option Function Select Register 0 - b31:b29 Reserved When reading, these bits return the value written by the user. The write value should be 1. - b28 WDTRSTIRQS - WDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b27:b26 WDTRPSS - WDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b25:b24 WDTRPES - WDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b23:b20 WDTCKS - WDT Clock Frequency Division Ratio - (1=PCLKB/4, 4=PCLKB/64, 0xF=PCLKB/128, 6=PCLKB/256, - 7=PCLKB/2048, 8=PCLKB/8192) - b19:b18 WDTTOPS - WDT Timeout Period Select (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b17 WDTSTRT - WDT Start Mode Select - (0=auto-start after reset, 1=halt after reset) - b16:b15 Reserved (set to 1) - b14 IWDTSLCSTP - IWDT Sleep Mode Count Stop Control - (0=can't stop count, 1=stop w/some low power modes) - b13 Reserved (set to 1) - b12 IWDTRSTIRQS - IWDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b11:b10 IWDTRPSS - IWDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b9:b8 IWDTRPES - IWDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b7:b4 IWDTCKS - IWDT Clock Frequency Division Ratio - (0=none, 2=/16, 3 = /32, 4=/64, 0xF=/128, 5=/256) - b3:b2 IWDTTOPS - IWDT Timeout Period Select - (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b1 IWDTSTRT - IWDT Start Mode Select - (0=auto-start after reset, 1=halt after reset) - b0 Reserved (set to 1) -*/ -#define BSP_CFG_OFS0_REG_VALUE (0xFFFFFFFF) // <-- Updated by GUI. Do not edit this value manually //Disable by default - -/* Configure whether voltage detection 0 circuit and HOCO are enabled after reset. - OFS1 - Option Function Select Register 1 - b31:b9 Reserved (set to 1) - b8 HOCOEN - Enable/disable HOCO oscillation after a reset (0=enable, 1=disable) - b7:b3 Reserved When reading, these bits return the value written by the user. The write value should be 1. - b2 LVDAS - Voltage Detection 0 circuit start (1=monitoring disabled) - b1:b0 VDSEL - Voltage Detection 0 level select (1=2.94v, 2=2.87v, 3=2.80v) - NOTE: If HOCO oscillation is enabled by OFS1.HOCOEN, HOCO frequency is 16MHz. - BSP_CFG_HOCO_FREQUENCY should be default value. -*/ -#define BSP_CFG_OFS1_REG_VALUE (0xFFFFFFFF) // <-- Updated by GUI. Do not edit this value manually //Disable by default - -/* Trusted memory is facility to prevent the reading of blocks 8 and 9 and blocks 46 and 47 (in dual mode) in - the code flash memory by third party software. This feature is disabled by default. - TMEF - TM Enable Flag Register - b31 Reserved (set to 1) - b30:b28 TMEFDB - Dual-Bank TM Enable - 000: The TM function in the address range from FFEE 0000h to - FFEE FFFFh is enabled in dual mode. - - 111: The TM function in the address range from FFEE 0000h to - FFEE FFFFh is disabled in dual mode. - b27 Reserved (set to 1) - b26:b24 TMEFF - TM Enable - 000: TM function is enabled. - - 111: TM function is disabled. - b23:b0 Reserved (set to 1) - NOTE: If the dual bank function has not been incorporated in a device, - TMEFDB bits [b30:b26] are reserved area. -*/ -#define BSP_CFG_TRUSTED_MODE_FUNCTION (0xFFFFFFFF) //Disable by default - -/* Configure FAW register is used to set the write protection flag and boot area select flag - for setting the flash access window startaddress and flash access window end address. - FAW - Flash Access Window Setting Register - b31 BTFLG - Boot Area Select Flag - 0: FFFF C000h to FFFF DFFFh are used as the boot area - - 1: FFFF E000h to FFFF FFFFh are used as the boot area - b30:b28 Reserved - When reading, these bits return the value written by the user.The write value should be 1. - b27:b16 FAWE - Flash Access Window End Address - Flash access window end address - b15 FSPR - Access Window Protection Flag - 0: With protection (P/E disabled) - - 1: Without protection (P/E enabled) - b14:b12 Reserved - When reading, these bits return the value written by the user.The write value should be 1. - b11:b0 FAWS - Flash Access Window Start Address - Flash access window start address - NOTE: Once 0 is written to this bit, the bit can never be restored to 1. - Therefore, the access window and the BTFLG bit never be set again or the TM function - never be disabled once it has been enabled. - Exercise extra caution when handling the FSPR bit. -*/ -#define BSP_CFG_FAW_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* The ROM code protection register is a function to prohibit reading from or programming to the flash memory - when the flash programmer is used during off-board programming. - ROMCODE - ROM Code Protection Register - b31:b0 ROM Code - 0000 0000h: ROM code protection enabled (ROM code protection 1). - 0000 0001h: ROM code protection enabled (ROM code protection 2). - Other than above: ROM code protection disabled. - Note. The ROMCODE register should be set in 32-bit units. -*/ -#define BSP_CFG_ROMCODE_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* Select the bank mode of dual-bank function of the code flash memory. - 0 = Dual mode. - 1 = Linear mode. - NOTE: If the dual bank function has been incorporated in a device, select the bank mode in this macro. - Default setting of the bank mode is linear mode. - If the dual bank function has not been incorporated in a device, this macro should be 1. -*/ -#define BSP_CFG_CODE_FLASH_BANK_MODE (1) //Linear mode by default - -/* Select the startup bank of the program when dual bank function is in dual mode. - 0 = The address range of bank 1 from FFE00000h to FFEFFFFFh and bank 0 from FFF00000h to FFFFFFFFh. - 1 = The address range of bank 1 from FFF00000h to FFFFFFFFh and bank 0 from FFE00000h to FFEFFFFFh. - NOTE: If the dual bank function has been incorporated in a device, select the start bank in this macro. - Default setting of the start bank is bank0. - If the dual bank function has not been incorporated in a device, this macro should be 0. -*/ -#define BSP_CFG_CODE_FLASH_START_BANK (0) //Bank0 by default - -/* This macro lets other modules no if a RTOS is being used. - 0 = RTOS is not used. - 1 = FreeRTOS is used. - 2 = embOS is used.(This is not available.) - 3 = MicroC_OS is used.(This is not available.) - 4 = RI600V4 or RI600PX is used.(This is not available.) -*/ -/* As of today, we need a workaround to avoid the problem that the Smart Configurator does not have such GUI - yet and the BSP_CFG_RTOS_USED here is set to (0) every time of code generation by the Smart Configurator. - The BSP_CFG_RTOS_USED is set to (1) in the r_bsp.h instead of here so that the setting of here is ignored. -*/ -#if !defined(BSP_CFG_RTOS_USED) || (BSP_CFG_RTOS_USED == 0) -#if defined(BSP_CFG_RTOS_USED) -#undef BSP_CFG_RTOS_USED -#endif -#define BSP_CFG_RTOS_USED (0) // <-- Updated by GUI. Do not edit this value manually -#endif - -/* This macro is used to select which CMT channel used for system timer of RTOS. - * The setting of this macro is only valid if the macro BSP_CFG_RTOS_USED is set to a value other than 0. */ -#if (BSP_CFG_RTOS_USED != 0) -/* Setting value. - * 0 = CMT channel 0 used for system timer of RTOS (recommended to be used for RTOS). - * 1 = CMT channel 1 used for system timer of RTOS. - * 2 = CMT channel 2 used for system timer of RTOS. - * 3 = CMT channel 3 used for system timer of RTOS. - * Others = Invalid. */ -#define BSP_CFG_RTOS_SYSTEM_TIMER (0) -#endif - -/* By default modules will use global locks found in mcu_locks.c. If the user is using a RTOS and would rather use its - locking mechanisms then they can change this macro. - NOTE: If '1' is chosen for this macro then the user must also change the next macro 'BSP_CFG_USER_LOCKING_TYPE'. - 0 = Use default locking (non-RTOS) - 1 = Use user defined locking mechanism. -*/ -#define BSP_CFG_USER_LOCKING_ENABLED (0) - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to redefine the typedef - that is used for the locks. If the user is using a RTOS then they would likely redefine the typedef to be - a semaphore/mutex type of their RTOS. Use the macro below to set the type that will be used for the locks. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_TYPE bsp_lock_t - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to define the functions - that will handle the locking and unlocking. These functions should be defined below. - If BSP_CFG_USER_LOCKING_ENABLED is != 0: - R_BSP_HardwareLock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION(mcu_lock_t hw_index) - R_BSP_HardwareUnlock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION(mcu_lock_t hw_index) - NOTE:With these functions the index into the array holding the global hardware locks is passed as the parameter. - R_BSP_SoftwareLock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - R_BSP_SoftwareUnlock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - NOTE:With these functions the actual address of the lock to use is passed as the parameter. - NOTE: These functions must return a boolean. If lock was obtained or released successfully then return true. Else, - return false. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION my_hw_locking_function -#define BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION my_hw_unlocking_function -#define BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION my_sw_locking_function -#define BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION my_sw_unlocking_function - -/* If the user would like to determine if a warm start reset has occurred, then they may enable one or more of the - * following callback definitions AND provide a call back function name for the respective callback - * function (to be defined by the user). Setting BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED = 1 will result - * in a callback to the user defined my_sw_warmstart_prec_function just prior to the initialization of the C - * runtime environment by resetprg. - * - * Setting BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED = 1 will result in a callback to the user defined - * my_sw_warmstart_postc_function just after the initialization of the C runtime environment by resetprg. - */ -#define BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_PRE_C_FUNCTION my_sw_warmstart_prec_function - -#define BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_POST_C_FUNCTION my_sw_warmstart_postc_function - -/* By default FIT modules will check input parameters to be valid. This is helpful during development but some users - will want to disable this for production code. The reason for this would be to save execution time and code space. - This macro is a global setting for enabling or disabling parameter checking. Each FIT module will also have its - own local macro for this same purpose. By default the local macros will take the global value from here though - they can be overridden. Therefore, the local setting has priority over this global setting. Disabling parameter - checking should only used when inputs are known to be good and the increase in speed or decrease in code space is - needed. - 0 = Global setting for parameter checking is disabled. - 1 = Global setting for parameter checking is enabled (Default). -*/ -#define BSP_CFG_PARAM_CHECKING_ENABLE (1) - -/* The extended bus master has five transfer sources: EDMAC, GLCDC-GRA1 (GLCDC graphics 1 data read), GLCDCGRA2 (GLCDC - graphics 2 data read), DRW2D-TX (DRW2D texture data read), and DRW2D-FB (DRW2D frame buffer data read write and - display list data read). - The default priority order in bsp is below - GLCDC-GRA1 > GLCDC-GRA2 > DRW2D-TX > DRW2D-FB > EDMAC. - Priority can be changed with this macro. - - Extended Bus Master Priority setting - 0 = GLCDC graphics 1 data read - 1 = DRW2D texture data read - 2 = DRW2D frame buffer data read write and display list data read - 3 = GLCDC graphics 2 data read - 4 = EDMAC - - Note : This macro is only available for products with at least 1.5 Mbytes of code flash memory. - Settings other than above are prohibited. - Duplicate priority settings can not be made. -*/ -#define BSP_CFG_EBMAPCR_1ST_PRIORITY (0) /* Extended Bus Master 1st Priority Selection */ -#define BSP_CFG_EBMAPCR_2ND_PRIORITY (3) /* Extended Bus Master 2nd Priority Selection */ -#define BSP_CFG_EBMAPCR_3RD_PRIORITY (1) /* Extended Bus Master 3rd Priority Selection */ -#define BSP_CFG_EBMAPCR_4TH_PRIORITY (2) /* Extended Bus Master 4th Priority Selection */ -#define BSP_CFG_EBMAPCR_5TH_PRIORITY (4) /* Extended Bus Master 5th Priority Selection */ - -/* This macro is used to define the voltage that is supplied to the MCU (Vcc). This macro is defined in millivolts. This - macro does not actually change anything on the MCU. Some FIT modules need this information so it is defined here. */ -#define BSP_CFG_MCU_VCC_MV (3300) // <-- Updated by GUI. Do not edit this value manually - -/* Allow initialization of auto-generated peripheral initialization code by Smart Configurator tool. - When not using the Smart Configurator, set the value of BSP_CFG_CONFIGURATOR_SELECT to 0. - 0 = Disabled (default) - 1 = Smart Configurator initialization code used -*/ -#define BSP_CFG_CONFIGURATOR_SELECT (1) // <-- Updated by GUI. Do not edit this value manually - -/* For some BSP functions, it is necessary to ensure that, while these functions are executing, interrupts from other - FIT modules do not occur. By controlling the IPL, these functions disable interrupts that are at or below the - specified interrupt priority level. - This macro sets the IPL. Range is 0x0 - 0xF. - Please set this macro more than IPR for other FIT module interrupts. - The default value is 0xF (maximum value). - Don't change if there is no special processing with higher priority than all fit modules. -*/ -#define BSP_CFG_FIT_IPL_MAX (0xF) - -/* This macro is used to select which SCI channel used for debug serial terminal. - */ -#define MY_BSP_CFG_SERIAL_TERM_SCI (2) - -#endif /* R_BSP_CONFIG_REF_HEADER_FILE */ - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_bsp_config_readme.txt b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_bsp_config_readme.txt deleted file mode 100644 index 6a9002cf4f3..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_bsp_config_readme.txt +++ /dev/null @@ -1,12 +0,0 @@ -FIT r_config folder -------------------- -The purpose of the r_config folder is to provide one place where the user can store all of their FIT configuration -files. Putting the files in one place makes them easy to find, backup, and put in a version control system. - -FIT Modules are distributed with a reference configuration file. These files end with '_reference.h'. For example, -the reference configuration file for the r_bsp is named r_bsp_config_reference.h. Reference configuration files are -provided so that the user always has a known-good configuration to revert to. When adding a FIT Module to a project the -user should copy this reference configuration file to this folder and remove '_reference' from the filename -(r_bsp_config_reference.h is renamed to r_bsp_config.h). For the r_bsp the reference configuration file can be found in -the 'board' folder for the currently chosen development board. For other FIT Modules the reference configuration file -can be found in the 'ref' folder of the FIT Module. diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_bsp_interrupt_config.h b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_bsp_interrupt_config.h deleted file mode 100644 index 1346f175b23..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_bsp_interrupt_config.h +++ /dev/null @@ -1,214 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_interrupt_config.h -* Description : This module maps Interrupt A & B interrupts. More information on how this is done is given below. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -* : 15.05.2017 2.00 Changed the name of the following macro definition, because there was a mistake -* in the name of macro definition. -* - From XXX_TPU0_TGI0V to XXX_TPU0_TCI0V. -* - From XXX_TPU1_TGI1V to XXX_TPU1_TCI1V. -* - From XXX_TPU1_TGI1U to XXX_TPU1_TCI1U. -* - From XXX_TPU2_TGI2V to XXX_TPU2_TCI2V. -* - From XXX_TPU2_TGI2U to XXX_TPU2_TCI2U. -* - From XXX_TPU3_TGI3V to XXX_TPU3_TCI3V. -* - From XXX_TPU4_TGI4V to XXX_TPU4_TCI4V. -* - From XXX_TPU4_TGI4U to XXX_TPU4_TCI4U. -* - From XXX_TPU5_TGI5V to XXX_TPU5_TCI5V. -* - From XXX_TPU5_TGI5U to XXX_TPU5_TCI5U. -* - From XXX_MTU0_TGIV0 to XXX_MTU0_TCIV0. -* - From XXX_MTU1_TGIV1 to XXX_MTU1_TCIV1. -* - From XXX_MTU1_TGIU1 to XXX_MTU1_TCIU1. -* - From XXX_MTU2_TGIV2 to XXX_MTU2_TCIV2. -* - From XXX_MTU2_TGIU2 to XXX_MTU2_TCIU2. -* - From XXX_MTU3_TGIV3 to XXX_MTU3_TCIV3. -* - From XXX_MTU4_TGIV4 to XXX_MTU4_TCIV4. -* - From XXX_MTU6_TGIV6 to XXX_MTU6_TCIV6. -* - From XXX_MTU7_TGIV7 to XXX_MTU7_TCIV7. -* - From XXX_MTU8_TGIV8 to XXX_MTU8_TCIV8. -* Added select processing of the following software configurable interrupt source. -* - TSIP_PROC_BUSY -* - TSIP_ROMOK -* - TSIP_LONG_PLG -* - TSIP_TEST_BUSY -* - TSIP_WRRDY0 -* - TSIP_WRRDY1 -* - TSIP_WRRDY4 -* - TSIP_RDRDY0 -* - TSIP_RDRDY1 -* - TSIP_INTEGRATE_WRRDY -* - TSIP_INTEGRATE_RDRDY -***********************************************************************************************************************/ -#ifndef R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE -#define R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/* If you wish to use one of the interrupt below then set the appropriate configuration macro to the vector number you - * wish to use for that interrupt. For example, if you want to use the RTC carry interrupt (CUP) at vector 176 then you - * would do the following: - * - * #define BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP 176 - */ - -/* Interrupt B Sources. - * -Valid vector numbers are 128-207. - * -There are more vector slots for B sources than actual B sources. By default all B sources are mapped. - * -If using the 'TPU1, TGI1A' interrupt it must be vector 144 or 145. It is set to 144 by default. - * -If a peripheral interrupt is going to be used to wake up the MCU from All-Module Clock Stop Mode then it must be - * in a vector between 146 to 157. Peripheral interrupts that can do this are TMR interrupts and the 'USB0, USBI0' - * interrupt. By default the TMR interrupts are chosen since there are 12 of them and there are 12 slots. - */ -#define BSP_MAPPED_INT_CFG_B_VECT_CMT2_CMI2 128 -#define BSP_MAPPED_INT_CFG_B_VECT_CMT3_CMI3 129 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIA0 146 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIB0 147 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_OVI0 148 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIA1 149 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIB1 150 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_OVI1 151 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIA2 152 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIB2 153 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_OVI2 154 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIA3 155 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIB3 156 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_OVI3 157 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0A 130 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0B 131 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0C 132 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0D 133 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TCI0V 134 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1A 144 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1B 135 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1V 136 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1U 137 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2A 138 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2B 139 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2V 140 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2U 141 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3A 142 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3B 143 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3C 145 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3D 158 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TCI3V 159 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4A 160 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4B 161 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4V 162 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4U 163 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5A 164 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5B 165 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5V 166 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5U 167 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC0I0 168 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC1I0 169 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC0I0 170 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC1I0 171 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC0I1 172 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC1I1 173 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC0I1 174 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC1I1 175 -#define BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP 176 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXF0 177 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXF0 178 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXM0 179 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXM0 180 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXF1 181 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXF1 182 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXM1 183 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXM1 184 -#define BSP_MAPPED_INT_CFG_B_VECT_USB0_USBI0 185 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12ADI0 186 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GBADI0 187 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GCADI0 188 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12ADI1 189 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GBADI1 190 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GCADI1 191 -#define BSP_MAPPED_INT_CFG_B_VECT_RNG_RNGEND -#define BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR18I 193 -#define BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR19I 194 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_PROC_BUSY 195 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_ROMOK 196 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_LONG_PLG 197 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_TEST_BUSY 198 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY0 199 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY1 200 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY4 201 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY0 202 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY1 203 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_WRRDY 204 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_RDRDY 205 - -/* Interrupt A Sources. - * -Valid vector numbers are 208-255. - * -There are more A sources than A vector slots. By default none of the GPT interrupts are mapped. - * -If using the 'MTU1, TGI1A' interrupt it must be vector 208 or 209. It is set to 208 by default. - */ -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIA0 209 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIB0 210 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIC0 211 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGID0 212 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TCIV0 213 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIE0 214 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIF0 215 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIA1 208 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIB1 216 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIV1 217 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIU1 218 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIA2 219 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIB2 220 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIV2 221 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIU2 222 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIA3 223 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIB3 224 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIC3 225 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGID3 226 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TCIV3 227 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIA4 228 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIB4 229 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIC4 230 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGID4 231 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TCIV4 232 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIU5 233 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIV5 234 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIW5 235 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIA6 236 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIB6 237 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIC6 238 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGID6 239 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TCIV6 240 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIA7 241 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIB7 242 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIC7 243 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGID7 244 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TCIV7 245 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIA8 246 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIB8 247 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIC8 248 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGID8 249 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TCIV8 250 -#define BSP_MAPPED_INT_CFG_A_VECT_AES_AESRDY -#define BSP_MAPPED_INT_CFG_A_VECT_AES_AESEND - -#endif /* R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE */ - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_byteq_config.h b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_byteq_config.h deleted file mode 100644 index 0b4d4f9bb52..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_byteq_config.h +++ /dev/null @@ -1,59 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_byteq_config.h -* Description : Configures the byte queue memory allocation -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 24.07.2013 1.00 Initial Release -* : 11.21.2014 1.20 Removed dependency to BSP -* : 30.09.2015 1.50 Added dependency to BSP -***********************************************************************************************************************/ -#ifndef BYTEQ_CONFIG_H -#define BYTEQ_CONFIG_H - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - Available settings: - BSP_CFG_PARAM_CHECKING_ENABLE: - Utilizes the system default setting - 1: - Includes parameter checking - 0: - Compiles out parameter checking -*/ -#define BYTEQ_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY IF SHOULD USE MALLOC() TO ALLOCATE MEMORY FOR QUEUE CONTROL BLOCKS */ -#define BYTEQ_CFG_USE_HEAP_FOR_CTRL_BLKS (0) - -/* SPECIFY NUMBER OF STATIC QUEUE CONTROL BLOCKS TO SUPPORT */ -/* valid only when BYTEQ_USE_HEAP_FOR_CTRL_BLKS is set to 0 */ -#define BYTEQ_CFG_MAX_CTRL_BLKS (4) - - -#endif /* BYTEQ_CONFIG_H */ diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_ether_rx_config.h b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_ether_rx_config.h deleted file mode 100644 index ea6b31eee73..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_ether_rx_config.h +++ /dev/null @@ -1,119 +0,0 @@ -/* Generated configuration header file - do not edit */ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_ether_rx_config.h - * Version : 1.04 - * Description : Ethernet module device driver - ***********************************************************************************************************************/ -/********************************************************************************************************************** - * History : DD.MM.YYYY Version Description - * : 22.07.2014 1.00 First Release - * : 31.03.2016 1.01 Added changes for RX63N. - * : 01.10.2016 1.02 Added changes for RX65N. - * : 01.10.2017 1.03 Added changes for RX65N-2MB. - * : 08.01.2018 1.04 Changed comment. - ***********************************************************************************************************************/ - -/* Guards against multiple inclusion */ -#ifndef R_ETHER_RX_CONFIG_H - #define R_ETHER_RX_CONFIG_H - -/*********************************************************************************************************************** - Macro definitions - ***********************************************************************************************************************/ - -/* Ethernet interface select. - 0 = MII (Media Independent Interface) - 1 = RMII (Reduced Media Independent Interface) - */ - #define ETHER_CFG_MODE_SEL (1) - -/* PHY-LSI address setting for ETHER0/1. - Please set the value 31 ETHER_CFG_CH0_PHY_ADDRESS when use default setting of the RSK+RX63N. - Please set the value 30 ETHER_CFG_CH0_PHY_ADDRESS when use default setting of the RSK+RX65N/RSK+RX65N_2MB. - Please set the value 0 ETHER_CFG_CH0_PHY_ADDRESS and value 1 ETHER_CFG_CH1_PHY_ADDRESS when use default setting of the RSK+RX64M/RSK+RX71M. - */ - #define ETHER_CFG_CH0_PHY_ADDRESS (0) /* Please define the PHY-LSI address in the range of 0-31. */ - #define ETHER_CFG_CH1_PHY_ADDRESS (1) /* Please define the PHY-LSI address in the range of 0-31. */ - -/* The number of Rx descriptors. */ - #define ETHER_CFG_EMAC_RX_DESCRIPTORS (1) - -/* The number of Tx descriptors. */ - #define ETHER_CFG_EMAC_TX_DESCRIPTORS (1) - -/* Please define the size of the sending and receiving buffer in the value where one frame can surely be stored - because the driver is single-frame/single-buffer processing. */ - #define ETHER_CFG_BUFSIZE (1536) /* Must be 32-byte aligned */ - -/* EINT interrupt priority level. This definition is not used when EINT interrupt is assigned to Group interrupt. */ - #define ETHER_CFG_EINT_INT_PRIORITY (2) /* Please define the interruption level within the range of 1-15. */ - -/* Group AL1 interrupt priority level. This definition is not used when EINT interrupt is assigned to Peripheral - interrupt. */ - #define ETHER_CFG_AL1_INT_PRIORTY (2) /* Please define the interruption level within the range of 1-15. */ - -/* The register bus of PHY0/1 for ETHER0/1 select - 0 = The access of the register of PHY uses ETHER0. - 1 = The access of the register of PHY uses ETHER1. - - Please set the value 0 ETHER_CFG_CH0_PHY_ACCESS when use default setting of the RSK+RX63N. - Please set the value 0 ETHER_CFG_CH0_PHY_ACCESS when use default setting of the RSK+RX65N/RSK+RX65N_2MB. - Please set the value 1 ETHER_CFG_CH0_PHY_ACCESS and ETHER_CFG_CH1_PHY_ACCESS when use default setting of the RSK+RX64M/RSK+RX71M. - */ - #define ETHER_CFG_CH0_PHY_ACCESS (0) - #define ETHER_CFG_CH1_PHY_ACCESS (1) - -/* Define the access timing of MII/RMII register */ - #define ETHER_CFG_PHY_MII_WAIT (8) /* Plese define the value of 1 or more */ - -/* Define the waiting time for reset completion of PHY-LSI */ - #define ETHER_CFG_PHY_DELAY_RESET (0x00020000L) - -/** - * Link status read from LMON bit of ETHERC PSR register. The state is hardware dependent. - */ - #define ETHER_CFG_LINK_PRESENT (0) - -/* Use LINKSTA signal for detect link status changes - 0 = unused (use PHY-LSI status register) - 1 = use (use LINKSTA signal) - */ - #define ETHER_CFG_USE_LINKSTA (0) /* This setting is reflected in all channels */ - -/* Definition of whether or not to use KSZ8041NL of the Micrel Inc. - 0 = unused - 1 = use - */ - #define ETHER_CFG_USE_PHY_KSZ8041NL (0) - -/*********************************************************************************************************************** - Typedef definitions - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global variables - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global functions (to be accessed by other files) - ***********************************************************************************************************************/ - -#endif /* R_ETHER_RX_CONFIG_H */ diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_flash_rx_config.h b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_flash_rx_config.h deleted file mode 100644 index fbf916a0e97..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_flash_rx_config.h +++ /dev/null @@ -1,116 +0,0 @@ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_flash_rx_config_reference.h - * Description : Configures the FLASH API module for RX200 and RX600 Series MCU's. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* 12.04.2014 1.00 First Release -* 22.12.2014 1.10 Added flash type usage comments. -* 25.06.2015 1.20 Added FLASH_CFG_CODE_FLASH_RUN_FROM_ROM. -* : 12.10.2016 2.00 Modified for BSPless operation (added FLASH_CFG_USE_FIT_BSP). -***********************************************************************************************************************/ -#ifndef FLASH_CONFIG_HEADER_FILE -#define FLASH_CONFIG_HEADER_FILE - -/* Set the following value to 0 when building without using the FIT BSP Module */ -#define FLASH_CFG_USE_FIT_BSP (1) - - -/*********************************************************************************************************************** - Configuration Options - ***********************************************************************************************************************/ -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting - * Setting to 1 includes parameter checking; 0 compiles out parameter checking - */ -#define FLASH_CFG_PARAM_CHECKING_ENABLE (1) - - -/****************************************************************************** - ENABLE CODE FLASH PROGRAMMING -******************************************************************************/ -/* If you are only using data flash, set this to 0. - * Setting to 1 includes code to program the ROM area. When programming ROM, - * code must be executed from RAM, except under certain restrictions for flash - * type 3 (see section 2.14 in App Note). See section 2.13 in the App Note for - * details on how to set up code and the linker to execute code from RAM. - */ -#define FLASH_CFG_CODE_FLASH_ENABLE (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING DATA FLASH OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces data flash API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, data flash operations return immediately after the operation has been - * started. Notification of the operation completion is done via the callback - * function. - */ -#define FLASH_CFG_DATA_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING CODE FLASH (ROM) OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces ROM API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, ROM operations return immediately after the operation has been started. - * Notification of the operation completion is done via the callback function. - * When reprogramming ROM, THE RELOCATABLE VECTOR TABLE AND CORRESPONDING - * INTERRUPT ROUTINES MUST BE IN RAM. - * See sections 2.16 Usage Notes in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE CODE FLASH SELF-PROGRAMMING -******************************************************************************/ -/* Set this to 0 when programming code flash while executing in RAM. - * Set this to 1 when programming code flash while executing from another - * segment in ROM (possible only with RX64M, RX71M, RX65N-2 groups). - * See section 2.14 in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_RUN_FROM_ROM (0) - - -/****************************************************************************** - SET IPL OF FLASH READY INTERRUPT -******************************************************************************/ -#define FLASH_CFG_FLASH_READY_IPL (5) // Flash type 2 only - - -/****************************************************************************** - ENABLE OR DISABLE LOCK BIT PROTECTION -******************************************************************************/ -/* Each erasure block has a corresponding lock bit that can be used to - * protect that block from being programmed/erased after the lock bit is - * set. The use of lock bits can be used or ignored. - * Setting this to 1 will cause lock bits to be ignored and programs/erases to a - * block will not be limited. - * Setting this to 0 will cause lock bits to be used as the user configures through - * the Control command. This only applies to ROM as the DF does not have lock bits. - */ -#define FLASH_CFG_IGNORE_LOCK_BITS (1) // Flash type 2 only - - -#endif /* FLASH_CONFIG_HEADER_FILE */ diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_s12ad_rx_config.h b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_s12ad_rx_config.h deleted file mode 100644 index 0202bf133a4..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_s12ad_rx_config.h +++ /dev/null @@ -1,53 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_s12ad_rx_config.h -* Description : Configures the 12-bit A/D driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 22.07.2013 1.00 Initial Release. -* 21.04.2014 1.20 Updated for RX210 advanced features; RX110/63x support. -***********************************************************************************************************************/ -#ifndef S12AD_CONFIG_H -#define S12AD_CONFIG_H - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* - * SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting. - * Setting to 1 includes parameter checking; 0 compiles out parameter checking. - */ -#define ADC_CFG_PARAM_CHECKING_ENABLE BSP_CFG_PARAM_CHECKING_ENABLE - - -/* - * RX210 Series only; Temperature Sensor Programmable Gain Amplifier (PGA) - * SELECT PGA GAIN TO MATCH AVCC0 VOLTAGE RANGE: - * 0: 1.8V <= AVcc0 < 2.7V; default; good for all actual voltages - * 1: 2.7V <= AVcc0 < 3.6V - * 2: 3.6V <= AVcc0 < 4.5V - * 3: 4.5V <= AVcc0 <= 5.5V - */ -#define ADC_CFG_PGA_GAIN (0) - - -#endif /* S12AD_CONFIG_H */ diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_sci_rx_config.h b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_sci_rx_config.h deleted file mode 100644 index a063eb46dba..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_config/r_sci_rx_config.h +++ /dev/null @@ -1,171 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_config.h -* Description : Configures the SCI driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 25.09.2013 1.00 Initial Release -* 17.04.2014 1.20 Added comments for new RX110 support. -* 02.07.2014 1.30 Fixed bug that caused Group12 rx errors to only be enabled for channel 2. -* 25.11.2014 1.40 Added comments for RX113 support -* 30.09.2015 1.70 Added comments for RX23T support -* 01.10.2016 1.80 Added support for RX65N (comments and TX/RX FIFO THRESHOLD options) -* 19.12.2016 1.90 Added comments for RX24U support -* 07.03.2017 2.00 Added comments for RX130-512KB support -***********************************************************************************************************************/ -#ifndef SCI_CONFIG_H -#define SCI_CONFIG_H - -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING */ -/* Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting */ -/* Setting to 1 includes parameter checking; 0 compiles out parameter checking */ -#define SCI_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY WHETHER TO INCLUDE CODE FOR DIFFERENT SCI MODES */ -/* Setting an equate to 1 includes code specific to that mode. */ -#define SCI_CFG_ASYNC_INCLUDED (1) -#define SCI_CFG_SYNC_INCLUDED (0) -#define SCI_CFG_SSPI_INCLUDED (0) - -/* SPECIFY BYTE VALUE TO TRANSMIT WHILE CLOCKING IN DATA IN SSPI MODES */ -#define SCI_CFG_DUMMY_TX_BYTE (0xFF) - -/* SPECIFY CHANNELS TO INCLUDE SOFTWARE SUPPORT FOR 1=included, 0=not */ -/* - * NOTE: If using ASYNC mode, adjust BYTEQ_CFG_MAX_CTRL_BLKS in r_byteq_config.h - * to provide 2 queues per channel (static mode only). - * * = port connector RDKRX63N, RSKRX210, RSKRX11x - * u = channel used by the USB-UART port (G1CUSB0) - * a = this channel is used only for RX130-512KB - * RX MCU supported channels - * - * CH# 110 111 113 130 210 230 231 23T 24T 24U 63N 631 64M 71M 65N - * --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- - * CH0 X Xa X* X X X* X X X X - * CH1 X X* X* Xu X X X Xu Xu Xu X X X X X - * CH2 X X X X X Xu - * CH3 X X X X X - * CH4 X X X X X - * CH5 X X X X X X Xu X X X X X X X X - * CH6 X X X X X X X X X X X X - * CH7 X X Xu Xu X - * CH8 X Xa X X X X X X X - * CH9 X Xa X X X X X X X - * CH10 X X X - * CH11 X X X X - * CH12 X X X X X X X X X X X X -*/ - -#define SCI_CFG_CH0_INCLUDED (0) -#define SCI_CFG_CH1_INCLUDED (0) -#define SCI_CFG_CH2_INCLUDED (1) -#define SCI_CFG_CH3_INCLUDED (0) -#define SCI_CFG_CH4_INCLUDED (0) -#define SCI_CFG_CH5_INCLUDED (0) -#define SCI_CFG_CH6_INCLUDED (0) -#define SCI_CFG_CH7_INCLUDED (0) -#define SCI_CFG_CH8_INCLUDED (0) -#define SCI_CFG_CH9_INCLUDED (0) -#define SCI_CFG_CH10_INCLUDED (0) -#define SCI_CFG_CH11_INCLUDED (0) -#define SCI_CFG_CH12_INCLUDED (0) - -/* SPECIFY ASYNC MODE TX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_TX_BUFSIZ (80) -#define SCI_CFG_CH1_TX_BUFSIZ (80) -#define SCI_CFG_CH2_TX_BUFSIZ (80) -#define SCI_CFG_CH3_TX_BUFSIZ (80) -#define SCI_CFG_CH4_TX_BUFSIZ (80) -#define SCI_CFG_CH5_TX_BUFSIZ (80) -#define SCI_CFG_CH6_TX_BUFSIZ (80) -#define SCI_CFG_CH7_TX_BUFSIZ (80) -#define SCI_CFG_CH8_TX_BUFSIZ (80) -#define SCI_CFG_CH9_TX_BUFSIZ (80) -#define SCI_CFG_CH10_TX_BUFSIZ (80) -#define SCI_CFG_CH11_TX_BUFSIZ (80) -#define SCI_CFG_CH12_TX_BUFSIZ (80) - -/* SPECIFY ASYNC MODE RX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_RX_BUFSIZ (80) -#define SCI_CFG_CH1_RX_BUFSIZ (80) -#define SCI_CFG_CH2_RX_BUFSIZ (80) -#define SCI_CFG_CH3_RX_BUFSIZ (80) -#define SCI_CFG_CH4_RX_BUFSIZ (80) -#define SCI_CFG_CH5_RX_BUFSIZ (80) -#define SCI_CFG_CH6_RX_BUFSIZ (80) -#define SCI_CFG_CH7_RX_BUFSIZ (80) -#define SCI_CFG_CH8_RX_BUFSIZ (80) -#define SCI_CFG_CH9_RX_BUFSIZ (80) -#define SCI_CFG_CH10_RX_BUFSIZ (80) -#define SCI_CFG_CH11_RX_BUFSIZ (80) -#define SCI_CFG_CH12_RX_BUFSIZ (80) - -/* -* ENABLE TRANSMIT END INTERRUPT (ASYNCHRONOUS) -* This interrupt only occurs when the last bit of the last byte of data -* has been sent and the transmitter has become idle. The interrupt calls -* the user's callback function specified in R_SCI_Open() and passes it an -* SCI_EVT_TEI event. A typical use of this feature is to disable an external -* transceiver to save power. It would then be up to the user's code to -* re-enable the transceiver before sending again. Not including this feature -* reduces code space used by the interrupt. Note that this equate is only -* for including the TEI code. The interrupt itself must be enabled using an -* R_SCI_Control(hdl, SCI_CMD_EN_TEI, NULL) call. -*/ -#define SCI_CFG_TEI_INCLUDED (0) /* 1=included, 0=not */ - -/* -* SET GROUP12 (RECEIVER ERROR) INTERRUPT PRIORITY; RX63N/631 ONLY -* This #define sets the priority level for the interrupt that handles -* receiver overrun, framing, and parity errors for all SCI channels -* on the RX63N/631. It is ignored for all other parts. -*/ -#define SCI_CFG_RXERR_PRIORITY (3) /* (RX63N/631 ONLY) 1 lowest, 15 highest */ - -/* -* SET GROUPBL0 (ERI, TEI) INTERRUPT PRIORITY; RX64M/RX71M/RX65N ONLY -* SET GROUPBL1, GROUPAL0 (ERI,TEI) INTERRUPT PRIORITY; RX65N ONLY -* This sets the priority level for receiver overrun, framing, and parity errors -* as well as TEI interrupts for all SCI channels. -*/ -#define SCI_CFG_ERI_TEI_PRIORITY (3) /* (RX64M/RX71M/RX65N ONLY) 1 lowest, 15 highest */ - -/* ENABLE TX/RX FIFO; (SCIi supported MCU ONLY) 1=included, 0=not */ -#define SCI_CFG_CH10_FIFO_INCLUDED (0) -#define SCI_CFG_CH11_FIFO_INCLUDED (0) - -/* SET TX FIFO THRESHOLD; (SCIi supported MCU ONLY) 0 lowest, 15 highest */ -/* TX FIFO THRESHOLD is invalid in Clock Synchronous Mode and Simple SPI Mode. */ -/* Set the same value for TX FIFO THRESHOLD and RX FIFO THRESHOLD in Clock Synchronous Mode and Simple SPI Mode. */ -#define SCI_CFG_CH10_TX_FIFO_THRESH (8) -#define SCI_CFG_CH11_TX_FIFO_THRESH (8) - -/* SET RX FIFO THRESHOLD; (SCIi supported MCU ONLY) 1 lowest, 15 highest */ -#define SCI_CFG_CH10_RX_FIFO_THRESH (8) -#define SCI_CFG_CH11_RX_FIFO_THRESH (8) - - -#endif /* SCI_CONFIG_H */ diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_pincfg/Pin.c b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_pincfg/Pin.c deleted file mode 100644 index 0e9f7cbffe5..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_pincfg/Pin.c +++ /dev/null @@ -1,111 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : Pin.c -* Version : 1.0.2 -* Device(s) : R5F565NEDxFB -* Description : This file implements SMC pin code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -/* Start user code for include. Do not edit comment generated here */ -#include "Pin.h" -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: R_Pins_Create -* Description : This function initializes Smart Configurator pins -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Pins_Create(void) -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set ET0_MDC pin */ - MPC.P72PFS.BYTE = 0x11U; - PORT7.PMR.BYTE |= 0x04U; - - /* Set ET0_MDIO pin */ - MPC.P71PFS.BYTE = 0x11U; - PORT7.PMR.BYTE |= 0x02U; - - /* Set REF50CK0 pin */ - MPC.P76PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x40U; - - /* Set RMII0_CRS_DV pin */ - MPC.P83PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x08U; - - /* Set RMII0_RXD0 pin */ - MPC.P75PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x20U; - - /* Set RMII0_RXD1 pin */ - MPC.P74PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x10U; - - /* Set RMII0_RX_ER pin */ - MPC.P77PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x80U; - - /* Set RMII0_TXD0 pin */ - MPC.P81PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x02U; - - /* Set RMII0_TXD1 pin */ - MPC.P82PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x04U; - - /* Set RMII0_TXD_EN pin */ - MPC.P80PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x01U; - - /* Set RXD2 pin */ - MPC.P52PFS.BYTE = 0x0AU; - PORT5.PMR.BYTE |= 0x04U; - - /* Set TXD2 pin */ - PORT5.PODR.BYTE |= 0x01U; - MPC.P50PFS.BYTE = 0x0AU; - PORT5.PDR.BYTE |= 0x01U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_pincfg/Pin.h b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_pincfg/Pin.h deleted file mode 100644 index 161cdbb1940..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_pincfg/Pin.h +++ /dev/null @@ -1,50 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : Pin.h -* Version : 1.0.2 -* Device(s) : R5F565NEDxFB -* Description : This file implements SMC pin code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef PIN_H -#define PIN_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Pins_Create(void); -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_pincfg/r_ether_rx_pinset.c b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_pincfg/r_ether_rx_pinset.c deleted file mode 100644 index d51e7a0f40d..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_pincfg/r_ether_rx_pinset.c +++ /dev/null @@ -1,90 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_ether_rx_pinset.c -* Version : 1.0.2 -* Device(s) : R5F565NEDxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_ether_rx_pinset.h" -#include "platform.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: R_ETHER_PinSet_ETHERC0_RMII -* Description : This function initializes pins for r_ether_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_ETHER_PinSet_ETHERC0_RMII() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set REF50CK0 pin */ - MPC.P76PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B6 = 1U; - - /* Set RMII0_TXD_EN pin */ - MPC.P80PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B0 = 1U; - - /* Set RMII0_TXD1 pin */ - MPC.P82PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B2 = 1U; - - /* Set RMII0_TXD0 pin */ - MPC.P81PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B1 = 1U; - - /* Set RMII0_RXD1 pin */ - MPC.P74PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B4 = 1U; - - /* Set RMII0_RXD0 pin */ - MPC.P75PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B5 = 1U; - - /* Set RMII0_RX_ER pin */ - MPC.P77PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B7 = 1U; - - /* Set RMII0_CRS_DV pin */ - MPC.P83PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B3 = 1U; - - /* Set ET0_MDC pin */ - MPC.P72PFS.BYTE = 0x11U; - PORT7.PMR.BIT.B2 = 1U; - - /* Set ET0_MDIO pin */ - MPC.P71PFS.BYTE = 0x11U; - PORT7.PMR.BIT.B1 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_pincfg/r_ether_rx_pinset.h b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_pincfg/r_ether_rx_pinset.h deleted file mode 100644 index 77a5cad770a..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_pincfg/r_ether_rx_pinset.h +++ /dev/null @@ -1,41 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_ether_rx_pinset.h -* Version : 1.0.2 -* Device(s) : R5F565NEDxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef R_ETHER_RX_H -#define R_ETHER_RX_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -void R_ETHER_PinSet_ETHERC0_RMII(); - -#endif diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_pincfg/r_pinset.h b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_pincfg/r_pinset.h deleted file mode 100644 index 78eb1dfbb97..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_pincfg/r_pinset.h +++ /dev/null @@ -1,35 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_pinset.h.h -* Version : 1.0.1 -* Description : Declares all pin code headers into a single file -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef R_PINSET_H -#define R_PINSET_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_sci_rx_pinset.h" -#include "r_ether_rx_pinset.h" - -#endif /* R_PINSET_H */ diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_pincfg/r_sci_rx_pinset.c b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_pincfg/r_sci_rx_pinset.c deleted file mode 100644 index 23dc663a230..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_pincfg/r_sci_rx_pinset.c +++ /dev/null @@ -1,58 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_pinset.c -* Version : 1.0.2 -* Device(s) : R5F565NEDxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_sci_rx_pinset.h" -#include "platform.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: R_SCI_PinSet_SCI2 -* Description : This function initializes pins for r_sci_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_SCI_PinSet_SCI2() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set RXD2/SMISO2 pin */ - MPC.P52PFS.BYTE = 0x0AU; - PORT5.PMR.BIT.B2 = 1U; - - /* Set TXD2/SMOSI2 pin */ - MPC.P50PFS.BYTE = 0x0AU; - PORT5.PMR.BIT.B0 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_pincfg/r_sci_rx_pinset.h b/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_pincfg/r_sci_rx_pinset.h deleted file mode 100644 index 4f018f27601..00000000000 --- a/demos/renesas/rx65n-envision-kit/ccrx-e2studio/src/smc_gen/r_pincfg/r_sci_rx_pinset.h +++ /dev/null @@ -1,41 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2019 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_pinset.h -* Version : 1.0.2 -* Device(s) : R5F565NEDxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef R_SCI_RX_H -#define R_SCI_RX_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -void R_SCI_PinSet_SCI2(); - -#endif diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.cproject b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.cproject deleted file mode 100644 index e2f4309ead4..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.cproject +++ /dev/null @@ -1,342 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.gitignore b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.gitignore deleted file mode 100644 index 11e355d8bc7..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.gitignore +++ /dev/null @@ -1,3 +0,0 @@ -/HardwareDebug/ -/.settings/ -/trash/ \ No newline at end of file diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.project b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.project deleted file mode 100644 index e585dc766a3..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.project +++ /dev/null @@ -1,542 +0,0 @@ - - - aws_demos - - - - - - org.eclipse.xtext.ui.shared.xtextBuilder - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - org.eclipse.xtext.ui.shared.xtextNature - - - - application_code - 2 - PARENT-1-PROJECT_LOC/common/application_code - - - config_files - 2 - PARENT-1-PROJECT_LOC/common/config_files - - - lib - 2 - virtual:/virtual - - - application_code/common_demos - 2 - virtual:/virtual - - - lib/aws - 2 - virtual:/virtual - - - lib/third_party - 2 - virtual:/virtual - - - src/FIT_modified_code - 2 - virtual:/virtual - - - src/amazon_freertos_common - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/amazon_freertos_common - - - application_code/common_demos/include - 2 - AWS_IOT_MCU_ROOT/demos/common/include - - - application_code/common_demos/source - 2 - virtual:/virtual - - - lib/aws/FreeRTOS - 2 - AWS_IOT_MCU_ROOT/lib/FreeRTOS - - - lib/aws/FreeRTOS-Plus-TCP - 2 - AWS_IOT_MCU_ROOT/lib/FreeRTOS-Plus-TCP - - - lib/aws/bufferpool - 2 - AWS_IOT_MCU_ROOT/lib/bufferpool - - - lib/aws/crypto - 2 - AWS_IOT_MCU_ROOT/lib/crypto - - - lib/aws/greengrass - 2 - AWS_IOT_MCU_ROOT/lib/greengrass - - - lib/aws/include - 2 - AWS_IOT_MCU_ROOT/lib/include - - - lib/aws/mqtt - 2 - AWS_IOT_MCU_ROOT/lib/mqtt - - - lib/aws/pkcs11 - 2 - AWS_IOT_MCU_ROOT/lib/pkcs11/portable/renesas/rx65n-envision-kit - - - lib/aws/secure_sockets - 2 - AWS_IOT_MCU_ROOT/lib/secure_sockets/portable/renesas/rx65n-envision-kit - - - lib/aws/shadow - 2 - AWS_IOT_MCU_ROOT/lib/shadow - - - lib/aws/tls - 2 - AWS_IOT_MCU_ROOT/lib/tls - - - lib/aws/utils - 2 - AWS_IOT_MCU_ROOT/lib/utils - - - lib/aws/wifi - 2 - AWS_IOT_MCU_ROOT/lib/wifi/portable/renesas/rx65n-envision-kit - - - lib/third_party/jsmn - 2 - AWS_IOT_MCU_ROOT/lib/third_party/jsmn - - - lib/third_party/mbedtls - 2 - virtual:/virtual - - - lib/third_party/mcu_vendor - 2 - virtual:/virtual - - - lib/third_party/pkcs11 - 2 - AWS_IOT_MCU_ROOT/lib/third_party/pkcs11 - - - lib/third_party/tinycbor - 2 - AWS_IOT_MCU_ROOT/lib/third_party/tinycbor - - - src/FIT_modified_code/Please exclude unnecessary r_xxx from build - 1 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/.files/Please%20exclude%20unnecessary%20r_xxx%20from%20build - - - src/FIT_modified_code/attention!.txt - 1 - PROJECT_LOC/src/attention!.txt - - - src/FIT_modified_code/r_bsp - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_bsp - - - src/FIT_modified_code/r_byteq - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_byteq - - - src/FIT_modified_code/r_cmt_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_cmt_rx - - - src/FIT_modified_code/r_ether_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_ether_rx - - - src/FIT_modified_code/r_flash_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_flash_rx - - - src/FIT_modified_code/r_riic_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_riic_rx - - - src/FIT_modified_code/r_s12ad_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_s12ad_rx - - - src/FIT_modified_code/r_sci_iic_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_iic_rx - - - src/FIT_modified_code/r_sci_rx - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_rx - - - application_code/common_demos/include/aws_application_version.h - 1 - AWS_IOT_MCU_ROOT/demos/common/include/aws_application_version.h - - - application_code/common_demos/include/aws_clientcredential_keys.h - 1 - AWS_IOT_MCU_ROOT/demos/common/include/aws_clientcredential_keys.h - - - application_code/common_demos/include/aws_dev_mode_key_provisioning.h - 1 - AWS_IOT_MCU_ROOT/demos/common/include/aws_dev_mode_key_provisioning.h - - - application_code/common_demos/source/aws_demo_runner.c - 1 - AWS_IOT_MCU_ROOT/demos/common/demo_runner/aws_demo_runner.c - - - application_code/common_demos/source/aws_dev_mode_key_provisioning.c - 1 - AWS_IOT_MCU_ROOT/demos/common/devmode_key_provisioning/aws_dev_mode_key_provisioning.c - - - application_code/common_demos/source/aws_greengrass_discovery_demo.c - 1 - AWS_IOT_MCU_ROOT/demos/common/greengrass_connectivity/aws_greengrass_discovery_demo.c - - - application_code/common_demos/source/aws_hello_world.c - 1 - AWS_IOT_MCU_ROOT/demos/common/mqtt/aws_hello_world.c - - - application_code/common_demos/source/aws_logging_task_dynamic_buffers.c - 1 - AWS_IOT_MCU_ROOT/demos/common/logging/aws_logging_task_dynamic_buffers.c - - - application_code/common_demos/source/aws_shadow_lightbulb_on_off.c - 1 - AWS_IOT_MCU_ROOT/demos/common/shadow/aws_shadow_lightbulb_on_off.c - - - application_code/common_demos/source/aws_subscribe_publish_loop.c - 1 - AWS_IOT_MCU_ROOT/demos/common/mqtt/aws_subscribe_publish_loop.c - - - application_code/common_demos/source/aws_tcp_echo_client_separate_tasks.c - 1 - AWS_IOT_MCU_ROOT/demos/common/tcp/aws_tcp_echo_client_separate_tasks.c - - - application_code/common_demos/source/aws_tcp_echo_client_single_task.c - 1 - AWS_IOT_MCU_ROOT/demos/common/tcp/aws_tcp_echo_client_single_task.c - - - lib/aws/pkcs11/aws_pkcs11_mbedtls.c - 1 - AWS_IOT_MCU_ROOT/lib/pkcs11/mbedtls/aws_pkcs11_mbedtls.c - - - lib/third_party/mbedtls/include - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mbedtls/include - - - lib/third_party/mbedtls/source - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mbedtls/library - - - lib/third_party/mcu_vendor/renesas - 2 - AWS_IOT_MCU_ROOT/lib/third_party/mcu_vendor/renesas - - - - - 1545522925150 - - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-aws_demos_build_path_check_and_make.bat - - - - 1545522925155 - - 10 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false- - - - - 1537786054362 - src - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-attention!.txt - - - - 1536904742727 - src/amazon_freertos_common/compiler_support - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-gnuc - - - - 1536927312156 - src/amazon_freertos_common/network_support - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-onchip_rx_ether - - - - 1513514756448 - lib/aws/FreeRTOS/portable - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-GCC - - - - 1513514757749 - lib/aws/FreeRTOS/portable - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-MemMang - - - - 1513514757807 - lib/aws/FreeRTOS/portable - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-* - - - - 1509693556349 - lib/aws/include/private - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-*.c - - - - 1536905062046 - lib/third_party/mcu_vendor/renesas - 10 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-tools - - - - 1536291011837 - src/FIT_modified_code/r_bsp/board - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-true-all|rx65n|generic_rx65n - - - - 1536291077902 - src/FIT_modified_code/r_bsp/mcu - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-true-all|rx65n - - - - 1513515128489 - lib/aws/FreeRTOS/portable/GCC - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-RX600v2 - - - - 1513514967899 - lib/aws/FreeRTOS/portable/MemMang - 5 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-heap_4.c - - - - 1539520892012 - src/FIT_modified_code/r_bsp/board/all - 6 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-true-iar_call_inits\.s - - - - 1564441882426 - src/FIT_modified_code/r_ether_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx65n - - - - 1564441856894 - src/FIT_modified_code/r_flash_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx65n - - - - 1535360922766 - src/FIT_modified_code/r_riic_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx65n - - - - 1545522862717 - src/FIT_modified_code/r_s12ad_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx65x - - - - 1535360980389 - src/FIT_modified_code/r_sci_iic_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx65n - - - - 1564441820170 - src/FIT_modified_code/r_sci_rx/src/targets - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-rx65n - - - - 1515504232772 - lib/aws/FreeRTOS-Plus-TCP/source/portable/BufferManagement - 5 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-BufferAllocation_2.c - - - - 1515504311064 - lib/aws/FreeRTOS-Plus-TCP/source/portable/Compiler - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-GCC - - - - 1515491646756 - lib/aws/FreeRTOS-Plus-TCP/source/portable/NetworkInterface - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-RX - - - - 1537708651935 - src/FIT_modified_code/r_bsp/mcu/rx65n/register_access - 9 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-gnuc - - - - - - AWS_IOT_MCU_ROOT - $%7BPARENT-4-PROJECT_LOC%7D - - - diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.settings/CodeGenerator/cgprojectDatas.datas b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.settings/CodeGenerator/cgprojectDatas.datas deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.settings/com.renesas.smc.e2studio.qe.xml b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.settings/com.renesas.smc.e2studio.qe.xml deleted file mode 100644 index 69dea7c6c33..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.settings/com.renesas.smc.e2studio.qe.xml +++ /dev/null @@ -1,42 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.settings/e2studio_project.prefs b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.settings/e2studio_project.prefs deleted file mode 100644 index 6130f27ff4c..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.settings/e2studio_project.prefs +++ /dev/null @@ -1,2 +0,0 @@ -# -#Fri Aug 10 22:39:30 JST 2018 diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.settings/fittemp/r_ether_rx.ftl b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.settings/fittemp/r_ether_rx.ftl deleted file mode 100644 index 2bb8ed85d3b..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.settings/fittemp/r_ether_rx.ftl +++ /dev/null @@ -1,45 +0,0 @@ -<#-- - Copyright(C) 2015 Renesas Electronics Corporation - RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY - This program must be used solely for the purpose for which it was furnished - by Renesas Electronics Corporation. No part of this program may be reproduced - or disclosed to others, in any form, without the prior written permission of - Renesas Electronics Corporation. ---> -<#-- = DECLARE FUNCTION INFORMATION HERE =================== --> -<#assign Function_Base_Name = "R_ETHER_PinSet"> -<#assign Function_Description = "This function initializes pins for r_ether_rx module"> -<#assign Function_Arg = "none"> -<#assign Function_Ret = "none"> -<#assign Version = 1.00> - -<#-- = DECLARE FUNCTION CONTENT HERE ======================= --> -<#macro initialsection postfix> -<#assign Function_Name = "${Function_Base_Name}${postfix}"> -<#include "lib/functionheader.ftl"> -void ${Function_Name}() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - -<#macro peripheralpincode pin> - - -<#macro channelpincode pin> - - /* Set ${pin.pinName} pin */ - MPC.${pin.assignedPinName}PFS.BYTE = 0x${pin.pinMPC}U; - PORT${pin.portNum}.PMR.BIT.B${pin.pinBitNum} = 1U; - - -<#macro endsection> - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - - -<#macro headerfilesection postfix> -void ${Function_Base_Name}${postfix}(); - - -<#-- = END OF FILE ========================================= --> \ No newline at end of file diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.settings/fittemp/r_sci_rx.ftl b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.settings/fittemp/r_sci_rx.ftl deleted file mode 100644 index a505f3edde7..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.settings/fittemp/r_sci_rx.ftl +++ /dev/null @@ -1,85 +0,0 @@ -<#-- - Copyright(C) 2015 Renesas Electronics Corporation - RENESAS ELECTRONICS CONFIDENTIAL AND PROPRIETARY - This program must be used solely for the purpose for which it was furnished - by Renesas Electronics Corporation. No part of this program may be reproduced - or disclosed to others, in any form, without the prior written permission of - Renesas Electronics Corporation. ---> -<#-- = DECLARE FUNCTION INFORMATION HERE =================== --> -<#-- - (Step 1) Explanation: These variables are necessary information for the function header. - Please fill up or leave blank, but do not delete ---> -<#assign Function_Base_Name = "R_SCI_PinSet"> -<#assign Function_Description = "This function initializes pins for r_sci_rx module"> -<#assign Function_Arg = "none"> -<#assign Function_Ret = "none"> -<#assign Version = 1.00> - -<#-- = DECLARE FUNCTION CONTENT HERE ======================= --> -<#-- - (Step 2) Explanation: Function content. - - Macro [initialsection] : - Any text that goes into this section will be printed out 1 time per function - input [postfix] :Use this variable to add the channel number to the function base name. ---> -<#macro initialsection postfix> -<#assign Function_Name = "${Function_Base_Name}${postfix}"> -<#include "lib/functionheader.ftl"> -void ${Function_Name}() -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - -<#-- - (Step 3) Explanation: Function content. - - Macro [peripheralpincode] : Any text that goes into this section will be printed out 1 time per peripheral - - input [pin] : Available info includes: - pin.pinName :The name of pin, eg “SSLA0†- pin.assignedPinName :The pin assigned to, eg “P32†- pin.pinMPC :The port number of assigned pin, eg “P32†has portNume = “3†- pin.portNum :The bit number of the assigned pin, eg “P32†has pinBitNum = “2†- pin.pinBitNum :The value of MPC ---> -<#macro peripheralpincode pin> - - -<#-- - (Step 4) Explanation: Function content. - - Macro [channelpincode] : Any text that goes into this section will be printed out 1 time per channel - - input [pin] : Same as above ---> -<#macro channelpincode pin> - - /* Set ${pin.pinName} pin */ - MPC.${pin.assignedPinName}PFS.BYTE = 0x${pin.pinMPC}U; - PORT${pin.portNum}.PMR.BIT.B${pin.pinBitNum} = 1U; - - -<#macro channelpincodeextra pin postfix> - - -<#-- - (Step 5) Explanation: Function content. - - Macro [endsection] : Any text that goes into this section will be printed out 1 time last ---> -<#macro endsection> - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - - -<#-- - (Step 6) Explanation: Header file content - - Macro [headerfilesection] : Any text that goes into this section will be printed out 1 time in the header file - - input [postfix] :Use this variable to add the channel number to the function base name. ---> -<#macro headerfilesection postfix> -void ${Function_Base_Name}${postfix}(); - - -<#macro headerfilesectionExtra postfix> - - -<#-- = END OF FILE ========================================= --> \ No newline at end of file diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.settings/language.settings.xml b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.settings/language.settings.xml deleted file mode 100644 index d9903cb6208..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.settings/language.settings.xml +++ /dev/null @@ -1,21 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.settings/org.eclipse.cdt.managedbuilder.core.prefs b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.settings/org.eclipse.cdt.managedbuilder.core.prefs deleted file mode 100644 index 817b60cba1c..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/.settings/org.eclipse.cdt.managedbuilder.core.prefs +++ /dev/null @@ -1,9 +0,0 @@ -eclipse.preferences.version=1 -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/CPATH/delimiter=; -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/CPATH/operation=remove -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/C_INCLUDE_PATH/delimiter=; -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/C_INCLUDE_PATH/operation=remove -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/LIBRARY_PATH/delimiter=; -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/LIBRARY_PATH/operation=remove -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/append=true -environment/buildEnvironmentInclude/com.renesas.cdt.managedbuild.gcc.rx.configuration.debug.365004355/appendContributed=true diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/aws_demos.scfg b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/aws_demos.scfg deleted file mode 100644 index 699ebaeac82..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/aws_demos.scfg +++ /dev/null @@ -1,501 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/aws_demos_build_path_check_and_make.bat b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/aws_demos_build_path_check_and_make.bat deleted file mode 100644 index 047f6e34780..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/aws_demos_build_path_check_and_make.bat +++ /dev/null @@ -1,11 +0,0 @@ -@echo off -rem ################################################################################ -rem # This batch file executes some preprocess for build and then executes the make -rem ################################################################################ - -if not exist "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" ( - echo ERROR: Unable to find "%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" - exit 2 -) - -"%~dp0..\..\..\..\lib\third_party\mcu_vendor\renesas\tools\aws_demos_build_path_check_and_make.bat" %* diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/rx65n_envision_kit_aws HardwareDebug.launch b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/rx65n_envision_kit_aws HardwareDebug.launch deleted file mode 100644 index 647a729e3bf..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/rx65n_envision_kit_aws HardwareDebug.launch +++ /dev/null @@ -1,155 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_config/r_byteq_config.h b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_config/r_byteq_config.h deleted file mode 100644 index 0b4d4f9bb52..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_config/r_byteq_config.h +++ /dev/null @@ -1,59 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_byteq_config.h -* Description : Configures the byte queue memory allocation -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 24.07.2013 1.00 Initial Release -* : 11.21.2014 1.20 Removed dependency to BSP -* : 30.09.2015 1.50 Added dependency to BSP -***********************************************************************************************************************/ -#ifndef BYTEQ_CONFIG_H -#define BYTEQ_CONFIG_H - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - Available settings: - BSP_CFG_PARAM_CHECKING_ENABLE: - Utilizes the system default setting - 1: - Includes parameter checking - 0: - Compiles out parameter checking -*/ -#define BYTEQ_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY IF SHOULD USE MALLOC() TO ALLOCATE MEMORY FOR QUEUE CONTROL BLOCKS */ -#define BYTEQ_CFG_USE_HEAP_FOR_CTRL_BLKS (0) - -/* SPECIFY NUMBER OF STATIC QUEUE CONTROL BLOCKS TO SUPPORT */ -/* valid only when BYTEQ_USE_HEAP_FOR_CTRL_BLKS is set to 0 */ -#define BYTEQ_CFG_MAX_CTRL_BLKS (4) - - -#endif /* BYTEQ_CONFIG_H */ diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_config/r_cmt_rx_config.h b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_config/r_cmt_rx_config.h deleted file mode 100644 index bfb0bc72d76..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_config/r_cmt_rx_config.h +++ /dev/null @@ -1,37 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_cmt_rx_config.h -* Description : Configures the r_cmt_rx code. -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 06.11.2013 2.00 First GSCE Release. -***********************************************************************************************************************/ -#ifndef CMT_CONFIG_HEADER_FILE -#define CMT_CONFIG_HEADER_FILE - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ -/* The interrupt priority level to be used for CMT interrupts. */ -#define CMT_RX_CFG_IPR (5) - -#endif /* CMT_CONFIG_HEADER_FILE */ - - diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_config/r_ether_rx_config.h b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_config/r_ether_rx_config.h deleted file mode 100644 index ea6b31eee73..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_config/r_ether_rx_config.h +++ /dev/null @@ -1,119 +0,0 @@ -/* Generated configuration header file - do not edit */ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_ether_rx_config.h - * Version : 1.04 - * Description : Ethernet module device driver - ***********************************************************************************************************************/ -/********************************************************************************************************************** - * History : DD.MM.YYYY Version Description - * : 22.07.2014 1.00 First Release - * : 31.03.2016 1.01 Added changes for RX63N. - * : 01.10.2016 1.02 Added changes for RX65N. - * : 01.10.2017 1.03 Added changes for RX65N-2MB. - * : 08.01.2018 1.04 Changed comment. - ***********************************************************************************************************************/ - -/* Guards against multiple inclusion */ -#ifndef R_ETHER_RX_CONFIG_H - #define R_ETHER_RX_CONFIG_H - -/*********************************************************************************************************************** - Macro definitions - ***********************************************************************************************************************/ - -/* Ethernet interface select. - 0 = MII (Media Independent Interface) - 1 = RMII (Reduced Media Independent Interface) - */ - #define ETHER_CFG_MODE_SEL (1) - -/* PHY-LSI address setting for ETHER0/1. - Please set the value 31 ETHER_CFG_CH0_PHY_ADDRESS when use default setting of the RSK+RX63N. - Please set the value 30 ETHER_CFG_CH0_PHY_ADDRESS when use default setting of the RSK+RX65N/RSK+RX65N_2MB. - Please set the value 0 ETHER_CFG_CH0_PHY_ADDRESS and value 1 ETHER_CFG_CH1_PHY_ADDRESS when use default setting of the RSK+RX64M/RSK+RX71M. - */ - #define ETHER_CFG_CH0_PHY_ADDRESS (0) /* Please define the PHY-LSI address in the range of 0-31. */ - #define ETHER_CFG_CH1_PHY_ADDRESS (1) /* Please define the PHY-LSI address in the range of 0-31. */ - -/* The number of Rx descriptors. */ - #define ETHER_CFG_EMAC_RX_DESCRIPTORS (1) - -/* The number of Tx descriptors. */ - #define ETHER_CFG_EMAC_TX_DESCRIPTORS (1) - -/* Please define the size of the sending and receiving buffer in the value where one frame can surely be stored - because the driver is single-frame/single-buffer processing. */ - #define ETHER_CFG_BUFSIZE (1536) /* Must be 32-byte aligned */ - -/* EINT interrupt priority level. This definition is not used when EINT interrupt is assigned to Group interrupt. */ - #define ETHER_CFG_EINT_INT_PRIORITY (2) /* Please define the interruption level within the range of 1-15. */ - -/* Group AL1 interrupt priority level. This definition is not used when EINT interrupt is assigned to Peripheral - interrupt. */ - #define ETHER_CFG_AL1_INT_PRIORTY (2) /* Please define the interruption level within the range of 1-15. */ - -/* The register bus of PHY0/1 for ETHER0/1 select - 0 = The access of the register of PHY uses ETHER0. - 1 = The access of the register of PHY uses ETHER1. - - Please set the value 0 ETHER_CFG_CH0_PHY_ACCESS when use default setting of the RSK+RX63N. - Please set the value 0 ETHER_CFG_CH0_PHY_ACCESS when use default setting of the RSK+RX65N/RSK+RX65N_2MB. - Please set the value 1 ETHER_CFG_CH0_PHY_ACCESS and ETHER_CFG_CH1_PHY_ACCESS when use default setting of the RSK+RX64M/RSK+RX71M. - */ - #define ETHER_CFG_CH0_PHY_ACCESS (0) - #define ETHER_CFG_CH1_PHY_ACCESS (1) - -/* Define the access timing of MII/RMII register */ - #define ETHER_CFG_PHY_MII_WAIT (8) /* Plese define the value of 1 or more */ - -/* Define the waiting time for reset completion of PHY-LSI */ - #define ETHER_CFG_PHY_DELAY_RESET (0x00020000L) - -/** - * Link status read from LMON bit of ETHERC PSR register. The state is hardware dependent. - */ - #define ETHER_CFG_LINK_PRESENT (0) - -/* Use LINKSTA signal for detect link status changes - 0 = unused (use PHY-LSI status register) - 1 = use (use LINKSTA signal) - */ - #define ETHER_CFG_USE_LINKSTA (0) /* This setting is reflected in all channels */ - -/* Definition of whether or not to use KSZ8041NL of the Micrel Inc. - 0 = unused - 1 = use - */ - #define ETHER_CFG_USE_PHY_KSZ8041NL (0) - -/*********************************************************************************************************************** - Typedef definitions - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global variables - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global functions (to be accessed by other files) - ***********************************************************************************************************************/ - -#endif /* R_ETHER_RX_CONFIG_H */ diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_config/r_flash_rx_config.h b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_config/r_flash_rx_config.h deleted file mode 100644 index fbf916a0e97..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_config/r_flash_rx_config.h +++ /dev/null @@ -1,116 +0,0 @@ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_flash_rx_config_reference.h - * Description : Configures the FLASH API module for RX200 and RX600 Series MCU's. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* 12.04.2014 1.00 First Release -* 22.12.2014 1.10 Added flash type usage comments. -* 25.06.2015 1.20 Added FLASH_CFG_CODE_FLASH_RUN_FROM_ROM. -* : 12.10.2016 2.00 Modified for BSPless operation (added FLASH_CFG_USE_FIT_BSP). -***********************************************************************************************************************/ -#ifndef FLASH_CONFIG_HEADER_FILE -#define FLASH_CONFIG_HEADER_FILE - -/* Set the following value to 0 when building without using the FIT BSP Module */ -#define FLASH_CFG_USE_FIT_BSP (1) - - -/*********************************************************************************************************************** - Configuration Options - ***********************************************************************************************************************/ -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting - * Setting to 1 includes parameter checking; 0 compiles out parameter checking - */ -#define FLASH_CFG_PARAM_CHECKING_ENABLE (1) - - -/****************************************************************************** - ENABLE CODE FLASH PROGRAMMING -******************************************************************************/ -/* If you are only using data flash, set this to 0. - * Setting to 1 includes code to program the ROM area. When programming ROM, - * code must be executed from RAM, except under certain restrictions for flash - * type 3 (see section 2.14 in App Note). See section 2.13 in the App Note for - * details on how to set up code and the linker to execute code from RAM. - */ -#define FLASH_CFG_CODE_FLASH_ENABLE (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING DATA FLASH OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces data flash API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, data flash operations return immediately after the operation has been - * started. Notification of the operation completion is done via the callback - * function. - */ -#define FLASH_CFG_DATA_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING CODE FLASH (ROM) OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces ROM API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, ROM operations return immediately after the operation has been started. - * Notification of the operation completion is done via the callback function. - * When reprogramming ROM, THE RELOCATABLE VECTOR TABLE AND CORRESPONDING - * INTERRUPT ROUTINES MUST BE IN RAM. - * See sections 2.16 Usage Notes in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE CODE FLASH SELF-PROGRAMMING -******************************************************************************/ -/* Set this to 0 when programming code flash while executing in RAM. - * Set this to 1 when programming code flash while executing from another - * segment in ROM (possible only with RX64M, RX71M, RX65N-2 groups). - * See section 2.14 in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_RUN_FROM_ROM (0) - - -/****************************************************************************** - SET IPL OF FLASH READY INTERRUPT -******************************************************************************/ -#define FLASH_CFG_FLASH_READY_IPL (5) // Flash type 2 only - - -/****************************************************************************** - ENABLE OR DISABLE LOCK BIT PROTECTION -******************************************************************************/ -/* Each erasure block has a corresponding lock bit that can be used to - * protect that block from being programmed/erased after the lock bit is - * set. The use of lock bits can be used or ignored. - * Setting this to 1 will cause lock bits to be ignored and programs/erases to a - * block will not be limited. - * Setting this to 0 will cause lock bits to be used as the user configures through - * the Control command. This only applies to ROM as the DF does not have lock bits. - */ -#define FLASH_CFG_IGNORE_LOCK_BITS (1) // Flash type 2 only - - -#endif /* FLASH_CONFIG_HEADER_FILE */ diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_config/r_s12ad_rx_config.h b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_config/r_s12ad_rx_config.h deleted file mode 100644 index 0202bf133a4..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_config/r_s12ad_rx_config.h +++ /dev/null @@ -1,53 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_s12ad_rx_config.h -* Description : Configures the 12-bit A/D driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 22.07.2013 1.00 Initial Release. -* 21.04.2014 1.20 Updated for RX210 advanced features; RX110/63x support. -***********************************************************************************************************************/ -#ifndef S12AD_CONFIG_H -#define S12AD_CONFIG_H - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* - * SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting. - * Setting to 1 includes parameter checking; 0 compiles out parameter checking. - */ -#define ADC_CFG_PARAM_CHECKING_ENABLE BSP_CFG_PARAM_CHECKING_ENABLE - - -/* - * RX210 Series only; Temperature Sensor Programmable Gain Amplifier (PGA) - * SELECT PGA GAIN TO MATCH AVCC0 VOLTAGE RANGE: - * 0: 1.8V <= AVcc0 < 2.7V; default; good for all actual voltages - * 1: 2.7V <= AVcc0 < 3.6V - * 2: 3.6V <= AVcc0 < 4.5V - * 3: 4.5V <= AVcc0 <= 5.5V - */ -#define ADC_CFG_PGA_GAIN (0) - - -#endif /* S12AD_CONFIG_H */ diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_config/r_sci_rx_config.h b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_config/r_sci_rx_config.h deleted file mode 100644 index a063eb46dba..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_config/r_sci_rx_config.h +++ /dev/null @@ -1,171 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_config.h -* Description : Configures the SCI driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 25.09.2013 1.00 Initial Release -* 17.04.2014 1.20 Added comments for new RX110 support. -* 02.07.2014 1.30 Fixed bug that caused Group12 rx errors to only be enabled for channel 2. -* 25.11.2014 1.40 Added comments for RX113 support -* 30.09.2015 1.70 Added comments for RX23T support -* 01.10.2016 1.80 Added support for RX65N (comments and TX/RX FIFO THRESHOLD options) -* 19.12.2016 1.90 Added comments for RX24U support -* 07.03.2017 2.00 Added comments for RX130-512KB support -***********************************************************************************************************************/ -#ifndef SCI_CONFIG_H -#define SCI_CONFIG_H - -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING */ -/* Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting */ -/* Setting to 1 includes parameter checking; 0 compiles out parameter checking */ -#define SCI_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY WHETHER TO INCLUDE CODE FOR DIFFERENT SCI MODES */ -/* Setting an equate to 1 includes code specific to that mode. */ -#define SCI_CFG_ASYNC_INCLUDED (1) -#define SCI_CFG_SYNC_INCLUDED (0) -#define SCI_CFG_SSPI_INCLUDED (0) - -/* SPECIFY BYTE VALUE TO TRANSMIT WHILE CLOCKING IN DATA IN SSPI MODES */ -#define SCI_CFG_DUMMY_TX_BYTE (0xFF) - -/* SPECIFY CHANNELS TO INCLUDE SOFTWARE SUPPORT FOR 1=included, 0=not */ -/* - * NOTE: If using ASYNC mode, adjust BYTEQ_CFG_MAX_CTRL_BLKS in r_byteq_config.h - * to provide 2 queues per channel (static mode only). - * * = port connector RDKRX63N, RSKRX210, RSKRX11x - * u = channel used by the USB-UART port (G1CUSB0) - * a = this channel is used only for RX130-512KB - * RX MCU supported channels - * - * CH# 110 111 113 130 210 230 231 23T 24T 24U 63N 631 64M 71M 65N - * --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- - * CH0 X Xa X* X X X* X X X X - * CH1 X X* X* Xu X X X Xu Xu Xu X X X X X - * CH2 X X X X X Xu - * CH3 X X X X X - * CH4 X X X X X - * CH5 X X X X X X Xu X X X X X X X X - * CH6 X X X X X X X X X X X X - * CH7 X X Xu Xu X - * CH8 X Xa X X X X X X X - * CH9 X Xa X X X X X X X - * CH10 X X X - * CH11 X X X X - * CH12 X X X X X X X X X X X X -*/ - -#define SCI_CFG_CH0_INCLUDED (0) -#define SCI_CFG_CH1_INCLUDED (0) -#define SCI_CFG_CH2_INCLUDED (1) -#define SCI_CFG_CH3_INCLUDED (0) -#define SCI_CFG_CH4_INCLUDED (0) -#define SCI_CFG_CH5_INCLUDED (0) -#define SCI_CFG_CH6_INCLUDED (0) -#define SCI_CFG_CH7_INCLUDED (0) -#define SCI_CFG_CH8_INCLUDED (0) -#define SCI_CFG_CH9_INCLUDED (0) -#define SCI_CFG_CH10_INCLUDED (0) -#define SCI_CFG_CH11_INCLUDED (0) -#define SCI_CFG_CH12_INCLUDED (0) - -/* SPECIFY ASYNC MODE TX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_TX_BUFSIZ (80) -#define SCI_CFG_CH1_TX_BUFSIZ (80) -#define SCI_CFG_CH2_TX_BUFSIZ (80) -#define SCI_CFG_CH3_TX_BUFSIZ (80) -#define SCI_CFG_CH4_TX_BUFSIZ (80) -#define SCI_CFG_CH5_TX_BUFSIZ (80) -#define SCI_CFG_CH6_TX_BUFSIZ (80) -#define SCI_CFG_CH7_TX_BUFSIZ (80) -#define SCI_CFG_CH8_TX_BUFSIZ (80) -#define SCI_CFG_CH9_TX_BUFSIZ (80) -#define SCI_CFG_CH10_TX_BUFSIZ (80) -#define SCI_CFG_CH11_TX_BUFSIZ (80) -#define SCI_CFG_CH12_TX_BUFSIZ (80) - -/* SPECIFY ASYNC MODE RX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_RX_BUFSIZ (80) -#define SCI_CFG_CH1_RX_BUFSIZ (80) -#define SCI_CFG_CH2_RX_BUFSIZ (80) -#define SCI_CFG_CH3_RX_BUFSIZ (80) -#define SCI_CFG_CH4_RX_BUFSIZ (80) -#define SCI_CFG_CH5_RX_BUFSIZ (80) -#define SCI_CFG_CH6_RX_BUFSIZ (80) -#define SCI_CFG_CH7_RX_BUFSIZ (80) -#define SCI_CFG_CH8_RX_BUFSIZ (80) -#define SCI_CFG_CH9_RX_BUFSIZ (80) -#define SCI_CFG_CH10_RX_BUFSIZ (80) -#define SCI_CFG_CH11_RX_BUFSIZ (80) -#define SCI_CFG_CH12_RX_BUFSIZ (80) - -/* -* ENABLE TRANSMIT END INTERRUPT (ASYNCHRONOUS) -* This interrupt only occurs when the last bit of the last byte of data -* has been sent and the transmitter has become idle. The interrupt calls -* the user's callback function specified in R_SCI_Open() and passes it an -* SCI_EVT_TEI event. A typical use of this feature is to disable an external -* transceiver to save power. It would then be up to the user's code to -* re-enable the transceiver before sending again. Not including this feature -* reduces code space used by the interrupt. Note that this equate is only -* for including the TEI code. The interrupt itself must be enabled using an -* R_SCI_Control(hdl, SCI_CMD_EN_TEI, NULL) call. -*/ -#define SCI_CFG_TEI_INCLUDED (0) /* 1=included, 0=not */ - -/* -* SET GROUP12 (RECEIVER ERROR) INTERRUPT PRIORITY; RX63N/631 ONLY -* This #define sets the priority level for the interrupt that handles -* receiver overrun, framing, and parity errors for all SCI channels -* on the RX63N/631. It is ignored for all other parts. -*/ -#define SCI_CFG_RXERR_PRIORITY (3) /* (RX63N/631 ONLY) 1 lowest, 15 highest */ - -/* -* SET GROUPBL0 (ERI, TEI) INTERRUPT PRIORITY; RX64M/RX71M/RX65N ONLY -* SET GROUPBL1, GROUPAL0 (ERI,TEI) INTERRUPT PRIORITY; RX65N ONLY -* This sets the priority level for receiver overrun, framing, and parity errors -* as well as TEI interrupts for all SCI channels. -*/ -#define SCI_CFG_ERI_TEI_PRIORITY (3) /* (RX64M/RX71M/RX65N ONLY) 1 lowest, 15 highest */ - -/* ENABLE TX/RX FIFO; (SCIi supported MCU ONLY) 1=included, 0=not */ -#define SCI_CFG_CH10_FIFO_INCLUDED (0) -#define SCI_CFG_CH11_FIFO_INCLUDED (0) - -/* SET TX FIFO THRESHOLD; (SCIi supported MCU ONLY) 0 lowest, 15 highest */ -/* TX FIFO THRESHOLD is invalid in Clock Synchronous Mode and Simple SPI Mode. */ -/* Set the same value for TX FIFO THRESHOLD and RX FIFO THRESHOLD in Clock Synchronous Mode and Simple SPI Mode. */ -#define SCI_CFG_CH10_TX_FIFO_THRESH (8) -#define SCI_CFG_CH11_TX_FIFO_THRESH (8) - -/* SET RX FIFO THRESHOLD; (SCIi supported MCU ONLY) 1 lowest, 15 highest */ -#define SCI_CFG_CH10_RX_FIFO_THRESH (8) -#define SCI_CFG_CH11_RX_FIFO_THRESH (8) - - -#endif /* SCI_CONFIG_H */ diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_ether_rx_pinset.c b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_ether_rx_pinset.c deleted file mode 100644 index 43569afd97a..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_ether_rx_pinset.c +++ /dev/null @@ -1,90 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_ether_rx_pinset.c -* Version : 1.0.2 -* Device(s) : R5F565NEDxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2018-07-22 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_ether_rx_pinset.h" -#include "platform.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: R_ETHER_PinSet_ETHERC0_RMII -* Description : This function initializes pins for r_ether_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_ETHER_PinSet_ETHERC0_RMII(void) -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set REF50CK0 pin */ - MPC.P76PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B6 = 1U; - - /* Set RMII0_TXD_EN pin */ - MPC.P80PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B0 = 1U; - - /* Set RMII0_TXD1 pin */ - MPC.P82PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B2 = 1U; - - /* Set RMII0_TXD0 pin */ - MPC.P81PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B1 = 1U; - - /* Set RMII0_RXD1 pin */ - MPC.P74PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B4 = 1U; - - /* Set RMII0_RXD0 pin */ - MPC.P75PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B5 = 1U; - - /* Set RMII0_RX_ER pin */ - MPC.P77PFS.BYTE = 0x12U; - PORT7.PMR.BIT.B7 = 1U; - - /* Set RMII0_CRS_DV pin */ - MPC.P83PFS.BYTE = 0x12U; - PORT8.PMR.BIT.B3 = 1U; - - /* Set ET0_MDC pin */ - MPC.P72PFS.BYTE = 0x11U; - PORT7.PMR.BIT.B2 = 1U; - - /* Set ET0_MDIO pin */ - MPC.P71PFS.BYTE = 0x11U; - PORT7.PMR.BIT.B1 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_ether_rx_pinset.h b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_ether_rx_pinset.h deleted file mode 100644 index e43fb0cb39a..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_ether_rx_pinset.h +++ /dev/null @@ -1,41 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_ether_rx_pinset.h -* Version : 1.0.2 -* Device(s) : R5F565NEDxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2018-07-22 -***********************************************************************************************************************/ - -#ifndef R_ETHER_RX_H -#define R_ETHER_RX_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -void R_ETHER_PinSet_ETHERC0_RMII(void); - -#endif diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_pinset.h b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_pinset.h deleted file mode 100644 index 31f74f3ef15..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_pinset.h +++ /dev/null @@ -1,35 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_pinset.h.h -* Version : 1.0.1 -* Description : Declares all pin code headers into a single file -* Creation Date: 2018-07-22 -***********************************************************************************************************************/ - -#ifndef R_PINSET_H -#define R_PINSET_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_sci_rx_pinset.h" -#include "r_ether_rx_pinset.h" - -#endif /* R_PINSET_H */ diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_sci_rx_pinset.c b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_sci_rx_pinset.c deleted file mode 100644 index 3a77594d9b2..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_sci_rx_pinset.c +++ /dev/null @@ -1,58 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_pinset.c -* Version : 1.0.2 -* Device(s) : R5F565NEDxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2018-07-22 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_sci_rx_pinset.h" -#include "platform.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: R_SCI_PinSet_SCI2 -* Description : This function initializes pins for r_sci_rx module -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_SCI_PinSet_SCI2(void) -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set RXD2/SMISO2 pin */ - MPC.P52PFS.BYTE = 0x0AU; - PORT5.PMR.BIT.B2 = 1U; - - /* Set TXD2/SMOSI2 pin */ - MPC.P50PFS.BYTE = 0x0AU; - PORT5.PMR.BIT.B0 = 1U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_sci_rx_pinset.h b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_sci_rx_pinset.h deleted file mode 100644 index 933a22ff49c..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/FIT_setting_files/r_pincfg/r_sci_rx_pinset.h +++ /dev/null @@ -1,41 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_pinset.h -* Version : 1.0.2 -* Device(s) : R5F565NEDxFB -* Tool-Chain : RXC toolchain -* Description : Setting of port and mpc registers -* Creation Date: 2018-07-22 -***********************************************************************************************************************/ - -#ifndef R_SCI_RX_H -#define R_SCI_RX_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ - -void R_SCI_PinSet_SCI2(void); - -#endif diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/attention!.txt b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/attention!.txt deleted file mode 100644 index eebc694d16c..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/attention!.txt +++ /dev/null @@ -1,32 +0,0 @@ -Please note that the following folders in the project window of IDEs are -so called 'linked' folders. - --------------------------------------------- -Linked folders in the project window of IDEs --------------------------------------------- - -src/FIT_modified_code/r_bsp -src/FIT_modified_code/r_byteq -src/FIT_modified_code/r_cmt_rx -src/FIT_modified_code/r_ether_rx -src/FIT_modified_code/r_flash_rx -src/FIT_modified_code/r_riic_rx -src/FIT_modified_code/r_sci_iic_rx -src/FIT_modified_code/r_sci_rx -src/amazon_freertos_common - ----------------------------------------------------------- -Folders on the File System of the WINDOWS Operating System ----------------------------------------------------------- - -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_bsp -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_byteq -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_cmt_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_ether_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_flash_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_riic_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_iic_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/FIT/RDP_v1.15_modified/r_sci_rx -amazon-freertos/lib/third_party/mcu_vendor/renesas/amazon_freertos_common - -[EOF] diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/linker_script.ld b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/linker_script.ld deleted file mode 100644 index f64620ad7ca..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/linker_script.ld +++ /dev/null @@ -1,203 +0,0 @@ -MEMORY -{ - RAM : ORIGIN = 0x0, LENGTH = 262144 - RAMHI : ORIGIN = 0x800000, LENGTH = 393216 - ROM : ORIGIN = 0xFFF00000, LENGTH = 1048576 - OFS : ORIGIN = 0xFE7F5D00, LENGTH = 256 -DATAFLASH (!rx) : ORIGIN = 0x100000, LENGTH = 32768 -} - -SECTIONS -{ - .exvectors 0xFFFFFF80 : AT(0xFFFFFF80) - { - _exvectors_start = .; - KEEP(*(.exvectors)) - _exvectors_end = .; - } >ROM - .fvectors 0xFFFFFFFC : AT(0xFFFFFFFC) - { - KEEP(*(.fvectors)) - } >ROM - .text 0xFFF00000 : AT(0xFFF00000) - { - *(.text) - *(.text.*) - *(P) - etext = .; - } >ROM - .rvectors : - { - _rvectors_start = .; - INCLUDE ../src/linker_script_rvectors.ld_inc - _rvectors_end = .; - } >ROM - .init : - { - KEEP(*(.init)) - __preinit_array_start = .; - KEEP(*(.preinit_array)) - __preinit_array_end = .; - __init_array_start = (. + 3) & ~ 3; - KEEP(*(.init_array)) - KEEP(*(SORT(.init_array.*))) - __init_array_end = .; - __fini_array_start = .; - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - __fini_array_end = .; - } >ROM - .fini : - { - KEEP(*(.fini)) - } >ROM - .got : - { - *(.got) - *(.got.plt) - } >ROM - .rodata : - { - *(.rodata) - *(.rodata.*) - *(C_1) - *(C_2) - *(C) - _erodata = .; - } >ROM - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } >ROM - .eh_frame : - { - *(.eh_frame) - } >ROM - .jcr : - { - *(.jcr) - } >ROM - .tors : - { - __CTOR_LIST__ = .; - . = ALIGN(2); - ___ctors = .; - *(.ctors) - ___ctors_end = .; - __CTOR_END__ = .; - __DTOR_LIST__ = .; - ___dtors = .; - *(.dtors) - ___dtors_end = .; - __DTOR_END__ = .; - . = ALIGN(2); - _mdata = .; - } >ROM - .r_bsp_NULL 0 : AT(0) - { - . += 0x100; - _r_bsp_NULL_end = .; - } >RAM - /* - * .r_bsp_ustack BLOCK(4) : - * { - * KEEP(*(.r_bsp_ustack)) - * } > RAM - * .ustack : - * { - * _ustack = .; - * } > RAM - */ - .r_bsp_istack BLOCK(4) : - { - KEEP(*(.r_bsp_istack)) - } >RAM - .istack : - { - _istack = .; - } >RAM - .data : AT(_mdata) - { - _data = .; - *(.data) - *(.data.*) - *(D) - *(D_1) - *(D_2) - _edata = .; - } >RAM - .gcc_exc : - { - *(.gcc_exc) - } >RAM - .bss : - { - _bss = .; - *(.bss) - *(.bss.**) - *(COMMON) - *(B) - *(B_1) - *(B_2) - _ebss = .; - _end = .; - } >RAM - B_ETHERNET_BUFFERS_1 BLOCK(32) : - { - _B_ETHERNET_BUFFERS_1_start = .; - *(B_ETHERNET_BUFFERS_1) - _B_ETHERNET_BUFFERS_1_end = .; - } >RAM - B_RX_DESC_1 : - { - _B_RX_DESC_1_start = .; - *(B_RX_DESC_1) - _B_RX_DESC_1_end = .; - } >RAM - B_TX_DESC_1 : - { - _B_TX_DESC_1_start = .; - *(B_TX_DESC_1) - _B_TX_DESC_1_end = .; - } >RAM - .ofs1 0xFE7F5D40 : AT(0xFE7F5D00) - { - KEEP(*(.ofs1)) - } >OFS - .ofs2 0xFE7F5D48 : AT(0xFE7F5D10) - { - KEEP(*(.ofs2)) - } >OFS - .ofs3 0xFE7F5D50 : AT(0xFE7F5D40) - { - KEEP(*(.ofs3)) - } >OFS - .ofs4 0xFE7F5D10 : AT(0xFE7F5D48) - { - KEEP(*(.ofs4)) - } >OFS - .ofs5 0xFE7F5D10 : AT(0xFE7F5D50) - { - KEEP(*(.ofs5)) - } >OFS - .ofs6 0xFE7F5D10 : AT(0xFE7F5D64) - { - KEEP(*(.ofs6)) - } >OFS - .ofs7 0xFE7F5D10 : AT(0xFE7F5D70) - { - KEEP(*(.ofs7)) - } >OFS C_PKCS11_STORAGE_1 : AT(0x00100000) -{ -} >DATAFLASH C_PKCS11_STORAGE_MIRROR_1 : -{ -} >DATAFLASH - - - - -} - - - - diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/linker_script_rvectors.ld_inc b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/linker_script_rvectors.ld_inc deleted file mode 100644 index 818dda33da0..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/linker_script_rvectors.ld_inc +++ /dev/null @@ -1,256 +0,0 @@ - LONG(DEFINED($tableentry$0$.rvectors) ? $tableentry$0$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$1$.rvectors) ? $tableentry$1$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$2$.rvectors) ? $tableentry$2$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$3$.rvectors) ? $tableentry$3$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$4$.rvectors) ? $tableentry$4$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$5$.rvectors) ? $tableentry$5$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$6$.rvectors) ? $tableentry$6$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$7$.rvectors) ? $tableentry$7$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$8$.rvectors) ? $tableentry$8$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$9$.rvectors) ? $tableentry$9$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$10$.rvectors) ? $tableentry$10$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$11$.rvectors) ? $tableentry$11$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$12$.rvectors) ? $tableentry$12$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$13$.rvectors) ? $tableentry$13$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$14$.rvectors) ? $tableentry$14$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$15$.rvectors) ? $tableentry$15$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$16$.rvectors) ? $tableentry$16$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$17$.rvectors) ? $tableentry$17$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$18$.rvectors) ? $tableentry$18$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$19$.rvectors) ? $tableentry$19$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$20$.rvectors) ? $tableentry$20$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$21$.rvectors) ? $tableentry$21$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$22$.rvectors) ? $tableentry$22$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$23$.rvectors) ? $tableentry$23$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$24$.rvectors) ? $tableentry$24$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$25$.rvectors) ? $tableentry$25$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$26$.rvectors) ? $tableentry$26$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$27$.rvectors) ? $tableentry$27$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$28$.rvectors) ? $tableentry$28$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$29$.rvectors) ? $tableentry$29$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$30$.rvectors) ? $tableentry$30$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$31$.rvectors) ? $tableentry$31$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$32$.rvectors) ? $tableentry$32$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$33$.rvectors) ? $tableentry$33$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$34$.rvectors) ? $tableentry$34$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$35$.rvectors) ? $tableentry$35$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$36$.rvectors) ? $tableentry$36$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$37$.rvectors) ? $tableentry$37$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$38$.rvectors) ? $tableentry$38$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$39$.rvectors) ? $tableentry$39$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$40$.rvectors) ? $tableentry$40$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$41$.rvectors) ? $tableentry$41$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$42$.rvectors) ? $tableentry$42$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$43$.rvectors) ? $tableentry$43$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$44$.rvectors) ? $tableentry$44$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$45$.rvectors) ? $tableentry$45$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$46$.rvectors) ? $tableentry$46$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$47$.rvectors) ? $tableentry$47$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$48$.rvectors) ? $tableentry$48$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$49$.rvectors) ? $tableentry$49$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$50$.rvectors) ? $tableentry$50$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$51$.rvectors) ? $tableentry$51$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$52$.rvectors) ? $tableentry$52$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$53$.rvectors) ? $tableentry$53$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$54$.rvectors) ? $tableentry$54$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$55$.rvectors) ? $tableentry$55$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$56$.rvectors) ? $tableentry$56$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$57$.rvectors) ? $tableentry$57$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$58$.rvectors) ? $tableentry$58$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$59$.rvectors) ? $tableentry$59$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$60$.rvectors) ? $tableentry$60$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$61$.rvectors) ? $tableentry$61$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$62$.rvectors) ? $tableentry$62$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$63$.rvectors) ? $tableentry$63$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$64$.rvectors) ? $tableentry$64$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$65$.rvectors) ? $tableentry$65$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$66$.rvectors) ? $tableentry$66$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$67$.rvectors) ? $tableentry$67$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$68$.rvectors) ? $tableentry$68$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$69$.rvectors) ? $tableentry$69$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$70$.rvectors) ? $tableentry$70$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$71$.rvectors) ? $tableentry$71$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$72$.rvectors) ? $tableentry$72$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$73$.rvectors) ? $tableentry$73$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$74$.rvectors) ? $tableentry$74$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$75$.rvectors) ? $tableentry$75$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$76$.rvectors) ? $tableentry$76$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$77$.rvectors) ? $tableentry$77$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$78$.rvectors) ? $tableentry$78$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$79$.rvectors) ? $tableentry$79$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$80$.rvectors) ? $tableentry$80$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$81$.rvectors) ? $tableentry$81$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$82$.rvectors) ? $tableentry$82$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$83$.rvectors) ? $tableentry$83$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$84$.rvectors) ? $tableentry$84$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$85$.rvectors) ? $tableentry$85$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$86$.rvectors) ? $tableentry$86$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$87$.rvectors) ? $tableentry$87$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$88$.rvectors) ? $tableentry$88$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$89$.rvectors) ? $tableentry$89$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$90$.rvectors) ? $tableentry$90$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$91$.rvectors) ? $tableentry$91$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); 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- LONG(DEFINED($tableentry$239$.rvectors) ? $tableentry$239$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$240$.rvectors) ? $tableentry$240$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$241$.rvectors) ? $tableentry$241$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$242$.rvectors) ? $tableentry$242$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$243$.rvectors) ? $tableentry$243$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$244$.rvectors) ? $tableentry$244$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$245$.rvectors) ? $tableentry$245$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$246$.rvectors) ? $tableentry$246$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$247$.rvectors) ? $tableentry$247$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$248$.rvectors) ? $tableentry$248$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$249$.rvectors) ? $tableentry$249$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$250$.rvectors) ? $tableentry$250$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$251$.rvectors) ? $tableentry$251$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$252$.rvectors) ? $tableentry$252$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$253$.rvectors) ? $tableentry$253$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$254$.rvectors) ? $tableentry$254$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); - LONG(DEFINED($tableentry$255$.rvectors) ? $tableentry$255$.rvectors : DEFINED($tableentry$default$.rvectors) ? $tableentry$default$.rvectors : 0xFFFFFFFF); diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/UNUSED_generated_code/.placeholder b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/UNUSED_generated_code/.placeholder deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_cg_hardware_setup.c b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_cg_hardware_setup.c deleted file mode 100644 index e92a1e6a311..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_cg_hardware_setup.c +++ /dev/null @@ -1,115 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_hardware_setup.c -* Version : 1.2.3 -* Device(s) : R5F565NEDxFB -* Description : Initialization file for code generation configurations. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -#include "r_smc_cgc.h" -#include "r_smc_interrupt.h" -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ - -/* Workaround to set group interrupt priority level when it is not set in the generated function */ -static void R_Interrupt_Create_Workaround(void); -static void R_Interrupt_Create_Workaround(void) -{ - /* Call the generated function */ - R_Interrupt_Create(); - - /* Disable group AL1 interrupt*/ - IEN(ICU,GROUPAL1) = 0U; - - /* Set group AL1 interrupt priority level */ - IPR(ICU,GROUPAL1) = _02_ICU_PRIORITY_LEVEL2; - - /* Enable group AL1 interrupt */ - IEN(ICU,GROUPAL1) = 1U; -} -#define R_Interrupt_Create R_Interrupt_Create_Workaround - -void r_undefined_exception(void); -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: r_undefined_exception -* Description : This function is undefined interrupt service routine -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void r_undefined_exception(void) -{ - /* Start user code for r_undefined_exception. Do not edit comment generated here */ - /* End user code. Do not edit comment generated here */ -} - -/*********************************************************************************************************************** -* Function Name: R_Systeminit -* Description : This function initializes every configuration -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Systeminit(void) -{ - /* Enable writing to registers related to operating modes, LPC, CGC and software reset */ - SYSTEM.PRCR.WORD = 0xA50BU; - - /* Enable writing to MPC pin function control registers */ - MPC.PWPR.BIT.B0WI = 0U; - MPC.PWPR.BIT.PFSWE = 1U; - - /* Initialize clocks settings */ - R_CGC_Create(); - - /* Register undefined interrupt */ - R_BSP_InterruptWrite(BSP_INT_SRC_UNDEFINED_INTERRUPT,(bsp_int_cb_t)r_undefined_exception); - - /* Disable writing to MPC pin function control registers */ - MPC.PWPR.BIT.PFSWE = 0U; - MPC.PWPR.BIT.B0WI = 1U; - - /* Enable protection */ - SYSTEM.PRCR.WORD = 0xA500U; -} - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_cg_interrupt_handlers.h b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_cg_interrupt_handlers.h deleted file mode 100644 index 0f10b06b37a..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_cg_interrupt_handlers.h +++ /dev/null @@ -1,75 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_interrupt_handlers.h -* Version : 1.2.3 -* Device(s) : R5F565NEDxFB -* Description : This file declares interrupt handlers. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef INTERRUPT_HANDLERS_H -#define INTERRUPT_HANDLERS_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* BSC BUSERR */ -void bus_error_isr(void) __attribute__ ((interrupt)); - -/* ICU GROUPBL2 */ -void group_bl2_handler_isr(void) __attribute__ ((interrupt)); - -/* ICU GROUPBL0 */ -void group_bl0_handler_isr(void) __attribute__ ((interrupt)); - -/* ICU GROUPBL1 */ -void group_bl1_handler_isr(void) __attribute__ ((interrupt)); - -/* ICU GROUPAL0 */ -void group_al0_handler_isr(void) __attribute__ ((interrupt)); - -/* ICU GROUPAL1 */ -void group_al1_handler_isr(void) __attribute__ ((interrupt)); - -/* Idle Vectors */ -void undefined_interrupt_source_isr(void) __attribute__ ((interrupt)); -/* Start user code for function. Do not edit comment generated here */ - -#include "r_cg_vector_pragma.h" - -/* End user code. Do not edit comment generated here */ -#endif diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_cg_macrodriver.h b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_cg_macrodriver.h deleted file mode 100644 index a61f32a8ab0..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_cg_macrodriver.h +++ /dev/null @@ -1,86 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_macrodriver.h -* Version : 1.2.3 -* Device(s) : R5F565NEDxFB -* Description : Macro header file for code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef MACRODRIVER_H -#define MACRODRIVER_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "platform.h" -#include "r_smc_interrupt.h" -#include "r_cg_interrupt_handlers.h" - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -#ifndef __TYPEDEF__ - -/* Status list definition */ -#define MD_STATUSBASE (0x00U) -#define MD_OK (MD_STATUSBASE + 0x00U) /* register setting OK */ -#define MD_SPT (MD_STATUSBASE + 0x01U) /* IIC stop */ -#define MD_NACK (MD_STATUSBASE + 0x02U) /* IIC no ACK */ -#define MD_BUSY1 (MD_STATUSBASE + 0x03U) /* busy 1 */ -#define MD_BUSY2 (MD_STATUSBASE + 0x04U) /* busy 2 */ - -/* Error list definition */ -#define MD_ERRORBASE (0x80U) -#define MD_ERROR (MD_ERRORBASE + 0x00U) /* error */ -#define MD_ARGERROR (MD_ERRORBASE + 0x01U) /* error argument input error */ -#define MD_ERROR1 (MD_ERRORBASE + 0x02U) /* error 1 */ -#define MD_ERROR2 (MD_ERRORBASE + 0x03U) /* error 2 */ -#define MD_ERROR3 (MD_ERRORBASE + 0x04U) /* error 3 */ -#define MD_ERROR4 (MD_ERRORBASE + 0x05U) /* error 4 */ -#define MD_ERROR5 (MD_ERRORBASE + 0x06U) /* error 5 */ - -#define nop() asm("nop;") -#define brk() asm("brk;") -#define wait() asm("wait;") - -#endif - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -#ifndef __TYPEDEF__ - typedef unsigned short MD_STATUS; - #define __TYPEDEF__ -#endif - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Systeminit(void); -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_cg_userdefine.h b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_cg_userdefine.h deleted file mode 100644 index e67e7f7a049..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_cg_userdefine.h +++ /dev/null @@ -1,61 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_userdefine.h -* Version : 1.2.3 -* Device(s) : R5F565NEDxFB -* Description : User header file for code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef CG_USER_DEF_H -#define CG_USER_DEF_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ -/* Start user code for register. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* Start user code for macro define. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -/* Start user code for type define. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_cg_vector_pragma.h b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_cg_vector_pragma.h deleted file mode 100644 index 8e7f57d5ec3..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_cg_vector_pragma.h +++ /dev/null @@ -1,6 +0,0 @@ -R_PRAGMA_INTERRUPT(bus_error_isr, 16) -R_PRAGMA_INTERRUPT(group_bl2_handler_isr, 107) -R_PRAGMA_INTERRUPT(group_bl0_handler_isr, 110) -R_PRAGMA_INTERRUPT(group_bl1_handler_isr, 111) -R_PRAGMA_INTERRUPT(group_al0_handler_isr, 112) -R_PRAGMA_INTERRUPT(group_al1_handler_isr, 113) diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_cg_vector_table.c b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_cg_vector_table.c deleted file mode 100644 index 9f8929165bd..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_cg_vector_table.c +++ /dev/null @@ -1,564 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_vector_table.c -* Version : 1.2.3 -* Device(s) : R5F565NEDxFB -* Description : This file implements interrupt vector table. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -void * const Reserved_Vector[] __attribute((section(".rvectors"))) = -{ - /* 0x0000 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0004 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0008 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x000C Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0010 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0014 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0018 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x001C Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0020 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0024 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0028 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x002C Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0030 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0034 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0038 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x003C Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0040 BSC BUSERR */ - bus_error_isr, - /* 0x0044 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0048 RAM RAMERR */ - undefined_interrupt_source_isr, - /* 0x004C Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0050 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0054 FCU FIFERR */ - undefined_interrupt_source_isr, - /* 0x0058 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x005C FCU FRDYI */ - undefined_interrupt_source_isr, - /* 0x0060 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0064 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0068 ICU SWINT2 */ - undefined_interrupt_source_isr, - /* 0x006C ICU SWINT */ - undefined_interrupt_source_isr, - /* 0x0070 CMT0 CMI0 */ - undefined_interrupt_source_isr, - /* 0x0074 CMT1 CMI1 */ - undefined_interrupt_source_isr, - /* 0x0078 CMTW0 CMWI0 */ - undefined_interrupt_source_isr, - /* 0x007C CMTW1 CMWI1 */ - undefined_interrupt_source_isr, - /* 0x0080 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0084 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0088 USB0 D0FIFO0 */ - undefined_interrupt_source_isr, - /* 0x008C USB0 D1FIFO0 */ - undefined_interrupt_source_isr, - /* 0x0090 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0094 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0098 RSPI0 SPRI0 */ - undefined_interrupt_source_isr, - /* 0x009C RSPI0 SPTI0 */ - undefined_interrupt_source_isr, - /* 0x00A0 RSPI1 SPRI1 */ - undefined_interrupt_source_isr, - /* 0x00A4 RSPI1 SPTI1 */ - undefined_interrupt_source_isr, - /* 0x00A8 QSPI SPRI */ - undefined_interrupt_source_isr, - /* 0x00AC QSPI SPTI */ - undefined_interrupt_source_isr, - /* 0x00B0 SDHI SBFAI */ - undefined_interrupt_source_isr, - /* 0x00B4 MMCIF MBFAI */ - undefined_interrupt_source_isr, - /* 0x00B8 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x00BC Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x00C0 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x00C4 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x00C8 RIIC1 RXI1 */ - undefined_interrupt_source_isr, - /* 0x00CC RIIC1 TXI1 */ - undefined_interrupt_source_isr, - /* 0x00D0 RIIC0 RXI0 */ - undefined_interrupt_source_isr, - /* 0x00D4 RIIC0 TXI0 */ - undefined_interrupt_source_isr, - /* 0x00D8 RIIC2 RXI2 */ - undefined_interrupt_source_isr, - /* 0x00DC RIIC2 TXI2 */ - undefined_interrupt_source_isr, - /* 0x00E0 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x00E4 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x00E8 SCI0 RXI0 */ - undefined_interrupt_source_isr, - /* 0x00EC SCI0 TXI0 */ - undefined_interrupt_source_isr, - /* 0x00F0 SCI1 RXI1 */ - undefined_interrupt_source_isr, - /* 0x00F4 SCI1 TXI1 */ - undefined_interrupt_source_isr, - /* 0x00F8 SCI2 RXI2 */ - undefined_interrupt_source_isr, - /* 0x00FC SCI2 TXI2 */ - undefined_interrupt_source_isr, - /* 0x0100 ICU IRQ0 */ - undefined_interrupt_source_isr, - /* 0x0104 ICU IRQ1 */ - undefined_interrupt_source_isr, - /* 0x0108 ICU IRQ2 */ - undefined_interrupt_source_isr, - /* 0x010C ICU IRQ3 */ - undefined_interrupt_source_isr, - /* 0x0110 ICU IRQ4 */ - undefined_interrupt_source_isr, - /* 0x0114 ICU IRQ5 */ - undefined_interrupt_source_isr, - /* 0x0118 ICU IRQ6 */ - undefined_interrupt_source_isr, - /* 0x011C ICU IRQ7 */ - undefined_interrupt_source_isr, - /* 0x0120 ICU IRQ8 */ - undefined_interrupt_source_isr, - /* 0x0124 ICU IRQ9 */ - undefined_interrupt_source_isr, - /* 0x0128 ICU IRQ10 */ - undefined_interrupt_source_isr, - /* 0x012C ICU IRQ11 */ - undefined_interrupt_source_isr, - /* 0x0130 ICU IRQ12 */ - undefined_interrupt_source_isr, - /* 0x0134 ICU IRQ13 */ - undefined_interrupt_source_isr, - /* 0x0138 ICU IRQ14 */ - undefined_interrupt_source_isr, - /* 0x013C ICU IRQ15 */ - undefined_interrupt_source_isr, - /* 0x0140 SCI3 RXI3 */ - undefined_interrupt_source_isr, - /* 0x0144 SCI3 TXI3 */ - undefined_interrupt_source_isr, - /* 0x0148 SCI4 RXI4 */ - undefined_interrupt_source_isr, - /* 0x014C SCI4 TXI4 */ - undefined_interrupt_source_isr, - /* 0x0150 SCI5 RXI5 */ - undefined_interrupt_source_isr, - /* 0x0154 SCI5 TXI5 */ - undefined_interrupt_source_isr, - /* 0x0158 SCI6 RXI6 */ - undefined_interrupt_source_isr, - /* 0x015C SCI6 TXI6 */ - undefined_interrupt_source_isr, - /* 0x0160 LVD1 LVD1 */ - undefined_interrupt_source_isr, - /* 0x0164 LVD2 LVD2 */ - undefined_interrupt_source_isr, - /* 0x0168 USB0 USBR0 */ - undefined_interrupt_source_isr, - /* 0x016C Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x0170 RTC ALM */ - undefined_interrupt_source_isr, - /* 0x0174 RTC PRD */ - undefined_interrupt_source_isr, - /* 0x0178 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x017C IWDT IWUNI */ - undefined_interrupt_source_isr, - /* 0x0180 WDT WUNI */ - undefined_interrupt_source_isr, - /* 0x0184 PDC PCDFI */ - undefined_interrupt_source_isr, - /* 0x0188 SCI7 RXI7 */ - undefined_interrupt_source_isr, - /* 0x018C SCI7 TXI7 */ - undefined_interrupt_source_isr, - /* 0x0190 SCI8 RXI8 */ - undefined_interrupt_source_isr, - /* 0x0194 SCI8 TXI8 */ - undefined_interrupt_source_isr, - /* 0x0198 SCI9 RXI9 */ - undefined_interrupt_source_isr, - /* 0x019C SCI9 TXI9 */ - undefined_interrupt_source_isr, - /* 0x01A0 SCI10 RXI10 */ - undefined_interrupt_source_isr, - /* 0x01A4 SCI10 TXI10 */ - undefined_interrupt_source_isr, - /* 0x01A8 ICU GROUPBE0 */ - undefined_interrupt_source_isr, - /* 0x01AC ICU GROUPBL2 */ - group_bl2_handler_isr, - /* 0x01B0 RSPI2 SPRI2 */ - undefined_interrupt_source_isr, - /* 0x01B4 RSPI2 SPTI2 */ - undefined_interrupt_source_isr, - /* 0x01B8 ICU GROUPBL0 */ - group_bl0_handler_isr, - /* 0x01BC ICU GROUPBL1 */ - group_bl1_handler_isr, - /* 0x01C0 ICU GROUPAL0 */ - group_al0_handler_isr, - /* 0x01C4 ICU GROUPAL1 */ - group_al1_handler_isr, - /* 0x01C8 SCI11 RXI11 */ - undefined_interrupt_source_isr, - /* 0x01CC SCI11 TXI11 */ - undefined_interrupt_source_isr, - /* 0x01D0 SCI12 RXI12 */ - undefined_interrupt_source_isr, - /* 0x01D4 SCI12 TXI12 */ - undefined_interrupt_source_isr, - /* 0x01D8 Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x01DC Reserved */ - (void (*)(void))0xFFFFFFFF, - /* 0x01E0 DMAC DMAC0I */ - undefined_interrupt_source_isr, - /* 0x01E4 DMAC DMAC1I */ - undefined_interrupt_source_isr, - /* 0x01E8 DMAC DMAC2I */ - undefined_interrupt_source_isr, - /* 0x01EC DMAC DMAC3I */ - undefined_interrupt_source_isr, - /* 0x01F0 DMAC DMAC74I */ - undefined_interrupt_source_isr, - /* 0x01F4 OST OSTDI */ - undefined_interrupt_source_isr, - /* 0x01F8 EXDMAC EXDMAC0I */ - undefined_interrupt_source_isr, - /* 0x01FC EXDMAC EXDMAC1I */ - undefined_interrupt_source_isr, - /* 0x0200 PERIB INTB128 */ - undefined_interrupt_source_isr, - /* 0x0204 PERIB INTB129 */ - undefined_interrupt_source_isr, - /* 0x0208 PERIB INTB130 */ - undefined_interrupt_source_isr, - /* 0x020C PERIB INTB131 */ - undefined_interrupt_source_isr, - /* 0x0210 PERIB INTB132 */ - undefined_interrupt_source_isr, - /* 0x0214 PERIB INTB133 */ - undefined_interrupt_source_isr, - /* 0x0218 PERIB INTB134 */ - undefined_interrupt_source_isr, - /* 0x021C PERIB INTB135 */ - undefined_interrupt_source_isr, - /* 0x0220 PERIB INTB136 */ - undefined_interrupt_source_isr, - /* 0x0224 PERIB INTB137 */ - undefined_interrupt_source_isr, - /* 0x0228 PERIB INTB138 */ - undefined_interrupt_source_isr, - /* 0x022C PERIB INTB139 */ - undefined_interrupt_source_isr, - /* 0x0230 PERIB INTB140 */ - undefined_interrupt_source_isr, - /* 0x0234 PERIB INTB141 */ - undefined_interrupt_source_isr, - /* 0x0238 PERIB INTB142 */ - undefined_interrupt_source_isr, - /* 0x023C PERIB INTB143 */ - undefined_interrupt_source_isr, - /* 0x0240 PERIB INTB144 */ - undefined_interrupt_source_isr, - /* 0x0244 PERIB INTB145 */ - undefined_interrupt_source_isr, - /* 0x0248 PERIB INTB146 */ - undefined_interrupt_source_isr, - /* 0x024C PERIB INTB147 */ - undefined_interrupt_source_isr, - /* 0x0250 PERIB INTB148 */ - undefined_interrupt_source_isr, - /* 0x0254 PERIB INTB149 */ - undefined_interrupt_source_isr, - /* 0x0258 PERIB INTB150 */ - undefined_interrupt_source_isr, - /* 0x025C PERIB INTB151 */ - undefined_interrupt_source_isr, - /* 0x0260 PERIB INTB152 */ - undefined_interrupt_source_isr, - /* 0x0264 PERIB INTB153 */ - undefined_interrupt_source_isr, - /* 0x0268 PERIB INTB154 */ - undefined_interrupt_source_isr, - /* 0x026C PERIB INTB155 */ - undefined_interrupt_source_isr, - /* 0x0270 PERIB INTB156 */ - undefined_interrupt_source_isr, - /* 0x0274 PERIB INTB157 */ - undefined_interrupt_source_isr, - /* 0x0278 PERIB INTB158 */ - undefined_interrupt_source_isr, - /* 0x027C PERIB INTB159 */ - undefined_interrupt_source_isr, - /* 0x0280 PERIB INTB160 */ - undefined_interrupt_source_isr, - /* 0x0284 PERIB INTB161 */ - undefined_interrupt_source_isr, - /* 0x0288 PERIB INTB162 */ - undefined_interrupt_source_isr, - /* 0x028C PERIB INTB163 */ - undefined_interrupt_source_isr, - /* 0x0290 PERIB INTB164 */ - undefined_interrupt_source_isr, - /* 0x0294 PERIB INTB165 */ - undefined_interrupt_source_isr, - /* 0x0298 PERIB INTB166 */ - undefined_interrupt_source_isr, - /* 0x029C PERIB INTB167 */ - undefined_interrupt_source_isr, - /* 0x02A0 PERIB INTB168 */ - undefined_interrupt_source_isr, - /* 0x02A4 PERIB INTB169 */ - undefined_interrupt_source_isr, - /* 0x02A8 PERIB INTB170 */ - undefined_interrupt_source_isr, - /* 0x02AC PERIB INTB171 */ - undefined_interrupt_source_isr, - /* 0x02B0 PERIB INTB172 */ - undefined_interrupt_source_isr, - /* 0x02B4 PERIB INTB173 */ - undefined_interrupt_source_isr, - /* 0x02B8 PERIB INTB174 */ - undefined_interrupt_source_isr, - /* 0x02BC PERIB INTB175 */ - undefined_interrupt_source_isr, - /* 0x02C0 PERIB INTB176 */ - undefined_interrupt_source_isr, - /* 0x02C4 PERIB INTB177 */ - undefined_interrupt_source_isr, - /* 0x02C8 PERIB INTB178 */ - undefined_interrupt_source_isr, - /* 0x02CC PERIB INTB179 */ - undefined_interrupt_source_isr, - /* 0x02D0 PERIB INTB180 */ - undefined_interrupt_source_isr, - /* 0x02D4 PERIB INTB181 */ - undefined_interrupt_source_isr, - /* 0x02D8 PERIB INTB182 */ - undefined_interrupt_source_isr, - /* 0x02DC PERIB INTB183 */ - undefined_interrupt_source_isr, - /* 0x02E0 PERIB INTB184 */ - undefined_interrupt_source_isr, - /* 0x02E4 PERIB INTB185 */ - undefined_interrupt_source_isr, - /* 0x02E8 PERIB INTB186 */ - undefined_interrupt_source_isr, - /* 0x02EC PERIB INTB187 */ - undefined_interrupt_source_isr, - /* 0x02F0 PERIB INTB188 */ - undefined_interrupt_source_isr, - /* 0x02F4 PERIB INTB189 */ - undefined_interrupt_source_isr, - /* 0x02F8 PERIB INTB190 */ - undefined_interrupt_source_isr, - /* 0x02FC PERIB INTB191 */ - undefined_interrupt_source_isr, - /* 0x0300 PERIB INTB192 */ - undefined_interrupt_source_isr, - /* 0x0304 PERIB INTB193 */ - undefined_interrupt_source_isr, - /* 0x0308 PERIB INTB194 */ - undefined_interrupt_source_isr, - /* 0x030C PERIB INTB195 */ - undefined_interrupt_source_isr, - /* 0x0310 PERIB INTB196 */ - undefined_interrupt_source_isr, - /* 0x0314 PERIB INTB197 */ - undefined_interrupt_source_isr, - /* 0x0318 PERIB INTB198 */ - undefined_interrupt_source_isr, - /* 0x031C PERIB INTB199 */ - undefined_interrupt_source_isr, - /* 0x0320 PERIB INTB200 */ - undefined_interrupt_source_isr, - /* 0x0324 PERIB INTB201 */ - undefined_interrupt_source_isr, - /* 0x0328 PERIB INTB202 */ - undefined_interrupt_source_isr, - /* 0x032C PERIB INTB203 */ - undefined_interrupt_source_isr, - /* 0x0330 PERIB INTB204 */ - undefined_interrupt_source_isr, - /* 0x0334 PERIB INTB205 */ - undefined_interrupt_source_isr, - /* 0x0338 PERIB INTB206 */ - undefined_interrupt_source_isr, - /* 0x033C PERIB INTB207 */ - undefined_interrupt_source_isr, - /* 0x0340 PERIA INTA208 */ - undefined_interrupt_source_isr, - /* 0x0344 PERIA INTA209 */ - undefined_interrupt_source_isr, - /* 0x0348 PERIA INTA210 */ - undefined_interrupt_source_isr, - /* 0x034C PERIA INTA211 */ - undefined_interrupt_source_isr, - /* 0x0350 PERIA INTA212 */ - undefined_interrupt_source_isr, - /* 0x0354 PERIA INTA213 */ - undefined_interrupt_source_isr, - /* 0x0358 PERIA INTA214 */ - undefined_interrupt_source_isr, - /* 0x035C PERIA INTA215 */ - undefined_interrupt_source_isr, - /* 0x0360 PERIA INTA216 */ - undefined_interrupt_source_isr, - /* 0x0364 PERIA INTA217 */ - undefined_interrupt_source_isr, - /* 0x0368 PERIA INTA218 */ - undefined_interrupt_source_isr, - /* 0x036C PERIA INTA219 */ - undefined_interrupt_source_isr, - /* 0x0370 PERIA INTA220 */ - undefined_interrupt_source_isr, - /* 0x0374 PERIA INTA221 */ - undefined_interrupt_source_isr, - /* 0x0378 PERIA INTA222 */ - undefined_interrupt_source_isr, - /* 0x037C PERIA INTA223 */ - undefined_interrupt_source_isr, - /* 0x0380 PERIA INTA224 */ - undefined_interrupt_source_isr, - /* 0x0384 PERIA INTA225 */ - undefined_interrupt_source_isr, - /* 0x0388 PERIA INTA226 */ - undefined_interrupt_source_isr, - /* 0x038C PERIA INTA227 */ - undefined_interrupt_source_isr, - /* 0x0390 PERIA INTA228 */ - undefined_interrupt_source_isr, - /* 0x0394 PERIA INTA229 */ - undefined_interrupt_source_isr, - /* 0x0398 PERIA INTA230 */ - undefined_interrupt_source_isr, - /* 0x039C PERIA INTA231 */ - undefined_interrupt_source_isr, - /* 0x03A0 PERIA INTA232 */ - undefined_interrupt_source_isr, - /* 0x03A4 PERIA INTA233 */ - undefined_interrupt_source_isr, - /* 0x03A8 PERIA INTA234 */ - undefined_interrupt_source_isr, - /* 0x03AC PERIA INTA235 */ - undefined_interrupt_source_isr, - /* 0x03B0 PERIA INTA236 */ - undefined_interrupt_source_isr, - /* 0x03B4 PERIA INTA237 */ - undefined_interrupt_source_isr, - /* 0x03B8 PERIA INTA238 */ - undefined_interrupt_source_isr, - /* 0x03BC PERIA INTA239 */ - undefined_interrupt_source_isr, - /* 0x03C0 PERIA INTA240 */ - undefined_interrupt_source_isr, - /* 0x03C4 PERIA INTA241 */ - undefined_interrupt_source_isr, - /* 0x03C8 PERIA INTA242 */ - undefined_interrupt_source_isr, - /* 0x03CC PERIA INTA243 */ - undefined_interrupt_source_isr, - /* 0x03D0 PERIA INTA244 */ - undefined_interrupt_source_isr, - /* 0x03D4 PERIA INTA245 */ - undefined_interrupt_source_isr, - /* 0x03D8 PERIA INTA246 */ - undefined_interrupt_source_isr, - /* 0x03DC PERIA INTA247 */ - undefined_interrupt_source_isr, - /* 0x03E0 PERIA INTA248 */ - undefined_interrupt_source_isr, - /* 0x03E4 PERIA INTA249 */ - undefined_interrupt_source_isr, - /* 0x03E8 PERIA INTA250 */ - undefined_interrupt_source_isr, - /* 0x03EC PERIA INTA251 */ - undefined_interrupt_source_isr, - /* 0x03F0 PERIA INTA252 */ - undefined_interrupt_source_isr, - /* 0x03F4 PERIA INTA253 */ - undefined_interrupt_source_isr, - /* 0x03F8 PERIA INTA254 */ - undefined_interrupt_source_isr, - /* 0x03FC PERIA INTA255 */ - undefined_interrupt_source_isr -}; -/* Start user code for global. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_smc_cgc.c b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_smc_cgc.c deleted file mode 100644 index c7b885c7be0..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_smc_cgc.c +++ /dev/null @@ -1,45 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc.c -* Version : 1.2.0 -* Device(s) : R5F565NEDxFB -* Description : This file implements cgc setting -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -#include "r_smc_cgc.h" -#include "platform.h" - -/*********************************************************************************************************************** -* Function Name: R_CGC_Create -* Description : This function Used to initializes the clock generator -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_CGC_Create(void) -{ - - R_CGC_Create_UserInit(); -} diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_smc_cgc.h b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_smc_cgc.h deleted file mode 100644 index 44bf0371c22..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_smc_cgc.h +++ /dev/null @@ -1,217 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc.h -* Version : 1.2.0 -* Device(s) : R5F565NEDxFB -* Description : This file implements cgc setting. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_CGC_H -#define SMC_CGC_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ -/* - System Clock Control Register (SCKCR) -*/ -/* Peripheral Module Clock D (PCLKD) */ -#define _00000000_CGC_PCLKD_DIV_1 (0x00000000UL) /* x1 */ -#define _00000001_CGC_PCLKD_DIV_2 (0x00000001UL) /* x1/2 */ -#define _00000002_CGC_PCLKD_DIV_4 (0x00000002UL) /* x1/4 */ -#define _00000003_CGC_PCLKD_DIV_8 (0x00000003UL) /* x1/8 */ -#define _00000004_CGC_PCLKD_DIV_16 (0x00000004UL) /* x1/16 */ -#define _00000005_CGC_PCLKD_DIV_32 (0x00000005UL) /* x1/32 */ -#define _00000006_CGC_PCLKD_DIV_64 (0x00000006UL) /* x1/64 */ -/* Peripheral Module Clock C (PCLKC) */ -#define _00000000_CGC_PCLKC_DIV_1 (0x00000000UL) /* x1 */ -#define _00000010_CGC_PCLKC_DIV_2 (0x00000010UL) /* x1/2 */ -#define _00000020_CGC_PCLKC_DIV_4 (0x00000020UL) /* x1/4 */ -#define _00000030_CGC_PCLKC_DIV_8 (0x00000030UL) /* x1/8 */ -#define _00000040_CGC_PCLKC_DIV_16 (0x00000040UL) /* x1/16 */ -#define _00000050_CGC_PCLKC_DIV_32 (0x00000050UL) /* x1/32 */ -#define _00000060_CGC_PCLKC_DIV_64 (0x00000060UL) /* x1/64 */ -/* Peripheral Module Clock B (PCLKB) */ -#define _00000000_CGC_PCLKB_DIV_1 (0x00000000UL) /* x1 */ -#define _00000100_CGC_PCLKB_DIV_2 (0x00000100UL) /* x1/2 */ -#define _00000200_CGC_PCLKB_DIV_4 (0x00000200UL) /* x1/4 */ -#define _00000300_CGC_PCLKB_DIV_8 (0x00000300UL) /* x1/8 */ -#define _00000400_CGC_PCLKB_DIV_16 (0x00000400UL) /* x1/16 */ -#define _00000500_CGC_PCLKB_DIV_32 (0x00000500UL) /* x1/32 */ -#define _00000600_CGC_PCLKB_DIV_64 (0x00000600UL) /* x1/64 */ -/* Peripheral Module Clock A (PCLKA) */ -#define _00000000_CGC_PCLKA_DIV_1 (0x00000000UL) /* x1 */ -#define _00001000_CGC_PCLKA_DIV_2 (0x00001000UL) /* x1/2 */ -#define _00002000_CGC_PCLKA_DIV_4 (0x00002000UL) /* x1/4 */ -#define _00003000_CGC_PCLKA_DIV_8 (0x00003000UL) /* x1/8 */ -#define _00004000_CGC_PCLKA_DIV_16 (0x00004000UL) /* x1/16 */ -#define _00005000_CGC_PCLKA_DIV_32 (0x00005000UL) /* x1/32 */ -#define _00006000_CGC_PCLKA_DIV_64 (0x00006000UL) /* x1/64 */ -/* External Bus Clock (BCLK) */ -#define _00000000_CGC_BCLK_DIV_1 (0x00000000UL) /* x1 */ -#define _00010000_CGC_BCLK_DIV_2 (0x00010000UL) /* x1/2 */ -#define _00020000_CGC_BCLK_DIV_4 (0x00020000UL) /* x1/4 */ -#define _00030000_CGC_BCLK_DIV_8 (0x00030000UL) /* x1/8 */ -#define _00040000_CGC_BCLK_DIV_16 (0x00040000UL) /* x1/16 */ -#define _00050000_CGC_BCLK_DIV_32 (0x00050000UL) /* x1/32 */ -#define _00060000_CGC_BCLK_DIV_64 (0x00060000UL) /* x1/64 */ -/* System Clock (ICLK) */ -#define _00000000_CGC_ICLK_DIV_1 (0x00000000UL) /* x1 */ -#define _01000000_CGC_ICLK_DIV_2 (0x01000000UL) /* x1/2 */ -#define _02000000_CGC_ICLK_DIV_4 (0x02000000UL) /* x1/4 */ -#define _03000000_CGC_ICLK_DIV_8 (0x03000000UL) /* x1/8 */ -#define _04000000_CGC_ICLK_DIV_16 (0x04000000UL) /* x1/16 */ -#define _05000000_CGC_ICLK_DIV_32 (0x05000000UL) /* x1/32 */ -#define _06000000_CGC_ICLK_DIV_64 (0x06000000UL) /* x1/64 */ -/* System Clock (FCLK) */ -#define _00000000_CGC_FCLK_DIV_1 (0x00000000UL) /* x1 */ -#define _10000000_CGC_FCLK_DIV_2 (0x10000000UL) /* x1/2 */ -#define _20000000_CGC_FCLK_DIV_4 (0x20000000UL) /* x1/4 */ -#define _30000000_CGC_FCLK_DIV_8 (0x30000000UL) /* x1/8 */ -#define _40000000_CGC_FCLK_DIV_16 (0x40000000UL) /* x1/16 */ -#define _50000000_CGC_FCLK_DIV_32 (0x50000000UL) /* x1/32 */ -#define _60000000_CGC_FCLK_DIV_64 (0x60000000UL) /* x1/64 */ - -/* - System Clock Control Register 2 (SCKCR2) -*/ -#define _0010_CGC_UCLK_DIV_1 (0x0010U) /* x1/2 */ -#define _0020_CGC_UCLK_DIV_3 (0x0020U) /* x1/3 */ -#define _0030_CGC_UCLK_DIV_4 (0x0030U) /* x1/4 */ -#define _0040_CGC_UCLK_DIV_5 (0x0040U) /* x1/5 */ -#define _0001_SCKCR2_BIT0 (0x0001U) /* RESERVE BIT0 */ - -/* - System Clock Control Register 3 (SCKCR3) -*/ -#define _0000_CGC_CLOCKSOURCE_LOCO (0x0000U) /* LOCO */ -#define _0100_CGC_CLOCKSOURCE_HOCO (0x0100U) /* HOCO */ -#define _0200_CGC_CLOCKSOURCE_MAINCLK (0x0200U) /* Main clock oscillator */ -#define _0300_CGC_CLOCKSOURCE_SUBCLK (0x0300U) /* Sub-clock oscillator */ -#define _0400_CGC_CLOCKSOURCE_PLL (0x0400U) /* PLL circuit */ - -/* - PLL Control Register (PLLCR) -*/ -/* PLL Input Frequency Division Ratio Select (PLIDIV[1:0]) */ -#define _0000_CGC_PLL_FREQ_DIV_1 (0x0000U) /* x1 */ -#define _0001_CGC_PLL_FREQ_DIV_2 (0x0001U) /* x1/2 */ -#define _0002_CGC_PLL_FREQ_DIV_3 (0x0002U) /* x1/3 */ -/* PLL Clock Source Select (PLLSRCSEL) */ -#define _0000_CGC_PLL_SOURCE_MAIN (0x0000U) /* Main clock oscillator */ -#define _0010_CGC_PLL_SOURCE_HOCO (0x0010U) /* HOCO */ -/* Frequency Multiplication Factor Select (STC[5:0]) */ -#define _1300_CGC_PLL_FREQ_MUL_10_0 (0x1300U) /* x10.0 */ -#define _1400_CGC_PLL_FREQ_MUL_10_5 (0x1400U) /* x10.5 */ -#define _1500_CGC_PLL_FREQ_MUL_11_0 (0x1500U) /* x11.0 */ -#define _1600_CGC_PLL_FREQ_MUL_11_5 (0x1600U) /* x11.5 */ -#define _1700_CGC_PLL_FREQ_MUL_12_0 (0x1700U) /* x12.0 */ -#define _1800_CGC_PLL_FREQ_MUL_12_5 (0x1800U) /* x12.5 */ -#define _1900_CGC_PLL_FREQ_MUL_13_0 (0x1900U) /* x13.0 */ -#define _1A00_CGC_PLL_FREQ_MUL_13_5 (0x1A00U) /* x13.5 */ -#define _1B00_CGC_PLL_FREQ_MUL_14_0 (0x1B00U) /* x14.0 */ -#define _1C00_CGC_PLL_FREQ_MUL_14_5 (0x1C00U) /* x14.5 */ -#define _1D00_CGC_PLL_FREQ_MUL_15_0 (0x1D00U) /* x15.0 */ -#define _1E00_CGC_PLL_FREQ_MUL_15_5 (0x1E00U) /* x15.5 */ -#define _1F00_CGC_PLL_FREQ_MUL_16_0 (0x1F00U) /* x16.0 */ -#define _2000_CGC_PLL_FREQ_MUL_16_5 (0x2000U) /* x16.5 */ -#define _2100_CGC_PLL_FREQ_MUL_17_0 (0x2100U) /* x17.0 */ -#define _2200_CGC_PLL_FREQ_MUL_17_5 (0x2200U) /* x17.5 */ -#define _2300_CGC_PLL_FREQ_MUL_18_0 (0x2300U) /* x18.0 */ -#define _2400_CGC_PLL_FREQ_MUL_18_5 (0x2400U) /* x18.5 */ -#define _2500_CGC_PLL_FREQ_MUL_19_0 (0x2500U) /* x19.0 */ -#define _2600_CGC_PLL_FREQ_MUL_19_5 (0x2600U) /* x19.5 */ -#define _2700_CGC_PLL_FREQ_MUL_20_0 (0x2700U) /* x20.0 */ -#define _2800_CGC_PLL_FREQ_MUL_20_5 (0x2800U) /* x20.5 */ -#define _2900_CGC_PLL_FREQ_MUL_21_0 (0x2900U) /* x21.0 */ -#define _2A00_CGC_PLL_FREQ_MUL_21_5 (0x2A00U) /* x21.5 */ -#define _2B00_CGC_PLL_FREQ_MUL_22_0 (0x2B00U) /* x22.0 */ -#define _2C00_CGC_PLL_FREQ_MUL_22_5 (0x2C00U) /* x22.5 */ -#define _2D00_CGC_PLL_FREQ_MUL_23_0 (0x2D00U) /* x23.0 */ -#define _2E00_CGC_PLL_FREQ_MUL_23_5 (0x2E00U) /* x23.5 */ -#define _2F00_CGC_PLL_FREQ_MUL_24_0 (0x2F00U) /* x24.0 */ -#define _3000_CGC_PLL_FREQ_MUL_24_5 (0x3000U) /* x24.5 */ -#define _3100_CGC_PLL_FREQ_MUL_25_0 (0x3100U) /* x25.0 */ -#define _3200_CGC_PLL_FREQ_MUL_25_5 (0x3200U) /* x25.5 */ -#define _3300_CGC_PLL_FREQ_MUL_26_0 (0x3300U) /* x26.0 */ -#define _3400_CGC_PLL_FREQ_MUL_26_5 (0x3400U) /* x26.5 */ -#define _3500_CGC_PLL_FREQ_MUL_27_0 (0x3500U) /* x27.0 */ -#define _3600_CGC_PLL_FREQ_MUL_27_5 (0x3600U) /* x27.5 */ -#define _3700_CGC_PLL_FREQ_MUL_28_0 (0x3700U) /* x28.0 */ -#define _3800_CGC_PLL_FREQ_MUL_28_5 (0x3800U) /* x28.5 */ -#define _3900_CGC_PLL_FREQ_MUL_29_0 (0x3900U) /* x29.0 */ -#define _3A00_CGC_PLL_FREQ_MUL_29_5 (0x3A00U) /* x29.5 */ -#define _3B00_CGC_PLL_FREQ_MUL_30_0 (0x3B00U) /* x30.0 */ - -/* - Oscillation Stop Detection Control Register (OSTDCR) -*/ -/* Oscillation Stop Detection Interrupt Enable (OSTDIE) */ -#define _00_CGC_OSC_STOP_INT_DISABLE (0x00U) /* The oscillation stop detection interrupt is disabled */ -#define _01_CGC_OSC_STOP_INT_ENABLE (0x01U) /* The oscillation stop detection interrupt is enabled */ -/* Oscillation Stop Detection Function Enable (OSTDE) */ -#define _00_CGC_OSC_STOP_DISABLE (0x00U) /* Oscillation stop detection function is disabled */ -#define _80_CGC_OSC_STOP_ENABLE (0x80U) /* Oscillation stop detection function is enabled */ - -/* - High-Speed On-Chip Oscillator Control Register 2 (HOCOCR2) -*/ -/* HOCO Frequency Setting (HCFRQ[1:0]) */ -#define _00_CGC_HOCO_CLK_16 (0x00U) /* 16 MHz */ -#define _01_CGC_HOCO_CLK_18 (0x01U) /* 18 MHz */ -#define _02_CGC_HOCO_CLK_20 (0x02U) /* 20 MHz */ - -/* - Main Clock Oscillator Forced Oscillation Control Register (MOFCR) -*/ -/* Main Oscillator Drive Capability 2 Switching (MODRV2[1:0]) */ -#define _00_CGC_MAINOSC_UNDER24M (0x00U) /* 20.1 to 24 MHz */ -#define _10_CGC_MAINOSC_UNDER20M (0x10U) /* 16.1 to 20 MHz */ -#define _20_CGC_MAINOSC_UNDER16M (0x20U) /* 8.1 to 16 MHz */ -#define _30_CGC_MAINOSC_EQUATE8M (0x30U) /* 8 MHz */ -/* Main Clock Oscillator Switch (MOSEL) */ -#define _00_CGC_MAINOSC_RESONATOR (0x00U) /* Resonator */ -#define _40_CGC_MAINOSC_EXTERNAL (0x40U) /* External oscillator input */ - -/* - RTC Control Register 4 (RCR4) -*/ -/* Count source select */ -#define _00_RTC_SOURCE_SELECT_SUB (0x00U) /* Select sub-clock oscillator */ -#define _01_RTC_SOURCE_SELECT_MAIN_FORCED (0x01U) /* Select main clock oscillator */ -#define _53_CGC_MOSCWTCR_VALUE (0x53U) /* Main Clock Oscillator Wait Time */ -#define _21_CGC_SOSCWTCR_VALUE (0x21U) /* Sub-Clock Oscillator Wait Time */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_CGC_Create(void); -void R_CGC_Create_UserInit(); -#endif diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_smc_cgc_user.c b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_smc_cgc_user.c deleted file mode 100644 index 904e90c8a0d..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_smc_cgc_user.c +++ /dev/null @@ -1,64 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc_user.c -* Version : 1.2.0 -* Device(s) : R5F565NEDxFB -* Description : None -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -/* Start user code for include. Do not edit comment generated here */ -#include "r_smc_cgc.h" -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: R_CGC_Create_UserInit -* Description : This function adds user code after initializing CGC -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_CGC_Create_UserInit(void) -{ - /* Start user code for code init. Do not edit comment generated here */ - /* End user code. Do not edit comment generated here */ -} - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_smc_entry.h b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_smc_entry.h deleted file mode 100644 index edcc8f0210c..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_smc_entry.h +++ /dev/null @@ -1,54 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_entry.h -* Version : 1.2.3 -* Device(s) : R5F565NEDxFB -* Description : SMC platform header file. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_ENTRY_H -#define SMC_ENTRY_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_smc_interrupt.c b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_smc_interrupt.c deleted file mode 100644 index 14c4f37fcdd..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_smc_interrupt.c +++ /dev/null @@ -1,44 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_interrupt.c -* Version : 1.1.0 -* Device(s) : R5F565NEDxFB -* Description : This file implements interrupt setting -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_smc_interrupt.h" -#include "platform.h" - -/*********************************************************************************************************************** -* Function Name: R_Interrupt_Create -* Description : This function Used to set the fast interrupt or group interrupt -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Interrupt_Create(void) -{ - /* No fast interrupt and group settings have been configured in the Interrupts tab. */ -} - diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_smc_interrupt.h b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_smc_interrupt.h deleted file mode 100644 index 0e4888ecad4..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/general/r_smc_interrupt.h +++ /dev/null @@ -1,290 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_interrupt.h -* Version : 1.1.0 -* Device(s) : R5F565NEDxFB -* Description : This file implements interrupt setting. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef SMC_INTERRUPT_H -#define SMC_INTERRUPT_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/* Priority level of interrupt source. - * These macro definitions are used to set the IPR register directly - */ -#define _00_ICU_PRIORITY_LEVEL0 (0x00U) /* Level 0 (disabled) */ -#define _01_ICU_PRIORITY_LEVEL1 (0x01U) /* Level 1 */ -#define _02_ICU_PRIORITY_LEVEL2 (0x02U) /* Level 2 */ -#define _03_ICU_PRIORITY_LEVEL3 (0x03U) /* Level 3 */ -#define _04_ICU_PRIORITY_LEVEL4 (0x04U) /* Level 4 */ -#define _05_ICU_PRIORITY_LEVEL5 (0x05U) /* Level 5 */ -#define _06_ICU_PRIORITY_LEVEL6 (0x06U) /* Level 6 */ -#define _07_ICU_PRIORITY_LEVEL7 (0x07U) /* Level 7 */ -#define _08_ICU_PRIORITY_LEVEL8 (0x08U) /* Level 8 */ -#define _09_ICU_PRIORITY_LEVEL9 (0x09U) /* Level 9 */ -#define _0A_ICU_PRIORITY_LEVEL10 (0x0AU) /* Level 10 */ -#define _0B_ICU_PRIORITY_LEVEL11 (0x0BU) /* Level 11 */ -#define _0C_ICU_PRIORITY_LEVEL12 (0x0CU) /* Level 12 */ -#define _0D_ICU_PRIORITY_LEVEL13 (0x0DU) /* Level 13 */ -#define _0E_ICU_PRIORITY_LEVEL14 (0x0EU) /* Level 14 */ -#define _0F_ICU_PRIORITY_LEVEL15 (0x0FU) /* Level 15 */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* The macro definitions below list the full set of priority levels as selected in the Interrupts tab - * Please do not modify this file manually - */ -#define ICU_BSC_BUSERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RAM_RAMERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_FCU_FIFERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_FCU_FRDYI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_SWINT2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_SWINT_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT0_CMI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT1_CMI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_CMWI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_CMWI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_D0FIFO0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_D1FIFO0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI0_SPRI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI0_SPTI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI1_SPRI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI1_SPTI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_QSPI_SPRI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_QSPI_SPTI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SDHI_SBFAI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MMCIF_MBFAI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC1_RXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC1_TXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC0_RXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC0_TXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC2_RXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC2_TXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI0_RXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI0_TXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI1_RXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI1_TXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI2_RXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI2_TXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ13_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ14_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ15_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI3_RXI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI3_TXI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI4_RXI4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI4_TXI4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI5_RXI5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI5_TXI5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI6_RXI6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI6_TXI6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_LVD1_LVD1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_LVD2_LVD2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_USBR0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_ALM_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_PRD_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_IWDT_IWUNI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_WDT_WUNI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PDC_PCDFI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI7_RXI7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI7_TXI7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI8_RXI8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI8_TXI8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI9_RXI9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI9_TXI9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI10_RXI10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI10_TXI10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBE0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI2_SPRI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI2_SPTI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPAL0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPAL1_PRIORITY _02_ICU_PRIORITY_LEVEL2 -#define ICU_SCI11_RXI11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI11_TXI11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI12_RXI12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI12_TXI12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC0I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC1I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC2I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC3I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC74I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_OST_OSTDI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EXDMAC_EXDMAC0I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EXDMAC_EXDMAC1I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT2_CMI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT3_CMI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0C_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0D_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TCI0V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TGI1B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TCI1V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TCI1U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TGI2A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TGI2B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TCI2V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TCI2U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TGI1A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3C_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_CMIA0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_CMIB0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_OVI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_CMIA1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_CMIB1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_OVI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_CMIA2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_CMIB2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_OVI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_CMIA3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_CMIB3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_OVI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3D_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TCI3V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TGI4A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TGI4B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TCI4V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TCI4U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TGI5A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TGI5B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TCI5V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TCI5U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_IC0I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_IC1I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_OC0I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_OC1I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_IC0I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_IC1I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_OC0I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_OC1I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_CUP_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_RXF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_TXF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_RXM0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_TXM0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_RXF1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_TXF1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_RXM1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_TXM1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_USBI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12ADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12GBADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12GCADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12ADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12GBADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12GCADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB192_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ELC_ELSR18I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ELC_ELSR19I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_PROC_BUSY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_ROMOK_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_LONG_PLG_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_TEST_BUSY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_WRRDY0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_WRRDY1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_WRRDY4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_RDRDY0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_RDRDY1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_INTEGRATE_WRRDY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_INTEGRATE_RDRDY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB206_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB207_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TGIA1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIA0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIB0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIC0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGID0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TCIV0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIE0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TGIB1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TCIV1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TCIU1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TGIA2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TGIB2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TCIV2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TCIU2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIA3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIB3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIC3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGID3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TCIV3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIA4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIB4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIC4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGID4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TCIV4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIU5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIV5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIW5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIA6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIB6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIC6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGID6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TCIV6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIA7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIB7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIC7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGID7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TCIV7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIA8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIB8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIC8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGID8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TCIV8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA251_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA252_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA253_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA254_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA255_PRIORITY _0F_ICU_PRIORITY_LEVEL15 - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Interrupt_Create(void); -#endif diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/r_config/r_bsp_config.h b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/r_config/r_bsp_config.h deleted file mode 100644 index 3a661dee9e4..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/r_config/r_bsp_config.h +++ /dev/null @@ -1,627 +0,0 @@ -/* Generated configuration header file - do not edit */ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_config_reference.h -* Device(s) : RX65N -* Description : The file r_bsp_config.h is used to configure your BSP. r_bsp_config.h should be included -* somewhere in your package so that the r_bsp code has access to it. This file (r_bsp_config_reference.h) -* is just a reference file that the user can use to make their own r_bsp_config.h file. -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 15.05.2017 1.00 First Release -* : 01.12.2017 1.01 Added the following macro definition. -* - BSP_CFG_EBMAPCR_1ST_PRIORITY -* - BSP_CFG_EBMAPCR_2ND_PRIORITY -* - BSP_CFG_EBMAPCR_3RD_PRIORITY -* - BSP_CFG_EBMAPCR_4TH_PRIORITY -* - BSP_CFG_EBMAPCR_5TH_PRIORITY -* : 01.07.2018 1.02 Added the following macro definition. -* - BSP_CFG_CONFIGURATOR_SELECT -* Add RTOS support. FreeRTOS. Define a timer for RTOS. -* : 27.07.2018 1.03 Modified the comment of PLL clock source. -* Added the following macro definition for ID code protection. -* - BSP_CFG_ID_CODE_LONG_1 -* - BSP_CFG_ID_CODE_LONG_2 -* - BSP_CFG_ID_CODE_LONG_3 -* - BSP_CFG_ID_CODE_LONG_4 -* Added the following macro definition. -* - BSP_CFG_FIT_IPL_MAX -* : xx.xx.xxxx 1.04 Added support for GNUC and ICCRX. -***********************************************************************************************************************/ -#ifndef R_BSP_CONFIG_REF_HEADER_FILE -#define R_BSP_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* NOTE: - The default settings are the same as when using RSKRX65N-2MB. - Change to the settings for the user board. -*/ - -/* Start up select - 0 = Enable BSP startup program. - 1 = Disable BSP startup program. (e.g. Using user startup program.) -*/ -#define BSP_CFG_STARTUP_DISABLE (0) - -/* Enter the product part number for your MCU. This information will be used to obtain information about your MCU such - as package and memory size. - To help parse this information, the part number will be defined using multiple macros. - R 5 F 56 5N E D D FP - | | | | | | | | | Macro Name Description - | | | | | | | | |__BSP_CFG_MCU_PART_PACKAGE = Package type, number of pins, and pin pitch - | | | | | | | |____not used = Products with wide temperature range - | | | | | | |______BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED = Encryption module included/not included - | | | | | |________BSP_CFG_MCU_PART_MEMORY_SIZE = ROM, RAM, and Data Flash Capacity - | | | | |___________BSP_CFG_MCU_PART_GROUP = Group name - | | | |______________BSP_CFG_MCU_PART_SERIES = Series name - | | |________________BSP_CFG_MCU_PART_MEMORY_TYPE = Type of memory (Flash, ROMless) - | |__________________not used = Renesas MCU - |____________________not used = Renesas semiconductor product. - */ - -/* Package type. Set the macro definition based on values below: - Character(s) = Value for macro = Package Type/Number of Pins/Pin Pitch - FC = 0x0 = LFQFP/176/0.50 - BG = 0x1 = LFBGA/176/0.80 - LC = 0x2 = TFLGA/177/0.50 - FB = 0x3 = LFQFP/144/0.50 - LK = 0x4 = TFLGA/145/0.50 - FP = 0x5 = LFQFP/100/0.50 - LJ = 0xA = TFLGA/100/0.65 -*/ -#define BSP_CFG_MCU_PART_PACKAGE (0x3) // <-- Updated by GUI. Do not edit this value manually - -/* Whether Encryption and SDHI/SDSI are included or not. - Character(s) = Value for macro = Description - A = false = Encryption module not included, SDHI/SDSI module not included - B = false = Encryption module not included, SDHI/SDSI module included - D = false = Encryption module not included, SDHI/SDSI module included, dual-bank structure - E = true = Encryption module included, SDHI/SDSI module not included - F = true = Encryption module included, SDHI/SDSI module included - H = true = Encryption module included, SDHI/SDSI module included, dual-bank structure -*/ -#define BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED (false) // <-- Updated by GUI. Do not edit this value manually - -/* ROM, RAM, and Data Flash Capacity. - Character(s) = Value for macro = ROM Size/Ram Size/Data Flash Size - 4 = 0x4 = 512KB/256KB/Not equipped - 7 = 0x7 = 768KB/256KB/Not equipped - 9 = 0x9 = 1MB/256KB/Not equipped - C = 0xC = 1.5MB/640KB/32KB - E = 0xE = 2MB/640KB/32KB - NOTE: When the RAM capacity is 640KB, the RAM areas are not contiguous. -*/ -#define BSP_CFG_MCU_PART_MEMORY_SIZE (0xE) // <-- Updated by GUI. Do not edit this value manually - -/* Group name. - Character(s) = Value for macro = Description - 5N/51 = 0x0 = RX65N Group/RX651 Group -*/ -#define BSP_CFG_MCU_PART_GROUP (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Series name. - Character(s) = Value for macro = Description - 56 = 0x0 = RX600 Series -*/ -#define BSP_CFG_MCU_PART_SERIES (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Memory type. - Character(s) = Value for macro = Description - F = 0x0 = Flash memory version -*/ -#define BSP_CFG_MCU_PART_MEMORY_TYPE (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Whether to use 1 stack or 2. RX MCUs have the ability to use 2 stacks: an interrupt stack and a user stack. - * When using 2 stacks the user stack will be used during normal user code. When an interrupt occurs the CPU - * will automatically shift to using the interrupt stack. Having 2 stacks can make it easier to figure out how - * much stack space to allocate since the user does not have to worry about always having enough room on the - * user stack for if-and-when an interrupt occurs. Some users will not want 2 stacks though because it is not - * needed in all applications and can lead to wasted RAM (i.e. space in between stacks that is not used). - * If only 1 stack is used then the interrupt stack is the one that will be used. If 1 stack is chosen then - * the user may want to remove the 'SU' section from the linker sections to remove any linker warnings. - * - * 0 = Use 1 stack. Disable user stack. User stack size set below will be ignored. - * 1 = Use 2 stacks. User stack and interrupt stack will both be used. - */ -#define BSP_CFG_USER_STACK_ENABLE (0) - -#if defined(__CCRX__) || defined(__GNUC__) - -/* When using the user startup program, disable the following code. */ -#if (BSP_CFG_STARTUP_DISABLE == 0) - -/* If only 1 stack is chosen using BSP_CFG_USER_STACK_ENABLE then no RAM will be allocated for the user stack. */ -#if (BSP_CFG_USER_STACK_ENABLE == 1) -/* User Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. */ -#define BSP_CFG_USTACK_BYTES (0) -#endif - -/* Interrupt Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. - * If the interrupt stack is the only stack being used then the user will likely want to increase the default size - * below. - */ -#define BSP_CFG_ISTACK_BYTES (0x1000) - -#endif /* BSP_CFG_STARTUP_DISABLE == 0 */ - -/* Heap size in bytes. - To disable the heap you must follow these steps: - 1) Set this macro (BSP_CFG_HEAP_BYTES) to 0. - 2) Set the macro BSP_CFG_IO_LIB_ENABLE to 0. - 3) Disable stdio from being built into the project library. This is done by going into the Renesas RX Toolchain - settings and choosing the Standard Library section. After that choose 'Standard Library' for Category in HEW or - choose 'Contents' in E2Studio. This will present a list of modules that can be included. Uncheck the box for - stdio.h. -*/ -#define BSP_CFG_HEAP_BYTES (0) - -#endif /* defined(__CCRX__) || defined(__GNUC__) */ - -#if defined(__CCRX__) - -/* Initializes C input & output library functions. - 0 = Disable I/O library initialization in resetprg.c. If you are not using stdio then use this value. - 1 = Enable I/O library initialization in resetprg.c. This is default and needed if you are using stdio. */ -#define BSP_CFG_IO_LIB_ENABLE (1) - -#endif /* defined(__CCRX__) */ - -/* If desired the user may redirect the stdio charget() and/or charput() functions to their own respective functions - by enabling below and providing and replacing the my_sw_... function names with the names of their own functions. */ -#define BSP_CFG_USER_CHARGET_ENABLED (0) -#define BSP_CFG_USER_CHARGET_FUNCTION my_sw_charget_function - -#define BSP_CFG_USER_CHARPUT_ENABLED (0) -#define BSP_CFG_USER_CHARPUT_FUNCTION my_sw_charput_function - -/* After reset MCU will operate in Supervisor mode. To switch to User mode, set this macro to '1'. For more information - on the differences between these 2 modes see the CPU >> Processor Mode section of your MCU's hardware manual. - 0 = Stay in Supervisor mode. - 1 = Switch to User mode. -*/ -#define BSP_CFG_RUN_IN_USER_MODE (0) - -/* Set your desired ID code. NOTE, leave at the default (all 0xFF's) if you do not wish to use an ID code. If you set - this value and program it into the MCU then you will need to remember the ID code because the debugger will ask for - it when trying to connect. Note that the E1/E20 will ignore the ID code when programming the MCU during debugging. - If you set this value and then forget it then you can clear the ID code by connecting up in serial boot mode using - FDT. The ID Code is 16 bytes long. The macro below define the ID Code in 4-byte sections. */ -/* Lowest 4-byte section, address 0xFE7F5D50. From MSB to LSB: ID code 4, ID code 3, ID code 2, ID code 1/Control Code. - */ -#define BSP_CFG_ID_CODE_LONG_1 (0xFFFFFFFF) -/* 2nd ID Code section, address 0xFE7F5D54. From MSB to LSB: ID code 8, ID code 7, ID code 6, ID code 5. */ -#define BSP_CFG_ID_CODE_LONG_2 (0xFFFFFFFF) -/* 3rd ID Code section, address 0xFE7F5D58. From MSB to LSB: ID code 12, ID code 11, ID code 10, ID code 9. */ -#define BSP_CFG_ID_CODE_LONG_3 (0xFFFFFFFF) -/* 4th ID Code section, address 0xFE7F5D5C. From MSB to LSB: ID code 16, ID code 15, ID code 14, ID code 13. */ -#define BSP_CFG_ID_CODE_LONG_4 (0xFFFFFFFF) - -/* Clock source select (CKSEL). - 0 = Low Speed On-Chip Oscillator (LOCO) - 1 = High Speed On-Chip Oscillator (HOCO) - 2 = Main Clock Oscillator - 3 = Sub-Clock Oscillator - 4 = PLL Circuit -*/ -#define BSP_CFG_CLOCK_SOURCE (4) // <-- Updated by GUI. Do not edit this value manually - -/* Main clock Oscillator Switching (MOSEL). - 0 = Resonator - 1 = External clock input -*/ -#define BSP_CFG_MAIN_CLOCK_SOURCE (0) // <-- Updated by GUI. Do not edit this value manually - -/* The sub-clock oscillation control for using the RTC. - When '1' is selected, the registers related to RTC are initialized and the sub-clock oscillator is operated. - 0 = The RTC is not to be used. - 1 = The RTC is to be used. -*/ -#define BSP_CFG_RTC_ENABLE (0) // <-- Updated by GUI. Do not edit this value manually - -/* Sub-Clock Oscillator Drive Capacity Control (RTCDV). - 0 = Drive capacity for standard CL. - 1 = Drive capacity for low CL. -*/ -#define BSP_CFG_SOSC_DRV_CAP (0) // <-- Updated by GUI. Do not edit this value manually //standard CL by default - -/* Clock configuration options. - The input clock frequency is specified and then the system clocks are set by specifying the multipliers used. The - multiplier settings are used to set the clock registers in resetprg.c. If a 24MHz clock is used and the - ICLK is 120MHz, PCLKA is 120MHz, PCLKB is 60MHz, PCLKC is 60MHz, PCLKD is 60MHz, FCLK is 60MHz, USB Clock is 48MHz, - and BCLK is 120MHz then the settings would be: - - BSP_CFG_XTAL_HZ = 24000000 - BSP_CFG_PLL_DIV = 1 (no division) - BSP_CFG_PLL_MUL = 10.0 (24MHz x 10.0 = 240MHz) - BSP_CFG_ICK_DIV = 2 : System Clock (ICLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_ICK_DIV) = 120MHz - BSP_CFG_PCKA_DIV = 2 : Peripheral Clock A (PCLKA) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKA_DIV) = 120MHz - BSP_CFG_PCKB_DIV = 4 : Peripheral Clock B (PCLKB) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKB_DIV) = 60MHz - BSP_CFG_PCKC_DIV = 4 : Peripheral Clock C (PCLKC) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKC_DIV) = 60MHz - BSP_CFG_PCKD_DIV = 4 : Peripheral Clock D (PCLKD) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKD_DIV) = 60MHz - BSP_CFG_FCK_DIV = 4 : Flash IF Clock (FCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_FCK_DIV) = 60MHz - BSP_CFG_BCK_DIV = 2 : External Bus Clock (BCK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_BCK_DIV) = 120MHz - BSP_CFG_UCK_DIV = 5 : USB Clock (UCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_UCK_DIV) = 48MHz -*/ - -/* Input clock frequency in Hz (XTAL or EXTAL). */ -#define BSP_CFG_XTAL_HZ (12000000) // <-- Updated by GUI. Do not edit this value manually - -/* The HOCO can operate at several different frequencies. Choose which one using the macro below. - Available frequency settings: - 0 = 16MHz (default) - 1 = 18MHz - 2 = 20MHz -*/ -#define BSP_CFG_HOCO_FREQUENCY (0) // <-- Updated by GUI. Do not edit this value manually - -/* PLL clock source (PLLSRCEL). Choose which clock source to input to the PLL circuit. - Available clock sources: - 0 = Main clock (default) - 1 = HOCO -*/ -#define BSP_CFG_PLL_SRC (0) // <-- Updated by GUI. Do not edit this value manually - -/* PLL Input Frequency Division Ratio Select (PLIDIV). - Available divisors = /1 (no division), /2, /3 -*/ -#define BSP_CFG_PLL_DIV (1) // <-- Updated by GUI. Do not edit this value manually - -/* PLL Frequency Multiplication Factor Select (STC). - Available multipliers = x10.0 to x30.0 in 0.5 increments (e.g. 10.0, 10.5, 11.0, 11.5, ..., 29.0, 29.5, 30.0) -*/ -#define BSP_CFG_PLL_MUL (20.0) // <-- Updated by GUI. Do not edit this value manually - -/* System Clock Divider (ICK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_ICK_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock A Divider (PCKA). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKA_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock B Divider (PCKB). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKB_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock C Divider (PCKC). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKC_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock D Divider (PCKD). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKD_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* External Bus Clock Divider (BCLK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_BCK_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Flash IF Clock Divider (FCK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_FCK_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* USB Clock Divider Select. - Available divisors = /2, /3, /4, /5 -*/ -#define BSP_CFG_UCK_DIV (5) // <-- Updated by GUI. Do not edit this value manually - -/* Configure BCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency, 2= BCK/2 frequency -*/ -#define BSP_CFG_BCLK_OUTPUT (0) // <-- Updated by GUI. Do not edit this value manually - -/* Configure SDCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency -*/ -#define BSP_CFG_SDCLK_OUTPUT (0) // <-- Updated by GUI. Do not edit this value manually - -/* Main Clock Oscillator Wait Time (MOSCWTCR). - The value of MOSCWTCR register required for correspondence with the waiting time required to secure stable oscillation - by the main clock oscillator is obtained by using the maximum frequency for fLOCO in the formula below. - - BSP_CFG_MOSC_WAIT_TIME > (tMAINOSC * (fLOCO_max) + 16)/32 - (tMAINOSC: main clock oscillation stabilization time; fLOCO_max: maximum frequency for fLOCO) - - If tMAINOSC is 9.98 ms and fLOCO_max is 264 kHz (the period is 1/3.78 us), the formula gives - BSP_CFG_MOSC_WAIT_TIME > (9.98 ms * (264 kHZ) + 16)/32 = 82.83, so set the BSP_CFG_MOSC_WAIT_TIME to 83(53h). - - NOTE: The waiting time is not required when an external clock signal is input for the main clock oscillator. - Set the BSP_CFG_MOSC_WAIT_TIME to 00h. -*/ -#define BSP_CFG_MOSC_WAIT_TIME (0x53) // <-- Updated by GUI. Do not edit this value manually - -/* Sub-Clock Oscillator Wait Time (SOSCWTCR). - The value of SOSCWTCR register required for correspondence with the expected time to secure settling of oscillation - by the sub-clock oscillator is obtained by using the maximum frequency for fLOCO in the formula below. - - BSP_CFG_SOSC_WAIT_TIME > (tSUBOSC * (fLOCO_max) + 16)/16384 - (tSUBOSC: sub-clock oscillation stabilization time; fLOCO_max: maximum frequency for fLOCO) - - If tSUBOSC is 2 s and fLOCO is 264 kHz (the period is 1/3.78 us), the formula gives - BSP_CFG_SOSC_WAIT_TIME > (2 s * (264 kHz) +16)/16384 = 32.22, so set the BSP_CFG_SOSC_WAIT_TIME bits to 33(21h). -*/ -#define BSP_CFG_SOSC_WAIT_TIME (0x21) // <-- Updated by GUI. Do not edit this value manually - -/* ROM Cache Enable Register (ROMCE). - 0 = ROM cache operation disabled. - 1 = ROM cache operation enabled. -*/ -#define BSP_CFG_ROM_CACHE_ENABLE (0) - -/* Configure WDT and IWDT settings. - OFS0 - Option Function Select Register 0 - b31:b29 Reserved When reading, these bits return the value written by the user. The write value should be 1. - b28 WDTRSTIRQS - WDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b27:b26 WDTRPSS - WDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b25:b24 WDTRPES - WDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b23:b20 WDTCKS - WDT Clock Frequency Division Ratio - (1=PCLKB/4, 4=PCLKB/64, 0xF=PCLKB/128, 6=PCLKB/256, - 7=PCLKB/2048, 8=PCLKB/8192) - b19:b18 WDTTOPS - WDT Timeout Period Select (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b17 WDTSTRT - WDT Start Mode Select - (0=auto-start after reset, 1=halt after reset) - b16:b15 Reserved (set to 1) - b14 IWDTSLCSTP - IWDT Sleep Mode Count Stop Control - (0=can't stop count, 1=stop w/some low power modes) - b13 Reserved (set to 1) - b12 IWDTRSTIRQS - IWDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b11:b10 IWDTRPSS - IWDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b9:b8 IWDTRPES - IWDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b7:b4 IWDTCKS - IWDT Clock Frequency Division Ratio - (0=none, 2=/16, 3 = /32, 4=/64, 0xF=/128, 5=/256) - b3:b2 IWDTTOPS - IWDT Timeout Period Select - (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b1 IWDTSTRT - IWDT Start Mode Select - (0=auto-start after reset, 1=halt after reset) - b0 Reserved (set to 1) -*/ -#define BSP_CFG_OFS0_REG_VALUE (0xFFFFFFFF) // <-- Updated by GUI. Do not edit this value manually //Disable by default - -/* Configure whether voltage detection 0 circuit and HOCO are enabled after reset. - OFS1 - Option Function Select Register 1 - b31:b9 Reserved (set to 1) - b8 HOCOEN - Enable/disable HOCO oscillation after a reset (0=enable, 1=disable) - b7:b3 Reserved When reading, these bits return the value written by the user. The write value should be 1. - b2 LVDAS - Voltage Detection 0 circuit start (1=monitoring disabled) - b1:b0 VDSEL - Voltage Detection 0 level select (1=2.94v, 2=2.87v, 3=2.80v) - NOTE: If HOCO oscillation is enabled by OFS1.HOCOEN, HOCO frequency is 16MHz. - BSP_CFG_HOCO_FREQUENCY should be default value. -*/ -#define BSP_CFG_OFS1_REG_VALUE (0xFFFFFFFF) // <-- Updated by GUI. Do not edit this value manually //Disable by default - -/* Trusted memory is facility to prevent the reading of blocks 8 and 9 and blocks 46 and 47 (in dual mode) in - the code flash memory by third party software. This feature is disabled by default. - TMEF - TM Enable Flag Register - b31 Reserved (set to 1) - b30:b28 TMEFDB - Dual-Bank TM Enable - 000: The TM function in the address range from FFEE 0000h to - FFEE FFFFh is enabled in dual mode. - - 111: The TM function in the address range from FFEE 0000h to - FFEE FFFFh is disabled in dual mode. - b27 Reserved (set to 1) - b26:b24 TMEFF - TM Enable - 000: TM function is enabled. - - 111: TM function is disabled. - b23:b0 Reserved (set to 1) - NOTE: If the dual bank function has not been incorporated in a device, - TMEFDB bits [b30:b26] are reserved area. -*/ -#define BSP_CFG_TRUSTED_MODE_FUNCTION (0xFFFFFFFF) //Disable by default - -/* Configure FAW register is used to set the write protection flag and boot area select flag - for setting the flash access window startaddress and flash access window end address. - FAW - Flash Access Window Setting Register - b31 BTFLG - Boot Area Select Flag - 0: FFFF C000h to FFFF DFFFh are used as the boot area - - 1: FFFF E000h to FFFF FFFFh are used as the boot area - b30:b28 Reserved - When reading, these bits return the value written by the user.The write value should be 1. - b27:b16 FAWE - Flash Access Window End Address - Flash access window end address - b15 FSPR - Access Window Protection Flag - 0: With protection (P/E disabled) - - 1: Without protection (P/E enabled) - b14:b12 Reserved - When reading, these bits return the value written by the user.The write value should be 1. - b11:b0 FAWS - Flash Access Window Start Address - Flash access window start address - NOTE: Once 0 is written to this bit, the bit can never be restored to 1. - Therefore, the access window and the BTFLG bit never be set again or the TM function - never be disabled once it has been enabled. - Exercise extra caution when handling the FSPR bit. -*/ -#define BSP_CFG_FAW_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* The ROM code protection register is a function to prohibit reading from or programming to the flash memory - when the flash programmer is used during off-board programming. - ROMCODE - ROM Code Protection Register - b31:b0 ROM Code - 0000 0000h: ROM code protection enabled (ROM code protection 1). - 0000 0001h: ROM code protection enabled (ROM code protection 2). - Other than above: ROM code protection disabled. - Note. The ROMCODE register should be set in 32-bit units. -*/ -#define BSP_CFG_ROMCODE_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* Select the bank mode of dual-bank function of the code flash memory. - 0 = Dual mode. - 1 = Linear mode. - NOTE: If the dual bank function has been incorporated in a device, select the bank mode in this macro. - Default setting of the bank mode is linear mode. - If the dual bank function has not been incorporated in a device, this macro should be 1. -*/ -#define BSP_CFG_CODE_FLASH_BANK_MODE (1) //Linear mode by default - -/* Select the startup bank of the program when dual bank function is in dual mode. - 0 = The address range of bank 1 from FFE00000h to FFEFFFFFh and bank 0 from FFF00000h to FFFFFFFFh. - 1 = The address range of bank 1 from FFF00000h to FFFFFFFFh and bank 0 from FFE00000h to FFEFFFFFh. - NOTE: If the dual bank function has been incorporated in a device, select the start bank in this macro. - Default setting of the start bank is bank0. - If the dual bank function has not been incorporated in a device, this macro should be 0. -*/ -#define BSP_CFG_CODE_FLASH_START_BANK (0) //Bank0 by default - -/* This macro lets other modules no if a RTOS is being used. - 0 = RTOS is not used. - 1 = FreeRTOS is used. - 2 = embOS is used.(This is not available.) - 3 = MicroC_OS is used.(This is not available.) - 4 = RI600V4 or RI600PX is used.(This is not available.) -*/ -/* As of today, we need a workaround to avoid the problem that the Smart Configurator does not have such GUI - yet and the BSP_CFG_RTOS_USED here is set to (0) every time of code generation by the Smart Configurator. - The BSP_CFG_RTOS_USED is set to (1) in the r_bsp.h instead of here so that the setting of here is ignored. -*/ -#if !defined(BSP_CFG_RTOS_USED) || (BSP_CFG_RTOS_USED == 0) -#if defined(BSP_CFG_RTOS_USED) -#undef BSP_CFG_RTOS_USED -#endif -#define BSP_CFG_RTOS_USED (0) // <-- Updated by GUI. Do not edit this value manually -#endif - -/* This macro is used to select which CMT channel used for system timer of RTOS. - * The setting of this macro is only valid if the macro BSP_CFG_RTOS_USED is set to a value other than 0. */ -#if (BSP_CFG_RTOS_USED != 0) -/* Setting value. - * 0 = CMT channel 0 used for system timer of RTOS (recommended to be used for RTOS). - * 1 = CMT channel 1 used for system timer of RTOS. - * 2 = CMT channel 2 used for system timer of RTOS. - * 3 = CMT channel 3 used for system timer of RTOS. - * Others = Invalid. */ -#define BSP_CFG_RTOS_SYSTEM_TIMER (0) -#endif - -/* By default modules will use global locks found in mcu_locks.c. If the user is using a RTOS and would rather use its - locking mechanisms then they can change this macro. - NOTE: If '1' is chosen for this macro then the user must also change the next macro 'BSP_CFG_USER_LOCKING_TYPE'. - 0 = Use default locking (non-RTOS) - 1 = Use user defined locking mechanism. -*/ -#define BSP_CFG_USER_LOCKING_ENABLED (0) - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to redefine the typedef - that is used for the locks. If the user is using a RTOS then they would likely redefine the typedef to be - a semaphore/mutex type of their RTOS. Use the macro below to set the type that will be used for the locks. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_TYPE bsp_lock_t - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to define the functions - that will handle the locking and unlocking. These functions should be defined below. - If BSP_CFG_USER_LOCKING_ENABLED is != 0: - R_BSP_HardwareLock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION(mcu_lock_t hw_index) - R_BSP_HardwareUnlock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION(mcu_lock_t hw_index) - NOTE:With these functions the index into the array holding the global hardware locks is passed as the parameter. - R_BSP_SoftwareLock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - R_BSP_SoftwareUnlock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - NOTE:With these functions the actual address of the lock to use is passed as the parameter. - NOTE: These functions must return a boolean. If lock was obtained or released successfully then return true. Else, - return false. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION my_hw_locking_function -#define BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION my_hw_unlocking_function -#define BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION my_sw_locking_function -#define BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION my_sw_unlocking_function - -/* If the user would like to determine if a warm start reset has occurred, then they may enable one or more of the - * following callback definitions AND provide a call back function name for the respective callback - * function (to be defined by the user). Setting BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED = 1 will result - * in a callback to the user defined my_sw_warmstart_prec_function just prior to the initialization of the C - * runtime environment by resetprg. - * - * Setting BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED = 1 will result in a callback to the user defined - * my_sw_warmstart_postc_function just after the initialization of the C runtime environment by resetprg. - */ -#define BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_PRE_C_FUNCTION my_sw_warmstart_prec_function - -#define BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_POST_C_FUNCTION my_sw_warmstart_postc_function - -/* By default FIT modules will check input parameters to be valid. This is helpful during development but some users - will want to disable this for production code. The reason for this would be to save execution time and code space. - This macro is a global setting for enabling or disabling parameter checking. Each FIT module will also have its - own local macro for this same purpose. By default the local macros will take the global value from here though - they can be overridden. Therefore, the local setting has priority over this global setting. Disabling parameter - checking should only used when inputs are known to be good and the increase in speed or decrease in code space is - needed. - 0 = Global setting for parameter checking is disabled. - 1 = Global setting for parameter checking is enabled (Default). -*/ -#define BSP_CFG_PARAM_CHECKING_ENABLE (1) - -/* The extended bus master has five transfer sources: EDMAC, GLCDC-GRA1 (GLCDC graphics 1 data read), GLCDCGRA2 (GLCDC - graphics 2 data read), DRW2D-TX (DRW2D texture data read), and DRW2D-FB (DRW2D frame buffer data read write and - display list data read). - The default priority order in bsp is below - GLCDC-GRA1 > GLCDC-GRA2 > DRW2D-TX > DRW2D-FB > EDMAC. - Priority can be changed with this macro. - - Extended Bus Master Priority setting - 0 = GLCDC graphics 1 data read - 1 = DRW2D texture data read - 2 = DRW2D frame buffer data read write and display list data read - 3 = GLCDC graphics 2 data read - 4 = EDMAC - - Note : This macro is only available for products with at least 1.5 Mbytes of code flash memory. - Settings other than above are prohibited. - Duplicate priority settings can not be made. -*/ -#define BSP_CFG_EBMAPCR_1ST_PRIORITY (0) /* Extended Bus Master 1st Priority Selection */ -#define BSP_CFG_EBMAPCR_2ND_PRIORITY (3) /* Extended Bus Master 2nd Priority Selection */ -#define BSP_CFG_EBMAPCR_3RD_PRIORITY (1) /* Extended Bus Master 3rd Priority Selection */ -#define BSP_CFG_EBMAPCR_4TH_PRIORITY (2) /* Extended Bus Master 4th Priority Selection */ -#define BSP_CFG_EBMAPCR_5TH_PRIORITY (4) /* Extended Bus Master 5th Priority Selection */ - -/* This macro is used to define the voltage that is supplied to the MCU (Vcc). This macro is defined in millivolts. This - macro does not actually change anything on the MCU. Some FIT modules need this information so it is defined here. */ -#define BSP_CFG_MCU_VCC_MV (3300) // <-- Updated by GUI. Do not edit this value manually - -/* Allow initialization of auto-generated peripheral initialization code by Smart Configurator tool. - When not using the Smart Configurator, set the value of BSP_CFG_CONFIGURATOR_SELECT to 0. - 0 = Disabled (default) - 1 = Smart Configurator initialization code used -*/ -#define BSP_CFG_CONFIGURATOR_SELECT (1) // <-- Updated by GUI. Do not edit this value manually - -/* For some BSP functions, it is necessary to ensure that, while these functions are executing, interrupts from other - FIT modules do not occur. By controlling the IPL, these functions disable interrupts that are at or below the - specified interrupt priority level. - This macro sets the IPL. Range is 0x0 - 0xF. - Please set this macro more than IPR for other FIT module interrupts. - The default value is 0xF (maximum value). - Don't change if there is no special processing with higher priority than all fit modules. -*/ -#define BSP_CFG_FIT_IPL_MAX (0xF) - -/* This macro is used to select which SCI channel used for debug serial terminal. - */ -#define MY_BSP_CFG_SERIAL_TERM_SCI (2) - -#endif /* R_BSP_CONFIG_REF_HEADER_FILE */ - diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/r_config/r_bsp_config_readme.txt b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/r_config/r_bsp_config_readme.txt deleted file mode 100644 index 6a9002cf4f3..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/r_config/r_bsp_config_readme.txt +++ /dev/null @@ -1,12 +0,0 @@ -FIT r_config folder -------------------- -The purpose of the r_config folder is to provide one place where the user can store all of their FIT configuration -files. Putting the files in one place makes them easy to find, backup, and put in a version control system. - -FIT Modules are distributed with a reference configuration file. These files end with '_reference.h'. For example, -the reference configuration file for the r_bsp is named r_bsp_config_reference.h. Reference configuration files are -provided so that the user always has a known-good configuration to revert to. When adding a FIT Module to a project the -user should copy this reference configuration file to this folder and remove '_reference' from the filename -(r_bsp_config_reference.h is renamed to r_bsp_config.h). For the r_bsp the reference configuration file can be found in -the 'board' folder for the currently chosen development board. For other FIT Modules the reference configuration file -can be found in the 'ref' folder of the FIT Module. diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/r_config/r_bsp_interrupt_config.h b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/r_config/r_bsp_interrupt_config.h deleted file mode 100644 index 1346f175b23..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/r_config/r_bsp_interrupt_config.h +++ /dev/null @@ -1,214 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_interrupt_config.h -* Description : This module maps Interrupt A & B interrupts. More information on how this is done is given below. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -* : 15.05.2017 2.00 Changed the name of the following macro definition, because there was a mistake -* in the name of macro definition. -* - From XXX_TPU0_TGI0V to XXX_TPU0_TCI0V. -* - From XXX_TPU1_TGI1V to XXX_TPU1_TCI1V. -* - From XXX_TPU1_TGI1U to XXX_TPU1_TCI1U. -* - From XXX_TPU2_TGI2V to XXX_TPU2_TCI2V. -* - From XXX_TPU2_TGI2U to XXX_TPU2_TCI2U. -* - From XXX_TPU3_TGI3V to XXX_TPU3_TCI3V. -* - From XXX_TPU4_TGI4V to XXX_TPU4_TCI4V. -* - From XXX_TPU4_TGI4U to XXX_TPU4_TCI4U. -* - From XXX_TPU5_TGI5V to XXX_TPU5_TCI5V. -* - From XXX_TPU5_TGI5U to XXX_TPU5_TCI5U. -* - From XXX_MTU0_TGIV0 to XXX_MTU0_TCIV0. -* - From XXX_MTU1_TGIV1 to XXX_MTU1_TCIV1. -* - From XXX_MTU1_TGIU1 to XXX_MTU1_TCIU1. -* - From XXX_MTU2_TGIV2 to XXX_MTU2_TCIV2. -* - From XXX_MTU2_TGIU2 to XXX_MTU2_TCIU2. -* - From XXX_MTU3_TGIV3 to XXX_MTU3_TCIV3. -* - From XXX_MTU4_TGIV4 to XXX_MTU4_TCIV4. -* - From XXX_MTU6_TGIV6 to XXX_MTU6_TCIV6. -* - From XXX_MTU7_TGIV7 to XXX_MTU7_TCIV7. -* - From XXX_MTU8_TGIV8 to XXX_MTU8_TCIV8. -* Added select processing of the following software configurable interrupt source. -* - TSIP_PROC_BUSY -* - TSIP_ROMOK -* - TSIP_LONG_PLG -* - TSIP_TEST_BUSY -* - TSIP_WRRDY0 -* - TSIP_WRRDY1 -* - TSIP_WRRDY4 -* - TSIP_RDRDY0 -* - TSIP_RDRDY1 -* - TSIP_INTEGRATE_WRRDY -* - TSIP_INTEGRATE_RDRDY -***********************************************************************************************************************/ -#ifndef R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE -#define R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/* If you wish to use one of the interrupt below then set the appropriate configuration macro to the vector number you - * wish to use for that interrupt. For example, if you want to use the RTC carry interrupt (CUP) at vector 176 then you - * would do the following: - * - * #define BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP 176 - */ - -/* Interrupt B Sources. - * -Valid vector numbers are 128-207. - * -There are more vector slots for B sources than actual B sources. By default all B sources are mapped. - * -If using the 'TPU1, TGI1A' interrupt it must be vector 144 or 145. It is set to 144 by default. - * -If a peripheral interrupt is going to be used to wake up the MCU from All-Module Clock Stop Mode then it must be - * in a vector between 146 to 157. Peripheral interrupts that can do this are TMR interrupts and the 'USB0, USBI0' - * interrupt. By default the TMR interrupts are chosen since there are 12 of them and there are 12 slots. - */ -#define BSP_MAPPED_INT_CFG_B_VECT_CMT2_CMI2 128 -#define BSP_MAPPED_INT_CFG_B_VECT_CMT3_CMI3 129 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIA0 146 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIB0 147 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_OVI0 148 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIA1 149 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIB1 150 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_OVI1 151 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIA2 152 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIB2 153 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_OVI2 154 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIA3 155 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIB3 156 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_OVI3 157 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0A 130 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0B 131 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0C 132 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0D 133 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TCI0V 134 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1A 144 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1B 135 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1V 136 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1U 137 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2A 138 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2B 139 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2V 140 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2U 141 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3A 142 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3B 143 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3C 145 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3D 158 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TCI3V 159 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4A 160 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4B 161 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4V 162 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4U 163 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5A 164 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5B 165 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5V 166 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5U 167 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC0I0 168 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC1I0 169 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC0I0 170 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC1I0 171 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC0I1 172 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC1I1 173 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC0I1 174 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC1I1 175 -#define BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP 176 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXF0 177 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXF0 178 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXM0 179 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXM0 180 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXF1 181 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXF1 182 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXM1 183 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXM1 184 -#define BSP_MAPPED_INT_CFG_B_VECT_USB0_USBI0 185 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12ADI0 186 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GBADI0 187 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GCADI0 188 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12ADI1 189 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GBADI1 190 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GCADI1 191 -#define BSP_MAPPED_INT_CFG_B_VECT_RNG_RNGEND -#define BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR18I 193 -#define BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR19I 194 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_PROC_BUSY 195 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_ROMOK 196 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_LONG_PLG 197 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_TEST_BUSY 198 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY0 199 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY1 200 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY4 201 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY0 202 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY1 203 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_WRRDY 204 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_RDRDY 205 - -/* Interrupt A Sources. - * -Valid vector numbers are 208-255. - * -There are more A sources than A vector slots. By default none of the GPT interrupts are mapped. - * -If using the 'MTU1, TGI1A' interrupt it must be vector 208 or 209. It is set to 208 by default. - */ -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIA0 209 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIB0 210 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIC0 211 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGID0 212 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TCIV0 213 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIE0 214 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIF0 215 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIA1 208 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIB1 216 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIV1 217 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIU1 218 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIA2 219 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIB2 220 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIV2 221 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIU2 222 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIA3 223 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIB3 224 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIC3 225 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGID3 226 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TCIV3 227 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIA4 228 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIB4 229 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIC4 230 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGID4 231 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TCIV4 232 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIU5 233 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIV5 234 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIW5 235 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIA6 236 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIB6 237 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIC6 238 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGID6 239 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TCIV6 240 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIA7 241 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIB7 242 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIC7 243 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGID7 244 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TCIV7 245 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIA8 246 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIB8 247 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIC8 248 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGID8 249 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TCIV8 250 -#define BSP_MAPPED_INT_CFG_A_VECT_AES_AESRDY -#define BSP_MAPPED_INT_CFG_A_VECT_AES_AESEND - -#endif /* R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE */ - diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/r_pincfg/Pin.c b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/r_pincfg/Pin.c deleted file mode 100644 index 3f2917ae56c..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/r_pincfg/Pin.c +++ /dev/null @@ -1,111 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : Pin.c -* Version : 1.0.2 -* Device(s) : R5F565NEDxFB -* Description : This file implements SMC pin code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -/* Start user code for include. Do not edit comment generated here */ -#include "Pin.h" -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: R_Pins_Create -* Description : This function initializes Smart Configurator pins -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Pins_Create(void) -{ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC); - - /* Set ET0_MDC pin */ - MPC.P72PFS.BYTE = 0x11U; - PORT7.PMR.BYTE |= 0x04U; - - /* Set ET0_MDIO pin */ - MPC.P71PFS.BYTE = 0x11U; - PORT7.PMR.BYTE |= 0x02U; - - /* Set REF50CK0 pin */ - MPC.P76PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x40U; - - /* Set RMII0_CRS_DV pin */ - MPC.P83PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x08U; - - /* Set RMII0_RXD0 pin */ - MPC.P75PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x20U; - - /* Set RMII0_RXD1 pin */ - MPC.P74PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x10U; - - /* Set RMII0_RX_ER pin */ - MPC.P77PFS.BYTE = 0x12U; - PORT7.PMR.BYTE |= 0x80U; - - /* Set RMII0_TXD0 pin */ - MPC.P81PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x02U; - - /* Set RMII0_TXD1 pin */ - MPC.P82PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x04U; - - /* Set RMII0_TXD_EN pin */ - MPC.P80PFS.BYTE = 0x12U; - PORT8.PMR.BYTE |= 0x01U; - - /* Set RXD2 pin */ - MPC.P52PFS.BYTE = 0x0AU; - PORT5.PMR.BYTE |= 0x04U; - - /* Set TXD2 pin */ - PORT5.PODR.BYTE |= 0x01U; - MPC.P50PFS.BYTE = 0x0AU; - PORT5.PDR.BYTE |= 0x01U; - - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC); -} - diff --git a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/r_pincfg/Pin.h b/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/r_pincfg/Pin.h deleted file mode 100644 index 161cdbb1940..00000000000 --- a/demos/renesas/rx65n-envision-kit/gnurx-e2studio/src/smc_gen/r_pincfg/Pin.h +++ /dev/null @@ -1,50 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : Pin.h -* Version : 1.0.2 -* Device(s) : R5F565NEDxFB -* Description : This file implements SMC pin code generation. -* Creation Date: 2019-03-02 -***********************************************************************************************************************/ - -#ifndef PIN_H -#define PIN_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Pins_Create(void); -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/ProjectConnection.ipcf b/demos/renesas/rx65n-envision-kit/iar-ewrx/ProjectConnection.ipcf deleted file mode 100644 index b799641c814..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/ProjectConnection.ipcf +++ /dev/null @@ -1,5 +0,0 @@ - - - - - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/aws_demos.dep b/demos/renesas/rx65n-envision-kit/iar-ewrx/aws_demos.dep deleted file mode 100644 index d1414f5930b..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/aws_demos.dep +++ /dev/null @@ -1,5573 +0,0 @@ - - - 4 - 573248198 - - Debug - - $PROJ_DIR$\Debug\Obj\padlock.pbi - $PROJ_DIR$\Debug\Obj\gcm.pbi - $PROJ_DIR$\Debug\Obj\ecp.pbi - $PROJ_DIR$\Debug\Obj\ecp_curves.pbi - $PROJ_DIR$\Debug\Obj\pk_wrap.pbi - $PROJ_DIR$\Debug\Obj\aes.o - $PROJ_DIR$\Debug\Obj\aws_ota_cbor.pbi - $PROJ_DIR$\Debug\Obj\aws_mqtt_lib.o - $PROJ_DIR$\Debug\Obj\des.pbi - $PROJ_DIR$\Debug\Obj\aws_secure_sockets.o - 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- - $PROJ_DIR$\..\..\..\..\lib\third_party\tracealyzer_recorder\Include\trcRecorder.h - - - - streamports - - Jlink_RTT - - include - - $PROJ_DIR$\..\..\..\..\lib\third_party\tracealyzer_recorder\streamports\Jlink_RTT\include\SEGGER_RTT.h - - - $PROJ_DIR$\..\..\..\..\lib\third_party\tracealyzer_recorder\streamports\Jlink_RTT\include\SEGGER_RTT_Conf.h - - - $PROJ_DIR$\..\..\..\..\lib\third_party\tracealyzer_recorder\streamports\Jlink_RTT\include\trcStreamingPort.h - - - - $PROJ_DIR$\..\..\..\..\lib\third_party\tracealyzer_recorder\streamports\Jlink_RTT\Readme-Streamport.txt - - - $PROJ_DIR$\..\..\..\..\lib\third_party\tracealyzer_recorder\streamports\Jlink_RTT\SEGGER_RTT.c - - - $PROJ_DIR$\..\..\..\..\lib\third_party\tracealyzer_recorder\streamports\Jlink_RTT\SEGGER_RTT_Printf.c - - - - TCPIP - - include - - $PROJ_DIR$\..\..\..\..\lib\third_party\tracealyzer_recorder\streamports\TCPIP\include\trcStreamingPort.h - - - - $PROJ_DIR$\..\..\..\..\lib\third_party\tracealyzer_recorder\streamports\TCPIP\Readme-Streamport.txt - - - $PROJ_DIR$\..\..\..\..\lib\third_party\tracealyzer_recorder\streamports\TCPIP\trcStreamingPort.c - - - - USB_CDC - - include - - $PROJ_DIR$\..\..\..\..\lib\third_party\tracealyzer_recorder\streamports\USB_CDC\include\trcStreamingPort.h - - - - $PROJ_DIR$\..\..\..\..\lib\third_party\tracealyzer_recorder\streamports\USB_CDC\Readme-Streamport.txt - - - $PROJ_DIR$\..\..\..\..\lib\third_party\tracealyzer_recorder\streamports\USB_CDC\trcStreamingPort.c - - - - - $PROJ_DIR$\..\..\..\..\lib\third_party\tracealyzer_recorder\readme.txt - - - $PROJ_DIR$\..\..\..\..\lib\third_party\tracealyzer_recorder\ReadMe.url - - - $PROJ_DIR$\..\..\..\..\lib\third_party\tracealyzer_recorder\trcKernelPort.c - - - $PROJ_DIR$\..\..\..\..\lib\third_party\tracealyzer_recorder\trcSnapshotRecorder.c - - - $PROJ_DIR$\..\..\..\..\lib\third_party\tracealyzer_recorder\trcStreamingRecorder.c - - - - $PROJ_DIR$\..\..\..\..\lib\third_party\directories.txt - - - - tls - - $PROJ_DIR$\..\..\..\..\lib\tls\aws_tls.c - - - - utils - - $PROJ_DIR$\..\..\..\..\lib\utils\aws_system_init.c - - - - wifi - - portable - - renesas - - x65n-envision-kit - - $PROJ_DIR$\..\..\..\..\lib\wifi\portable\renesas\rx65n-envision-kit\aws_wifi.c - - - - - - - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/aws_demos.eww b/demos/renesas/rx65n-envision-kit/iar-ewrx/aws_demos.eww deleted file mode 100644 index ddf0058477a..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/aws_demos.eww +++ /dev/null @@ -1,7 +0,0 @@ - - - - $WS_DIR$\aws_demos.ewp - - - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/settings/FITModuleImporter.xml b/demos/renesas/rx65n-envision-kit/iar-ewrx/settings/FITModuleImporter.xml deleted file mode 100644 index 3779f372d84..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/settings/FITModuleImporter.xml +++ /dev/null @@ -1,8 +0,0 @@ - - - 1.0 - any - any - any - - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/settings/aws_demos.Debug.cspy.bat b/demos/renesas/rx65n-envision-kit/iar-ewrx/settings/aws_demos.Debug.cspy.bat deleted file mode 100644 index 03ac51d74ff..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/settings/aws_demos.Debug.cspy.bat +++ /dev/null @@ -1,40 +0,0 @@ -@REM ã“ã®ãƒãƒƒãƒãƒ•ã‚¡ã‚¤ãƒ«ã¯IAR Embedded WorkbenchC-SPYデãƒãƒƒã‚¬ã«ã‚ˆã£ã¦ -@REM é©åˆ‡ãªè¨­å®šã‚’使用ã™ã‚‹cspybatコマンドライン -@REM ユーティリティを実行ã™ã‚‹ãŸã‚ã®ã‚³ãƒžãƒ³ãƒ‰ãƒ©ã‚¤ãƒ³ã®æº–備を支æ´ã™ã‚‹ã‚‚ã®ã¨ã—ã¦ç”Ÿæˆã•ã‚Œã¦ã„ã¾ã™ã€‚ -@REM -@REM ã“ã®ãƒ•ã‚¡ã‚¤ãƒ«ã¯æ–°ã—ã„デãƒãƒƒã‚°ã‚»ãƒƒã‚·ãƒ§ãƒ³ãŒåˆæœŸåŒ–ã•ã‚Œã‚‹ãŸã³ã«ç”Ÿæˆã•ã‚Œã‚‹ãŸã‚〠-@REM ファイルをå称変更ã¾ãŸã¯ç§»å‹•ã—ã¦ã‹ã‚‰ -@REM 変更を行ã†ã“ã¨ã‚’推奨ã—ã¾ã™ã€‚ -@REM -@REM cspybatã¯ã€ã“ã®ãƒãƒƒãƒãƒ•ã‚¡ã‚¤ãƒ«åã«ç¶šã„ã¦ãƒ‡ãƒãƒƒã‚°ãƒ•ã‚¡ã‚¤ãƒ«å(通常ã¯ELF/DWARFã¾ãŸã¯UBROFファイル)を入力ã™ã‚‹ã“ã¨ã«ã‚ˆã‚Šã€ -@REM èµ·å‹•ã§ãã¾ã™ã€‚ -@REM -@REM 使用å¯èƒ½ãªã‚³ãƒžãƒ³ãƒ‰ãƒ©ã‚¤ãƒ³ã®ãƒ‘ラメータã«ã¤ã„ã¦ã¯ã€C-SPYデãƒãƒƒã‚°ã‚¬ã‚¤ãƒ‰ã‚’å‚ç…§ã—ã¦ãã ã•ã„。 -@REM 特定ã®å ´åˆã«å½¹ç«‹ã¤ã‚³ãƒžãƒ³ãƒ‰ãƒ©ã‚¤ãƒ³ãƒ‘ラメータã«é–¢ã™ã‚‹ä»–ã®ãƒ’ント -@REM : -@REM --download_only 後ã«ãƒ‡ãƒãƒƒã‚°ã‚»ãƒƒã‚·ãƒ§ãƒ³ã‚’èµ·å‹•ã›ãšã«ã‚³ãƒ¼ãƒ‰ã®ã‚¤ãƒ¡ãƒ¼ã‚¸ã‚’ダウンロードã—ã¾ã™ -@REM 。 -@REM --silent サインオンã®ãƒ¡ãƒƒã‚»ãƒ¼ã‚¸ã‚’çœç•¥ã—ã¾ã™ã€‚ -@REM --timeout 実行時間ã®ä¸Šé™ã‚’設定ã—ã¾ã™ã€‚ -@REM - - -@echo off - -if not "%~1" == "" goto debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.1\common\bin\cspybat" -f "C:\Users\a5088582\Desktop\AmazonFreeRTOS\test\demos\renesas\rx65n-envision-kit\iar-ewrx\settings\aws_demos.Debug.general.xcl" --backend -f "C:\Users\a5088582\Desktop\AmazonFreeRTOS\test\demos\renesas\rx65n-envision-kit\iar-ewrx\settings\aws_demos.Debug.driver.xcl" - -@echo off -goto end - -:debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.1\common\bin\cspybat" -f "C:\Users\a5088582\Desktop\AmazonFreeRTOS\test\demos\renesas\rx65n-envision-kit\iar-ewrx\settings\aws_demos.Debug.general.xcl" "--debug_file=%~1" --backend -f "C:\Users\a5088582\Desktop\AmazonFreeRTOS\test\demos\renesas\rx65n-envision-kit\iar-ewrx\settings\aws_demos.Debug.driver.xcl" - -@echo off -:end \ No newline at end of file diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/settings/aws_demos.Debug.cspy.ps1 b/demos/renesas/rx65n-envision-kit/iar-ewrx/settings/aws_demos.Debug.cspy.ps1 deleted file mode 100644 index da6af0e345e..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/settings/aws_demos.Debug.cspy.ps1 +++ /dev/null @@ -1,31 +0,0 @@ -param([String]$debugfile = ""); - -# This powershell file has been generated by the IAR Embedded Workbench -# C - SPY Debugger, as an aid to preparing a command line for running -# the cspybat command line utility using the appropriate settings. -# -# Note that this file is generated every time a new debug session -# is initialized, so you may want to move or rename the file before -# making changes. -# -# You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed -# by the name of the debug file (usually an ELF / DWARF or UBROF file). -# -# Read about available command line parameters in the C - SPY Debugging -# Guide. Hints about additional command line parameters that may be -# useful in specific cases : -# --download_only Downloads a code image without starting a debug -# session afterwards. -# --silent Omits the sign - on message. -# --timeout Limits the maximum allowed execution time. -# - - -if ($debugfile -eq "") -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.1\common\bin\cspybat" -f "C:\Users\a5088582\Desktop\AmazonFreeRTOS\test\demos\renesas\rx65n-envision-kit\iar-ewrx\settings\aws_demos.Debug.general.xcl" --backend -f "C:\Users\a5088582\Desktop\AmazonFreeRTOS\test\demos\renesas\rx65n-envision-kit\iar-ewrx\settings\aws_demos.Debug.driver.xcl" -} -else -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.1\common\bin\cspybat" -f "C:\Users\a5088582\Desktop\AmazonFreeRTOS\test\demos\renesas\rx65n-envision-kit\iar-ewrx\settings\aws_demos.Debug.general.xcl" --debug_file=$debugfile --backend -f "C:\Users\a5088582\Desktop\AmazonFreeRTOS\test\demos\renesas\rx65n-envision-kit\iar-ewrx\settings\aws_demos.Debug.driver.xcl" -} diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/settings/aws_demos.Debug.driver.xcl b/demos/renesas/rx65n-envision-kit/iar-ewrx/settings/aws_demos.Debug.driver.xcl deleted file mode 100644 index 7a30f6bb819..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/settings/aws_demos.Debug.driver.xcl +++ /dev/null @@ -1,39 +0,0 @@ -"-p" - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.1\rx\config\debugger\ior5f565ne.ddf" - -"--endian" - -"l" - -"--double" - -"32" - -"--core" - -"rxv2" - -"--int" - -"32" - -"--fpu" - -"32" - -"-d" - -"e2lite" - -"--drv_mode" - -"debugging" - -"--drv_communication" - -"USB" - - - - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/settings/aws_demos.Debug.general.xcl b/demos/renesas/rx65n-envision-kit/iar-ewrx/settings/aws_demos.Debug.general.xcl deleted file mode 100644 index 57ad3eafaaa..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/settings/aws_demos.Debug.general.xcl +++ /dev/null @@ -1,11 +0,0 @@ -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.1\rx\bin\rxproc.dll" - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.1\rx\bin\rxe2e2l.dll" - -"C:\Users\a5088582\Desktop\AmazonFreeRTOS\test\demos\renesas\rx65n-envision-kit\iar-ewrx\Debug\Exe\aws_demos.out" - ---plugin="C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.1\rx\bin\rxbat.dll" - - - - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/settings/aws_demos.crun b/demos/renesas/rx65n-envision-kit/iar-ewrx/settings/aws_demos.crun deleted file mode 100644 index 62c21bb927f..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/settings/aws_demos.crun +++ /dev/null @@ -1,13 +0,0 @@ - - - 1 - - - * - * - * - 0 - 1 - - - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/settings/aws_demos.dbgdt b/demos/renesas/rx65n-envision-kit/iar-ewrx/settings/aws_demos.dbgdt deleted file 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- - - - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_cg_hardware_setup.c b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_cg_hardware_setup.c deleted file mode 100644 index ff311021ea3..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_cg_hardware_setup.c +++ /dev/null @@ -1,99 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016, 2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_hardware_setup.c -* Version : 1.1.1 -* Device(s) : R5F565NEHxFB -* Description : Initialization file for code generation configurations. -* Creation Date: 2018-07-14 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -#include "r_smc_cgc.h" -#include "r_smc_interrupt.h" -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -void r_undefined_exception(void); -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: r_undefined_exception -* Description : This function is undefined interrupt service routine -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void r_undefined_exception(void) -{ - /* Start user code for r_undefined_exception. Do not edit comment generated here */ - /* End user code. Do not edit comment generated here */ -} - -/*********************************************************************************************************************** -* Function Name: R_Systeminit -* Description : This function initializes every configuration -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Systeminit(void) -{ - /* Enable writing to registers related to operating modes, LPC, CGC and software reset */ - SYSTEM.PRCR.WORD = 0xA50BU; - - /* Enable writing to MPC pin function control registers */ - MPC.PWPR.BIT.B0WI = 0U; - MPC.PWPR.BIT.PFSWE = 1U; - - /* Initialize clocks settings */ - R_CGC_Create(); - - /* Set interrupt settings */ - R_Interrupt_Create(); - - /* Register undefined interrupt */ - R_BSP_InterruptWrite(BSP_INT_SRC_UNDEFINED_INTERRUPT,(bsp_int_cb_t)r_undefined_exception); - - /* Disable writing to MPC pin function control registers */ - MPC.PWPR.BIT.PFSWE = 0U; - MPC.PWPR.BIT.B0WI = 1U; - - /* Enable protection */ - SYSTEM.PRCR.WORD = 0xA500U; -} - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_cg_macrodriver.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_cg_macrodriver.h deleted file mode 100644 index cd156a9ba04..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_cg_macrodriver.h +++ /dev/null @@ -1,82 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016, 2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_macrodriver.h -* Version : 1.1.1 -* Device(s) : R5F565NEHxFB -* Description : Macro header file for code generation. -* Creation Date: 2018-07-14 -***********************************************************************************************************************/ - -#ifndef MODULEID_H -#define MODULEID_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "platform.h" -#include "r_smc_interrupt.h" -#include - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -#ifndef __TYPEDEF__ - -/* Status list definition */ -#define MD_STATUSBASE (0x00U) -#define MD_OK (MD_STATUSBASE + 0x00U) /* register setting OK */ -#define MD_SPT (MD_STATUSBASE + 0x01U) /* IIC stop */ -#define MD_NACK (MD_STATUSBASE + 0x02U) /* IIC no ACK */ -#define MD_BUSY1 (MD_STATUSBASE + 0x03U) /* busy 1 */ -#define MD_BUSY2 (MD_STATUSBASE + 0x04U) /* busy 2 */ - -/* Error list definition */ -#define MD_ERRORBASE (0x80U) -#define MD_ERROR (MD_ERRORBASE + 0x00U) /* error */ -#define MD_ARGERROR (MD_ERRORBASE + 0x01U) /* error argument input error */ -#define MD_ERROR1 (MD_ERRORBASE + 0x02U) /* error 1 */ -#define MD_ERROR2 (MD_ERRORBASE + 0x03U) /* error 2 */ -#define MD_ERROR3 (MD_ERRORBASE + 0x04U) /* error 3 */ -#define MD_ERROR4 (MD_ERRORBASE + 0x05U) /* error 4 */ -#define MD_ERROR5 (MD_ERRORBASE + 0x06U) /* error 5 */ - -#endif - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -#ifndef __TYPEDEF__ - typedef unsigned short MD_STATUS; - #define __TYPEDEF__ -#endif - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Systeminit(void); -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_cg_userdefine.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_cg_userdefine.h deleted file mode 100644 index 7f6364b7a36..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_cg_userdefine.h +++ /dev/null @@ -1,61 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016, 2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_cg_userdefine.h -* Version : 1.1.1 -* Device(s) : R5F565NEHxFB -* Description : User header file for code generation. -* Creation Date: 2018-07-14 -***********************************************************************************************************************/ - -#ifndef CG_USER_DEF_H -#define CG_USER_DEF_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -/* Start user code for include. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ -/* Start user code for register. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* Start user code for macro define. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -/* Start user code for type define. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_smc_cgc.c b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_smc_cgc.c deleted file mode 100644 index 3ae52814ffa..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_smc_cgc.c +++ /dev/null @@ -1,45 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016, 2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc.c -* Version : 1.1.1 -* Device(s) : R5F565NEHxFB -* Description : This file implements cgc setting -* Creation Date: 2018-07-14 -***********************************************************************************************************************/ -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -#include "r_smc_cgc.h" -#include "platform.h" - -/*********************************************************************************************************************** -* Function Name: R_CGC_Create -* Description : This function Used to initializes the clock generator -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_CGC_Create(void) -{ - - R_CGC_Create_UserInit(); -} diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_smc_cgc.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_smc_cgc.h deleted file mode 100644 index bc5ccb7b74d..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_smc_cgc.h +++ /dev/null @@ -1,217 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016, 2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc.h -* Version : 1.1.1 -* Device(s) : R5F565NEHxFB -* Description : This file implements cgc setting. -* Creation Date: 2018-07-14 -***********************************************************************************************************************/ - -#ifndef SMC_CGC_H -#define SMC_CGC_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ -/* - System Clock Control Register (SCKCR) -*/ -/* Peripheral Module Clock D (PCLKD) */ -#define _00000000_CGC_PCLKD_DIV_1 (0x00000000UL) /* x1 */ -#define _00000001_CGC_PCLKD_DIV_2 (0x00000001UL) /* x1/2 */ -#define _00000002_CGC_PCLKD_DIV_4 (0x00000002UL) /* x1/4 */ -#define _00000003_CGC_PCLKD_DIV_8 (0x00000003UL) /* x1/8 */ -#define _00000004_CGC_PCLKD_DIV_16 (0x00000004UL) /* x1/16 */ -#define _00000005_CGC_PCLKD_DIV_32 (0x00000005UL) /* x1/32 */ -#define _00000006_CGC_PCLKD_DIV_64 (0x00000006UL) /* x1/64 */ -/* Peripheral Module Clock C (PCLKC) */ -#define _00000000_CGC_PCLKC_DIV_1 (0x00000000UL) /* x1 */ -#define _00000010_CGC_PCLKC_DIV_2 (0x00000010UL) /* x1/2 */ -#define _00000020_CGC_PCLKC_DIV_4 (0x00000020UL) /* x1/4 */ -#define _00000030_CGC_PCLKC_DIV_8 (0x00000030UL) /* x1/8 */ -#define _00000040_CGC_PCLKC_DIV_16 (0x00000040UL) /* x1/16 */ -#define _00000050_CGC_PCLKC_DIV_32 (0x00000050UL) /* x1/32 */ -#define _00000060_CGC_PCLKC_DIV_64 (0x00000060UL) /* x1/64 */ -/* Peripheral Module Clock B (PCLKB) */ -#define _00000000_CGC_PCLKB_DIV_1 (0x00000000UL) /* x1 */ -#define _00000100_CGC_PCLKB_DIV_2 (0x00000100UL) /* x1/2 */ -#define _00000200_CGC_PCLKB_DIV_4 (0x00000200UL) /* x1/4 */ -#define _00000300_CGC_PCLKB_DIV_8 (0x00000300UL) /* x1/8 */ -#define _00000400_CGC_PCLKB_DIV_16 (0x00000400UL) /* x1/16 */ -#define _00000500_CGC_PCLKB_DIV_32 (0x00000500UL) /* x1/32 */ -#define _00000600_CGC_PCLKB_DIV_64 (0x00000600UL) /* x1/64 */ -/* Peripheral Module Clock A (PCLKA) */ -#define _00000000_CGC_PCLKA_DIV_1 (0x00000000UL) /* x1 */ -#define _00001000_CGC_PCLKA_DIV_2 (0x00001000UL) /* x1/2 */ -#define _00002000_CGC_PCLKA_DIV_4 (0x00002000UL) /* x1/4 */ -#define _00003000_CGC_PCLKA_DIV_8 (0x00003000UL) /* x1/8 */ -#define _00004000_CGC_PCLKA_DIV_16 (0x00004000UL) /* x1/16 */ -#define _00005000_CGC_PCLKA_DIV_32 (0x00005000UL) /* x1/32 */ -#define _00006000_CGC_PCLKA_DIV_64 (0x00006000UL) /* x1/64 */ -/* External Bus Clock (BCLK) */ -#define _00000000_CGC_BCLK_DIV_1 (0x00000000UL) /* x1 */ -#define _00010000_CGC_BCLK_DIV_2 (0x00010000UL) /* x1/2 */ -#define _00020000_CGC_BCLK_DIV_4 (0x00020000UL) /* x1/4 */ -#define _00030000_CGC_BCLK_DIV_8 (0x00030000UL) /* x1/8 */ -#define _00040000_CGC_BCLK_DIV_16 (0x00040000UL) /* x1/16 */ -#define _00050000_CGC_BCLK_DIV_32 (0x00050000UL) /* x1/32 */ -#define _00060000_CGC_BCLK_DIV_64 (0x00060000UL) /* x1/64 */ -/* System Clock (ICLK) */ -#define _00000000_CGC_ICLK_DIV_1 (0x00000000UL) /* x1 */ -#define _01000000_CGC_ICLK_DIV_2 (0x01000000UL) /* x1/2 */ -#define _02000000_CGC_ICLK_DIV_4 (0x02000000UL) /* x1/4 */ -#define _03000000_CGC_ICLK_DIV_8 (0x03000000UL) /* x1/8 */ -#define _04000000_CGC_ICLK_DIV_16 (0x04000000UL) /* x1/16 */ -#define _05000000_CGC_ICLK_DIV_32 (0x05000000UL) /* x1/32 */ -#define _06000000_CGC_ICLK_DIV_64 (0x06000000UL) /* x1/64 */ -/* System Clock (FCLK) */ -#define _00000000_CGC_FCLK_DIV_1 (0x00000000UL) /* x1 */ -#define _10000000_CGC_FCLK_DIV_2 (0x10000000UL) /* x1/2 */ -#define _20000000_CGC_FCLK_DIV_4 (0x20000000UL) /* x1/4 */ -#define _30000000_CGC_FCLK_DIV_8 (0x30000000UL) /* x1/8 */ -#define _40000000_CGC_FCLK_DIV_16 (0x40000000UL) /* x1/16 */ -#define _50000000_CGC_FCLK_DIV_32 (0x50000000UL) /* x1/32 */ -#define _60000000_CGC_FCLK_DIV_64 (0x60000000UL) /* x1/64 */ - -/* - System Clock Control Register 2 (SCKCR2) -*/ -#define _0010_CGC_UCLK_DIV_1 (0x0010U) /* x1/2 */ -#define _0020_CGC_UCLK_DIV_3 (0x0020U) /* x1/3 */ -#define _0030_CGC_UCLK_DIV_4 (0x0030U) /* x1/4 */ -#define _0040_CGC_UCLK_DIV_5 (0x0040U) /* x1/5 */ -#define _0001_SCKCR2_BIT0 (0x0001U) /* RESERVE BIT0 */ - -/* - System Clock Control Register 3 (SCKCR3) -*/ -#define _0000_CGC_CLOCKSOURCE_LOCO (0x0000U) /* LOCO */ -#define _0100_CGC_CLOCKSOURCE_HOCO (0x0100U) /* HOCO */ -#define _0200_CGC_CLOCKSOURCE_MAINCLK (0x0200U) /* Main clock oscillator */ -#define _0300_CGC_CLOCKSOURCE_SUBCLK (0x0300U) /* Sub-clock oscillator */ -#define _0400_CGC_CLOCKSOURCE_PLL (0x0400U) /* PLL circuit */ - -/* - PLL Control Register (PLLCR) -*/ -/* PLL Input Frequency Division Ratio Select (PLIDIV[1:0]) */ -#define _0000_CGC_PLL_FREQ_DIV_1 (0x0000U) /* x1 */ -#define _0001_CGC_PLL_FREQ_DIV_2 (0x0001U) /* x1/2 */ -#define _0002_CGC_PLL_FREQ_DIV_3 (0x0002U) /* x1/3 */ -/* PLL Clock Source Select (PLLSRCSEL) */ -#define _0000_CGC_PLL_SOURCE_MAIN (0x0000U) /* Main clock oscillator */ -#define _0010_CGC_PLL_SOURCE_HOCO (0x0010U) /* HOCO */ -/* Frequency Multiplication Factor Select (STC[5:0]) */ -#define _1300_CGC_PLL_FREQ_MUL_10_0 (0x1300U) /* x10.0 */ -#define _1400_CGC_PLL_FREQ_MUL_10_5 (0x1400U) /* x10.5 */ -#define _1500_CGC_PLL_FREQ_MUL_11_0 (0x1500U) /* x11.0 */ -#define _1600_CGC_PLL_FREQ_MUL_11_5 (0x1600U) /* x11.5 */ -#define _1700_CGC_PLL_FREQ_MUL_12_0 (0x1700U) /* x12.0 */ -#define _1800_CGC_PLL_FREQ_MUL_12_5 (0x1800U) /* x12.5 */ -#define _1900_CGC_PLL_FREQ_MUL_13_0 (0x1900U) /* x13.0 */ -#define _1A00_CGC_PLL_FREQ_MUL_13_5 (0x1A00U) /* x13.5 */ -#define _1B00_CGC_PLL_FREQ_MUL_14_0 (0x1B00U) /* x14.0 */ -#define _1C00_CGC_PLL_FREQ_MUL_14_5 (0x1C00U) /* x14.5 */ -#define _1D00_CGC_PLL_FREQ_MUL_15_0 (0x1D00U) /* x15.0 */ -#define _1E00_CGC_PLL_FREQ_MUL_15_5 (0x1E00U) /* x15.5 */ -#define _1F00_CGC_PLL_FREQ_MUL_16_0 (0x1F00U) /* x16.0 */ -#define _2000_CGC_PLL_FREQ_MUL_16_5 (0x2000U) /* x16.5 */ -#define _2100_CGC_PLL_FREQ_MUL_17_0 (0x2100U) /* x17.0 */ -#define _2200_CGC_PLL_FREQ_MUL_17_5 (0x2200U) /* x17.5 */ -#define _2300_CGC_PLL_FREQ_MUL_18_0 (0x2300U) /* x18.0 */ -#define _2400_CGC_PLL_FREQ_MUL_18_5 (0x2400U) /* x18.5 */ -#define _2500_CGC_PLL_FREQ_MUL_19_0 (0x2500U) /* x19.0 */ -#define _2600_CGC_PLL_FREQ_MUL_19_5 (0x2600U) /* x19.5 */ -#define _2700_CGC_PLL_FREQ_MUL_20_0 (0x2700U) /* x20.0 */ -#define _2800_CGC_PLL_FREQ_MUL_20_5 (0x2800U) /* x20.5 */ -#define _2900_CGC_PLL_FREQ_MUL_21_0 (0x2900U) /* x21.0 */ -#define _2A00_CGC_PLL_FREQ_MUL_21_5 (0x2A00U) /* x21.5 */ -#define _2B00_CGC_PLL_FREQ_MUL_22_0 (0x2B00U) /* x22.0 */ -#define _2C00_CGC_PLL_FREQ_MUL_22_5 (0x2C00U) /* x22.5 */ -#define _2D00_CGC_PLL_FREQ_MUL_23_0 (0x2D00U) /* x23.0 */ -#define _2E00_CGC_PLL_FREQ_MUL_23_5 (0x2E00U) /* x23.5 */ -#define _2F00_CGC_PLL_FREQ_MUL_24_0 (0x2F00U) /* x24.0 */ -#define _3000_CGC_PLL_FREQ_MUL_24_5 (0x3000U) /* x24.5 */ -#define _3100_CGC_PLL_FREQ_MUL_25_0 (0x3100U) /* x25.0 */ -#define _3200_CGC_PLL_FREQ_MUL_25_5 (0x3200U) /* x25.5 */ -#define _3300_CGC_PLL_FREQ_MUL_26_0 (0x3300U) /* x26.0 */ -#define _3400_CGC_PLL_FREQ_MUL_26_5 (0x3400U) /* x26.5 */ -#define _3500_CGC_PLL_FREQ_MUL_27_0 (0x3500U) /* x27.0 */ -#define _3600_CGC_PLL_FREQ_MUL_27_5 (0x3600U) /* x27.5 */ -#define _3700_CGC_PLL_FREQ_MUL_28_0 (0x3700U) /* x28.0 */ -#define _3800_CGC_PLL_FREQ_MUL_28_5 (0x3800U) /* x28.5 */ -#define _3900_CGC_PLL_FREQ_MUL_29_0 (0x3900U) /* x29.0 */ -#define _3A00_CGC_PLL_FREQ_MUL_29_5 (0x3A00U) /* x29.5 */ -#define _3B00_CGC_PLL_FREQ_MUL_30_0 (0x3B00U) /* x30.0 */ - -/* - Oscillation Stop Detection Control Register (OSTDCR) -*/ -/* Oscillation Stop Detection Interrupt Enable (OSTDIE) */ -#define _00_CGC_OSC_STOP_INT_DISABLE (0x00U) /* The oscillation stop detection interrupt is disabled */ -#define _01_CGC_OSC_STOP_INT_ENABLE (0x01U) /* The oscillation stop detection interrupt is enabled */ -/* Oscillation Stop Detection Function Enable (OSTDE) */ -#define _00_CGC_OSC_STOP_DISABLE (0x00U) /* Oscillation stop detection function is disabled */ -#define _80_CGC_OSC_STOP_ENABLE (0x80U) /* Oscillation stop detection function is enabled */ - -/* - High-Speed On-Chip Oscillator Control Register 2 (HOCOCR2) -*/ -/* HOCO Frequency Setting (HCFRQ[1:0]) */ -#define _00_CGC_HOCO_CLK_16 (0x00U) /* 16 MHz */ -#define _01_CGC_HOCO_CLK_18 (0x01U) /* 18 MHz */ -#define _02_CGC_HOCO_CLK_20 (0x02U) /* 20 MHz */ - -/* - Main Clock Oscillator Forced Oscillation Control Register (MOFCR) -*/ -/* Main Oscillator Drive Capability 2 Switching (MODRV2[1:0]) */ -#define _00_CGC_MAINOSC_UNDER24M (0x00U) /* 20.1 to 24 MHz */ -#define _10_CGC_MAINOSC_UNDER20M (0x10U) /* 16.1 to 20 MHz */ -#define _20_CGC_MAINOSC_UNDER16M (0x20U) /* 8.1 to 16 MHz */ -#define _30_CGC_MAINOSC_EQUATE8M (0x30U) /* 8 MHz */ -/* Main Clock Oscillator Switch (MOSEL) */ -#define _00_CGC_MAINOSC_RESONATOR (0x00U) /* Resonator */ -#define _40_CGC_MAINOSC_EXTERNAL (0x40U) /* External oscillator input */ - -/* - RTC Control Register 4 (RCR4) -*/ -/* Count source select */ -#define _00_RTC_SOURCE_SELECT_SUB (0x00U) /* Select sub-clock oscillator */ -#define _01_RTC_SOURCE_SELECT_MAIN_FORCED (0x01U) /* Select main clock oscillator */ -#define _53_CGC_MOSCWTCR_VALUE (0x53U) /* Main Clock Oscillator Wait Time */ -#define _21_CGC_SOSCWTCR_VALUE (0x21U) /* Sub-Clock Oscillator Wait Time */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_CGC_Create(void); -void R_CGC_Create_UserInit(void); -#endif diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_smc_cgc_user.c b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_smc_cgc_user.c deleted file mode 100644 index 9ec54b88508..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_smc_cgc_user.c +++ /dev/null @@ -1,64 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016, 2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_cgc_user.c -* Version : 1.1.1 -* Device(s) : R5F565NEHxFB -* Description : None -* Creation Date: 2018-07-14 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Pragma directive -***********************************************************************************************************************/ -/* Start user code for pragma. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" -/* Start user code for include. Do not edit comment generated here */ -#include "r_smc_cgc.h" -/* End user code. Do not edit comment generated here */ -#include "r_cg_userdefine.h" - -/*********************************************************************************************************************** -Global variables and functions -***********************************************************************************************************************/ -/* Start user code for global. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - -/*********************************************************************************************************************** -* Function Name: R_CGC_Create_UserInit -* Description : This function adds user code after initializing CGC -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_CGC_Create_UserInit(void) -{ - /* Start user code for code init. Do not edit comment generated here */ - /* End user code. Do not edit comment generated here */ -} - -/* Start user code for adding. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_smc_entry.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_smc_entry.h deleted file mode 100644 index c5717c6bbb1..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_smc_entry.h +++ /dev/null @@ -1,54 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016, 2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_entry.h -* Version : 1.1.1 -* Device(s) : R5F565NEHxFB -* Description : SMC platform header file. -* Creation Date: 2018-07-14 -***********************************************************************************************************************/ - -#ifndef SMC_PLATFORM_H -#define SMC_PLATFORM_H - -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_cg_macrodriver.h" - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -/* Start user code for function. Do not edit comment generated here */ -/* End user code. Do not edit comment generated here */ -#endif - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_smc_interrupt.c b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_smc_interrupt.c deleted file mode 100644 index 56677fd9413..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_smc_interrupt.c +++ /dev/null @@ -1,52 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016, 2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_interrupt.c -* Version : 1.1.0 -* Device(s) : R5F565NEHxFB -* Description : This file implements interrupt setting -* Creation Date: 2018-07-14 -***********************************************************************************************************************/ -/*********************************************************************************************************************** -Includes -***********************************************************************************************************************/ -#include "r_smc_interrupt.h" -#include "platform.h" - -/*********************************************************************************************************************** -* Function Name: R_Interrupt_Create -* Description : This function Used to set the fast interrupt or group interrupt -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ - -void R_Interrupt_Create(void) -{ - /* Disable group AL1 interrupt*/ - IEN(ICU,GROUPAL1) = 0U; - - - /* Set group AL1 interrupt priority level */ - IPR(ICU,GROUPAL1) = _02_ICU_PRIORITY_LEVEL2; - - /* Enable group AL1 interrupt */ - IEN(ICU,GROUPAL1) = 1U; -} - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_smc_interrupt.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_smc_interrupt.h deleted file mode 100644 index 6dc72923e58..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/general/r_smc_interrupt.h +++ /dev/null @@ -1,292 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. -* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY -* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR -* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016, 2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* File Name : r_smc_interrupt.h -* Version : 1.1.0 -* Device(s) : R5F565NEHxFB -* Description : This file implements interrupt setting. -* Creation Date: 2018-07-14 -***********************************************************************************************************************/ - -#ifndef SMC_INTERRUPT_H -#define SMC_INTERRUPT_H - -/*********************************************************************************************************************** -Macro definitions (Register bit) -***********************************************************************************************************************/ - -/* Priority level of interrupt source. - * These macro definitions are used to set the IPR register directly - */ -#define _00_ICU_PRIORITY_LEVEL0 (0x00U) /* Level 0 (disabled) */ -#define _01_ICU_PRIORITY_LEVEL1 (0x01U) /* Level 1 */ -#define _02_ICU_PRIORITY_LEVEL2 (0x02U) /* Level 2 */ -#define _03_ICU_PRIORITY_LEVEL3 (0x03U) /* Level 3 */ -#define _04_ICU_PRIORITY_LEVEL4 (0x04U) /* Level 4 */ -#define _05_ICU_PRIORITY_LEVEL5 (0x05U) /* Level 5 */ -#define _06_ICU_PRIORITY_LEVEL6 (0x06U) /* Level 6 */ -#define _07_ICU_PRIORITY_LEVEL7 (0x07U) /* Level 7 */ -#define _08_ICU_PRIORITY_LEVEL8 (0x08U) /* Level 8 */ -#define _09_ICU_PRIORITY_LEVEL9 (0x09U) /* Level 9 */ -#define _0A_ICU_PRIORITY_LEVEL10 (0x0AU) /* Level 10 */ -#define _0B_ICU_PRIORITY_LEVEL11 (0x0BU) /* Level 11 */ -#define _0C_ICU_PRIORITY_LEVEL12 (0x0CU) /* Level 12 */ -#define _0D_ICU_PRIORITY_LEVEL13 (0x0DU) /* Level 13 */ -#define _0E_ICU_PRIORITY_LEVEL14 (0x0EU) /* Level 14 */ -#define _0F_ICU_PRIORITY_LEVEL15 (0x0FU) /* Level 15 */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -#define FAST_INTERRUPT_VECTOR (0) - -/* The macro definitions below list the full set of priority levels as selected in the Interrupts tab - * Please do not modify this file manually - */ -#define ICU_BSC_BUSERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RAM_RAMERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_FCU_FIFERR_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_FCU_FRDYI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_SWINT2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_SWINT_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT0_CMI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT1_CMI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_CMWI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_CMWI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_D0FIFO0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_D1FIFO0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI0_SPRI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI0_SPTI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI1_SPRI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI1_SPTI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_QSPI_SPRI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_QSPI_SPTI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SDHI_SBFAI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MMCIF_MBFAI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC1_RXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC1_TXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC0_RXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC0_TXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC2_RXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RIIC2_TXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI0_RXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI0_TXI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI1_RXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI1_TXI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI2_RXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI2_TXI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ13_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ14_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_IRQ15_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI3_RXI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI3_TXI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI4_RXI4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI4_TXI4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI5_RXI5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI5_TXI5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI6_RXI6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI6_TXI6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_LVD1_LVD1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_LVD2_LVD2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_USBR0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_ALM_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_PRD_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_IWDT_IWUNI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_WDT_WUNI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PDC_PCDFI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI7_RXI7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI7_TXI7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI8_RXI8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI8_TXI8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI9_RXI9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI9_TXI9_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI10_RXI10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI10_TXI10_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBE0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI2_SPRI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RSPI2_SPTI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPBL1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPAL0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ICU_GROUPAL1_PRIORITY _02_ICU_PRIORITY_LEVEL2 -#define ICU_SCI11_RXI11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI11_TXI11_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI12_RXI12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_SCI12_TXI12_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC0I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC1I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC2I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC3I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_DMAC_DMAC74I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_OST_OSTDI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EXDMAC_EXDMAC0I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_EXDMAC_EXDMAC1I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT2_CMI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMT3_CMI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0C_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TGI0D_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU0_TCI0V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TGI1B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TCI1V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TCI1U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TGI2A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TGI2B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TCI2V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU2_TCI2U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU1_TGI1A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3C_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_CMIA0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_CMIB0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR0_OVI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_CMIA1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_CMIB1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR1_OVI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_CMIA2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_CMIB2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR2_OVI2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_CMIA3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_CMIB3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TMR3_OVI3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TGI3D_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU3_TCI3V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TGI4A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TGI4B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TCI4V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU4_TCI4U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TGI5A_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TGI5B_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TCI5V_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TPU5_TCI5U_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_IC0I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_IC1I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_OC0I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW0_OC1I0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_IC0I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_IC1I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_OC0I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CMTW1_OC1I1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_RTC_CUP_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_RXF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_TXF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_RXM0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN0_TXM0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_RXF1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_TXF1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_RXM1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_CAN1_TXM1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_USB0_USBI0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12ADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12GBADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD_S12GCADI_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12ADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12GBADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_S12AD1_S12GCADI1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB192_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ELC_ELSR18I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_ELC_ELSR19I_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_PROC_BUSY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_ROMOK_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_LONG_PLG_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_TEST_BUSY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_WRRDY0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_WRRDY1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_WRRDY4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_RDRDY0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_RDRDY1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_INTEGRATE_WRRDY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_TSIP_INTEGRATE_RDRDY_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB206_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIB_INTB207_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TGIA1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIA0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIB0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIC0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGID0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TCIV0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIE0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU0_TGIF0_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TGIB1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TCIV1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU1_TCIU1_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TGIA2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TGIB2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TCIV2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU2_TCIU2_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIA3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIB3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGIC3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TGID3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU3_TCIV3_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIA4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIB4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGIC4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TGID4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU4_TCIV4_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIU5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIV5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU5_TGIW5_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIA6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIB6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGIC6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TGID6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU6_TCIV6_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIA7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIB7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGIC7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TGID7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU7_TCIV7_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIA8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIB8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGIC8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TGID8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_MTU8_TCIV8_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA251_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA252_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA253_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA254_PRIORITY _0F_ICU_PRIORITY_LEVEL15 -#define ICU_PERIA_INTA255_PRIORITY _0F_ICU_PRIORITY_LEVEL15 - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void R_Interrupt_Create(void); -#endif diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/hwsetup.c b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/hwsetup.c deleted file mode 100644 index 3860f46864e..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/hwsetup.c +++ /dev/null @@ -1,165 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : hwsetup.c -* Device(s) : RX -* H/W Platform : RSKRX65NARSKRX65N_2MB -* Description : Defines the initialization routines used each time the MCU is restarted. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -* : 31.01.2017 1.01_ES Added the bsp startup module disable function. -* Changed the MSTPCR setting method. -***********************************************************************************************************************/ - - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -/* I/O Register and board definitions */ -#include "platform.h" - -/*********************************************************************************************************************** -Private global variables and functions -***********************************************************************************************************************/ -/* MCU I/O port configuration function declaration */ -static void output_ports_configure(void); - -/* Interrupt configuration function declaration */ -static void interrupts_configure(void); - -/* MCU peripheral module configuration function declaration */ -static void peripheral_modules_enable(void); - -/* ADC initial configuration function declaration */ -static void bsp_adc_initial_configure(void); - - -/*********************************************************************************************************************** -* Function name: hardware_setup -* Description : Contains setup functions called at device restart -* Arguments : none -* Return value : none -***********************************************************************************************************************/ -void hardware_setup(void) -{ - output_ports_configure(); - interrupts_configure(); - peripheral_modules_enable(); - bsp_non_existent_port_init(); - bsp_adc_initial_configure(); -} - -/*********************************************************************************************************************** -* Function name: output_ports_configure -* Description : Configures the port and pin direction settings, and sets the pin outputs to a safe level. -* Arguments : none -* Return value : none -***********************************************************************************************************************/ -static void output_ports_configure(void) -{ -/* When using the user startup program, disable the following code. */ -#if (BSP_CFG_STARTUP_DISABLE == 0) - - /* Enable LEDs. */ - /* Start with LEDs off. */ - LED0 = LED_OFF; - LED1 = LED_OFF; - LED2 = LED_OFF; - LED3 = LED_OFF; - - /* Set LED pins as outputs. */ - LED0_PDR = 1; - LED1_PDR = 1; - LED2_PDR = 1; - LED3_PDR = 1; - - /* Enable switches. */ - /* Set pins as inputs. */ - SW1_PDR = 0; - SW2_PDR = 0; - SW3_PDR = 0; - - /* Set port mode registers for switches. */ - SW1_PMR = 0; - SW2_PMR = 0; - SW3_PMR = 0; - -#endif -} - -/*********************************************************************************************************************** -* Function name: interrupts_configure -* Description : Configures interrupts used -* Arguments : none -* Return value : none -***********************************************************************************************************************/ -static void interrupts_configure(void) -{ - /* Add code here to setup additional interrupts */ -} - -/*********************************************************************************************************************** -* Function name: peripheral_modules_enable -* Description : Enables and configures peripheral devices on the MCU -* Arguments : none -* Return value : none -***********************************************************************************************************************/ -static void peripheral_modules_enable(void) -{ - /* Add code here to enable peripherals used by the application */ -} - -/*********************************************************************************************************************** -* Function name: bsp_adc_initial_configure -* Description : Configures the ADC initial settings -* Arguments : none -* Return value : none -* Note : This function should be called when the PSW.I bit is 0 (interrupt disabled). -* This function should be called when the ADCST.ADST bit is 0. -***********************************************************************************************************************/ -static void bsp_adc_initial_configure(void) -{ - volatile uint8_t tmp_mstp; - - /* Protect off. */ - SYSTEM.PRCR.WORD = 0xA502; - - /* Store the value of the MSTPCR. */ - tmp_mstp = MSTP(S12AD1); - - /* Release from the module-stop state */ - MSTP(S12AD1) = 0; - - /* Writing to the A/D conversion time setting register is enabled. */ - S12AD1.ADSAMPR.BYTE = 0x03; - - /* Sets conversion time for middle-speed for S12AD unit 1. */ - S12AD1.ADSAM.WORD = 0x0020; - - /* Writing to the A/D conversion time setting register is disabled. */ - S12AD1.ADSAMPR.BYTE = 0x02; - - /* Restore the value of the MSTPCR. */ - MSTP(S12AD1) = tmp_mstp; - - /* Protect on. */ - SYSTEM.PRCR.WORD = 0xA500; -} diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/hwsetup.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/hwsetup.h deleted file mode 100644 index 80182997995..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/hwsetup.h +++ /dev/null @@ -1,42 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : hwsetup.h -* Description : Hardware setup header file. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* Multiple inclusion prevention macro */ -#ifndef HWSETUP_H -#define HWSETUP_H - -/*********************************************************************************************************************** -Exported global functions (to be accessed by other files) -***********************************************************************************************************************/ -/* Hardware setup funtion declaration */ -void hardware_setup(void); - -/* End of multiple inclusion prevention macro */ -#endif diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/r_bsp.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/r_bsp.h deleted file mode 100644 index 6bf3b867845..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/r_bsp.h +++ /dev/null @@ -1,62 +0,0 @@ -/* Adapted to IAR Embedded Workbench */ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp.h -* H/W Platform : RSKRX65N_2MB -* Description : Has the header files that should be included for this platform. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 31.01.2017 1.00_ES First Release -***********************************************************************************************************************/ - -#ifndef BSP_BOARD_RSKRX65N_2MB -#define BSP_BOARD_RSKRX65N_2MB - -/* Make sure that no other platforms have already been defined. Do not touch this! */ -#ifdef PLATFORM_DEFINED -#error "Error - Multiple platforms defined in platform.h!" -#else -#define PLATFORM_DEFINED -#endif - -/*********************************************************************************************************************** -INCLUDE APPROPRIATE MCU AND BOARD FILES -***********************************************************************************************************************/ -#include "mcu/all/r_bsp_common.h" -#include "r_bsp_config.h" -#include "r_bsp_interrupt_config.h" -#include "mcu/rx65n/register_access/iodefine.h" -#include "mcu/rx65n/mcu_info.h" -#include "mcu/rx65n/mcu_locks.h" -#include "mcu/rx65n/locking.h" -#include "mcu/rx65n/cpu.h" -#include "mcu/rx65n/mcu_init.h" -#include "mcu/rx65n/mcu_interrupts.h" -#include "mcu/rx65n/mcu_mapped_interrupts_private.h" -#include "mcu/rx65n/mcu_mapped_interrupts.h" -#include "mcu/rx65n/mcu_startup.h" -#include "board/rskrx65n_2mb/rskrx65n_2mb.h" -#include "board/rskrx65n_2mb/hwsetup.h" - -#include "board/rskrx65n_2mb/vecttbl.h" - -#endif /* BSP_BOARD_RSKRX65N_2MB */ - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/r_bsp_config_reference.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/r_bsp_config_reference.h deleted file mode 100644 index 791298932c9..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/r_bsp_config_reference.h +++ /dev/null @@ -1,520 +0,0 @@ -/* Adapted to IAR Embedded Workbench */ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_config_reference.h -* Device(s) : RX65N -* Description : The file r_bsp_config.h is used to configure your BSP. r_bsp_config.h should be included -* somewhere in your package so that the r_bsp code has access to it. This file (r_bsp_config_reference.h) -* is just a reference file that the user can use to make their own r_bsp_config.h file. -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 31.01.2017 1.00_ES First Release -***********************************************************************************************************************/ -#ifndef R_BSP_CONFIG_REF_HEADER_FILE -#define R_BSP_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* Start up select - 0 = Enable BSP startup program. - 1 = Disable BSP startup program. (e.g. Using user startup program.) -*/ -#define BSP_CFG_STARTUP_DISABLE (0) - -/* Enter the product part number for your MCU. This information will be used to obtain information about your MCU such - as package and memory size. - To help parse this information, the part number will be defined using multiple macros. - R 5 F 56 5N E D D FP - | | | | | | | | | Macro Name Description - | | | | | | | | |__BSP_CFG_MCU_PART_PACKAGE = Package type, number of pins, and pin pitch - | | | | | | | |____not used = Products with wide temperature range - | | | | | | |______BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED = Encryption module included/not included - | | | | | |________BSP_CFG_MCU_PART_MEMORY_SIZE = ROM, RAM, and Data Flash Capacity - | | | | |___________BSP_CFG_MCU_PART_GROUP = Group name - | | | |______________BSP_CFG_MCU_PART_SERIES = Series name - | | |________________BSP_CFG_MCU_PART_MEMORY_TYPE = Type of memory (Flash, ROMless) - | |__________________not used = Renesas MCU - |____________________not used = Renesas semiconductor product. - */ - -/* Package type. Set the macro definition based on values below: - Character(s) = Value for macro = Package Type/Number of Pins/Pin Pitch - FC = 0x0 = LFQFP/176/0.50 - BG = 0x1 = LFBGA/176/0.80 - LC = 0x2 = TFLGA/177/0.50 - FB = 0x3 = LFQFP/144/0.50 - LK = 0x4 = TFLGA/145/0.50 - FP = 0x5 = LFQFP/100/0.50 - LJ = 0xA = TFLGA/100/0.65 -*/ -#define BSP_CFG_MCU_PART_PACKAGE (0x0) - -/* Whether Encryption and SDHI/SDSI are included or not. - Character(s) = Value for macro = Description - A = false = Encryption module not included, SDHI/SDSI module not included - B = false = Encryption module not included, SDHI/SDSI module included - D = false = Encryption module not included, SDHI/SDSI module included, dual-bank structure - E = true = Encryption module included, SDHI/SDSI module not included - F = true = Encryption module included, SDHI/SDSI module included - H = true = Encryption module included, SDHI/SDSI module included, dual-bank structure -*/ -#define BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED (false) - -/* ROM, RAM, and Data Flash Capacity. - Character(s) = Value for macro = ROM Size/Ram Size/Data Flash Size - 4 = 0x4 = 512KB/256KB/Not equipped - 7 = 0x7 = 768KB/256KB/Not equipped - 9 = 0x9 = 1MB/256KB/Not equipped - C = 0xC = 1.5MB/640KB/32KB - E = 0xE = 2MB/640KB/32KB -*/ -#define BSP_CFG_MCU_PART_MEMORY_SIZE (0xE) - -/* Group name. - Character(s) = Value for macro = Description - 5N/51 = 0x0 = RX65N Group/RX651 Group -*/ -#define BSP_CFG_MCU_PART_GROUP (0x0) - -/* Series name. - Character(s) = Value for macro = Description - 56 = 0x0 = RX600 Series -*/ -#define BSP_CFG_MCU_PART_SERIES (0x0) - -/* Memory type. - Character(s) = Value for macro = Description - F = 0x0 = Flash memory version -*/ -#define BSP_CFG_MCU_PART_MEMORY_TYPE (0x0) - -/* Whether to use 1 stack or 2. RX MCUs have the ability to use 2 stacks: an interrupt stack and a user stack. - * When using 2 stacks the user stack will be used during normal user code. When an interrupt occurs the CPU - * will automatically shift to using the interrupt stack. Having 2 stacks can make it easier to figure out how - * much stack space to allocate since the user does not have to worry about always having enough room on the - * user stack for if-and-when an interrupt occurs. Some users will not want 2 stacks though because it is not - * needed in all applications and can lead to wasted RAM (i.e. space in between stacks that is not used). - * If only 1 stack is used then the interrupt stack is the one that will be used. If 1 stack is chosen then - * the user may want to remove the 'SU' section from the linker sections to remove any linker warnings. - * - * 0 = Use 1 stack. Disable user stack. User stack size set below will be ignored. - * 1 = Use 2 stacks. User stack and interrupt stack will both be used. - */ -#define BSP_CFG_USER_STACK_ENABLE (1) - -/* When using the user startup program, disable the following code. */ -#if (BSP_CFG_STARTUP_DISABLE == 0) - -/* The 'BSP_DECLARE_STACK' macro is checked so that the stack is only declared in one place (resetprg.c). Every time a - '#pragma stacksize' is encountered, the stack size is increased. This prevents multiplication of stack size. */ -#if defined(BSP_DECLARE_STACK) - /* If only 1 stack is chosen using BSP_CFG_USER_STACK_ENABLE then no RAM will be allocated for the user stack. */ - #if (BSP_CFG_USER_STACK_ENABLE == 1) - /* User Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. */ - #error "Apply stack and heap sizes in 'Project->Options->General Options->Stack/Heap' page. - #endif - -/* Interrupt Stack size in bytes. The Renesas RX toolchain sets the stack size using the #pragma stacksize directive. - * If the interrupt stack is the only stack being used then the user will likely want to increase the default size - * below. - */ -#error "Apply stack and heap sizes in 'Project->Options->General Options->Stack/Heap' page. -#endif - -#endif /* BSP_CFG_STARTUP_DISABLE == 0 */ - -/* Heap size in bytes. - To disable the heap you must follow these steps: - 1) Set this macro (BSP_CFG_HEAP_BYTES) to 0. - 2) Set the macro BSP_CFG_IO_LIB_ENABLE to 0. - 3) Disable stdio from being built into the project library. This is done by going into the Renesas RX Toolchain - settings and choosing the Standard Library section. After that choose 'Standard Library' for Category in HEW or - choose 'Contents' in E2Studio. This will present a list of modules that can be included. Uncheck the box for - stdio.h. -*/ -#define BSP_CFG_HEAP_BYTES (0x400) - -/* Initializes C input & output library functions. - 0 = Disable I/O library initialization in resetprg.c. If you are not using stdio then use this value. - 1 = Enable I/O library initialization in resetprg.c. This is default and needed if you are using stdio. */ -#define BSP_CFG_IO_LIB_ENABLE (1) - -/* If desired the user may redirect the stdio charget() and/or charput() functions to their own respective functions - by enabling below and providing and replacing the my_sw_... function names with the names of their own functions. */ -#define BSP_CFG_USER_CHARGET_ENABLED (0) -#define BSP_CFG_USER_CHARGET_FUNCTION my_sw_charget_function - -#define BSP_CFG_USER_CHARPUT_ENABLED (0) -#define BSP_CFG_USER_CHARPUT_FUNCTION my_sw_charput_function - -/* After reset MCU will operate in Supervisor mode. To switch to User mode, set this macro to '1'. For more information - on the differences between these 2 modes see the CPU >> Processor Mode section of your MCU's hardware manual. - 0 = Stay in Supervisor mode. - 1 = Switch to User mode. -*/ -#define BSP_CFG_RUN_IN_USER_MODE (0) - -/* Clock source select (CKSEL). - 0 = Low Speed On-Chip Oscillator (LOCO) - 1 = High Speed On-Chip Oscillator (HOCO) - 2 = Main Clock Oscillator - 3 = Sub-Clock Oscillator - 4 = PLL Circuit -*/ -#define BSP_CFG_CLOCK_SOURCE (4) - -/* Main clock Oscillator Switching (MOSEL). - 0 = Resonator - 1 = External clock input -*/ -#define BSP_CFG_MAIN_CLOCK_SOURCE (0) - -/* The sub-clock oscillation control for using the RTC. - When '1' is selected, the registers related to RTC are initialized and the sub-clock oscillator is operated. - 0 = The RTC is not to be used. - 1 = The RTC is to be used. -*/ -#define BSP_CFG_RTC_ENABLE (0) - -/* Sub-Clock Oscillator Drive Capacity Control (RTCDV). - 0 = Drive capacity for standard CL. - 1 = Drive capacity for low CL. -*/ -#define BSP_CFG_SOSC_DRV_CAP (0) //standard CL by default - -/* Clock configuration options. - The input clock frequency is specified and then the system clocks are set by specifying the multipliers used. The - multiplier settings are used to set the clock registers in resetprg.c. If a 24MHz clock is used and the - ICLK is 120MHz, PCLKA is 120MHz, PCLKB is 60MHz, PCLKC is 60MHz, PCLKD is 60MHz, FCLK is 60MHz, USB Clock is 48MHz, - and BCLK is 120MHz then the settings would be: - - BSP_CFG_XTAL_HZ = 24000000 - BSP_CFG_PLL_DIV = 1 (no division) - BSP_CFG_PLL_MUL = 10.0 (24MHz x 10.0 = 240MHz) - BSP_CFG_ICK_DIV = 2 : System Clock (ICLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_ICK_DIV) = 120MHz - BSP_CFG_PCKA_DIV = 2 : Peripheral Clock A (PCLKA) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKA_DIV) = 120MHz - BSP_CFG_PCKB_DIV = 4 : Peripheral Clock B (PCLKB) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKB_DIV) = 60MHz - BSP_CFG_PCKC_DIV = 4 : Peripheral Clock C (PCLKC) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKC_DIV) = 60MHz - BSP_CFG_PCKD_DIV = 4 : Peripheral Clock D (PCLKD) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKD_DIV) = 60MHz - BSP_CFG_FCK_DIV = 4 : Flash IF Clock (FCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_FCK_DIV) = 60MHz - BSP_CFG_BCK_DIV = 2 : External Bus Clock (BCK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_BCK_DIV) = 120MHz - BSP_CFG_UCK_DIV = 5 : USB Clock (UCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_UCK_DIV) = 48MHz -*/ - -/* Input clock frequency in Hz (XTAL or EXTAL). */ -#define BSP_CFG_XTAL_HZ (24000000) - -/* The HOCO can operate at several different frequencies. Choose which one using the macro below. - Available frequency settings: - 0 = 16MHz (default) - 1 = 18MHz - 2 = 20MHz -*/ -#define BSP_CFG_HOCO_FREQUENCY (0) - -/* PLL clock source (PLLSRCEL). Choose which clock source to input to the PLL circuit. - Available clock sources: - 0 = Main clock (default) - 1 = HOCO -*/ -#define BSP_CFG_PLL_SRC (0) - -/* PLL Input Frequency Division Ratio Select (PLIDIV). - Available divisors = /1 (no division), /2, /3 -*/ -#define BSP_CFG_PLL_DIV (1) - -/* PLL Frequency Multiplication Factor Select (STC). - Available multipliers = x10.0 to x30.0 in 0.5 increments (e.g. 10.0, 10.5, 11.0, 11.5, ..., 29.0, 29.5, 30.0) -*/ -#define BSP_CFG_PLL_MUL (10.0) - -/* System Clock Divider (ICK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_ICK_DIV (2) - -/* Peripheral Module Clock A Divider (PCKA). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKA_DIV (2) - -/* Peripheral Module Clock B Divider (PCKB). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKB_DIV (4) - -/* Peripheral Module Clock C Divider (PCKC). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKC_DIV (4) - -/* Peripheral Module Clock D Divider (PCKD). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKD_DIV (4) - -/* External Bus Clock Divider (BCLK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_BCK_DIV (2) - -/* Flash IF Clock Divider (FCK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_FCK_DIV (4) - -/* USB Clock Divider Select. - Available divisors = /2, /3, /4, /5 -*/ -#define BSP_CFG_UCK_DIV (5) - -/* Configure BCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency, 2= BCK/2 frequency -*/ -#define BSP_CFG_BCLK_OUTPUT (0) - -/* Configure SDCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency -*/ -#define BSP_CFG_SDCLK_OUTPUT (0) - -/* Main Clock Oscillator Wait Time (MOSCWTCR). - The value of MOSCWTCR register required for correspondence with the waiting time required to secure stable oscillation - by the main clock oscillator is obtained by using the maximum frequency for fLOCO in the formula below. - - BSP_CFG_MOSC_WAIT_TIME > (tMAINOSC * (fLOCO_max) + 16)/32 - (tMAINOSC: main clock oscillation stabilization time; fLOCO_max: maximum frequency for fLOCO) - - If tMAINOSC is 9.98 ms and fLOCO_max is 264 kHz (the period is 1/3.78 us), the formula gives - BSP_CFG_MOSC_WAIT_TIME > (9.98 ms * (264 kHZ) + 16)/32 = 82.83, so set the BSP_CFG_MOSC_WAIT_TIME to 83(53h). - - NOTE: The waiting time is not required when an external clock signal is input for the main clock oscillator. - Set the BSP_CFG_MOSC_WAIT_TIME to 00h. -*/ -#define BSP_CFG_MOSC_WAIT_TIME (0x53) - -/* Sub-Clock Oscillator Wait Time (SOSCWTCR). - The value of SOSCWTCR register required for correspondence with the expected time to secure settling of oscillation - by the sub-clock oscillator is obtained by using the maximum frequency for fLOCO in the formula below. - - BSP_CFG_SOSC_WAIT_TIME > (tSUBOSC * (fLOCO_max) + 16)/16384 - (tSUBOSC: sub-clock oscillation stabilization time; fLOCO_max: maximum frequency for fLOCO) - - If tSUBOSC is 2 s and fLOCO is 264 kHz (the period is 1/3.78 us), the formula gives - BSP_CFG_SOSC_WAIT_TIME > (2 s * (264 kHz) +16)/16384 = 32.22, so set the BSP_CFG_SOSC_WAIT_TIME bits to 33(21h). -*/ -#define BSP_CFG_SOSC_WAIT_TIME (0x21) - -/* ROM Cache Enable Register (ROMCE). - 0 = ROM cache operation disabled. - 1 = ROM cache operation enabled. -*/ -#define BSP_CFG_ROM_CACHE_ENABLE (0) - -/* Configure WDT and IWDT settings. - OFS0 - Option Function Select Register 0 - b31:b29 Reserved When reading, these bits return the value written by the user. The write value should be 1. - b28 WDTRSTIRQS - WDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b27:b26 WDTRPSS - WDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b25:b24 WDTRPES - WDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b23:b20 WDTCKS - WDT Clock Frequency Division Ratio - (1=PCLKB/4, 4=PCLKB/64, 0xF=PCLKB/128, 6=PCLKB/256, - 7=PCLKB/2048, 8=PCLKB/8192) - b19:b18 WDTTOPS - WDT Timeout Period Select (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b17 WDTSTRT - WDT Start Mode Select - (0=auto-start after reset, 1=halt after reset) - b16:b15 Reserved (set to 1) - b14 IWDTSLCSTP - IWDT Sleep Mode Count Stop Control - (0=can't stop count, 1=stop w/some low power modes) - b13 Reserved (set to 1) - b12 IWDTRSTIRQS - IWDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b11:b10 IWDTRPSS - IWDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b9:b8 IWDTRPES - IWDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b7:b4 IWDTCKS - IWDT Clock Frequency Division Ratio - (0=none, 2=/16, 3 = /32, 4=/64, 0xF=/128, 5=/256) - b3:b2 IWDTTOPS - IWDT Timeout Period Select - (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b1 IWDTSTRT - IWDT Start Mode Select - (0=auto-start after reset, 1=halt after reset) - b0 Reserved (set to 1) -*/ -#define BSP_CFG_OFS0_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* Configure whether voltage detection 0 circuit and HOCO are enabled after reset. - OFS1 - Option Function Select Register 1 - b31:b9 Reserved (set to 1) - b8 HOCOEN - Enable/disable HOCO oscillation after a reset (0=enable, 1=disable) - b7:b3 Reserved When reading, these bits return the value written by the user. The write value should be 1. - b2 LVDAS - Voltage Detection 0 circuit start (1=monitoring disabled) - b1:b0 VDSEL - Voltage Detection 0 level select (1=2.94v, 2=2.87v, 3=2.80v) - NOTE: If HOCO oscillation is enabled by OFS1.HOCOEN, HOCO frequency is 16MHz. - BSP_CFG_HOCO_FREQUENCY should be default value. -*/ -#define BSP_CFG_OFS1_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* Trusted memory is facility to prevent the reading of blocks 8 and 9 and blocks 46 and 47 (in dual mode) in - the code flash memory by third party software. This feature is disabled by default. - TMEF - TM Enable Flag Register - b31 Reserved (set to 1) - b30:b28 TMEFDB - Dual-Bank TM Enable - 000: The TM function in the address range from FFEE 0000h to - FFEE FFFFh is enabled in dual mode. - - 111: The TM function in the address range from FFEE 0000h to - FFEE FFFFh is disabled in dual mode. - b27 Reserved (set to 1) - b26:b24 TMEFF - TM Enable - 000: TM function is enabled. - - 111: TM function is disabled. - b23:b0 Reserved (set to 1) - NOTE: If the dual bank function has not been incorporated in a device, - TMEFDB bits [b30:b26] are reserved area. -*/ -#define BSP_CFG_TRUSTED_MODE_FUNCTION (0xFFFFFFFF) //Disable by default - -/* Configure FAW register is used to set the write protection flag and boot area select flag - for setting the flash access window startaddress and flash access window end address. - FAW - Flash Access Window Setting Register - b31 BTFLG - Boot Area Select Flag - 0: FFFF C000h to FFFF DFFFh are used as the boot area - - 1: FFFF E000h to FFFF FFFFh are used as the boot area - b30:b28 Reserved - When reading, these bits return the value written by the user.The write value should be 1. - b27:b16 FAWE - Flash Access Window End Address - Flash access window end address - b15 FSPR - Access Window Protection Flag - 0: With protection (P/E disabled) - - 1: Without protection (P/E enabled) - b14:b12 Reserved - When reading, these bits return the value written by the user.The write value should be 1. - b11:b0 FAWS - Flash Access Window Start Address - Flash access window start address - NOTE: Once 0 is written to this bit, the bit can never be restored to 1. - Therefore, the access window and the BTFLG bit never be set again or the TM function - never be disabled once it has been enabled. - Exercise extra caution when handling the FSPR bit. -*/ -#define BSP_CFG_FAW_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* The ROM code protection register is a function to prohibit reading from or programming to the flash memory - when the flash programmer is used during off-board programming. - ROMCODE - ROM Code Protection Register - b31:b0 ROM Code - 0000 0000h: ROM code protection enabled (ROM code protection 1). - 0000 0001h: ROM code protection enabled (ROM code protection 2). - Other than above: ROM code protection disabled. - Note. The ROMCODE register should be set in 32-bit units. -*/ -#define BSP_CFG_ROMCODE_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* Select the bank mode of dual-bank function of the code flash memory. - 0 = Dual mode. - 1 = Linear mode. - NOTE: If the dual bank function has been incorporated in a device, select the bank mode in this macro. - Default setting of the bank mode is linear mode. - If the dual bank function has not been incorporated in a device, this macro should be 1. -*/ -#define BSP_CFG_CODE_FLASH_BANK_MODE (1) //Linear mode by default - -/* Select the startup bank of the program when dual bank function is in dual mode. - 0 = The address range of bank 1 from FFE00000h to FFEFFFFFh and bank 0 from FFF00000h to FFFFFFFFh. - 1 = The address range of bank 1 from FFF00000h to FFFFFFFFh and bank 0 from FFE00000h to FFEFFFFFh. - NOTE: If the dual bank function has been incorporated in a device, select the start bank in this macro. - Default setting of the start bank is bank0. - If the dual bank function has not been incorporated in a device, this macro should be 0. -*/ -#define BSP_CFG_CODE_FLASH_START_BANK (0) //Bank0 by default - -/* This macro lets other modules no if a RTOS is being used. - 0 = RTOS is not used. - 1 = RTOS is used. -*/ -#define BSP_CFG_RTOS_USED (0) - -/* By default modules will use global locks found in mcu_locks.c. If the user is using a RTOS and would rather use its - locking mechanisms then they can change this macro. - NOTE: If '1' is chosen for this macro then the user must also change the next macro 'BSP_CFG_USER_LOCKING_TYPE'. - 0 = Use default locking (non-RTOS) - 1 = Use user defined locking mechanism. -*/ -#define BSP_CFG_USER_LOCKING_ENABLED (0) - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to redefine the typedef - that is used for the locks. If the user is using a RTOS then they would likely redefine the typedef to be - a semaphore/mutex type of their RTOS. Use the macro below to set the type that will be used for the locks. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_TYPE bsp_lock_t - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to define the functions - that will handle the locking and unlocking. These functions should be defined below. - If BSP_CFG_USER_LOCKING_ENABLED is != 0: - R_BSP_HardwareLock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION(mcu_lock_t hw_index) - R_BSP_HardwareUnlock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION(mcu_lock_t hw_index) - NOTE:With these functions the index into the array holding the global hardware locks is passed as the parameter. - R_BSP_SoftwareLock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - R_BSP_SoftwareUnlock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - NOTE:With these functions the actual address of the lock to use is passed as the parameter. - NOTE: These functions must return a boolean. If lock was obtained or released successfully then return true. Else, - return false. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION my_hw_locking_function -#define BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION my_hw_unlocking_function -#define BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION my_sw_locking_function -#define BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION my_sw_unlocking_function - -/* If the user would like to determine if a warm start reset has occurred, then they may enable one or more of the - * following callback definitions AND provide a call back function name for the respective callback - * function (to be defined by the user). Setting BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED = 1 will result - * in a callback to the user defined my_sw_warmstart_prec_function just prior to the initialization of the C - * runtime environment by resetprg. - * - * Setting BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED = 1 will result in a callback to the user defined - * my_sw_warmstart_postc_function just after the initialization of the C runtime environment by resetprg. - */ -#define BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_PRE_C_FUNCTION my_sw_warmstart_prec_function - -#define BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_POST_C_FUNCTION my_sw_warmstart_postc_function - -/* By default FIT modules will check input parameters to be valid. This is helpful during development but some users - will want to disable this for production code. The reason for this would be to save execution time and code space. - This macro is a global setting for enabling or disabling parameter checking. Each FIT module will also have its - own local macro for this same purpose. By default the local macros will take the global value from here though - they can be overridden. Therefore, the local setting has priority over this global setting. Disabling parameter - checking should only used when inputs are known to be good and the increase in speed or decrease in code space is - needed. - 0 = Global setting for parameter checking is disabled. - 1 = Global setting for parameter checking is enabled (Default). -*/ -#define BSP_CFG_PARAM_CHECKING_ENABLE (1) - -/* This macro is used to define the voltage that is supplied to the MCU (Vcc). This macro is defined in millivolts. This - macro does not actually change anything on the MCU. Some FIT modules need this information so it is defined here. */ -#define BSP_CFG_MCU_VCC_MV (3300) - -/* There are multiple versions of the RSKRX65N-2MB. Choose which board is currently being used below. - 0 = 1st Prototype Board (RTK50565N2CxxxxxBR) -*/ -#define BSP_CFG_BOARD_REVISION (0) - -#endif /* R_BSP_CONFIG_REF_HEADER_FILE */ - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/r_bsp_interrupt_config_reference.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/r_bsp_interrupt_config_reference.h deleted file mode 100644 index 745030010e3..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/r_bsp_interrupt_config_reference.h +++ /dev/null @@ -1,224 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_interrupt_config.h -* Description : This module maps Interrupt A & B interrupts. More information on how this is done is given below. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -* : 31.01.2017 1.01_ES Changed the name of the following macro definition, because there was a mistake -* in the name of macro definition. -* - From XXX_TPU0_TGI0V to XXX_TPU0_TCI0V. -* - From XXX_TPU1_TGI1V to XXX_TPU1_TCI1V. -* - From XXX_TPU1_TGI1U to XXX_TPU1_TCI1U. -* - From XXX_TPU2_TGI2V to XXX_TPU2_TCI2V. -* - From XXX_TPU2_TGI2U to XXX_TPU2_TCI2U. -* - From XXX_TPU3_TGI3V to XXX_TPU3_TCI3V. -* - From XXX_TPU4_TGI4V to XXX_TPU4_TCI4V. -* - From XXX_TPU4_TGI4U to XXX_TPU4_TCI4U. -* - From XXX_TPU5_TGI5V to XXX_TPU5_TCI5V. -* - From XXX_TPU5_TGI5U to XXX_TPU5_TCI5U. -* - From XXX_MTU0_TGIV0 to XXX_MTU0_TCIV0. -* - From XXX_MTU1_TGIV1 to XXX_MTU1_TCIV1. -* - From XXX_MTU1_TGIU1 to XXX_MTU1_TCIU1. -* - From XXX_MTU2_TGIV2 to XXX_MTU2_TCIV2. -* - From XXX_MTU2_TGIU2 to XXX_MTU2_TCIU2. -* - From XXX_MTU3_TGIV3 to XXX_MTU3_TCIV3. -* - From XXX_MTU4_TGIV4 to XXX_MTU4_TCIV4. -* - From XXX_MTU6_TGIV6 to XXX_MTU6_TCIV6. -* - From XXX_MTU7_TGIV7 to XXX_MTU7_TCIV7. -* - From XXX_MTU8_TGIV8 to XXX_MTU8_TCIV8. -* Added select processing of the following software configurable interrupt source. -* - TSIP_PROC_BUSY -* - TSIP_ROMOK -* - TSIP_LONG_PLG -* - TSIP_TEST_BUSY -* - TSIP_WRRDY0 -* - TSIP_WRRDY1 -* - TSIP_WRRDY4 -* - TSIP_RDRDY0 -* - TSIP_RDRDY1 -* - TSIP_INTEGRATE_WRRDY -* - TSIP_INTEGRATE_RDRDY -***********************************************************************************************************************/ -#ifndef R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE -#define R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/* If you wish to use one of the interrupt below then set the appropriate configuration macro to the vector number you - * wish to use for that interrupt. For example, if you want to use the RTC carry interrupt (CUP) at vector 176 then you - * would do the following: - * - * #define BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP 176 - */ - -/* Interrupt B Sources. - * -Valid vector numbers are 128-207. - * -There are more vector slots for B sources than actual B sources. By default all B sources are mapped. - * -If using the 'TPU1, TGI1A' interrupt it must be vector 144 or 145. It is set to 144 by default. - * -If a peripheral interrupt is going to be used to wake up the MCU from All-Module Clock Stop Mode then it must be - * in a vector between 146 to 157. Peripheral interrupts that can do this are TMR interrupts and the 'USB0, USBI0' - * interrupt. By default the TMR interrupts are chosen since there are 12 of them and there are 12 slots. - */ -#define BSP_MAPPED_INT_CFG_B_VECT_CMT2_CMI2 128 -#define BSP_MAPPED_INT_CFG_B_VECT_CMT3_CMI3 129 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIA0 146 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIB0 147 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_OVI0 148 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIA1 149 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIB1 150 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_OVI1 151 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIA2 152 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIB2 153 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_OVI2 154 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIA3 155 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIB3 156 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_OVI3 157 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0A 130 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0B 131 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0C 132 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0D 133 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TCI0V 134 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1A 144 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1B 135 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1V 136 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1U 137 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2A 138 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2B 139 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2V 140 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2U 141 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3A 142 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3B 143 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3C 145 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3D 158 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TCI3V 159 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4A 160 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4B 161 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4V 162 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4U 163 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5A 164 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5B 165 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5V 166 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5U 167 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC0I0 168 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC1I0 169 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC0I0 170 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC1I0 171 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC0I1 172 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC1I1 173 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC0I1 174 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC1I1 175 -#define BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP 176 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXF0 177 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXF0 178 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXM0 179 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXM0 180 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXF1 181 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXF1 182 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXM1 183 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXM1 184 -#define BSP_MAPPED_INT_CFG_B_VECT_USB0_USBI0 185 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12ADI0 186 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GBADI0 187 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GCADI0 188 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12ADI1 189 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GBADI1 190 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GCADI1 191 - -#if !defined(BSP_MCU_RX65N_2MB) /* In the case of 512K, 768K or 1Mbyte ROM capacity. */ -#define BSP_MAPPED_INT_CFG_B_VECT_RNG_RNGEND 192 -#endif - -#define BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR18I 193 -#define BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR19I 194 - -#if defined(BSP_MCU_RX65N_2MB) /* In the case of 1.5 or 2Mbyte ROM capacity. */ -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_PROC_BUSY 195 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_ROMOK 196 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_LONG_PLG 197 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_TEST_BUSY 198 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY0 199 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY1 200 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY4 201 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY0 202 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY1 203 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_WRRDY 204 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_RDRDY 205 -#endif - -/* Interrupt A Sources. - * -Valid vector numbers are 208-255. - * -There are more A sources than A vector slots. By default none of the GPT interrupts are mapped. - * -If using the 'MTU1, TGI1A' interrupt it must be vector 208 or 209. It is set to 208 by default. - */ -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIA0 209 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIB0 210 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIC0 211 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGID0 212 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TCIV0 213 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIE0 214 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIF0 215 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIA1 208 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIB1 216 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIV1 217 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIU1 218 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIA2 219 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIB2 220 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIV2 221 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIU2 222 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIA3 223 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIB3 224 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIC3 225 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGID3 226 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TCIV3 227 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIA4 228 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIB4 229 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIC4 230 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGID4 231 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TCIV4 232 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIU5 233 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIV5 234 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIW5 235 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIA6 236 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIB6 237 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIC6 238 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGID6 239 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TCIV6 240 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIA7 241 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIB7 242 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIC7 243 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGID7 244 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TCIV7 245 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIA8 246 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIB8 247 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIC8 248 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGID8 249 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TCIV8 250 - -#if !defined(BSP_MCU_RX65N_2MB) /* In the case of 512K, 768K or 1Mbyte ROM capacity. */ -#define BSP_MAPPED_INT_CFG_A_VECT_AES_AESRDY 251 -#define BSP_MAPPED_INT_CFG_A_VECT_AES_AESEND 252 -#endif - -#endif /* R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE */ - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/resetprg.c b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/resetprg.c deleted file mode 100644 index 11e88a99294..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/resetprg.c +++ /dev/null @@ -1,896 +0,0 @@ -/* Adapted to IAR Embedded Workbench */ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : resetprg.c -* Device(s) : RX65N -* Description : Defines post-reset routines that are used to configure the MCU prior to the main program starting. -* This is were the program counter starts on power-up or reset. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -* : 31.01.2017 1.01_ES Deleted unnecessary comments. -* Applied the following technical update. -* - TN-RX*-A164A - Added initialization procedure when the realtime clock -* is not to be used. -* Changed the sub-clock oscillator settings. -* Added the bsp startup module disable function. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -/* Defines MCU configuration functions used in this file */ - - -/* This macro is here so that the stack will be declared here. This is used to prevent multiplication of stack size. */ -#define BSP_DECLARE_STACK -/* Define the target platform */ -#include "platform.h" - -/* When using the user startup program, disable the following code. */ -#if (BSP_CFG_STARTUP_DISABLE == 0) - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* If the user chooses only 1 stack then the 'U' bit will not be set and the CPU will always use the interrupt stack. */ -#if (BSP_CFG_USER_STACK_ENABLE == 1) - #define PSW_init (0x00030000) -#else - #define PSW_init (0x00010000) -#endif -#define FPSW_init (0x00000000) /* Currently nothing set by default. */ - -#define ROMWT_FREQ_THRESHOLD_01 50000000 // ICLK > 50MHz requires ROMWT register update -#define ROMWT_FREQ_THRESHOLD_02 100000000 // ICLK > 100MHz requires ROMWT register update -/*********************************************************************************************************************** -Pre-processor Directives -***********************************************************************************************************************/ -/* Set this as the entry point from a power-on reset */ - - -/*********************************************************************************************************************** -External function Prototypes -***********************************************************************************************************************/ -/* Functions to setup I/O library */ - - - -#if BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED != 0 -/* If user is requesting warm start callback functions then these are the prototypes. */ -void BSP_CFG_USER_WARM_START_PRE_C_FUNCTION(void); -#endif - -#if BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED != 0 -/* If user is requesting warm start callback functions then these are the prototypes. */ -void BSP_CFG_USER_WARM_START_POST_C_FUNCTION(void); -#endif - -/*********************************************************************************************************************** -Private global variables and functions -***********************************************************************************************************************/ -/* Power-on reset function declaration */ -int __low_level_init ( void ); - -/* Main program function declaration */ -void main(void); -static void operating_frequency_set(void); -static void clock_source_select(void); - -/*********************************************************************************************************************** -* Function name: PowerON_Reset_PC -* Description : This function is the MCU's entry point from a power-on reset. -* The following steps are taken in the startup code: -* 1. The User Stack Pointer (USP) and Interrupt Stack Pointer (ISP) are both set immediately after entry -* to this function. The USP and ISP stack sizes are set in the file bsp_config.h. -* Default sizes are USP=4K and ISP=1K. -* 2. The interrupt vector base register is set to point to the beginning of the relocatable interrupt -* vector table. -* 3. The MCU is setup for floating point operations by setting the initial value of the Floating Point -* Status Word (FPSW). -* 4. The MCU operating frequency is set by configuring the Clock Generation Circuit (CGC) in -* operating_frequency_set. -* 5. Calls are made to functions to setup the C runtime environment which involves initializing all -* initialed data, zeroing all uninitialized variables, and configuring STDIO if used -* (calls to _INITSCT and _INIT_IOLIB). -* 6. Board-specific hardware setup, including configuring I/O pins on the MCU, in hardware_setup. -* 7. Global interrupts are enabled by setting the I bit in the Program Status Word (PSW), and the stack -* is switched from the ISP to the USP. The initial Interrupt Priority Level is set to zero, enabling -* any interrupts with a priority greater than zero to be serviced. -* 8. The processor is optionally switched to user mode. To run in user mode, set the macro -* BSP_CFG_RUN_IN_USER_MODE above to a 1. -* 9. The bus error interrupt is enabled to catch any accesses to invalid or reserved areas of memory. -* -* Once this initialization is complete, the user's main() function is called. It should not return. -* Arguments : none -* Return value : none -***********************************************************************************************************************/ -int __low_level_init ( void ) -{ - /* Stack pointers are setup prior to calling this function - see comments above */ - - /* Initialize the Interrupt Table Register */ - - - /* Initialize the Exception Table Register */ - - - /* Initialize FPSW for floating-point operations */ -#ifdef __ROZ -#define FPU_ROUND 0x00000001 /* Let FPSW RMbits=01 (round to zero) */ -#else -#define FPU_ROUND 0x00000000 /* Let FPSW RMbits=00 (round to nearest) */ -#endif -#ifdef __DOFF -#define FPU_DENOM 0x00000100 /* Let FPSW DNbit=1 (denormal as zero) */ -#else -#define FPU_DENOM 0x00000000 /* Let FPSW DNbit=0 (denormal as is) */ -#endif - - set_fpsw(FPSW_init | FPU_ROUND | FPU_DENOM); - - /* Switch to high-speed operation */ - operating_frequency_set(); - - /* If the warm start Pre C runtime callback is enabled, then call it. */ -#if BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED == 1 - BSP_CFG_USER_WARM_START_PRE_C_FUNCTION(); -#endif - - /* Initialize C runtime environment */ - - - /* If the warm start Post C runtime callback is enabled, then call it. */ -#if BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED == 1 - BSP_CFG_USER_WARM_START_POST_C_FUNCTION(); -#endif - - /* Initialize MCU interrupt callbacks. */ - bsp_interrupt_open(); - - /* Initialize register protection functionality. */ - bsp_register_protect_open(); - - /* Configure the MCU and board hardware */ - hardware_setup(); - - /* Change the MCU's user mode from supervisor to user */ - nop(); - asm("POP R15"); - set_psw(PSW_init); - asm("PUSH.L R15"); -#if BSP_CFG_RUN_IN_USER_MODE==1 - Change_PSW_PM_to_UserMode(); -#endif - - /* Enable the bus error interrupt to catch accesses to illegal/reserved areas of memory */ - R_BSP_InterruptControl(BSP_INT_SRC_BUS_ERROR, BSP_INT_CMD_INTERRUPT_ENABLE, FIT_NO_PTR); - - /* Call the main program function (should not return) */ - return (int)(1U); - -} - -/*********************************************************************************************************************** -* Function name: operating_frequency_set -* Description : Configures the clock settings for each of the device clocks -* Arguments : none -* Return value : none -***********************************************************************************************************************/ -static void operating_frequency_set (void) -{ - /* Used for constructing value to write to SCKCR register. */ - uint32_t temp_clock = 0; - - /* - Default settings: - Clock Description Frequency - ---------------------------------------- - Input Clock Frequency............ 24 MHz - PLL frequency (x10).............. 240 MHz - Internal Clock Frequency......... 120 MHz - Peripheral Clock Frequency A..... 120 MHz - Peripheral Clock Frequency B..... 60 MHz - Peripheral Clock Frequency C..... 60 MHz - Peripheral Clock Frequency D..... 60 MHz - Flash IF Clock Frequency......... 60 MHz - External Bus Clock Frequency..... 120 MHz - USB Clock Frequency.............. 48 MHz */ - - /* Protect off. */ - SYSTEM.PRCR.WORD = 0xA50B; - - /* Select the clock based upon user's choice. */ - clock_source_select(); - - /* Figure out setting for FCK bits. */ -#if BSP_CFG_FCK_DIV == 1 - /* Do nothing since FCK bits should be 0. */ -#elif BSP_CFG_FCK_DIV == 2 - temp_clock |= 0x10000000; -#elif BSP_CFG_FCK_DIV == 4 - temp_clock |= 0x20000000; -#elif BSP_CFG_FCK_DIV == 8 - temp_clock |= 0x30000000; -#elif BSP_CFG_FCK_DIV == 16 - temp_clock |= 0x40000000; -#elif BSP_CFG_FCK_DIV == 32 - temp_clock |= 0x50000000; -#elif BSP_CFG_FCK_DIV == 64 - temp_clock |= 0x60000000; -#else - #error "Error! Invalid setting for BSP_CFG_FCK_DIV in r_bsp_config.h" -#endif - - /* Figure out setting for ICK bits. */ -#if BSP_CFG_ICK_DIV == 1 - /* Do nothing since ICK bits should be 0. */ -#elif BSP_CFG_ICK_DIV == 2 - temp_clock |= 0x01000000; -#elif BSP_CFG_ICK_DIV == 4 - temp_clock |= 0x02000000; -#elif BSP_CFG_ICK_DIV == 8 - temp_clock |= 0x03000000; -#elif BSP_CFG_ICK_DIV == 16 - temp_clock |= 0x04000000; -#elif BSP_CFG_ICK_DIV == 32 - temp_clock |= 0x05000000; -#elif BSP_CFG_ICK_DIV == 64 - temp_clock |= 0x06000000; -#else - #error "Error! Invalid setting for BSP_CFG_ICK_DIV in r_bsp_config.h" -#endif - - /* Figure out setting for BCK bits. */ -#if BSP_CFG_BCK_DIV == 1 - /* Do nothing since BCK bits should be 0. */ -#elif BSP_CFG_BCK_DIV == 2 - temp_clock |= 0x00010000; -#elif BSP_CFG_BCK_DIV == 4 - temp_clock |= 0x00020000; -#elif BSP_CFG_BCK_DIV == 8 - temp_clock |= 0x00030000; -#elif BSP_CFG_BCK_DIV == 16 - temp_clock |= 0x00040000; -#elif BSP_CFG_BCK_DIV == 32 - temp_clock |= 0x00050000; -#elif BSP_CFG_BCK_DIV == 64 - temp_clock |= 0x00060000; -#else - #error "Error! Invalid setting for BSP_CFG_BCK_DIV in r_bsp_config.h" -#endif - - /* Configure PSTOP1 bit for BCLK output. */ -#if BSP_CFG_BCLK_OUTPUT == 0 - /* Set PSTOP1 bit */ - temp_clock |= 0x00800000; -#elif BSP_CFG_BCLK_OUTPUT == 1 - /* Clear PSTOP1 bit */ - temp_clock &= ~0x00800000; -#elif BSP_CFG_BCLK_OUTPUT == 2 - /* Clear PSTOP1 bit */ - temp_clock &= ~0x00800000; - /* Set BCLK divider bit */ - SYSTEM.BCKCR.BIT.BCLKDIV = 1; -#else - #error "Error! Invalid setting for BSP_CFG_BCLK_OUTPUT in r_bsp_config.h" -#endif - - /* Configure PSTOP0 bit for SDCLK output. */ -#if BSP_CFG_SDCLK_OUTPUT == 0 - /* Set PSTOP0 bit */ - temp_clock |= 0x00400000; -#elif BSP_CFG_SDCLK_OUTPUT == 1 - /* Clear PSTOP0 bit */ - temp_clock &= ~0x00400000; -#else - #error "Error! Invalid setting for BSP_CFG_SDCLK_OUTPUT in r_bsp_config.h" -#endif - - /* Figure out setting for PCKA bits. */ -#if BSP_CFG_PCKA_DIV == 1 - /* Do nothing since PCKA bits should be 0. */ -#elif BSP_CFG_PCKA_DIV == 2 - temp_clock |= 0x00001000; -#elif BSP_CFG_PCKA_DIV == 4 - temp_clock |= 0x00002000; -#elif BSP_CFG_PCKA_DIV == 8 - temp_clock |= 0x00003000; -#elif BSP_CFG_PCKA_DIV == 16 - temp_clock |= 0x00004000; -#elif BSP_CFG_PCKA_DIV == 32 - temp_clock |= 0x00005000; -#elif BSP_CFG_PCKA_DIV == 64 - temp_clock |= 0x00006000; -#else - #error "Error! Invalid setting for BSP_CFG_PCKA_DIV in r_bsp_config.h" -#endif - - /* Figure out setting for PCKB bits. */ -#if BSP_CFG_PCKB_DIV == 1 - /* Do nothing since PCKB bits should be 0. */ -#elif BSP_CFG_PCKB_DIV == 2 - temp_clock |= 0x00000100; -#elif BSP_CFG_PCKB_DIV == 4 - temp_clock |= 0x00000200; -#elif BSP_CFG_PCKB_DIV == 8 - temp_clock |= 0x00000300; -#elif BSP_CFG_PCKB_DIV == 16 - temp_clock |= 0x00000400; -#elif BSP_CFG_PCKB_DIV == 32 - temp_clock |= 0x00000500; -#elif BSP_CFG_PCKB_DIV == 64 - temp_clock |= 0x00000600; -#else - #error "Error! Invalid setting for BSP_CFG_PCKB_DIV in r_bsp_config.h" -#endif - - /* Figure out setting for PCKC bits. */ -#if BSP_CFG_PCKC_DIV == 1 - /* Do nothing since PCKA bits should be 0. */ -#elif BSP_CFG_PCKC_DIV == 2 - temp_clock |= 0x00000010; -#elif BSP_CFG_PCKC_DIV == 4 - temp_clock |= 0x00000020; -#elif BSP_CFG_PCKC_DIV == 8 - temp_clock |= 0x00000030; -#elif BSP_CFG_PCKC_DIV == 16 - temp_clock |= 0x00000040; -#elif BSP_CFG_PCKC_DIV == 32 - temp_clock |= 0x00000050; -#elif BSP_CFG_PCKC_DIV == 64 - temp_clock |= 0x00000060; -#else - #error "Error! Invalid setting for BSP_CFG_PCKC_DIV in r_bsp_config.h" -#endif - - /* Figure out setting for PCKD bits. */ -#if BSP_CFG_PCKD_DIV == 1 - /* Do nothing since PCKD bits should be 0. */ -#elif BSP_CFG_PCKD_DIV == 2 - temp_clock |= 0x00000001; -#elif BSP_CFG_PCKD_DIV == 4 - temp_clock |= 0x00000002; -#elif BSP_CFG_PCKD_DIV == 8 - temp_clock |= 0x00000003; -#elif BSP_CFG_PCKD_DIV == 16 - temp_clock |= 0x00000004; -#elif BSP_CFG_PCKD_DIV == 32 - temp_clock |= 0x00000005; -#elif BSP_CFG_PCKD_DIV == 64 - temp_clock |= 0x00000006; -#else - #error "Error! Invalid setting for BSP_CFG_PCKD_DIV in r_bsp_config.h" -#endif - - /* Set SCKCR register. */ - SYSTEM.SCKCR.LONG = temp_clock; - - /* Re-init temp_clock to use to set SCKCR2. */ - temp_clock = 0; - - /* Figure out setting for UCK bits. */ -#if BSP_CFG_UCK_DIV == 2 - temp_clock |= 0x00000011; -#elif BSP_CFG_UCK_DIV == 3 - temp_clock |= 0x00000021; -#elif BSP_CFG_UCK_DIV == 4 - temp_clock |= 0x00000031; -#elif BSP_CFG_UCK_DIV == 5 - temp_clock |= 0x00000041; -#else - #error "Error! Invalid setting for BSP_CFG_UCK_DIV in r_bsp_config.h" -#endif - - /* Set SCKCR2 register. */ - SYSTEM.SCKCR2.WORD = (uint16_t)temp_clock; - - /* Choose clock source. Default for r_bsp_config.h is PLL. */ - SYSTEM.SCKCR3.WORD = ((uint16_t)BSP_CFG_CLOCK_SOURCE) << 8; - -#if (BSP_CFG_CLOCK_SOURCE != 0) - /* We can now turn LOCO off since it is not going to be used. */ - SYSTEM.LOCOCR.BYTE = 0x01; -#endif - -#if (BSP_CFG_ROM_CACHE_ENABLE == 1) - FLASH.ROMCIV.WORD = 0x0001; - while (FLASH.ROMCIV.WORD != 0x0000) - { - /* wait for bit to set */ - } - - FLASH.ROMCE.WORD = 0x0001; - while (FLASH.ROMCE.WORD != 0x0001) - { - /* wait for bit to set */ - } -#endif - - /* Protect on. */ - SYSTEM.PRCR.WORD = 0xA500; -} - -/*********************************************************************************************************************** -* Function name: clock_source_select -* Description : Enables and disables clocks as chosen by the user. This function also implements the delays -* needed for the clocks to stabilize. -* Arguments : none -* Return value : none -***********************************************************************************************************************/ -static void clock_source_select (void) -{ - volatile uint8_t i; - volatile uint8_t dummy; - volatile uint8_t tmp; - - /* Main clock will be not oscillate in software standby or deep software standby modes. */ - SYSTEM.MOFCR.BIT.MOFXIN = 0; - - /* Set the oscillation source of the main clock oscillator. */ - SYSTEM.MOFCR.BIT.MOSEL = BSP_CFG_MAIN_CLOCK_SOURCE; - - /* Use HOCO if HOCO is chosen or if PLL is chosen with HOCO as source. */ -#if (BSP_CFG_CLOCK_SOURCE == 1) || ((BSP_CFG_CLOCK_SOURCE == 4) && (BSP_CFG_PLL_SRC == 1)) - /* HOCO is chosen. Start it operating if it is not already operating. */ - if (1 == SYSTEM.HOCOCR.BIT.HCSTP) - { - /* Turn on power to HOCO. */ - SYSTEM.HOCOPCR.BYTE = 0x00; - - /* Stop HOCO. */ - SYSTEM.HOCOCR.BYTE = 0x01; - - while(1 == SYSTEM.OSCOVFSR.BIT.HCOVF) - { - /* The delay period needed is to make sure that the HOCO has stopped. */ - } - - /* Set HOCO frequency. */ - #if (BSP_CFG_HOCO_FREQUENCY == 0) - SYSTEM.HOCOCR2.BYTE = 0x00; //16MHz - #elif (BSP_CFG_HOCO_FREQUENCY == 1) - SYSTEM.HOCOCR2.BYTE = 0x01; //18MHz - #elif (BSP_CFG_HOCO_FREQUENCY == 2) - SYSTEM.HOCOCR2.BYTE = 0x02; //20MHz - #else - #error "Error! Invalid setting for BSP_CFG_HOCO_FREQUENCY in r_bsp_config.h" - #endif - - /* HOCO is chosen. Start it operating. */ - SYSTEM.HOCOCR.BYTE = 0x00; - - if(0x00 == SYSTEM.HOCOCR.BYTE) - { - /* Dummy read and compare. cf."5. I/O Registers", "(2) Notes on writing to I/O registers" in User's manual. - This is done to ensure that the register has been written before the next register access. The RX has a - pipeline architecture so the next instruction could be executed before the previous write had finished. */ - nop(); - } - } - - while(0 == SYSTEM.OSCOVFSR.BIT.HCOVF) - { - /* The delay period needed is to make sure that the HOCO has stabilized. */ - } -#else - /* If HOCO is already operating, it doesn't stop. */ - if (1 == SYSTEM.HOCOCR.BIT.HCSTP) - { - /* Turn off power to HOCO. */ - SYSTEM.HOCOPCR.BYTE = 0x01; - } - else - { - while(0 == SYSTEM.OSCOVFSR.BIT.HCOVF) - { - /* The delay period needed is to make sure that the HOCO has stabilized. */ - } - } -#endif - - /* Use Main clock if Main clock is chosen or if PLL is chosen with Main clock as source. */ -#if (BSP_CFG_CLOCK_SOURCE == 2) || ((BSP_CFG_CLOCK_SOURCE == 4) && (BSP_CFG_PLL_SRC == 0)) - /* Main clock oscillator is chosen. Start it operating. */ - - /* If the main oscillator is >10MHz then the main clock oscillator forced oscillation control register (MOFCR) must - be changed. */ - if (BSP_CFG_XTAL_HZ > 20000000) - { - /* 20 - 24MHz. */ - SYSTEM.MOFCR.BIT.MODRV2 = 0; - } - else if (BSP_CFG_XTAL_HZ > 16000000) - { - /* 16 - 20MHz. */ - SYSTEM.MOFCR.BIT.MODRV2 = 1; - } - else if (BSP_CFG_XTAL_HZ > 8000000) - { - /* 8 - 16MHz. */ - SYSTEM.MOFCR.BIT.MODRV2 = 2; - } - else - { - /* 8MHz. */ - SYSTEM.MOFCR.BIT.MODRV2 = 3; - } - - /* Set the oscillation stabilization wait time of the main clock oscillator. */ -#if (BSP_CFG_MAIN_CLOCK_SOURCE == 0) /* Resonator */ - SYSTEM.MOSCWTCR.BYTE = BSP_CFG_MOSC_WAIT_TIME; -#elif (BSP_CFG_MAIN_CLOCK_SOURCE == 1) /* External oscillator input */ - SYSTEM.MOSCWTCR.BYTE = 0x00; -#else - #error "Error! Invalid setting for BSP_CFG_MAIN_CLOCK_SOURCE in r_bsp_config.h" -#endif - - /* Set the main clock to operating. */ - SYSTEM.MOSCCR.BYTE = 0x00; - - if(0x00 == SYSTEM.MOSCCR.BYTE) - { - /* Dummy read and compare. cf."5. I/O Registers", "(2) Notes on writing to I/O registers" in User's manual. - This is done to ensure that the register has been written before the next register access. The RX has a - pipeline architecture so the next instruction could be executed before the previous write had finished. */ - nop(); - } - - while(0 == SYSTEM.OSCOVFSR.BIT.MOOVF) - { - /* The delay period needed is to make sure that the Main clock has stabilized. */ - } -#else - /* Set the main clock to stopped. */ - SYSTEM.MOSCCR.BYTE = 0x01; - - /* Dummy read and compare. cf."5. I/O Registers", "(2) Notes on writing to I/O registers" in User's manual. */ - if(0x01 == SYSTEM.MOSCCR.BYTE) - { - /* Dummy read and compare. cf."5. I/O Registers", "(2) Notes on writing to I/O registers" in User's manual. - This is done to ensure that the register has been written before the next register access. The RX has a - pipeline architecture so the next instruction could be executed before the previous write had finished. */ - nop(); - } -#endif - - /* Sub-clock setting. */ - - /* Cold start setting */ - if (0 == SYSTEM.RSTSR1.BIT.CWSF) - { - /* Stop the sub-clock oscillator */ - /* RCR4 - RTC Control Register 4 - b7:b1 Reserved - The write value should be 0. - b0 RCKSEL - Count Source Select - Sub-clock oscillator is selected. */ - RTC.RCR4.BIT.RCKSEL = 0; - - /* dummy read four times */ - for (i = 0; i < 4; i++) - { - dummy = RTC.RCR4.BYTE; - } - - if (0 != RTC.RCR4.BIT.RCKSEL) - { - /* Confirm that the written */ - nop(); - } - - /* RCR3 - RTC Control Register 3 - b7:b4 Reserved - The write value should be 0. - b3:b1 RTCDV - Sub-clock oscillator Drive Ability Control. - b0 RTCEN - Sub-clock oscillator is stopped. */ - RTC.RCR3.BIT.RTCEN = 0; - - /* dummy read four times */ - for (i = 0; i < 4; i++) - { - dummy = RTC.RCR3.BYTE; - } - - if (0 != RTC.RCR3.BIT.RTCEN) - { - /* Confirm that the written */ - nop(); - } - - /* SOSCCR - Sub-Clock Oscillator Control Register - b7:b1 Reserved - The write value should be 0. - b0 SOSTP - Sub-clock oscillator Stop - Sub-clock oscillator is stopped. */ - SYSTEM.SOSCCR.BYTE = 0x01; - - if (0x01 != SYSTEM.SOSCCR.BYTE) - { - /* Dummy read and compare. cf."5. I/O Registers", "(2) Notes on writing to I/O registers" in User's manual. - This is done to ensure that the register has been written before the next register access. The RX has a - pipeline architecture so the next instruction could be executed before the previous write had finished. */ - nop(); - } - - while (0 != SYSTEM.OSCOVFSR.BIT.SOOVF) - { - /* The delay period needed is to make sure that the sub-clock has stopped. */ - } - -#if (BSP_CFG_CLOCK_SOURCE == 3) || (BSP_CFG_RTC_ENABLE == 1) - /* Set the drive capacity of the sub-clock oscillator */ - #if (BSP_CFG_SOSC_DRV_CAP == 0) /* Standard CL */ - tmp = 0x06; - #elif (BSP_CFG_SOSC_DRV_CAP == 1) /* Low CL */ - tmp = 0x01; - #else - #error "Error! Invalid setting for BSP_CFG_SOSC_DRV_CAP in r_bsp_config.h" - #endif - - RTC.RCR3.BIT.RTCDV = tmp; - - /* dummy read four times */ - for (i = 0; i < 4; i++) - { - dummy = RTC.RCR3.BYTE; - } - - if (tmp != RTC.RCR3.BIT.RTCDV) - { - /* Confirm that the written */ - nop(); - } - - /* Set wait time until the sub-clock oscillator stabilizes */ - /* SOSCWTCR - Sub-Clock Oscillator Wait Control Register - b7:b5 Reserved - The write value should be 0. - b4:b0 SSTS - Sub-Clock Oscillator Waiting Time - Waiting time is 2.044ms(the maximum value of fLOCO). */ - SYSTEM.SOSCWTCR.BYTE = BSP_CFG_SOSC_WAIT_TIME; - - /* Operate the Sub-clock oscillator */ - SYSTEM.SOSCCR.BYTE = 0x00; - - if (0x00 != SYSTEM.SOSCCR.BYTE) - { - /* Dummy read and compare. cf."5. I/O Registers", "(2) Notes on writing to I/O registers" in User's manual. - This is done to ensure that the register has been written before the next register access. The RX has a - pipeline architecture so the next instruction could be executed before the previous write had finished. */ - nop(); - } - - while (1 != SYSTEM.OSCOVFSR.BIT.SOOVF) - { - /* The delay period needed is to make sure that the sub-clock has stabilized. */ - } -#endif - -#if (BSP_CFG_RTC_ENABLE == 1) - /* ---- Set wait time until the sub-clock oscillator stabilizes ---- */ - SYSTEM.SOSCWTCR.BYTE = 0x00; - - /* ---- Operate the sub-clock oscillator ---- */ - RTC.RCR3.BIT.RTCEN = 1; - - /* dummy read four times */ - for (i = 0; i < 4; i++) - { - dummy = RTC.RCR3.BIT.RTCEN; - } - - if (1 != RTC.RCR3.BIT.RTCEN) - { - /* Confirm that the written value can be read correctly. */ - nop(); - } -#endif - -#if (BSP_CFG_CLOCK_SOURCE == 3) || (BSP_CFG_RTC_ENABLE == 1) - /* Wait for six the sub-clock cycles */ - /* 6 count of sub-clock : (1000000/32768)*6=183.10546875us - In the case of LOCO frequency is 264kHz : 183.10546875/(1000000/264000)=48.33984375cycle - (48.33984375+2)*(1000000/240000)=209.7493489583333us ("+2" is overhead cycle) */ - R_BSP_SoftwareDelay((uint32_t)210, BSP_DELAY_MICROSECS); -#endif - -#if (BSP_CFG_CLOCK_SOURCE == 3) && (BSP_CFG_RTC_ENABLE == 0) - /* Stop prescaler and counter */ - /* RCR2 - RTC Control Register 2 - b7 CNTMD - Count Mode Select - The calendar count mode. - b6 HR24 - Hours Mode - The RTC operates in 24-hour mode. - b5 AADJP - Automatic Adjustment Period Select - The RADJ.ADJ[5:0] setting value is adjusted from - the count value of the prescaler every 10 seconds. - b4 AADJE - Automatic Adjustment Enable - Automatic adjustment is enabled. - b3 RTCOE - RTCOUT Output Enable - RTCOUT output enabled. - b2 ADJ30 - 30-Second Adjustment - 30-second adjustment is executed. - b1 RESET - RTC Software Reset - The prescaler and the target registers for RTC software reset are initialized. - b0 START - start - Prescaler is stopped. */ - RTC.RCR2.BYTE &= 0x7E; - - while (0 != RTC.RCR2.BIT.START) - { - /* Confirm that the written value can be read correctly. */ - } - - /* RTC Software Reset */ - RTC.RCR2.BIT.RESET = 1; - - while (0 != RTC.RCR2.BIT.RESET) - { - /* Confirm that the written value can be read correctly. */ - } - - /* An alarm interrupt request is disabled */ - /* RCR1 - RTC Control Register 1 - b7:b4 PES - Periodic Interrupt Select - These bits specify the period for the periodic interrupt. - b3 RTCOS - RTCOUT Output Select - RTCOUT outputs 1 Hz. - b2 PIE - Periodic Interrupt Enable - A periodic interrupt request is disabled. - b1 CIE - Carry Interrupt Enable - A carry interrupt request is disabled. - b0 AIE - Alarm Interrupt Enable - An alarm interrupt request is disabled. */ - RTC.RCR1.BYTE &= 0xF8; - - /* Wait for one the sub-clock cycles */ - /* 1 count of sub-clock : (1000000/32768)=30.517578125us - In the case of LOCO frequency is 264kHz : 30.517578125/(1000000/264000)=8.056640625cycle - (8.056640625+2)*(1000000/240000)=41.902669270833us ("+2" is overhead cycle) */ - R_BSP_SoftwareDelay((uint32_t)42, BSP_DELAY_MICROSECS); - - if (0x00 != (RTC.RCR1.BYTE & 0x07)) - { - /* Confirm that the written value can be read correctly. */ - nop(); - } -#endif - } - /* Warm start setting */ - else - { -#if (BSP_CFG_CLOCK_SOURCE == 3) || ((BSP_CFG_CLOCK_SOURCE != 3) && (BSP_CFG_RTC_ENABLE == 0)) - /* SOSCCR - Sub-Clock Oscillator Control Register - b7:b1 Reserved - The write value should be 0. - b0 SOSTP - Sub-clock oscillator Stop - Sub-clock oscillator is stopped. */ - SYSTEM.SOSCCR.BYTE = 0x01; - - if (0x01 != SYSTEM.SOSCCR.BYTE) - { - /* Dummy read and compare. cf."5. I/O Registers", "(2) Notes on writing to I/O registers" in User's manual. - This is done to ensure that the register has been written before the next register access. The RX has a - pipeline architecture so the next instruction could be executed before the previous write had finished. */ - nop(); - } - - while (0 != SYSTEM.OSCOVFSR.BIT.SOOVF) - { - /* Confirm that the Sub clock stopped. */ - } -#endif - -#if (BSP_CFG_CLOCK_SOURCE == 3) - /* Set wait time until the sub-clock oscillator stabilizes */ - /* SOSCWTCR - Sub-Clock Oscillator Wait Control Register - b7:b5 Reserved - The write value should be 0. - b4:b0 SSTS - Sub-Clock Oscillator Waiting Time - Waiting time is 2.044ms(the maximum value of fLOCO). */ - SYSTEM.SOSCWTCR.BYTE = BSP_CFG_SOSC_WAIT_TIME; - - /* Operate the Sub-clock oscillator */ - SYSTEM.SOSCCR.BYTE = 0x00; - - if (0x00 != SYSTEM.SOSCCR.BYTE) - { - /* Dummy read and compare. cf."5. I/O Registers", "(2) Notes on writing to I/O registers" in User's manual. - This is done to ensure that the register has been written before the next register access. The RX has a - pipeline architecture so the next instruction could be executed before the previous write had finished. */ - nop(); - } -#endif - -#if (BSP_CFG_CLOCK_SOURCE == 3) || (BSP_CFG_RTC_ENABLE == 1) - while (1 != SYSTEM.OSCOVFSR.BIT.SOOVF) - { - /* The delay period needed is to make sure that the sub-clock has stabilized. */ - } -#endif - -#if (BSP_CFG_RTC_ENABLE == 1) - /* ---- Set wait time until the sub-clock oscillator stabilizes ---- */ - SYSTEM.SOSCWTCR.BYTE = 0x00; -#endif - } - -#if (BSP_CFG_CLOCK_SOURCE == 4) - - /* Set PLL Input Divisor. */ - SYSTEM.PLLCR.BIT.PLIDIV = BSP_CFG_PLL_DIV - 1; - - #if (BSP_CFG_PLL_SRC == 0) - /* Clear PLL clock source if PLL clock source is Main clock. */ - SYSTEM.PLLCR.BIT.PLLSRCSEL = 0; - #else - /* Set PLL clock source if PLL clock source is HOCO clock. */ - SYSTEM.PLLCR.BIT.PLLSRCSEL = 1; - #endif - - /* Set PLL Multiplier. */ - SYSTEM.PLLCR.BIT.STC = ((uint8_t)((float)BSP_CFG_PLL_MUL * 2.0)) - 1; - - /* Set the PLL to operating. */ - SYSTEM.PLLCR2.BYTE = 0x00; - - while(0 == SYSTEM.OSCOVFSR.BIT.PLOVF) - { - /* The delay period needed is to make sure that the PLL has stabilized. */ - } - -#else - /* Set the PLL to stopped. */ - SYSTEM.PLLCR2.BYTE = 0x01; -#endif - - /* LOCO is saved for last since it is what is running by default out of reset. This means you do not want to turn - it off until another clock has been enabled and is ready to use. */ -#if (BSP_CFG_CLOCK_SOURCE == 0) - /* LOCO is chosen. This is the default out of reset. */ - SYSTEM.LOCOCR.BYTE = 0x00; -#else - /* LOCO is not chosen but it cannot be turned off yet since it is still being used. */ -#endif - - /* Make sure a valid clock was chosen. */ -#if (BSP_CFG_CLOCK_SOURCE > 4) || (BSP_CFG_CLOCK_SOURCE < 0) - #error "ERROR - Valid clock source must be chosen in r_bsp_config.h using BSP_CFG_CLOCK_SOURCE macro." -#endif - - /* RX65N has a ROMWT register which controls the cycle waiting for access to code flash memory. - It is set as zero coming out of reset. - When setting ICLK to [50 MHz < ICLK <= 100 MHz], set the ROMWT.ROMWT[1:0] bits to 01b. - When setting ICLK to [100 MHz < ICLK <= 120 MHz], set the ROMWT.ROMWT[1:0] bits to 10b. */ - if (BSP_ICLK_HZ > ROMWT_FREQ_THRESHOLD_02) - { - SYSTEM.ROMWT.BYTE = 0x02; - } - else if (BSP_ICLK_HZ > ROMWT_FREQ_THRESHOLD_01) - { - SYSTEM.ROMWT.BYTE = 0x01; - } - else - { - /* Do nothing. */ - } - -} -/*********************************************************************************************************************** -* Function name: Change_PSW_PM_to_UserMode -* Description : Assembler function, used to change the MCU's usermode from supervisor to user. -* Arguments : none -* Return value : none -***********************************************************************************************************************/ -#if BSP_CFG_RUN_IN_USER_MODE==1 -static void Change_PSW_PM_to_UserMode(void) -{ - asm("MVFC PSW,R1\n" - "OR #0x00100000,R1\n" - "PUSH.L R1\n" - "MVFC PC,R1\n" - "ADD #10,R1\n" - "PUSH.L R1\n" - "RTE\n" - "NOP\n" - "NOP\n"); -} -#endif - -#endif /* BSP_CFG_STARTUP_DISABLE == 0 */ - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/rskrx65n_2mb.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/rskrx65n_2mb.h deleted file mode 100644 index b2edd6df93a..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/rskrx65n_2mb.h +++ /dev/null @@ -1,62 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : rskrx65n_2mb.h -* H/W Platform : RSKRX65N_2MB -* Description : -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 31.01.2017 1.00_ES First Release -***********************************************************************************************************************/ - -#ifndef RSKRX65N_2MB_H -#define RSKRX65N_2MB_H - -/* Local defines */ -#define LED_ON (0) -#define LED_OFF (1) -#define SET_BIT_HIGH (1) -#define SET_BIT_LOW (0) -#define SET_BYTE_HIGH (0xFF) -#define SET_BYTE_LOW (0x00) - -/* Switches */ -#define SW_ACTIVE 0 -#define SW1 PORT0.PIDR.BIT.B3 -#define SW2 PORT0.PIDR.BIT.B5 -#define SW3 PORT0.PIDR.BIT.B7 -#define SW1_PDR PORT0.PDR.BIT.B3 -#define SW2_PDR PORT0.PDR.BIT.B5 -#define SW3_PDR PORT0.PDR.BIT.B7 -#define SW1_PMR PORT0.PMR.BIT.B3 -#define SW2_PMR PORT0.PMR.BIT.B5 -#define SW3_PMR PORT0.PMR.BIT.B7 - -/* LEDs */ -#define LED0 PORT7.PODR.BIT.B3 -#define LED1 PORTG.PODR.BIT.B7 -#define LED2 PORTG.PODR.BIT.B6 -#define LED3 PORTG.PODR.BIT.B5 -#define LED0_PDR PORT7.PDR.BIT.B3 -#define LED1_PDR PORTG.PDR.BIT.B7 -#define LED2_PDR PORTG.PDR.BIT.B6 -#define LED3_PDR PORTG.PDR.BIT.B5 - -#endif /* RSKRX65N_2MB_H */ diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/vecttbl.c b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/vecttbl.c deleted file mode 100644 index 54bdfeb8cf1..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/vecttbl.c +++ /dev/null @@ -1,298 +0,0 @@ -/* Adapted to IAR Embedded Workbench */ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : vecttbl.c -* Device(s) : RX65N -* Description : Definition of the exception vector table, reset vector, and user boot options. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -* : 31.01.2017 1.00_ES Deleted unnecessary comments. -* Added the following setting. -* - Setting of Expansion RAM. -* - Setting of Bank Mode Select. -* - Setting of Startup Bank Switch. -* Added the bsp startup module disable function. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -/* BSP configuration. */ -#include "platform.h" - -/* When using the user startup program, disable the following code. */ -#if (BSP_CFG_STARTUP_DISABLE == 0) - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* Defines CV, CO, CZ, CU, CX, and CE bits. */ -#define FPU_CAUSE_FLAGS (0x000000FC) - -/*********************************************************************************************************************** -* Function name: excep_supervisor_inst_isr -* Description : Supervisor Instruction Violation ISR -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -__interrupt void __privileged_handler (void) -{ - /* If user has registered a callback for this exception then call it. */ - R_BSP_InterruptControl(BSP_INT_SRC_EXC_SUPERVISOR_INSTR, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); -} - -/*********************************************************************************************************************** -* Function name: excep_access_isr -* Description : Access exception ISR -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -__interrupt void __excep_access_inst (void) -{ - /* If user has registered a callback for this exception then call it. */ - R_BSP_InterruptControl(BSP_INT_SRC_EXC_ACCESS, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); -} - -/*********************************************************************************************************************** -* Function name: excep_undefined_inst_isr -* Description : Undefined instruction exception ISR -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -__interrupt void __undefined_handler (void) -{ - /* If user has registered a callback for this exception then call it. */ - R_BSP_InterruptControl(BSP_INT_SRC_EXC_UNDEFINED_INSTR, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); -} - -/*********************************************************************************************************************** -* Function name: excep_floating_point_isr -* Description : Floating point exception ISR -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -__interrupt void _float_placeholder (void) -{ - /* Used for reading FPSW register. */ - uint32_t temp_fpsw; - - /* If user has registered a callback for this exception then call it. */ - R_BSP_InterruptControl(BSP_INT_SRC_EXC_FPU, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - - /* Get current FPSW. */ - temp_fpsw = (uint32_t)get_fpsw(); - /* Clear only the FPU exception flags. */ - set_fpsw(temp_fpsw & ((uint32_t)~FPU_CAUSE_FLAGS)); -} - -/*********************************************************************************************************************** -* Function name: non_maskable_isr -* Description : Non-maskable interrupt ISR -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -__interrupt void __NMI_handler (void) -{ - /* Determine what is the cause of this interrupt. */ - if (1 == ICU.NMISR.BIT.NMIST) - { - /* NMI pin interrupt is requested. */ - R_BSP_InterruptControl(BSP_INT_SRC_EXC_NMI_PIN, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - - /* Clear NMI pin interrupt flag. */ - ICU.NMICLR.BIT.NMICLR = 1; - } - - if (1 == ICU.NMISR.BIT.OSTST) - { - /* Oscillation stop detection interrupt is requested. */ - R_BSP_InterruptControl(BSP_INT_SRC_OSC_STOP_DETECT, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - - /* Clear oscillation stop detect flag. */ - ICU.NMICLR.BIT.OSTCLR = 1; - } - - if (1 == ICU.NMISR.BIT.WDTST) - { - /* WDT underflow/refresh error interrupt is requested. */ - R_BSP_InterruptControl(BSP_INT_SRC_WDT_ERROR, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - - /* Clear WDT flag. */ - ICU.NMICLR.BIT.WDTCLR = 1; - } - - if (1 == ICU.NMISR.BIT.IWDTST) - { - /* IWDT underflow/refresh error interrupt is requested. */ - R_BSP_InterruptControl(BSP_INT_SRC_IWDT_ERROR, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - - /* Clear IWDT flag. */ - ICU.NMICLR.BIT.IWDTCLR = 1; - } - - if (1 == ICU.NMISR.BIT.LVD1ST) - { - /* Voltage monitoring 1 interrupt is requested. */ - R_BSP_InterruptControl(BSP_INT_SRC_LVD1, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - - /* Clear LVD1 flag. */ - ICU.NMICLR.BIT.LVD1CLR = 1; - } - - if (1 == ICU.NMISR.BIT.LVD2ST) - { - /* Voltage monitoring 1 interrupt is requested. */ - R_BSP_InterruptControl(BSP_INT_SRC_LVD2, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - - /* Clear LVD2 flag. */ - ICU.NMICLR.BIT.LVD2CLR = 1; - } - - if (1 == ICU.NMISR.BIT.RAMST) - { - if(1 == RAM.RAMSTS.BIT.RAMERR) - { - /* RAM Error interrupt is requested. */ - R_BSP_InterruptControl(BSP_INT_SRC_RAM, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - - /* Clear RAM flags. */ - RAM.RAMSTS.BIT.RAMERR = 0; - } -#if defined(BSP_MCU_RX65N_2MB) /* In the case of 1.5 or 2Mbyte ROM capacity. */ - if(1 == RAM.EXRAMSTS.BIT.EXRAMERR) - { - /* Expansion RAM Error interrupt is requested. */ - R_BSP_InterruptControl(BSP_INT_SRC_EXRAM, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - - /* Clear Expansion RAM flags. */ - RAM.EXRAMSTS.BIT.EXRAMERR = 0; - } -#endif - } -} - -/*********************************************************************************************************************** -* Function name: undefined_interrupt_source_isr -* Description : All undefined interrupt vectors point to this function. -* Set a breakpoint in this function to determine which source is creating unwanted interrupts. -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -__interrupt void __undefined_interrupt_source_handler(void) -{ - /* If user has registered a callback for this exception then call it. */ - R_BSP_InterruptControl(BSP_INT_SRC_UNDEFINED_INTERRUPT, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); -} - -/*********************************************************************************************************************** -* Function name: bus_error_isr -* Description : By default, this demo code enables the Bus Error Interrupt. This interrupt will fire if the user tries -* to access code or data from one of the reserved areas in the memory map, including the areas covered -* by disabled chip selects. A nop() statement is included here as a convenient place to set a breakpoint -* during debugging and development, and further handling should be added by the user for their -* application. -* Arguments : none -* Return value : none -***********************************************************************************************************************/ -#pragma vector=VECT(BSC,BUSERR) -__interrupt void bus_error_isr (void) - -{ - /* Clear the bus error */ - BSC.BERCLR.BIT.STSCLR = 1; - - /* - To find the address that was accessed when the bus error occurred, read the register BSC.BERSR2.WORD. The upper - 13 bits of this register contain the upper 13-bits of the offending address (in 512K byte units) - */ - - /* If user has registered a callback for this exception then call it. */ - R_BSP_InterruptControl(BSP_INT_SRC_BUS_ERROR, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); -} - -/*********************************************************************************************************************** -* The following array fills in the UB codes to get into User Boot Mode, the MDEB register, and the User Boot reset -* vector. -***********************************************************************************************************************/ - -// SPCC register -#pragma public_equ="__SPCC", 0xffffffff - -// TMEF register -#pragma public_equ="__TMEF", BSP_CFG_TRUSTED_MODE_FUNCTION - -// OSIC register (ID codes) -#pragma public_equ="__OSIS_1",0xffffffff -#pragma public_equ="__OSIS_2",0xffffffff -#pragma public_equ="__OSIS_3",0xffffffff -#pragma public_equ="__OSIS_4",0xffffffff - -// TMINF register -#pragma public_equ="__TMINF", 0xffffffff - -#ifdef __BIG - #define MDE_VALUE (0xfffffff8) /* big */ -#else - #define MDE_VALUE (0xffffffff) /* little */ -#endif - -#if defined(BSP_MCU_RX65N_2MB) /* In the case of 1.5 or 2Mbyte ROM capacity. */ - #if (BSP_CFG_CODE_FLASH_BANK_MODE == 0) - #define BANK_MODE_VALUE (0xffffff8f) /* dual */ - #else - #define BANK_MODE_VALUE (0xffffffff) /* linear */ - #endif -#else - #define BANK_MODE_VALUE (0xffffffff) /* linear */ -#endif - -// MDE register (Single Chip Mode) -#pragma public_equ="__MDE", (MDE_VALUE & BANK_MODE_VALUE) - -#pragma public_equ="__OFS0", BSP_CFG_OFS0_REG_VALUE - -// OFS1 register -#pragma public_equ="__OFS1", BSP_CFG_OFS1_REG_VALUE - -// FAW register -#pragma public_equ="__FAW", BSP_CFG_FAW_REG_VALUE - -// ROMCODE register -#pragma public_equ="__ROMCODE", BSP_CFG_ROMCODE_REG_VALUE - -#if defined(BSP_MCU_RX65N_2MB) /* In the case of 1.5 or 2Mbyte ROM capacity. */ - #if (BSP_CFG_CODE_FLASH_START_BANK == 0) - /* The address range of bank 1 from FFF00000h to FFFFFFFFh and bank 0 from FFE00000h to FFEFFFFFh. */ - #define START_BANK_VALUE (0xffffffff) - #else - /* The address range of bank 1 from FFE00000h to FFEFFFFFh and bank 0 from FFF00000h to FFFFFFFFh. */ - #define START_BANK_VALUE (0xfffffff8) - #endif - - #pragma public_equ="__BANKSEL", START_BANK_VALUE -#else - /* Do nothing. */ -#endif - - -#endif /* BSP_CFG_STARTUP_DISABLE == 0 */ - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/vecttbl.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/vecttbl.h deleted file mode 100644 index 6287bb34759..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/rskrx65n_2mb/vecttbl.h +++ /dev/null @@ -1,48 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : vecttbl.h -* Device(s) : RX65N -* Description : Has function prototypes for exception callback functions. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -***********************************************************************************************************************/ - -#ifndef VECTTBL_HEADER_INC -#define VECTTBL_HEADER_INC - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global functions (to be accessed by other files) -***********************************************************************************************************************/ - -#endif /* VECTTBL_HEADER_INC */ diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/user/r_bsp.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/user/r_bsp.h deleted file mode 100644 index 2ad5fdb7c55..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/board/user/r_bsp.h +++ /dev/null @@ -1,54 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp.h -* Description : Has the header files that should be included for this platform. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 13.01.2012 1.00 First Release -* : 27.06.2012 1.10 Updated with new information to reflect udpated r_bsp structure. -***********************************************************************************************************************/ - -#ifndef BSP_BOARD_USER -#define BSP_BOARD_USER - -/* Make sure that no other platforms have already been defined. Do not touch this! */ -#ifdef PLATFORM_DEFINED -#error "Error - Multiple platforms defined in platform.h!" -#else -#define PLATFORM_DEFINED -#endif - -/*********************************************************************************************************************** -INCLUDE APPROPRIATE MCU AND BOARD FILES -***********************************************************************************************************************/ -/* This is a user defined board. Start off by: - 1)Copy and rename one of the 'board' folders that most closely matches your system (same MCU Series and Group). - 2)Substitute in your MCU Group for the *MCU Group* option in the #include below for mcu_info.h. - 3)Copy the other #includes from the r_bsp.h in the 'board' folder that you copied earlier. - 4)Configure the BSP for your board by modifying the r_bsp_config_reference.h. - 5)Copy r_bsp_config_reference.h to your project directory and rename it r_bsp_config.h. - You can also add your own include files here as well. */ -#include "r_bsp_config.h" -#include "mcu/*MCU Group*/mcu_info.h" - -#endif /* BSP_BOARD_USER */ - - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/doc/en/r01an3512ej0050-rx.pdf b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/doc/en/r01an3512ej0050-rx.pdf deleted file mode 100644 index 531cce99a276881ffc85b1d441cdeafee542610f..0000000000000000000000000000000000000000 GIT binary patch literal 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zQqhO*T?%M2_b&G%zv%La++6N0U70(RLl(LUeXK803ti=~bA9Skg@lRw1tTZ$V|7KY zPv82-dkAp&ZmQnYJ9i!#)T}R-4gMavt678iu7e>Puk9fCyT`?LeJR@DFD00L+yhtq zc6*cF-n6?i(#?mE--89(txY_U9*;Zw1la%->Tj5X&67WTkZ_JVUfa8*u% z-+SPyUX#$|_u7a>2-JOQW#MnP|8w+GYBJ|h(?Vd`2HY*)3F&*;29C3~DotLwaE;LR zEFZQ(lF|F|xh4zz_QCJVw}qF~aOnZ_&U6K#wd{Zg4EyLKJt@Q0!wx7_NSS;u=kDIh zw-shQrD%$D(EB9NM(GyNWNt!X`|jcG!kb|)+;_P)9gHHy-H6)*)?y86rJ(FL55@nt1OEEUpa1RO|MJVX-~8@(zy8O6``^F(s))q*zyA3@{^ghd z`Om-JKb^_1{^8eu_s4(w-FH7F@qR9x@biy9=G^+Z;K~ob`QuMN{a8BPkAL|1`S-v3 z!%r!&AO7~o&p-X<$M1gn@WUTI_V?o-zx(m~pMU , "Project Includes" -***********************************************************************************************************************/ -/* Get information about current board and MCU. */ -#include "platform.h" - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -#ifdef __RXV1 -#define CPU_CYCLES_PER_LOOP (5) // Known number of CPU cycles required to execute the delayWait() loop -#else -#define CPU_CYCLES_PER_LOOP (4) -#endif - -#define OVERHEAD_CYCLES (2) // R_BSP_SoftwareDelay() overhead per call -#define OVERHEAD_CYCLES_64 (2) // R_BSP_SoftwareDelay() overhead per call using 64-bit ints - -#define CKSEL_LOCO (0x0) // SCKCR3 register setting for LOCO - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global variables (to be accessed by other files) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Private global variables and functions -***********************************************************************************************************************/ -extern uint32_t get_iclk_freq_hz(void); // Get the board specific ICLK frequency - -/*********************************************************************************************************************** -* Function Name: R_BSP_GetVersion -* Description : Returns the current version of this module. The version number is encoded where the top 2 bytes are the -* major version number and the bottom 2 bytes are the minor version number. For example, Version 4.25 -* would be returned as 0x00040019. -* Arguments : none -* Return Value : Version of this module. -***********************************************************************************************************************/ - -uint32_t R_BSP_GetVersion (void) -{ - /* These version macros are defined in platform.h. */ - return ((((uint32_t)R_BSP_VERSION_MAJOR) << 16) | (uint32_t)R_BSP_VERSION_MINOR); -} - - -/*********************************************************************************************************************** -* Function Name: delayWait -* Description : This asm loop executes a known number (5) of CPU cycles. If a value of '4' is passed -* in as an argument, then this function would consume 20 CPU cycles before returning. -* Arguments : loop_cnt - A single 32-bit value is provided as the number of loops to execute. -* : -* Return Value : None -***********************************************************************************************************************/ - -static void delayWait (unsigned long loop_cnt) -{ - asm("BRA.B _lab\n" - "NOP\n" - "_lab:\n" - "NOP\n" - "SUB #01H, R1\n" - "BNE.B _lab"); -} - - -/*********************************************************************************************************************** -* Function Name: R_BSP_GetIClkFreqHz -* Description : Return the current ICLK frequency in Hz. -* Arguments : None -* Return Value : uint32_t - the system ICLK frequency in Hz -***********************************************************************************************************************/ -uint32_t R_BSP_GetIClkFreqHz(void) -{ - return get_iclk_freq_hz(); // Get the MCU specific ICLK frequency -} - - -/*********************************************************************************************************************** -* Function Name: R_BSP_SoftwareDelay -* Description : Delay the specified duration in units and return. -* Arguments : uint32_t delay - the number of 'units' to delay -* : bsp_delay_units_t units - the 'base' for the units specified. Valid values are: -* BSP_DELAY_MICROSECS, BSP_DELAY_MILLISECS, BSP_DELAY_SECS. -* -* Accuracy is good, however the minimum possible delay depends on the current ICLK frequency -* and the overhead clock cycles required for this function to run. -* For example, given a 16 MHz ICLK and 180 clock cycles for this function, the minimum -* possible delay would be: 1/16000000 * 180 = 11.25 uS -* -* Return Value : true if delay executed. -* false if delay/units combination resulted in overflow or the delay cannot be achieved -***********************************************************************************************************************/ -bool R_BSP_SoftwareDelay(uint32_t delay, bsp_delay_units_t units) -{ - volatile uint32_t iclkRate; - volatile uint32_t delay_cycles; - volatile uint32_t loop_cnt; - volatile uint64_t delay_cycles_64; - volatile uint64_t loop_cnt_64; - -#ifdef BSP_CFG_PARAM_CHECKING_ENABLE - if ((units != BSP_DELAY_MICROSECS) && (units != BSP_DELAY_MILLISECS) && (units != BSP_DELAY_SECS)) - { - return(false); - } -#endif - - iclkRate = R_BSP_GetIClkFreqHz(); // Get the current ICLK frequency - - /* - * In order to handle all possible combinations of delay/ICLK it is necessary to use 64-bit - * integers (not all MCUs have floating point support). However, there is no native hw support - * for 64 bit integers so it requires many more clock cycles. This is not an issue if the - * requested delay is long enough and the ICLK is fast, but for delays in the low microseconds - * and/or a slow ICLK we use 32 bit integers to reduce the overhead cycles of this function - * by approximately a third and stand the best chance of achieving the requested delay. - */ - if ( (units == BSP_DELAY_MICROSECS) && - (delay <= (0xFFFFFFFFUL / iclkRate)) ) // Ensure (iclkRate * delay) will not exceed 32 bits - { - delay_cycles = ((iclkRate * delay) / units); - - if (delay_cycles > OVERHEAD_CYCLES) - { - delay_cycles -= OVERHEAD_CYCLES; - } - else - { - delay_cycles = 0; - } - - loop_cnt = delay_cycles / CPU_CYCLES_PER_LOOP; - - if (loop_cnt == 0) - { - /* The requested delay is too large/small for the current ICLK. Return false which - * also results in the minimum possible delay. */ - return(false); - } - } - else - { - delay_cycles_64 = (((uint64_t)iclkRate * (uint64_t)delay) / units); - - if (delay_cycles_64 > OVERHEAD_CYCLES_64) - { - delay_cycles_64 -= OVERHEAD_CYCLES_64; - } - else - { - delay_cycles = 0; - } - - loop_cnt_64 = delay_cycles_64 / CPU_CYCLES_PER_LOOP; - - if ((loop_cnt_64 > 0xFFFFFFFF) || (loop_cnt_64 == 0)) - { - /* The requested delay is too large/small for the current ICLK. Return false which - * also results in the minimum possible delay. */ - return(false); - } - - loop_cnt = (uint32_t)loop_cnt_64; - } - - delayWait(loop_cnt); - - return(true); -} diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/all/r_bsp_common.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/all/r_bsp_common.h deleted file mode 100644 index b9b87e8adf6..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/all/r_bsp_common.h +++ /dev/null @@ -1,97 +0,0 @@ -/* Adapted to IAR Embedded Workbench */ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_common.h -* Description : Implements functions that apply to all r_bsp boards and MCUs. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 06.05.2013 1.00 First Release -* : 25.06.2013 1.10 Now contains standard includes (stdint.h, stdbool.h, etc) as well as include for -* r_typedefs.h when needed. -* : 02.07.2013 1.11 Added #include for machine.h. -* : 10.02.2014 1.12 Changed minor version to '40'. -* : 24.03.2014 1.12 Changed minor version to '60'. -* : 14.04.2014 1.12 Added typedef for fit_callback_t. -* : 30.09.2015 1.13 Changed Major/Minor version to 3.00 -* : 30.09.2015 1.14 Changed Minor version to 3.01 -* : 01.12.2015 1.15 Changed Minor version to 3.10 -* : 01.02.2016 1.16 Changed Minor version to 3.20 -* : 29.02.2016 1.17 Changed Minor version to 3.30 -* : 13.04.2016 1.18 Changed Minor version to 3.31 -* : 01.10.2016 1.19 Changed Minor version to 3.40 -* : 04.11.2016 1.20 Changed Minor version to 3.50 -* : 31.01.2017 1.21_ES Changed Minor version to 0.50 -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -/* If C99 is supported by your toolchain then use the included fixed-width integer, bool, etc support. If not, then - * use the included r_typedefs.h file. - */ -#if __STDC_VERSION__ >= 199901L -#include -#include -#include -#else -#include "r_typedefs.h" -#endif - -#if defined(__IAR_SYSTEMS_ICC__) -/* Intrinsic functions provided by compiler. */ -#include -#else -/* PORT: Use header file for other compiler. */ -#endif - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* Version Number of r_bsp. */ -#define R_BSP_VERSION_MAJOR (0) -#define R_BSP_VERSION_MINOR (50) - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -/* Available delay units. */ -typedef enum -{ - BSP_DELAY_MICROSECS = 1000000, // Requested delay amount is in microseconds - BSP_DELAY_MILLISECS = 1000, // Requested delay amount is in milliseconds - BSP_DELAY_SECS = 1 // Requested delay amount is in seconds -} bsp_delay_units_t; - -/* Easy to use typedef for FIT module callback functions. */ -typedef void (*fit_callback_t)(void *p_args); - -/*********************************************************************************************************************** -Exported global variables -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global functions (to be accessed by other files) -***********************************************************************************************************************/ -uint32_t R_BSP_GetVersion(void); -bool R_BSP_SoftwareDelay(uint32_t delay, bsp_delay_units_t units); -uint32_t R_BSP_GetIClkFreqHz(void); - - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/all/r_typedefs.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/all/r_typedefs.h deleted file mode 100644 index 5b2cf29a78c..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/all/r_typedefs.h +++ /dev/null @@ -1,54 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_typedefs.h -* Description : This has fixed-width integer and bool support for compilers that are not C99 compliant and do not have -* the header files stdint.h, stdbool.h, and stddef.h. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 18.09.2012 1.00 First Release -* : 21.06.2013 1.10 Added NULL and size_t support. -* : 22.11.2013 1.11 Changed size_t to 'unsigned long' from 'unsigned int'. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -#define bool _Bool -#define false 0 -#define true 1 -#define NULL 0 - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -typedef signed char int8_t; -typedef unsigned char uint8_t; -typedef signed short int16_t; -typedef unsigned short uint16_t; -typedef signed long int32_t; -typedef unsigned long uint32_t; -typedef signed long long int64_t; -typedef unsigned long long uint64_t; -typedef unsigned int _Bool; -typedef unsigned long size_t; - - - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/cpu.c b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/cpu.c deleted file mode 100644 index d4112d9607b..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/cpu.c +++ /dev/null @@ -1,263 +0,0 @@ -/* Adapted to IAR Embedded Workbench */ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : cpu.c -* Description : This module implements CPU specific functions. An example is enabling/disabling interrupts. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -* : 31.01.2017 1.01_ES Changed comments of the PRCR register. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -/* Platform support. */ -#include "platform.h" - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* Key code for writing PRCR register. */ -#define BSP_PRV_PRCR_KEY (0xA500) - -/*********************************************************************************************************************** -Error checking -***********************************************************************************************************************/ -#if !defined(__IAR_SYSTEMS_ICC__) - #error "ERROR - Need to add compiler specific code in cpu.c" -#endif - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global variables (to be accessed by other files) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Private global variables and functions -***********************************************************************************************************************/ -/* Used for holding reference counters for protection bits. */ -static volatile uint16_t g_protect_counters[BSP_REG_PROTECT_TOTAL_ITEMS]; -/* Masks for setting or clearing the PRCR register. Use -1 for size because PWPR in MPC is used differently. */ -static const uint16_t g_prcr_masks[BSP_REG_PROTECT_TOTAL_ITEMS-1] = -{ - 0x0001, /* PRC0. */ - 0x0002, /* PRC1. */ - 0x0008, /* PRC3. */ -}; - -/*********************************************************************************************************************** -* Function Name: R_BSP_InterruptsDisable -* Description : Globally disable interrupts. -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_BSP_InterruptsDisable (void) -{ -#if defined(__IAR_SYSTEMS_ICC__) - /* Use the compiler intrinsic function to clear the I flag. This function is available with for the Renesas RX - compiler. This may need to be changed for other compilers. */ - __disable_interrupt(); -#endif -} - -/*********************************************************************************************************************** -* Function Name: R_BSP_InterruptsEnable -* Description : Globally enable interrupts. -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_BSP_InterruptsEnable (void) -{ -#if defined(__IAR_SYSTEMS_ICC__) - /* Use the compiler intrinsic function to set the I flag. This function is available with for the Renesas RX - compiler. This may need to be changed for other compilers. */ - __enable_interrupt(); -#endif -} - -/*********************************************************************************************************************** -* Function Name: R_BSP_CpuInterruptLevelRead -* Description : Reads the processor interrupt priority level. -* Arguments : none -* Return Value : The current processor IPL -***********************************************************************************************************************/ -uint32_t R_BSP_CpuInterruptLevelRead (void) -{ -#if defined(__IAR_SYSTEMS_ICC__) - /* Use the compiler intrinsic function to read the CPU IPL. This function is available with for the Renesas RX - compiler. This may need to be changed for other compilers. */ - return (uint32_t)get_ipl(); -#endif -} - -/*********************************************************************************************************************** -* Function Name: R_BSP_CpuInterruptLevelWrite -* Description : Writes the processor interrupt priority level. -* Arguments : level - -* The level to set the processor's IPL to. -* Return Value : true - -* The level was set successfully. -* false - -* Invalid level input. -***********************************************************************************************************************/ -bool R_BSP_CpuInterruptLevelWrite (uint32_t level) -{ -#if (BSP_CFG_PARAM_CHECKING_ENABLE == 1) - /* Check for valid level. */ - if (level > BSP_MCU_IPL_MAX) - { - return false; - } -#endif - -#if defined(__IAR_SYSTEMS_ICC__) - /* Use the compiler intrinsic function to set the CPU IPL. This function is available with for the Renesas RX - compiler. This may need to be changed for other compilers. */ - set_ipl((signed long)level); -#endif - - return true; -} - -/*********************************************************************************************************************** -* Function Name: R_BSP_RegisterProtectEnable -* Description : Enables register protection. Registers that are protected cannot be written to. Register protection is -* enabled by using the Protect Register (PRCR) and the MPC's Write-Protect Register (PWPR). -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_BSP_RegisterProtectEnable (bsp_reg_protect_t regs_to_protect) -{ - /* Is it safe to disable write access? */ - if (0 != g_protect_counters[regs_to_protect]) - { - /* Decrement the protect counter */ - g_protect_counters[regs_to_protect]--; - } - - /* Is it safe to disable write access? */ - if (0 == g_protect_counters[regs_to_protect]) - { - if (BSP_REG_PROTECT_MPC != regs_to_protect) - { - /* Enable protection using PRCR register. */ - /* When writing to the PRCR register the upper 8-bits must be the correct key. Set lower bits to 0 to - disable writes. - b15:b8 PRKEY - Write 0xA5 to upper byte to enable writing to lower byte - b7:b4 Reserved (set to 0) - b3 PRC3 - Enables writing to the registers related to the LVD: LVCMPCR, LVDLVLR, LVD1CR0, LVD1CR1, - LVD1SR, LVD2CR0, LVD2CR1, LVD2SR. - b2 Reserved (set to 0) - b1 PRC1 - Enables writing to the registers related to operating modes, low power consumption, the - clock generation circuit, and software reset: SYSCR0, SYSCR1, SBYCR, MSTPCRA, MSTPCRB, - MSTPCRC, MSTPCRD, OPCCR, RSTCKCR, DPSBYCR, DPSIER0, DPSIER1, DPSIER2, DPSIER3, - DPSIFR0, DPSIFR1, DPSIFR2, DPSIFR3, DPSIEGR0, DPSIEGR1, DPSIEGR2, DPSIEGR3, - MOSCWTCR, SOSCETCR, MOFCR, HOCOPCR, SWRR. - b0 PRC0 - Enables writing to the registers related to the clock generation circuit: SCKCR, SCKCR2, - SCKCR3, PLLCR, PLLCR2, BCKCR, MOSCCR, SOSCCR, LOCOCR, ILOCOCR, HOCOCR, HOCOCR2, OSTDCR, - OSTDSR. - */ - SYSTEM.PRCR.WORD = (uint16_t)((SYSTEM.PRCR.WORD | BSP_PRV_PRCR_KEY) & (~g_prcr_masks[regs_to_protect])); - } - else - { - /* Enable protection for MPC using PWPR register. */ - /* Enable writing of PFSWE bit. It could be assumed that the B0WI bit is still cleared from a call to - protection disable function, but it is written here to make sure that the PFSWE bit always gets - cleared. */ - MPC.PWPR.BIT.B0WI = 0; - /* Disable writing to PFS registers. */ - MPC.PWPR.BIT.PFSWE = 0; - /* Disable writing of PFSWE bit. */ - MPC.PWPR.BIT.B0WI = 1; - } - } -} - -/*********************************************************************************************************************** -* Function Name: R_BSP_RegisterProtectDisable -* Description : Disables register protection. Registers that are protected cannot be written to. Register protection is -* disabled by using the Protect Register (PRCR) and the MPC's Write-Protect Register (PWPR). -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_BSP_RegisterProtectDisable (bsp_reg_protect_t regs_to_unprotect) -{ - /* If this is first entry then disable protection. */ - if (0 == g_protect_counters[regs_to_unprotect]) - { - if (BSP_REG_PROTECT_MPC != regs_to_unprotect) - { - /* Enable protection using PRCR register. */ - /* When writing to the PRCR register the upper 8-bits must be the correct key. Set lower bits to 1 to - enable writes. - b15:b8 PRKEY - Write 0xA5 to upper byte to enable writing to lower byte - b7:b4 Reserved (set to 0) - b3 PRC3 - Enables writing to the registers related to the LVD: LVCMPCR, LVDLVLR, LVD1CR0, LVD1CR1, - LVD1SR, LVD2CR0, LVD2CR1, LVD2SR. - b2 Reserved (set to 0) - b1 PRC1 - Enables writing to the registers related to operating modes, low power consumption, the - clock generation circuit, and software reset: SYSCR0, SYSCR1, SBYCR, MSTPCRA, MSTPCRB, - MSTPCRC, MSTPCRD, OPCCR, RSTCKCR, DPSBYCR, DPSIER0, DPSIER1, DPSIER2, DPSIER3, - DPSIFR0, DPSIFR1, DPSIFR2, DPSIFR3, DPSIEGR0, DPSIEGR1, DPSIEGR2, DPSIEGR3, - MOSCWTCR, SOSCETCR, MOFCR, HOCOPCR, SWRR. - b0 PRC0 - Enables writing to the registers related to the clock generation circuit: SCKCR, SCKCR2, - SCKCR3, PLLCR, PLLCR2, BCKCR, MOSCCR, SOSCCR, LOCOCR, ILOCOCR, HOCOCR, HOCOCR2, OSTDCR, - OSTDSR. - */ - SYSTEM.PRCR.WORD = (uint16_t)((SYSTEM.PRCR.WORD | BSP_PRV_PRCR_KEY) | g_prcr_masks[regs_to_unprotect]); - } - else - { - /* Disable protection for MPC using PWPR register. */ - /* Enable writing of PFSWE bit. */ - MPC.PWPR.BIT.B0WI = 0; - /* Enable writing to PFS registers. */ - MPC.PWPR.BIT.PFSWE = 1; - } - } - - /* Increment the protect counter */ - g_protect_counters[regs_to_unprotect]++; -} - -/*********************************************************************************************************************** -* Function Name: bsp_register_protect_open -* Description : Initializes variables needed for register protection functionality. -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void bsp_register_protect_open (void) -{ - uint32_t i; - - /* Initialize reference counters to 0. */ - for (i = 0; i < BSP_REG_PROTECT_TOTAL_ITEMS; i++) - { - g_protect_counters[i] = 0; - } -} - - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/cpu.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/cpu.h deleted file mode 100644 index 3a100aedfa1..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/cpu.h +++ /dev/null @@ -1,71 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : cpu.h -* Description : This module implements CPU specific functions. An example is enabling/disabling interrupts. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -* : 31.01.2017 1.01_ES Changed comments of the following enumeration. -* - bsp_reg_protect_t -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -/* The different types of registers that can be protected. */ -typedef enum -{ - /* Enables writing to the registers related to the clock generation circuit: SCKCR, SCKCR2, SCKCR3, PLLCR, - PLLCR2, BCKCR, MOSCCR, SOSCCR, LOCOCR, ILOCOCR, HOCOCR, HOCOCR2, OSTDCR, OSTDSR. */ - BSP_REG_PROTECT_CGC = 0, - /* Enables writing to the registers related to operating modes, low power consumption, the clock generation circuit, - and software reset: SYSCR0, SYSCR1, SBYCR, MSTPCRA, MSTPCRB, MSTPCRC, MSTPCRD, OPCCR, RSTCKCR, - DPSBYCR, DPSIER0, DPSIER1, DPSIER2, DPSIER3, DPSIFR0, DPSIFR1, DPSIFR2, DPSIFR3, - DPSIEGR0, DPSIEGR1, DPSIEGR2, DPSIEGR3, MOSCWTCR, SOSCWTCR, MOFCR, HOCOPCR, SWRR. */ - BSP_REG_PROTECT_LPC_CGC_SWR, - /* Enables writing to the registers related to the LVD:LVCMPCR, LVDLVLR, LVD1CR0, LVD1CR1, LVD1SR, LVD2CR0, - LVD2CR1, LVD2SR. */ - BSP_REG_PROTECT_LVD, - /* Enables writing to MPC's PFS registers. */ - BSP_REG_PROTECT_MPC, - /* This entry is used for getting the number of enum items. This must be the last entry. DO NOT REMOVE THIS ENTRY!*/ - BSP_REG_PROTECT_TOTAL_ITEMS -} bsp_reg_protect_t; - -/*********************************************************************************************************************** -Exported global variables -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global functions (to be accessed by other files) -***********************************************************************************************************************/ -void R_BSP_InterruptsDisable(void); -void R_BSP_InterruptsEnable(void); -uint32_t R_BSP_CpuInterruptLevelRead(void); -bool R_BSP_CpuInterruptLevelWrite(uint32_t level); -void R_BSP_RegisterProtectEnable(bsp_reg_protect_t regs_to_protect); -void R_BSP_RegisterProtectDisable(bsp_reg_protect_t regs_to_unprotect); - -void bsp_register_protect_open(void); //r_bsp internal function. DO NOT CALL. diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/locking.c b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/locking.c deleted file mode 100644 index 29ade62a7b4..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/locking.c +++ /dev/null @@ -1,165 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : locking.c -* Description : This implements a locking mechanism that can be used by all code. The locking is done atomically so -* common resources can be accessed safely. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -/* Has intrinsic support. Includes xchg() which is used in this code. */ -#include -/* Platform configuration. */ -#include "platform.h" - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global variables (to be accessed by other files) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Private global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: R_BSP_SoftwareLock -* Description : Attempt to acquire the lock that has been sent in. -* Arguments : plock - -* Pointer to lock structure with lock to try and acquire. -* Return Value : true - -* Lock was acquired. -* false - -* Lock was not acquired. -***********************************************************************************************************************/ -bool R_BSP_SoftwareLock (BSP_CFG_USER_LOCKING_TYPE * const plock) -{ -#if BSP_CFG_USER_LOCKING_ENABLED == 0 - bool ret = false; - - /* Variable used in trying to acquire lock. Using the xchg instruction makes this atomic */ - int32_t is_locked = true; - - /* This example uses the RX MCU's atomic xchg() instruction. plock->lock is the lock we are trying to reserve. - The way this works is that 'is_locked' gets the value of the plock->lock and plock->lock gets the value of - 'is_locked' which we just set to 'true'. Basically this is an atomic 'swap' command. If the lock had not yet been - reserved then its value would be 'false' and after the xchg() instruction finished 'is_locked' would have - 'false'. If it had already been reserved then 'is_locked' would have 'true' after the xchg() instruction. Since - plock->lock was already 'true' and we just set it back to 'true' everything is ok. To see if we reserved the lock - we just need to check the value of 'is_locked' after this instruction finishes. */ - - /* Try to acquire semaphore to obtain lock */ - xchg((signed long *)&is_locked, (signed long *)&plock->lock); - - /* Check to see if semaphore was successfully taken */ - if (is_locked == false) - { - /* Lock obtained, return success. */ - ret = true; - } - else - { - /* Lock was not obtained, another task already has it. */ - } - - return ret; -#else - /* User is going to handle the locking themselves. */ - return BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION(plock); -#endif -} /* End of function R_BSP_SoftwareLock() */ - -/*********************************************************************************************************************** -* Function Name: R_BSP_SoftwareUnlock -* Description : Release hold on lock. -* Arguments : plock - -* Pointer to lock structure with lock to release. -* Return Value : true - -* Lock was released. -* false - -* Lock was not released. -***********************************************************************************************************************/ -bool R_BSP_SoftwareUnlock (BSP_CFG_USER_LOCKING_TYPE * const plock) -{ -#if BSP_CFG_USER_LOCKING_ENABLED == 0 - /* Set lock back to unlocked. */ - plock->lock = false; - - return true; -#else - /* User is going to handle the locking themselves. */ - return BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION(plock); -#endif -} /* End of function R_BSP_SoftwareUnlock() */ - - -/*********************************************************************************************************************** -* Function Name: R_BSP_HardwareLock -* Description : Attempt to acquire the lock that has been sent in. This function takes in a peripheral index into the -* array that holds hardware locks. -* Arguments : hw_index - -* Index in locks array to the hardware resource to lock. -* Return Value : true - -* Lock was acquired. -* false - -* Lock was not acquired. -***********************************************************************************************************************/ -bool R_BSP_HardwareLock (mcu_lock_t const hw_index) -{ -#if BSP_CFG_USER_LOCKING_ENABLED == 0 - /* Pass actual lock to software lock function. */ - return R_BSP_SoftwareLock(&g_bsp_Locks[hw_index]); -#else - /* User is going to handle the locking themselves. */ - return BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION(hw_index); -#endif -} /* End of function R_BSP_HardwareLock() */ - -/*********************************************************************************************************************** -* Function Name: R_BSP_HardwareUnlock -* Description : Release hold on lock. -* Arguments : hw_index - -* Index in locks array to the hardware resource to unlock. -* Return Value : true - -* Lock was released. -* false - -* Lock was not released. -***********************************************************************************************************************/ -bool R_BSP_HardwareUnlock (mcu_lock_t const hw_index) -{ -#if BSP_CFG_USER_LOCKING_ENABLED == 0 - /* Pass actual lock to software unlock function. */ - return R_BSP_SoftwareUnlock(&g_bsp_Locks[hw_index]); -#else - /* User is going to handle the locking themselves. */ - return BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION(hw_index); -#endif -} /* End of function R_BSP_HardwareUnlock() */ diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/locking.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/locking.h deleted file mode 100644 index 9e3402eaf9c..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/locking.h +++ /dev/null @@ -1,67 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : locking.h -* Description : This implements a locking mechanism that can be used by all code. The locking is done atomically so -* common resources can be accessed safely. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -***********************************************************************************************************************/ - -#ifndef LOCKING_H -#define LOCKING_H - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -/* Lock types. */ -#include "mcu_locks.h" - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global variables -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global functions (to be accessed by other files) -***********************************************************************************************************************/ -bool R_BSP_SoftwareLock(BSP_CFG_USER_LOCKING_TYPE * const plock); -bool R_BSP_SoftwareUnlock(BSP_CFG_USER_LOCKING_TYPE * const plock); -bool R_BSP_HardwareLock(mcu_lock_t const hw_index); -bool R_BSP_HardwareUnlock(mcu_lock_t const hw_index); - -#if BSP_CFG_USER_LOCKING_ENABLED != 0 -/* Is user is using their own lock functions then these are the prototypes. */ -bool BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * const plock); -bool BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * const plock); -bool BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION(mcu_lock_t const hw_index); -bool BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION(mcu_lock_t const hw_index); -#endif - -#endif /* LOCKING_H */ - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_clocks.c b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_clocks.c deleted file mode 100644 index 77001f6311c..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_clocks.c +++ /dev/null @@ -1,117 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : mcu_clocks.c -* Description : Contains clock specific routines -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -#include "platform.h" - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -#define CKSEL_LOCO 0X0 // SCKCR3.CKSEL register setting for LOCO -#define CKSEL_HOCO 0X1 // SCKCR3.CKSEL register setting for HOCO -#define CKSEL_MAIN_OSC 0X2 // SCKCR3.CKSEL register setting for MAIN OSC -#define CKSEL_SUBCLOCK 0X3 // SCKCR3.CKSEL register setting for SUB-CLOCK OSC -#define CKSEL_PLL 0X4 // SCKCR3.CKSEL register setting for PLL - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global variables (to be accessed by other files) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Private global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: get_iclk_freq_hz (RX65N) -* Description : Return the current ICLK frequency in Hz. Called by R_BSP_GetIClkFreqHz(). -* -* The system clock source can be changed at any time via SYSTEM.SCKCR3.BIT.CKSEL, so in order to -* determine the ICLK frequency we need to first find the current system clock source and then, -* in some cases where the clock source can be configured for multiple frequencies, calculate the -* frequency at which it is currently running. -* -* Arguments : None -* -* Return Value : uint32_t - the iclk frequency in Hz -* -***********************************************************************************************************************/ -uint32_t get_iclk_freq_hz(void) -{ - #define NORMALIZE_X10 10 // used to avoid floating point arithmetic - - uint32_t sysClockSrcFreq; - uint32_t pll_multiplier; - uint32_t pll_source_freq; - uint32_t hoco_frequency[3] = {16000000, 18000000, 20000000}; // 16/18/20 MHz - uint8_t cksel = (uint8_t)SYSTEM.SCKCR3.BIT.CKSEL; // Read the system clock select value - - switch (cksel) - { - case CKSEL_LOCO: - sysClockSrcFreq = BSP_LOCO_HZ; - break; - - case CKSEL_HOCO: - sysClockSrcFreq = hoco_frequency[SYSTEM.HOCOCR2.BIT.HCFRQ]; - break; - - case CKSEL_MAIN_OSC: - sysClockSrcFreq = BSP_CFG_XTAL_HZ; - break; - - case CKSEL_SUBCLOCK: - sysClockSrcFreq = BSP_SUB_CLOCK_HZ; - break; - - case CKSEL_PLL: - /* The RX65N have two possible sources for the PLL */ - - pll_multiplier = (uint32_t)(((SYSTEM.PLLCR.BIT.STC + 1) * NORMALIZE_X10) / 2); - - pll_source_freq = BSP_CFG_XTAL_HZ; // Default to the MAIN OSC as the PLL source - if (SYSTEM.PLLCR.BIT.PLLSRCSEL == 0x1) // If 1 then the HOCO is the PLL source - { - pll_source_freq = hoco_frequency[SYSTEM.HOCOCR2.BIT.HCFRQ]; - } - - sysClockSrcFreq = (uint32_t)((pll_source_freq / ((SYSTEM.PLLCR.BIT.PLIDIV + 1) * NORMALIZE_X10)) * pll_multiplier); - - break; - - default: - sysClockSrcFreq = BSP_CFG_XTAL_HZ; // Should never arrive here. Use the Main OSC freq as a default... - } - - /* Finally, divide the system clock source frequency by the currently set ICLK divider to get the ICLK frequency */ - return (sysClockSrcFreq / (1 << SYSTEM.SCKCR.BIT.ICK)); -} diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_info.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_info.h deleted file mode 100644 index fb6afeaa0ec..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_info.h +++ /dev/null @@ -1,197 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : mcu_info.h -* Device(s) : RX65N -* Description : Information about the MCU on this board. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -* : 31.01.2017 1.01_ES Deleted the following macro definition. -* - BSP_MCU_RX651 -* Changed the name of the following macro definition, because there was a mistake -* in the name of macro definition. -* - BSP_PACKAGE_LFQFP144 - Changed package type from LQFP to LFQFP. -* - BSP_PACKAGE_LFQFP100 - Changed package type from LQFP to LFQFP. -* Changed the value of the following macro definition. -* - BSP_CFG_MCU_PART_PACKAGE - Changed the value from 0x6 to 0xA. -* Added the following macro definition. -* - BSP_MCU_RX65N_2MB -* - BSP_PACKAGE_LFQFP176 -* - BSP_PACKAGE_LFBGA176 -* - BSP_PACKAGE_TFLGA177 -* Added the following setting. -* - Setting of 177 pins. -* - Setting of 176 pins. -* - Setting of 2-Mbyte ROM capacity. -* - Setting of 1.5-Mbyte ROM capacity. -***********************************************************************************************************************/ - -#ifndef MCU_INFO -#define MCU_INFO - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -/* Gets MCU configuration information. */ -#include "r_bsp_config.h" - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* MCU Series. */ -#if (BSP_CFG_MCU_PART_SERIES == 0x0) - #define BSP_MCU_SERIES_RX600 (1) -#else - #error "ERROR - BSP_CFG_MCU_PART_SERIES - Unknown MCU Series chosen in r_bsp_config.h" -#endif - -/* This macro means that this MCU is part of the RX65x collection of MCUs (i.e. RX651/N). */ -#define BSP_MCU_RX65_ALL (1) - -/* MCU Group name. */ -#if (BSP_CFG_MCU_PART_GROUP == 0x0) - #define BSP_MCU_RX65N (1) - #if (BSP_CFG_MCU_PART_MEMORY_SIZE == 0xC) || (BSP_CFG_MCU_PART_MEMORY_SIZE == 0xE) - #define BSP_MCU_RX65N_2MB (1) - #endif -#else - #error "ERROR - BSP_CFG_MCU_PART_GROUP - Unknown MCU Group chosen in r_bsp_config.h" -#endif - -/* Package. */ -#if (BSP_CFG_MCU_PART_PACKAGE == 0x0) - #define BSP_PACKAGE_LFQFP176 (1) - #define BSP_PACKAGE_PINS (176) -#elif (BSP_CFG_MCU_PART_PACKAGE == 0x1) - #define BSP_PACKAGE_LFBGA176 (1) - #define BSP_PACKAGE_PINS (176) -#elif (BSP_CFG_MCU_PART_PACKAGE == 0x2) - #define BSP_PACKAGE_TFLGA177 (1) - #define BSP_PACKAGE_PINS (177) -#elif (BSP_CFG_MCU_PART_PACKAGE == 0x3) - #define BSP_PACKAGE_LFQFP144 (1) - #define BSP_PACKAGE_PINS (144) -#elif (BSP_CFG_MCU_PART_PACKAGE == 0x4) - #define BSP_PACKAGE_TFLGA145 (1) - #define BSP_PACKAGE_PINS (145) -#elif (BSP_CFG_MCU_PART_PACKAGE == 0x5) - #define BSP_PACKAGE_LFQFP100 (1) - #define BSP_PACKAGE_PINS (100) -#elif (BSP_CFG_MCU_PART_PACKAGE == 0xA) - #define BSP_PACKAGE_TFLGA100 (1) - #define BSP_PACKAGE_PINS (100) -#else - #error "ERROR - BSP_CFG_MCU_PART_PACKAGE - Unknown package chosen in r_bsp_config.h" -#endif - -/* Memory size of your MCU. */ -#if (BSP_CFG_MCU_PART_MEMORY_SIZE == 0x4) - #define BSP_ROM_SIZE_BYTES (524288) - #define BSP_RAM_SIZE_BYTES (262144) - #define BSP_DATA_FLASH_SIZE_BYTES (0) -#elif (BSP_CFG_MCU_PART_MEMORY_SIZE == 0x7) - #define BSP_ROM_SIZE_BYTES (786432) - #define BSP_RAM_SIZE_BYTES (262144) - #define BSP_DATA_FLASH_SIZE_BYTES (0) -#elif (BSP_CFG_MCU_PART_MEMORY_SIZE == 0x9) - #define BSP_ROM_SIZE_BYTES (1048576) - #define BSP_RAM_SIZE_BYTES (262144) - #define BSP_DATA_FLASH_SIZE_BYTES (0) -#elif (BSP_CFG_MCU_PART_MEMORY_SIZE == 0xC) - #define BSP_ROM_SIZE_BYTES (1572864) - #define BSP_RAM_SIZE_BYTES (655360) - #define BSP_DATA_FLASH_SIZE_BYTES (32768) -#elif (BSP_CFG_MCU_PART_MEMORY_SIZE == 0xE) - #define BSP_ROM_SIZE_BYTES (2097152) - #define BSP_RAM_SIZE_BYTES (655360) - #define BSP_DATA_FLASH_SIZE_BYTES (32768) -#else - #error "ERROR - BSP_CFG_MCU_PART_MEMORY_SIZE - Unknown memory size chosen in r_bsp_config.h" -#endif - -/* These macros define clock speeds for fixed speed clocks. */ -#define BSP_LOCO_HZ (240000) //Low-speed On-Chip Oscillator -#define BSP_SUB_CLOCK_HZ (32768) //Sub-Clock Oscillator - - -/* Define frequency of HOCO. */ -#if (BSP_CFG_HOCO_FREQUENCY == 0) - #define BSP_HOCO_HZ (16000000) -#elif (BSP_CFG_HOCO_FREQUENCY == 1) - #define BSP_HOCO_HZ (18000000) -#elif (BSP_CFG_HOCO_FREQUENCY == 2) - #define BSP_HOCO_HZ (20000000) -#else - #error "ERROR - Invalid HOCO frequency chosen in r_bsp_config.h! Set valid value for BSP_CFG_HOCO_FREQUENCY." -#endif - -/* Clock source select (CKSEL). - 0 = Low Speed On-Chip Oscillator (LOCO) - 1 = High Speed On-Chip Oscillator (HOCO) - 2 = Main Clock Oscillator - 3 = Sub-Clock Oscillator - 4 = PLL Circuit -*/ -#if (BSP_CFG_CLOCK_SOURCE == 0) - #define BSP_SELECTED_CLOCK_HZ (BSP_LOCO_HZ) -#elif (BSP_CFG_CLOCK_SOURCE == 1) - #define BSP_SELECTED_CLOCK_HZ (BSP_HOCO_HZ) -#elif (BSP_CFG_CLOCK_SOURCE == 2) - #define BSP_SELECTED_CLOCK_HZ (BSP_CFG_XTAL_HZ) -#elif (BSP_CFG_CLOCK_SOURCE == 3) - #define BSP_SELECTED_CLOCK_HZ (BSP_SUB_CLOCK_HZ) -#elif (BSP_CFG_CLOCK_SOURCE == 4) - #if (BSP_CFG_PLL_SRC == 0) - #define BSP_SELECTED_CLOCK_HZ ((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) - #elif (BSP_CFG_PLL_SRC == 1) - #define BSP_SELECTED_CLOCK_HZ ((BSP_HOCO_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) - #else - #error "ERROR - Valid PLL clock source must be chosen in r_bsp_config.h using BSP_CFG_PLL_SRC macro." - #endif -#endif - -/* System clock speed in Hz. */ -#define BSP_ICLK_HZ (BSP_SELECTED_CLOCK_HZ / BSP_CFG_ICK_DIV) -/* Peripheral Module Clock A speed in Hz. Used for ETHERC and EDMAC. */ -#define BSP_PCLKA_HZ (BSP_SELECTED_CLOCK_HZ / BSP_CFG_PCKA_DIV) -/* Peripheral Module Clock B speed in Hz. */ -#define BSP_PCLKB_HZ (BSP_SELECTED_CLOCK_HZ / BSP_CFG_PCKB_DIV) -/* Peripheral Module Clock C speed in Hz. */ -#define BSP_PCLKC_HZ (BSP_SELECTED_CLOCK_HZ / BSP_CFG_PCKC_DIV) -/* Peripheral Module Clock D speed in Hz. */ -#define BSP_PCLKD_HZ (BSP_SELECTED_CLOCK_HZ / BSP_CFG_PCKD_DIV) -/* External bus clock speed in Hz. */ -#define BSP_BCLK_HZ (BSP_SELECTED_CLOCK_HZ / BSP_CFG_BCK_DIV) -/* FlashIF clock speed in Hz. */ -#define BSP_FCLK_HZ (BSP_SELECTED_CLOCK_HZ / BSP_CFG_FCK_DIV) -/* USB clock speed in Hz. */ -#define BSP_UCLK_HZ (BSP_SELECTED_CLOCK_HZ / BSP_CFG_UCK_DIV) - -/* Null argument definitions. */ -#define FIT_NO_FUNC ((void (*)(void *))0x10000000) //Reserved space on RX -#define FIT_NO_PTR ((void *)0x10000000) //Reserved space on RX - -/* Mininum and maximum IPL levels available for this MCU. */ -#define BSP_MCU_IPL_MAX (0xF) -#define BSP_MCU_IPL_MIN (0) - -#endif /* MCU_INFO */ - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_init.c b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_init.c deleted file mode 100644 index 401cbf13984..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_init.c +++ /dev/null @@ -1,154 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : mcu_init.c -* Description : Performs initialization common to all MCUs in this Group -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -* : 31.01.2017 1.01_ES Added port setting of 177 pins and 176 pins. -* Added setting of PORTG. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -/* Get specifics on this MCU. */ -#include "platform.h" - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* RX MCUs come in different packages and different pin counts. For MCUs that do not have the maximum number of pins - * for their group (e.g. MCU with 100 pins when maximum is 177 pins) these 'non-existent' pins that are not bonded out - * need to be initialized to save power. The macros below define the non-existent pins on each port for smaller - * pin count MCUs. If a pin is non-existent then its value is set to a 1. These values are then ORed into the - * direction registers to set non-existent pins as outputs which can help save power. - */ -#if ((BSP_PACKAGE_PINS == 177) || (BSP_PACKAGE_PINS == 176)) - #define BSP_PRV_PORT0_NE_PIN_MASK (0x50) /* Missing pins: P04 P06 */ - #define BSP_PRV_PORT1_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORT2_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORT3_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORT4_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORT5_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORT6_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORT7_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORT8_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORT9_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORTA_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORTB_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORTC_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORTD_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORTE_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORTF_NE_PIN_MASK (0xC0) /* Missing pins: PF6 PF7 */ - #define BSP_PRV_PORTG_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORTJ_NE_PIN_MASK (0xD0) /* Missing pins: PJ4 PJ6 PJ7 */ -#elif ((BSP_PACKAGE_PINS == 145) || (BSP_PACKAGE_PINS == 144)) - #define BSP_PRV_PORT0_NE_PIN_MASK (0x50) /* Missing pins: P04 P06 */ - #define BSP_PRV_PORT1_NE_PIN_MASK (0x03) /* Missing pins: P10 P11 */ - #define BSP_PRV_PORT2_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORT3_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORT4_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORT5_NE_PIN_MASK (0x80) /* Missing pins: P57 */ - #define BSP_PRV_PORT6_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORT7_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORT8_NE_PIN_MASK (0x30) /* Missing pins: P84 P85 */ - #define BSP_PRV_PORT9_NE_PIN_MASK (0xF0) /* Missing pins: P94 P95 P96 P97 */ - #define BSP_PRV_PORTA_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORTB_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORTC_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORTD_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORTE_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORTF_NE_PIN_MASK (0xDF) /* Missing pins: PF0 PF1 PF2 PF3 PF4 PF6 PF7 */ -#if defined(BSP_MCU_RX65N_2MB) - #define BSP_PRV_PORTG_NE_PIN_MASK (0xFF) /* Missing pins: PG0 PG1 PG2 PG3 PG4 PG5 PG6 PG7 */ -#endif - #define BSP_PRV_PORTJ_NE_PIN_MASK (0xD7) /* Missing pins: PJ0 PJ1 PJ2 PJ4 PJ6 PJ7 */ -#elif (BSP_PACKAGE_PINS == 100) - #define BSP_PRV_PORT0_NE_PIN_MASK (0x5F) /* Missing pins: P00 P01 P02 P03 P04 P06 */ - #define BSP_PRV_PORT1_NE_PIN_MASK (0x03) /* Missing pins: P10 P11 */ - #define BSP_PRV_PORT2_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORT3_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORT4_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORT5_NE_PIN_MASK (0xC0) /* Missing pins: P56 P57 */ - #define BSP_PRV_PORT6_NE_PIN_MASK (0xFF) /* Missing pins: P60 P61 P62 P63 P64 P65 P66 P67 */ - #define BSP_PRV_PORT7_NE_PIN_MASK (0xFF) /* Missing pins: P70 P71 P72 P73 P74 P75 P76 P77 */ - #define BSP_PRV_PORT8_NE_PIN_MASK (0xFF) /* Missing pins: P80 P81 P82 P83 P84 P85 P86 P87 */ - #define BSP_PRV_PORT9_NE_PIN_MASK (0xFF) /* Missing pins: P90 P91 P92 P93 P94 P95 P96 P97 */ - #define BSP_PRV_PORTA_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORTB_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORTC_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORTD_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORTE_NE_PIN_MASK (0x00) /* Missing pins: None */ - #define BSP_PRV_PORTF_NE_PIN_MASK (0xFF) /* Missing pins: PF0 PF1 PF2 PF3 PF4 PF5 PF6 PF7 */ -#if defined(BSP_MCU_RX65N_2MB) - #define BSP_PRV_PORTG_NE_PIN_MASK (0xFF) /* Missing pins: PG0 PG1 PG2 PG3 PG4 PG5 PG6 PG7 */ -#endif - #define BSP_PRV_PORTJ_NE_PIN_MASK (0xF7) /* Missing pins: PJ0 PJ1 PJ2 PJ4 PJ5 PJ6 PJ7 */ -#else - #error "ERROR - This package is not defined in mcu_init.c" -#endif - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global variables (to be accessed by other files) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Private global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: bsp_non_existent_port_init -* Description : For MCUs that do not have the maximum number of pins for their group (e.g. MCU with 100 pins when -* maximum is 177 pins) these 'non-existent' pins that are not bonded out need to be initialized to save -* power. -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void bsp_non_existent_port_init (void) -{ - /* OR in missing pin masks from above. */ - PORT0.PDR.BYTE |= BSP_PRV_PORT0_NE_PIN_MASK; - PORT1.PDR.BYTE |= BSP_PRV_PORT1_NE_PIN_MASK; - PORT2.PDR.BYTE |= BSP_PRV_PORT2_NE_PIN_MASK; - PORT3.PDR.BYTE |= BSP_PRV_PORT3_NE_PIN_MASK; - PORT4.PDR.BYTE |= BSP_PRV_PORT4_NE_PIN_MASK; - PORT5.PDR.BYTE |= BSP_PRV_PORT5_NE_PIN_MASK; - PORT6.PDR.BYTE |= BSP_PRV_PORT6_NE_PIN_MASK; - PORT7.PDR.BYTE |= BSP_PRV_PORT7_NE_PIN_MASK; - PORT8.PDR.BYTE |= BSP_PRV_PORT8_NE_PIN_MASK; - PORT9.PDR.BYTE |= BSP_PRV_PORT9_NE_PIN_MASK; - PORTA.PDR.BYTE |= BSP_PRV_PORTA_NE_PIN_MASK; - PORTB.PDR.BYTE |= BSP_PRV_PORTB_NE_PIN_MASK; - PORTC.PDR.BYTE |= BSP_PRV_PORTC_NE_PIN_MASK; - PORTD.PDR.BYTE |= BSP_PRV_PORTD_NE_PIN_MASK; - PORTE.PDR.BYTE |= BSP_PRV_PORTE_NE_PIN_MASK; - PORTF.PDR.BYTE |= BSP_PRV_PORTF_NE_PIN_MASK; -#if defined(BSP_MCU_RX65N_2MB) - PORTG.PDR.BYTE |= BSP_PRV_PORTG_NE_PIN_MASK; -#endif - PORTJ.PDR.BYTE |= BSP_PRV_PORTJ_NE_PIN_MASK; -} - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_init.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_init.h deleted file mode 100644 index ef4e6575dfc..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_init.h +++ /dev/null @@ -1,44 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : mcu_init.h -* Description : Performs initialization common to all MCUs in this Group -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global variables -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global functions (to be accessed by other files) -***********************************************************************************************************************/ -void bsp_non_existent_port_init(void); - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_interrupts.c b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_interrupts.c deleted file mode 100644 index 26852de67df..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_interrupts.c +++ /dev/null @@ -1,913 +0,0 @@ -/* Adapted to IAR Embedded Workbench */ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : mcu_interrupts.c -* Description : This module allows for callbacks to be registered for certain interrupts. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -* : 31.01.2017 1.01_ES Added callback processing of the following group interrupt sources. -* - RIIC1_EEI1 -* - RIIC1_TEI1 -* - GLCDC_VPOS -* - GLCDC_GR1UF -* - GLCDC_GR2UF -* - DRW2D_DRW_IRQ -* Changed calling condition of callback function in group interrupts. -* Changed calling order of callback function in group interrupts. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -/* Used for accessing CPU registers. */ -#include -/* Access to r_bsp. */ -#include "platform.h" - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* This macro is used to suppress compiler messages about a parameter not being used in a function. The nice thing - * about using this implementation is that it does not take any extra RAM or ROM. - */ -#define INTERNAL_NOT_USED(p) ((void)(p)) -/* Let FPSW EV, EO, EZ, EU, EX=1 (FPU exceptions enabled.) */ -#define FPU_EXCEPTIONS_ENABLE (0x00007C00) - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global variables (to be accessed by other files) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Private global variables and functions -***********************************************************************************************************************/ -/* This array holds callback functions. */ -static void (* g_bsp_vectors[BSP_INT_SRC_TOTAL_ITEMS])(void * pdata); - -bsp_int_err_t bsp_interrupt_enable_disable(bsp_int_src_t vector, bool enable); -bsp_int_err_t bsp_interrupt_group_enable_disable(bsp_int_src_t vector, bool enable, uint32_t ipl); - -/*********************************************************************************************************************** -* Function Name: bsp_interrupt_open -* Description : Initialize callback function array. -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ -void bsp_interrupt_open (void) -{ - uint32_t i; - - for (i = 0; i < BSP_INT_SRC_TOTAL_ITEMS; i++) - { - g_bsp_vectors[i] = FIT_NO_FUNC; - } - - /* Initialize mapped interrupts. */ - bsp_mapped_interrupt_open(); -} - -/*********************************************************************************************************************** -* Function Name: R_BSP_InterruptWrite -* Description : Registers a callback function for supported interrupts. If FIT_NO_FUNC, NULL, or -* any other invalid function address is passed for the callback argument then any previously registered -* callbacks are unregistered. Use of FIT_NO_FUNC is preferred over NULL since access to the address -* defined by FIT_NO_FUNC will cause a bus error which is easy for the user to catch. NULL typically -* resolves to 0 which is a valid address on RX MCUs. -* Arguments : vector - -* Which interrupt to register a callback for. -* callback - -* Pointer to function to call when interrupt occurs. -* Return Value : BSP_INT_SUCCESS - -* Callback registered -* BSP_INT_ERR_INVALID_ARG - -* Invalid function address input, any previous function has been unregistered -***********************************************************************************************************************/ -bsp_int_err_t R_BSP_InterruptWrite (bsp_int_src_t vector, bsp_int_cb_t callback) -{ - bsp_int_err_t err; - - err = BSP_INT_SUCCESS; - - /* Check for valid address. */ - if (((uint32_t)callback == (uint32_t)NULL) || ((uint32_t)callback == (uint32_t)FIT_NO_FUNC)) - { - g_bsp_vectors[vector] = FIT_NO_FUNC; - } - else - { - g_bsp_vectors[vector] = callback; - } - - return err; -} - -/*********************************************************************************************************************** -* Function Name: R_BSP_InterruptRead -* Description : Returns the callback function address for an interrupt. -* Arguments : vector - -* Which interrupt to read the callback for. -* callback - -* Pointer of where to store callback address. -* Return Value : BSP_INT_SUCCESS - -* Callback was registered and address has been stored in 'callback' parameter. -* BSP_INT_ERR_NO_REGISTERED_CALLBACK - -* No valid callback has been registered for this interrupt source. -***********************************************************************************************************************/ -bsp_int_err_t R_BSP_InterruptRead (bsp_int_src_t vector, bsp_int_cb_t * callback) -{ - bsp_int_err_t err; - - err = BSP_INT_SUCCESS; - - /* Check for valid address. */ - if (((uint32_t)g_bsp_vectors[vector] == (uint32_t)NULL) || ((uint32_t)g_bsp_vectors[vector] == (uint32_t)FIT_NO_FUNC)) - { - err = BSP_INT_ERR_NO_REGISTERED_CALLBACK; - } - else - { - *callback = g_bsp_vectors[vector]; - } - - return err; -} - -/*********************************************************************************************************************** -* Function Name: R_BSP_InterruptControl -* Description : Executes specified command. -* Arguments : vector - -* Which vector is being used. -* cmd - -* Which command to execute. -* pdata - -* Pointer to data to use with command. -* Currently only used for BSP_INT_CMD_GROUP_INTERRUPT_ENABLE, and points -* to a bsp_int_ctrl_t *. Other commands should supply FIT_NO_PTR. -* Return Value : BSP_INT_SUCCESS - -* Command executed successfully. -* BSP_INT_ERR_NO_REGISTERED_CALLBACK - -* No valid callback has been registered for this interrupt source. -* BSP_INT_ERR_INVALID_ARG - -* Invalid command sent in. -* BSP_INT_ERR_GROUP_STILL_ENABLED - -* Not all group interrupts were disabled so group interrupt was not disabled. -***********************************************************************************************************************/ -bsp_int_err_t R_BSP_InterruptControl (bsp_int_src_t vector, bsp_int_cmd_t cmd, void * pdata) -{ - bsp_int_err_t err; - bsp_int_cb_args_t cb_args; - - err = BSP_INT_SUCCESS; - - switch (cmd) - { - case (BSP_INT_CMD_CALL_CALLBACK): - if (((uint32_t)g_bsp_vectors[vector] != (uint32_t)NULL) && - ((uint32_t)g_bsp_vectors[vector] != (uint32_t)FIT_NO_FUNC)) - { - /* Fill in callback info. */ - cb_args.vector = vector; - - g_bsp_vectors[vector](&cb_args); - } - else - { - err = BSP_INT_ERR_NO_REGISTERED_CALLBACK; - } - break; - - case (BSP_INT_CMD_INTERRUPT_ENABLE): - err = bsp_interrupt_enable_disable(vector, true); - break; - - case (BSP_INT_CMD_INTERRUPT_DISABLE): - err = bsp_interrupt_enable_disable(vector, false); - break; - - case (BSP_INT_CMD_GROUP_INTERRUPT_ENABLE): - err = bsp_interrupt_group_enable_disable(vector, true, ((bsp_int_ctrl_t *)pdata)->ipl); - break; - - case (BSP_INT_CMD_GROUP_INTERRUPT_DISABLE): - err = bsp_interrupt_group_enable_disable(vector, false, 0); - break; - - default: - err = BSP_INT_ERR_INVALID_ARG; - break; - } - - return err; -} - -/*********************************************************************************************************************** -* Function Name: bsp_interrupt_enable_disable -* Description : Either enables or disables an interrupt. -* Arguments : vector - -* Which vector to enable or disable. -* enable - -* Whether to enable or disable the interrupt. -* Return Value : BSP_INT_SUCCESS - -* Interrupt enabled or disabled. -* BSP_INT_ERR_UNSUPPORTED - -* API does not support enabling/disabling for this vector. -***********************************************************************************************************************/ -bsp_int_err_t bsp_interrupt_enable_disable (bsp_int_src_t vector, bool enable) -{ - uint32_t temp_fpsw; - bsp_int_err_t err = BSP_INT_SUCCESS; - - switch (vector) - { - case (BSP_INT_SRC_BUS_ERROR): - - if (true == enable) - { - /* Enable the bus error interrupt to catch accesses to illegal/reserved areas of memory */ - /* Clear any pending interrupts */ - IR(BSC,BUSERR) = 0; - /* Make this the highest priority interrupt (adjust as necessary for your application */ - IPR(BSC,BUSERR) = 0x0F; - /* Enable the interrupt in the ICU*/ - IEN(BSC,BUSERR) = 1; - /* Enable illegal address interrupt in the BSC */ - BSC.BEREN.BIT.IGAEN = 1; - /* Enable timeout detection enable. */ - BSC.BEREN.BIT.TOEN = 1; - } - else - { - /* Disable the bus error interrupt. */ - /* Disable the interrupt in the ICU*/ - IEN(BSC,BUSERR) = 0; - /* Disable illegal address interrupt in the BSC */ - BSC.BEREN.BIT.IGAEN = 0; - /* Disable timeout detection enable. */ - BSC.BEREN.BIT.TOEN = 0; - } - - break; - - case (BSP_INT_SRC_EXC_FPU): - - /* Get current FPSW. */ - temp_fpsw = (uint32_t)get_fpsw(); - - if (true == enable) - { - /* Set the FPU exception flags. */ - set_fpsw(temp_fpsw | ((uint32_t)FPU_EXCEPTIONS_ENABLE)); - } - else - { - /* Clear only the FPU exception flags. */ - set_fpsw(temp_fpsw & ((uint32_t)~FPU_EXCEPTIONS_ENABLE)); - } - - break; - - case (BSP_INT_SRC_EXC_NMI_PIN): - - if (true == enable) - { - /* Enable NMI pin interrupt (cannot undo!) */ - ICU.NMIER.BIT.NMIEN = 1; - } - else - { - /* NMI pin interrupts cannot be disabled after being enabled. */ - err = BSP_INT_ERR_UNSUPPORTED; - } - - break; - - default: - err = BSP_INT_ERR_UNSUPPORTED; - break; - } - - return err; -} - -/*********************************************************************************************************************** -* Function Name: bsp_interrupt_group_enable_disable -* Description : Either enables or disables a group interrupt. If a group interrupt is called multiple times to be -* enabled then it will use the highest given IPL. A group interrupt will only be disabled when all -* interrupt sources for that group are already disabled. -* Arguments : vector - -* An interrupt source inside the group that is to be enabled/disabled. -* enable - -* Whether to enable or disable the interrupt. -* ipl - -* If enabling a group interrupt, what IPL to use. -* Return Value : BSP_INT_SUCCESS - -* Interrupt enabled or disabled. -* BSP_INT_ERR_INVALID_ARG - -* Invalid IPL or vector -* BSP_INT_ERR_GROUP_STILL_ENABLED - -* Not all group interrupts were disabled so group interrupt was not disabled. -***********************************************************************************************************************/ -bsp_int_err_t bsp_interrupt_group_enable_disable (bsp_int_src_t vector, bool enable, uint32_t ipl) -{ - bsp_int_err_t err = BSP_INT_SUCCESS; - -#if BSP_CFG_PARAM_CHECKING_ENABLE == 1 - /* If interrupt is going to be enabled, verify that IPL is valid. */ - if ((true == enable) && ((ipl == BSP_MCU_IPL_MIN) || (ipl > BSP_MCU_IPL_MAX))) - { - return BSP_INT_ERR_INVALID_ARG; - } -#endif - - if ((vector >= BSP_INT_SRC_BL0_SCI0_TEI0) && (vector <= BSP_INT_SRC_BL0_PDC_PCERI)) - { - /* Group BL0. */ - if (true == enable) - { - IEN(ICU, GROUPBL0) = 0; - IR(ICU, GROUPBL0) = 0; - IPR(ICU, GROUPBL0) = (uint8_t)(ipl > IPR(ICU, GROUPBL0) ? ipl : IPR(ICU, GROUPBL0)); - IEN(ICU, GROUPBL0) = 1; - } - else - { - /* Check to make sure all interrupt sources are already disabled for this group. */ - if (0 == ICU.GENBL0.LONG) - { - IEN(ICU, GROUPBL0) = 0; - IPR(ICU, GROUPBL0) = 0; - } - else - { - err = BSP_INT_ERR_GROUP_STILL_ENABLED; - } - } - } -#if defined(BSP_MCU_RX65N_2MB) /* In the case of 1.5 or 2Mbyte ROM capacity. */ - else if ((vector >= BSP_INT_SRC_BL1_SDHI_CDETI) && (vector <= BSP_INT_SRC_BL1_RIIC1_EEI1)) -#else /* In the case of 512K, 768K or 1Mbyte ROM capacity. */ - else if ((vector >= BSP_INT_SRC_BL1_SDHI_CDETI) && (vector <= BSP_INT_SRC_BL1_SCI9_ERI9)) -#endif - { - /* Group BL1. */ - if (true == enable) - { - IEN(ICU, GROUPBL1) = 0; - IR(ICU, GROUPBL1) = 0; - IPR(ICU, GROUPBL1) = (uint8_t)(ipl > IPR(ICU, GROUPBL1) ? ipl : IPR(ICU, GROUPBL1)); - IEN(ICU, GROUPBL1) = 1; - } - else - { - /* Check to make sure all interrupt sources are already disabled for this group. */ - if (0 == ICU.GENBL1.LONG) - { - IEN(ICU, GROUPBL1) = 0; - IPR(ICU, GROUPBL1) = 0; - } - else - { - err = BSP_INT_ERR_GROUP_STILL_ENABLED; - } - } - } - else if (vector == BSP_INT_SRC_BL2_SDSI_SDIOI) - { - /* Group BL2. */ - if (true == enable) - { - IEN(ICU, GROUPBL2) = 0; - IR(ICU, GROUPBL2) = 0; - IPR(ICU, GROUPBL2) = (uint8_t)(ipl > IPR(ICU, GROUPBL2) ? ipl : IPR(ICU, GROUPBL2)); - IEN(ICU, GROUPBL2) = 1; - } - else - { - /* Check to make sure all interrupt sources are already disabled for this group. */ - if (0 == ICU.GENBL2.LONG) - { - IEN(ICU, GROUPBL2) = 0; - IPR(ICU, GROUPBL2) = 0; - } - else - { - err = BSP_INT_ERR_GROUP_STILL_ENABLED; - } - } - } - else if ((vector >= BSP_INT_SRC_AL0_SCI10_TEI10) && (vector <= BSP_INT_SRC_AL0_RSPI2_SPEI2)) - { - /* Group AL0. */ - if (true == enable) - { - IEN(ICU, GROUPAL0) = 0; - IR(ICU, GROUPAL0) = 0; - IPR(ICU, GROUPAL0) = (uint8_t)(ipl > IPR(ICU, GROUPAL0) ? ipl : IPR(ICU, GROUPAL0)); - IEN(ICU, GROUPAL0) = 1; - } - else - { - /* Check to make sure all interrupt sources are already disabled for this group. */ - if (0 == ICU.GENAL0.LONG) - { - IEN(ICU, GROUPAL0) = 0; - IPR(ICU, GROUPAL0) = 0; - } - else - { - err = BSP_INT_ERR_GROUP_STILL_ENABLED; - } - } - } -#if defined(BSP_MCU_RX65N_2MB) /* In the case of 1.5 or 2Mbyte ROM capacity. */ - else if ((vector >= BSP_INT_SRC_AL1_EDMAC0_EINT0) && (vector <= BSP_INT_SRC_AL1_DRW2D_DRW_IRQ)) -#else /* In the case of 512K, 768K or 1Mbyte ROM capacity. */ - else if (vector == BSP_INT_SRC_AL1_EDMAC0_EINT0) -#endif - { - /* Group AL1. */ - if (true == enable) - { - IEN(ICU, GROUPAL1) = 0; - IR(ICU, GROUPAL1) = 0; - IPR(ICU, GROUPAL1) = (uint8_t)(ipl > IPR(ICU, GROUPAL1) ? ipl : IPR(ICU, GROUPAL1)); - IEN(ICU, GROUPAL1) = 1; - } - else - { - /* Check to make sure all interrupt sources are already disabled for this group. */ - if (0 == ICU.GENAL1.LONG) - { - IEN(ICU, GROUPAL1) = 0; - IPR(ICU, GROUPAL1) = 0; - } - else - { - err = BSP_INT_ERR_GROUP_STILL_ENABLED; - } - } - } - else - { - /* Vector given was not part of a group. */ - err = BSP_INT_ERR_INVALID_ARG; - } - - return err; -} - - -/*********************************************************************************************************************** -* Function Name: group_bl0_handler_isr -* Description : Interrupt handler for Group BL0 interrupts. The way this code works is that for each possible interrupt -* in this group the following will be performed: -* 1) Test to see if an interrupt is requested for this source -* 2) If an interrupt is requested then the registered callback is called (if one is registered) -* NOTE: The interrupt request flag must be cleared in the peripheral. -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ -#pragma vector=VECT(ICU,GROUPBL0) -__interrupt void group_bl0_handler_isr (void) - -{ - if ((1 == ICU.GRPBL0.BIT.IS1) && (1 == ICU.GENBL0.BIT.EN1)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_SCI0_ERI0, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS0) && (1 == ICU.GENBL0.BIT.EN0)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_SCI0_TEI0, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS3) && (1 == ICU.GENBL0.BIT.EN3)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_SCI1_ERI1, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS2) && (1 == ICU.GENBL0.BIT.EN2)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_SCI1_TEI1, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS5) && (1 == ICU.GENBL0.BIT.EN5)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_SCI2_ERI2, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS4) && (1 == ICU.GENBL0.BIT.EN4)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_SCI2_TEI2, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS7) && (1 == ICU.GENBL0.BIT.EN7)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_SCI3_ERI3, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS6) && (1 == ICU.GENBL0.BIT.EN6)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_SCI3_TEI3, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS9) && (1 == ICU.GENBL0.BIT.EN9)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_SCI4_ERI4, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS8) && (1 == ICU.GENBL0.BIT.EN8)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_SCI4_TEI4, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS11) && (1 == ICU.GENBL0.BIT.EN11)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_SCI5_ERI5, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS10) && (1 == ICU.GENBL0.BIT.EN10)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_SCI5_TEI5, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS13) && (1 == ICU.GENBL0.BIT.EN13)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_SCI6_ERI6, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS12) && (1 == ICU.GENBL0.BIT.EN12)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_SCI6_TEI6, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS15) && (1 == ICU.GENBL0.BIT.EN15)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_SCI7_ERI7, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS14) && (1 == ICU.GENBL0.BIT.EN14)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_SCI7_TEI7, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS17) && (1 == ICU.GENBL0.BIT.EN17)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_SCI12_ERI12, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS16) && (1 == ICU.GENBL0.BIT.EN16)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_SCI12_TEI12, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS18) && (1 == ICU.GENBL0.BIT.EN18)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_SCI12_SCIX0, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS19) && (1 == ICU.GENBL0.BIT.EN19)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_SCI12_SCIX1, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS20) && (1 == ICU.GENBL0.BIT.EN20)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_SCI12_SCIX2, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS21) && (1 == ICU.GENBL0.BIT.EN21)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_SCI12_SCIX3, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS24) && (1 == ICU.GENBL0.BIT.EN24)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_QSPI_QSPSSLI, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS26) && (1 == ICU.GENBL0.BIT.EN26)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_CAC_FERRI, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS27) && (1 == ICU.GENBL0.BIT.EN27)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_CAC_MENDI, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS28) && (1 == ICU.GENBL0.BIT.EN28)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_CAC_OVFI, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS29) && (1 == ICU.GENBL0.BIT.EN29)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_DOC_DOPCI, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS31) && (1 == ICU.GENBL0.BIT.EN31)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_PDC_PCERI, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL0.BIT.IS30) && (1 == ICU.GENBL0.BIT.EN30)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL0_PDC_PCFEI, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } -} - -/*********************************************************************************************************************** -* Function Name: group_bl1_handler_isr -* Description : Interrupt handler for Group BL1 interrupts. The way this code works is that for each possible interrupt -* in this group the following will be performed: -* 1) Test to see if an interrupt is requested for this source -* 2) If an interrupt is requested then the registered callback is called (if one is registered) -* NOTE: The interrupt request flag must be cleared in the peripheral. -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ -#pragma vector=VECT(ICU,GROUPBL1) -__interrupt void group_bl1_handler_isr (void) - -{ - if ((1 == ICU.GRPBL1.BIT.IS3) && (1 == ICU.GENBL1.BIT.EN3)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_SDHI_CDETI, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL1.BIT.IS4) && (1 == ICU.GENBL1.BIT.EN4)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_SDHI_CACI, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL1.BIT.IS5) && (1 == ICU.GENBL1.BIT.EN5)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_SDHI_SDACI, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL1.BIT.IS6) && (1 == ICU.GENBL1.BIT.EN6)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_MMCIF_CDETIO, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL1.BIT.IS7) && (1 == ICU.GENBL1.BIT.EN7)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_MMCIF_ERRIO, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL1.BIT.IS8) && (1 == ICU.GENBL1.BIT.EN8)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_MMCIF_ACCIO, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL1.BIT.IS9) && (1 == ICU.GENBL1.BIT.EN9)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_POE3_OEI1, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL1.BIT.IS10) && (1 == ICU.GENBL1.BIT.EN10)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_POE3_OEI2, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL1.BIT.IS11) && (1 == ICU.GENBL1.BIT.EN11)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_POE3_OEI3, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL1.BIT.IS12) && (1 == ICU.GENBL1.BIT.EN12)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_POE3_OEI4, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL1.BIT.IS14) && (1 == ICU.GENBL1.BIT.EN14)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_RIIC0_EEI0, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL1.BIT.IS13) && (1 == ICU.GENBL1.BIT.EN13)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_RIIC0_TEI0, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL1.BIT.IS16) && (1 == ICU.GENBL1.BIT.EN16)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_RIIC2_EEI2, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL1.BIT.IS15) && (1 == ICU.GENBL1.BIT.EN15)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_RIIC2_TEI2, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL1.BIT.IS20) && (1 == ICU.GENBL1.BIT.EN20)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_S12AD0_S12CMPAI, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL1.BIT.IS21) && (1 == ICU.GENBL1.BIT.EN21)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_S12AD0_S12CMPBI, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL1.BIT.IS22) && (1 == ICU.GENBL1.BIT.EN22)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_S12AD1_S12CMPAI1, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL1.BIT.IS23) && (1 == ICU.GENBL1.BIT.EN23)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_S12AD1_S12CMPBI1, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL1.BIT.IS25) && (1 == ICU.GENBL1.BIT.EN25)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_SCI8_ERI8, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL1.BIT.IS24) && (1 == ICU.GENBL1.BIT.EN24)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_SCI8_TEI8, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL1.BIT.IS27) && (1 == ICU.GENBL1.BIT.EN27)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_SCI9_ERI9, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL1.BIT.IS26) && (1 == ICU.GENBL1.BIT.EN26)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_SCI9_TEI9, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - -#if defined(BSP_MCU_RX65N_2MB) /* In the case of 1.5 or 2Mbyte ROM capacity. */ - - if ((1 == ICU.GRPBL1.BIT.IS29) && (1 == ICU.GENBL1.BIT.EN29)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_RIIC1_EEI1, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPBL1.BIT.IS28) && (1 == ICU.GENBL1.BIT.EN28)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL1_RIIC1_TEI1, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - -#endif - -} - -/*********************************************************************************************************************** -* Function Name: group_bl2_handler_isr -* Description : Interrupt handler for Group BL1 interrupts. The way this code works is that for each possible interrupt -* in this group the following will be performed: -* 1) Test to see if an interrupt is requested for this source -* 2) If an interrupt is requested then the registered callback is called (if one is registered) -* NOTE: The interrupt request flag must be cleared in the peripheral. -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ -#pragma vector=VECT(ICU,GROUPBL2) -__interrupt void group_bl2_handler_isr (void) - -{ - if ((1 == ICU.GRPBL2.BIT.IS0) && (1 == ICU.GENBL2.BIT.EN0)) - { - R_BSP_InterruptControl(BSP_INT_SRC_BL2_SDSI_SDIOI, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - -} - -/*********************************************************************************************************************** -* Function Name: group_al0_handler_isr -* Description : Interrupt handler for Group AL0 interrupts. The way this code works is that for each possible interrupt -* in this group the following will be performed: -* 1) Test to see if an interrupt is requested for this source -* 2) If an interrupt is requested then the registered callback is called (if one is registered) -* NOTE: The interrupt request flag must be cleared in the peripheral. -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ -#pragma vector=VECT(ICU,GROUPAL0) -__interrupt void group_al0_handler_isr (void) - -{ - if ((1 == ICU.GRPAL0.BIT.IS9) && (1 == ICU.GENAL0.BIT.EN9)) - { - R_BSP_InterruptControl(BSP_INT_SRC_AL0_SCI10_ERI10, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPAL0.BIT.IS8) && (1 == ICU.GENAL0.BIT.EN8)) - { - R_BSP_InterruptControl(BSP_INT_SRC_AL0_SCI10_TEI10, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPAL0.BIT.IS13) && (1 == ICU.GENAL0.BIT.EN13)) - { - R_BSP_InterruptControl(BSP_INT_SRC_AL0_SCI11_ERI11, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPAL0.BIT.IS12) && (1 == ICU.GENAL0.BIT.EN12)) - { - R_BSP_InterruptControl(BSP_INT_SRC_AL0_SCI11_TEI11, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPAL0.BIT.IS17) && (1 == ICU.GENAL0.BIT.EN17)) - { - R_BSP_InterruptControl(BSP_INT_SRC_AL0_RSPI0_SPEI0, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPAL0.BIT.IS16) && (1 == ICU.GENAL0.BIT.EN16)) - { - R_BSP_InterruptControl(BSP_INT_SRC_AL0_RSPI0_SPII0, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPAL0.BIT.IS19) && (1 == ICU.GENAL0.BIT.EN19)) - { - R_BSP_InterruptControl(BSP_INT_SRC_AL0_RSPI1_SPEI1, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPAL0.BIT.IS18) && (1 == ICU.GENAL0.BIT.EN18)) - { - R_BSP_InterruptControl(BSP_INT_SRC_AL0_RSPI1_SPII1, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPAL0.BIT.IS21) && (1 == ICU.GENAL0.BIT.EN21)) - { - R_BSP_InterruptControl(BSP_INT_SRC_AL0_RSPI2_SPEI2, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPAL0.BIT.IS20) && (1 == ICU.GENAL0.BIT.EN20)) - { - R_BSP_InterruptControl(BSP_INT_SRC_AL0_RSPI2_SPII2, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } -} - -/*********************************************************************************************************************** -* Function Name: group_al1_handler_isr -* Description : Interrupt handler for Group AL1 interrupts. The way this code works is that for each possible interrupt -* in this group the following will be performed: -* 1) Test to see if an interrupt is requested for this source -* 2) If an interrupt is requested then the registered callback is called (if one is registered) -* NOTE: The interrupt request flag must be cleared in the peripheral. -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ -#pragma vector=VECT(ICU,GROUPAL1) -__interrupt void group_al1_handler_isr (void) - -{ - if ((1 == ICU.GRPAL1.BIT.IS4) && (1 == ICU.GENAL1.BIT.EN4)) - { - R_BSP_InterruptControl(BSP_INT_SRC_AL1_EDMAC0_EINT0, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - -#if defined(BSP_MCU_RX65N_2MB) /* In the case of 1.5 or 2Mbyte ROM capacity. */ - - if ((1 == ICU.GRPAL1.BIT.IS9) && (1 == ICU.GENAL1.BIT.EN9)) - { - R_BSP_InterruptControl(BSP_INT_SRC_AL1_GLCDC_GR1UF, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPAL1.BIT.IS10) && (1 == ICU.GENAL1.BIT.EN10)) - { - R_BSP_InterruptControl(BSP_INT_SRC_AL1_GLCDC_GR2UF, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPAL1.BIT.IS8) && (1 == ICU.GENAL1.BIT.EN8)) - { - R_BSP_InterruptControl(BSP_INT_SRC_AL1_GLCDC_VPOS, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - - if ((1 == ICU.GRPAL1.BIT.IS11) && (1 == ICU.GENAL1.BIT.EN11)) - { - R_BSP_InterruptControl(BSP_INT_SRC_AL1_DRW2D_DRW_IRQ, BSP_INT_CMD_CALL_CALLBACK, FIT_NO_PTR); - } - -#endif - -} - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_interrupts.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_interrupts.h deleted file mode 100644 index 74b45c8670a..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_interrupts.h +++ /dev/null @@ -1,206 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : mcu_interrupts.h -* Description : This module allows for callbacks to be registered for certain interrupts. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -* : 31.01.2017 1.01_ES Added the following enumeration constant. -* - BSP_INT_SRC_EXRAM -* - BSP_INT_SRC_BL1_RIIC1_TEI1 -* - BSP_INT_SRC_BL1_RIIC1_EEI1 -* - BSP_INT_SRC_AL1_GLCDC_VPOS -* - BSP_INT_SRC_AL1_GLCDC_GR1UF -* - BSP_INT_SRC_AL1_GLCDC_GR2UF -* - BSP_INT_SRC_AL1_DRW2D_DRW_IRQ -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -/* Available return codes. */ -typedef enum -{ - BSP_INT_SUCCESS = 0, - BSP_INT_ERR_NO_REGISTERED_CALLBACK, //There is not a registered callback for this interrupt source - BSP_INT_ERR_INVALID_ARG, //Illegal argument input - BSP_INT_ERR_UNSUPPORTED, //Operation is not supported by this API - BSP_INT_ERR_GROUP_STILL_ENABLED //Not all group interrupts were disabled so group interrupt was not disabled -} bsp_int_err_t; - -/* Available interrupts to register a callback for. */ -typedef enum -{ - BSP_INT_SRC_EXC_SUPERVISOR_INSTR = 0, //Occurs when privileged instruction is executed in User Mode - BSP_INT_SRC_EXC_UNDEFINED_INSTR, //Occurs when MCU encounters an unknown instruction - BSP_INT_SRC_EXC_NMI_PIN, //NMI Pin interrupt - BSP_INT_SRC_EXC_FPU, //FPU exception - BSP_INT_SRC_EXC_ACCESS, //Access exception - BSP_INT_SRC_OSC_STOP_DETECT, //Oscillation stop is detected - BSP_INT_SRC_WDT_ERROR, //WDT underflow/refresh error has occurred - BSP_INT_SRC_IWDT_ERROR, //IWDT underflow/refresh error has occurred - BSP_INT_SRC_LVD1, //Voltage monitoring 1 interrupt - BSP_INT_SRC_LVD2, //Voltage monitoring 2 interrupt - BSP_INT_SRC_UNDEFINED_INTERRUPT, //Interrupt has triggered for a vector that user did not write a handler for - BSP_INT_SRC_BUS_ERROR, //Bus error: illegal address access or timeout - BSP_INT_SRC_RAM, //RAM error interrupt -#if defined(BSP_MCU_RX65N_2MB) /* In the case of 1.5 or 2Mbyte ROM capacity. */ - BSP_INT_SRC_EXRAM, //EXRAM error interrupt -#endif - - /* BE0 Group Interrupts are all CAN and therefore will be taken care of by the CAN module. */ - - /* BL0 Group Interrupts. */ - BSP_INT_SRC_BL0_SCI0_TEI0, - BSP_INT_SRC_BL0_SCI0_ERI0, - BSP_INT_SRC_BL0_SCI1_TEI1, - BSP_INT_SRC_BL0_SCI1_ERI1, - BSP_INT_SRC_BL0_SCI2_TEI2, - BSP_INT_SRC_BL0_SCI2_ERI2, - BSP_INT_SRC_BL0_SCI3_TEI3, - BSP_INT_SRC_BL0_SCI3_ERI3, - BSP_INT_SRC_BL0_SCI4_TEI4, - BSP_INT_SRC_BL0_SCI4_ERI4, - BSP_INT_SRC_BL0_SCI5_TEI5, - BSP_INT_SRC_BL0_SCI5_ERI5, - BSP_INT_SRC_BL0_SCI6_TEI6, - BSP_INT_SRC_BL0_SCI6_ERI6, - BSP_INT_SRC_BL0_SCI7_TEI7, - BSP_INT_SRC_BL0_SCI7_ERI7, - BSP_INT_SRC_BL0_SCI12_TEI12, - BSP_INT_SRC_BL0_SCI12_ERI12, - BSP_INT_SRC_BL0_SCI12_SCIX0, - BSP_INT_SRC_BL0_SCI12_SCIX1, - BSP_INT_SRC_BL0_SCI12_SCIX2, - BSP_INT_SRC_BL0_SCI12_SCIX3, - BSP_INT_SRC_BL0_QSPI_QSPSSLI, - BSP_INT_SRC_BL0_CAC_FERRI, - BSP_INT_SRC_BL0_CAC_MENDI, - BSP_INT_SRC_BL0_CAC_OVFI, - BSP_INT_SRC_BL0_DOC_DOPCI, - BSP_INT_SRC_BL0_PDC_PCFEI, - BSP_INT_SRC_BL0_PDC_PCERI, - - /* BL1 Group Interrupts. */ - BSP_INT_SRC_BL1_SDHI_CDETI, - BSP_INT_SRC_BL1_SDHI_CACI, - BSP_INT_SRC_BL1_SDHI_SDACI, - BSP_INT_SRC_BL1_MMCIF_CDETIO, - BSP_INT_SRC_BL1_MMCIF_ERRIO, - BSP_INT_SRC_BL1_MMCIF_ACCIO, - BSP_INT_SRC_BL1_POE3_OEI1, - BSP_INT_SRC_BL1_POE3_OEI2, - BSP_INT_SRC_BL1_POE3_OEI3, - BSP_INT_SRC_BL1_POE3_OEI4, - BSP_INT_SRC_BL1_RIIC0_TEI0, - BSP_INT_SRC_BL1_RIIC0_EEI0, - BSP_INT_SRC_BL1_RIIC2_TEI2, - BSP_INT_SRC_BL1_RIIC2_EEI2, - BSP_INT_SRC_BL1_S12AD0_S12CMPAI, - BSP_INT_SRC_BL1_S12AD0_S12CMPBI, - BSP_INT_SRC_BL1_S12AD1_S12CMPAI1, - BSP_INT_SRC_BL1_S12AD1_S12CMPBI1, - BSP_INT_SRC_BL1_SCI8_TEI8, - BSP_INT_SRC_BL1_SCI8_ERI8, - BSP_INT_SRC_BL1_SCI9_TEI9, - BSP_INT_SRC_BL1_SCI9_ERI9, -#if defined(BSP_MCU_RX65N_2MB) /* In the case of 1.5 or 2Mbyte ROM capacity. */ - BSP_INT_SRC_BL1_RIIC1_TEI1, - BSP_INT_SRC_BL1_RIIC1_EEI1, -#endif - - /* BL2 Group Interrupts. */ - BSP_INT_SRC_BL2_SDSI_SDIOI, - - /* AL0 Group Interrupts. */ - BSP_INT_SRC_AL0_SCI10_TEI10, - BSP_INT_SRC_AL0_SCI10_ERI10, - BSP_INT_SRC_AL0_SCI11_TEI11, - BSP_INT_SRC_AL0_SCI11_ERI11, - BSP_INT_SRC_AL0_RSPI0_SPII0, - BSP_INT_SRC_AL0_RSPI0_SPEI0, - BSP_INT_SRC_AL0_RSPI1_SPII1, - BSP_INT_SRC_AL0_RSPI1_SPEI1, - BSP_INT_SRC_AL0_RSPI2_SPII2, - BSP_INT_SRC_AL0_RSPI2_SPEI2, - - /* AL1 Group Interrupts. */ - BSP_INT_SRC_AL1_EDMAC0_EINT0, -#if defined(BSP_MCU_RX65N_2MB) /* In the case of 1.5 or 2Mbyte ROM capacity. */ - BSP_INT_SRC_AL1_GLCDC_VPOS, - BSP_INT_SRC_AL1_GLCDC_GR1UF, - BSP_INT_SRC_AL1_GLCDC_GR2UF, - BSP_INT_SRC_AL1_DRW2D_DRW_IRQ, -#endif - - - BSP_INT_SRC_TOTAL_ITEMS //DO NOT MODIFY! This is used for sizing the interrupt callback array. -} bsp_int_src_t; - -/* Available commands for R_BSP_InterruptControl() function. */ -typedef enum -{ - BSP_INT_CMD_CALL_CALLBACK = 0, //Calls registered callback function if one exists - BSP_INT_CMD_INTERRUPT_ENABLE, //Enables a given interrupt (Available for NMI pin, FPU, and Bus Error) - BSP_INT_CMD_INTERRUPT_DISABLE, //Disables a given interrupt (Available for FPU, and Bus Error) - BSP_INT_CMD_GROUP_INTERRUPT_ENABLE, //Enables a group interrupt when a group interrupt source is given. The - //pdata argument should give the IPL to be used using the bsp_int_ctrl_t - //type. If a group interrupt is enabled multiple times with different IPL - //levels it will use the highest given IPL. - BSP_INT_CMD_GROUP_INTERRUPT_DISABLE, //Disables a group interrupt when a group interrupt source is given. - //This will only disable a group interrupt when all interrupt - //sources for that group are already disabled. -} bsp_int_cmd_t; - -/* Type to be used for pdata argument in Control function. */ -typedef union -{ - uint32_t ipl; //Used when enabling an interrupt to set that interrupt's priority level -} bsp_int_ctrl_t; - -/* Easy to use typedef for callback functions. */ -typedef void (*bsp_int_cb_t)(void *); - -/* This structure is the common one that is passed as the 'void *' argument to callback functions when an - * exception occurs. - */ -typedef struct -{ - bsp_int_src_t vector; //Which vector caused this interrupt -} bsp_int_cb_args_t; - -/*********************************************************************************************************************** -Exported global variables -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global functions (to be accessed by other files) -***********************************************************************************************************************/ -bsp_int_err_t R_BSP_InterruptWrite(bsp_int_src_t vector, bsp_int_cb_t callback); -bsp_int_err_t R_BSP_InterruptRead(bsp_int_src_t vector, bsp_int_cb_t * callback); -bsp_int_err_t R_BSP_InterruptControl(bsp_int_src_t vector, bsp_int_cmd_t cmd, void * pdata); - -void bsp_interrupt_open(void); //r_bsp internal function. DO NOT CALL. - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_locks.c b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_locks.c deleted file mode 100644 index a237418fe01..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_locks.c +++ /dev/null @@ -1,46 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : mcu_locks.c -* Description : This source file has 1 lock per MCU resource. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -/* Used for getting MCU information to accurately reflect available MCU resources. */ -#include "platform.h" - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global variables (to be accessed by other files) -***********************************************************************************************************************/ -/* Below are locks for controlling access to MCU resources. */ -BSP_CFG_USER_LOCKING_TYPE g_bsp_Locks[BSP_NUM_LOCKS]; diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_locks.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_locks.h deleted file mode 100644 index f03cca2e4a4..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_locks.h +++ /dev/null @@ -1,211 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : mcu_locks.h -* Device(s) : RX65N -* Description : This source file has 1 lock per MCU resource. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -* : 31.01.2017 1.01_ES Added the following enumeration constant. -* - BSP_LOCK_RIIC1 -* - BSP_LOCK_GLCDC -* - BSP_LOCK_DRW2D -***********************************************************************************************************************/ - -#ifndef MCU_LOCKS_H -#define MCU_LOCKS_H - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -/* Gets MCU configuration information. */ -#include "r_bsp_config.h" - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -/* This enum defines all of the available hardware locks for this MCU. If you delete an entry out of this list then you - will decrease the size of the locks array but will not be able to use that lock. For example, if your design is not - using CAN at all then you can safely remove the BSP_LOCK_CAN# entries below. */ -typedef enum -{ - BSP_LOCK_BSC = 0, - BSP_LOCK_CAC, - BSP_LOCK_CAN0, - BSP_LOCK_CAN1, - BSP_LOCK_CMT, - BSP_LOCK_CMT0, - BSP_LOCK_CMT1, - BSP_LOCK_CMT2, - BSP_LOCK_CMT3, - BSP_LOCK_CMTW0, - BSP_LOCK_CMTW1, - BSP_LOCK_CRC, - BSP_LOCK_DA, - BSP_LOCK_DMAC, - BSP_LOCK_DMAC0, - BSP_LOCK_DMAC1, - BSP_LOCK_DMAC2, - BSP_LOCK_DMAC3, - BSP_LOCK_DMAC4, - BSP_LOCK_DMAC5, - BSP_LOCK_DMAC6, - BSP_LOCK_DMAC7, - BSP_LOCK_DOC, - BSP_LOCK_DTC, - BSP_LOCK_EDMAC0, - BSP_LOCK_ELC, - BSP_LOCK_ETHERC0, - BSP_LOCK_EXDMAC, - BSP_LOCK_EXDMAC0, - BSP_LOCK_EXDMAC1, - BSP_LOCK_FLASH, - BSP_LOCK_IRQ0, - BSP_LOCK_IRQ1, - BSP_LOCK_IRQ2, - BSP_LOCK_IRQ3, - BSP_LOCK_IRQ4, - BSP_LOCK_IRQ5, - BSP_LOCK_IRQ6, - BSP_LOCK_IRQ7, - BSP_LOCK_IRQ8, - BSP_LOCK_IRQ9, - BSP_LOCK_IRQ10, - BSP_LOCK_IRQ11, - BSP_LOCK_IRQ12, - BSP_LOCK_IRQ13, - BSP_LOCK_IRQ14, - BSP_LOCK_IRQ15, - BSP_LOCK_ICU, - BSP_LOCK_IWDT, - BSP_LOCK_MMC, - BSP_LOCK_MPC, - BSP_LOCK_MPU, - BSP_LOCK_MTU, - BSP_LOCK_MTU0, - BSP_LOCK_MTU1, - BSP_LOCK_MTU2, - BSP_LOCK_MTU3, - BSP_LOCK_MTU4, - BSP_LOCK_MTU5, - BSP_LOCK_MTU6, - BSP_LOCK_MTU7, - BSP_LOCK_MTU8, - BSP_LOCK_PDC, - BSP_LOCK_POE, - BSP_LOCK_PPG0, - BSP_LOCK_PPG1, - BSP_LOCK_QSPI, - BSP_LOCK_RAM, - BSP_LOCK_RIIC0, -#if defined(BSP_MCU_RX65N_2MB) /* In the case of 1.5 or 2Mbyte ROM capacity. */ - BSP_LOCK_RIIC1, -#endif - BSP_LOCK_RIIC2, - BSP_LOCK_RSPI0, - BSP_LOCK_RSPI1, - BSP_LOCK_RSPI2, - BSP_LOCK_RTC, - BSP_LOCK_S12AD, - BSP_LOCK_S12AD1, - BSP_LOCK_SCI0, - BSP_LOCK_SCI1, - BSP_LOCK_SCI2, - BSP_LOCK_SCI3, - BSP_LOCK_SCI4, - BSP_LOCK_SCI5, - BSP_LOCK_SCI6, - BSP_LOCK_SCI7, - BSP_LOCK_SCI8, - BSP_LOCK_SCI9, - BSP_LOCK_SCI10, - BSP_LOCK_SCI11, - BSP_LOCK_SCI12, - BSP_LOCK_SDHI, - BSP_LOCK_SDSI, - BSP_LOCK_SMCI0, - BSP_LOCK_SMCI1, - BSP_LOCK_SMCI2, - BSP_LOCK_SMCI3, - BSP_LOCK_SMCI4, - BSP_LOCK_SMCI5, - BSP_LOCK_SMCI6, - BSP_LOCK_SMCI7, - BSP_LOCK_SMCI8, - BSP_LOCK_SMCI9, - BSP_LOCK_SMCI12, - BSP_LOCK_SYSTEM, - BSP_LOCK_TEMPS, - BSP_LOCK_TMR0, - BSP_LOCK_TMR1, - BSP_LOCK_TMR2, - BSP_LOCK_TMR3, - BSP_LOCK_TMR01, - BSP_LOCK_TMR23, - BSP_LOCK_TPU0, - BSP_LOCK_TPU1, - BSP_LOCK_TPU2, - BSP_LOCK_TPU3, - BSP_LOCK_TPU4, - BSP_LOCK_TPU5, - BSP_LOCK_TPUA, - BSP_LOCK_USB, - BSP_LOCK_USB0, - BSP_LOCK_WDT, - BSP_LOCK_FLASHCONST, - BSP_LOCK_TEMPSCONST, -#if defined(BSP_MCU_RX65N_2MB) /* In the case of 1.5 or 2Mbyte ROM capacity. */ - BSP_LOCK_GLCDC, - BSP_LOCK_DRW2D, -#endif - BSP_NUM_LOCKS //This entry is not a valid lock. It is used for sizing g_bsp_Locks[] array below. Do not touch! -} mcu_lock_t; - -typedef struct -{ - /* The actual lock. int32_t is used because this is what the xchg() instruction takes as parameters. */ - int32_t lock; - /* Could add a ID for locking and unlocking. In this could protect against any function being able to unlock. */ -} bsp_lock_t; - -/*********************************************************************************************************************** -Error checking -***********************************************************************************************************************/ -#if BSP_CFG_USER_LOCKING_ENABLED == 0 -#undef BSP_CFG_USER_LOCKING_TYPE -#define BSP_CFG_USER_LOCKING_TYPE bsp_lock_t -#else - #if !defined(BSP_CFG_USER_LOCKING_TYPE) - #error "R_BSP ERROR - If you are using your own locking mechanism then you must define BSP_CFG_USER_LOCKING_TYPE in \ - r_bsp_config.h." - #endif -#endif - -/*********************************************************************************************************************** -Exported global variables (to be accessed by other files) -***********************************************************************************************************************/ -extern BSP_CFG_USER_LOCKING_TYPE g_bsp_Locks[]; - -#endif /* MCU_LOCKS_H */ diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_mapped_interrupts.c b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_mapped_interrupts.c deleted file mode 100644 index 498dbd786d6..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_mapped_interrupts.c +++ /dev/null @@ -1,604 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : mcu_mapped_interrupts.c -* Description : This module maps Interrupt A & B interrupts. Which interrupts are mapped depends on the macros in -* r_bsp_interrupt_config.h. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -* : 31.01.2017 1.01_ES Changed the name of the following macro definition, because there was a mistake -* in the name of macro definition. -* (XXX = BSP_MAPPED_INT_CFG_B_VECT, BSP_MAPPED_INT_CFG_A_VECT, -* BSP_PRV_INT_B_NUM, BSP_PRV_INT_A_NUM) -* - From XXX_TPU0_TGI0V to XXX_TPU0_TCI0V. -* - From XXX_TPU1_TGI1V to XXX_TPU1_TCI1V. -* - From XXX_TPU1_TGI1U to XXX_TPU1_TCI1U. -* - From XXX_TPU2_TGI2V to XXX_TPU2_TCI2V. -* - From XXX_TPU2_TGI2U to XXX_TPU2_TCI2U. -* - From XXX_TPU3_TGI3V to XXX_TPU3_TCI3V. -* - From XXX_TPU4_TGI4V to XXX_TPU4_TCI4V. -* - From XXX_TPU4_TGI4U to XXX_TPU4_TCI4U. -* - From XXX_TPU5_TGI5V to XXX_TPU5_TCI5V. -* - From XXX_TPU5_TGI5U to XXX_TPU5_TCI5U. -* - From XXX_MTU0_TGIV0 to XXX_MTU0_TCIV0. -* - From XXX_MTU1_TGIV1 to XXX_MTU1_TCIV1. -* - From XXX_MTU1_TGIU1 to XXX_MTU1_TCIU1. -* - From XXX_MTU2_TGIV2 to XXX_MTU2_TCIV2. -* - From XXX_MTU2_TGIU2 to XXX_MTU2_TCIU2. -* - From XXX_MTU3_TGIV3 to XXX_MTU3_TCIV3. -* - From XXX_MTU4_TGIV4 to XXX_MTU4_TCIV4. -* - From XXX_MTU6_TGIV6 to XXX_MTU6_TCIV6. -* - From XXX_MTU7_TGIV7 to XXX_MTU7_TCIV7. -* - From XXX_MTU8_TGIV8 to XXX_MTU8_TCIV8. -* Added select processing of the following software configurable interrupt source. -* - TSIP_PROC_BUSY -* - TSIP_ROMOK -* - TSIP_LONG_PLG -* - TSIP_TEST_BUSY -* - TSIP_WRRDY0 -* - TSIP_WRRDY1 -* - TSIP_WRRDY4 -* - TSIP_RDRDY0 -* - TSIP_RDRDY1 -* - TSIP_INTEGRATE_WRRDY -* - TSIP_INTEGRATE_RDRDY -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -/* Access to r_bsp. */ -#include "platform.h" - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global variables (to be accessed by other files) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Private global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: bsp_mapped_interrupt_open -* Description : Initializes mapped interrupts. This code does the following for each possible mapped interrupt: -* 1) PREPROCCESOR - Test to see if this interrupt is chosen to be used -* 2) PREPROCESSOR - Figure out which interrupt select register needs to be written to -* 3) RUNTIME C - Set the appropriate select register with the number of this mapped interrupt -* Arguments : None -* Return Value : None -***********************************************************************************************************************/ -void bsp_mapped_interrupt_open (void) -{ -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CMT2_CMI2) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMT2_CMI2) = BSP_PRV_INT_B_NUM_CMT2_CMI2; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CMT3_CMI3) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMT3_CMI3) = BSP_PRV_INT_B_NUM_CMT3_CMI3; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIA0) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIA0) = BSP_PRV_INT_B_NUM_TMR0_CMIA0; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIB0) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIB0) = BSP_PRV_INT_B_NUM_TMR0_CMIB0; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR0_OVI0) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR0_OVI0) = BSP_PRV_INT_B_NUM_TMR0_OVI0; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIA1) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIA1) = BSP_PRV_INT_B_NUM_TMR1_CMIA1; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIB1) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIB1) = BSP_PRV_INT_B_NUM_TMR1_CMIB1; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR1_OVI1) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR1_OVI1) = BSP_PRV_INT_B_NUM_TMR1_OVI1; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIA2) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIA2) = BSP_PRV_INT_B_NUM_TMR2_CMIA2; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIB2) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIB2) = BSP_PRV_INT_B_NUM_TMR2_CMIB2; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR2_OVI2) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR2_OVI2) = BSP_PRV_INT_B_NUM_TMR2_OVI2; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIA3) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIA3) = BSP_PRV_INT_B_NUM_TMR3_CMIA3; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIB3) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIB3) = BSP_PRV_INT_B_NUM_TMR3_CMIB3; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR3_OVI3) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR3_OVI3) = BSP_PRV_INT_B_NUM_TMR3_OVI3; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0A) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0A) = BSP_PRV_INT_B_NUM_TPU0_TGI0A; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0B) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0B) = BSP_PRV_INT_B_NUM_TPU0_TGI0B; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0C) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0C) = BSP_PRV_INT_B_NUM_TPU0_TGI0C; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0D) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0D) = BSP_PRV_INT_B_NUM_TPU0_TGI0D; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TCI0V) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TCI0V) = BSP_PRV_INT_B_NUM_TPU0_TCI0V; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1A) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1A) = BSP_PRV_INT_B_NUM_TPU1_TGI1A; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1B) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1B) = BSP_PRV_INT_B_NUM_TPU1_TGI1B; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1V) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1V) = BSP_PRV_INT_B_NUM_TPU1_TCI1V; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1U) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1U) = BSP_PRV_INT_B_NUM_TPU1_TCI1U; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2A) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2A) = BSP_PRV_INT_B_NUM_TPU2_TGI2A; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2B) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2B) = BSP_PRV_INT_B_NUM_TPU2_TGI2B; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2V) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2V) = BSP_PRV_INT_B_NUM_TPU2_TCI2V; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2U) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2U) = BSP_PRV_INT_B_NUM_TPU2_TCI2U; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3A) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3A) = BSP_PRV_INT_B_NUM_TPU3_TGI3A; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3B) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3B) = BSP_PRV_INT_B_NUM_TPU3_TGI3B; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3C) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3C) = BSP_PRV_INT_B_NUM_TPU3_TGI3C; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3D) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3D) = BSP_PRV_INT_B_NUM_TPU3_TGI3D; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TCI3V) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TCI3V) = BSP_PRV_INT_B_NUM_TPU3_TCI3V; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4A) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4A) = BSP_PRV_INT_B_NUM_TPU4_TGI4A; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4B) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4B) = BSP_PRV_INT_B_NUM_TPU4_TGI4B; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4V) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4V) = BSP_PRV_INT_B_NUM_TPU4_TCI4V; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4U) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4U) = BSP_PRV_INT_B_NUM_TPU4_TCI4U; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5A) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5A) = BSP_PRV_INT_B_NUM_TPU5_TGI5A; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5B) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5B) = BSP_PRV_INT_B_NUM_TPU5_TGI5B; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5V) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5V) = BSP_PRV_INT_B_NUM_TPU5_TCI5V; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5U) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5U) = BSP_PRV_INT_B_NUM_TPU5_TCI5U; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC0I0) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC0I0) = BSP_PRV_INT_B_NUM_CMTW0_IC0I0; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC1I0) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC1I0) = BSP_PRV_INT_B_NUM_CMTW0_IC1I0; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC0I0) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC0I0) = BSP_PRV_INT_B_NUM_CMTW0_OC0I0; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC1I0) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC1I0) = BSP_PRV_INT_B_NUM_CMTW0_OC1I0; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC0I1) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC0I1) = BSP_PRV_INT_B_NUM_CMTW1_IC0I1; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC1I1) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC1I1) = BSP_PRV_INT_B_NUM_CMTW1_IC1I1; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC0I1) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC0I1) = BSP_PRV_INT_B_NUM_CMTW1_OC0I1; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC1I1) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC1I1) = BSP_PRV_INT_B_NUM_CMTW1_OC1I1; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP) = BSP_PRV_INT_B_NUM_RTC_CUP; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXF0) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXF0) = BSP_PRV_INT_B_NUM_CAN0_RXF0; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXF0) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXF0) = BSP_PRV_INT_B_NUM_CAN0_TXF0; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXM0) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXM0) = BSP_PRV_INT_B_NUM_CAN0_RXM0; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXM0) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXM0) = BSP_PRV_INT_B_NUM_CAN0_TXM0; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXF1) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXF1) = BSP_PRV_INT_B_NUM_CAN1_RXF1; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXF1) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXF1) = BSP_PRV_INT_B_NUM_CAN1_TXF1; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXM1) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXM1) = BSP_PRV_INT_B_NUM_CAN1_RXM1; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXM1) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXM1) = BSP_PRV_INT_B_NUM_CAN1_TXM1; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_USB0_USBI0) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_USB0_USBI0) = BSP_PRV_INT_B_NUM_USB0_USBI0; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12ADI0) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12ADI0) = BSP_PRV_INT_B_NUM_S12ADC0_S12ADI0; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GBADI0) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GBADI0) = BSP_PRV_INT_B_NUM_S12ADC0_S12GBADI0; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GCADI0) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GCADI0) = BSP_PRV_INT_B_NUM_S12ADC0_S12GCADI0; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12ADI1) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12ADI1) = BSP_PRV_INT_B_NUM_S12ADC1_S12ADI1; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GBADI1) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GBADI1) = BSP_PRV_INT_B_NUM_S12ADC1_S12GBADI1; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GCADI1) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GCADI1) = BSP_PRV_INT_B_NUM_S12ADC1_S12GCADI1; -#endif - -#if !defined(BSP_MCU_RX65N_2MB) /* In the case of 512K, 768K or 1Mbyte ROM capacity. */ - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_RNG_RNGEND) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_RNG_RNGEND) = BSP_PRV_INT_B_NUM_RNG_RNGEND; -#endif - -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR18I) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR18I) = BSP_PRV_INT_B_NUM_ELC_ELSR18I; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR19I) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR19I) = BSP_PRV_INT_B_NUM_ELC_ELSR19I; -#endif - -#if defined(BSP_MCU_RX65N_2MB) /* In the case of 1.5 or 2Mbyte ROM capacity. */ - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_PROC_BUSY) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_PROC_BUSY) = BSP_PRV_INT_B_NUM_TSIP_PROC_BUSY; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_ROMOK) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_ROMOK) = BSP_PRV_INT_B_NUM_TSIP_ROMOK; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_LONG_PLG) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_LONG_PLG) = BSP_PRV_INT_B_NUM_TSIP_LONG_PLG; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_TEST_BUSY) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_TEST_BUSY) = BSP_PRV_INT_B_NUM_TSIP_TEST_BUSY; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY0) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY0) = BSP_PRV_INT_B_NUM_TSIP_WRRDY0; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY1) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY1) = BSP_PRV_INT_B_NUM_TSIP_WRRDY1; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY4) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY4) = BSP_PRV_INT_B_NUM_TSIP_WRRDY4; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY0) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY0) = BSP_PRV_INT_B_NUM_TSIP_RDRDY0; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY1) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY1) = BSP_PRV_INT_B_NUM_TSIP_RDRDY1; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_WRRDY) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_WRRDY) = BSP_PRV_INT_B_NUM_TSIP_INTEGRATE_WRRDY; -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_RDRDY) - BSP_PRV_INT_SELECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_RDRDY) = BSP_PRV_INT_B_NUM_TSIP_INTEGRATE_RDRDY; -#endif - -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIA0) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIA0) = BSP_PRV_INT_A_NUM_MTU0_TGIA0; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIB0) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIB0) = BSP_PRV_INT_A_NUM_MTU0_TGIB0; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIC0) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIC0) = BSP_PRV_INT_A_NUM_MTU0_TGIC0; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGID0) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGID0) = BSP_PRV_INT_A_NUM_MTU0_TGID0; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TCIV0) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TCIV0) = BSP_PRV_INT_A_NUM_MTU0_TCIV0; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIE0) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIE0) = BSP_PRV_INT_A_NUM_MTU0_TGIE0; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIF0) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIF0) = BSP_PRV_INT_A_NUM_MTU0_TGIF0; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIA1) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIA1) = BSP_PRV_INT_A_NUM_MTU1_TGIA1; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIB1) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIB1) = BSP_PRV_INT_A_NUM_MTU1_TGIB1; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIV1) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIV1) = BSP_PRV_INT_A_NUM_MTU1_TCIV1; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIU1) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIU1) = BSP_PRV_INT_A_NUM_MTU1_TCIU1; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIA2) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIA2) = BSP_PRV_INT_A_NUM_MTU2_TGIA2; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIB2) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIB2) = BSP_PRV_INT_A_NUM_MTU2_TGIB2; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIV2) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIV2) = BSP_PRV_INT_A_NUM_MTU2_TCIV2; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIU2) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIU2) = BSP_PRV_INT_A_NUM_MTU2_TCIU2; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIA3) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIA3) = BSP_PRV_INT_A_NUM_MTU3_TGIA3; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIB3) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIB3) = BSP_PRV_INT_A_NUM_MTU3_TGIB3; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIC3) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIC3) = BSP_PRV_INT_A_NUM_MTU3_TGIC3; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGID3) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGID3) = BSP_PRV_INT_A_NUM_MTU3_TGID3; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TCIV3) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TCIV3) = BSP_PRV_INT_A_NUM_MTU3_TCIV3; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIA4) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIA4) = BSP_PRV_INT_A_NUM_MTU4_TGIA4; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIB4) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIB4) = BSP_PRV_INT_A_NUM_MTU4_TGIB4; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIC4) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIC4) = BSP_PRV_INT_A_NUM_MTU4_TGIC4; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGID4) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGID4) = BSP_PRV_INT_A_NUM_MTU4_TGID4; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TCIV4) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TCIV4) = BSP_PRV_INT_A_NUM_MTU4_TCIV4; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIU5) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIU5) = BSP_PRV_INT_A_NUM_MTU5_TGIU5; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIV5) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIV5) = BSP_PRV_INT_A_NUM_MTU5_TGIV5; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIW5) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIW5) = BSP_PRV_INT_A_NUM_MTU5_TGIW5; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIA6) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIA6) = BSP_PRV_INT_A_NUM_MTU6_TGIA6; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIB6) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIB6) = BSP_PRV_INT_A_NUM_MTU6_TGIB6; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIC6) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIC6) = BSP_PRV_INT_A_NUM_MTU6_TGIC6; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGID6) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGID6) = BSP_PRV_INT_A_NUM_MTU6_TGID6; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TCIV6) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TCIV6) = BSP_PRV_INT_A_NUM_MTU6_TCIV6; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIA7) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIA7) = BSP_PRV_INT_A_NUM_MTU7_TGIA7; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIB7) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIB7) = BSP_PRV_INT_A_NUM_MTU7_TGIB7; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIC7) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIC7) = BSP_PRV_INT_A_NUM_MTU7_TGIC7; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGID7) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGID7) = BSP_PRV_INT_A_NUM_MTU7_TGID7; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TCIV7) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TCIV7) = BSP_PRV_INT_A_NUM_MTU7_TCIV7; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIA8) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIA8) = BSP_PRV_INT_A_NUM_MTU8_TGIA8; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIB8) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIB8) = BSP_PRV_INT_A_NUM_MTU8_TGIB8; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIC8) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIC8) = BSP_PRV_INT_A_NUM_MTU8_TGIC8; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGID8) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGID8) = BSP_PRV_INT_A_NUM_MTU8_TGID8; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TCIV8) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TCIV8) = BSP_PRV_INT_A_NUM_MTU8_TCIV8; -#endif - -#if !defined(BSP_MCU_RX65N_2MB) /* In the case of 512K, 768K or 1Mbyte ROM capacity. */ - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_AES_AESRDY) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_AES_AESRDY) = BSP_PRV_INT_A_NUM_AES_AESRDY; -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_AES_AESEND) - BSP_PRV_INT_SELECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_AES_AESEND) = BSP_PRV_INT_A_NUM_AES_AESEND; -#endif - -#endif -} - - - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_mapped_interrupts.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_mapped_interrupts.h deleted file mode 100644 index 7ed6b59b430..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_mapped_interrupts.h +++ /dev/null @@ -1,1341 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : mcu_mapped_interrupts.c -* Description : This module maps Interrupt A & B interrupts. Which interrupts are mapped depends on the macros in -* r_bsp_interrupt_config.h. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -* : 31.01.2017 1.01_ES Changed the name of the following macro definition, because there was a mistake -* in the name of macro definition. -* (XXX = BSP_MAPPED_INT_CFG_B_VECT, BSP_MAPPED_INT_CFG_A_VECT, BSP_PRV_INT_B_NUM, -* BSP_PRV_INT_A_NUM, IR, DTCE, IER, IPR ,IEN, VECT) -* - From XXX_TPU0_TGI0V to XXX_TPU0_TCI0V. -* - From XXX_TPU1_TGI1V to XXX_TPU1_TCI1V. -* - From XXX_TPU1_TGI1U to XXX_TPU1_TCI1U. -* - From XXX_TPU2_TGI2V to XXX_TPU2_TCI2V. -* - From XXX_TPU2_TGI2U to XXX_TPU2_TCI2U. -* - From XXX_TPU3_TGI3V to XXX_TPU3_TCI3V. -* - From XXX_TPU4_TGI4V to XXX_TPU4_TCI4V. -* - From XXX_TPU4_TGI4U to XXX_TPU4_TCI4U. -* - From XXX_TPU5_TGI5V to XXX_TPU5_TCI5V. -* - From XXX_TPU5_TGI5U to XXX_TPU5_TCI5U. -* - From XXX_MTU0_TGIV0 to XXX_MTU0_TCIV0. -* - From XXX_MTU1_TGIV1 to XXX_MTU1_TCIV1. -* - From XXX_MTU1_TGIU1 to XXX_MTU1_TCIU1. -* - From XXX_MTU2_TGIV2 to XXX_MTU2_TCIV2. -* - From XXX_MTU2_TGIU2 to XXX_MTU2_TCIU2. -* - From XXX_MTU3_TGIV3 to XXX_MTU3_TCIV3. -* - From XXX_MTU4_TGIV4 to XXX_MTU4_TCIV4. -* - From XXX_MTU6_TGIV6 to XXX_MTU6_TCIV6. -* - From XXX_MTU7_TGIV7 to XXX_MTU7_TCIV7. -* - From XXX_MTU8_TGIV8 to XXX_MTU8_TCIV8. -* Added the following macro definition. -* (XXX = BSP_PRV_INT_B_NUM , IR, DTCE, IER, IPR ,IEN, VECT) -* - XXX_TSIP_PROC_BUSY -* - XXX_TSIP_ROMOK -* - XXX_TSIP_LONG_PLG -* - XXX_TSIP_TEST_BUSY -* - XXX_TSIP_WRRDY0 -* - XXX_TSIP_WRRDY1 -* - XXX_TSIP_WRRDY4 -* - XXX_TSIP_RDRDY0 -* - XXX_TSIP_RDRDY1 -* - XXX_TSIP_INTEGRATE_WRRDY -* - XXX_TSIP_INTEGRATE_RDRDY -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* The following macros define the number for each interrupt request source as it pertains to being an Interrupt B or - * Interrupt A interrupt. These values are used when setting the interrupt select registers (i.e. SLIBXRn, SLIBrn, and - * SLIARn). - */ -/* Available Interrupt B Sources. */ -#define BSP_PRV_INT_B_NUM_CMT2_CMI2 1 -#define BSP_PRV_INT_B_NUM_CMT3_CMI3 2 -#define BSP_PRV_INT_B_NUM_TMR0_CMIA0 3 -#define BSP_PRV_INT_B_NUM_TMR0_CMIB0 4 -#define BSP_PRV_INT_B_NUM_TMR0_OVI0 5 -#define BSP_PRV_INT_B_NUM_TMR1_CMIA1 6 -#define BSP_PRV_INT_B_NUM_TMR1_CMIB1 7 -#define BSP_PRV_INT_B_NUM_TMR1_OVI1 8 -#define BSP_PRV_INT_B_NUM_TMR2_CMIA2 9 -#define BSP_PRV_INT_B_NUM_TMR2_CMIB2 10 -#define BSP_PRV_INT_B_NUM_TMR2_OVI2 11 -#define BSP_PRV_INT_B_NUM_TMR3_CMIA3 12 -#define BSP_PRV_INT_B_NUM_TMR3_CMIB3 13 -#define BSP_PRV_INT_B_NUM_TMR3_OVI3 14 -#define BSP_PRV_INT_B_NUM_TPU0_TGI0A 15 -#define BSP_PRV_INT_B_NUM_TPU0_TGI0B 16 -#define BSP_PRV_INT_B_NUM_TPU0_TGI0C 17 -#define BSP_PRV_INT_B_NUM_TPU0_TGI0D 18 -#define BSP_PRV_INT_B_NUM_TPU0_TCI0V 19 -#define BSP_PRV_INT_B_NUM_TPU1_TGI1A 20 -#define BSP_PRV_INT_B_NUM_TPU1_TGI1B 21 -#define BSP_PRV_INT_B_NUM_TPU1_TCI1V 22 -#define BSP_PRV_INT_B_NUM_TPU1_TCI1U 23 -#define BSP_PRV_INT_B_NUM_TPU2_TGI2A 24 -#define BSP_PRV_INT_B_NUM_TPU2_TGI2B 25 -#define BSP_PRV_INT_B_NUM_TPU2_TCI2V 26 -#define BSP_PRV_INT_B_NUM_TPU2_TCI2U 27 -#define BSP_PRV_INT_B_NUM_TPU3_TGI3A 28 -#define BSP_PRV_INT_B_NUM_TPU3_TGI3B 29 -#define BSP_PRV_INT_B_NUM_TPU3_TGI3C 30 -#define BSP_PRV_INT_B_NUM_TPU3_TGI3D 31 -#define BSP_PRV_INT_B_NUM_TPU3_TCI3V 32 -#define BSP_PRV_INT_B_NUM_TPU4_TGI4A 33 -#define BSP_PRV_INT_B_NUM_TPU4_TGI4B 34 -#define BSP_PRV_INT_B_NUM_TPU4_TCI4V 35 -#define BSP_PRV_INT_B_NUM_TPU4_TCI4U 36 -#define BSP_PRV_INT_B_NUM_TPU5_TGI5A 37 -#define BSP_PRV_INT_B_NUM_TPU5_TGI5B 38 -#define BSP_PRV_INT_B_NUM_TPU5_TCI5V 39 -#define BSP_PRV_INT_B_NUM_TPU5_TCI5U 40 -#define BSP_PRV_INT_B_NUM_CMTW0_IC0I0 41 -#define BSP_PRV_INT_B_NUM_CMTW0_IC1I0 42 -#define BSP_PRV_INT_B_NUM_CMTW0_OC0I0 43 -#define BSP_PRV_INT_B_NUM_CMTW0_OC1I0 44 -#define BSP_PRV_INT_B_NUM_CMTW1_IC0I1 45 -#define BSP_PRV_INT_B_NUM_CMTW1_IC1I1 46 -#define BSP_PRV_INT_B_NUM_CMTW1_OC0I1 47 -#define BSP_PRV_INT_B_NUM_CMTW1_OC1I1 48 -#define BSP_PRV_INT_B_NUM_RTC_CUP 49 -#define BSP_PRV_INT_B_NUM_CAN0_RXF0 50 -#define BSP_PRV_INT_B_NUM_CAN0_TXF0 51 -#define BSP_PRV_INT_B_NUM_CAN0_RXM0 52 -#define BSP_PRV_INT_B_NUM_CAN0_TXM0 53 -#define BSP_PRV_INT_B_NUM_CAN1_RXF1 54 -#define BSP_PRV_INT_B_NUM_CAN1_TXF1 55 -#define BSP_PRV_INT_B_NUM_CAN1_RXM1 56 -#define BSP_PRV_INT_B_NUM_CAN1_TXM1 57 -#define BSP_PRV_INT_B_NUM_USB0_USBI0 62 -#define BSP_PRV_INT_B_NUM_S12ADC0_S12ADI0 64 -#define BSP_PRV_INT_B_NUM_S12ADC0_S12GBADI0 65 -#define BSP_PRV_INT_B_NUM_S12ADC0_S12GCADI0 66 -#define BSP_PRV_INT_B_NUM_S12ADC1_S12ADI1 68 -#define BSP_PRV_INT_B_NUM_S12ADC1_S12GBADI1 69 -#define BSP_PRV_INT_B_NUM_S12ADC1_S12GCADI1 70 -#if !defined(BSP_MCU_RX65N_2MB) /* In the case of 512K, 768K or 1Mbyte ROM capacity. */ -#define BSP_PRV_INT_B_NUM_RNG_RNGEND 76 -#endif -#define BSP_PRV_INT_B_NUM_ELC_ELSR18I 79 -#define BSP_PRV_INT_B_NUM_ELC_ELSR19I 80 -#if defined(BSP_MCU_RX65N_2MB) /* In the case of 1.5 or 2Mbyte ROM capacity. */ -#define BSP_PRV_INT_B_NUM_TSIP_PROC_BUSY 85 -#define BSP_PRV_INT_B_NUM_TSIP_ROMOK 86 -#define BSP_PRV_INT_B_NUM_TSIP_LONG_PLG 87 -#define BSP_PRV_INT_B_NUM_TSIP_TEST_BUSY 88 -#define BSP_PRV_INT_B_NUM_TSIP_WRRDY0 89 -#define BSP_PRV_INT_B_NUM_TSIP_WRRDY1 90 -#define BSP_PRV_INT_B_NUM_TSIP_WRRDY4 91 -#define BSP_PRV_INT_B_NUM_TSIP_RDRDY0 92 -#define BSP_PRV_INT_B_NUM_TSIP_RDRDY1 93 -#define BSP_PRV_INT_B_NUM_TSIP_INTEGRATE_WRRDY 94 -#define BSP_PRV_INT_B_NUM_TSIP_INTEGRATE_RDRDY 95 -#endif - -/* Available Interrupt A Sources. */ -#define BSP_PRV_INT_A_NUM_MTU0_TGIA0 1 -#define BSP_PRV_INT_A_NUM_MTU0_TGIB0 2 -#define BSP_PRV_INT_A_NUM_MTU0_TGIC0 3 -#define BSP_PRV_INT_A_NUM_MTU0_TGID0 4 -#define BSP_PRV_INT_A_NUM_MTU0_TCIV0 5 -#define BSP_PRV_INT_A_NUM_MTU0_TGIE0 6 -#define BSP_PRV_INT_A_NUM_MTU0_TGIF0 7 -#define BSP_PRV_INT_A_NUM_MTU1_TGIA1 8 -#define BSP_PRV_INT_A_NUM_MTU1_TGIB1 9 -#define BSP_PRV_INT_A_NUM_MTU1_TCIV1 10 -#define BSP_PRV_INT_A_NUM_MTU1_TCIU1 11 -#define BSP_PRV_INT_A_NUM_MTU2_TGIA2 12 -#define BSP_PRV_INT_A_NUM_MTU2_TGIB2 13 -#define BSP_PRV_INT_A_NUM_MTU2_TCIV2 14 -#define BSP_PRV_INT_A_NUM_MTU2_TCIU2 15 -#define BSP_PRV_INT_A_NUM_MTU3_TGIA3 16 -#define BSP_PRV_INT_A_NUM_MTU3_TGIB3 17 -#define BSP_PRV_INT_A_NUM_MTU3_TGIC3 18 -#define BSP_PRV_INT_A_NUM_MTU3_TGID3 19 -#define BSP_PRV_INT_A_NUM_MTU3_TCIV3 20 -#define BSP_PRV_INT_A_NUM_MTU4_TGIA4 21 -#define BSP_PRV_INT_A_NUM_MTU4_TGIB4 22 -#define BSP_PRV_INT_A_NUM_MTU4_TGIC4 23 -#define BSP_PRV_INT_A_NUM_MTU4_TGID4 24 -#define BSP_PRV_INT_A_NUM_MTU4_TCIV4 25 -#define BSP_PRV_INT_A_NUM_MTU5_TGIU5 27 -#define BSP_PRV_INT_A_NUM_MTU5_TGIV5 28 -#define BSP_PRV_INT_A_NUM_MTU5_TGIW5 29 -#define BSP_PRV_INT_A_NUM_MTU6_TGIA6 30 -#define BSP_PRV_INT_A_NUM_MTU6_TGIB6 31 -#define BSP_PRV_INT_A_NUM_MTU6_TGIC6 32 -#define BSP_PRV_INT_A_NUM_MTU6_TGID6 33 -#define BSP_PRV_INT_A_NUM_MTU6_TCIV6 34 -#define BSP_PRV_INT_A_NUM_MTU7_TGIA7 35 -#define BSP_PRV_INT_A_NUM_MTU7_TGIB7 36 -#define BSP_PRV_INT_A_NUM_MTU7_TGIC7 37 -#define BSP_PRV_INT_A_NUM_MTU7_TGID7 38 -#define BSP_PRV_INT_A_NUM_MTU7_TCIV7 39 -#define BSP_PRV_INT_A_NUM_MTU8_TGIA8 41 -#define BSP_PRV_INT_A_NUM_MTU8_TGIB8 42 -#define BSP_PRV_INT_A_NUM_MTU8_TGIC8 43 -#define BSP_PRV_INT_A_NUM_MTU8_TGID8 44 -#define BSP_PRV_INT_A_NUM_MTU8_TCIV8 45 -#if !defined(BSP_MCU_RX65N_2MB) /* In the case of 512K, 768K or 1Mbyte ROM capacity. */ -#define BSP_PRV_INT_A_NUM_AES_AESRDY 88 -#define BSP_PRV_INT_A_NUM_AES_AESEND 89 -#endif - -/* The appropriate macros will now be defined based on the vector selections made by the user. - * These are the same macros that are defined for constant-mapped interrupts (vectors 0-127). This means that the - * code can define, setup, and use mapped interrupts the same as would be done for constant-mapped interrupts. - */ -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CMT2_CMI2) -#define IR_CMT2_CMI2 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMT2_CMI2) -#define DTCE_CMT2_CMI2 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMT2_CMI2) -#define IER_CMT2_CMI2 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_CMT2_CMI2) -#define IPR_CMT2_CMI2 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMT2_CMI2) -#define IEN_CMT2_CMI2 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_CMT2_CMI2) -#define VECT_CMT2_CMI2 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMT2_CMI2) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CMT3_CMI3) -#define IR_CMT3_CMI3 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMT3_CMI3) -#define DTCE_CMT3_CMI3 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMT3_CMI3) -#define IER_CMT3_CMI3 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_CMT3_CMI3) -#define IPR_CMT3_CMI3 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMT3_CMI3) -#define IEN_CMT3_CMI3 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_CMT3_CMI3) -#define VECT_CMT3_CMI3 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMT3_CMI3) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0A) -#define IR_TPU0_TGI0A BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0A) -#define DTCE_TPU0_TGI0A BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0A) -#define IER_TPU0_TGI0A BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0A) -#define IPR_TPU0_TGI0A BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0A) -#define IEN_TPU0_TGI0A BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0A) -#define VECT_TPU0_TGI0A BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0A) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0B) -#define IR_TPU0_TGI0B BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0B) -#define DTCE_TPU0_TGI0B BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0B) -#define IER_TPU0_TGI0B BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0B) -#define IPR_TPU0_TGI0B BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0B) -#define IEN_TPU0_TGI0B BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0B) -#define VECT_TPU0_TGI0B BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0B) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0C) -#define IR_TPU0_TGI0C BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0C) -#define DTCE_TPU0_TGI0C BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0C) -#define IER_TPU0_TGI0C BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0C) -#define IPR_TPU0_TGI0C BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0C) -#define IEN_TPU0_TGI0C BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0C) -#define VECT_TPU0_TGI0C BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0C) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0D) -#define IR_TPU0_TGI0D BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0D) -#define DTCE_TPU0_TGI0D BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0D) -#define IER_TPU0_TGI0D BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0D) -#define IPR_TPU0_TGI0D BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0D) -#define IEN_TPU0_TGI0D BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0D) -#define VECT_TPU0_TGI0D BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0D) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TCI0V) -#define IR_TPU0_TCI0V BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TCI0V) -#define DTCE_TPU0_TCI0V BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TCI0V) -#define IER_TPU0_TCI0V BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU0_TCI0V) -#define IPR_TPU0_TCI0V BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TCI0V) -#define IEN_TPU0_TCI0V BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU0_TCI0V) -#define VECT_TPU0_TCI0V BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU0_TCI0V) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1B) -#define IR_TPU1_TGI1B BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1B) -#define DTCE_TPU1_TGI1B BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1B) -#define IER_TPU1_TGI1B BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1B) -#define IPR_TPU1_TGI1B BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1B) -#define IEN_TPU1_TGI1B BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1B) -#define VECT_TPU1_TGI1B BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1B) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1V) -#define IR_TPU1_TCI1V BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1V) -#define DTCE_TPU1_TCI1V BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1V) -#define IER_TPU1_TCI1V BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1V) -#define IPR_TPU1_TCI1V BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1V) -#define IEN_TPU1_TCI1V BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1V) -#define VECT_TPU1_TCI1V BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1V) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1U) -#define IR_TPU1_TCI1U BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1U) -#define DTCE_TPU1_TCI1U BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1U) -#define IER_TPU1_TCI1U BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1U) -#define IPR_TPU1_TCI1U BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1U) -#define IEN_TPU1_TCI1U BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1U) -#define VECT_TPU1_TCI1U BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1U) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2A) -#define IR_TPU2_TGI2A BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2A) -#define DTCE_TPU2_TGI2A BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2A) -#define IER_TPU2_TGI2A BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2A) -#define IPR_TPU2_TGI2A BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2A) -#define IEN_TPU2_TGI2A BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2A) -#define VECT_TPU2_TGI2A BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2A) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2B) -#define IR_TPU2_TGI2B BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2B) -#define DTCE_TPU2_TGI2B BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2B) -#define IER_TPU2_TGI2B BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2B) -#define IPR_TPU2_TGI2B BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2B) -#define IEN_TPU2_TGI2B BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2B) -#define VECT_TPU2_TGI2B BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2B) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2V) -#define IR_TPU2_TCI2V BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2V) -#define DTCE_TPU2_TCI2V BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2V) -#define IER_TPU2_TCI2V BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2V) -#define IPR_TPU2_TCI2V BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2V) -#define IEN_TPU2_TCI2V BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2V) -#define VECT_TPU2_TCI2V BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2V) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2U) -#define IR_TPU2_TCI2U BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2U) -#define DTCE_TPU2_TCI2U BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2U) -#define IER_TPU2_TCI2U BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2U) -#define IPR_TPU2_TCI2U BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2U) -#define IEN_TPU2_TCI2U BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2U) -#define VECT_TPU2_TCI2U BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2U) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3A) -#define IR_TPU3_TGI3A BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3A) -#define DTCE_TPU3_TGI3A BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3A) -#define IER_TPU3_TGI3A BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3A) -#define IPR_TPU3_TGI3A BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3A) -#define IEN_TPU3_TGI3A BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3A) -#define VECT_TPU3_TGI3A BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3A) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3B) -#define IR_TPU3_TGI3B BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3B) -#define DTCE_TPU3_TGI3B BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3B) -#define IER_TPU3_TGI3B BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3B) -#define IPR_TPU3_TGI3B BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3B) -#define IEN_TPU3_TGI3B BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3B) -#define VECT_TPU3_TGI3B BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3B) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1A) -#define IR_TPU1_TGI1A BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1A) -#define DTCE_TPU1_TGI1A BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1A) -#define IER_TPU1_TGI1A BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1A) -#define IPR_TPU1_TGI1A BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1A) -#define IEN_TPU1_TGI1A BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1A) -#define VECT_TPU1_TGI1A BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1A) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3C) -#define IR_TPU3_TGI3C BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3C) -#define DTCE_TPU3_TGI3C BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3C) -#define IER_TPU3_TGI3C BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3C) -#define IPR_TPU3_TGI3C BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3C) -#define IEN_TPU3_TGI3C BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3C) -#define VECT_TPU3_TGI3C BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3C) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIA0) -#define IR_TMR0_CMIA0 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIA0) -#define DTCE_TMR0_CMIA0 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIA0) -#define IER_TMR0_CMIA0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIA0) -#define IPR_TMR0_CMIA0 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIA0) -#define IEN_TMR0_CMIA0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIA0) -#define VECT_TMR0_CMIA0 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIA0) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIB0) -#define IR_TMR0_CMIB0 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIB0) -#define DTCE_TMR0_CMIB0 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIB0) -#define IER_TMR0_CMIB0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIB0) -#define IPR_TMR0_CMIB0 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIB0) -#define IEN_TMR0_CMIB0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIB0) -#define VECT_TMR0_CMIB0 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIB0) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR0_OVI0) -#define IR_TMR0_OVI0 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR0_OVI0) -#define DTCE_TMR0_OVI0 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR0_OVI0) -#define IER_TMR0_OVI0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TMR0_OVI0) -#define IPR_TMR0_OVI0 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR0_OVI0) -#define IEN_TMR0_OVI0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TMR0_OVI0) -#define VECT_TMR0_OVI0 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR0_OVI0) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIA1) -#define IR_TMR1_CMIA1 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIA1) -#define DTCE_TMR1_CMIA1 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIA1) -#define IER_TMR1_CMIA1 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIA1) -#define IPR_TMR1_CMIA1 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIA1) -#define IEN_TMR1_CMIA1 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIA1) -#define VECT_TMR1_CMIA1 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIA1) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIB1) -#define IR_TMR1_CMIB1 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIB1) -#define DTCE_TMR1_CMIB1 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIB1) -#define IER_TMR1_CMIB1 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIB1) -#define IPR_TMR1_CMIB1 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIB1) -#define IEN_TMR1_CMIB1 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIB1) -#define VECT_TMR1_CMIB1 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIB1) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR1_OVI1) -#define IR_TMR1_OVI1 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR1_OVI1) -#define DTCE_TMR1_OVI1 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR1_OVI1) -#define IER_TMR1_OVI1 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TMR1_OVI1) -#define IPR_TMR1_OVI1 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR1_OVI1) -#define IEN_TMR1_OVI1 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TMR1_OVI1) -#define VECT_TMR1_OVI1 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR1_OVI1) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIA2) -#define IR_TMR2_CMIA2 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIA2) -#define DTCE_TMR2_CMIA2 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIA2) -#define IER_TMR2_CMIA2 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIA2) -#define IPR_TMR2_CMIA2 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIA2) -#define IEN_TMR2_CMIA2 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIA2) -#define VECT_TMR2_CMIA2 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIA2) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIB2) -#define IR_TMR2_CMIB2 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIB2) -#define DTCE_TMR2_CMIB2 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIB2) -#define IER_TMR2_CMIB2 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIB2) -#define IPR_TMR2_CMIB2 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIB2) -#define IEN_TMR2_CMIB2 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIB2) -#define VECT_TMR2_CMIB2 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIB2) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR2_OVI2) -#define IR_TMR2_OVI2 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR2_OVI2) -#define DTCE_TMR2_OVI2 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR2_OVI2) -#define IER_TMR2_OVI2 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TMR2_OVI2) -#define IPR_TMR2_OVI2 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR2_OVI2) -#define IEN_TMR2_OVI2 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TMR2_OVI2) -#define VECT_TMR2_OVI2 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR2_OVI2) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIA3) -#define IR_TMR3_CMIA3 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIA3) -#define DTCE_TMR3_CMIA3 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIA3) -#define IER_TMR3_CMIA3 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIA3) -#define IPR_TMR3_CMIA3 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIA3) -#define IEN_TMR3_CMIA3 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIA3) -#define VECT_TMR3_CMIA3 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIA3) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIB3) -#define IR_TMR3_CMIB3 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIB3) -#define DTCE_TMR3_CMIB3 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIB3) -#define IER_TMR3_CMIB3 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIB3) -#define IPR_TMR3_CMIB3 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIB3) -#define IEN_TMR3_CMIB3 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIB3) -#define VECT_TMR3_CMIB3 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIB3) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TMR3_OVI3) -#define IR_TMR3_OVI3 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR3_OVI3) -#define DTCE_TMR3_OVI3 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR3_OVI3) -#define IER_TMR3_OVI3 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TMR3_OVI3) -#define IPR_TMR3_OVI3 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR3_OVI3) -#define IEN_TMR3_OVI3 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TMR3_OVI3) -#define VECT_TMR3_OVI3 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TMR3_OVI3) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3D) -#define IR_TPU3_TGI3D BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3D) -#define DTCE_TPU3_TGI3D BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3D) -#define IER_TPU3_TGI3D BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3D) -#define IPR_TPU3_TGI3D BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3D) -#define IEN_TPU3_TGI3D BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3D) -#define VECT_TPU3_TGI3D BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3D) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TCI3V) -#define IR_TPU3_TCI3V BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TCI3V) -#define DTCE_TPU3_TCI3V BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TCI3V) -#define IER_TPU3_TCI3V BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU3_TCI3V) -#define IPR_TPU3_TCI3V BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TCI3V) -#define IEN_TPU3_TCI3V BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU3_TCI3V) -#define VECT_TPU3_TCI3V BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU3_TCI3V) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4A) -#define IR_TPU4_TGI4A BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4A) -#define DTCE_TPU4_TGI4A BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4A) -#define IER_TPU4_TGI4A BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4A) -#define IPR_TPU4_TGI4A BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4A) -#define IEN_TPU4_TGI4A BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4A) -#define VECT_TPU4_TGI4A BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4A) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4B) -#define IR_TPU4_TGI4B BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4B) -#define DTCE_TPU4_TGI4B BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4B) -#define IER_TPU4_TGI4B BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4B) -#define IPR_TPU4_TGI4B BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4B) -#define IEN_TPU4_TGI4B BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4B) -#define VECT_TPU4_TGI4B BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4B) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4V) -#define IR_TPU4_TCI4V BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4V) -#define DTCE_TPU4_TCI4V BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4V) -#define IER_TPU4_TCI4V BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4V) -#define IPR_TPU4_TCI4V BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4V) -#define IEN_TPU4_TCI4V BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4V) -#define VECT_TPU4_TCI4V BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4V) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4U) -#define IR_TPU4_TCI4U BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4U) -#define DTCE_TPU4_TCI4U BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4U) -#define IER_TPU4_TCI4U BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4U) -#define IPR_TPU4_TCI4U BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4U) -#define IEN_TPU4_TCI4U BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4U) -#define VECT_TPU4_TCI4U BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4U) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5A) -#define IR_TPU5_TGI5A BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5A) -#define DTCE_TPU5_TGI5A BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5A) -#define IER_TPU5_TGI5A BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5A) -#define IPR_TPU5_TGI5A BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5A) -#define IEN_TPU5_TGI5A BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5A) -#define VECT_TPU5_TGI5A BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5A) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5B) -#define IR_TPU5_TGI5B BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5B) -#define DTCE_TPU5_TGI5B BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5B) -#define IER_TPU5_TGI5B BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5B) -#define IPR_TPU5_TGI5B BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5B) -#define IEN_TPU5_TGI5B BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5B) -#define VECT_TPU5_TGI5B BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5B) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5V) -#define IR_TPU5_TCI5V BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5V) -#define DTCE_TPU5_TCI5V BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5V) -#define IER_TPU5_TCI5V BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5V) -#define IPR_TPU5_TCI5V BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5V) -#define IEN_TPU5_TCI5V BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5V) -#define VECT_TPU5_TCI5V BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5V) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5U) -#define IR_TPU5_TCI5U BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5U) -#define DTCE_TPU5_TCI5U BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5U) -#define IER_TPU5_TCI5U BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5U) -#define IPR_TPU5_TCI5U BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5U) -#define IEN_TPU5_TCI5U BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5U) -#define VECT_TPU5_TCI5U BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5U) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC0I0) -#define IR_CMTW0_IC0I0 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC0I0) -#define DTCE_CMTW0_IC0I0 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC0I0) -#define IER_CMTW0_IC0I0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC0I0) -#define IPR_CMTW0_IC0I0 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC0I0) -#define IEN_CMTW0_IC0I0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC0I0) -#define VECT_CMTW0_IC0I0 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC0I0) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC1I0) -#define IR_CMTW0_IC1I0 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC1I0) -#define DTCE_CMTW0_IC1I0 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC1I0) -#define IER_CMTW0_IC1I0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC1I0) -#define IPR_CMTW0_IC1I0 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC1I0) -#define IEN_CMTW0_IC1I0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC1I0) -#define VECT_CMTW0_IC1I0 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC1I0) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC0I0) -#define IR_CMTW0_OC0I0 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC0I0) -#define DTCE_CMTW0_OC0I0 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC0I0) -#define IER_CMTW0_OC0I0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC0I0) -#define IPR_CMTW0_OC0I0 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC0I0) -#define IEN_CMTW0_OC0I0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC0I0) -#define VECT_CMTW0_OC0I0 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC0I0) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC1I0) -#define IR_CMTW0_OC1I0 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC1I0) -#define DTCE_CMTW0_OC1I0 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC1I0) -#define IER_CMTW0_OC1I0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC1I0) -#define IPR_CMTW0_OC1I0 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC1I0) -#define IEN_CMTW0_OC1I0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC1I0) -#define VECT_CMTW0_OC1I0 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC1I0) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC0I1) -#define IR_CMTW1_IC0I1 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC0I1) -#define DTCE_CMTW1_IC0I1 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC0I1) -#define IER_CMTW1_IC0I1 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC0I1) -#define IPR_CMTW1_IC0I1 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC0I1) -#define IEN_CMTW1_IC0I1 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC0I1) -#define VECT_CMTW1_IC0I1 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC0I1) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC1I1) -#define IR_CMTW1_IC1I1 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC1I1) -#define DTCE_CMTW1_IC1I1 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC1I1) -#define IER_CMTW1_IC1I1 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC1I1) -#define IPR_CMTW1_IC1I1 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC1I1) -#define IEN_CMTW1_IC1I1 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC1I1) -#define VECT_CMTW1_IC1I1 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC1I1) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC0I1) -#define IR_CMTW1_OC0I1 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC0I1) -#define DTCE_CMTW1_OC0I1 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC0I1) -#define IER_CMTW1_OC0I1 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC0I1) -#define IPR_CMTW1_OC0I1 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC0I1) -#define IEN_CMTW1_OC0I1 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC0I1) -#define VECT_CMTW1_OC0I1 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC0I1) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC1I1) -#define IR_CMTW1_OC1I1 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC1I1) -#define DTCE_CMTW1_OC1I1 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC1I1) -#define IER_CMTW1_OC1I1 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC1I1) -#define IPR_CMTW1_OC1I1 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC1I1) -#define IEN_CMTW1_OC1I1 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC1I1) -#define VECT_CMTW1_OC1I1 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC1I1) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP) -#define IR_RTC_CUP BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP) -#define DTCE_RTC_CUP BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP) -#define IER_RTC_CUP BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP) -#define IPR_RTC_CUP BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP) -#define IEN_RTC_CUP BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP) -#define VECT_RTC_CUP BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXF0) -#define IR_CAN0_RXF0 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXF0) -#define DTCE_CAN0_RXF0 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXF0) -#define IER_CAN0_RXF0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXF0) -#define IPR_CAN0_RXF0 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXF0) -#define IEN_CAN0_RXF0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXF0) -#define VECT_CAN0_RXF0 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXF0) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXF0) -#define IR_CAN0_TXF0 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXF0) -#define DTCE_CAN0_TXF0 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXF0) -#define IER_CAN0_TXF0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXF0) -#define IPR_CAN0_TXF0 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXF0) -#define IEN_CAN0_TXF0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXF0) -#define VECT_CAN0_TXF0 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXF0) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXM0) -#define IR_CAN0_RXM0 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXM0) -#define DTCE_CAN0_RXM0 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXM0) -#define IER_CAN0_RXM0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXM0) -#define IPR_CAN0_RXM0 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXM0) -#define IEN_CAN0_RXM0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXM0) -#define VECT_CAN0_RXM0 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXM0) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXM0) -#define IR_CAN0_TXM0 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXM0) -#define DTCE_CAN0_TXM0 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXM0) -#define IER_CAN0_TXM0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXM0) -#define IPR_CAN0_TXM0 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXM0) -#define IEN_CAN0_TXM0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXM0) -#define VECT_CAN0_TXM0 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXM0) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXF1) -#define IR_CAN1_RXF1 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXF1) -#define DTCE_CAN1_RXF1 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXF1) -#define IER_CAN1_RXF1 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXF1) -#define IPR_CAN1_RXF1 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXF1) -#define IEN_CAN1_RXF1 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXF1) -#define VECT_CAN1_RXF1 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXF1) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXF1) -#define IR_CAN1_TXF1 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXF1) -#define DTCE_CAN1_TXF1 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXF1) -#define IER_CAN1_TXF1 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXF1) -#define IPR_CAN1_TXF1 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXF1) -#define IEN_CAN1_TXF1 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXF1) -#define VECT_CAN1_TXF1 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXF1) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXM1) -#define IR_CAN1_RXM1 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXM1) -#define DTCE_CAN1_RXM1 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXM1) -#define IER_CAN1_RXM1 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXM1) -#define IPR_CAN1_RXM1 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXM1) -#define IEN_CAN1_RXM1 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXM1) -#define VECT_CAN1_RXM1 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXM1) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXM1) -#define IR_CAN1_TXM1 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXM1) -#define DTCE_CAN1_TXM1 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXM1) -#define IER_CAN1_TXM1 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXM1) -#define IPR_CAN1_TXM1 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXM1) -#define IEN_CAN1_TXM1 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXM1) -#define VECT_CAN1_TXM1 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXM1) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_USB0_USBI0) -#define IR_USB0_USBI0 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_USB0_USBI0) -#define DTCE_USB0_USBI0 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_USB0_USBI0) -#define IER_USB0_USBI0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_USB0_USBI0) -#define IPR_USB0_USBI0 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_USB0_USBI0) -#define IEN_USB0_USBI0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_USB0_USBI0) -#define VECT_USB0_USBI0 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_USB0_USBI0) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12ADI0) -#define IR_S12ADC0_S12ADI0 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12ADI0) -#define DTCE_S12ADC0_S12ADI0 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12ADI0) -#define IER_S12ADC0_S12ADI0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12ADI0) -#define IPR_S12ADC0_S12ADI0 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12ADI0) -#define IEN_S12ADC0_S12ADI0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12ADI0) -#define VECT_S12ADC0_S12ADI0 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12ADI0) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GBADI0) -#define IR_S12ADC0_S12GBADI0 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GBADI0) -#define DTCE_S12ADC0_S12GBADI0 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GBADI0) -#define IER_S12ADC0_S12GBADI0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GBADI0) -#define IPR_S12ADC0_S12GBADI0 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GBADI0) -#define IEN_S12ADC0_S12GBADI0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GBADI0) -#define VECT_S12ADC0_S12GBADI0 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GBADI0) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GCADI0) -#define IR_S12ADC0_S12GCADI0 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GCADI0) -#define DTCE_S12ADC0_S12GCADI0 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GCADI0) -#define IER_S12ADC0_S12GCADI0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GCADI0) -#define IPR_S12ADC0_S12GCADI0 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GCADI0) -#define IEN_S12ADC0_S12GCADI0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GCADI0) -#define VECT_S12ADC0_S12GCADI0 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GCADI0) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12ADI1) -#define IR_S12ADC1_S12ADI1 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12ADI1) -#define DTCE_S12ADC1_S12ADI1 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12ADI1) -#define IER_S12ADC1_S12ADI1 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12ADI1) -#define IPR_S12ADC1_S12ADI1 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12ADI1) -#define IEN_S12ADC1_S12ADI1 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12ADI1) -#define VECT_S12ADC1_S12ADI1 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12ADI1) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GBADI1) -#define IR_S12ADC1_S12GBADI1 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GBADI1) -#define DTCE_S12ADC1_S12GBADI1 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GBADI1) -#define IER_S12ADC1_S12GBADI1 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GBADI1) -#define IPR_S12ADC1_S12GBADI1 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GBADI1) -#define IEN_S12ADC1_S12GBADI1 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GBADI1) -#define VECT_S12ADC1_S12GBADI1 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GBADI1) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GCADI1) -#define IR_S12ADC1_S12GCADI1 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GCADI1) -#define DTCE_S12ADC1_S12GCADI1 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GCADI1) -#define IER_S12ADC1_S12GCADI1 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GCADI1) -#define IPR_S12ADC1_S12GCADI1 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GCADI1) -#define IEN_S12ADC1_S12GCADI1 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GCADI1) -#define VECT_S12ADC1_S12GCADI1 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GCADI1) -#endif - -#if !defined(BSP_MCU_RX65N_2MB) /* In the case of 512K, 768K or 1Mbyte ROM capacity. */ - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_RNG_RNGEND) -#define IR_RNG_RNGEND BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_RNG_RNGEND) -#define DTCE_RNG_RNGEND BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_RNG_RNGEND) -#define IER_RNG_RNGEND BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_RNG_RNGEND) -#define IPR_RNG_RNGEND BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_RNG_RNGEND) -#define IEN_RNG_RNGEND BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_RNG_RNGEND) -#define VECT_RNG_RNGEND BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_RNG_RNGEND) -#endif - -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR18I) -#define IR_ELC_ELSR18I BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR18I) -#define DTCE_ELC_ELSR18I BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR18I) -#define IER_ELC_ELSR18I BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR18I) -#define IPR_ELC_ELSR18I BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR18I) -#define IEN_ELC_ELSR18I BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR18I) -#define VECT_ELC_ELSR18I BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR18I) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR19I) -#define IR_ELC_ELSR19I BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR19I) -#define DTCE_ELC_ELSR19I BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR19I) -#define IER_ELC_ELSR19I BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR19I) -#define IPR_ELC_ELSR19I BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR19I) -#define IEN_ELC_ELSR19I BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR19I) -#define VECT_ELC_ELSR19I BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR19I) -#endif - -#if defined(BSP_MCU_RX65N_2MB) /* In the case of 1.5 or 2Mbyte ROM capacity. */ - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_PROC_BUSY) -#define IR_TSIP_PROC_BUSY BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_PROC_BUSY) -#define DTCE_TSIP_PROC_BUSY BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_PROC_BUSY) -#define IER_TSIP_PROC_BUSY BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TSIP_PROC_BUSY) -#define IPR_TSIP_PROC_BUSY BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_PROC_BUSY) -#define IEN_TSIP_PROC_BUSY BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TSIP_PROC_BUSY) -#define VECT_TSIP_PROC_BUSY BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_PROC_BUSY) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_ROMOK) -#define IR_TSIP_ROMOK BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_ROMOK) -#define DTCE_TSIP_ROMOK BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_ROMOK) -#define IER_TSIP_ROMOK BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TSIP_ROMOK) -#define IPR_TSIP_ROMOK BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_ROMOK) -#define IEN_TSIP_ROMOK BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TSIP_ROMOK) -#define VECT_TSIP_ROMOK BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_ROMOK) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_LONG_PLG) -#define IR_TSIP_LONG_PLG BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_LONG_PLG) -#define DTCE_TSIP_LONG_PLG BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_LONG_PLG) -#define IER_TSIP_LONG_PLG BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TSIP_LONG_PLG) -#define IPR_TSIP_LONG_PLG BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_LONG_PLG) -#define IEN_TSIP_LONG_PLG BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TSIP_LONG_PLG) -#define VECT_TSIP_LONG_PLG BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_LONG_PLG) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_TEST_BUSY) -#define IR_TSIP_TEST_BUSY BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_TEST_BUSY) -#define DTCE_TSIP_TEST_BUSY BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_TEST_BUSY) -#define IER_TSIP_TEST_BUSY BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TSIP_TEST_BUSY) -#define IPR_TSIP_TEST_BUSY BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_TEST_BUSY) -#define IEN_TSIP_TEST_BUSY BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TSIP_TEST_BUSY) -#define VECT_TSIP_TEST_BUSY BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_TEST_BUSY) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY0) -#define IR_TSIP_WRRDY0 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY0) -#define DTCE_TSIP_WRRDY0 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY0) -#define IER_TSIP_WRRDY0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY0) -#define IPR_TSIP_WRRDY0 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY0) -#define IEN_TSIP_WRRDY0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY0) -#define VECT_TSIP_WRRDY0 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY0) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY1) -#define IR_TSIP_WRRDY1 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY1) -#define DTCE_TSIP_WRRDY1 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY1) -#define IER_TSIP_WRRDY1 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY1) -#define IPR_TSIP_WRRDY1 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY1) -#define IEN_TSIP_WRRDY1 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY1) -#define VECT_TSIP_WRRDY1 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY1) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY4) -#define IR_TSIP_WRRDY4 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY4) -#define DTCE_TSIP_WRRDY4 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY4) -#define IER_TSIP_WRRDY4 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY4) -#define IPR_TSIP_WRRDY4 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY4) -#define IEN_TSIP_WRRDY4 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY4) -#define VECT_TSIP_WRRDY4 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY4) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY0) -#define IR_TSIP_RDRDY0 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY0) -#define DTCE_TSIP_RDRDY0 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY0) -#define IER_TSIP_RDRDY0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY0) -#define IPR_TSIP_RDRDY0 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY0) -#define IEN_TSIP_RDRDY0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY0) -#define VECT_TSIP_RDRDY0 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY0) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY1) -#define IR_TSIP_RDRDY1 BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY1) -#define DTCE_TSIP_RDRDY1 BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY1) -#define IER_TSIP_RDRDY1 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY1) -#define IPR_TSIP_RDRDY1 BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY1) -#define IEN_TSIP_RDRDY1 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY1) -#define VECT_TSIP_RDRDY1 BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY1) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_WRRDY) -#define IR_TSIP_INTEGRATE_WRRDY BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_WRRDY) -#define DTCE_TSIP_INTEGRATE_WRRDY BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_WRRDY) -#define IER_TSIP_INTEGRATE_WRRDY BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_WRRDY) -#define IPR_TSIP_INTEGRATE_WRRDY BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_WRRDY) -#define IEN_TSIP_INTEGRATE_WRRDY BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_WRRDY) -#define VECT_TSIP_INTEGRATE_WRRDY BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_WRRDY) -#endif - -#if BSP_PRV_VALID_MAP_INT(B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_RDRDY) -#define IR_TSIP_INTEGRATE_RDRDY BSP_PRV_IR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_RDRDY) -#define DTCE_TSIP_INTEGRATE_RDRDY BSP_PRV_DTCE(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_RDRDY) -#define IER_TSIP_INTEGRATE_RDRDY BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_RDRDY) -#define IPR_TSIP_INTEGRATE_RDRDY BSP_PRV_IPR(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_RDRDY) -#define IEN_TSIP_INTEGRATE_RDRDY BSP_PRV_IEN(BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_RDRDY) -#define VECT_TSIP_INTEGRATE_RDRDY BSP_PRV_VECT(BSP_PRV_B, BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_RDRDY) -#endif - -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIA1) -#define IR_MTU1_TGIA1 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIA1) -#define DTCE_MTU1_TGIA1 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIA1) -#define IER_MTU1_TGIA1 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIA1) -#define IPR_MTU1_TGIA1 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIA1) -#define IEN_MTU1_TGIA1 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIA1) -#define VECT_MTU1_TGIA1 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIA1) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIA0) -#define IR_MTU0_TGIA0 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIA0) -#define DTCE_MTU0_TGIA0 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIA0) -#define IER_MTU0_TGIA0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIA0) -#define IPR_MTU0_TGIA0 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIA0) -#define IEN_MTU0_TGIA0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIA0) -#define VECT_MTU0_TGIA0 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIA0) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIB0) -#define IR_MTU0_TGIB0 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIB0) -#define DTCE_MTU0_TGIB0 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIB0) -#define IER_MTU0_TGIB0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIB0) -#define IPR_MTU0_TGIB0 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIB0) -#define IEN_MTU0_TGIB0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIB0) -#define VECT_MTU0_TGIB0 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIB0) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIC0) -#define IR_MTU0_TGIC0 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIC0) -#define DTCE_MTU0_TGIC0 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIC0) -#define IER_MTU0_TGIC0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIC0) -#define IPR_MTU0_TGIC0 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIC0) -#define IEN_MTU0_TGIC0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIC0) -#define VECT_MTU0_TGIC0 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIC0) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGID0) -#define IR_MTU0_TGID0 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGID0) -#define DTCE_MTU0_TGID0 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGID0) -#define IER_MTU0_TGID0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGID0) -#define IPR_MTU0_TGID0 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGID0) -#define IEN_MTU0_TGID0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGID0) -#define VECT_MTU0_TGID0 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGID0) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TCIV0) -#define IR_MTU0_TCIV0 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TCIV0) -#define DTCE_MTU0_TCIV0 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TCIV0) -#define IER_MTU0_TCIV0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU0_TCIV0) -#define IPR_MTU0_TCIV0 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TCIV0) -#define IEN_MTU0_TCIV0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU0_TCIV0) -#define VECT_MTU0_TCIV0 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TCIV0) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIE0) -#define IR_MTU0_TGIE0 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIE0) -#define DTCE_MTU0_TGIE0 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIE0) -#define IER_MTU0_TGIE0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIE0) -#define IPR_MTU0_TGIE0 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIE0) -#define IEN_MTU0_TGIE0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIE0) -#define VECT_MTU0_TGIE0 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIE0) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIF0) -#define IR_MTU0_TGIF0 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIF0) -#define DTCE_MTU0_TGIF0 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIF0) -#define IER_MTU0_TGIF0 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIF0) -#define IPR_MTU0_TGIF0 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIF0) -#define IEN_MTU0_TGIF0 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIF0) -#define VECT_MTU0_TGIF0 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIF0) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIB1) -#define IR_MTU1_TGIB1 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIB1) -#define DTCE_MTU1_TGIB1 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIB1) -#define IER_MTU1_TGIB1 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIB1) -#define IPR_MTU1_TGIB1 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIB1) -#define IEN_MTU1_TGIB1 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIB1) -#define VECT_MTU1_TGIB1 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIB1) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIV1) -#define IR_MTU1_TCIV1 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIV1) -#define DTCE_MTU1_TCIV1 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIV1) -#define IER_MTU1_TCIV1 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIV1) -#define IPR_MTU1_TCIV1 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIV1) -#define IEN_MTU1_TCIV1 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIV1) -#define VECT_MTU1_TCIV1 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIV1) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIU1) -#define IR_MTU1_TCIU1 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIU1) -#define DTCE_MTU1_TCIU1 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIU1) -#define IER_MTU1_TCIU1 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIU1) -#define IPR_MTU1_TCIU1 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIU1) -#define IEN_MTU1_TCIU1 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIU1) -#define VECT_MTU1_TCIU1 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIU1) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIA2) -#define IR_MTU2_TGIA2 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIA2) -#define DTCE_MTU2_TGIA2 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIA2) -#define IER_MTU2_TGIA2 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIA2) -#define IPR_MTU2_TGIA2 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIA2) -#define IEN_MTU2_TGIA2 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIA2) -#define VECT_MTU2_TGIA2 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIA2) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIB2) -#define IR_MTU2_TGIB2 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIB2) -#define DTCE_MTU2_TGIB2 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIB2) -#define IER_MTU2_TGIB2 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIB2) -#define IPR_MTU2_TGIB2 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIB2) -#define IEN_MTU2_TGIB2 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIB2) -#define VECT_MTU2_TGIB2 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIB2) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIV2) -#define IR_MTU2_TCIV2 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIV2) -#define DTCE_MTU2_TCIV2 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIV2) -#define IER_MTU2_TCIV2 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIV2) -#define IPR_MTU2_TCIV2 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIV2) -#define IEN_MTU2_TCIV2 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIV2) -#define VECT_MTU2_TCIV2 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIV2) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIU2) -#define IR_MTU2_TCIU2 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIU2) -#define DTCE_MTU2_TCIU2 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIU2) -#define IER_MTU2_TCIU2 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIU2) -#define IPR_MTU2_TCIU2 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIU2) -#define IEN_MTU2_TCIU2 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIU2) -#define VECT_MTU2_TCIU2 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIU2) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIA3) -#define IR_MTU3_TGIA3 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIA3) -#define DTCE_MTU3_TGIA3 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIA3) -#define IER_MTU3_TGIA3 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIA3) -#define IPR_MTU3_TGIA3 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIA3) -#define IEN_MTU3_TGIA3 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIA3) -#define VECT_MTU3_TGIA3 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIA3) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIB3) -#define IR_MTU3_TGIB3 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIB3) -#define DTCE_MTU3_TGIB3 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIB3) -#define IER_MTU3_TGIB3 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIB3) -#define IPR_MTU3_TGIB3 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIB3) -#define IEN_MTU3_TGIB3 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIB3) -#define VECT_MTU3_TGIB3 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIB3) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIC3) -#define IR_MTU3_TGIC3 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIC3) -#define DTCE_MTU3_TGIC3 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIC3) -#define IER_MTU3_TGIC3 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIC3) -#define IPR_MTU3_TGIC3 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIC3) -#define IEN_MTU3_TGIC3 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIC3) -#define VECT_MTU3_TGIC3 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIC3) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGID3) -#define IR_MTU3_TGID3 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGID3) -#define DTCE_MTU3_TGID3 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGID3) -#define IER_MTU3_TGID3 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGID3) -#define IPR_MTU3_TGID3 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGID3) -#define IEN_MTU3_TGID3 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGID3) -#define VECT_MTU3_TGID3 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGID3) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TCIV3) -#define IR_MTU3_TCIV3 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TCIV3) -#define DTCE_MTU3_TCIV3 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TCIV3) -#define IER_MTU3_TCIV3 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU3_TCIV3) -#define IPR_MTU3_TCIV3 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TCIV3) -#define IEN_MTU3_TCIV3 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU3_TCIV3) -#define VECT_MTU3_TCIV3 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU3_TCIV3) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIA4) -#define IR_MTU4_TGIA4 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIA4) -#define DTCE_MTU4_TGIA4 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIA4) -#define IER_MTU4_TGIA4 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIA4) -#define IPR_MTU4_TGIA4 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIA4) -#define IEN_MTU4_TGIA4 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIA4) -#define VECT_MTU4_TGIA4 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIA4) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIB4) -#define IR_MTU4_TGIB4 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIB4) -#define DTCE_MTU4_TGIB4 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIB4) -#define IER_MTU4_TGIB4 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIB4) -#define IPR_MTU4_TGIB4 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIB4) -#define IEN_MTU4_TGIB4 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIB4) -#define VECT_MTU4_TGIB4 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIB4) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIC4) -#define IR_MTU4_TGIC4 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIC4) -#define DTCE_MTU4_TGIC4 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIC4) -#define IER_MTU4_TGIC4 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIC4) -#define IPR_MTU4_TGIC4 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIC4) -#define IEN_MTU4_TGIC4 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIC4) -#define VECT_MTU4_TGIC4 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIC4) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGID4) -#define IR_MTU4_TGID4 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGID4) -#define DTCE_MTU4_TGID4 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGID4) -#define IER_MTU4_TGID4 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGID4) -#define IPR_MTU4_TGID4 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGID4) -#define IEN_MTU4_TGID4 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGID4) -#define VECT_MTU4_TGID4 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGID4) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TCIV4) -#define IR_MTU4_TCIV4 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TCIV4) -#define DTCE_MTU4_TCIV4 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TCIV4) -#define IER_MTU4_TCIV4 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU4_TCIV4) -#define IPR_MTU4_TCIV4 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TCIV4) -#define IEN_MTU4_TCIV4 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU4_TCIV4) -#define VECT_MTU4_TCIV4 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU4_TCIV4) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIU5) -#define IR_MTU5_TGIU5 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIU5) -#define DTCE_MTU5_TGIU5 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIU5) -#define IER_MTU5_TGIU5 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIU5) -#define IPR_MTU5_TGIU5 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIU5) -#define IEN_MTU5_TGIU5 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIU5) -#define VECT_MTU5_TGIU5 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIU5) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIV5) -#define IR_MTU5_TGIV5 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIV5) -#define DTCE_MTU5_TGIV5 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIV5) -#define IER_MTU5_TGIV5 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIV5) -#define IPR_MTU5_TGIV5 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIV5) -#define IEN_MTU5_TGIV5 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIV5) -#define VECT_MTU5_TGIV5 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIV5) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIW5) -#define IR_MTU5_TGIW5 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIW5) -#define DTCE_MTU5_TGIW5 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIW5) -#define IER_MTU5_TGIW5 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIW5) -#define IPR_MTU5_TGIW5 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIW5) -#define IEN_MTU5_TGIW5 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIW5) -#define VECT_MTU5_TGIW5 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIW5) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIA6) -#define IR_MTU6_TGIA6 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIA6) -#define DTCE_MTU6_TGIA6 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIA6) -#define IER_MTU6_TGIA6 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIA6) -#define IPR_MTU6_TGIA6 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIA6) -#define IEN_MTU6_TGIA6 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIA6) -#define VECT_MTU6_TGIA6 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIA6) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIB6) -#define IR_MTU6_TGIB6 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIB6) -#define DTCE_MTU6_TGIB6 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIB6) -#define IER_MTU6_TGIB6 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIB6) -#define IPR_MTU6_TGIB6 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIB6) -#define IEN_MTU6_TGIB6 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIB6) -#define VECT_MTU6_TGIB6 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIB6) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIC6) -#define IR_MTU6_TGIC6 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIC6) -#define DTCE_MTU6_TGIC6 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIC6) -#define IER_MTU6_TGIC6 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIC6) -#define IPR_MTU6_TGIC6 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIC6) -#define IEN_MTU6_TGIC6 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIC6) -#define VECT_MTU6_TGIC6 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIC6) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGID6) -#define IR_MTU6_TGID6 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGID6) -#define DTCE_MTU6_TGID6 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGID6) -#define IER_MTU6_TGID6 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGID6) -#define IPR_MTU6_TGID6 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGID6) -#define IEN_MTU6_TGID6 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGID6) -#define VECT_MTU6_TGID6 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGID6) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TCIV6) -#define IR_MTU6_TCIV6 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TCIV6) -#define DTCE_MTU6_TCIV6 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TCIV6) -#define IER_MTU6_TCIV6 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU6_TCIV6) -#define IPR_MTU6_TCIV6 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TCIV6) -#define IEN_MTU6_TCIV6 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU6_TCIV6) -#define VECT_MTU6_TCIV6 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU6_TCIV6) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIA7) -#define IR_MTU7_TGIA7 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIA7) -#define DTCE_MTU7_TGIA7 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIA7) -#define IER_MTU7_TGIA7 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIA7) -#define IPR_MTU7_TGIA7 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIA7) -#define IEN_MTU7_TGIA7 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIA7) -#define VECT_MTU7_TGIA7 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIA7) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIB7) -#define IR_MTU7_TGIB7 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIB7) -#define DTCE_MTU7_TGIB7 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIB7) -#define IER_MTU7_TGIB7 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIB7) -#define IPR_MTU7_TGIB7 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIB7) -#define IEN_MTU7_TGIB7 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIB7) -#define VECT_MTU7_TGIB7 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIB7) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIC7) -#define IR_MTU7_TGIC7 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIC7) -#define DTCE_MTU7_TGIC7 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIC7) -#define IER_MTU7_TGIC7 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIC7) -#define IPR_MTU7_TGIC7 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIC7) -#define IEN_MTU7_TGIC7 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIC7) -#define VECT_MTU7_TGIC7 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIC7) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGID7) -#define IR_MTU7_TGID7 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGID7) -#define DTCE_MTU7_TGID7 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGID7) -#define IER_MTU7_TGID7 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGID7) -#define IPR_MTU7_TGID7 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGID7) -#define IEN_MTU7_TGID7 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGID7) -#define VECT_MTU7_TGID7 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGID7) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TCIV7) -#define IR_MTU7_TCIV7 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TCIV7) -#define DTCE_MTU7_TCIV7 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TCIV7) -#define IER_MTU7_TCIV7 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU7_TCIV7) -#define IPR_MTU7_TCIV7 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TCIV7) -#define IEN_MTU7_TCIV7 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU7_TCIV7) -#define VECT_MTU7_TCIV7 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU7_TCIV7) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIA8) -#define IR_MTU8_TGIA8 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIA8) -#define DTCE_MTU8_TGIA8 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIA8) -#define IER_MTU8_TGIA8 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIA8) -#define IPR_MTU8_TGIA8 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIA8) -#define IEN_MTU8_TGIA8 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIA8) -#define VECT_MTU8_TGIA8 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIA8) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIB8) -#define IR_MTU8_TGIB8 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIB8) -#define DTCE_MTU8_TGIB8 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIB8) -#define IER_MTU8_TGIB8 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIB8) -#define IPR_MTU8_TGIB8 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIB8) -#define IEN_MTU8_TGIB8 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIB8) -#define VECT_MTU8_TGIB8 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIB8) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIC8) -#define IR_MTU8_TGIC8 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIC8) -#define DTCE_MTU8_TGIC8 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIC8) -#define IER_MTU8_TGIC8 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIC8) -#define IPR_MTU8_TGIC8 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIC8) -#define IEN_MTU8_TGIC8 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIC8) -#define VECT_MTU8_TGIC8 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIC8) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGID8) -#define IR_MTU8_TGID8 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGID8) -#define DTCE_MTU8_TGID8 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGID8) -#define IER_MTU8_TGID8 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGID8) -#define IPR_MTU8_TGID8 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGID8) -#define IEN_MTU8_TGID8 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGID8) -#define VECT_MTU8_TGID8 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGID8) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TCIV8) -#define IR_MTU8_TCIV8 BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TCIV8) -#define DTCE_MTU8_TCIV8 BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TCIV8) -#define IER_MTU8_TCIV8 BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_MTU8_TCIV8) -#define IPR_MTU8_TCIV8 BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TCIV8) -#define IEN_MTU8_TCIV8 BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_MTU8_TCIV8) -#define VECT_MTU8_TCIV8 BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_MTU8_TCIV8) -#endif - -#if !defined(BSP_MCU_RX65N_2MB) /* In the case of 512K, 768K or 1Mbyte ROM capacity. */ - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_AES_AESRDY) -#define IR_AES_AESRDY BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_AES_AESRDY) -#define DTCE_AES_AESRDY BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_AES_AESRDY) -#define IER_AES_AESRDY BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_AES_AESRDY) -#define IPR_AES_AESRDY BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_AES_AESRDY) -#define IEN_AES_AESRDY BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_AES_AESRDY) -#define VECT_AES_AESRDY BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_AES_AESRDY) -#endif - -#if BSP_PRV_VALID_MAP_INT(A, BSP_MAPPED_INT_CFG_A_VECT_AES_AESEND) -#define IR_AES_AESEND BSP_PRV_IR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_AES_AESEND) -#define DTCE_AES_AESEND BSP_PRV_DTCE(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_AES_AESEND) -#define IER_AES_AESEND BSP_PRIV_CALC_IER_REG(BSP_MAPPED_INT_CFG_A_VECT_AES_AESEND) -#define IPR_AES_AESEND BSP_PRV_IPR(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_AES_AESEND) -#define IEN_AES_AESEND BSP_PRV_IEN(BSP_MAPPED_INT_CFG_A_VECT_AES_AESEND) -#define VECT_AES_AESEND BSP_PRV_VECT(BSP_PRV_A, BSP_MAPPED_INT_CFG_A_VECT_AES_AESEND) -#endif - -#endif - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global variables -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global functions (to be accessed by other files) -***********************************************************************************************************************/ -void bsp_mapped_interrupt_open(void); //r_bsp internal function. DO NOT CALL. - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_mapped_interrupts_private.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_mapped_interrupts_private.h deleted file mode 100644 index daa56c1ad9c..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_mapped_interrupts_private.h +++ /dev/null @@ -1,354 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : mcu_mapped_interrupts_private.h -* Description : This module contains macros used for mapping interrupts. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* These macros are calculated values for x % 8. These macros are used when preprocessor arithmetic cannot be used. - * For example, 'IEN0'-'IEN7' needs to be defined for a macro based on 'vector_number % 8' but preprocessor arithmetic - * is only evaluated at compile-time when it is used in a preprocessor conditional. For this reason the calculated - * value of 'vector_number % 8' must be calculated before compile-time. - */ -#define BSP_PRV_CALC_128_MOD_8 0 -#define BSP_PRV_CALC_129_MOD_8 1 -#define BSP_PRV_CALC_130_MOD_8 2 -#define BSP_PRV_CALC_131_MOD_8 3 -#define BSP_PRV_CALC_132_MOD_8 4 -#define BSP_PRV_CALC_133_MOD_8 5 -#define BSP_PRV_CALC_134_MOD_8 6 -#define BSP_PRV_CALC_135_MOD_8 7 -#define BSP_PRV_CALC_136_MOD_8 0 -#define BSP_PRV_CALC_137_MOD_8 1 -#define BSP_PRV_CALC_138_MOD_8 2 -#define BSP_PRV_CALC_139_MOD_8 3 -#define BSP_PRV_CALC_140_MOD_8 4 -#define BSP_PRV_CALC_141_MOD_8 5 -#define BSP_PRV_CALC_142_MOD_8 6 -#define BSP_PRV_CALC_143_MOD_8 7 -#define BSP_PRV_CALC_144_MOD_8 0 -#define BSP_PRV_CALC_145_MOD_8 1 -#define BSP_PRV_CALC_146_MOD_8 2 -#define BSP_PRV_CALC_147_MOD_8 3 -#define BSP_PRV_CALC_148_MOD_8 4 -#define BSP_PRV_CALC_149_MOD_8 5 -#define BSP_PRV_CALC_150_MOD_8 6 -#define BSP_PRV_CALC_151_MOD_8 7 -#define BSP_PRV_CALC_152_MOD_8 0 -#define BSP_PRV_CALC_153_MOD_8 1 -#define BSP_PRV_CALC_154_MOD_8 2 -#define BSP_PRV_CALC_155_MOD_8 3 -#define BSP_PRV_CALC_156_MOD_8 4 -#define BSP_PRV_CALC_157_MOD_8 5 -#define BSP_PRV_CALC_158_MOD_8 6 -#define BSP_PRV_CALC_159_MOD_8 7 -#define BSP_PRV_CALC_160_MOD_8 0 -#define BSP_PRV_CALC_161_MOD_8 1 -#define BSP_PRV_CALC_162_MOD_8 2 -#define BSP_PRV_CALC_163_MOD_8 3 -#define BSP_PRV_CALC_164_MOD_8 4 -#define BSP_PRV_CALC_165_MOD_8 5 -#define BSP_PRV_CALC_166_MOD_8 6 -#define BSP_PRV_CALC_167_MOD_8 7 -#define BSP_PRV_CALC_168_MOD_8 0 -#define BSP_PRV_CALC_169_MOD_8 1 -#define BSP_PRV_CALC_170_MOD_8 2 -#define BSP_PRV_CALC_171_MOD_8 3 -#define BSP_PRV_CALC_172_MOD_8 4 -#define BSP_PRV_CALC_173_MOD_8 5 -#define BSP_PRV_CALC_174_MOD_8 6 -#define BSP_PRV_CALC_175_MOD_8 7 -#define BSP_PRV_CALC_176_MOD_8 0 -#define BSP_PRV_CALC_177_MOD_8 1 -#define BSP_PRV_CALC_178_MOD_8 2 -#define BSP_PRV_CALC_179_MOD_8 3 -#define BSP_PRV_CALC_180_MOD_8 4 -#define BSP_PRV_CALC_181_MOD_8 5 -#define BSP_PRV_CALC_182_MOD_8 6 -#define BSP_PRV_CALC_183_MOD_8 7 -#define BSP_PRV_CALC_184_MOD_8 0 -#define BSP_PRV_CALC_185_MOD_8 1 -#define BSP_PRV_CALC_186_MOD_8 2 -#define BSP_PRV_CALC_187_MOD_8 3 -#define BSP_PRV_CALC_188_MOD_8 4 -#define BSP_PRV_CALC_189_MOD_8 5 -#define BSP_PRV_CALC_190_MOD_8 6 -#define BSP_PRV_CALC_191_MOD_8 7 -#define BSP_PRV_CALC_192_MOD_8 0 -#define BSP_PRV_CALC_193_MOD_8 1 -#define BSP_PRV_CALC_194_MOD_8 2 -#define BSP_PRV_CALC_195_MOD_8 3 -#define BSP_PRV_CALC_196_MOD_8 4 -#define BSP_PRV_CALC_197_MOD_8 5 -#define BSP_PRV_CALC_198_MOD_8 6 -#define BSP_PRV_CALC_199_MOD_8 7 -#define BSP_PRV_CALC_200_MOD_8 0 -#define BSP_PRV_CALC_201_MOD_8 1 -#define BSP_PRV_CALC_202_MOD_8 2 -#define BSP_PRV_CALC_203_MOD_8 3 -#define BSP_PRV_CALC_204_MOD_8 4 -#define BSP_PRV_CALC_205_MOD_8 5 -#define BSP_PRV_CALC_206_MOD_8 6 -#define BSP_PRV_CALC_207_MOD_8 7 -#define BSP_PRV_CALC_208_MOD_8 0 -#define BSP_PRV_CALC_209_MOD_8 1 -#define BSP_PRV_CALC_210_MOD_8 2 -#define BSP_PRV_CALC_211_MOD_8 3 -#define BSP_PRV_CALC_212_MOD_8 4 -#define BSP_PRV_CALC_213_MOD_8 5 -#define BSP_PRV_CALC_214_MOD_8 6 -#define BSP_PRV_CALC_215_MOD_8 7 -#define BSP_PRV_CALC_216_MOD_8 0 -#define BSP_PRV_CALC_217_MOD_8 1 -#define BSP_PRV_CALC_218_MOD_8 2 -#define BSP_PRV_CALC_219_MOD_8 3 -#define BSP_PRV_CALC_220_MOD_8 4 -#define BSP_PRV_CALC_221_MOD_8 5 -#define BSP_PRV_CALC_222_MOD_8 6 -#define BSP_PRV_CALC_223_MOD_8 7 -#define BSP_PRV_CALC_224_MOD_8 0 -#define BSP_PRV_CALC_225_MOD_8 1 -#define BSP_PRV_CALC_226_MOD_8 2 -#define BSP_PRV_CALC_227_MOD_8 3 -#define BSP_PRV_CALC_228_MOD_8 4 -#define BSP_PRV_CALC_229_MOD_8 5 -#define BSP_PRV_CALC_230_MOD_8 6 -#define BSP_PRV_CALC_231_MOD_8 7 -#define BSP_PRV_CALC_232_MOD_8 0 -#define BSP_PRV_CALC_233_MOD_8 1 -#define BSP_PRV_CALC_234_MOD_8 2 -#define BSP_PRV_CALC_235_MOD_8 3 -#define BSP_PRV_CALC_236_MOD_8 4 -#define BSP_PRV_CALC_237_MOD_8 5 -#define BSP_PRV_CALC_238_MOD_8 6 -#define BSP_PRV_CALC_239_MOD_8 7 -#define BSP_PRV_CALC_240_MOD_8 0 -#define BSP_PRV_CALC_241_MOD_8 1 -#define BSP_PRV_CALC_242_MOD_8 2 -#define BSP_PRV_CALC_243_MOD_8 3 -#define BSP_PRV_CALC_244_MOD_8 4 -#define BSP_PRV_CALC_245_MOD_8 5 -#define BSP_PRV_CALC_246_MOD_8 6 -#define BSP_PRV_CALC_247_MOD_8 7 -#define BSP_PRV_CALC_248_MOD_8 0 -#define BSP_PRV_CALC_249_MOD_8 1 -#define BSP_PRV_CALC_250_MOD_8 2 -#define BSP_PRV_CALC_251_MOD_8 3 -#define BSP_PRV_CALC_252_MOD_8 4 -#define BSP_PRV_CALC_253_MOD_8 5 -#define BSP_PRV_CALC_254_MOD_8 6 -#define BSP_PRV_CALC_255_MOD_8 7 - -/* These macros are used to determine if the SLIBXRn or SLIBRn select register should be written to. */ -#define BSP_PRV_INT_B_SELECT_128 ICU.SLIBXR128.BYTE -#define BSP_PRV_INT_B_SELECT_129 ICU.SLIBXR129.BYTE -#define BSP_PRV_INT_B_SELECT_130 ICU.SLIBXR130.BYTE -#define BSP_PRV_INT_B_SELECT_131 ICU.SLIBXR131.BYTE -#define BSP_PRV_INT_B_SELECT_132 ICU.SLIBXR132.BYTE -#define BSP_PRV_INT_B_SELECT_133 ICU.SLIBXR133.BYTE -#define BSP_PRV_INT_B_SELECT_134 ICU.SLIBXR134.BYTE -#define BSP_PRV_INT_B_SELECT_135 ICU.SLIBXR135.BYTE -#define BSP_PRV_INT_B_SELECT_136 ICU.SLIBXR136.BYTE -#define BSP_PRV_INT_B_SELECT_137 ICU.SLIBXR137.BYTE -#define BSP_PRV_INT_B_SELECT_138 ICU.SLIBXR138.BYTE -#define BSP_PRV_INT_B_SELECT_139 ICU.SLIBXR139.BYTE -#define BSP_PRV_INT_B_SELECT_140 ICU.SLIBXR140.BYTE -#define BSP_PRV_INT_B_SELECT_141 ICU.SLIBXR141.BYTE -#define BSP_PRV_INT_B_SELECT_142 ICU.SLIBXR142.BYTE -#define BSP_PRV_INT_B_SELECT_143 ICU.SLIBXR143.BYTE -#define BSP_PRV_INT_B_SELECT_144 ICU.SLIBR144.BYTE -#define BSP_PRV_INT_B_SELECT_145 ICU.SLIBR145.BYTE -#define BSP_PRV_INT_B_SELECT_146 ICU.SLIBR146.BYTE -#define BSP_PRV_INT_B_SELECT_147 ICU.SLIBR147.BYTE -#define BSP_PRV_INT_B_SELECT_148 ICU.SLIBR148.BYTE -#define BSP_PRV_INT_B_SELECT_149 ICU.SLIBR149.BYTE -#define BSP_PRV_INT_B_SELECT_150 ICU.SLIBR150.BYTE -#define BSP_PRV_INT_B_SELECT_151 ICU.SLIBR151.BYTE -#define BSP_PRV_INT_B_SELECT_152 ICU.SLIBR152.BYTE -#define BSP_PRV_INT_B_SELECT_153 ICU.SLIBR153.BYTE -#define BSP_PRV_INT_B_SELECT_154 ICU.SLIBR154.BYTE -#define BSP_PRV_INT_B_SELECT_155 ICU.SLIBR155.BYTE -#define BSP_PRV_INT_B_SELECT_156 ICU.SLIBR156.BYTE -#define BSP_PRV_INT_B_SELECT_157 ICU.SLIBR157.BYTE -#define BSP_PRV_INT_B_SELECT_158 ICU.SLIBR158.BYTE -#define BSP_PRV_INT_B_SELECT_159 ICU.SLIBR159.BYTE -#define BSP_PRV_INT_B_SELECT_160 ICU.SLIBR160.BYTE -#define BSP_PRV_INT_B_SELECT_161 ICU.SLIBR161.BYTE -#define BSP_PRV_INT_B_SELECT_162 ICU.SLIBR162.BYTE -#define BSP_PRV_INT_B_SELECT_163 ICU.SLIBR163.BYTE -#define BSP_PRV_INT_B_SELECT_164 ICU.SLIBR164.BYTE -#define BSP_PRV_INT_B_SELECT_165 ICU.SLIBR165.BYTE -#define BSP_PRV_INT_B_SELECT_166 ICU.SLIBR166.BYTE -#define BSP_PRV_INT_B_SELECT_167 ICU.SLIBR167.BYTE -#define BSP_PRV_INT_B_SELECT_168 ICU.SLIBR168.BYTE -#define BSP_PRV_INT_B_SELECT_169 ICU.SLIBR169.BYTE -#define BSP_PRV_INT_B_SELECT_170 ICU.SLIBR170.BYTE -#define BSP_PRV_INT_B_SELECT_171 ICU.SLIBR171.BYTE -#define BSP_PRV_INT_B_SELECT_172 ICU.SLIBR172.BYTE -#define BSP_PRV_INT_B_SELECT_173 ICU.SLIBR173.BYTE -#define BSP_PRV_INT_B_SELECT_174 ICU.SLIBR174.BYTE -#define BSP_PRV_INT_B_SELECT_175 ICU.SLIBR175.BYTE -#define BSP_PRV_INT_B_SELECT_176 ICU.SLIBR176.BYTE -#define BSP_PRV_INT_B_SELECT_177 ICU.SLIBR177.BYTE -#define BSP_PRV_INT_B_SELECT_178 ICU.SLIBR178.BYTE -#define BSP_PRV_INT_B_SELECT_179 ICU.SLIBR179.BYTE -#define BSP_PRV_INT_B_SELECT_180 ICU.SLIBR180.BYTE -#define BSP_PRV_INT_B_SELECT_181 ICU.SLIBR181.BYTE -#define BSP_PRV_INT_B_SELECT_182 ICU.SLIBR182.BYTE -#define BSP_PRV_INT_B_SELECT_183 ICU.SLIBR183.BYTE -#define BSP_PRV_INT_B_SELECT_184 ICU.SLIBR184.BYTE -#define BSP_PRV_INT_B_SELECT_185 ICU.SLIBR185.BYTE -#define BSP_PRV_INT_B_SELECT_186 ICU.SLIBR186.BYTE -#define BSP_PRV_INT_B_SELECT_187 ICU.SLIBR187.BYTE -#define BSP_PRV_INT_B_SELECT_188 ICU.SLIBR188.BYTE -#define BSP_PRV_INT_B_SELECT_189 ICU.SLIBR189.BYTE -#define BSP_PRV_INT_B_SELECT_190 ICU.SLIBR190.BYTE -#define BSP_PRV_INT_B_SELECT_191 ICU.SLIBR191.BYTE -#define BSP_PRV_INT_B_SELECT_192 ICU.SLIBR192.BYTE -#define BSP_PRV_INT_B_SELECT_193 ICU.SLIBR193.BYTE -#define BSP_PRV_INT_B_SELECT_194 ICU.SLIBR194.BYTE -#define BSP_PRV_INT_B_SELECT_195 ICU.SLIBR195.BYTE -#define BSP_PRV_INT_B_SELECT_196 ICU.SLIBR196.BYTE -#define BSP_PRV_INT_B_SELECT_197 ICU.SLIBR197.BYTE -#define BSP_PRV_INT_B_SELECT_198 ICU.SLIBR198.BYTE -#define BSP_PRV_INT_B_SELECT_199 ICU.SLIBR199.BYTE -#define BSP_PRV_INT_B_SELECT_200 ICU.SLIBR200.BYTE -#define BSP_PRV_INT_B_SELECT_201 ICU.SLIBR201.BYTE -#define BSP_PRV_INT_B_SELECT_202 ICU.SLIBR202.BYTE -#define BSP_PRV_INT_B_SELECT_203 ICU.SLIBR203.BYTE -#define BSP_PRV_INT_B_SELECT_204 ICU.SLIBR204.BYTE -#define BSP_PRV_INT_B_SELECT_205 ICU.SLIBR205.BYTE -#define BSP_PRV_INT_B_SELECT_206 ICU.SLIBR206.BYTE -#define BSP_PRV_INT_B_SELECT_207 ICU.SLIBR207.BYTE -/* Interrupt A interrupts are also defined even though there is only 1 select register. */ -#define BSP_PRV_INT_A_SELECT_208 ICU.SLIAR208.BYTE -#define BSP_PRV_INT_A_SELECT_209 ICU.SLIAR209.BYTE -#define BSP_PRV_INT_A_SELECT_210 ICU.SLIAR210.BYTE -#define BSP_PRV_INT_A_SELECT_211 ICU.SLIAR211.BYTE -#define BSP_PRV_INT_A_SELECT_212 ICU.SLIAR212.BYTE -#define BSP_PRV_INT_A_SELECT_213 ICU.SLIAR213.BYTE -#define BSP_PRV_INT_A_SELECT_214 ICU.SLIAR214.BYTE -#define BSP_PRV_INT_A_SELECT_215 ICU.SLIAR215.BYTE -#define BSP_PRV_INT_A_SELECT_216 ICU.SLIAR216.BYTE -#define BSP_PRV_INT_A_SELECT_217 ICU.SLIAR217.BYTE -#define BSP_PRV_INT_A_SELECT_218 ICU.SLIAR218.BYTE -#define BSP_PRV_INT_A_SELECT_219 ICU.SLIAR219.BYTE -#define BSP_PRV_INT_A_SELECT_220 ICU.SLIAR220.BYTE -#define BSP_PRV_INT_A_SELECT_221 ICU.SLIAR221.BYTE -#define BSP_PRV_INT_A_SELECT_222 ICU.SLIAR222.BYTE -#define BSP_PRV_INT_A_SELECT_223 ICU.SLIAR223.BYTE -#define BSP_PRV_INT_A_SELECT_224 ICU.SLIAR224.BYTE -#define BSP_PRV_INT_A_SELECT_225 ICU.SLIAR225.BYTE -#define BSP_PRV_INT_A_SELECT_226 ICU.SLIAR226.BYTE -#define BSP_PRV_INT_A_SELECT_227 ICU.SLIAR227.BYTE -#define BSP_PRV_INT_A_SELECT_228 ICU.SLIAR228.BYTE -#define BSP_PRV_INT_A_SELECT_229 ICU.SLIAR229.BYTE -#define BSP_PRV_INT_A_SELECT_230 ICU.SLIAR230.BYTE -#define BSP_PRV_INT_A_SELECT_231 ICU.SLIAR231.BYTE -#define BSP_PRV_INT_A_SELECT_232 ICU.SLIAR232.BYTE -#define BSP_PRV_INT_A_SELECT_233 ICU.SLIAR233.BYTE -#define BSP_PRV_INT_A_SELECT_234 ICU.SLIAR234.BYTE -#define BSP_PRV_INT_A_SELECT_235 ICU.SLIAR235.BYTE -#define BSP_PRV_INT_A_SELECT_236 ICU.SLIAR236.BYTE -#define BSP_PRV_INT_A_SELECT_237 ICU.SLIAR237.BYTE -#define BSP_PRV_INT_A_SELECT_238 ICU.SLIAR238.BYTE -#define BSP_PRV_INT_A_SELECT_239 ICU.SLIAR239.BYTE -#define BSP_PRV_INT_A_SELECT_240 ICU.SLIAR240.BYTE -#define BSP_PRV_INT_A_SELECT_241 ICU.SLIAR241.BYTE -#define BSP_PRV_INT_A_SELECT_242 ICU.SLIAR242.BYTE -#define BSP_PRV_INT_A_SELECT_243 ICU.SLIAR243.BYTE -#define BSP_PRV_INT_A_SELECT_244 ICU.SLIAR244.BYTE -#define BSP_PRV_INT_A_SELECT_245 ICU.SLIAR245.BYTE -#define BSP_PRV_INT_A_SELECT_246 ICU.SLIAR246.BYTE -#define BSP_PRV_INT_A_SELECT_247 ICU.SLIAR247.BYTE -#define BSP_PRV_INT_A_SELECT_248 ICU.SLIAR248.BYTE -#define BSP_PRV_INT_A_SELECT_249 ICU.SLIAR249.BYTE -#define BSP_PRV_INT_A_SELECT_250 ICU.SLIAR250.BYTE -#define BSP_PRV_INT_A_SELECT_251 ICU.SLIAR251.BYTE -#define BSP_PRV_INT_A_SELECT_252 ICU.SLIAR252.BYTE -#define BSP_PRV_INT_A_SELECT_253 ICU.SLIAR253.BYTE -#define BSP_PRV_INT_A_SELECT_254 ICU.SLIAR254.BYTE -#define BSP_PRV_INT_A_SELECT_255 ICU.SLIAR255.BYTE - -/* Start and end of Interrupt B and A vectors. */ -#define BSP_PRV_B_INT_VECTOR_START (128) -#define BSP_PRV_B_INT_VECTOR_END (207) -#define BSP_PRV_A_INT_VECTOR_START (208) -#define BSP_PRV_A_INT_VECTOR_END (255) - -/* Start and end of Interrupt B select registers. */ -#define BSP_PRV_SLIBXR_START (128) -#define BSP_PRV_SLIBXR_END (143) -#define BSP_PRV_SLIBR_START (144) -#define BSP_PRV_SLIBR_END (207) - -/* Starting IER register for mapped interrupts. This is used for calculating the IER register based on the - * given vector number. - */ -#define BSP_PRV_MAP_INT_IER_START (0x10) - -/* These are used in function-like macros to expand to letters. */ -#define BSP_PRV_A A -#define BSP_PRV_B B - -/* Test to see if chosen vector is valid for a mapped interrupt. */ -#define BSP_PRV_VALID_MAP_INT(x, y) (((y + 0) >= BSP_PRV_ ## x ## _INT_VECTOR_START) && \ - ((y + 0) <= BSP_PRV_ ## x ## _INT_VECTOR_END)) - -/* Calculation for getting IER register. */ -#define BSP_PRIV_CALC_IER_REG(x) (((x - BSP_PRV_B_INT_VECTOR_START)/8) + BSP_PRV_MAP_INT_IER_START) - -/* These macros generate the macros needed to use the function-like macros from iodefine.h */ -#define BSP_PRV_IR(x, y) _BSP_PRV_IR(x, y) -#define _BSP_PRV_IR(x, y) IR_PERI ## x ## _INT ## x ## y -#define BSP_PRV_DTCE(x, y) _BSP_PRV_DTCE(x, y) -#define _BSP_PRV_DTCE(x, y) DTCE_PERI ## x ## _INT ## x ## y -#define BSP_PRV_IPR(x, y) _BSP_PRV_IPR(x, y) -#define _BSP_PRV_IPR(x, y) IPR_PERI ## x ## _INT ## x ## y -#define BSP_PRV_VECT(x, y) _BSP_PRV_VECT(x, y) -#define _BSP_PRV_VECT(x, y) VECT_PERI ## x ## _INT ## x ## y - -#define BSP_PRV_IEN(x) _BSP_PRV_IEN(x) -#define _BSP_PRV_IEN(x) __BSP_PRV_IEN(BSP_PRV_CALC_ ## x ## _MOD_8) -#define __BSP_PRV_IEN(x) ___BSP_PRV_IEN(x) -#define ___BSP_PRV_IEN(x) IEN ## x - -/* Chooses the correct interrupt select register. */ -#define BSP_PRV_INT_SELECT(x, y) _BSP_PRV_INT_SELECT(x, y) -#define _BSP_PRV_INT_SELECT(x, y) BSP_PRV_INT_ ## x ## _SELECT_ ## y - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global variables -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global functions (to be accessed by other files) -***********************************************************************************************************************/ - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_startup.c b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_startup.c deleted file mode 100644 index 41617068008..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_startup.c +++ /dev/null @@ -1,81 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : mcu_startup.c -* Description : This module implements user startup specific functions. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 31.01.2017 1.00_ES First Release -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -/* Platform support. */ -#include "platform.h" - -/* When using the user startup program, disable the following code. */ -#if (BSP_CFG_STARTUP_DISABLE != 0) - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Error checking -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global variables (to be accessed by other files) -***********************************************************************************************************************/ -extern void bsp_interrupt_open(void); -extern void bsp_register_protect_open(void); -extern void hardware_setup(void); - -/*********************************************************************************************************************** -Private global variables and functions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -* Function Name: R_BSP_StartupOpen -* Description : The R_BSP_StartupOpen function initializes interrupt callbacks, register protection, and hardware -* and pins. These processes are necessary to use the BSP and the Peripheral FIT module. -* Therefore, when BSP startup module is disabled, the R_BSP_StartupOpen function call executed -* at the beginning of the user's main function. -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -void R_BSP_StartupOpen (void) -{ - /* Initialize MCU interrupt callbacks. */ - bsp_interrupt_open(); - - /* Initialize register protection functionality. */ - bsp_register_protect_open(); - - /* Configure the MCU and board hardware */ - hardware_setup(); -} - -#endif /* BSP_CFG_STARTUP_DISABLE != 0 */ diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_startup.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_startup.h deleted file mode 100644 index a9fd40c0972..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/mcu_startup.h +++ /dev/null @@ -1,49 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : mcu_startup.h -* Description : This module implements user startup specific functions. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 31.01.2017 1.00_ES First Release -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* Multiple inclusion prevention macro */ -#ifndef MCU_STARTUP_H -#define MCU_STARTUP_H - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global variables -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global functions (to be accessed by other files) -***********************************************************************************************************************/ -void R_BSP_StartupOpen(void); - -/* End of multiple inclusion prevention macro */ -#endif diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/register_access/iodefine.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/register_access/iodefine.h deleted file mode 100644 index fc53737d6c2..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/mcu/rx65n/register_access/iodefine.h +++ /dev/null @@ -1,17630 +0,0 @@ -/* Adapted to IAR Embedded Workbench */ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/******************************************************************************* -* -* Device : RX/RX600/RX651 -* -* File Name : iodefine.h -* -* Abstract : Definition of I/O Register. -* -* History : V0.5B (2015-11-25) [Hardware Manual Revision : 0.50] -* : V0.5C (2015-12-04) [Hardware Manual Revision : 0.50] -* : V0.5D (2015-12-29) [Hardware Manual Revision : 0.50] -* : V0.8 (2016-04-19) [Hardware Manual Revision : 0.80] -* : V0.8A (2016-06-03) [Hardware Manual Revision : 0.80] -* : V0.8B (2016-06-16) [Hardware Manual Revision : 0.80] -* : V1.0 (2016-06-20) [Hardware Manual Revision : 1.00] -* : V1.0A (2016-08-03) [Hardware Manual Revision : 1.00] -* : V1.5 (2016-11-07) [Hardware Manual Revision : 1.00] -* : V1.5A (2016-12-15) [Hardware Manual Revision : 1.00] -* -* NOTE : THIS IS A TYPICAL EXAMPLE. -* -* Copyright(c) 2016 Renesas Electronics Corporation. -* -*********************************************************************************/ -/********************************************************************************/ -/* */ -/* DESCRIPTION : Definition of ICU Register */ -/* CPU TYPE : RX651 */ -/* */ -/* Usage : IR,DTCER,IER,IPR of ICU Register */ -/* The following IR, DTCE, IEN, IPR macro functions simplify usage. */ -/* The bit access operation is "Bit_Name(interrupt source,name)". */ -/* A part of the name can be omitted. */ -/* for example : */ -/* IR(BSC,BUSERR) = 0; expands to : */ -/* ICU.IR[16].BIT.IR = 0; */ -/* */ -/* DTCE(ICU,IRQ0) = 1; expands to : */ -/* ICU.DTCER[64].BIT.DTCE = 1; */ -/* */ -/* IEN(CMT0,CMI0) = 1; expands to : */ -/* ICU.IER[0x03].BIT.IEN4 = 1; */ -/* */ -/* IPR(ICU,SWINT2) = 2; expands to : */ -/* IPR(ICU,SWI ) = 2; // SWINT2,SWINT share IPR level. */ -/* ICU.IPR[3].BIT.IPR = 2; */ -/* */ -/* Usage : #pragma interrupt Function_Identifier(vect=**) */ -/* The number of vector is "(interrupt source, name)". */ -/* for example : */ -/* #pragma interrupt INT_IRQ0(vect=VECT(ICU,IRQ0)) expands to : */ -/* #pragma interrupt INT_IRQ0(vect=64) */ -/* #pragma interrupt INT_CMT0_CMI0(vect=VECT(CMT0,CMI0)) expands to : */ -/* #pragma interrupt INT_CMT0_CMI0(vect=28) */ -/* */ -/* Usage : MSTPCRA,MSTPCRB,MSTPCRC of SYSTEM Register */ -/* The bit access operation is "MSTP(name)". */ -/* The name that can be used is a macro name defined with "iodefine.h". */ -/* for example : */ -/* MSTP(TMR2) = 0; // TMR2,TMR3,TMR23 expands to : */ -/* SYSTEM.MSTPCRA.BIT.MSTPA4 = 0; */ -/* MSTP(SCI0) = 0; // SCI0,SMCI0 expands to : */ -/* SYSTEM.MSTPCRB.BIT.MSTPB31 = 0; */ -/* MSTP(MTU4) = 0; // MTU,MTU0,MTU1,MTU2,MTU3,MTU4,... expands to : */ -/* SYSTEM.MSTPCRA.BIT.MSTPA9 = 0; */ -/* MSTP(TPU4) = 0; // TPU0,TPU1,TPU2,TPU3,TPU4,TPU5,TPUA expands to : */ -/* SYSTEM.MSTPCRA.BIT.MSTPA13 = 0; */ -/* MSTP(CMT3) = 0; // CMT2,CMT3 expands to : */ -/* SYSTEM.MSTPCRA.BIT.MSTPA14 = 0; */ -/* */ -/* */ -/********************************************************************************/ -#ifndef __RX651IODEFINE_HEADER__ -#define __RX651IODEFINE_HEADER__ - -#define IEN_BSC_BUSERR IEN0 -#define IEN_RAM_RAMERR IEN2 -#define IEN_FCU_FIFERR IEN5 -#define IEN_FCU_FRDYI IEN7 -#define IEN_ICU_SWINT2 IEN2 -#define IEN_ICU_SWINT IEN3 -#define IEN_CMT0_CMI0 IEN4 -#define IEN_CMT1_CMI1 IEN5 -#define IEN_CMTW0_CMWI0 IEN6 -#define IEN_CMTW1_CMWI1 IEN7 -#define IEN_USB0_D0FIFO0 IEN2 -#define IEN_USB0_D1FIFO0 IEN3 -#define IEN_RSPI0_SPRI0 IEN6 -#define IEN_RSPI0_SPTI0 IEN7 -#define IEN_RSPI1_SPRI1 IEN0 -#define IEN_RSPI1_SPTI1 IEN1 -#define IEN_QSPI_SPRI IEN2 -#define IEN_QSPI_SPTI IEN3 -#define IEN_SDHI_SBFAI IEN4 -#define IEN_MMCIF_MBFAI IEN5 -#define IEN_RIIC1_RXI1 IEN2 -#define IEN_RIIC1_TXI1 IEN3 -#define IEN_RIIC0_RXI0 IEN4 -#define IEN_RIIC0_TXI0 IEN5 -#define IEN_RIIC2_RXI2 IEN6 -#define IEN_RIIC2_TXI2 IEN7 -#define IEN_SCI0_RXI0 IEN2 -#define IEN_SCI0_TXI0 IEN3 -#define IEN_SCI1_RXI1 IEN4 -#define IEN_SCI1_TXI1 IEN5 -#define IEN_SCI2_RXI2 IEN6 -#define IEN_SCI2_TXI2 IEN7 -#define IEN_ICU_IRQ0 IEN0 -#define IEN_ICU_IRQ1 IEN1 -#define IEN_ICU_IRQ2 IEN2 -#define IEN_ICU_IRQ3 IEN3 -#define IEN_ICU_IRQ4 IEN4 -#define IEN_ICU_IRQ5 IEN5 -#define IEN_ICU_IRQ6 IEN6 -#define IEN_ICU_IRQ7 IEN7 -#define IEN_ICU_IRQ8 IEN0 -#define IEN_ICU_IRQ9 IEN1 -#define IEN_ICU_IRQ10 IEN2 -#define IEN_ICU_IRQ11 IEN3 -#define IEN_ICU_IRQ12 IEN4 -#define IEN_ICU_IRQ13 IEN5 -#define IEN_ICU_IRQ14 IEN6 -#define IEN_ICU_IRQ15 IEN7 -#define IEN_SCI3_RXI3 IEN0 -#define IEN_SCI3_TXI3 IEN1 -#define IEN_SCI4_RXI4 IEN2 -#define IEN_SCI4_TXI4 IEN3 -#define IEN_SCI5_RXI5 IEN4 -#define IEN_SCI5_TXI5 IEN5 -#define IEN_SCI6_RXI6 IEN6 -#define IEN_SCI6_TXI6 IEN7 -#define IEN_LVD1_LVD1 IEN0 -#define IEN_LVD2_LVD2 IEN1 -#define IEN_USB0_USBR0 IEN2 -#define IEN_RTC_ALM IEN4 -#define IEN_RTC_PRD IEN5 -#define IEN_IWDT_IWUNI IEN7 -#define IEN_WDT_WUNI IEN0 -#define IEN_PDC_PCDFI IEN1 -#define IEN_SCI7_RXI7 IEN2 -#define IEN_SCI7_TXI7 IEN3 -#define IEN_SCI8_RXI8 IEN4 -#define IEN_SCI8_TXI8 IEN5 -#define IEN_SCI9_RXI9 IEN6 -#define IEN_SCI9_TXI9 IEN7 -#define IEN_SCI10_RXI10 IEN0 -#define IEN_SCI10_TXI10 IEN1 -#define IEN_ICU_GROUPBE0 IEN2 -#define IEN_ICU_GROUPBL2 IEN3 -#define IEN_RSPI2_SPRI2 IEN4 -#define IEN_RSPI2_SPTI2 IEN5 -#define IEN_ICU_GROUPBL0 IEN6 -#define IEN_ICU_GROUPBL1 IEN7 -#define IEN_ICU_GROUPAL0 IEN0 -#define IEN_ICU_GROUPAL1 IEN1 -#define IEN_SCI11_RXI11 IEN2 -#define IEN_SCI11_TXI11 IEN3 -#define IEN_SCI12_RXI12 IEN4 -#define IEN_SCI12_TXI12 IEN5 -#define IEN_DMAC_DMAC0I IEN0 -#define IEN_DMAC_DMAC1I IEN1 -#define IEN_DMAC_DMAC2I IEN2 -#define IEN_DMAC_DMAC3I IEN3 -#define IEN_DMAC_DMAC74I IEN4 -#define IEN_OST_OSTDI IEN5 -#define IEN_EXDMAC_EXDMAC0I IEN6 -#define IEN_EXDMAC_EXDMAC1I IEN7 -#define IEN_PERIB_INTB128 IEN0 -#define IEN_PERIB_INTB129 IEN1 -#define IEN_PERIB_INTB130 IEN2 -#define IEN_PERIB_INTB131 IEN3 -#define IEN_PERIB_INTB132 IEN4 -#define IEN_PERIB_INTB133 IEN5 -#define IEN_PERIB_INTB134 IEN6 -#define IEN_PERIB_INTB135 IEN7 -#define IEN_PERIB_INTB136 IEN0 -#define IEN_PERIB_INTB137 IEN1 -#define IEN_PERIB_INTB138 IEN2 -#define IEN_PERIB_INTB139 IEN3 -#define IEN_PERIB_INTB140 IEN4 -#define IEN_PERIB_INTB141 IEN5 -#define IEN_PERIB_INTB142 IEN6 -#define IEN_PERIB_INTB143 IEN7 -#define IEN_PERIB_INTB144 IEN0 -#define IEN_PERIB_INTB145 IEN1 -#define IEN_PERIB_INTB146 IEN2 -#define IEN_PERIB_INTB147 IEN3 -#define IEN_PERIB_INTB148 IEN4 -#define IEN_PERIB_INTB149 IEN5 -#define IEN_PERIB_INTB150 IEN6 -#define IEN_PERIB_INTB151 IEN7 -#define IEN_PERIB_INTB152 IEN0 -#define IEN_PERIB_INTB153 IEN1 -#define IEN_PERIB_INTB154 IEN2 -#define IEN_PERIB_INTB155 IEN3 -#define IEN_PERIB_INTB156 IEN4 -#define IEN_PERIB_INTB157 IEN5 -#define IEN_PERIB_INTB158 IEN6 -#define IEN_PERIB_INTB159 IEN7 -#define IEN_PERIB_INTB160 IEN0 -#define IEN_PERIB_INTB161 IEN1 -#define IEN_PERIB_INTB162 IEN2 -#define IEN_PERIB_INTB163 IEN3 -#define IEN_PERIB_INTB164 IEN4 -#define IEN_PERIB_INTB165 IEN5 -#define IEN_PERIB_INTB166 IEN6 -#define IEN_PERIB_INTB167 IEN7 -#define IEN_PERIB_INTB168 IEN0 -#define IEN_PERIB_INTB169 IEN1 -#define IEN_PERIB_INTB170 IEN2 -#define IEN_PERIB_INTB171 IEN3 -#define IEN_PERIB_INTB172 IEN4 -#define IEN_PERIB_INTB173 IEN5 -#define IEN_PERIB_INTB174 IEN6 -#define IEN_PERIB_INTB175 IEN7 -#define IEN_PERIB_INTB176 IEN0 -#define IEN_PERIB_INTB177 IEN1 -#define IEN_PERIB_INTB178 IEN2 -#define IEN_PERIB_INTB179 IEN3 -#define IEN_PERIB_INTB180 IEN4 -#define IEN_PERIB_INTB181 IEN5 -#define IEN_PERIB_INTB182 IEN6 -#define IEN_PERIB_INTB183 IEN7 -#define IEN_PERIB_INTB184 IEN0 -#define IEN_PERIB_INTB185 IEN1 -#define IEN_PERIB_INTB186 IEN2 -#define IEN_PERIB_INTB187 IEN3 -#define IEN_PERIB_INTB188 IEN4 -#define IEN_PERIB_INTB189 IEN5 -#define IEN_PERIB_INTB190 IEN6 -#define IEN_PERIB_INTB191 IEN7 -#define IEN_PERIB_INTB192 IEN0 -#define IEN_PERIB_INTB193 IEN1 -#define IEN_PERIB_INTB194 IEN2 -#define IEN_PERIB_INTB195 IEN3 -#define IEN_PERIB_INTB196 IEN4 -#define IEN_PERIB_INTB197 IEN5 -#define IEN_PERIB_INTB198 IEN6 -#define IEN_PERIB_INTB199 IEN7 -#define IEN_PERIB_INTB200 IEN0 -#define IEN_PERIB_INTB201 IEN1 -#define IEN_PERIB_INTB202 IEN2 -#define IEN_PERIB_INTB203 IEN3 -#define IEN_PERIB_INTB204 IEN4 -#define IEN_PERIB_INTB205 IEN5 -#define IEN_PERIB_INTB206 IEN6 -#define IEN_PERIB_INTB207 IEN7 -#define IEN_PERIA_INTA208 IEN0 -#define IEN_PERIA_INTA209 IEN1 -#define IEN_PERIA_INTA210 IEN2 -#define IEN_PERIA_INTA211 IEN3 -#define IEN_PERIA_INTA212 IEN4 -#define IEN_PERIA_INTA213 IEN5 -#define IEN_PERIA_INTA214 IEN6 -#define IEN_PERIA_INTA215 IEN7 -#define IEN_PERIA_INTA216 IEN0 -#define IEN_PERIA_INTA217 IEN1 -#define IEN_PERIA_INTA218 IEN2 -#define IEN_PERIA_INTA219 IEN3 -#define IEN_PERIA_INTA220 IEN4 -#define IEN_PERIA_INTA221 IEN5 -#define IEN_PERIA_INTA222 IEN6 -#define IEN_PERIA_INTA223 IEN7 -#define IEN_PERIA_INTA224 IEN0 -#define IEN_PERIA_INTA225 IEN1 -#define IEN_PERIA_INTA226 IEN2 -#define IEN_PERIA_INTA227 IEN3 -#define IEN_PERIA_INTA228 IEN4 -#define IEN_PERIA_INTA229 IEN5 -#define IEN_PERIA_INTA230 IEN6 -#define IEN_PERIA_INTA231 IEN7 -#define IEN_PERIA_INTA232 IEN0 -#define IEN_PERIA_INTA233 IEN1 -#define IEN_PERIA_INTA234 IEN2 -#define IEN_PERIA_INTA235 IEN3 -#define IEN_PERIA_INTA236 IEN4 -#define IEN_PERIA_INTA237 IEN5 -#define IEN_PERIA_INTA238 IEN6 -#define IEN_PERIA_INTA239 IEN7 -#define IEN_PERIA_INTA240 IEN0 -#define IEN_PERIA_INTA241 IEN1 -#define IEN_PERIA_INTA242 IEN2 -#define IEN_PERIA_INTA243 IEN3 -#define IEN_PERIA_INTA244 IEN4 -#define IEN_PERIA_INTA245 IEN5 -#define IEN_PERIA_INTA246 IEN6 -#define IEN_PERIA_INTA247 IEN7 -#define IEN_PERIA_INTA248 IEN0 -#define IEN_PERIA_INTA249 IEN1 -#define IEN_PERIA_INTA250 IEN2 -#define IEN_PERIA_INTA251 IEN3 -#define IEN_PERIA_INTA252 IEN4 -#define IEN_PERIA_INTA253 IEN5 -#define IEN_PERIA_INTA254 IEN6 -#define IEN_PERIA_INTA255 IEN7 - -#define VECT_BSC_BUSERR 16 -#define VECT_RAM_RAMERR 18 -#define VECT_FCU_FIFERR 21 -#define VECT_FCU_FRDYI 23 -#define VECT_ICU_SWINT2 26 -#define VECT_ICU_SWINT 27 -#define VECT_CMT0_CMI0 28 -#define VECT_CMT1_CMI1 29 -#define VECT_CMTW0_CMWI0 30 -#define VECT_CMTW1_CMWI1 31 -#define VECT_USB0_D0FIFO0 34 -#define VECT_USB0_D1FIFO0 35 -#define VECT_RSPI0_SPRI0 38 -#define VECT_RSPI0_SPTI0 39 -#define VECT_RSPI1_SPRI1 40 -#define VECT_RSPI1_SPTI1 41 -#define VECT_QSPI_SPRI 42 -#define VECT_QSPI_SPTI 43 -#define VECT_SDHI_SBFAI 44 -#define VECT_MMCIF_MBFAI 45 -#define VECT_RIIC1_RXI1 50 -#define VECT_RIIC1_TXI1 51 -#define VECT_RIIC0_RXI0 52 -#define VECT_RIIC0_TXI0 53 -#define VECT_RIIC2_RXI2 54 -#define VECT_RIIC2_TXI2 55 -#define VECT_SCI0_RXI0 58 -#define VECT_SCI0_TXI0 59 -#define VECT_SCI1_RXI1 60 -#define VECT_SCI1_TXI1 61 -#define VECT_SCI2_RXI2 62 -#define VECT_SCI2_TXI2 63 -#define VECT_ICU_IRQ0 64 -#define VECT_ICU_IRQ1 65 -#define VECT_ICU_IRQ2 66 -#define VECT_ICU_IRQ3 67 -#define VECT_ICU_IRQ4 68 -#define VECT_ICU_IRQ5 69 -#define VECT_ICU_IRQ6 70 -#define VECT_ICU_IRQ7 71 -#define VECT_ICU_IRQ8 72 -#define VECT_ICU_IRQ9 73 -#define VECT_ICU_IRQ10 74 -#define VECT_ICU_IRQ11 75 -#define VECT_ICU_IRQ12 76 -#define VECT_ICU_IRQ13 77 -#define VECT_ICU_IRQ14 78 -#define VECT_ICU_IRQ15 79 -#define VECT_SCI3_RXI3 80 -#define VECT_SCI3_TXI3 81 -#define VECT_SCI4_RXI4 82 -#define VECT_SCI4_TXI4 83 -#define VECT_SCI5_RXI5 84 -#define VECT_SCI5_TXI5 85 -#define VECT_SCI6_RXI6 86 -#define VECT_SCI6_TXI6 87 -#define VECT_LVD1_LVD1 88 -#define VECT_LVD2_LVD2 89 -#define VECT_USB0_USBR0 90 -#define VECT_RTC_ALM 92 -#define VECT_RTC_PRD 93 -#define VECT_IWDT_IWUNI 95 -#define VECT_WDT_WUNI 96 -#define VECT_PDC_PCDFI 97 -#define VECT_SCI7_RXI7 98 -#define VECT_SCI7_TXI7 99 -#define VECT_SCI8_RXI8 100 -#define VECT_SCI8_TXI8 101 -#define VECT_SCI9_RXI9 102 -#define VECT_SCI9_TXI9 103 -#define VECT_SCI10_RXI10 104 -#define VECT_SCI10_TXI10 105 -#define VECT_ICU_GROUPBE0 106 -#define VECT_ICU_GROUPBL2 107 -#define VECT_RSPI2_SPRI2 108 -#define VECT_RSPI2_SPTI2 109 -#define VECT_ICU_GROUPBL0 110 -#define VECT_ICU_GROUPBL1 111 -#define VECT_ICU_GROUPAL0 112 -#define VECT_ICU_GROUPAL1 113 -#define VECT_SCI11_RXI11 114 -#define VECT_SCI11_TXI11 115 -#define VECT_SCI12_RXI12 116 -#define VECT_SCI12_TXI12 117 -#define VECT_DMAC_DMAC0I 120 -#define VECT_DMAC_DMAC1I 121 -#define VECT_DMAC_DMAC2I 122 -#define VECT_DMAC_DMAC3I 123 -#define VECT_DMAC_DMAC74I 124 -#define VECT_OST_OSTDI 125 -#define VECT_EXDMAC_EXDMAC0I 126 -#define VECT_EXDMAC_EXDMAC1I 127 -#define VECT_PERIB_INTB128 128 -#define VECT_PERIB_INTB129 129 -#define VECT_PERIB_INTB130 130 -#define VECT_PERIB_INTB131 131 -#define VECT_PERIB_INTB132 132 -#define VECT_PERIB_INTB133 133 -#define VECT_PERIB_INTB134 134 -#define VECT_PERIB_INTB135 135 -#define VECT_PERIB_INTB136 136 -#define VECT_PERIB_INTB137 137 -#define VECT_PERIB_INTB138 138 -#define VECT_PERIB_INTB139 139 -#define VECT_PERIB_INTB140 140 -#define VECT_PERIB_INTB141 141 -#define VECT_PERIB_INTB142 142 -#define VECT_PERIB_INTB143 143 -#define VECT_PERIB_INTB144 144 -#define VECT_PERIB_INTB145 145 -#define VECT_PERIB_INTB146 146 -#define VECT_PERIB_INTB147 147 -#define VECT_PERIB_INTB148 148 -#define VECT_PERIB_INTB149 149 -#define VECT_PERIB_INTB150 150 -#define VECT_PERIB_INTB151 151 -#define VECT_PERIB_INTB152 152 -#define VECT_PERIB_INTB153 153 -#define VECT_PERIB_INTB154 154 -#define VECT_PERIB_INTB155 155 -#define VECT_PERIB_INTB156 156 -#define VECT_PERIB_INTB157 157 -#define VECT_PERIB_INTB158 158 -#define VECT_PERIB_INTB159 159 -#define VECT_PERIB_INTB160 160 -#define VECT_PERIB_INTB161 161 -#define VECT_PERIB_INTB162 162 -#define VECT_PERIB_INTB163 163 -#define VECT_PERIB_INTB164 164 -#define VECT_PERIB_INTB165 165 -#define VECT_PERIB_INTB166 166 -#define VECT_PERIB_INTB167 167 -#define VECT_PERIB_INTB168 168 -#define VECT_PERIB_INTB169 169 -#define VECT_PERIB_INTB170 170 -#define VECT_PERIB_INTB171 171 -#define VECT_PERIB_INTB172 172 -#define VECT_PERIB_INTB173 173 -#define VECT_PERIB_INTB174 174 -#define VECT_PERIB_INTB175 175 -#define VECT_PERIB_INTB176 176 -#define VECT_PERIB_INTB177 177 -#define VECT_PERIB_INTB178 178 -#define VECT_PERIB_INTB179 179 -#define VECT_PERIB_INTB180 180 -#define VECT_PERIB_INTB181 181 -#define VECT_PERIB_INTB182 182 -#define VECT_PERIB_INTB183 183 -#define VECT_PERIB_INTB184 184 -#define VECT_PERIB_INTB185 185 -#define VECT_PERIB_INTB186 186 -#define VECT_PERIB_INTB187 187 -#define VECT_PERIB_INTB188 188 -#define VECT_PERIB_INTB189 189 -#define VECT_PERIB_INTB190 190 -#define VECT_PERIB_INTB191 191 -#define VECT_PERIB_INTB192 192 -#define VECT_PERIB_INTB193 193 -#define VECT_PERIB_INTB194 194 -#define VECT_PERIB_INTB195 195 -#define VECT_PERIB_INTB196 196 -#define VECT_PERIB_INTB197 197 -#define VECT_PERIB_INTB198 198 -#define VECT_PERIB_INTB199 199 -#define VECT_PERIB_INTB200 200 -#define VECT_PERIB_INTB201 201 -#define VECT_PERIB_INTB202 202 -#define VECT_PERIB_INTB203 203 -#define VECT_PERIB_INTB204 204 -#define VECT_PERIB_INTB205 205 -#define VECT_PERIB_INTB206 206 -#define VECT_PERIB_INTB207 207 -#define VECT_PERIA_INTA208 208 -#define VECT_PERIA_INTA209 209 -#define VECT_PERIA_INTA210 210 -#define VECT_PERIA_INTA211 211 -#define VECT_PERIA_INTA212 212 -#define VECT_PERIA_INTA213 213 -#define VECT_PERIA_INTA214 214 -#define VECT_PERIA_INTA215 215 -#define VECT_PERIA_INTA216 216 -#define VECT_PERIA_INTA217 217 -#define VECT_PERIA_INTA218 218 -#define VECT_PERIA_INTA219 219 -#define VECT_PERIA_INTA220 220 -#define VECT_PERIA_INTA221 221 -#define VECT_PERIA_INTA222 222 -#define VECT_PERIA_INTA223 223 -#define VECT_PERIA_INTA224 224 -#define VECT_PERIA_INTA225 225 -#define VECT_PERIA_INTA226 226 -#define VECT_PERIA_INTA227 227 -#define VECT_PERIA_INTA228 228 -#define VECT_PERIA_INTA229 229 -#define VECT_PERIA_INTA230 230 -#define VECT_PERIA_INTA231 231 -#define VECT_PERIA_INTA232 232 -#define VECT_PERIA_INTA233 233 -#define VECT_PERIA_INTA234 234 -#define VECT_PERIA_INTA235 235 -#define VECT_PERIA_INTA236 236 -#define VECT_PERIA_INTA237 237 -#define VECT_PERIA_INTA238 238 -#define VECT_PERIA_INTA239 239 -#define VECT_PERIA_INTA240 240 -#define VECT_PERIA_INTA241 241 -#define VECT_PERIA_INTA242 242 -#define VECT_PERIA_INTA243 243 -#define VECT_PERIA_INTA244 244 -#define VECT_PERIA_INTA245 245 -#define VECT_PERIA_INTA246 246 -#define VECT_PERIA_INTA247 247 -#define VECT_PERIA_INTA248 248 -#define VECT_PERIA_INTA249 249 -#define VECT_PERIA_INTA250 250 -#define VECT_PERIA_INTA251 251 -#define VECT_PERIA_INTA252 252 -#define VECT_PERIA_INTA253 253 -#define VECT_PERIA_INTA254 254 -#define VECT_PERIA_INTA255 255 - -#define MSTP_EXDMAC SYSTEM.MSTPCRA.BIT.MSTPA29 -#define MSTP_EXDMAC0 SYSTEM.MSTPCRA.BIT.MSTPA29 -#define MSTP_EXDMAC1 SYSTEM.MSTPCRA.BIT.MSTPA29 -#define MSTP_DMAC SYSTEM.MSTPCRA.BIT.MSTPA28 -#define MSTP_DMAC0 SYSTEM.MSTPCRA.BIT.MSTPA28 -#define MSTP_DMAC1 SYSTEM.MSTPCRA.BIT.MSTPA28 -#define MSTP_DMAC2 SYSTEM.MSTPCRA.BIT.MSTPA28 -#define MSTP_DMAC3 SYSTEM.MSTPCRA.BIT.MSTPA28 -#define MSTP_DMAC4 SYSTEM.MSTPCRA.BIT.MSTPA28 -#define MSTP_DMAC5 SYSTEM.MSTPCRA.BIT.MSTPA28 -#define MSTP_DMAC6 SYSTEM.MSTPCRA.BIT.MSTPA28 -#define MSTP_DMAC7 SYSTEM.MSTPCRA.BIT.MSTPA28 -#define MSTP_DTC SYSTEM.MSTPCRA.BIT.MSTPA28 -#define MSTP_DA SYSTEM.MSTPCRA.BIT.MSTPA19 -#define MSTP_S12AD SYSTEM.MSTPCRA.BIT.MSTPA17 -#define MSTP_S12AD1 SYSTEM.MSTPCRA.BIT.MSTPA16 -#define MSTP_CMT0 SYSTEM.MSTPCRA.BIT.MSTPA15 -#define MSTP_CMT1 SYSTEM.MSTPCRA.BIT.MSTPA15 -#define MSTP_CMT2 SYSTEM.MSTPCRA.BIT.MSTPA14 -#define MSTP_CMT3 SYSTEM.MSTPCRA.BIT.MSTPA14 -#define MSTP_TPU0 SYSTEM.MSTPCRA.BIT.MSTPA13 -#define MSTP_TPU1 SYSTEM.MSTPCRA.BIT.MSTPA13 -#define MSTP_TPU2 SYSTEM.MSTPCRA.BIT.MSTPA13 -#define MSTP_TPU3 SYSTEM.MSTPCRA.BIT.MSTPA13 -#define MSTP_TPU4 SYSTEM.MSTPCRA.BIT.MSTPA13 -#define MSTP_TPU5 SYSTEM.MSTPCRA.BIT.MSTPA13 -#define MSTP_TPUA SYSTEM.MSTPCRA.BIT.MSTPA13 -#define MSTP_PPG0 SYSTEM.MSTPCRA.BIT.MSTPA11 -#define MSTP_PPG1 SYSTEM.MSTPCRA.BIT.MSTPA10 -#define MSTP_MTU SYSTEM.MSTPCRA.BIT.MSTPA9 -#define MSTP_MTU0 SYSTEM.MSTPCRA.BIT.MSTPA9 -#define MSTP_MTU1 SYSTEM.MSTPCRA.BIT.MSTPA9 -#define MSTP_MTU2 SYSTEM.MSTPCRA.BIT.MSTPA9 -#define MSTP_MTU3 SYSTEM.MSTPCRA.BIT.MSTPA9 -#define MSTP_MTU4 SYSTEM.MSTPCRA.BIT.MSTPA9 -#define MSTP_MTU5 SYSTEM.MSTPCRA.BIT.MSTPA9 -#define MSTP_MTU6 SYSTEM.MSTPCRA.BIT.MSTPA9 -#define MSTP_MTU7 SYSTEM.MSTPCRA.BIT.MSTPA9 -#define MSTP_MTU8 SYSTEM.MSTPCRA.BIT.MSTPA9 -#define MSTP_TMR0 SYSTEM.MSTPCRA.BIT.MSTPA5 -#define MSTP_TMR1 SYSTEM.MSTPCRA.BIT.MSTPA5 -#define MSTP_TMR01 SYSTEM.MSTPCRA.BIT.MSTPA5 -#define MSTP_TMR2 SYSTEM.MSTPCRA.BIT.MSTPA4 -#define MSTP_TMR3 SYSTEM.MSTPCRA.BIT.MSTPA4 -#define MSTP_TMR23 SYSTEM.MSTPCRA.BIT.MSTPA4 -#define MSTP_CMTW0 SYSTEM.MSTPCRA.BIT.MSTPA1 -#define MSTP_CMTW1 SYSTEM.MSTPCRA.BIT.MSTPA0 -#define MSTP_SCI0 SYSTEM.MSTPCRB.BIT.MSTPB31 -#define MSTP_SMCI0 SYSTEM.MSTPCRB.BIT.MSTPB31 -#define MSTP_SCI1 SYSTEM.MSTPCRB.BIT.MSTPB30 -#define MSTP_SMCI1 SYSTEM.MSTPCRB.BIT.MSTPB30 -#define MSTP_SCI2 SYSTEM.MSTPCRB.BIT.MSTPB29 -#define MSTP_SMCI2 SYSTEM.MSTPCRB.BIT.MSTPB29 -#define MSTP_SCI3 SYSTEM.MSTPCRB.BIT.MSTPB28 -#define MSTP_SMCI3 SYSTEM.MSTPCRB.BIT.MSTPB28 -#define MSTP_SCI4 SYSTEM.MSTPCRB.BIT.MSTPB27 -#define MSTP_SMCI4 SYSTEM.MSTPCRB.BIT.MSTPB27 -#define MSTP_SCI5 SYSTEM.MSTPCRB.BIT.MSTPB26 -#define MSTP_SMCI5 SYSTEM.MSTPCRB.BIT.MSTPB26 -#define MSTP_SCI6 SYSTEM.MSTPCRB.BIT.MSTPB25 -#define MSTP_SMCI6 SYSTEM.MSTPCRB.BIT.MSTPB25 -#define MSTP_SCI7 SYSTEM.MSTPCRB.BIT.MSTPB24 -#define MSTP_SMCI7 SYSTEM.MSTPCRB.BIT.MSTPB24 -#define MSTP_CRC SYSTEM.MSTPCRB.BIT.MSTPB23 -#define MSTP_PDC SYSTEM.MSTPCRB.BIT.MSTPB22 -#define MSTP_RIIC0 SYSTEM.MSTPCRB.BIT.MSTPB21 -#define MSTP_RIIC1 SYSTEM.MSTPCRB.BIT.MSTPB20 -#define MSTP_USB0 SYSTEM.MSTPCRB.BIT.MSTPB19 -#define MSTP_RSPI0 SYSTEM.MSTPCRB.BIT.MSTPB17 -#define MSTP_RSPI1 SYSTEM.MSTPCRB.BIT.MSTPB16 -#define MSTP_EDMAC0 SYSTEM.MSTPCRB.BIT.MSTPB15 -#define MSTP_ETHERC0 SYSTEM.MSTPCRB.BIT.MSTPB15 -#define MSTP_ELC SYSTEM.MSTPCRB.BIT.MSTPB9 -#define MSTP_TEMPS SYSTEM.MSTPCRB.BIT.MSTPB8 -#define MSTP_DOC SYSTEM.MSTPCRB.BIT.MSTPB6 -#define MSTP_SCI12 SYSTEM.MSTPCRB.BIT.MSTPB4 -#define MSTP_SMCI12 SYSTEM.MSTPCRB.BIT.MSTPB4 -#define MSTP_CAN1 SYSTEM.MSTPCRB.BIT.MSTPB1 -#define MSTP_CAN0 SYSTEM.MSTPCRB.BIT.MSTPB0 -#define MSTP_GLCDC SYSTEM.MSTPCRC.BIT.MSTPC29 -#define MSTP_DRW2D SYSTEM.MSTPCRC.BIT.MSTPC28 -#define MSTP_SCI8 SYSTEM.MSTPCRC.BIT.MSTPC27 -#define MSTP_SMCI8 SYSTEM.MSTPCRC.BIT.MSTPC27 -#define MSTP_SCI9 SYSTEM.MSTPCRC.BIT.MSTPC26 -#define MSTP_SMCI9 SYSTEM.MSTPCRC.BIT.MSTPC26 -#define MSTP_SCI10 SYSTEM.MSTPCRC.BIT.MSTPC25 -#define MSTP_SMCI10 SYSTEM.MSTPCRC.BIT.MSTPC25 -#define MSTP_SCI11 SYSTEM.MSTPCRC.BIT.MSTPC24 -#define MSTP_SMCI11 SYSTEM.MSTPCRC.BIT.MSTPC24 -#define MSTP_QSPI SYSTEM.MSTPCRC.BIT.MSTPC23 -#define MSTP_RSPI2 SYSTEM.MSTPCRC.BIT.MSTPC22 -#define MSTP_CAC SYSTEM.MSTPCRC.BIT.MSTPC19 -#define MSTP_RIIC2 SYSTEM.MSTPCRC.BIT.MSTPC17 -#define MSTP_STBYRAM SYSTEM.MSTPCRC.BIT.MSTPC7 -#define MSTP_RAM2 SYSTEM.MSTPCRC.BIT.MSTPC2 -#define MSTP_RAM0 SYSTEM.MSTPCRC.BIT.MSTPC0 -#define MSTP_MMCIF SYSTEM.MSTPCRD.BIT.MSTPD21 -#define MSTP_SDHI SYSTEM.MSTPCRD.BIT.MSTPD19 -#define MSTP_SDSI SYSTEM.MSTPCRD.BIT.MSTPD13 - -#define IS_CAN0_ERS0 IS0 -#define IS_CAN1_ERS1 IS1 -#define IS_SCI0_TEI0 IS0 -#define IS_SCI0_ERI0 IS1 -#define IS_SCI1_TEI1 IS2 -#define IS_SCI1_ERI1 IS3 -#define IS_SCI2_TEI2 IS4 -#define IS_SCI2_ERI2 IS5 -#define IS_SCI3_TEI3 IS6 -#define IS_SCI3_ERI3 IS7 -#define IS_SCI4_TEI4 IS8 -#define IS_SCI4_ERI4 IS9 -#define IS_SCI5_TEI5 IS10 -#define IS_SCI5_ERI5 IS11 -#define IS_SCI6_TEI6 IS12 -#define IS_SCI6_ERI6 IS13 -#define IS_SCI7_TEI7 IS14 -#define IS_SCI7_ERI7 IS15 -#define IS_SCI12_TEI12 IS16 -#define IS_SCI12_ERI12 IS17 -#define IS_SCI12_SCIX0 IS18 -#define IS_SCI12_SCIX1 IS19 -#define IS_SCI12_SCIX2 IS20 -#define IS_SCI12_SCIX3 IS21 -#define IS_QSPI_QSPSSLI IS24 -#define IS_CAC_FERRI IS26 -#define IS_CAC_MENDI IS27 -#define IS_CAC_OVFI IS28 -#define IS_DOC_DOPCI IS29 -#define IS_PDC_PCFEI IS30 -#define IS_PDC_PCERI IS31 -#define IS_SDHI_CDETI IS3 -#define IS_SDHI_CACI IS4 -#define IS_SDHI_SDACI IS5 -#define IS_MMCIF_CDETIO IS6 -#define IS_MMCIF_ERRIO IS7 -#define IS_MMCIF_ACCIO IS8 -#define IS_POE3_OEI1 IS9 -#define IS_POE3_OEI2 IS10 -#define IS_POE3_OEI3 IS11 -#define IS_POE3_OEI4 IS12 -#define IS_RIIC0_TEI0 IS13 -#define IS_RIIC0_EEI0 IS14 -#define IS_RIIC2_TEI2 IS15 -#define IS_RIIC2_EEI2 IS16 -#define IS_S12AD_S12CMPAI IS20 -#define IS_S12AD_S12CMPBI IS21 -#define IS_S12AD1_S12CMPAI1 IS22 -#define IS_S12AD1_S12CMPBI1 IS23 -#define IS_SCI8_TEI8 IS24 -#define IS_SCI8_ERI8 IS25 -#define IS_SCI9_TEI9 IS26 -#define IS_SCI9_ERI9 IS27 -#define IS_RIIC1_TEI1 IS28 -#define IS_RIIC1_EEI1 IS29 -#define IS_SDSI_SDIOI IS0 -#define IS_SCI10_TEI10 IS8 -#define IS_SCI10_ERI10 IS9 -#define IS_SCI11_TEI11 IS12 -#define IS_SCI11_ERI11 IS13 -#define IS_RSPI0_SPII0 IS16 -#define IS_RSPI0_SPEI0 IS17 -#define IS_RSPI1_SPII1 IS18 -#define IS_RSPI1_SPEI1 IS19 -#define IS_RSPI2_SPII2 IS20 -#define IS_RSPI2_SPEI2 IS21 -#define IS_EDMAC0_EINT0 IS4 -#define IS_GLCDC_VPOS IS8 -#define IS_GLCDC_GR1UF IS9 -#define IS_GLCDC_GR2UF IS10 -#define IS_DRW2D_DRWIRQ IS11 - -#define EN_CAN0_ERS0 EN0 -#define EN_CAN1_ERS1 EN1 -#define EN_SCI0_TEI0 EN0 -#define EN_SCI0_ERI0 EN1 -#define EN_SCI1_TEI1 EN2 -#define EN_SCI1_ERI1 EN3 -#define EN_SCI2_TEI2 EN4 -#define EN_SCI2_ERI2 EN5 -#define EN_SCI3_TEI3 EN6 -#define EN_SCI3_ERI3 EN7 -#define EN_SCI4_TEI4 EN8 -#define EN_SCI4_ERI4 EN9 -#define EN_SCI5_TEI5 EN10 -#define EN_SCI5_ERI5 EN11 -#define EN_SCI6_TEI6 EN12 -#define EN_SCI6_ERI6 EN13 -#define EN_SCI7_TEI7 EN14 -#define EN_SCI7_ERI7 EN15 -#define EN_SCI12_TEI12 EN16 -#define EN_SCI12_ERI12 EN17 -#define EN_SCI12_SCIX0 EN18 -#define EN_SCI12_SCIX1 EN19 -#define EN_SCI12_SCIX2 EN20 -#define EN_SCI12_SCIX3 EN21 -#define EN_QSPI_QSPSSLI EN24 -#define EN_CAC_FERRI EN26 -#define EN_CAC_MENDI EN27 -#define EN_CAC_OVFI EN28 -#define EN_DOC_DOPCI EN29 -#define EN_PDC_PCFEI EN30 -#define EN_PDC_PCERI EN31 -#define EN_SDHI_CDETI EN3 -#define EN_SDHI_CACI EN4 -#define EN_SDHI_SDACI EN5 -#define EN_MMCIF_CDETIO EN6 -#define EN_MMCIF_ERRIO EN7 -#define EN_MMCIF_ACCIO EN8 -#define EN_POE3_OEI1 EN9 -#define EN_POE3_OEI2 EN10 -#define EN_POE3_OEI3 EN11 -#define EN_POE3_OEI4 EN12 -#define EN_RIIC0_TEI0 EN13 -#define EN_RIIC0_EEI0 EN14 -#define EN_RIIC2_TEI2 EN15 -#define EN_RIIC2_EEI2 EN16 -#define EN_S12AD_S12CMPAI EN20 -#define EN_S12AD_S12CMPBI EN21 -#define EN_S12AD1_S12CMPAI1 EN22 -#define EN_S12AD1_S12CMPBI1 EN23 -#define EN_SCI8_TEI8 EN24 -#define EN_SCI8_ERI8 EN25 -#define EN_SCI9_TEI9 EN26 -#define EN_SCI9_ERI9 EN27 -#define EN_RIIC1_TEI1 EN28 -#define EN_RIIC1_EEI1 EN29 -#define EN_SDSI_SDIOI EN0 -#define EN_SCI10_TEI10 EN8 -#define EN_SCI10_ERI10 EN9 -#define EN_SCI11_TEI11 EN12 -#define EN_SCI11_ERI11 EN13 -#define EN_RSPI0_SPII0 EN16 -#define EN_RSPI0_SPEI0 EN17 -#define EN_RSPI1_SPII1 EN18 -#define EN_RSPI1_SPEI1 EN19 -#define EN_RSPI2_SPII2 EN20 -#define EN_RSPI2_SPEI2 EN21 -#define EN_EDMAC0_EINT0 EN4 -#define EN_GLCDC_VPOS EN8 -#define EN_GLCDC_GR1UF EN9 -#define EN_GLCDC_GR2UF EN10 -#define EN_DRW2D_DRWIRQ EN11 - -#define CLR_CAN0_ERS0 CLR0 -#define CLR_CAN1_ERS1 CLR1 - -#define GEN_CAN0_ERS0 GENBE0 -#define GEN_CAN1_ERS1 GENBE0 -#define GEN_SCI0_TEI0 GENBL0 -#define GEN_SCI0_ERI0 GENBL0 -#define GEN_SCI1_TEI1 GENBL0 -#define GEN_SCI1_ERI1 GENBL0 -#define GEN_SCI2_TEI2 GENBL0 -#define GEN_SCI2_ERI2 GENBL0 -#define GEN_SCI3_TEI3 GENBL0 -#define GEN_SCI3_ERI3 GENBL0 -#define GEN_SCI4_TEI4 GENBL0 -#define GEN_SCI4_ERI4 GENBL0 -#define GEN_SCI5_TEI5 GENBL0 -#define GEN_SCI5_ERI5 GENBL0 -#define GEN_SCI6_TEI6 GENBL0 -#define GEN_SCI6_ERI6 GENBL0 -#define GEN_SCI7_TEI7 GENBL0 -#define GEN_SCI7_ERI7 GENBL0 -#define GEN_SCI12_TEI12 GENBL0 -#define GEN_SCI12_ERI12 GENBL0 -#define GEN_SCI12_SCIX0 GENBL0 -#define GEN_SCI12_SCIX1 GENBL0 -#define GEN_SCI12_SCIX2 GENBL0 -#define GEN_SCI12_SCIX3 GENBL0 -#define GEN_QSPI_QSPSSLI GENBL0 -#define GEN_CAC_FERRI GENBL0 -#define GEN_CAC_MENDI GENBL0 -#define GEN_CAC_OVFI GENBL0 -#define GEN_DOC_DOPCI GENBL0 -#define GEN_PDC_PCFEI GENBL0 -#define GEN_PDC_PCERI GENBL0 -#define GEN_SDHI_CDETI GENBL1 -#define GEN_SDHI_CACI GENBL1 -#define GEN_SDHI_SDACI GENBL1 -#define GEN_MMCIF_CDETIO GENBL1 -#define GEN_MMCIF_ERRIO GENBL1 -#define GEN_MMCIF_ACCIO GENBL1 -#define GEN_POE3_OEI1 GENBL1 -#define GEN_POE3_OEI2 GENBL1 -#define GEN_POE3_OEI3 GENBL1 -#define GEN_POE3_OEI4 GENBL1 -#define GEN_RIIC0_TEI0 GENBL1 -#define GEN_RIIC0_EEI0 GENBL1 -#define GEN_RIIC2_TEI2 GENBL1 -#define GEN_RIIC2_EEI2 GENBL1 -#define GEN_S12AD_S12CMPAI GENBL1 -#define GEN_S12AD_S12CMPBI GENBL1 -#define GEN_S12AD1_S12CMPAI1 GENBL1 -#define GEN_S12AD1_S12CMPBI1 GENBL1 -#define GEN_SCI8_TEI8 GENBL1 -#define GEN_SCI8_ERI8 GENBL1 -#define GEN_SCI9_TEI9 GENBL1 -#define GEN_SCI9_ERI9 GENBL1 -#define GEN_RIIC1_TEI1 GENBL1 -#define GEN_RIIC1_EEI1 GENBL1 -#define GEN_SDSI_SDIOI GENBL2 -#define GEN_SCI10_TEI10 GENAL0 -#define GEN_SCI10_ERI10 GENAL0 -#define GEN_SCI11_TEI11 GENAL0 -#define GEN_SCI11_ERI11 GENAL0 -#define GEN_RSPI0_SPII0 GENAL0 -#define GEN_RSPI0_SPEI0 GENAL0 -#define GEN_RSPI1_SPII1 GENAL0 -#define GEN_RSPI1_SPEI1 GENAL0 -#define GEN_RSPI2_SPII2 GENAL0 -#define GEN_RSPI2_SPEI2 GENAL0 -#define GEN_EDMAC0_EINT0 GENAL1 -#define GEN_GLCDC_VPOS GENAL1 -#define GEN_GLCDC_GR1UF GENAL1 -#define GEN_GLCDC_GR2UF GENAL1 -#define GEN_DRQ2D_DRWIRQ GENAL1 - -#define GRP_CAN0_ERS0 GRPBE0 -#define GRP_CAN1_ERS1 GRPBE0 -#define GRP_SCI0_TEI0 GRPBL0 -#define GRP_SCI0_ERI0 GRPBL0 -#define GRP_SCI1_TEI1 GRPBL0 -#define GRP_SCI1_ERI1 GRPBL0 -#define GRP_SCI2_TEI2 GRPBL0 -#define GRP_SCI2_ERI2 GRPBL0 -#define GRP_SCI3_TEI3 GRPBL0 -#define GRP_SCI3_ERI3 GRPBL0 -#define GRP_SCI4_TEI4 GRPBL0 -#define GRP_SCI4_ERI4 GRPBL0 -#define GRP_SCI5_TEI5 GRPBL0 -#define GRP_SCI5_ERI5 GRPBL0 -#define GRP_SCI6_TEI6 GRPBL0 -#define GRP_SCI6_ERI6 GRPBL0 -#define GRP_SCI7_TEI7 GRPBL0 -#define GRP_SCI7_ERI7 GRPBL0 -#define GRP_SCI12_TEI12 GRPBL0 -#define GRP_SCI12_ERI12 GRPBL0 -#define GRP_SCI12_SCIX0 GRPBL0 -#define GRP_SCI12_SCIX1 GRPBL0 -#define GRP_SCI12_SCIX2 GRPBL0 -#define GRP_SCI12_SCIX3 GRPBL0 -#define GRP_QSPI_QSPSSLI GRPBL0 -#define GRP_CAC_FERRI GRPBL0 -#define GRP_CAC_MENDI GRPBL0 -#define GRP_CAC_OVFI GRPBL0 -#define GRP_DOC_DOPCI GRPBL0 -#define GRP_PDC_PCFEI GRPBL0 -#define GRP_PDC_PCERI GRPBL0 -#define GRP_SDHI_CDETI GRPBL1 -#define GRP_SDHI_CACI GRPBL1 -#define GRP_SDHI_SDACI GRPBL1 -#define GRP_MMCIF_CDETIO GRPBL1 -#define GRP_MMCIF_ERRIO GRPBL1 -#define GRP_MMCIF_ACCIO GRPBL1 -#define GRP_POE3_OEI1 GRPBL1 -#define GRP_POE3_OEI2 GRPBL1 -#define GRP_POE3_OEI3 GRPBL1 -#define GRP_POE3_OEI4 GRPBL1 -#define GRP_RIIC0_TEI0 GRPBL1 -#define GRP_RIIC0_EEI0 GRPBL1 -#define GRP_RIIC2_TEI2 GRPBL1 -#define GRP_RIIC2_EEI2 GRPBL1 -#define GRP_S12AD_S12CMPAI GRPBL1 -#define GRP_S12AD_S12CMPBI GRPBL1 -#define GRP_S12AD1_S12CMPAI1 GRPBL1 -#define GRP_S12AD1_S12CMPBI1 GRPBL1 -#define GRP_SCI8_TEI8 GRPBL1 -#define GRP_SCI8_ERI8 GRPBL1 -#define GRP_SCI9_TEI9 GRPBL1 -#define GRP_SCI9_ERI9 GRPBL1 -#define GRP_RIIC1_TEI1 GENBL1 -#define GRP_RIIC1_EEI1 GENBL1 -#define GRP_SDSI_SDIOI GRPBL2 -#define GRP_SCI10_TEI10 GRPAL0 -#define GRP_SCI10_ERI10 GRPAL0 -#define GRP_SCI11_TEI11 GRPAL0 -#define GRP_SCI11_ERI11 GRPAL0 -#define GRP_RSPI0_SPII0 GRPAL0 -#define GRP_RSPI0_SPEI0 GRPAL0 -#define GRP_RSPI1_SPII1 GRPAL0 -#define GRP_RSPI1_SPEI1 GRPAL0 -#define GRP_RSPI2_SPII2 GRPAL0 -#define GRP_RSPI2_SPEI2 GRPAL0 -#define GRP_EDMAC0_EINT0 GRPAL1 -#define GRP_GLCDC_VPOS GRPAL1 -#define GRP_GLCDC_GR1UF GRPAL1 -#define GRP_GLCDC_GR2UF GRPAL1 -#define GRP_DRQ2D_DRWIRQ GRPAL1 - -#define GCR_CAN0_ERS0 GCRBE0 -#define GCR_CAN1_ERS1 GCRBE0 - -#define __IR( x ) ICU.IR[ IR ## x ].BIT.IR -#define _IR( x ) __IR( x ) -#define IR( x , y ) _IR( _ ## x ## _ ## y ) -#define __DTCE( x ) ICU.DTCER[ DTCE ## x ].BIT.DTCE -#define _DTCE( x ) __DTCE( x ) -#define DTCE( x , y ) _DTCE( _ ## x ## _ ## y ) -#define __IEN( x ) ICU.IER[ IER ## x ].BIT.IEN ## x -#define _IEN( x ) __IEN( x ) -#define IEN( x , y ) _IEN( _ ## x ## _ ## y ) -#define __IPR( x ) ICU.IPR[ IPR ## x ].BIT.IPR -#define _IPR( x ) __IPR( x ) -#define IPR( x , y ) _IPR( _ ## x ## _ ## y ) -#define __VECT( x ) VECT ## x -#define _VECT( x ) __VECT( x ) -#define VECT( x , y ) _VECT( _ ## x ## _ ## y ) -#define __MSTP( x ) MSTP ## x -#define _MSTP( x ) __MSTP( x ) -#define MSTP( x ) _MSTP( _ ## x ) - -#define __IS( x ) ICU.GRP ## x.BIT.IS ## x -#define _IS( x ) __IS( x ) -#define IS( x , y ) _IS( _ ## x ## _ ## y ) -#define __EN( x ) ICU.GEN ## x.BIT.EN ## x -#define _EN( x ) __EN( x ) -#define EN( x , y ) _EN( _ ## x ## _ ## y ) -#define __CLR( x ) ICU.GCR ## x.BIT.CLR ## x -#define _CLR( x ) __CLR( x ) -#define CLR( x , y ) _CLR( _ ## x ## _ ## y ) - -#define BSC (*(volatile struct st_bsc __sfr *)0x81300) -#define CAC (*(volatile struct st_cac __sfr *)0x8B000) -#define CAN0 (*(volatile struct st_can __sfr *)0x90200) -#define CAN1 (*(volatile struct st_can __sfr *)0x91200) -#define CMT (*(volatile struct st_cmt __sfr *)0x88000) -#define CMT0 (*(volatile struct st_cmt0 __sfr *)0x88002) -#define CMT1 (*(volatile struct st_cmt0 __sfr *)0x88008) -#define CMT2 (*(volatile struct st_cmt0 __sfr *)0x88012) -#define CMT3 (*(volatile struct st_cmt0 __sfr *)0x88018) -#define CMTW0 (*(volatile struct st_cmtw __sfr *)0x94200) -#define CMTW1 (*(volatile struct st_cmtw __sfr *)0x94280) -#define CRC (*(volatile struct st_crc __sfr *)0x88280) -#define DA (*(volatile struct st_da __sfr *)0x88040) -#define DMAC (*(volatile struct st_dmac __sfr *)0x82200) -#define DMAC0 (*(volatile struct st_dmac0 __sfr *)0x82000) -#define DMAC1 (*(volatile struct st_dmac1 __sfr *)0x82040) -#define DMAC2 (*(volatile struct st_dmac1 __sfr *)0x82080) -#define DMAC3 (*(volatile struct st_dmac1 __sfr *)0x820C0) -#define DMAC4 (*(volatile struct st_dmac1 __sfr *)0x82100) -#define DMAC5 (*(volatile struct st_dmac1 __sfr *)0x82140) -#define DMAC6 (*(volatile struct st_dmac1 __sfr *)0x82180) -#define DMAC7 (*(volatile struct st_dmac1 __sfr *)0x821C0) -#define DOC (*(volatile struct st_doc __sfr *)0x8B080) -#define DRW2D (*(volatile struct st_drw2d __sfr *)0xE3000) -#define DTC (*(volatile struct st_dtc __sfr *)0x82400) -#define EDMAC0 (*(volatile struct st_edmac __sfr *)0xC0000) -#define ELC (*(volatile struct st_elc __sfr *)0x8B100) -#define ETHERC0 (*(volatile struct st_etherc __sfr *)0xC0100) -#define EXDMAC (*(volatile struct st_exdmac __sfr *)0x82A00) -#define EXDMAC0 (*(volatile struct st_exdmac0 __sfr *)0x82800) -#define EXDMAC1 (*(volatile struct st_exdmac1 __sfr *)0x82840) -#define FLASH (*(volatile struct st_flash __sfr *)0x81000) -#define GLCDC (*(volatile struct st_glcdc __sfr *)0xE0000) -#define ICU (*(volatile struct st_icu __sfr *)0x87000) -#define IWDT (*(volatile struct st_iwdt __sfr *)0x88030) -#define MMCIF (*(volatile struct st_mmcif __sfr *)0x88500) -#define MPC (*(volatile struct st_mpc __sfr *)0x8C100) -#define MPU (*(volatile struct st_mpu __sfr *)0x86400) -#define MTU (*(volatile struct st_mtu __sfr *)0xC120A) -#define MTU0 (*(volatile struct st_mtu0 __sfr *)0xC1290) -#define MTU1 (*(volatile struct st_mtu1 __sfr *)0xC1290) -#define MTU2 (*(volatile struct st_mtu2 __sfr *)0xC1292) -#define MTU3 (*(volatile struct st_mtu3 __sfr *)0xC1200) -#define MTU4 (*(volatile struct st_mtu4 __sfr *)0xC1200) -#define MTU5 (*(volatile struct st_mtu5 __sfr *)0xC1A94) -#define MTU6 (*(volatile struct st_mtu6 __sfr *)0xC1A00) -#define MTU7 (*(volatile struct st_mtu7 __sfr *)0xC1A00) -#define MTU8 (*(volatile struct st_mtu8 __sfr *)0xC1298) -#define PDC (*(volatile struct st_pdc __sfr *)0xA0500) -#define POE3 (*(volatile struct st_poe __sfr *)0x8C4C0) -#define PORT0 (*(volatile struct st_port0 __sfr *)0x8C000) -#define PORT1 (*(volatile struct st_port1 __sfr *)0x8C001) -#define PORT2 (*(volatile struct st_port2 __sfr *)0x8C002) -#define PORT3 (*(volatile struct st_port3 __sfr *)0x8C003) -#define PORT4 (*(volatile struct st_port4 __sfr *)0x8C004) -#define PORT5 (*(volatile struct st_port5 __sfr *)0x8C005) -#define PORT6 (*(volatile struct st_port6 __sfr *)0x8C006) -#define PORT7 (*(volatile struct st_port7 __sfr *)0x8C007) -#define PORT8 (*(volatile struct st_port8 __sfr *)0x8C008) -#define PORT9 (*(volatile struct st_port9 __sfr *)0x8C009) -#define PORTA (*(volatile struct st_porta __sfr *)0x8C00A) -#define PORTB (*(volatile struct st_portb __sfr *)0x8C00B) -#define PORTC (*(volatile struct st_portc __sfr *)0x8C00C) -#define PORTD (*(volatile struct st_portd __sfr *)0x8C00D) -#define PORTE (*(volatile struct st_porte __sfr *)0x8C00E) -#define PORTF (*(volatile struct st_portf __sfr *)0x8C00F) -#define PORTG (*(volatile struct st_portg __sfr *)0x8C010) -#define PORTJ (*(volatile struct st_portj __sfr *)0x8C012) -#define PPG0 (*(volatile struct st_ppg0 __sfr *)0x881E6) -#define PPG1 (*(volatile struct st_ppg1 __sfr *)0x881F0) -#define QSPI (*(volatile struct st_qspi __sfr *)0x89E00) -#define RAM (*(volatile struct st_ram __sfr *)0x81200) -#define RIIC0 (*(volatile struct st_riic __sfr *)0x88300) -#define RIIC1 (*(volatile struct st_riic __sfr *)0x88320) -#define RIIC2 (*(volatile struct st_riic __sfr *)0x88340) -#define RSPI0 (*(volatile struct st_rspi __sfr *)0xD0100) -#define RSPI1 (*(volatile struct st_rspi __sfr *)0xD0140) -#define RSPI2 (*(volatile struct st_rspi __sfr *)0xD0300) -#define RTC (*(volatile struct st_rtc __sfr *)0x8C400) -#define S12AD (*(volatile struct st_s12ad __sfr *)0x89000) -#define S12AD1 (*(volatile struct st_s12ad1 __sfr *)0x89100) -#define SCI0 (*(volatile struct st_sci0 __sfr *)0x8A000) -#define SCI1 (*(volatile struct st_sci0 __sfr *)0x8A020) -#define SCI2 (*(volatile struct st_sci0 __sfr *)0x8A040) -#define SCI3 (*(volatile struct st_sci0 __sfr *)0x8A060) -#define SCI4 (*(volatile struct st_sci0 __sfr *)0x8A080) -#define SCI5 (*(volatile struct st_sci0 __sfr *)0x8A0A0) -#define SCI6 (*(volatile struct st_sci0 __sfr *)0x8A0C0) -#define SCI7 (*(volatile struct st_sci0 __sfr *)0x8A0E0) -#define SCI8 (*(volatile struct st_sci0 __sfr *)0x8A100) -#define SCI9 (*(volatile struct st_sci0 __sfr *)0x8A120) -#define SCI10 (*(volatile struct st_sci10 __sfr *)0xD0040) -#define SCI11 (*(volatile struct st_sci10 __sfr *)0xD0060) -#define SCI12 (*(volatile struct st_sci12 __sfr *)0x8B300) -#define SDHI (*(volatile struct st_sdhi __sfr *)0x8AC00) -#define SDSI (*(volatile struct st_sdsi __sfr *)0x95000) -#define SMCI0 (*(volatile struct st_smci0 __sfr *)0x8A000) -#define SMCI1 (*(volatile struct st_smci0 __sfr *)0x8A020) -#define SMCI2 (*(volatile struct st_smci0 __sfr *)0x8A040) -#define SMCI3 (*(volatile struct st_smci0 __sfr *)0x8A060) -#define SMCI4 (*(volatile struct st_smci0 __sfr *)0x8A080) -#define SMCI5 (*(volatile struct st_smci0 __sfr *)0x8A0A0) -#define SMCI6 (*(volatile struct st_smci0 __sfr *)0x8A0C0) -#define SMCI7 (*(volatile struct st_smci0 __sfr *)0x8A0E0) -#define SMCI8 (*(volatile struct st_smci0 __sfr *)0x8A100) -#define SMCI9 (*(volatile struct st_smci0 __sfr *)0x8A120) -#define SMCI10 (*(volatile struct st_smci10 __sfr *)0xD0046) -#define SMCI11 (*(volatile struct st_smci10 __sfr *)0xD0066) -#define SMCI12 (*(volatile struct st_smci0 __sfr *)0x8B300) -#define SYSTEM (*(volatile struct st_system __sfr *)0x80000) -#define TEMPS (*(volatile struct st_temps __sfr *)0x8C500) -#define TMR0 (*(volatile struct st_tmr0 __sfr *)0x88200) -#define TMR1 (*(volatile struct st_tmr1 __sfr *)0x88201) -#define TMR2 (*(volatile struct st_tmr0 __sfr *)0x88210) -#define TMR3 (*(volatile struct st_tmr1 __sfr *)0x88211) -#define TMR01 (*(volatile struct st_tmr01 __sfr *)0x88204) -#define TMR23 (*(volatile struct st_tmr01 __sfr *)0x88214) -#define TPU0 (*(volatile struct st_tpu0 __sfr *)0x88108) -#define TPU1 (*(volatile struct st_tpu1 __sfr *)0x88108) -#define TPU2 (*(volatile struct st_tpu2 __sfr *)0x8810A) -#define TPU3 (*(volatile struct st_tpu3 __sfr *)0x8810A) -#define TPU4 (*(volatile struct st_tpu4 __sfr *)0x8810C) -#define TPU5 (*(volatile struct st_tpu5 __sfr *)0x8810C) -#define TPUA (*(volatile struct st_tpua __sfr *)0x88100) -#define USB (*(volatile struct st_usb __sfr *)0xA0400) -#define USB0 (*(volatile struct st_usb0 __sfr *)0xA0000) -#define WDT (*(volatile struct st_wdt __sfr *)0x88020) -#define FLASHCONST (*(volatile struct st_flashconst __sfr *)0xFE7F7D90) -#define TEMPSCONST (*(volatile struct st_tempsconst __sfr *)0xFE7F7D7C) - -typedef enum enum_ir { -IR_BSC_BUSERR=16,IR_RAM_RAMERR=18, -IR_FCU_FIFERR=21,IR_FCU_FRDYI=23, -IR_ICU_SWINT2=26,IR_ICU_SWINT, -IR_CMT0_CMI0, -IR_CMT1_CMI1, -IR_CMTW0_CMWI0, -IR_CMTW1_CMWI1, -IR_USB0_D0FIFO0=34,IR_USB0_D1FIFO0, -IR_RSPI0_SPRI0=38,IR_RSPI0_SPTI0, -IR_RSPI1_SPRI1,IR_RSPI1_SPTI1, -IR_QSPI_SPRI,IR_QSPI_SPTI, -IR_SDHI_SBFAI, -IR_MMCIF_MBFAI, -IR_RIIC1_RXI1=50,IR_RIIC1_TXI1, -IR_RIIC0_RXI0,IR_RIIC0_TXI0, -IR_RIIC2_RXI2,IR_RIIC2_TXI2, -IR_SCI0_RXI0=58,IR_SCI0_TXI0, -IR_SCI1_RXI1,IR_SCI1_TXI1, -IR_SCI2_RXI2,IR_SCI2_TXI2, -IR_ICU_IRQ0,IR_ICU_IRQ1,IR_ICU_IRQ2,IR_ICU_IRQ3,IR_ICU_IRQ4,IR_ICU_IRQ5,IR_ICU_IRQ6,IR_ICU_IRQ7, -IR_ICU_IRQ8,IR_ICU_IRQ9,IR_ICU_IRQ10,IR_ICU_IRQ11,IR_ICU_IRQ12,IR_ICU_IRQ13,IR_ICU_IRQ14,IR_ICU_IRQ15, -IR_SCI3_RXI3,IR_SCI3_TXI3, -IR_SCI4_RXI4,IR_SCI4_TXI4, -IR_SCI5_RXI5,IR_SCI5_TXI5, -IR_SCI6_RXI6,IR_SCI6_TXI6, -IR_LVD1_LVD1, -IR_LVD2_LVD2, -IR_USB0_USBR0, -IR_RTC_ALM=92,IR_RTC_PRD, -IR_IWDT_IWUNI=95, -IR_WDT_WUNI, -IR_PDC_PCDFI, -IR_SCI7_RXI7,IR_SCI7_TXI7, -IR_SCI8_RXI8,IR_SCI8_TXI8, -IR_SCI9_RXI9,IR_SCI9_TXI9, -IR_SCI10_RXI10,IR_SCI10_TXI10, -IR_ICU_GROUPBE0,IR_ICU_GROUPBL2, -IR_RSPI2_SPRI2,IR_RSPI2_SPTI2, -IR_ICU_GROUPBL0,IR_ICU_GROUPBL1,IR_ICU_GROUPAL0,IR_ICU_GROUPAL1, -IR_SCI11_RXI11,IR_SCI11_TXI11, -IR_SCI12_RXI12,IR_SCI12_TXI12, -IR_DMAC_DMAC0I=120,IR_DMAC_DMAC1I,IR_DMAC_DMAC2I,IR_DMAC_DMAC3I,IR_DMAC_DMAC74I, -IR_OST_OSTDI, -IR_EXDMAC_EXDMAC0I,IR_EXDMAC_EXDMAC1I, -IR_PERIB_INTB128,IR_PERIB_INTB129,IR_PERIB_INTB130,IR_PERIB_INTB131,IR_PERIB_INTB132, -IR_PERIB_INTB133,IR_PERIB_INTB134,IR_PERIB_INTB135,IR_PERIB_INTB136,IR_PERIB_INTB137, -IR_PERIB_INTB138,IR_PERIB_INTB139,IR_PERIB_INTB140,IR_PERIB_INTB141,IR_PERIB_INTB142, -IR_PERIB_INTB143,IR_PERIB_INTB144,IR_PERIB_INTB145,IR_PERIB_INTB146,IR_PERIB_INTB147, -IR_PERIB_INTB148,IR_PERIB_INTB149,IR_PERIB_INTB150,IR_PERIB_INTB151,IR_PERIB_INTB152, -IR_PERIB_INTB153,IR_PERIB_INTB154,IR_PERIB_INTB155,IR_PERIB_INTB156,IR_PERIB_INTB157, -IR_PERIB_INTB158,IR_PERIB_INTB159,IR_PERIB_INTB160,IR_PERIB_INTB161,IR_PERIB_INTB162, -IR_PERIB_INTB163,IR_PERIB_INTB164,IR_PERIB_INTB165,IR_PERIB_INTB166,IR_PERIB_INTB167, -IR_PERIB_INTB168,IR_PERIB_INTB169,IR_PERIB_INTB170,IR_PERIB_INTB171,IR_PERIB_INTB172, -IR_PERIB_INTB173,IR_PERIB_INTB174,IR_PERIB_INTB175,IR_PERIB_INTB176,IR_PERIB_INTB177, -IR_PERIB_INTB178,IR_PERIB_INTB179,IR_PERIB_INTB180,IR_PERIB_INTB181,IR_PERIB_INTB182, -IR_PERIB_INTB183,IR_PERIB_INTB184,IR_PERIB_INTB185,IR_PERIB_INTB186,IR_PERIB_INTB187, -IR_PERIB_INTB188,IR_PERIB_INTB189,IR_PERIB_INTB190,IR_PERIB_INTB191,IR_PERIB_INTB192, -IR_PERIB_INTB193,IR_PERIB_INTB194,IR_PERIB_INTB195,IR_PERIB_INTB196,IR_PERIB_INTB197, -IR_PERIB_INTB198,IR_PERIB_INTB199,IR_PERIB_INTB200,IR_PERIB_INTB201,IR_PERIB_INTB202, -IR_PERIB_INTB203,IR_PERIB_INTB204,IR_PERIB_INTB205,IR_PERIB_INTB206,IR_PERIB_INTB207, -IR_PERIA_INTA208,IR_PERIA_INTA209,IR_PERIA_INTA210,IR_PERIA_INTA211,IR_PERIA_INTA212, -IR_PERIA_INTA213,IR_PERIA_INTA214,IR_PERIA_INTA215,IR_PERIA_INTA216,IR_PERIA_INTA217, -IR_PERIA_INTA218,IR_PERIA_INTA219,IR_PERIA_INTA220,IR_PERIA_INTA221,IR_PERIA_INTA222, -IR_PERIA_INTA223,IR_PERIA_INTA224,IR_PERIA_INTA225,IR_PERIA_INTA226,IR_PERIA_INTA227, -IR_PERIA_INTA228,IR_PERIA_INTA229,IR_PERIA_INTA230,IR_PERIA_INTA231,IR_PERIA_INTA232, -IR_PERIA_INTA233,IR_PERIA_INTA234,IR_PERIA_INTA235,IR_PERIA_INTA236,IR_PERIA_INTA237, -IR_PERIA_INTA238,IR_PERIA_INTA239,IR_PERIA_INTA240,IR_PERIA_INTA241,IR_PERIA_INTA242, -IR_PERIA_INTA243,IR_PERIA_INTA244,IR_PERIA_INTA245,IR_PERIA_INTA246,IR_PERIA_INTA247, -IR_PERIA_INTA248,IR_PERIA_INTA249,IR_PERIA_INTA250,IR_PERIA_INTA251,IR_PERIA_INTA252, -IR_PERIA_INTA253,IR_PERIA_INTA254,IR_PERIA_INTA255 -} enum_ir_t; - -typedef enum enum_dtce { -DTCE_ICU_SWINT2=26,DTCE_ICU_SWINT, -DTCE_CMT0_CMI0, -DTCE_CMT1_CMI1, -DTCE_CMTW0_CMWI0, -DTCE_CMTW1_CMWI1, -DTCE_USB0_D0FIFO0=34,DTCE_USB0_D1FIFO0, -DTCE_RSPI0_SPRI0=38,DTCE_RSPI0_SPTI0, -DTCE_RSPI1_SPRI1,DTCE_RSPI1_SPTI1, -DTCE_QSPI_SPRI,DTCE_QSPI_SPTI, -DTCE_SDHI_SBFAI, -DTCE_MMCIF_MBFAI, -DTCE_RIIC1_RXI1=50,DTCE_RIIC1_TXI1, -DTCE_RIIC0_RXI0,DTCE_RIIC0_TXI0, -DTCE_RIIC2_RXI2,DTCE_RIIC2_TXI2, -DTCE_SCI0_RXI0=58,DTCE_SCI0_TXI0, -DTCE_SCI1_RXI1,DTCE_SCI1_TXI1, -DTCE_SCI2_RXI2,DTCE_SCI2_TXI2, -DTCE_ICU_IRQ0,DTCE_ICU_IRQ1,DTCE_ICU_IRQ2,DTCE_ICU_IRQ3,DTCE_ICU_IRQ4,DTCE_ICU_IRQ5,DTCE_ICU_IRQ6,DTCE_ICU_IRQ7, -DTCE_ICU_IRQ8,DTCE_ICU_IRQ9,DTCE_ICU_IRQ10,DTCE_ICU_IRQ11,DTCE_ICU_IRQ12,DTCE_ICU_IRQ13,DTCE_ICU_IRQ14,DTCE_ICU_IRQ15, -DTCE_SCI3_RXI3,DTCE_SCI3_TXI3, -DTCE_SCI4_RXI4,DTCE_SCI4_TXI4, -DTCE_SCI5_RXI5,DTCE_SCI5_TXI5, -DTCE_SCI6_RXI6,DTCE_SCI6_TXI6, -DTCE_PDC_PCDFI=97, -DTCE_SCI7_RXI7,DTCE_SCI7_TXI7, -DTCE_SCI8_RXI8,DTCE_SCI8_TXI8, -DTCE_SCI9_RXI9,DTCE_SCI9_TXI9, -DTCE_SCI10_RXI10,DTCE_SCI10_TXI10, -DTCE_RSPI2_SPRI2=108,DTCE_RSPI2_SPTI2, -DTCE_SCI11_RXI11=114,DTCE_SCI11_TXI11, -DTCE_SCI12_RXI12,DTCE_SCI12_TXI12, -DTCE_DMAC_DMAC0I=120,DTCE_DMAC_DMAC1I,DTCE_DMAC_DMAC2I,DTCE_DMAC_DMAC3I, -DTCE_EXDMAC_EXDMAC0I=126,DTCE_EXDMAC_EXDMAC1I, -DTCE_PERIB_INTB128,DTCE_PERIB_INTB129,DTCE_PERIB_INTB130,DTCE_PERIB_INTB131,DTCE_PERIB_INTB132, -DTCE_PERIB_INTB133,DTCE_PERIB_INTB134,DTCE_PERIB_INTB135,DTCE_PERIB_INTB136,DTCE_PERIB_INTB137, -DTCE_PERIB_INTB138,DTCE_PERIB_INTB139,DTCE_PERIB_INTB140,DTCE_PERIB_INTB141,DTCE_PERIB_INTB142, -DTCE_PERIB_INTB143,DTCE_PERIB_INTB144,DTCE_PERIB_INTB145,DTCE_PERIB_INTB146,DTCE_PERIB_INTB147, -DTCE_PERIB_INTB148,DTCE_PERIB_INTB149,DTCE_PERIB_INTB150,DTCE_PERIB_INTB151,DTCE_PERIB_INTB152, -DTCE_PERIB_INTB153,DTCE_PERIB_INTB154,DTCE_PERIB_INTB155,DTCE_PERIB_INTB156,DTCE_PERIB_INTB157, -DTCE_PERIB_INTB158,DTCE_PERIB_INTB159,DTCE_PERIB_INTB160,DTCE_PERIB_INTB161,DTCE_PERIB_INTB162, -DTCE_PERIB_INTB163,DTCE_PERIB_INTB164,DTCE_PERIB_INTB165,DTCE_PERIB_INTB166,DTCE_PERIB_INTB167, -DTCE_PERIB_INTB168,DTCE_PERIB_INTB169,DTCE_PERIB_INTB170,DTCE_PERIB_INTB171,DTCE_PERIB_INTB172, -DTCE_PERIB_INTB173,DTCE_PERIB_INTB174,DTCE_PERIB_INTB175,DTCE_PERIB_INTB176,DTCE_PERIB_INTB177, -DTCE_PERIB_INTB178,DTCE_PERIB_INTB179,DTCE_PERIB_INTB180,DTCE_PERIB_INTB181,DTCE_PERIB_INTB182, -DTCE_PERIB_INTB183,DTCE_PERIB_INTB184,DTCE_PERIB_INTB185,DTCE_PERIB_INTB186,DTCE_PERIB_INTB187, -DTCE_PERIB_INTB188,DTCE_PERIB_INTB189,DTCE_PERIB_INTB190,DTCE_PERIB_INTB191,DTCE_PERIB_INTB192, -DTCE_PERIB_INTB193,DTCE_PERIB_INTB194,DTCE_PERIB_INTB195,DTCE_PERIB_INTB196,DTCE_PERIB_INTB197, -DTCE_PERIB_INTB198,DTCE_PERIB_INTB199,DTCE_PERIB_INTB200,DTCE_PERIB_INTB201,DTCE_PERIB_INTB202, -DTCE_PERIB_INTB203,DTCE_PERIB_INTB204,DTCE_PERIB_INTB205,DTCE_PERIB_INTB206,DTCE_PERIB_INTB207, -DTCE_PERIA_INTA208,DTCE_PERIA_INTA209,DTCE_PERIA_INTA210,DTCE_PERIA_INTA211,DTCE_PERIA_INTA212, -DTCE_PERIA_INTA213,DTCE_PERIA_INTA214,DTCE_PERIA_INTA215,DTCE_PERIA_INTA216,DTCE_PERIA_INTA217, -DTCE_PERIA_INTA218,DTCE_PERIA_INTA219,DTCE_PERIA_INTA220,DTCE_PERIA_INTA221,DTCE_PERIA_INTA222, -DTCE_PERIA_INTA223,DTCE_PERIA_INTA224,DTCE_PERIA_INTA225,DTCE_PERIA_INTA226,DTCE_PERIA_INTA227, -DTCE_PERIA_INTA228,DTCE_PERIA_INTA229,DTCE_PERIA_INTA230,DTCE_PERIA_INTA231,DTCE_PERIA_INTA232, -DTCE_PERIA_INTA233,DTCE_PERIA_INTA234,DTCE_PERIA_INTA235,DTCE_PERIA_INTA236,DTCE_PERIA_INTA237, -DTCE_PERIA_INTA238,DTCE_PERIA_INTA239,DTCE_PERIA_INTA240,DTCE_PERIA_INTA241,DTCE_PERIA_INTA242, -DTCE_PERIA_INTA243,DTCE_PERIA_INTA244,DTCE_PERIA_INTA245,DTCE_PERIA_INTA246,DTCE_PERIA_INTA247, -DTCE_PERIA_INTA248,DTCE_PERIA_INTA249,DTCE_PERIA_INTA250,DTCE_PERIA_INTA251,DTCE_PERIA_INTA252, -DTCE_PERIA_INTA253,DTCE_PERIA_INTA254,DTCE_PERIA_INTA255 -} enum_dtce_t; - -typedef enum enum_ier { -IER_BSC_BUSERR=0x02, -IER_RAM_RAMERR=0x02, -IER_FCU_FIFERR=0x02,IER_FCU_FRDYI=0x02, -IER_ICU_SWINT2=0x03,IER_ICU_SWINT=0x03, -IER_CMT0_CMI0=0x03, -IER_CMT1_CMI1=0x03, -IER_CMTW0_CMWI0=0x03, -IER_CMTW1_CMWI1=0x03, -IER_USB0_D0FIFO0=0x04,IER_USB0_D1FIFO0=0x04, -IER_RSPI0_SPRI0=0x04,IER_RSPI0_SPTI0=0x04, -IER_RSPI1_SPRI1=0x05,IER_RSPI1_SPTI1=0x05, -IER_QSPI_SPRI=0x05,IER_QSPI_SPTI=0x05, -IER_SDHI_SBFAI=0x05, -IER_MMCIF_MBFAI=0x05, -IER_RIIC1_RXI1=0x06,IER_RIIC1_TXI1=0x06, -IER_RIIC0_RXI0=0x06,IER_RIIC0_TXI0=0x06, -IER_RIIC2_RXI2=0x06,IER_RIIC2_TXI2=0x06, -IER_SCI0_RXI0=0x07,IER_SCI0_TXI0=0x07, -IER_SCI1_RXI1=0x07,IER_SCI1_TXI1=0x07, -IER_SCI2_RXI2=0x07,IER_SCI2_TXI2=0x07, -IER_ICU_IRQ0=0x08,IER_ICU_IRQ1=0x08,IER_ICU_IRQ2=0x08,IER_ICU_IRQ3=0x08,IER_ICU_IRQ4=0x08,IER_ICU_IRQ5=0x08,IER_ICU_IRQ6=0x08,IER_ICU_IRQ7=0x08, -IER_ICU_IRQ8=0x09,IER_ICU_IRQ9=0x09,IER_ICU_IRQ10=0x09,IER_ICU_IRQ11=0x09,IER_ICU_IRQ12=0x09,IER_ICU_IRQ13=0x09,IER_ICU_IRQ14=0x09,IER_ICU_IRQ15=0x09, -IER_SCI3_RXI3=0x0A,IER_SCI3_TXI3=0x0A, -IER_SCI4_RXI4=0x0A,IER_SCI4_TXI4=0x0A, -IER_SCI5_RXI5=0x0A,IER_SCI5_TXI5=0x0A, -IER_SCI6_RXI6=0x0A,IER_SCI6_TXI6=0x0A, -IER_LVD1_LVD1=0x0B, -IER_LVD2_LVD2=0x0B, -IER_USB0_USBR0=0x0B, -IER_RTC_ALM=0x0B,IER_RTC_PRD=0x0B, -IER_IWDT_IWUNI=0x0B, -IER_WDT_WUNI=0x0C, -IER_PDC_PCDFI=0x0C, -IER_SCI7_RXI7=0x0C,IER_SCI7_TXI7=0x0C, -IER_SCI8_RXI8=0x0C,IER_SCI8_TXI8=0x0C, -IER_SCI9_RXI9=0x0C,IER_SCI9_TXI9=0x0C, -IER_SCI10_RXI10=0x0D,IER_SCI10_TXI10=0x0D, -IER_ICU_GROUPBE0=0x0D,IER_ICU_GROUPBL2=0x0D, -IER_RSPI2_SPRI2=0x0D,IER_RSPI2_SPTI2=0x0D, -IER_ICU_GROUPBL0=0x0D,IER_ICU_GROUPBL1=0x0D,IER_ICU_GROUPAL0=0x0E,IER_ICU_GROUPAL1=0x0E, -IER_SCI11_RXI11=0x0E,IER_SCI11_TXI11=0x0E, -IER_SCI12_RXI12=0x0E,IER_SCI12_TXI12=0x0E, -IER_DMAC_DMAC0I=0x0F,IER_DMAC_DMAC1I=0x0F,IER_DMAC_DMAC2I=0x0F,IER_DMAC_DMAC3I=0x0F,IER_DMAC_DMAC74I=0x0F, -IER_OST_OSTDI=0x0F, -IER_EXDMAC_EXDMAC0I=0x0F,IER_EXDMAC_EXDMAC1I=0x0F, -IER_PERIB_INTB128=0x10,IER_PERIB_INTB129=0x10,IER_PERIB_INTB130=0x10,IER_PERIB_INTB131=0x10,IER_PERIB_INTB132=0x10, -IER_PERIB_INTB133=0x10,IER_PERIB_INTB134=0x10,IER_PERIB_INTB135=0x10,IER_PERIB_INTB136=0x11,IER_PERIB_INTB137=0x11, -IER_PERIB_INTB138=0x11,IER_PERIB_INTB139=0x11,IER_PERIB_INTB140=0x11,IER_PERIB_INTB141=0x11,IER_PERIB_INTB142=0x11, -IER_PERIB_INTB143=0x11,IER_PERIB_INTB144=0x12,IER_PERIB_INTB145=0x12,IER_PERIB_INTB146=0x12,IER_PERIB_INTB147=0x12, -IER_PERIB_INTB148=0x12,IER_PERIB_INTB149=0x12,IER_PERIB_INTB150=0x12,IER_PERIB_INTB151=0x12,IER_PERIB_INTB152=0x13, -IER_PERIB_INTB153=0x13,IER_PERIB_INTB154=0x13,IER_PERIB_INTB155=0x13,IER_PERIB_INTB156=0x13,IER_PERIB_INTB157=0x13, -IER_PERIB_INTB158=0x13,IER_PERIB_INTB159=0x13,IER_PERIB_INTB160=0x14,IER_PERIB_INTB161=0x14,IER_PERIB_INTB162=0x14, -IER_PERIB_INTB163=0x14,IER_PERIB_INTB164=0x14,IER_PERIB_INTB165=0x14,IER_PERIB_INTB166=0x14,IER_PERIB_INTB167=0x14, -IER_PERIB_INTB168=0x15,IER_PERIB_INTB169=0x15,IER_PERIB_INTB170=0x15,IER_PERIB_INTB171=0x15,IER_PERIB_INTB172=0x15, -IER_PERIB_INTB173=0x15,IER_PERIB_INTB174=0x15,IER_PERIB_INTB175=0x15,IER_PERIB_INTB176=0x16,IER_PERIB_INTB177=0x16, -IER_PERIB_INTB178=0x16,IER_PERIB_INTB179=0x16,IER_PERIB_INTB180=0x16,IER_PERIB_INTB181=0x16,IER_PERIB_INTB182=0x16, -IER_PERIB_INTB183=0x16,IER_PERIB_INTB184=0x17,IER_PERIB_INTB185=0x17,IER_PERIB_INTB186=0x17,IER_PERIB_INTB187=0x17, -IER_PERIB_INTB188=0x17,IER_PERIB_INTB189=0x17,IER_PERIB_INTB190=0x17,IER_PERIB_INTB191=0x17,IER_PERIB_INTB192=0x18, -IER_PERIB_INTB193=0x18,IER_PERIB_INTB194=0x18,IER_PERIB_INTB195=0x18,IER_PERIB_INTB196=0x18,IER_PERIB_INTB197=0x18, -IER_PERIB_INTB198=0x18,IER_PERIB_INTB199=0x18,IER_PERIB_INTB200=0x19,IER_PERIB_INTB201=0x19,IER_PERIB_INTB202=0x19, -IER_PERIB_INTB203=0x19,IER_PERIB_INTB204=0x19,IER_PERIB_INTB205=0x19,IER_PERIB_INTB206=0x19,IER_PERIB_INTB207=0x19, -IER_PERIA_INTA208=0x1A,IER_PERIA_INTA209=0x1A,IER_PERIA_INTA210=0x1A,IER_PERIA_INTA211=0x1A,IER_PERIA_INTA212=0x1A, -IER_PERIA_INTA213=0x1A,IER_PERIA_INTA214=0x1A,IER_PERIA_INTA215=0x1A,IER_PERIA_INTA216=0x1B,IER_PERIA_INTA217=0x1B, -IER_PERIA_INTA218=0x1B,IER_PERIA_INTA219=0x1B,IER_PERIA_INTA220=0x1B,IER_PERIA_INTA221=0x1B,IER_PERIA_INTA222=0x1B, -IER_PERIA_INTA223=0x1B,IER_PERIA_INTA224=0x1C,IER_PERIA_INTA225=0x1C,IER_PERIA_INTA226=0x1C,IER_PERIA_INTA227=0x1C, -IER_PERIA_INTA228=0x1C,IER_PERIA_INTA229=0x1C,IER_PERIA_INTA230=0x1C,IER_PERIA_INTA231=0x1C,IER_PERIA_INTA232=0x1D, -IER_PERIA_INTA233=0x1D,IER_PERIA_INTA234=0x1D,IER_PERIA_INTA235=0x1D,IER_PERIA_INTA236=0x1D,IER_PERIA_INTA237=0x1D, -IER_PERIA_INTA238=0x1D,IER_PERIA_INTA239=0x1D,IER_PERIA_INTA240=0x1E,IER_PERIA_INTA241=0x1E,IER_PERIA_INTA242=0x1E, -IER_PERIA_INTA243=0x1E,IER_PERIA_INTA244=0x1E,IER_PERIA_INTA245=0x1E,IER_PERIA_INTA246=0x1E,IER_PERIA_INTA247=0x1E, -IER_PERIA_INTA248=0x1F,IER_PERIA_INTA249=0x1F,IER_PERIA_INTA250=0x1F,IER_PERIA_INTA251=0x1F,IER_PERIA_INTA252=0x1F, -IER_PERIA_INTA253=0x1F,IER_PERIA_INTA254=0x1F,IER_PERIA_INTA255=0x1F -} enum_ier_t; - -typedef enum enum_ipr { -IPR_BSC_BUSERR=0, -IPR_RAM_RAMERR=0, -IPR_FCU_FIFERR=1,IPR_FCU_FRDYI=2, -IPR_ICU_SWINT2=3,IPR_ICU_SWINT=3, -IPR_CMT0_CMI0=4, -IPR_CMT1_CMI1=5, -IPR_CMTW0_CMWI0=6, -IPR_CMTW1_CMWI1=7, -IPR_USB0_D0FIFO0=34,IPR_USB0_D1FIFO0=35, -IPR_RSPI0_SPRI0=38,IPR_RSPI0_SPTI0=39, -IPR_RSPI1_SPRI1=40,IPR_RSPI1_SPTI1=41, -IPR_QSPI_SPRI=42,IPR_QSPI_SPTI=43, -IPR_SDHI_SBFAI=44, -IPR_MMCIF_MBFAI=45, -IPR_RIIC1_RXI1=50,IPR_RIIC1_TXI1=51, -IPR_RIIC0_RXI0=52,IPR_RIIC0_TXI0=53, -IPR_RIIC2_RXI2=54,IPR_RIIC2_TXI2=55, -IPR_SCI0_RXI0=58,IPR_SCI0_TXI0=59, -IPR_SCI1_RXI1=60,IPR_SCI1_TXI1=61, -IPR_SCI2_RXI2=62,IPR_SCI2_TXI2=63, -IPR_ICU_IRQ0=64,IPR_ICU_IRQ1=65,IPR_ICU_IRQ2=66,IPR_ICU_IRQ3=67,IPR_ICU_IRQ4=68,IPR_ICU_IRQ5=69,IPR_ICU_IRQ6=70,IPR_ICU_IRQ7=71, -IPR_ICU_IRQ8=72,IPR_ICU_IRQ9=73,IPR_ICU_IRQ10=74,IPR_ICU_IRQ11=75,IPR_ICU_IRQ12=76,IPR_ICU_IRQ13=77,IPR_ICU_IRQ14=78,IPR_ICU_IRQ15=79, -IPR_SCI3_RXI3=80,IPR_SCI3_TXI3=81, -IPR_SCI4_RXI4=82,IPR_SCI4_TXI4=83, -IPR_SCI5_RXI5=84,IPR_SCI5_TXI5=85, -IPR_SCI6_RXI6=86,IPR_SCI6_TXI6=87, -IPR_LVD1_LVD1=88, -IPR_LVD2_LVD2=89, -IPR_USB0_USBR0=90, -IPR_RTC_ALM=92,IPR_RTC_PRD=93, -IPR_IWDT_IWUNI=95, -IPR_WDT_WUNI=96, -IPR_PDC_PCDFI=97, -IPR_SCI7_RXI7=98,IPR_SCI7_TXI7=99, -IPR_SCI8_RXI8=100,IPR_SCI8_TXI8=101, -IPR_SCI9_RXI9=102,IPR_SCI9_TXI9=103, -IPR_SCI10_RXI10=104,IPR_SCI10_TXI10=105, -IPR_ICU_GROUPBE0=106,IPR_ICU_GROUPBL2=107, -IPR_RSPI2_SPRI2=108,IPR_RSPI2_SPTI2=109, -IPR_ICU_GROUPBL0=110,IPR_ICU_GROUPBL1=111,IPR_ICU_GROUPAL0=112,IPR_ICU_GROUPAL1=113, -IPR_SCI11_RXI11=114,IPR_SCI11_TXI11=115, -IPR_SCI12_RXI12=116,IPR_SCI12_TXI12=117, -IPR_DMAC_DMAC0I=120,IPR_DMAC_DMAC1I=121,IPR_DMAC_DMAC2I=122,IPR_DMAC_DMAC3I=123,IPR_DMAC_DMAC74I=124, -IPR_OST_OSTDI=125, -IPR_EXDMAC_EXDMAC0I=126,IPR_EXDMAC_EXDMAC1I=127, -IPR_PERIB_INTB128=128,IPR_PERIB_INTB129=129,IPR_PERIB_INTB130=130,IPR_PERIB_INTB131=131,IPR_PERIB_INTB132=132, -IPR_PERIB_INTB133=133,IPR_PERIB_INTB134=134,IPR_PERIB_INTB135=135,IPR_PERIB_INTB136=136,IPR_PERIB_INTB137=137, -IPR_PERIB_INTB138=138,IPR_PERIB_INTB139=139,IPR_PERIB_INTB140=140,IPR_PERIB_INTB141=141,IPR_PERIB_INTB142=142, -IPR_PERIB_INTB143=143,IPR_PERIB_INTB144=144,IPR_PERIB_INTB145=145,IPR_PERIB_INTB146=146,IPR_PERIB_INTB147=147, -IPR_PERIB_INTB148=148,IPR_PERIB_INTB149=149,IPR_PERIB_INTB150=150,IPR_PERIB_INTB151=151,IPR_PERIB_INTB152=152, -IPR_PERIB_INTB153=153,IPR_PERIB_INTB154=154,IPR_PERIB_INTB155=155,IPR_PERIB_INTB156=156,IPR_PERIB_INTB157=157, -IPR_PERIB_INTB158=158,IPR_PERIB_INTB159=159,IPR_PERIB_INTB160=160,IPR_PERIB_INTB161=161,IPR_PERIB_INTB162=162, -IPR_PERIB_INTB163=163,IPR_PERIB_INTB164=164,IPR_PERIB_INTB165=165,IPR_PERIB_INTB166=166,IPR_PERIB_INTB167=167, -IPR_PERIB_INTB168=168,IPR_PERIB_INTB169=169,IPR_PERIB_INTB170=170,IPR_PERIB_INTB171=171,IPR_PERIB_INTB172=172, -IPR_PERIB_INTB173=173,IPR_PERIB_INTB174=174,IPR_PERIB_INTB175=175,IPR_PERIB_INTB176=176,IPR_PERIB_INTB177=177, -IPR_PERIB_INTB178=178,IPR_PERIB_INTB179=179,IPR_PERIB_INTB180=180,IPR_PERIB_INTB181=181,IPR_PERIB_INTB182=182, -IPR_PERIB_INTB183=183,IPR_PERIB_INTB184=184,IPR_PERIB_INTB185=185,IPR_PERIB_INTB186=186,IPR_PERIB_INTB187=187, -IPR_PERIB_INTB188=188,IPR_PERIB_INTB189=189,IPR_PERIB_INTB190=190,IPR_PERIB_INTB191=191,IPR_PERIB_INTB192=192, -IPR_PERIB_INTB193=193,IPR_PERIB_INTB194=194,IPR_PERIB_INTB195=195,IPR_PERIB_INTB196=196,IPR_PERIB_INTB197=197, -IPR_PERIB_INTB198=198,IPR_PERIB_INTB199=199,IPR_PERIB_INTB200=200,IPR_PERIB_INTB201=201,IPR_PERIB_INTB202=202, -IPR_PERIB_INTB203=203,IPR_PERIB_INTB204=204,IPR_PERIB_INTB205=205,IPR_PERIB_INTB206=206,IPR_PERIB_INTB207=207, -IPR_PERIA_INTA208=208,IPR_PERIA_INTA209=209,IPR_PERIA_INTA210=210,IPR_PERIA_INTA211=211,IPR_PERIA_INTA212=212, -IPR_PERIA_INTA213=213,IPR_PERIA_INTA214=214,IPR_PERIA_INTA215=215,IPR_PERIA_INTA216=216,IPR_PERIA_INTA217=217, -IPR_PERIA_INTA218=218,IPR_PERIA_INTA219=219,IPR_PERIA_INTA220=220,IPR_PERIA_INTA221=221,IPR_PERIA_INTA222=222, -IPR_PERIA_INTA223=223,IPR_PERIA_INTA224=224,IPR_PERIA_INTA225=225,IPR_PERIA_INTA226=226,IPR_PERIA_INTA227=227, -IPR_PERIA_INTA228=228,IPR_PERIA_INTA229=229,IPR_PERIA_INTA230=230,IPR_PERIA_INTA231=231,IPR_PERIA_INTA232=232, -IPR_PERIA_INTA233=233,IPR_PERIA_INTA234=234,IPR_PERIA_INTA235=235,IPR_PERIA_INTA236=236,IPR_PERIA_INTA237=237, -IPR_PERIA_INTA238=238,IPR_PERIA_INTA239=239,IPR_PERIA_INTA240=240,IPR_PERIA_INTA241=241,IPR_PERIA_INTA242=242, -IPR_PERIA_INTA243=243,IPR_PERIA_INTA244=244,IPR_PERIA_INTA245=245,IPR_PERIA_INTA246=246,IPR_PERIA_INTA247=247, -IPR_PERIA_INTA248=248,IPR_PERIA_INTA249=249,IPR_PERIA_INTA250=250,IPR_PERIA_INTA251=251,IPR_PERIA_INTA252=252, -IPR_PERIA_INTA253=253,IPR_PERIA_INTA254=254,IPR_PERIA_INTA255=255, -IPR_ICU_SWI=3, -IPR_CMT0_=4, -IPR_CMT1_=5, -IPR_CMTW0_=6, -IPR_CMTW1_=7, -IPR_SDHI_=44, -IPR_MMCIF_=45, -IPR_LVD1_=88, -IPR_LVD2_=89, -IPR_IWDT_=95, -IPR_WDT_=96, -IPR_PDC_=97, -IPR_OST_=125 -} enum_ipr_t; - -#pragma bitfields=reversed -#pragma pack() - -typedef struct st_bsc { - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char STSCLR:1; - } BIT; - } BERCLR; - char wk0[3]; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char TOEN:1; - unsigned char IGAEN:1; - } BIT; - } BEREN; - char wk1[3]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char MST:3; - unsigned char :2; - unsigned char TO:1; - unsigned char IA:1; - } BIT; - } BERSR1; - char wk2[1]; - union { - unsigned short WORD; - struct { - unsigned short ADDR:13; - unsigned short :3; - } BIT; - } BERSR2; - char wk3[4]; - union { - unsigned short WORD; - struct { - unsigned short :2; - unsigned short BPEB:2; - unsigned short BPFB:2; - unsigned short BPHB:2; - unsigned short BPGB:2; - unsigned short BPIB:2; - unsigned short BPRO:2; - unsigned short BPRA:2; - } BIT; - } BUSPRI; - char wk4[7408]; - union { - unsigned short WORD; - struct { - unsigned short PRMOD:1; - unsigned short :5; - unsigned short PWENB:1; - unsigned short PRENB:1; - unsigned short :4; - unsigned short EWENB:1; - unsigned short :2; - unsigned short WRMOD:1; - } BIT; - } CS0MOD; - union { - unsigned long LONG; - struct { - unsigned long :3; - unsigned long CSRWAIT:5; - unsigned long :3; - unsigned long CSWWAIT:5; - unsigned long :5; - unsigned long CSPRWAIT:3; - unsigned long :5; - unsigned long CSPWWAIT:3; - } BIT; - } CS0WCR1; - union { - unsigned long LONG; - struct { - unsigned long :1; - unsigned long CSON:3; - unsigned long :1; - unsigned long WDON:3; - unsigned long :1; - unsigned long WRON:3; - unsigned long :1; - unsigned long RDON:3; - unsigned long :2; - unsigned long AWAIT:2; - unsigned long :1; - unsigned long WDOFF:3; - unsigned long :1; - unsigned long CSWOFF:3; - unsigned long :1; - unsigned long CSROFF:3; - } BIT; - } CS0WCR2; - char wk5[6]; - union { - unsigned short WORD; - struct { - unsigned short PRMOD:1; - unsigned short :5; - unsigned short PWENB:1; - unsigned short PRENB:1; - unsigned short :4; - unsigned short EWENB:1; - unsigned short :2; - unsigned short WRMOD:1; - } BIT; - } CS1MOD; - union { - unsigned long LONG; - struct { - unsigned long :3; - unsigned long CSRWAIT:5; - unsigned long :3; - unsigned long CSWWAIT:5; - unsigned long :5; - unsigned long CSPRWAIT:3; - unsigned long :5; - unsigned long CSPWWAIT:3; - } BIT; - } CS1WCR1; - union { - unsigned long LONG; - struct { - unsigned long :1; - unsigned long CSON:3; - unsigned long :1; - unsigned long WDON:3; - unsigned long :1; - unsigned long WRON:3; - unsigned long :1; - unsigned long RDON:3; - unsigned long :2; - unsigned long AWAIT:2; - unsigned long :1; - unsigned long WDOFF:3; - unsigned long :1; - unsigned long CSWOFF:3; - unsigned long :1; - unsigned long CSROFF:3; - } BIT; - } CS1WCR2; - char wk6[6]; - union { - unsigned short WORD; - struct { - unsigned short PRMOD:1; - unsigned short :5; - unsigned short PWENB:1; - unsigned short PRENB:1; - unsigned short :4; - unsigned short EWENB:1; - unsigned short :2; - unsigned short WRMOD:1; - } BIT; - } CS2MOD; - union { - unsigned long LONG; - struct { - unsigned long :3; - unsigned long CSRWAIT:5; - unsigned long :3; - unsigned long CSWWAIT:5; - unsigned long :5; - unsigned long CSPRWAIT:3; - unsigned long :5; - unsigned long CSPWWAIT:3; - } BIT; - } CS2WCR1; - union { - unsigned long LONG; - struct { - unsigned long :1; - unsigned long CSON:3; - unsigned long :1; - unsigned long WDON:3; - unsigned long :1; - unsigned long WRON:3; - unsigned long :1; - unsigned long RDON:3; - unsigned long :2; - unsigned long AWAIT:2; - unsigned long :1; - unsigned long WDOFF:3; - unsigned long :1; - unsigned long CSWOFF:3; - unsigned long :1; - unsigned long CSROFF:3; - } BIT; - } CS2WCR2; - char wk7[6]; - union { - unsigned short WORD; - struct { - unsigned short PRMOD:1; - unsigned short :5; - unsigned short PWENB:1; - unsigned short PRENB:1; - unsigned short :4; - unsigned short EWENB:1; - unsigned short :2; - unsigned short WRMOD:1; - } BIT; - } CS3MOD; - union { - unsigned long LONG; - struct { - unsigned long :3; - unsigned long CSRWAIT:5; - unsigned long :3; - unsigned long CSWWAIT:5; - unsigned long :5; - unsigned long CSPRWAIT:3; - unsigned long :5; - unsigned long CSPWWAIT:3; - } BIT; - } CS3WCR1; - union { - unsigned long LONG; - struct { - unsigned long :1; - unsigned long CSON:3; - unsigned long :1; - unsigned long WDON:3; - unsigned long :1; - unsigned long WRON:3; - unsigned long :1; - unsigned long RDON:3; - unsigned long :2; - unsigned long AWAIT:2; - unsigned long :1; - unsigned long WDOFF:3; - unsigned long :1; - unsigned long CSWOFF:3; - unsigned long :1; - unsigned long CSROFF:3; - } BIT; - } CS3WCR2; - char wk8[6]; - union { - unsigned short WORD; - struct { - unsigned short PRMOD:1; - unsigned short :5; - unsigned short PWENB:1; - unsigned short PRENB:1; - unsigned short :4; - unsigned short EWENB:1; - unsigned short :2; - unsigned short WRMOD:1; - } BIT; - } CS4MOD; - union { - unsigned long LONG; - struct { - unsigned long :3; - unsigned long CSRWAIT:5; - unsigned long :3; - unsigned long CSWWAIT:5; - unsigned long :5; - unsigned long CSPRWAIT:3; - unsigned long :5; - unsigned long CSPWWAIT:3; - } BIT; - } CS4WCR1; - union { - unsigned long LONG; - struct { - unsigned long :1; - unsigned long CSON:3; - unsigned long :1; - unsigned long WDON:3; - unsigned long :1; - unsigned long WRON:3; - unsigned long :1; - unsigned long RDON:3; - unsigned long :2; - unsigned long AWAIT:2; - unsigned long :1; - unsigned long WDOFF:3; - unsigned long :1; - unsigned long CSWOFF:3; - unsigned long :1; - unsigned long CSROFF:3; - } BIT; - } CS4WCR2; - char wk9[6]; - union { - unsigned short WORD; - struct { - unsigned short PRMOD:1; - unsigned short :5; - unsigned short PWENB:1; - unsigned short PRENB:1; - unsigned short :4; - unsigned short EWENB:1; - unsigned short :2; - unsigned short WRMOD:1; - } BIT; - } CS5MOD; - union { - unsigned long LONG; - struct { - unsigned long :3; - unsigned long CSRWAIT:5; - unsigned long :3; - unsigned long CSWWAIT:5; - unsigned long :5; - unsigned long CSPRWAIT:3; - unsigned long :5; - unsigned long CSPWWAIT:3; - } BIT; - } CS5WCR1; - union { - unsigned long LONG; - struct { - unsigned long :1; - unsigned long CSON:3; - unsigned long :1; - unsigned long WDON:3; - unsigned long :1; - unsigned long WRON:3; - unsigned long :1; - unsigned long RDON:3; - unsigned long :2; - unsigned long AWAIT:2; - unsigned long :1; - unsigned long WDOFF:3; - unsigned long :1; - unsigned long CSWOFF:3; - unsigned long :1; - unsigned long CSROFF:3; - } BIT; - } CS5WCR2; - char wk10[6]; - union { - unsigned short WORD; - struct { - unsigned short PRMOD:1; - unsigned short :5; - unsigned short PWENB:1; - unsigned short PRENB:1; - unsigned short :4; - unsigned short EWENB:1; - unsigned short :2; - unsigned short WRMOD:1; - } BIT; - } CS6MOD; - union { - unsigned long LONG; - struct { - unsigned long :3; - unsigned long CSRWAIT:5; - unsigned long :3; - unsigned long CSWWAIT:5; - unsigned long :5; - unsigned long CSPRWAIT:3; - unsigned long :5; - unsigned long CSPWWAIT:3; - } BIT; - } CS6WCR1; - union { - unsigned long LONG; - struct { - unsigned long :1; - unsigned long CSON:3; - unsigned long :1; - unsigned long WDON:3; - unsigned long :1; - unsigned long WRON:3; - unsigned long :1; - unsigned long RDON:3; - unsigned long :2; - unsigned long AWAIT:2; - unsigned long :1; - unsigned long WDOFF:3; - unsigned long :1; - unsigned long CSWOFF:3; - unsigned long :1; - unsigned long CSROFF:3; - } BIT; - } CS6WCR2; - char wk11[6]; - union { - unsigned short WORD; - struct { - unsigned short PRMOD:1; - unsigned short :5; - unsigned short PWENB:1; - unsigned short PRENB:1; - unsigned short :4; - unsigned short EWENB:1; - unsigned short :2; - unsigned short WRMOD:1; - } BIT; - } CS7MOD; - union { - unsigned long LONG; - struct { - unsigned long :3; - unsigned long CSRWAIT:5; - unsigned long :3; - unsigned long CSWWAIT:5; - unsigned long :5; - unsigned long CSPRWAIT:3; - unsigned long :5; - unsigned long CSPWWAIT:3; - } BIT; - } CS7WCR1; - union { - unsigned long LONG; - struct { - unsigned long :1; - unsigned long CSON:3; - unsigned long :1; - unsigned long WDON:3; - unsigned long :1; - unsigned long WRON:3; - unsigned long :1; - unsigned long RDON:3; - unsigned long :2; - unsigned long AWAIT:2; - unsigned long :1; - unsigned long WDOFF:3; - unsigned long :1; - unsigned long CSWOFF:3; - unsigned long :1; - unsigned long CSROFF:3; - } BIT; - } CS7WCR2; - char wk12[1926]; - union { - unsigned short WORD; - struct { - unsigned short :3; - unsigned short MPXEN:1; - unsigned short :3; - unsigned short EMODE:1; - unsigned short :2; - unsigned short BSIZE:2; - unsigned short :3; - unsigned short EXENB:1; - } BIT; - } CS0CR; - char wk13[6]; - union { - unsigned short WORD; - struct { - unsigned short :4; - unsigned short WRCV:4; - unsigned short :4; - unsigned short RRCV:4; - } BIT; - } CS0REC; - char wk14[6]; - union { - unsigned short WORD; - struct { - unsigned short :3; - unsigned short MPXEN:1; - unsigned short :3; - unsigned short EMODE:1; - unsigned short :2; - unsigned short BSIZE:2; - unsigned short :3; - unsigned short EXENB:1; - } BIT; - } CS1CR; - char wk15[6]; - union { - unsigned short WORD; - struct { - unsigned short :4; - unsigned short WRCV:4; - unsigned short :4; - unsigned short RRCV:4; - } BIT; - } CS1REC; - char wk16[6]; - union { - unsigned short WORD; - struct { - unsigned short :3; - unsigned short MPXEN:1; - unsigned short :3; - unsigned short EMODE:1; - unsigned short :2; - unsigned short BSIZE:2; - unsigned short :3; - unsigned short EXENB:1; - } BIT; - } CS2CR; - char wk17[6]; - union { - unsigned short WORD; - struct { - unsigned short :4; - unsigned short WRCV:4; - unsigned short :4; - unsigned short RRCV:4; - } BIT; - } CS2REC; - char wk18[6]; - union { - unsigned short WORD; - struct { - unsigned short :3; - unsigned short MPXEN:1; - unsigned short :3; - unsigned short EMODE:1; - unsigned short :2; - unsigned short BSIZE:2; - unsigned short :3; - unsigned short EXENB:1; - } BIT; - } CS3CR; - char wk19[6]; - union { - unsigned short WORD; - struct { - unsigned short :4; - unsigned short WRCV:4; - unsigned short :4; - unsigned short RRCV:4; - } BIT; - } CS3REC; - char wk20[6]; - union { - unsigned short WORD; - struct { - unsigned short :3; - unsigned short MPXEN:1; - unsigned short :3; - unsigned short EMODE:1; - unsigned short :2; - unsigned short BSIZE:2; - unsigned short :3; - unsigned short EXENB:1; - } BIT; - } CS4CR; - char wk21[6]; - union { - unsigned short WORD; - struct { - unsigned short :4; - unsigned short WRCV:4; - unsigned short :4; - unsigned short RRCV:4; - } BIT; - } CS4REC; - char wk22[6]; - union { - unsigned short WORD; - struct { - unsigned short :3; - unsigned short MPXEN:1; - unsigned short :3; - unsigned short EMODE:1; - unsigned short :2; - unsigned short BSIZE:2; - unsigned short :3; - unsigned short EXENB:1; - } BIT; - } CS5CR; - char wk23[6]; - union { - unsigned short WORD; - struct { - unsigned short :4; - unsigned short WRCV:4; - unsigned short :4; - unsigned short RRCV:4; - } BIT; - } CS5REC; - char wk24[6]; - union { - unsigned short WORD; - struct { - unsigned short :3; - unsigned short MPXEN:1; - unsigned short :3; - unsigned short EMODE:1; - unsigned short :2; - unsigned short BSIZE:2; - unsigned short :3; - unsigned short EXENB:1; - } BIT; - } CS6CR; - char wk25[6]; - union { - unsigned short WORD; - struct { - unsigned short :4; - unsigned short WRCV:4; - unsigned short :4; - unsigned short RRCV:4; - } BIT; - } CS6REC; - char wk26[6]; - union { - unsigned short WORD; - struct { - unsigned short :3; - unsigned short MPXEN:1; - unsigned short :3; - unsigned short EMODE:1; - unsigned short :2; - unsigned short BSIZE:2; - unsigned short :3; - unsigned short EXENB:1; - } BIT; - } CS7CR; - char wk27[6]; - union { - unsigned short WORD; - struct { - unsigned short :4; - unsigned short WRCV:4; - unsigned short :4; - unsigned short RRCV:4; - } BIT; - } CS7REC; - char wk28[4]; - union { - unsigned short WORD; - struct { - unsigned short RCVENM7:1; - unsigned short RCVENM6:1; - unsigned short RCVENM5:1; - unsigned short RCVENM4:1; - unsigned short RCVENM3:1; - unsigned short RCVENM2:1; - unsigned short RCVENM1:1; - unsigned short RCVENM0:1; - unsigned short RCVEN7:1; - unsigned short RCVEN6:1; - unsigned short RCVEN5:1; - unsigned short RCVEN4:1; - unsigned short RCVEN3:1; - unsigned short RCVEN2:1; - unsigned short RCVEN1:1; - unsigned short RCVEN0:1; - } BIT; - } CSRECEN; - char wk29[894]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char BSIZE:2; - unsigned char :3; - unsigned char EXENB:1; - } BIT; - } SDCCR; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char EMODE:1; - } BIT; - } SDCMOD; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char BE:1; - } BIT; - } SDAMOD; - char wk30[13]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char SFEN:1; - } BIT; - } SDSELF; - char wk31[3]; - union { - unsigned short WORD; - struct { - unsigned short REFW:4; - unsigned short RFC:12; - } BIT; - } SDRFCR; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char RFEN:1; - } BIT; - } SDRFEN; - char wk32[9]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char INIRQ:1; - } BIT; - } SDICR; - char wk33[3]; - union { - unsigned short WORD; - struct { - unsigned short :5; - unsigned short PRC:3; - unsigned short ARFC:4; - unsigned short ARFI:4; - } BIT; - } SDIR; - char wk34[26]; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char MXC:2; - } BIT; - } SDADR; - char wk35[3]; - union { - unsigned long LONG; - struct { - unsigned long :13; - unsigned long RAS:3; - unsigned long :2; - unsigned long RCD:2; - unsigned long RP:3; - unsigned long WR:1; - unsigned long :5; - unsigned long CL:3; - } BIT; - } SDTR; - union { - unsigned short WORD; - struct { - unsigned short :1; - unsigned short MR:15; - } BIT; - } SDMOD; - char wk36[6]; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char SRFST:1; - unsigned char INIST:1; - unsigned char :2; - unsigned char MRSST:1; - } BIT; - } SDSR; - char wk37[269231]; - union { - unsigned long LONG; - struct { - unsigned long PRERR:1; - unsigned long :1; - unsigned long RPSTOP:1; - unsigned long :10; - unsigned long PR5SEL:3; - unsigned long :1; - unsigned long PR4SEL:3; - unsigned long :1; - unsigned long PR3SEL:3; - unsigned long :1; - unsigned long PR2SEL:3; - unsigned long :1; - unsigned long PR1SEL:3; - } BIT; - } EBMAPCR; -} st_bsc_t; - -typedef struct st_cac { - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char CFME:1; - } BIT; - } CACR0; - union { - unsigned char BYTE; - struct { - unsigned char EDGES:2; - unsigned char TCSS:2; - unsigned char FMCS:3; - unsigned char CACREFE:1; - } BIT; - } CACR1; - union { - unsigned char BYTE; - struct { - unsigned char DFS:2; - unsigned char RCDS:2; - unsigned char RSCS:3; - unsigned char RPS:1; - } BIT; - } CACR2; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char OVFFCL:1; - unsigned char MENDFCL:1; - unsigned char FERRFCL:1; - unsigned char :1; - unsigned char OVFIE:1; - unsigned char MENDIE:1; - unsigned char FERRIE:1; - } BIT; - } CAICR; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char OVFF:1; - unsigned char MENDF:1; - unsigned char FERRF:1; - } BIT; - } CASTR; - char wk0[1]; - unsigned short CAULVR; - unsigned short CALLVR; - unsigned short CACNTBR; -} st_cac_t; - -typedef struct st_can { - struct { - union { - unsigned long LONG; - struct { - unsigned short H; - unsigned short L; - } WORD; - struct { - unsigned char HH; - unsigned char HL; - unsigned char LH; - unsigned char LL; - } BYTE; - struct { - unsigned long IDE:1; - unsigned long RTR:1; - unsigned long :1; - unsigned long SID:11; - unsigned long EID:18; - } BIT; - } ID; - unsigned short DLC; - unsigned char DATA[8]; - unsigned short TS; - } MB[32]; - union { - unsigned long LONG; - struct { - unsigned short H; - unsigned short L; - } WORD; - struct { - unsigned char HH; - unsigned char HL; - unsigned char LH; - unsigned char LL; - } BYTE; - struct { - unsigned long :3; - unsigned long SID:11; - unsigned long EID:18; - } BIT; - } MKR[8]; - union { - unsigned long LONG; - struct { - unsigned short H; - unsigned short L; - } WORD; - struct { - unsigned char HH; - unsigned char HL; - unsigned char LH; - unsigned char LL; - } BYTE; - struct { - unsigned long IDE:1; - unsigned long RTR:1; - unsigned long :1; - unsigned long SID:11; - unsigned long EID:18; - } BIT; - } FIDCR0; - union { - unsigned long LONG; - struct { - unsigned short H; - unsigned short L; - } WORD; - struct { - unsigned char HH; - unsigned char HL; - unsigned char LH; - unsigned char LL; - } BYTE; - struct { - unsigned long IDE:1; - unsigned long RTR:1; - unsigned long :1; - unsigned long SID:11; - unsigned long EID:18; - } BIT; - } FIDCR1; - union { - unsigned long LONG; - struct { - unsigned short H; - unsigned short L; - } WORD; - struct { - unsigned char HH; - unsigned char HL; - unsigned char LH; - unsigned char LL; - } BYTE; - struct { - unsigned char MB31:1; - unsigned char MB30:1; - unsigned char MB29:1; - unsigned char MB28:1; - unsigned char MB27:1; - unsigned char MB26:1; - unsigned char MB25:1; - unsigned char MB24:1; - unsigned char MB23:1; - unsigned char MB22:1; - unsigned char MB21:1; - unsigned char MB20:1; - unsigned char MB19:1; - unsigned char MB18:1; - unsigned char MB17:1; - unsigned char MB16:1; - unsigned char MB15:1; - unsigned char MB14:1; - unsigned char MB13:1; - unsigned char MB12:1; - unsigned char MB11:1; - unsigned char MB10:1; - unsigned char MB9:1; - unsigned char MB8:1; - unsigned char MB7:1; - unsigned char MB6:1; - unsigned char MB5:1; - unsigned char MB4:1; - unsigned char MB3:1; - unsigned char MB2:1; - unsigned char MB1:1; - unsigned char MB0:1; - } BIT; - } MKIVLR; - union { - unsigned long LONG; - struct { - unsigned short H; - unsigned short L; - } WORD; - struct { - unsigned char HH; - unsigned char HL; - unsigned char LH; - unsigned char LL; - } BYTE; - struct { - unsigned char MB31:1; - unsigned char MB30:1; - unsigned char MB29:1; - unsigned char MB28:1; - unsigned char MB27:1; - unsigned char MB26:1; - unsigned char MB25:1; - unsigned char MB24:1; - unsigned char MB23:1; - unsigned char MB22:1; - unsigned char MB21:1; - unsigned char MB20:1; - unsigned char MB19:1; - unsigned char MB18:1; - unsigned char MB17:1; - unsigned char MB16:1; - unsigned char MB15:1; - unsigned char MB14:1; - unsigned char MB13:1; - unsigned char MB12:1; - unsigned char MB11:1; - unsigned char MB10:1; - unsigned char MB9:1; - unsigned char MB8:1; - unsigned char MB7:1; - unsigned char MB6:1; - unsigned char MB5:1; - unsigned char MB4:1; - unsigned char MB3:1; - unsigned char MB2:1; - unsigned char MB1:1; - unsigned char MB0:1; - } BIT; - } MIER; - char wk0[1008]; - union { - unsigned char BYTE; - union { - struct { - unsigned char TRMREQ:1; - unsigned char RECREQ:1; - unsigned char :1; - unsigned char ONESHOT:1; - unsigned char :1; - unsigned char TRMABT:1; - unsigned char TRMACTIVE:1; - unsigned char SENTDATA:1; - } TX; - struct { - unsigned char TRMREQ:1; - unsigned char RECREQ:1; - unsigned char :1; - unsigned char ONESHOT:1; - unsigned char :1; - unsigned char MSGLOST:1; - unsigned char INVALDATA:1; - unsigned char NEWDATA:1; - } RX; - } BIT; - } MCTL[32]; - union { - unsigned short WORD; - struct { - unsigned char H; - unsigned char L; - } BYTE; - struct { - unsigned char :2; - unsigned char RBOC:1; - unsigned char BOM:2; - unsigned char SLPM:1; - unsigned char CANM:2; - unsigned char TSPS:2; - unsigned char TSRC:1; - unsigned char TPM:1; - unsigned char MLM:1; - unsigned char IDFM:2; - unsigned char MBM:1; - } BIT; - } CTLR; - union { - unsigned short WORD; - struct { - unsigned char H; - unsigned char L; - } BYTE; - struct { - unsigned char :1; - unsigned char RECST:1; - unsigned char TRMST:1; - unsigned char BOST:1; - unsigned char EPST:1; - unsigned char SLPST:1; - unsigned char HLTST:1; - unsigned char RSTST:1; - unsigned char EST:1; - unsigned char TABST:1; - unsigned char FMLST:1; - unsigned char NMLST:1; - unsigned char TFST:1; - unsigned char RFST:1; - unsigned char SDST:1; - unsigned char NDST:1; - } BIT; - } STR; - union { - unsigned long LONG; - struct { - unsigned short H; - unsigned short L; - } WORD; - struct { - unsigned char HH; - unsigned char HL; - unsigned char LH; - unsigned char LL; - } BYTE; - struct { - unsigned long TSEG1:4; - unsigned long :2; - unsigned long BRP:10; - unsigned long :2; - unsigned long SJW:2; - unsigned long :1; - unsigned long TSEG2:3; - unsigned long :7; - unsigned long CCLKS:1; - } BIT; - } BCR; - union { - unsigned char BYTE; - struct { - unsigned char RFEST:1; - unsigned char RFWST:1; - unsigned char RFFST:1; - unsigned char RFMLF:1; - unsigned char RFUST:3; - unsigned char RFE:1; - } BIT; - } RFCR; - unsigned char RFPCR; - union { - unsigned char BYTE; - struct { - unsigned char TFEST:1; - unsigned char TFFST:1; - unsigned char :2; - unsigned char TFUST:3; - unsigned char TFE:1; - } BIT; - } TFCR; - unsigned char TFPCR; - union { - unsigned char BYTE; - struct { - unsigned char BLIE:1; - unsigned char OLIE:1; - unsigned char ORIE:1; - unsigned char BORIE:1; - unsigned char BOEIE:1; - unsigned char EPIE:1; - unsigned char EWIE:1; - unsigned char BEIE:1; - } BIT; - } EIER; - union { - unsigned char BYTE; - struct { - unsigned char BLIF:1; - unsigned char OLIF:1; - unsigned char ORIF:1; - unsigned char BORIF:1; - unsigned char BOEIF:1; - unsigned char EPIF:1; - unsigned char EWIF:1; - unsigned char BEIF:1; - } BIT; - } EIFR; - unsigned char RECR; - unsigned char TECR; - union { - unsigned char BYTE; - struct { - unsigned char EDPM:1; - unsigned char ADEF:1; - unsigned char BE0F:1; - unsigned char BE1F:1; - unsigned char CEF:1; - unsigned char AEF:1; - unsigned char FEF:1; - unsigned char SEF:1; - } BIT; - } ECSR; - unsigned char CSSR; - union { - unsigned char BYTE; - struct { - unsigned char SEST:1; - unsigned char :2; - unsigned char MBNST:5; - } BIT; - } MSSR; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char MBSM:2; - } BIT; - } MSMR; - unsigned short TSR; - unsigned short AFSR; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char TSTM:2; - unsigned char TSTE:1; - } BIT; - } TCR; -} st_can_t; - -typedef struct st_cmt { - union { - unsigned short WORD; - struct { - unsigned short :14; - unsigned short STR1:1; - unsigned short STR0:1; - } BIT; - } CMSTR0; - char wk0[14]; - union { - unsigned short WORD; - struct { - unsigned short :14; - unsigned short STR3:1; - unsigned short STR2:1; - } BIT; - } CMSTR1; -} st_cmt_t; - -typedef struct st_cmt0 { - union { - unsigned short WORD; - struct { - unsigned short :9; - unsigned short CMIE:1; - unsigned short :4; - unsigned short CKS:2; - } BIT; - } CMCR; - unsigned short CMCNT; - unsigned short CMCOR; -} st_cmt0_t; - -typedef struct st_cmtw { - union { - unsigned short WORD; - struct { - unsigned short :15; - unsigned short STR:1; - } BIT; - } CMWSTR; - char wk0[2]; - union { - unsigned short WORD; - struct { - unsigned short CCLR:3; - unsigned short :3; - unsigned short CMS:1; - unsigned short :1; - unsigned short OC1IE:1; - unsigned short OC0IE:1; - unsigned short IC1IE:1; - unsigned short IC0IE:1; - unsigned short CMWIE:1; - unsigned short :1; - unsigned short CKS:2; - } BIT; - } CMWCR; - char wk1[2]; - union { - unsigned short WORD; - struct { - unsigned short CMWE:1; - unsigned short :1; - unsigned short OC1E:1; - unsigned short OC0E:1; - unsigned short OC1:2; - unsigned short OC0:2; - unsigned short :2; - unsigned short IC1E:1; - unsigned short IC0E:1; - unsigned short IC1:2; - unsigned short IC0:2; - } BIT; - } CMWIOR; - char wk2[6]; - unsigned long CMWCNT; - unsigned long CMWCOR; - unsigned long CMWICR0; - unsigned long CMWICR1; - unsigned long CMWOCR0; - unsigned long CMWOCR1; -} st_cmtw_t; - -typedef struct st_crc { - union { - unsigned char BYTE; - struct { - unsigned char DORCLR:1; - unsigned char LMS:1; - unsigned char :3; - unsigned char GPS:3; - } BIT; - } CRCCR; - char wk0[3]; - union { - unsigned long LONG; - unsigned char BYTE; - } CRCDIR; - union { - unsigned long LONG; - unsigned short WORD; - unsigned char BYTE; - } CRCDOR; -} st_crc_t; - -typedef struct st_da { - unsigned short DADR0; - unsigned short DADR1; - union { - unsigned char BYTE; - struct { - unsigned char DAOE1:1; - unsigned char DAOE0:1; - unsigned char DAE:1; - unsigned char :5; - } BIT; - } DACR; - union { - unsigned char BYTE; - struct { - unsigned char DPSEL:1; - unsigned char :7; - } BIT; - } DADPR; - union { - unsigned char BYTE; - struct { - unsigned char DAADST:1; - unsigned char :7; - } BIT; - } DAADSCR; - char wk0[1]; - union { - unsigned char BYTE; - struct { - unsigned char DAAMP1:1; - unsigned char DAAMP0:1; - unsigned char :6; - } BIT; - } DAAMPCR; - char wk1[19]; - union { - unsigned char BYTE; - struct { - unsigned char DAASW1:1; - unsigned char DAASW0:1; - unsigned char :6; - } BIT; - } DAASWCR; - char wk2[17763]; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char AMADSEL1:1; - unsigned char :1; - } BIT; - } DAADUSR; -} st_da_t; - -typedef struct st_dmac { - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char DMST:1; - } BIT; - } DMAST; - char wk0[3]; - union { - unsigned char BYTE; - struct { - unsigned char DMIS7:1; - unsigned char DMIS6:1; - unsigned char DMIS5:1; - unsigned char DMIS4:1; - unsigned char :4; - } BIT; - } DMIST; -} st_dmac_t; - -typedef struct st_dmac0 { - void *DMSAR; - void *DMDAR; - unsigned long DMCRA; - unsigned short DMCRB; - char wk0[2]; - union { - unsigned short WORD; - struct { - unsigned short MD:2; - unsigned short DTS:2; - unsigned short :2; - unsigned short SZ:2; - unsigned short :6; - unsigned short DCTG:2; - } BIT; - } DMTMD; - char wk1[1]; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char DTIE:1; - unsigned char ESIE:1; - unsigned char RPTIE:1; - unsigned char SARIE:1; - unsigned char DARIE:1; - } BIT; - } DMINT; - union { - unsigned short WORD; - struct { - unsigned short SM:2; - unsigned short :1; - unsigned short SARA:5; - unsigned short DM:2; - unsigned short :1; - unsigned short DARA:5; - } BIT; - } DMAMD; - char wk2[2]; - unsigned long DMOFR; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char DTE:1; - } BIT; - } DMCNT; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char CLRS:1; - unsigned char :3; - unsigned char SWREQ:1; - } BIT; - } DMREQ; - union { - unsigned char BYTE; - struct { - unsigned char ACT:1; - unsigned char :2; - unsigned char DTIF:1; - unsigned char :3; - unsigned char ESIF:1; - } BIT; - } DMSTS; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char DISEL:1; - } BIT; - } DMCSL; -} st_dmac0_t; - -typedef struct st_dmac1 { - void *DMSAR; - void *DMDAR; - unsigned long DMCRA; - unsigned short DMCRB; - char wk0[2]; - union { - unsigned short WORD; - struct { - unsigned short MD:2; - unsigned short DTS:2; - unsigned short :2; - unsigned short SZ:2; - unsigned short :6; - unsigned short DCTG:2; - } BIT; - } DMTMD; - char wk1[1]; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char DTIE:1; - unsigned char ESIE:1; - unsigned char RPTIE:1; - unsigned char SARIE:1; - unsigned char DARIE:1; - } BIT; - } DMINT; - union { - unsigned short WORD; - struct { - unsigned short SM:2; - unsigned short :1; - unsigned short SARA:5; - unsigned short DM:2; - unsigned short :1; - unsigned short DARA:5; - } BIT; - } DMAMD; - char wk2[6]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char DTE:1; - } BIT; - } DMCNT; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char CLRS:1; - unsigned char :3; - unsigned char SWREQ:1; - } BIT; - } DMREQ; - union { - unsigned char BYTE; - struct { - unsigned char ACT:1; - unsigned char :2; - unsigned char DTIF:1; - unsigned char :3; - unsigned char ESIF:1; - } BIT; - } DMSTS; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char DISEL:1; - } BIT; - } DMCSL; -} st_dmac1_t; - -typedef struct st_doc { - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char DOPCFCL:1; - unsigned char DOPCF:1; - unsigned char DOPCIE:1; - unsigned char :1; - unsigned char DCSEL:1; - unsigned char OMS:2; - } BIT; - } DOCR; - char wk0[1]; - unsigned short DODIR; - unsigned short DODSR; -} st_doc_t; - -typedef struct st_drw2d { - union { - union { - unsigned long LONG; - struct { - unsigned long :8; - unsigned long SPANSTR:1; - unsigned long SPANABT:1; - unsigned long UNIONCD:1; - unsigned long UNIONAB:1; - unsigned long UNION56:1; - unsigned long UNION34:1; - unsigned long UNION12:1; - unsigned long BAND2EN:1; - unsigned long BAND1EN:1; - unsigned long LIM6TH:1; - unsigned long LIM5TH:1; - unsigned long LIM4TH:1; - unsigned long LIM3TH:1; - unsigned long LIM2TH:1; - unsigned long LIM1TH:1; - unsigned long QUAD3EN:1; - unsigned long QUAD2EN:1; - unsigned long QUAD1EN:1; - unsigned long LIM6EN:1; - unsigned long LIM5EN:1; - unsigned long LIM4EN:1; - unsigned long LIM3EN:1; - unsigned long LIM2EN:1; - unsigned long LIM1EN:1; - } BIT; - } CONTROL; - union { - unsigned long LONG; - struct { - unsigned long :26; - unsigned long DLIR:1; - unsigned long ENUIR:1; - unsigned long DLSTACT:1; - unsigned long CACHEDTY:1; - unsigned long BSYWR:1; - unsigned long BSYENUM:1; - } BIT; - } STATUS; - }; - union { - union { - unsigned long LONG; - struct { - unsigned long RLEPIXW:2; - unsigned long BDIA:1; - unsigned long BSIA:1; - unsigned long CLUTFORM:1; - unsigned long COLKEYEN:1; - unsigned long CLUTEN:1; - unsigned long RLEEN:1; - unsigned long WRALPHA:2; - unsigned long WRFMT:2; - unsigned long RDFMT:2; - unsigned long TEXFILTY:1; - unsigned long TEXFILTX:1; - unsigned long TEXCLPY:1; - unsigned long TEXCLPX:1; - unsigned long BC2:1; - unsigned long BDI:1; - unsigned long BSI:1; - unsigned long BDF:1; - unsigned long BSF:1; - unsigned long WRFMT2:1; - unsigned long BDFA:1; - unsigned long BSFA:1; - unsigned long RDFMT2:2; - unsigned long USEACB:1; - unsigned long PTNSRCL5:1; - unsigned long TEXENA:1; - unsigned long PTNEN:1; - } BIT; - } CONTROL2; - union { - unsigned long LONG; - struct { - unsigned long :4; - unsigned long ACBLD:1; - unsigned long :1; - unsigned long COLKEY:1; - unsigned long TEXCLUT256:1; - unsigned long RLEUNIT:1; - unsigned long :1; - unsigned long TEXCLUT:1; - unsigned long PERFCNT:1; - unsigned long TXCACHE:1; - unsigned long FBCACHE:1; - unsigned long DLR:1; - unsigned long :5; - unsigned long REV:12; - } BIT; - } HWVER; - }; - char wk0[8]; - unsigned long L1START; - unsigned long L2START; - unsigned long L3START; - unsigned long L4START; - unsigned long L5START; - unsigned long L6START; - unsigned long L1XADD; - unsigned long L2XADD; - unsigned long L3XADD; - unsigned long L4XADD; - unsigned long L5XADD; - unsigned long L6XADD; - unsigned long L1YADD; - unsigned long L2YADD; - unsigned long L3YADD; - unsigned long L4YADD; - unsigned long L5YADD; - unsigned long L6YADD; - unsigned long L1BAND; - unsigned long L2BAND; - char wk1[4]; - union { - unsigned long LONG; - struct { - unsigned long COL1A:8; - unsigned long COL1R:8; - unsigned long COL1G:8; - unsigned long COL1B:8; - } BIT; - } COLOR1; - union { - unsigned long LONG; - struct { - unsigned long COL2A:8; - unsigned long COL2R:8; - unsigned long COL2G:8; - unsigned long COL2B:8; - } BIT; - } COLOR2; - char wk2[8]; - unsigned long PATTERN; - union { - unsigned long LONG; - struct { - unsigned long Y:16; - unsigned long X:16; - } BIT; - } SIZE; - union { - unsigned long LONG; - struct { - unsigned long SSD:16; - unsigned long PITCH:16; - } BIT; - } PITCH; - unsigned long ORIGIN; - char wk3[12]; - unsigned long LUST; - unsigned long LUXADD; - unsigned long LUYADD; - unsigned long LVSTI; - unsigned long LVSTF; - unsigned long LVXADDI; - unsigned long LVYADDI; - union { - unsigned long LONG; - struct { - unsigned long LVYADDF:16; - unsigned long LVXADDF:16; - } BIT; - } LVYXADDF; - char wk4[4]; - unsigned long TEXPITCH; - union { - unsigned long LONG; - struct { - unsigned long TEXVMSK:21; - unsigned long TEXUMSK:11; - } BIT; - } TEXMSK; - unsigned long TEXORG; - union { - unsigned long LONG; - struct { - unsigned long :28; - unsigned long DLIRCLR:1; - unsigned long ENUIRCLR:1; - unsigned long DLIREN:1; - unsigned long ENUIREN:1; - } BIT; - } IRQCTL; - union { - unsigned long LONG; - struct { - unsigned long :28; - unsigned long CFLUTX:1; - unsigned long CENTX:1; - unsigned long CFLUFX:1; - unsigned long CENFX:1; - } BIT; - } CACHECTL; - unsigned long DLISTST; - unsigned long PERFCNT1; - unsigned long PERFCNT2; - union { - unsigned long LONG; - struct { - unsigned long TRG2:16; - unsigned long TRG1:16; - } BIT; - } PERFTRG; - char wk5[4]; - unsigned long TEXCLADDR; - unsigned long TEXCLDATA; - unsigned long TEXCLOFST; - union { - unsigned long LONG; - struct { - unsigned long :8; - unsigned long R:8; - unsigned long G:8; - unsigned long B:8; - } BIT; - } COLKEY; -} st_drw2d_t; - -typedef struct st_dtc { - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char RRS:1; - unsigned char :4; - } BIT; - } DTCCR; - char wk0[3]; - void *DTCVBR; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char SHORT:1; - } BIT; - } DTCADMOD; - char wk1[3]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char DTCST:1; - } BIT; - } DTCST; - char wk2[1]; - union { - unsigned short WORD; - struct { - unsigned short ACT:1; - unsigned short :7; - unsigned short VECN:8; - } BIT; - } DTCSTS; - void *DTCIBR; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char SQTFRL:1; - } BIT; - } DTCOR; - char wk3[1]; - union { - unsigned short WORD; - struct { - unsigned short ESPSEL:1; - unsigned short :7; - unsigned short VECN:8; - } BIT; - } DTCSQE; - unsigned long DTCDISP; -} st_dtc_t; - -typedef struct st_edmac { - union { - unsigned long LONG; - struct { - unsigned long :25; - unsigned long DE:1; - unsigned long DL:2; - unsigned long :3; - unsigned long SWR:1; - } BIT; - } EDMR; - char wk0[4]; - union { - unsigned long LONG; - struct { - unsigned long :31; - unsigned long TR:1; - } BIT; - } EDTRR; - char wk1[4]; - union { - unsigned long LONG; - struct { - unsigned long :31; - unsigned long RR:1; - } BIT; - } EDRRR; - char wk2[4]; - void *TDLAR; - char wk3[4]; - void *RDLAR; - char wk4[4]; - union { - unsigned long LONG; - struct { - unsigned long :1; - unsigned long TWB:1; - unsigned long :3; - unsigned long TABT:1; - unsigned long RABT:1; - unsigned long RFCOF:1; - unsigned long :1; - unsigned long ECI:1; - unsigned long TC:1; - unsigned long TDE:1; - unsigned long TFUF:1; - unsigned long FR:1; - unsigned long RDE:1; - unsigned long RFOF:1; - unsigned long :4; - unsigned long CND:1; - unsigned long DLC:1; - unsigned long CD:1; - unsigned long TRO:1; - unsigned long RMAF:1; - unsigned long :2; - unsigned long RRF:1; - unsigned long RTLF:1; - unsigned long RTSF:1; - unsigned long PRE:1; - unsigned long CERF:1; - } BIT; - } EESR; - char wk5[4]; - union { - unsigned long LONG; - struct { - unsigned long :1; - unsigned long TWBIP:1; - unsigned long :3; - unsigned long TABTIP:1; - unsigned long RABTIP:1; - unsigned long RFCOFIP:1; - unsigned long :1; - unsigned long ECIIP:1; - unsigned long TCIP:1; - unsigned long TDEIP:1; - unsigned long TFUFIP:1; - unsigned long FRIP:1; - unsigned long RDEIP:1; - unsigned long RFOFIP:1; - unsigned long :4; - unsigned long CNDIP:1; - unsigned long DLCIP:1; - unsigned long CDIP:1; - unsigned long TROIP:1; - unsigned long RMAFIP:1; - unsigned long :2; - unsigned long RRFIP:1; - unsigned long RTLFIP:1; - unsigned long RTSFIP:1; - unsigned long PREIP:1; - unsigned long CERFIP:1; - } BIT; - } EESIPR; - char wk6[4]; - union { - unsigned long LONG; - struct { - unsigned long :24; - unsigned long RMAFCE:1; - unsigned long :2; - unsigned long RRFCE:1; - unsigned long :4; - } BIT; - } TRSCER; - char wk7[4]; - union { - unsigned long LONG; - struct { - unsigned long :16; - unsigned long MFC:16; - } BIT; - } RMFCR; - char wk8[4]; - union { - unsigned long LONG; - struct { - unsigned long :21; - unsigned long TFT:11; - } BIT; - } TFTR; - char wk9[4]; - union { - unsigned long LONG; - struct { - unsigned long :19; - unsigned long TFD:5; - unsigned long :3; - unsigned long RFD:5; - } BIT; - } FDR; - char wk10[4]; - union { - unsigned long LONG; - struct { - unsigned long :31; - unsigned long RNR:1; - } BIT; - } RMCR; - char wk11[8]; - union { - unsigned long LONG; - struct { - unsigned long :16; - unsigned long UNDER:16; - } BIT; - } TFUCR; - union { - unsigned long LONG; - struct { - unsigned long :16; - unsigned long OVER:16; - } BIT; - } RFOCR; - union { - unsigned long LONG; - struct { - unsigned long :31; - unsigned long ELB:1; - } BIT; - } IOSR; - union { - unsigned long LONG; - struct { - unsigned long :13; - unsigned long RFFO:3; - unsigned long :13; - unsigned long RFDO:3; - } BIT; - } FCFTR; - char wk12[4]; - union { - unsigned long LONG; - struct { - unsigned long :14; - unsigned long PADS:2; - unsigned long :10; - unsigned long PADR:6; - } BIT; - } RPADIR; - union { - unsigned long LONG; - struct { - unsigned long :27; - unsigned long TIM:1; - unsigned long :3; - unsigned long TIS:1; - } BIT; - } TRIMD; - char wk13[72]; - void *RBWAR; - void *RDFAR; - char wk14[4]; - void *TBRAR; - void *TDFAR; -} st_edmac_t; - -typedef struct st_elc { - union { - unsigned char BYTE; - struct { - unsigned char ELCON:1; - unsigned char :7; - } BIT; - } ELCR; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR0; - char wk0[2]; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR3; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR4; - char wk1[2]; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR7; - char wk2[2]; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR10; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR11; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR12; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR13; - char wk3[1]; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR15; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR16; - char wk4[1]; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR18; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR19; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR20; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR21; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR22; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR23; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR24; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR25; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR26; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR27; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR28; - char wk5[1]; - union { - unsigned char BYTE; - struct { - unsigned char MTU3MD:2; - unsigned char :4; - unsigned char MTU0MD:2; - } BIT; - } ELOPA; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char MTU4MD:2; - } BIT; - } ELOPB; - union { - unsigned char BYTE; - struct { - unsigned char :4; - unsigned char CMT1MD:2; - unsigned char :2; - } BIT; - } ELOPC; - union { - unsigned char BYTE; - struct { - unsigned char TMR3MD:2; - unsigned char TMR2MD:2; - unsigned char TMR1MD:2; - unsigned char TMR0MD:2; - } BIT; - } ELOPD; - union { - unsigned char BYTE; - struct { - unsigned char PGR7:1; - unsigned char PGR6:1; - unsigned char PGR5:1; - unsigned char PGR4:1; - unsigned char PGR3:1; - unsigned char PGR2:1; - unsigned char PGR1:1; - unsigned char PGR0:1; - } BIT; - } PGR1; - union { - unsigned char BYTE; - struct { - unsigned char PGR7:1; - unsigned char PGR6:1; - unsigned char PGR5:1; - unsigned char PGR4:1; - unsigned char PGR3:1; - unsigned char PGR2:1; - unsigned char PGR1:1; - unsigned char PGR0:1; - } BIT; - } PGR2; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char PGCO:3; - unsigned char :1; - unsigned char PGCOVE:1; - unsigned char PGCI:2; - } BIT; - } PGC1; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char PGCO:3; - unsigned char :1; - unsigned char PGCOVE:1; - unsigned char PGCI:2; - } BIT; - } PGC2; - union { - unsigned char BYTE; - struct { - unsigned char PDBF7:1; - unsigned char PDBF6:1; - unsigned char PDBF5:1; - unsigned char PDBF4:1; - unsigned char PDBF3:1; - unsigned char PDBF2:1; - unsigned char PDBF1:1; - unsigned char PDBF0:1; - } BIT; - } PDBF1; - union { - unsigned char BYTE; - struct { - unsigned char PDBF7:1; - unsigned char PDBF6:1; - unsigned char PDBF5:1; - unsigned char PDBF4:1; - unsigned char PDBF3:1; - unsigned char PDBF2:1; - unsigned char PDBF1:1; - unsigned char PDBF0:1; - } BIT; - } PDBF2; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char PSM:2; - unsigned char PSP:2; - unsigned char PSB:3; - } BIT; - } PEL0; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char PSM:2; - unsigned char PSP:2; - unsigned char PSB:3; - } BIT; - } PEL1; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char PSM:2; - unsigned char PSP:2; - unsigned char PSB:3; - } BIT; - } PEL2; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char PSM:2; - unsigned char PSP:2; - unsigned char PSB:3; - } BIT; - } PEL3; - union { - unsigned char BYTE; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned char WI:1; - unsigned char WE:1; - unsigned char :5; - unsigned char SEG:1; - } BIT; -#endif - } ELSEGR; - char wk6[3]; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR33; - char wk7[1]; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR35; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR36; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR37; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR38; - char wk8[6]; - union { - unsigned char BYTE; - struct { - unsigned char ELS:8; - } BIT; - } ELSR45; - char wk9[1]; - union { - unsigned char BYTE; - struct { - unsigned char TPU3MD:2; - unsigned char TPU2MD:2; - unsigned char TPU1MD:2; - unsigned char TPU0MD:2; - } BIT; - } ELOPF; - char wk10[1]; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char CMTW0MD:2; - } BIT; - } ELOPH; -} st_elc_t; - -typedef struct st_etherc { - union { - unsigned long LONG; - struct { - unsigned long :11; - unsigned long TPC:1; - unsigned long ZPF:1; - unsigned long PFR:1; - unsigned long RXF:1; - unsigned long TXF:1; - unsigned long :3; - unsigned long PRCEF:1; - unsigned long :2; - unsigned long MPDE:1; - unsigned long :2; - unsigned long RE:1; - unsigned long TE:1; - unsigned long :1; - unsigned long ILB:1; - unsigned long RTM:1; - unsigned long DM:1; - unsigned long PRM:1; - } BIT; - } ECMR; - char wk0[4]; - union { - unsigned long LONG; - struct { - unsigned long :20; - unsigned long RFL:12; - } BIT; - } RFLR; - char wk1[4]; - union { - unsigned long LONG; - struct { - unsigned long :26; - unsigned long BFR:1; - unsigned long PSRTO:1; - unsigned long :1; - unsigned long LCHNG:1; - unsigned long MPD:1; - unsigned long ICD:1; - } BIT; - } ECSR; - char wk2[4]; - union { - unsigned long LONG; - struct { - unsigned long :26; - unsigned long BFSIPR:1; - unsigned long PSRTOIP:1; - unsigned long :1; - unsigned long LCHNGIP:1; - unsigned long MPDIP:1; - unsigned long ICDIP:1; - } BIT; - } ECSIPR; - char wk3[4]; - union { - unsigned long LONG; - struct { - unsigned long :28; - unsigned long MDI:1; - unsigned long MDO:1; - unsigned long MMD:1; - unsigned long MDC:1; - } BIT; - } PIR; - char wk4[4]; - union { - unsigned long LONG; - struct { - unsigned long :31; - unsigned long LMON:1; - } BIT; - } PSR; - char wk5[20]; - union { - unsigned long LONG; - struct { - unsigned long :12; - unsigned long RMD:20; - } BIT; - } RDMLR; - char wk6[12]; - union { - unsigned long LONG; - struct { - unsigned long :27; - unsigned long IPG:5; - } BIT; - } IPGR; - union { - unsigned long LONG; - struct { - unsigned long :16; - unsigned long AP:16; - } BIT; - } APR; - union { - unsigned long LONG; - struct { - unsigned long :16; - unsigned long MP:16; - } BIT; - } MPR; - char wk7[4]; - union { - unsigned long LONG; - struct { - unsigned long :24; - unsigned long RPAUSE:8; - } BIT; - } RFCF; - union { - unsigned long LONG; - struct { - unsigned long :16; - unsigned long TPAUSE:16; - } BIT; - } TPAUSER; - union { - unsigned long LONG; - struct { - unsigned long :24; - unsigned long TXP:8; - } BIT; - } TPAUSECR; - union { - unsigned long LONG; - struct { - unsigned long :16; - unsigned long BCF:16; - } BIT; - } BCFRR; - char wk8[80]; - unsigned long MAHR; - char wk9[4]; - union { - unsigned long LONG; - struct { - unsigned long :16; - unsigned long MA:16; - } BIT; - } MALR; - char wk10[4]; - unsigned long TROCR; - unsigned long CDCR; - unsigned long LCCR; - unsigned long CNDCR; - char wk11[4]; - unsigned long CEFCR; - unsigned long FRECR; - unsigned long TSFRCR; - unsigned long TLFRCR; - unsigned long RFCR; - unsigned long MAFCR; -} st_etherc_t; - -typedef struct st_exdmac { - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char DMST:1; - } BIT; - } EDMAST; - char wk0[479]; - unsigned long CLSBR0; - unsigned long CLSBR1; - unsigned long CLSBR2; - unsigned long CLSBR3; - unsigned long CLSBR4; - unsigned long CLSBR5; - unsigned long CLSBR6; - unsigned long CLSBR7; -} st_exdmac_t; - -typedef struct st_exdmac0 { - void *EDMSAR; - void *EDMDAR; - unsigned long EDMCRA; - unsigned short EDMCRB; - char wk0[2]; - union { - unsigned short WORD; - struct { - unsigned short MD:2; - unsigned short DTS:2; - unsigned short :2; - unsigned short SZ:2; - unsigned short :6; - unsigned short DCTG:2; - } BIT; - } EDMTMD; - union { - unsigned char BYTE; - struct { - unsigned char :4; - unsigned char DACKS:1; - unsigned char DACKE:1; - unsigned char DACKW:1; - unsigned char DACKSEL:1; - } BIT; - } EDMOMD; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char DTIE:1; - unsigned char ESIE:1; - unsigned char RPTIE:1; - unsigned char SARIE:1; - unsigned char DARIE:1; - } BIT; - } EDMINT; - union { - unsigned long LONG; - struct { - unsigned long :14; - unsigned long AMS:1; - unsigned long DIR:1; - unsigned long SM:2; - unsigned long :1; - unsigned long SARA:5; - unsigned long DM:2; - unsigned long :1; - unsigned long DARA:5; - } BIT; - } EDMAMD; - unsigned long EDMOFR; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char DTE:1; - } BIT; - } EDMCNT; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char CLRS:1; - unsigned char :3; - unsigned char SWREQ:1; - } BIT; - } EDMREQ; - union { - unsigned char BYTE; - struct { - unsigned char ACT:1; - unsigned char :2; - unsigned char DTIF:1; - unsigned char :3; - unsigned char ESIF:1; - } BIT; - } EDMSTS; - char wk1[1]; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char DREQS:2; - } BIT; - } EDMRMD; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char EREQ:1; - } BIT; - } EDMERF; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char PREQ:1; - } BIT; - } EDMPRF; -} st_exdmac0_t; - -typedef struct st_exdmac1 { - void *EDMSAR; - void *EDMDAR; - unsigned long EDMCRA; - unsigned short EDMCRB; - char wk0[2]; - union { - unsigned short WORD; - struct { - unsigned short MD:2; - unsigned short DTS:2; - unsigned short :2; - unsigned short SZ:2; - unsigned short :6; - unsigned short DCTG:2; - } BIT; - } EDMTMD; - union { - unsigned char BYTE; - struct { - unsigned char :4; - unsigned char DACKS:1; - unsigned char DACKE:1; - unsigned char DACKW:1; - unsigned char DACKSEL:1; - } BIT; - } EDMOMD; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char DTIE:1; - unsigned char ESIE:1; - unsigned char RPTIE:1; - unsigned char SARIE:1; - unsigned char DARIE:1; - } BIT; - } EDMINT; - union { - unsigned long LONG; - struct { - unsigned long :14; - unsigned long AMS:1; - unsigned long DIR:1; - unsigned long SM:2; - unsigned long :1; - unsigned long SARA:5; - unsigned long DM:2; - unsigned long :1; - unsigned long DARA:5; - } BIT; - } EDMAMD; - char wk1[4]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char DTE:1; - } BIT; - } EDMCNT; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char CLRS:1; - unsigned char :3; - unsigned char SWREQ:1; - } BIT; - } EDMREQ; - union { - unsigned char BYTE; - struct { - unsigned char ACT:1; - unsigned char :2; - unsigned char DTIF:1; - unsigned char :3; - unsigned char ESIF:1; - } BIT; - } EDMSTS; - char wk2[1]; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char DREQS:2; - } BIT; - } EDMRMD; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char EREQ:1; - } BIT; - } EDMERF; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char PREQ:1; - } BIT; - } EDMPRF; -} st_exdmac1_t; - -typedef struct st_flash { - union { - unsigned short WORD; - struct { - unsigned short :15; - unsigned short ROMCEN:1; - } BIT; - } ROMCE; - char wk0[2]; - union { - unsigned short WORD; - struct { - unsigned short :15; - unsigned short ROMCIV:1; - } BIT; - } ROMCIV; - char wk1[45712]; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char FLWE:2; - } BIT; - } FWEPROR; - char wk2[7798185]; - unsigned char EEPFCLK; - char wk3[8143]; - union { - unsigned char BYTE; - struct { - unsigned char CFAE:1; - unsigned char :2; - unsigned char CMDLK:1; - unsigned char DFAE:1; - unsigned char :3; - } BIT; - } FASTAT; - char wk4[3]; - union { - unsigned char BYTE; - struct { - unsigned char CFAEIE:1; - unsigned char :2; - unsigned char CMDLKIE:1; - unsigned char DFAEIE:1; - unsigned char :3; - } BIT; - } FAEINT; - char wk5[3]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char FRDYIE:1; - } BIT; - } FRDYIE; - char wk6[23]; - union { - unsigned long LONG; - struct { - unsigned long FSADDR:32; - } BIT; - } FSADDR; - union { - unsigned long LONG; - struct { - unsigned long FEADDR:32; - } BIT; - } FEADDR; - char wk7[72]; - union { - unsigned long LONG; - struct { - unsigned long :8; - unsigned long ILGCOMERR:1; - unsigned long FESETERR:1; - unsigned long SECERR:1; - unsigned long OTERR:1; - unsigned long :4; - unsigned long FRDY:1; - unsigned long ILGLERR:1; - unsigned long ERSERR:1; - unsigned long PRGERR:1; - unsigned long SUSRDY:1; - unsigned long DBFULL:1; - unsigned long ERSSPD:1; - unsigned long PRGSPD:1; - unsigned long :1; - unsigned long FLWEERR:1; - unsigned long :6; - } BIT; - } FSTATR; - union { - unsigned short WORD; - struct { - unsigned short KEY:8; - unsigned short FENTRYD:1; - unsigned short :6; - unsigned short FENTRYC:1; - } BIT; - } FENTRYR; - char wk8[6]; - union { - unsigned short WORD; - struct { - unsigned short KEY:8; - unsigned short :7; - unsigned short SUINIT:1; - } BIT; - } FSUINITR; - char wk9[18]; - union { - unsigned short WORD; - struct { - unsigned short CMDR:8; - unsigned short PCMDR:8; - } BIT; - } FCMDR; - char wk10[46]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char BCDIR:1; - } BIT; - } FBCCNT; - char wk11[3]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char BCST:1; - } BIT; - } FBCSTAT; - char wk12[3]; - union { - unsigned long LONG; - struct { - unsigned long :13; - unsigned long PSADR:19; - } BIT; - } FPSADDR; - union { - unsigned long LONG; - struct { - unsigned long BTFLG:1; - unsigned long :3; - unsigned long FAWE:12; - unsigned long FSPR:1; - unsigned long :3; - unsigned long FAWS:12; - } BIT; - } FAWMON; - union { - unsigned short WORD; - struct { - unsigned short :15; - unsigned short ESUSPMD:1; - } BIT; - } FCPSR; - char wk13[2]; - union { - unsigned short WORD; - struct { - unsigned short KEY:8; - unsigned short PCKA:8; - } BIT; - } FPCKAR; - char wk14[2]; - union { - unsigned short WORD; - struct { - unsigned short KEY:8; - unsigned short :6; - unsigned short SAS:2; - } BIT; - } FSUACR; -} st_flash_t; - -typedef struct st_glcdc { - union { - unsigned long LONG; - struct { - unsigned long A:8; - unsigned long R:8; - unsigned long G:8; - unsigned long B:8; - } BIT; - } GR1CLUT0[256]; - union { - unsigned long LONG; - struct { - unsigned long A:8; - unsigned long R:8; - unsigned long G:8; - unsigned long B:8; - } BIT; - } GR1CLUT1[256]; - union { - unsigned long LONG; - struct { - unsigned long A:8; - unsigned long R:8; - unsigned long G:8; - unsigned long B:8; - } BIT; - } GR2CLUT0[256]; - union { - unsigned long LONG; - struct { - unsigned long A:8; - unsigned long R:8; - unsigned long G:8; - unsigned long B:8; - } BIT; - } GR2CLUT1[256]; - union { - unsigned long LONG; - struct { - unsigned long :15; - unsigned long SWRST:1; - unsigned long :7; - unsigned long VEN:1; - unsigned long :7; - unsigned long EN:1; - } BIT; - } BGEN; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long FV:11; - unsigned long :5; - unsigned long FH:11; - } BIT; - } BGPERI; - union { - unsigned long LONG; - struct { - unsigned long :12; - unsigned long VP:4; - unsigned long :12; - unsigned long HP:4; - } BIT; - } BGSYNC; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long VP:11; - unsigned long :5; - unsigned long VW:11; - } BIT; - } BGVSIZE; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long HP:11; - unsigned long :5; - unsigned long HW:11; - } BIT; - } BGHSIZE; - union { - unsigned long LONG; - struct { - unsigned long :8; - unsigned long R:8; - unsigned long G:8; - unsigned long B:8; - } BIT; - } BGCOLOR; - union { - unsigned long LONG; - struct { - unsigned long :15; - unsigned long SWRST:1; - unsigned long :7; - unsigned long VEN:1; - unsigned long :7; - unsigned long EN:1; - } BIT; - } BGMON; - char wk0[228]; - union { - unsigned long LONG; - struct { - unsigned long :31; - unsigned long VEN:1; - } BIT; - } GR1VEN; - union { - unsigned long LONG; - struct { - unsigned long :31; - unsigned long RENB:1; - } BIT; - } GR1FLMRD; - char wk1[4]; - unsigned long GR1FLM2; - union { - unsigned long LONG; - struct { - unsigned long LNOFF:16; - unsigned long :16; - } BIT; - } GR1FLM3; - char wk2[4]; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long LNNUM:11; - unsigned long DATANUM:16; - } BIT; - } GR1FLM5; - union { - unsigned long LONG; - struct { - unsigned long :1; - unsigned long FORMAT:3; - unsigned long :28; - } BIT; - } GR1FLM6; - union { - unsigned long LONG; - struct { - unsigned long :19; - unsigned long ARCON:1; - unsigned long :3; - unsigned long ARCDISPON:1; - unsigned long :3; - unsigned long GRCDISPON:1; - unsigned long :2; - unsigned long DISPSEL:2; - } BIT; - } GR1AB1; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GRCVS:11; - unsigned long :5; - unsigned long GRCVW:11; - } BIT; - } GR1AB2; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GRCHS:11; - unsigned long :5; - unsigned long GRCHW:11; - } BIT; - } GR1AB3; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long ARCVS:11; - unsigned long :5; - unsigned long ARCVW:11; - } BIT; - } GR1AB4; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long ARCHS:11; - unsigned long :5; - unsigned long ARCHW:11; - } BIT; - } GR1AB5; - union { - unsigned long LONG; - struct { - unsigned long :7; - unsigned long ARCCOEF:9; - unsigned long :8; - unsigned long ARCRATE:8; - } BIT; - } GR1AB6; - union { - unsigned long LONG; - struct { - unsigned long :8; - unsigned long ARCDEF:8; - unsigned long :15; - unsigned long CKON:1; - } BIT; - } GR1AB7; - union { - unsigned long LONG; - struct { - unsigned long :8; - unsigned long CKKG:8; - unsigned long CKKB:8; - unsigned long CKKR:8; - } BIT; - } GR1AB8; - union { - unsigned long LONG; - struct { - unsigned long CKA:8; - unsigned long CKG:8; - unsigned long CKB:8; - unsigned long CKR:8; - } BIT; - } GR1AB9; - char wk3[8]; - union { - unsigned long LONG; - struct { - unsigned long :8; - unsigned long G:8; - unsigned long B:8; - unsigned long R:8; - } BIT; - } GR1BASE; - union { - unsigned long LONG; - struct { - unsigned long :15; - unsigned long SEL:1; - unsigned long :5; - unsigned long LINE:11; - } BIT; - } GR1CLUTINT; - union { - unsigned long LONG; - struct { - unsigned long :15; - unsigned long UFST:1; - unsigned long :15; - unsigned long ARCST:1; - } BIT; - } GR1MON; - char wk4[168]; - union { - unsigned long LONG; - struct { - unsigned long :31; - unsigned long VEN:1; - } BIT; - } GR2VEN; - union { - unsigned long LONG; - struct { - unsigned long :31; - unsigned long RENB:1; - } BIT; - } GR2FLMRD; - char wk5[4]; - unsigned long GR2FLM2; - union { - unsigned long LONG; - struct { - unsigned long LNOFF:16; - unsigned long :16; - } BIT; - } GR2FLM3; - char wk6[4]; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long LNNUM:11; - unsigned long DATANUM:16; - } BIT; - } GR2FLM5; - union { - unsigned long LONG; - struct { - unsigned long :1; - unsigned long FORMAT:3; - unsigned long :28; - } BIT; - } GR2FLM6; - union { - unsigned long LONG; - struct { - unsigned long :19; - unsigned long ARCON:1; - unsigned long :3; - unsigned long ARCDISPON:1; - unsigned long :3; - unsigned long GRCDISPON:1; - unsigned long :2; - unsigned long DISPSEL:2; - } BIT; - } GR2AB1; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GRCVS:11; - unsigned long :5; - unsigned long GRCVW:11; - } BIT; - } GR2AB2; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GRCHS:11; - unsigned long :5; - unsigned long GRCHW:11; - } BIT; - } GR2AB3; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long ARCVS:11; - unsigned long :5; - unsigned long ARCVW:11; - } BIT; - } GR2AB4; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long ARCHS:11; - unsigned long :5; - unsigned long ARCHW:11; - } BIT; - } GR2AB5; - union { - unsigned long LONG; - struct { - unsigned long :7; - unsigned long ARCCOEF:9; - unsigned long :8; - unsigned long ARCRATE:8; - } BIT; - } GR2AB6; - union { - unsigned long LONG; - struct { - unsigned long :8; - unsigned long ARCDEF:8; - unsigned long :15; - unsigned long CKON:1; - } BIT; - } GR2AB7; - union { - unsigned long LONG; - struct { - unsigned long :8; - unsigned long CKKG:8; - unsigned long CKKB:8; - unsigned long CKKR:8; - } BIT; - } GR2AB8; - union { - unsigned long LONG; - struct { - unsigned long CKA:8; - unsigned long CKG:8; - unsigned long CKB:8; - unsigned long CKR:8; - } BIT; - } GR2AB9; - char wk7[8]; - union { - unsigned long LONG; - struct { - unsigned long :8; - unsigned long G:8; - unsigned long B:8; - unsigned long R:8; - } BIT; - } GR2BASE; - union { - unsigned long LONG; - struct { - unsigned long :15; - unsigned long SEL:1; - unsigned long :5; - unsigned long LINE:11; - } BIT; - } GR2CLUTINT; - union { - unsigned long LONG; - struct { - unsigned long :15; - unsigned long UFST:1; - unsigned long :15; - unsigned long ARCST:1; - } BIT; - } GR2MON; - char wk8[168]; - union { - unsigned long LONG; - struct { - unsigned long :31; - unsigned long VEN:1; - } BIT; - } GAMGVEN; - union { - unsigned long LONG; - struct { - unsigned long :31; - unsigned long GAMON:1; - } BIT; - } GAMSW; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN00:11; - unsigned long :5; - unsigned long GAIN01:11; - } BIT; - } GAMGLUT1; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN02:11; - unsigned long :5; - unsigned long GAIN03:11; - } BIT; - } GAMGLUT2; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN04:11; - unsigned long :5; - unsigned long GAIN05:11; - } BIT; - } GAMGLUT3; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN06:11; - unsigned long :5; - unsigned long GAIN07:11; - } BIT; - } GAMGLUT4; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN08:11; - unsigned long :5; - unsigned long GAIN09:11; - } BIT; - } GAMGLUT5; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN10:11; - unsigned long :5; - unsigned long GAIN11:11; - } BIT; - } GAMGLUT6; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN12:11; - unsigned long :5; - unsigned long GAIN13:11; - } BIT; - } GAMGLUT7; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN14:11; - unsigned long :5; - unsigned long GAIN15:11; - } BIT; - } GAMGLUT8; - union { - unsigned long LONG; - struct { - unsigned long :2; - unsigned long TH01:10; - unsigned long TH02:10; - unsigned long TH03:10; - } BIT; - } GAMGAREA1; - union { - unsigned long LONG; - struct { - unsigned long :2; - unsigned long TH04:10; - unsigned long TH05:10; - unsigned long TH06:10; - } BIT; - } GAMGAREA2; - union { - unsigned long LONG; - struct { - unsigned long :2; - unsigned long TH07:10; - unsigned long TH08:10; - unsigned long TH09:10; - } BIT; - } GAMGAREA3; - union { - unsigned long LONG; - struct { - unsigned long :2; - unsigned long TH10:10; - unsigned long TH11:10; - unsigned long TH12:10; - } BIT; - } GAMGAREA4; - union { - unsigned long LONG; - struct { - unsigned long :2; - unsigned long TH13:10; - unsigned long TH14:10; - unsigned long TH15:10; - } BIT; - } GAMGAREA5; - char wk9[4]; - union { - unsigned long LONG; - struct { - unsigned long :31; - unsigned long VEN:1; - } BIT; - } GAMBVEN; - char wk10[4]; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN00:11; - unsigned long :5; - unsigned long GAIN01:11; - } BIT; - } GAMBLUT1; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN02:11; - unsigned long :5; - unsigned long GAIN03:11; - } BIT; - } GAMBLUT2; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN04:11; - unsigned long :5; - unsigned long GAIN05:11; - } BIT; - } GAMBLUT3; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN06:11; - unsigned long :5; - unsigned long GAIN07:11; - } BIT; - } GAMBLUT4; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN08:11; - unsigned long :5; - unsigned long GAIN09:11; - } BIT; - } GAMBLUT5; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN10:11; - unsigned long :5; - unsigned long GAIN11:11; - } BIT; - } GAMBLUT6; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN12:11; - unsigned long :5; - unsigned long GAIN13:11; - } BIT; - } GAMBLUT7; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN14:11; - unsigned long :5; - unsigned long GAIN15:11; - } BIT; - } GAMBLUT8; - union { - unsigned long LONG; - struct { - unsigned long :2; - unsigned long TH01:10; - unsigned long TH02:10; - unsigned long TH03:10; - } BIT; - } GAMBAREA1; - union { - unsigned long LONG; - struct { - unsigned long :2; - unsigned long TH04:10; - unsigned long TH05:10; - unsigned long TH06:10; - } BIT; - } GAMBAREA2; - union { - unsigned long LONG; - struct { - unsigned long :2; - unsigned long TH07:10; - unsigned long TH08:10; - unsigned long TH09:10; - } BIT; - } GAMBAREA3; - union { - unsigned long LONG; - struct { - unsigned long :2; - unsigned long TH10:10; - unsigned long TH11:10; - unsigned long TH12:10; - } BIT; - } GAMBAREA4; - union { - unsigned long LONG; - struct { - unsigned long :2; - unsigned long TH13:10; - unsigned long TH14:10; - unsigned long TH15:10; - } BIT; - } GAMBAREA5; - char wk11[4]; - union { - unsigned long LONG; - struct { - unsigned long :31; - unsigned long VEN:1; - } BIT; - } GAMRVEN; - char wk12[4]; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN00:11; - unsigned long :5; - unsigned long GAIN01:11; - } BIT; - } GAMRLUT1; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN02:11; - unsigned long :5; - unsigned long GAIN03:11; - } BIT; - } GAMRLUT2; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN04:11; - unsigned long :5; - unsigned long GAIN05:11; - } BIT; - } GAMRLUT3; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN06:11; - unsigned long :5; - unsigned long GAIN07:11; - } BIT; - } GAMRLUT4; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN08:11; - unsigned long :5; - unsigned long GAIN09:11; - } BIT; - } GAMRLUT5; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN10:11; - unsigned long :5; - unsigned long GAIN11:11; - } BIT; - } GAMRLUT6; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN12:11; - unsigned long :5; - unsigned long GAIN13:11; - } BIT; - } GAMRLUT7; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long GAIN14:11; - unsigned long :5; - unsigned long GAIN15:11; - } BIT; - } GAMRLUT8; - union { - unsigned long LONG; - struct { - unsigned long :2; - unsigned long TH01:10; - unsigned long TH02:10; - unsigned long TH03:10; - } BIT; - } GAMRAREA1; - union { - unsigned long LONG; - struct { - unsigned long :2; - unsigned long TH04:10; - unsigned long TH05:10; - unsigned long TH06:10; - } BIT; - } GAMRAREA2; - union { - unsigned long LONG; - struct { - unsigned long :2; - unsigned long TH07:10; - unsigned long TH08:10; - unsigned long TH09:10; - } BIT; - } GAMRAREA3; - union { - unsigned long LONG; - struct { - unsigned long :2; - unsigned long TH10:10; - unsigned long TH11:10; - unsigned long TH12:10; - } BIT; - } GAMRAREA4; - union { - unsigned long LONG; - struct { - unsigned long :2; - unsigned long TH13:10; - unsigned long TH14:10; - unsigned long TH15:10; - } BIT; - } GAMRAREA5; - char wk13[4]; - union { - unsigned long LONG; - struct { - unsigned long :31; - unsigned long VEN:1; - } BIT; - } OUTVEN; - union { - unsigned long LONG; - struct { - unsigned long :3; - unsigned long ENDIANON:1; - unsigned long :3; - unsigned long SWAPON:1; - unsigned long :10; - unsigned long FORMAT:2; - unsigned long :2; - unsigned long FRQSEL:1; - unsigned long :4; - unsigned long DIRSEL:1; - unsigned long :2; - unsigned long PHASE:2; - } BIT; - } OUTSET; - union { - unsigned long LONG; - struct { - unsigned long :22; - unsigned long BRTG:10; - } BIT; - } BRIGHT1; - union { - unsigned long LONG; - struct { - unsigned long :6; - unsigned long BRTB:10; - unsigned long :6; - unsigned long BRTR:10; - } BIT; - } BRIGHT2; - union { - unsigned long LONG; - struct { - unsigned long :8; - unsigned long CONTG:8; - unsigned long CONTB:8; - unsigned long CONTR:8; - } BIT; - } CONTRAST; - union { - unsigned long LONG; - struct { - unsigned long :10; - unsigned long SEL:2; - unsigned long :2; - unsigned long FORM:2; - unsigned long :2; - unsigned long PA:2; - unsigned long :2; - unsigned long PB:2; - unsigned long :2; - unsigned long PC:2; - unsigned long :2; - unsigned long PD:2; - } BIT; - } PANELDTHA; - char wk14[12]; - union { - unsigned long LONG; - struct { - unsigned long :19; - unsigned long FRONTGAM:1; - unsigned long :3; - unsigned long LCDEDG:1; - unsigned long :1; - unsigned long TCON0EDG:1; - unsigned long TCON1EDG:1; - unsigned long TCON2EDG:1; - unsigned long TCON3EDG:1; - unsigned long :3; - } BIT; - } CLKPHASE; - char wk15[28]; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long HALF:11; - unsigned long :5; - unsigned long OFFSET:11; - } BIT; - } TCONTIM; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long VS:11; - unsigned long :5; - unsigned long VW:11; - } BIT; - } TCONSTVA1; - union { - unsigned long LONG; - struct { - unsigned long :27; - unsigned long INV:1; - unsigned long :1; - unsigned long SEL:3; - } BIT; - } TCONSTVA2; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long VS:11; - unsigned long :5; - unsigned long VW:11; - } BIT; - } TCONSTVB1; - union { - unsigned long LONG; - struct { - unsigned long :27; - unsigned long INV:1; - unsigned long :1; - unsigned long SEL:3; - } BIT; - } TCONSTVB2; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long HS:11; - unsigned long :5; - unsigned long HW:11; - } BIT; - } TCONSTHA1; - union { - unsigned long LONG; - struct { - unsigned long :23; - unsigned long HSSEL:1; - unsigned long :3; - unsigned long INV:1; - unsigned long :1; - unsigned long SEL:3; - } BIT; - } TCONSTHA2; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long HS:11; - unsigned long :5; - unsigned long HW:11; - } BIT; - } TCONSTHB1; - union { - unsigned long LONG; - struct { - unsigned long :23; - unsigned long HSSEL:1; - unsigned long :3; - unsigned long INV:1; - unsigned long :1; - unsigned long SEL:3; - } BIT; - } TCONSTHB2; - union { - unsigned long LONG; - struct { - unsigned long :31; - unsigned long INV:1; - } BIT; - } TCONDE; - char wk16[20]; - union { - unsigned long LONG; - struct { - unsigned long :29; - unsigned long GR2UFDTC:1; - unsigned long GR1UFDTC:1; - unsigned long VPOSDTC:1; - } BIT; - } DTCTEN; - union { - unsigned long LONG; - struct { - unsigned long :29; - unsigned long GR2UFINTEN:1; - unsigned long GR1UFINTEN:1; - unsigned long VPOSINTEN:1; - } BIT; - } INTEN; - union { - unsigned long LONG; - struct { - unsigned long :29; - unsigned long GR2UFCLR:1; - unsigned long GR1UFCLR:1; - unsigned long VPOSCLR:1; - } BIT; - } STCLR; - union { - unsigned long LONG; - struct { - unsigned long :29; - unsigned long GR2UF:1; - unsigned long GR1UF:1; - unsigned long VPOS:1; - } BIT; - } STMON; - union { - unsigned long LONG; - struct { - unsigned long :19; - unsigned long PIXSEL:1; - unsigned long :3; - unsigned long CLKSEL:1; - unsigned long :1; - unsigned long CLKEN:1; - unsigned long DCDR:6; - } BIT; - } PANELCLK; -} st_glcdc_t; - -typedef struct st_icu { - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char IR:1; - } BIT; - } IR[256]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char DTCE:1; - } BIT; - } DTCER[256]; - union { - unsigned char BYTE; - struct { - unsigned char IEN7:1; - unsigned char IEN6:1; - unsigned char IEN5:1; - unsigned char IEN4:1; - unsigned char IEN3:1; - unsigned char IEN2:1; - unsigned char IEN1:1; - unsigned char IEN0:1; - } BIT; - } IER[32]; - char wk0[192]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char SWINT:1; - } BIT; - } SWINTR; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char SWINT2:1; - } BIT; - } SWINT2R; - char wk1[14]; - union { - unsigned short WORD; - struct { - unsigned short FIEN:1; - unsigned short :7; - unsigned short FVCT:8; - } BIT; - } FIR; - char wk2[14]; - union { - unsigned char BYTE; - struct { - unsigned char :4; - unsigned char IPR:4; - } BIT; - } IPR[256]; - unsigned char DMRSR0; - char wk3[3]; - unsigned char DMRSR1; - char wk4[3]; - unsigned char DMRSR2; - char wk5[3]; - unsigned char DMRSR3; - char wk6[3]; - unsigned char DMRSR4; - char wk7[3]; - unsigned char DMRSR5; - char wk8[3]; - unsigned char DMRSR6; - char wk9[3]; - unsigned char DMRSR7; - char wk10[227]; - union { - unsigned char BYTE; - struct { - unsigned char :4; - unsigned char IRQMD:2; - unsigned char :2; - } BIT; - } IRQCR[16]; - char wk11[16]; - union { - unsigned char BYTE; - struct { - unsigned char FLTEN7:1; - unsigned char FLTEN6:1; - unsigned char FLTEN5:1; - unsigned char FLTEN4:1; - unsigned char FLTEN3:1; - unsigned char FLTEN2:1; - unsigned char FLTEN1:1; - unsigned char FLTEN0:1; - } BIT; - } IRQFLTE0; - union { - unsigned char BYTE; - struct { - unsigned char FLTEN15:1; - unsigned char FLTEN14:1; - unsigned char FLTEN13:1; - unsigned char FLTEN12:1; - unsigned char FLTEN11:1; - unsigned char FLTEN10:1; - unsigned char FLTEN9:1; - unsigned char FLTEN8:1; - } BIT; - } IRQFLTE1; - char wk12[6]; - union { - unsigned short WORD; - struct { - unsigned short FCLKSEL7:2; - unsigned short FCLKSEL6:2; - unsigned short FCLKSEL5:2; - unsigned short FCLKSEL4:2; - unsigned short FCLKSEL3:2; - unsigned short FCLKSEL2:2; - unsigned short FCLKSEL1:2; - unsigned short FCLKSEL0:2; - } BIT; - } IRQFLTC0; - union { - unsigned short WORD; - struct { - unsigned short FCLKSEL15:2; - unsigned short FCLKSEL14:2; - unsigned short FCLKSEL13:2; - unsigned short FCLKSEL12:2; - unsigned short FCLKSEL11:2; - unsigned short FCLKSEL10:2; - unsigned short FCLKSEL9:2; - unsigned short FCLKSEL8:2; - } BIT; - } IRQFLTC1; - char wk13[84]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char RAMST:1; - unsigned char LVD2ST:1; - unsigned char LVD1ST:1; - unsigned char IWDTST:1; - unsigned char WDTST:1; - unsigned char OSTST:1; - unsigned char NMIST:1; - } BIT; - } NMISR; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char RAMEN:1; - unsigned char LVD2EN:1; - unsigned char LVD1EN:1; - unsigned char IWDTEN:1; - unsigned char WDTEN:1; - unsigned char OSTEN:1; - unsigned char NMIEN:1; - } BIT; - } NMIER; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char LVD2CLR:1; - unsigned char LVD1CLR:1; - unsigned char IWDTCLR:1; - unsigned char WDTCLR:1; - unsigned char OSTCLR:1; - unsigned char NMICLR:1; - } BIT; - } NMICLR; - union { - unsigned char BYTE; - struct { - unsigned char :4; - unsigned char NMIMD:1; - unsigned char :3; - } BIT; - } NMICR; - char wk14[12]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char NFLTEN:1; - } BIT; - } NMIFLTE; - char wk15[3]; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char NFCLKSEL:2; - } BIT; - } NMIFLTC; - char wk16[107]; - union { - unsigned long LONG; - struct { - unsigned long IS31:1; - unsigned long IS30:1; - unsigned long IS29:1; - unsigned long IS28:1; - unsigned long IS27:1; - unsigned long IS26:1; - unsigned long IS25:1; - unsigned long IS24:1; - unsigned long IS23:1; - unsigned long IS22:1; - unsigned long IS21:1; - unsigned long IS20:1; - unsigned long IS19:1; - unsigned long IS18:1; - unsigned long IS17:1; - unsigned long IS16:1; - unsigned long IS15:1; - unsigned long IS14:1; - unsigned long IS13:1; - unsigned long IS12:1; - unsigned long IS11:1; - unsigned long IS10:1; - unsigned long IS9:1; - unsigned long IS8:1; - unsigned long IS7:1; - unsigned long IS6:1; - unsigned long IS5:1; - unsigned long IS4:1; - unsigned long IS3:1; - unsigned long IS2:1; - unsigned long IS1:1; - unsigned long IS0:1; - } BIT; - } GRPBE0; - char wk17[44]; - union { - unsigned long LONG; - struct { - unsigned long IS31:1; - unsigned long IS30:1; - unsigned long IS29:1; - unsigned long IS28:1; - unsigned long IS27:1; - unsigned long IS26:1; - unsigned long IS25:1; - unsigned long IS24:1; - unsigned long IS23:1; - unsigned long IS22:1; - unsigned long IS21:1; - unsigned long IS20:1; - unsigned long IS19:1; - unsigned long IS18:1; - unsigned long IS17:1; - unsigned long IS16:1; - unsigned long IS15:1; - unsigned long IS14:1; - unsigned long IS13:1; - unsigned long IS12:1; - unsigned long IS11:1; - unsigned long IS10:1; - unsigned long IS9:1; - unsigned long IS8:1; - unsigned long IS7:1; - unsigned long IS6:1; - unsigned long IS5:1; - unsigned long IS4:1; - unsigned long IS3:1; - unsigned long IS2:1; - unsigned long IS1:1; - unsigned long IS0:1; - } BIT; - } GRPBL0; - union { - unsigned long LONG; - struct { - unsigned long IS31:1; - unsigned long IS30:1; - unsigned long IS29:1; - unsigned long IS28:1; - unsigned long IS27:1; - unsigned long IS26:1; - unsigned long IS25:1; - unsigned long IS24:1; - unsigned long IS23:1; - unsigned long IS22:1; - unsigned long IS21:1; - unsigned long IS20:1; - unsigned long IS19:1; - unsigned long IS18:1; - unsigned long IS17:1; - unsigned long IS16:1; - unsigned long IS15:1; - unsigned long IS14:1; - unsigned long IS13:1; - unsigned long IS12:1; - unsigned long IS11:1; - unsigned long IS10:1; - unsigned long IS9:1; - unsigned long IS8:1; - unsigned long IS7:1; - unsigned long IS6:1; - unsigned long IS5:1; - unsigned long IS4:1; - unsigned long IS3:1; - unsigned long IS2:1; - unsigned long IS1:1; - unsigned long IS0:1; - } BIT; - } GRPBL1; - union { - unsigned long LONG; - struct { - unsigned long IS31:1; - unsigned long IS30:1; - unsigned long IS29:1; - unsigned long IS28:1; - unsigned long IS27:1; - unsigned long IS26:1; - unsigned long IS25:1; - unsigned long IS24:1; - unsigned long IS23:1; - unsigned long IS22:1; - unsigned long IS21:1; - unsigned long IS20:1; - unsigned long IS19:1; - unsigned long IS18:1; - unsigned long IS17:1; - unsigned long IS16:1; - unsigned long IS15:1; - unsigned long IS14:1; - unsigned long IS13:1; - unsigned long IS12:1; - unsigned long IS11:1; - unsigned long IS10:1; - unsigned long IS9:1; - unsigned long IS8:1; - unsigned long IS7:1; - unsigned long IS6:1; - unsigned long IS5:1; - unsigned long IS4:1; - unsigned long IS3:1; - unsigned long IS2:1; - unsigned long IS1:1; - unsigned long IS0:1; - } BIT; - } GRPBL2; - char wk18[4]; - union { - unsigned long LONG; - struct { - unsigned long EN31:1; - unsigned long EN30:1; - unsigned long EN29:1; - unsigned long EN28:1; - unsigned long EN27:1; - unsigned long EN26:1; - unsigned long EN25:1; - unsigned long EN24:1; - unsigned long EN23:1; - unsigned long EN22:1; - unsigned long EN21:1; - unsigned long EN20:1; - unsigned long EN19:1; - unsigned long EN18:1; - unsigned long EN17:1; - unsigned long EN16:1; - unsigned long EN15:1; - unsigned long EN14:1; - unsigned long EN13:1; - unsigned long EN12:1; - unsigned long EN11:1; - unsigned long EN10:1; - unsigned long EN9:1; - unsigned long EN8:1; - unsigned long EN7:1; - unsigned long EN6:1; - unsigned long EN5:1; - unsigned long EN4:1; - unsigned long EN3:1; - unsigned long EN2:1; - unsigned long EN1:1; - unsigned long EN0:1; - } BIT; - } GENBE0; - char wk19[44]; - union { - unsigned long LONG; - struct { - unsigned long EN31:1; - unsigned long EN30:1; - unsigned long EN29:1; - unsigned long EN28:1; - unsigned long EN27:1; - unsigned long EN26:1; - unsigned long EN25:1; - unsigned long EN24:1; - unsigned long EN23:1; - unsigned long EN22:1; - unsigned long EN21:1; - unsigned long EN20:1; - unsigned long EN19:1; - unsigned long EN18:1; - unsigned long EN17:1; - unsigned long EN16:1; - unsigned long EN15:1; - unsigned long EN14:1; - unsigned long EN13:1; - unsigned long EN12:1; - unsigned long EN11:1; - unsigned long EN10:1; - unsigned long EN9:1; - unsigned long EN8:1; - unsigned long EN7:1; - unsigned long EN6:1; - unsigned long EN5:1; - unsigned long EN4:1; - unsigned long EN3:1; - unsigned long EN2:1; - unsigned long EN1:1; - unsigned long EN0:1; - } BIT; - } GENBL0; - union { - unsigned long LONG; - struct { - unsigned long EN31:1; - unsigned long EN30:1; - unsigned long EN29:1; - unsigned long EN28:1; - unsigned long EN27:1; - unsigned long EN26:1; - unsigned long EN25:1; - unsigned long EN24:1; - unsigned long EN23:1; - unsigned long EN22:1; - unsigned long EN21:1; - unsigned long EN20:1; - unsigned long EN19:1; - unsigned long EN18:1; - unsigned long EN17:1; - unsigned long EN16:1; - unsigned long EN15:1; - unsigned long EN14:1; - unsigned long EN13:1; - unsigned long EN12:1; - unsigned long EN11:1; - unsigned long EN10:1; - unsigned long EN9:1; - unsigned long EN8:1; - unsigned long EN7:1; - unsigned long EN6:1; - unsigned long EN5:1; - unsigned long EN4:1; - unsigned long EN3:1; - unsigned long EN2:1; - unsigned long EN1:1; - unsigned long EN0:1; - } BIT; - } GENBL1; - union { - unsigned long LONG; - struct { - unsigned long EN31:1; - unsigned long EN30:1; - unsigned long EN29:1; - unsigned long EN28:1; - unsigned long EN27:1; - unsigned long EN26:1; - unsigned long EN25:1; - unsigned long EN24:1; - unsigned long EN23:1; - unsigned long EN22:1; - unsigned long EN21:1; - unsigned long EN20:1; - unsigned long EN19:1; - unsigned long EN18:1; - unsigned long EN17:1; - unsigned long EN16:1; - unsigned long EN15:1; - unsigned long EN14:1; - unsigned long EN13:1; - unsigned long EN12:1; - unsigned long EN11:1; - unsigned long EN10:1; - unsigned long EN9:1; - unsigned long EN8:1; - unsigned long EN7:1; - unsigned long EN6:1; - unsigned long EN5:1; - unsigned long EN4:1; - unsigned long EN3:1; - unsigned long EN2:1; - unsigned long EN1:1; - unsigned long EN0:1; - } BIT; - } GENBL2; - char wk20[4]; - union { - unsigned long LONG; - struct { - unsigned long CLR31:1; - unsigned long CLR30:1; - unsigned long CLR29:1; - unsigned long CLR28:1; - unsigned long CLR27:1; - unsigned long CLR26:1; - unsigned long CLR25:1; - unsigned long CLR24:1; - unsigned long CLR23:1; - unsigned long CLR22:1; - unsigned long CLR21:1; - unsigned long CLR20:1; - unsigned long CLR19:1; - unsigned long CLR18:1; - unsigned long CLR17:1; - unsigned long CLR16:1; - unsigned long CLR15:1; - unsigned long CLR14:1; - unsigned long CLR13:1; - unsigned long CLR12:1; - unsigned long CLR11:1; - unsigned long CLR10:1; - unsigned long CLR9:1; - unsigned long CLR8:1; - unsigned long CLR7:1; - unsigned long CLR6:1; - unsigned long CLR5:1; - unsigned long CLR4:1; - unsigned long CLR3:1; - unsigned long CLR2:1; - unsigned long CLR1:1; - unsigned long CLR0:1; - } BIT; - } GCRBE0; - char wk21[124]; - union { - unsigned char BYTE; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned char PIR7:1; - unsigned char PIR6:1; - unsigned char PIR5:1; - unsigned char PIR4:1; - unsigned char PIR3:1; - unsigned char PIR2:1; - unsigned char PIR1:1; - unsigned char PIR0:1; - } BIT; -#endif - } PIBR0; - union { - unsigned char BYTE; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned char PIR7:1; - unsigned char PIR6:1; - unsigned char PIR5:1; - unsigned char PIR4:1; - unsigned char PIR3:1; - unsigned char PIR2:1; - unsigned char PIR1:1; - unsigned char PIR0:1; - } BIT; -#endif - } PIBR1; - union { - unsigned char BYTE; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned char PIR7:1; - unsigned char PIR6:1; - unsigned char PIR5:1; - unsigned char PIR4:1; - unsigned char PIR3:1; - unsigned char PIR2:1; - unsigned char PIR1:1; - unsigned char PIR0:1; - } BIT; -#endif - } PIBR2; - union { - unsigned char BYTE; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned char PIR7:1; - unsigned char PIR6:1; - unsigned char PIR5:1; - unsigned char PIR4:1; - unsigned char PIR3:1; - unsigned char PIR2:1; - unsigned char PIR1:1; - unsigned char PIR0:1; - } BIT; -#endif - } PIBR3; - union { - unsigned char BYTE; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned char PIR7:1; - unsigned char PIR6:1; - unsigned char PIR5:1; - unsigned char PIR4:1; - unsigned char PIR3:1; - unsigned char PIR2:1; - unsigned char PIR1:1; - unsigned char PIR0:1; - } BIT; -#endif - } PIBR4; - union { - unsigned char BYTE; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned char PIR7:1; - unsigned char PIR6:1; - unsigned char PIR5:1; - unsigned char PIR4:1; - unsigned char PIR3:1; - unsigned char PIR2:1; - unsigned char PIR1:1; - unsigned char PIR0:1; - } BIT; -#endif - } PIBR5; - union { - unsigned char BYTE; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned char PIR7:1; - unsigned char PIR6:1; - unsigned char PIR5:1; - unsigned char PIR4:1; - unsigned char PIR3:1; - unsigned char PIR2:1; - unsigned char PIR1:1; - unsigned char PIR0:1; - } BIT; -#endif - } PIBR6; - union { - unsigned char BYTE; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned char PIR7:1; - unsigned char PIR6:1; - unsigned char PIR5:1; - unsigned char PIR4:1; - unsigned char PIR3:1; - unsigned char PIR2:1; - unsigned char PIR1:1; - unsigned char PIR0:1; - } BIT; -#endif - } PIBR7; - union { - unsigned char BYTE; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned char PIR7:1; - unsigned char PIR6:1; - unsigned char PIR5:1; - unsigned char PIR4:1; - unsigned char PIR3:1; - unsigned char PIR2:1; - unsigned char PIR1:1; - unsigned char PIR0:1; - } BIT; -#endif - } PIBR8; - union { - unsigned char BYTE; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned char PIR7:1; - unsigned char PIR6:1; - unsigned char PIR5:1; - unsigned char PIR4:1; - unsigned char PIR3:1; - unsigned char PIR2:1; - unsigned char PIR1:1; - unsigned char PIR0:1; - } BIT; -#endif - } PIBR9; - union { - unsigned char BYTE; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned char PIR7:1; - unsigned char PIR6:1; - unsigned char PIR5:1; - unsigned char PIR4:1; - unsigned char PIR3:1; - unsigned char PIR2:1; - unsigned char PIR1:1; - unsigned char PIR0:1; - } BIT; -#endif - } PIBRA; - union { - unsigned char BYTE; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned char PIR7:1; - unsigned char PIR6:1; - unsigned char PIR5:1; - unsigned char PIR4:1; - unsigned char PIR3:1; - unsigned char PIR2:1; - unsigned char PIR1:1; - unsigned char PIR0:1; - } BIT; -#endif - } PIBRB; - char wk22[116]; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBXR128; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBXR129; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBXR130; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBXR131; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBXR132; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBXR133; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBXR134; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBXR135; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBXR136; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBXR137; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBXR138; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBXR139; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBXR140; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBXR141; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBXR142; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBXR143; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR144; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR145; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR146; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR147; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR148; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR149; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR150; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR151; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR152; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR153; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR154; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR155; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR156; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR157; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR158; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR159; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR160; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR161; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR162; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR163; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR164; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR165; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR166; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR167; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR168; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR169; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR170; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR171; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR172; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR173; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR174; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR175; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR176; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR177; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR178; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR179; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR180; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR181; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR182; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR183; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR184; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR185; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR186; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR187; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR188; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR189; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR190; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR191; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR192; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR193; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR194; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR195; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR196; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR197; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR198; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR199; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR200; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR201; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR202; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR203; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR204; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR205; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR206; - union { - unsigned char BYTE; - struct { - unsigned char SLI:8; - } BIT; - } SLIBR207; - char wk23[96]; - union { - unsigned long LONG; - struct { - unsigned long IS31:1; - unsigned long IS30:1; - unsigned long IS29:1; - unsigned long IS28:1; - unsigned long IS27:1; - unsigned long IS26:1; - unsigned long IS25:1; - unsigned long IS24:1; - unsigned long IS23:1; - unsigned long IS22:1; - unsigned long IS21:1; - unsigned long IS20:1; - unsigned long IS19:1; - unsigned long IS18:1; - unsigned long IS17:1; - unsigned long IS16:1; - unsigned long IS15:1; - unsigned long IS14:1; - unsigned long IS13:1; - unsigned long IS12:1; - unsigned long IS11:1; - unsigned long IS10:1; - unsigned long IS9:1; - unsigned long IS8:1; - unsigned long IS7:1; - unsigned long IS6:1; - unsigned long IS5:1; - unsigned long IS4:1; - unsigned long IS3:1; - unsigned long IS2:1; - unsigned long IS1:1; - unsigned long IS0:1; - } BIT; - } GRPAL0; - union { - unsigned long LONG; - struct { - unsigned long IS31:1; - unsigned long IS30:1; - unsigned long IS29:1; - unsigned long IS28:1; - unsigned long IS27:1; - unsigned long IS26:1; - unsigned long IS25:1; - unsigned long IS24:1; - unsigned long IS23:1; - unsigned long IS22:1; - unsigned long IS21:1; - unsigned long IS20:1; - unsigned long IS19:1; - unsigned long IS18:1; - unsigned long IS17:1; - unsigned long IS16:1; - unsigned long IS15:1; - unsigned long IS14:1; - unsigned long IS13:1; - unsigned long IS12:1; - unsigned long IS11:1; - unsigned long IS10:1; - unsigned long IS9:1; - unsigned long IS8:1; - unsigned long IS7:1; - unsigned long IS6:1; - unsigned long IS5:1; - unsigned long IS4:1; - unsigned long IS3:1; - unsigned long IS2:1; - unsigned long IS1:1; - unsigned long IS0:1; - } BIT; - } GRPAL1; - char wk24[56]; - union { - unsigned long LONG; - struct { - unsigned long EN31:1; - unsigned long EN30:1; - unsigned long EN29:1; - unsigned long EN28:1; - unsigned long EN27:1; - unsigned long EN26:1; - unsigned long EN25:1; - unsigned long EN24:1; - unsigned long EN23:1; - unsigned long EN22:1; - unsigned long EN21:1; - unsigned long EN20:1; - unsigned long EN19:1; - unsigned long EN18:1; - unsigned long EN17:1; - unsigned long EN16:1; - unsigned long EN15:1; - unsigned long EN14:1; - unsigned long EN13:1; - unsigned long EN12:1; - unsigned long EN11:1; - unsigned long EN10:1; - unsigned long EN9:1; - unsigned long EN8:1; - unsigned long EN7:1; - unsigned long EN6:1; - unsigned long EN5:1; - unsigned long EN4:1; - unsigned long EN3:1; - unsigned long EN2:1; - unsigned long EN1:1; - unsigned long EN0:1; - } BIT; - } GENAL0; - union { - unsigned long LONG; - struct { - unsigned long EN31:1; - unsigned long EN30:1; - unsigned long EN29:1; - unsigned long EN28:1; - unsigned long EN27:1; - unsigned long EN26:1; - unsigned long EN25:1; - unsigned long EN24:1; - unsigned long EN23:1; - unsigned long EN22:1; - unsigned long EN21:1; - unsigned long EN20:1; - unsigned long EN19:1; - unsigned long EN18:1; - unsigned long EN17:1; - unsigned long EN16:1; - unsigned long EN15:1; - unsigned long EN14:1; - unsigned long EN13:1; - unsigned long EN12:1; - unsigned long EN11:1; - unsigned long EN10:1; - unsigned long EN9:1; - unsigned long EN8:1; - unsigned long EN7:1; - unsigned long EN6:1; - unsigned long EN5:1; - unsigned long EN4:1; - unsigned long EN3:1; - unsigned long EN2:1; - unsigned long EN1:1; - unsigned long EN0:1; - } BIT; - } GENAL1; - char wk25[136]; - union { - unsigned char BYTE; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned char PIR7:1; - unsigned char PIR6:1; - unsigned char PIR5:1; - unsigned char PIR4:1; - unsigned char PIR3:1; - unsigned char PIR2:1; - unsigned char PIR1:1; - unsigned char PIR0:1; - } BIT; -#endif - } PIAR0; - union { - unsigned char BYTE; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned char PIR7:1; - unsigned char PIR6:1; - unsigned char PIR5:1; - unsigned char PIR4:1; - unsigned char PIR3:1; - unsigned char PIR2:1; - unsigned char PIR1:1; - unsigned char PIR0:1; - } BIT; -#endif - } PIAR1; - union { - unsigned char BYTE; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned char PIR7:1; - unsigned char PIR6:1; - unsigned char PIR5:1; - unsigned char PIR4:1; - unsigned char PIR3:1; - unsigned char PIR2:1; - unsigned char PIR1:1; - unsigned char PIR0:1; - } BIT; -#endif - } PIAR2; - union { - unsigned char BYTE; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned char PIR7:1; - unsigned char PIR6:1; - unsigned char PIR5:1; - unsigned char PIR4:1; - unsigned char PIR3:1; - unsigned char PIR2:1; - unsigned char PIR1:1; - unsigned char PIR0:1; - } BIT; -#endif - } PIAR3; - union { - unsigned char BYTE; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned char PIR7:1; - unsigned char PIR6:1; - unsigned char PIR5:1; - unsigned char PIR4:1; - unsigned char PIR3:1; - unsigned char PIR2:1; - unsigned char PIR1:1; - unsigned char PIR0:1; - } BIT; -#endif - } PIAR4; - union { - unsigned char BYTE; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned char PIR7:1; - unsigned char PIR6:1; - unsigned char PIR5:1; - unsigned char PIR4:1; - unsigned char PIR3:1; - unsigned char PIR2:1; - unsigned char PIR1:1; - unsigned char PIR0:1; - } BIT; -#endif - } PIAR5; - char wk26[5]; - union { - unsigned char BYTE; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned char PIR7:1; - unsigned char PIR6:1; - unsigned char PIR5:1; - unsigned char PIR4:1; - unsigned char PIR3:1; - unsigned char PIR2:1; - unsigned char PIR1:1; - unsigned char PIR0:1; - } BIT; -#endif - } PIARB; - char wk27[196]; - union { - unsigned char BYTE; - } SLIAR208; - union { - unsigned char BYTE; - } SLIAR209; - union { - unsigned char BYTE; - } SLIAR210; - union { - unsigned char BYTE; - } SLIAR211; - union { - unsigned char BYTE; - } SLIAR212; - union { - unsigned char BYTE; - } SLIAR213; - union { - unsigned char BYTE; - } SLIAR214; - union { - unsigned char BYTE; - } SLIAR215; - union { - unsigned char BYTE; - } SLIAR216; - union { - unsigned char BYTE; - } SLIAR217; - union { - unsigned char BYTE; - } SLIAR218; - union { - unsigned char BYTE; - } SLIAR219; - union { - unsigned char BYTE; - } SLIAR220; - union { - unsigned char BYTE; - } SLIAR221; - union { - unsigned char BYTE; - } SLIAR222; - union { - unsigned char BYTE; - } SLIAR223; - union { - unsigned char BYTE; - } SLIAR224; - union { - unsigned char BYTE; - } SLIAR225; - union { - unsigned char BYTE; - } SLIAR226; - union { - unsigned char BYTE; - } SLIAR227; - union { - unsigned char BYTE; - } SLIAR228; - union { - unsigned char BYTE; - } SLIAR229; - union { - unsigned char BYTE; - } SLIAR230; - union { - unsigned char BYTE; - } SLIAR231; - union { - unsigned char BYTE; - } SLIAR232; - union { - unsigned char BYTE; - } SLIAR233; - union { - unsigned char BYTE; - } SLIAR234; - union { - unsigned char BYTE; - } SLIAR235; - union { - unsigned char BYTE; - } SLIAR236; - union { - unsigned char BYTE; - } SLIAR237; - union { - unsigned char BYTE; - } SLIAR238; - union { - unsigned char BYTE; - } SLIAR239; - union { - unsigned char BYTE; - } SLIAR240; - union { - unsigned char BYTE; - } SLIAR241; - union { - unsigned char BYTE; - } SLIAR242; - union { - unsigned char BYTE; - } SLIAR243; - union { - unsigned char BYTE; - } SLIAR244; - union { - unsigned char BYTE; - } SLIAR245; - union { - unsigned char BYTE; - } SLIAR246; - union { - unsigned char BYTE; - } SLIAR247; - union { - unsigned char BYTE; - } SLIAR248; - union { - unsigned char BYTE; - } SLIAR249; - union { - unsigned char BYTE; - } SLIAR250; - union { - unsigned char BYTE; - } SLIAR251; - union { - unsigned char BYTE; - } SLIAR252; - union { - unsigned char BYTE; - } SLIAR253; - union { - unsigned char BYTE; - } SLIAR254; - union { - unsigned char BYTE; - } SLIAR255; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char WPRC:1; - } BIT; - } SLIPRCR; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char SELEXD1:1; - unsigned char SELEXD0:1; - } BIT; - } SELEXDR; -} st_icu_t; - -typedef struct st_iwdt { - unsigned char IWDTRR; - char wk0[1]; - union { - unsigned short WORD; - struct { - unsigned short :2; - unsigned short RPSS:2; - unsigned short :2; - unsigned short RPES:2; - unsigned short CKS:4; - unsigned short :2; - unsigned short TOPS:2; - } BIT; - } IWDTCR; - union { - unsigned short WORD; - struct { - unsigned short REFEF:1; - unsigned short UNDFF:1; - unsigned short CNTVAL:14; - } BIT; - } IWDTSR; - union { - unsigned char BYTE; - struct { - unsigned char RSTIRQS:1; - unsigned char :7; - } BIT; - } IWDTRCR; - char wk1[1]; - union { - unsigned char BYTE; - struct { - unsigned char SLCSTP:1; - unsigned char :7; - } BIT; - } IWDTCSTPR; -} st_iwdt_t; - -typedef struct st_mmcif { - union { - unsigned long LONG; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned long :1; - unsigned long BOOT:1; - unsigned long CMD:6; - unsigned long RTYP:2; - unsigned long RBSY:1; - unsigned long :1; - unsigned long WDAT:1; - unsigned long DWEN:1; - unsigned long CMLTE:1; - unsigned long CMD12EN:1; - unsigned long RIDXC:2; - unsigned long RCRC7C:2; - unsigned long :1; - unsigned long CRC16C:1; - unsigned long BOOTACK:1; - unsigned long CRCSTE:1; - unsigned long TBIT:1; - unsigned long OPDM:1; - unsigned long :2; - unsigned long SBIT:1; - unsigned long :1; - unsigned long DATW:2; - } BIT; -#endif - } CECMDSET; - char wk0[4]; - union { - unsigned long LONG; - } CEARG; - union { - unsigned long LONG; - struct { - unsigned long C12ARG:32; - } BIT; - } CEARGCMD12; - union { - unsigned long LONG; - struct { - unsigned long :31; - unsigned long BREAK:1; - } BIT; - } CECMDCTRL; - union { - unsigned long LONG; - struct { - unsigned long BLKCNT:16; - unsigned long BLKSIZ:16; - } BIT; - } CEBLOCKSET; - union { - unsigned long LONG; - struct { - unsigned long MMCBUSBSY:1; - unsigned long :6; - unsigned long CLKEN:1; - unsigned long :4; - unsigned long CLKDIV:4; - unsigned long :2; - unsigned long SRSPTO:2; - unsigned long SRBSYTO:4; - unsigned long SRWDTO:4; - unsigned long :4; - } BIT; - } CECLKCTRL; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long DMATYP:1; - unsigned long DMAWEN:1; - unsigned long DMAREN:1; - unsigned long :7; - unsigned long ATYP:1; - unsigned long :16; - } BIT; - } CEBUFACC; - unsigned long CERESP3; - unsigned long CERESP2; - unsigned long CERESP1; - unsigned long CERESP0; - union { - unsigned long LONG; - struct { - unsigned long RSP12:32; - } BIT; - } CERESPCMD12; - union { - unsigned long LONG; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned long DATA:32; - } BIT; -#endif - } CEDATA; - char wk1[4]; - union { - unsigned long LONG; - struct { - unsigned long SBTCLKDIV:4; - unsigned long SBTACKTO:4; - unsigned long SFSTBTDATTO:4; - unsigned long SBTDATTO:4; - unsigned long :16; - } BIT; - } CEBOOT; - union { - unsigned long LONG; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned long :5; - unsigned long CMD12DRE:1; - unsigned long CMD12RBE:1; - unsigned long CMD12CRE:1; - unsigned long DTRANE:1; - unsigned long BUFRE:1; - unsigned long BUFWEN:1; - unsigned long BUFREN:1; - unsigned long :2; - unsigned long RBSYE:1; - unsigned long CRSPE:1; - unsigned long CMDVIO:1; - unsigned long BUFVIO:1; - unsigned long :2; - unsigned long WDATERR:1; - unsigned long RDATERR:1; - unsigned long RIDXERR:1; - unsigned long RSPERR:1; - unsigned long :3; - unsigned long CRCSTO:1; - unsigned long WDATTO:1; - unsigned long RDATTO:1; - unsigned long RBSYTO:1; - unsigned long RSPTO:1; - } BIT; -#endif - } CEINT; - union { - unsigned long LONG; - struct { - unsigned long :5; - unsigned long MCMD12DRE:1; - unsigned long MCMD12RBE:1; - unsigned long MCMD12CRE:1; - unsigned long MDTRANE:1; - unsigned long MBUFRE:1; - unsigned long MBUFWEN:1; - unsigned long MBUFREN:1; - unsigned long :2; - unsigned long MRBSYE:1; - unsigned long MCRSPE:1; - unsigned long MCMDVIO:1; - unsigned long MBUFVIO:1; - unsigned long :2; - unsigned long MWDATERR:1; - unsigned long MRDATERR:1; - unsigned long MRIDXERR:1; - unsigned long MRSPERR:1; - unsigned long :3; - unsigned long MCRCSTO:1; - unsigned long MWDATTO:1; - unsigned long MRDATTO:1; - unsigned long MRBSYTO:1; - unsigned long MRSPTO:1; - } BIT; - } CEINTEN; - union { - unsigned long LONG; - struct { - unsigned long CMDSEQ:1; - unsigned long CMDSIG:1; - unsigned long RSPIDX:6; - unsigned long DATSIG:8; - unsigned long RCVBLK:16; - } BIT; - } CEHOSTSTS1; - union { - unsigned long LONG; - struct { - unsigned long CRCSTE:1; - unsigned long CRC16E:1; - unsigned long AC12CRCE:1; - unsigned long RSPCRC7E:1; - unsigned long CRCSTEBE:1; - unsigned long RDATEBE:1; - unsigned long AC12REBE:1; - unsigned long RSPEBE:1; - unsigned long AC12IDXE:1; - unsigned long RSPIDXE:1; - unsigned long BTACKPATE:1; - unsigned long BTACKEBE:1; - unsigned long :1; - unsigned long CRCST:3; - unsigned long :1; - unsigned long STRDATTO:1; - unsigned long DATBSYTO:1; - unsigned long CRCSTTO:1; - unsigned long AC12BSYTO:1; - unsigned long RSPBSYTO:1; - unsigned long AC12RSPTO:1; - unsigned long STRSPTO:1; - unsigned long BTACKTO:1; - unsigned long FSTBTDATTO:1; - unsigned long BTDATTO:1; - unsigned long :5; - } BIT; - } CEHOSTSTS2; - char wk2[32]; - union { - unsigned long LONG; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned long :17; - unsigned long CDSIG:1; - unsigned long CDRISE:1; - unsigned long CDFALL:1; - unsigned long :6; - unsigned long MCDRISE:1; - unsigned long MCDFALL:1; - unsigned long :4; - } BIT; -#endif - } CEDETECT; - union { - unsigned long LONG; - struct { - unsigned long :10; - unsigned long RESNOUT:1; - unsigned long :1; - unsigned long CLKMAIN:1; - unsigned long :19; - } BIT; - } CEADDMODE; - char wk3[4]; - union { - unsigned long LONG; - struct { - unsigned long SWRST:1; - unsigned long :15; - unsigned long VERSION:16; - } BIT; - } CEVERSION; -} st_mmcif_t; - -typedef struct st_mpc { - union { - unsigned char BYTE; - struct { - unsigned char CS7E:1; - unsigned char CS6E:1; - unsigned char CS5E:1; - unsigned char CS4E:1; - unsigned char CS3E:1; - unsigned char CS2E:1; - unsigned char CS1E:1; - unsigned char CS0E:1; - } BIT; - } PFCSE; - char wk0[1]; - union { - unsigned char BYTE; - struct { - unsigned char CS3S:2; - unsigned char CS2S:2; - unsigned char CS1S:2; - unsigned char :1; - unsigned char CS0S:1; - } BIT; - } PFCSS0; - union { - unsigned char BYTE; - struct { - unsigned char CS7S:2; - unsigned char CS6S:2; - unsigned char CS5S:2; - unsigned char CS4S:2; - } BIT; - } PFCSS1; - union { - unsigned char BYTE; - struct { - unsigned char A15E:1; - unsigned char A14E:1; - unsigned char A13E:1; - unsigned char A12E:1; - unsigned char A11E:1; - unsigned char A10E:1; - unsigned char A9E:1; - unsigned char A8E:1; - } BIT; - } PFAOE0; - union { - unsigned char BYTE; - struct { - unsigned char A23E:1; - unsigned char A22E:1; - unsigned char A21E:1; - unsigned char A20E:1; - unsigned char A19E:1; - unsigned char A18E:1; - unsigned char A17E:1; - unsigned char A16E:1; - } BIT; - } PFAOE1; - union { - unsigned char BYTE; - struct { - unsigned char WR32BC32E:1; - unsigned char WR1BC1E:1; - unsigned char DH32E:1; - unsigned char DHE:1; - unsigned char BCLKO:1; - unsigned char ADRHMS2:1; - unsigned char ADRHMS:1; - unsigned char ADRLE:1; - } BIT; - } PFBCR0; - union { - unsigned char BYTE; - struct { - unsigned char SDCLKE:1; - unsigned char DQM1E:1; - unsigned char :1; - unsigned char MDSDE:1; - unsigned char ALES:1; - unsigned char ALEOE:1; - unsigned char WAITS:2; - } BIT; - } PFBCR1; - union { - unsigned char BYTE; - struct { - unsigned char D3S:2; - unsigned char D2S:2; - unsigned char D1S:2; - unsigned char D0S:2; - } BIT; - } PFBCR2; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char DLHS:1; - } BIT; - } PFBCR3; - char wk1[4]; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char PHYMODE0:1; - unsigned char :4; - } BIT; - } PFENET; - char wk2[16]; - union { - unsigned char BYTE; - struct { - unsigned char B0WI:1; - unsigned char PFSWE:1; - unsigned char :6; - } BIT; - } PWPR; - char wk3[32]; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } P00PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } P01PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } P02PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char :6; - } BIT; - } P03PFS; - char wk4[1]; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char :6; - } BIT; - } P05PFS; - char wk5[1]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } P07PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } P10PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } P11PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } P12PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } P13PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } P14PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } P15PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } P16PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } P17PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } P20PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } P21PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P22PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P23PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P24PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P25PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P26PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P27PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } P30PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } P31PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } P32PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } P33PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } P34PFS; - char wk6[3]; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char :6; - } BIT; - } P40PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char :6; - } BIT; - } P41PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char :6; - } BIT; - } P42PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char :6; - } BIT; - } P43PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char :6; - } BIT; - } P44PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char :6; - } BIT; - } P45PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char :6; - } BIT; - } P46PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char :6; - } BIT; - } P47PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P50PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P51PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P52PFS; - char wk7[1]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P54PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } P55PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P56PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P57PFS; - char wk8[6]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P66PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } P67PFS; - char wk9[1]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P71PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P72PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P73PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P74PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P75PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P76PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P77PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P80PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P81PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P82PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P83PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P84PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P85PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P86PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } P87PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char :1; - unsigned char PSEL:6; - } BIT; - } P90PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char :1; - unsigned char PSEL:6; - } BIT; - } P91PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char :1; - unsigned char PSEL:6; - } BIT; - } P92PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char :1; - unsigned char PSEL:6; - } BIT; - } P93PFS; - char wk10[4]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PA0PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } PA1PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PA2PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } PA3PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } PA4PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PA5PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PA6PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PA7PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } PB0PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } PB1PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PB2PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PB3PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PB4PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PB5PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PB6PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PB7PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } PC0PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } PC1PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PC2PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PC3PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PC4PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PC5PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } PC6PFS; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } PC7PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } PD0PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } PD1PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } PD2PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } PD3PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } PD4PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } PD5PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } PD6PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } PD7PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char :1; - unsigned char PSEL:6; - } BIT; - } PE0PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char :1; - unsigned char PSEL:6; - } BIT; - } PE1PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } PE2PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char :1; - unsigned char PSEL:6; - } BIT; - } PE3PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char :1; - unsigned char PSEL:6; - } BIT; - } PE4PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } PE5PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } PE6PFS; - union { - unsigned char BYTE; - struct { - unsigned char ASEL:1; - unsigned char ISEL:1; - unsigned char PSEL:6; - } BIT; - } PE7PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PF0PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PF1PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PF2PFS; - char wk11[2]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ISEL:1; - unsigned char :6; - } BIT; - } PF5PFS; - char wk12[18]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PJ0PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PJ1PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PJ2PFS; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PJ3PFS; - char wk13[1]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char PSEL:6; - } BIT; - } PJ5PFS; -} st_mpc_t; - -typedef struct st_mpu { - union { - unsigned long LONG; - struct { - unsigned long RSPN:28; - unsigned long :4; - } BIT; - } RSPAGE0; - union { - unsigned long LONG; - struct { - unsigned long REPN:28; - unsigned long UAC:3; - unsigned long V:1; - } BIT; - } REPAGE0; - union { - unsigned long LONG; - struct { - unsigned long RSPN:28; - unsigned long :4; - } BIT; - } RSPAGE1; - union { - unsigned long LONG; - struct { - unsigned long REPN:28; - unsigned long UAC:3; - unsigned long V:1; - } BIT; - } REPAGE1; - union { - unsigned long LONG; - struct { - unsigned long RSPN:28; - unsigned long :4; - } BIT; - } RSPAGE2; - union { - unsigned long LONG; - struct { - unsigned long REPN:28; - unsigned long UAC:3; - unsigned long V:1; - } BIT; - } REPAGE2; - union { - unsigned long LONG; - struct { - unsigned long RSPN:28; - unsigned long :4; - } BIT; - } RSPAGE3; - union { - unsigned long LONG; - struct { - unsigned long REPN:28; - unsigned long UAC:3; - unsigned long V:1; - } BIT; - } REPAGE3; - union { - unsigned long LONG; - struct { - unsigned long RSPN:28; - unsigned long :4; - } BIT; - } RSPAGE4; - union { - unsigned long LONG; - struct { - unsigned long REPN:28; - unsigned long UAC:3; - unsigned long V:1; - } BIT; - } REPAGE4; - union { - unsigned long LONG; - struct { - unsigned long RSPN:28; - unsigned long :4; - } BIT; - } RSPAGE5; - union { - unsigned long LONG; - struct { - unsigned long REPN:28; - unsigned long UAC:3; - unsigned long V:1; - } BIT; - } REPAGE5; - union { - unsigned long LONG; - struct { - unsigned long RSPN:28; - unsigned long :4; - } BIT; - } RSPAGE6; - union { - unsigned long LONG; - struct { - unsigned long REPN:28; - unsigned long UAC:3; - unsigned long V:1; - } BIT; - } REPAGE6; - union { - unsigned long LONG; - struct { - unsigned long RSPN:28; - unsigned long :4; - } BIT; - } RSPAGE7; - union { - unsigned long LONG; - struct { - unsigned long REPN:28; - unsigned long UAC:3; - unsigned long V:1; - } BIT; - } REPAGE7; - char wk0[192]; - union { - unsigned long LONG; - struct { - unsigned long :31; - unsigned long MPEN:1; - } BIT; - } MPEN; - union { - unsigned long LONG; - struct { - unsigned long :28; - unsigned long UBAC:3; - unsigned long :1; - } BIT; - } MPBAC; - union { - unsigned long LONG; - struct { - unsigned long :31; - unsigned long CLR:1; - } BIT; - } MPECLR; - union { - unsigned long LONG; - struct { - unsigned long :29; - unsigned long DRW:1; - unsigned long DMPER:1; - unsigned long IMPER:1; - } BIT; - } MPESTS; - char wk1[4]; - union { - unsigned long LONG; - struct { - unsigned long DEA:32; - } BIT; - } MPDEA; - char wk2[8]; - union { - unsigned long LONG; - struct { - unsigned long SA:32; - } BIT; - } MPSA; - union { - unsigned short WORD; - struct { - unsigned short :15; - unsigned short S:1; - } BIT; - } MPOPS; - union { - unsigned short WORD; - struct { - unsigned short :15; - unsigned short INV:1; - } BIT; - } MPOPI; - union { - unsigned long LONG; - struct { - unsigned long :8; - unsigned long HITI:8; - unsigned long :12; - unsigned long UHACI:3; - unsigned long :1; - } BIT; - } MHITI; - union { - unsigned long LONG; - struct { - unsigned long :8; - unsigned long HITD:8; - unsigned long :12; - unsigned long UHACD:3; - unsigned long :1; - } BIT; - } MHITD; -} st_mpu_t; - -typedef struct st_mtu { - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char OE4D:1; - unsigned char OE4C:1; - unsigned char OE3D:1; - unsigned char OE4B:1; - unsigned char OE4A:1; - unsigned char OE3B:1; - } BIT; - } TOERA; - char wk0[2]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char BDC:1; - unsigned char N:1; - unsigned char P:1; - unsigned char FB:1; - unsigned char WF:1; - unsigned char VF:1; - unsigned char UF:1; - } BIT; - } TGCRA; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char PSYE:1; - unsigned char :2; - unsigned char TOCL:1; - unsigned char TOCS:1; - unsigned char OLSN:1; - unsigned char OLSP:1; - } BIT; - } TOCR1A; - union { - unsigned char BYTE; - struct { - unsigned char BF:2; - unsigned char OLS3N:1; - unsigned char OLS3P:1; - unsigned char OLS2N:1; - unsigned char OLS2P:1; - unsigned char OLS1N:1; - unsigned char OLS1P:1; - } BIT; - } TOCR2A; - char wk1[4]; - unsigned short TCDRA; - unsigned short TDDRA; - char wk2[8]; - unsigned short TCNTSA; - unsigned short TCBRA; - char wk3[12]; - union { - unsigned char BYTE; - struct { - unsigned char T3AEN:1; - unsigned char T3ACOR:3; - unsigned char T4VEN:1; - unsigned char T4VCOR:3; - } BIT; - } TITCR1A; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char T3ACNT:3; - unsigned char :1; - unsigned char T4VCNT:3; - } BIT; - } TITCNT1A; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char BTE:2; - } BIT; - } TBTERA; - char wk4[1]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char TDER:1; - } BIT; - } TDERA; - char wk5[1]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char OLS3N:1; - unsigned char OLS3P:1; - unsigned char OLS2N:1; - unsigned char OLS2P:1; - unsigned char OLS1N:1; - unsigned char OLS1P:1; - } BIT; - } TOLBRA; - char wk6[3]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char TITM:1; - } BIT; - } TITMRA; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char TRG4COR:3; - } BIT; - } TITCR2A; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char TRG4CNT:3; - } BIT; - } TITCNT2A; - char wk7[35]; - union { - unsigned char BYTE; - struct { - unsigned char CCE:1; - unsigned char :5; - unsigned char SCC:1; - unsigned char WRE:1; - } BIT; - } TWCRA; - char wk8[15]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char DRS:1; - } BIT; - } TMDR2A; - char wk9[15]; - union { - unsigned char BYTE; - struct { - unsigned char CST4:1; - unsigned char CST3:1; - unsigned char :2; - unsigned char CST8:1; - unsigned char CST2:1; - unsigned char CST1:1; - unsigned char CST0:1; - } BIT; - } TSTRA; - union { - unsigned char BYTE; - struct { - unsigned char SYNC4:1; - unsigned char SYNC3:1; - unsigned char :3; - unsigned char SYNC2:1; - unsigned char SYNC1:1; - unsigned char SYNC0:1; - } BIT; - } TSYRA; - union { - unsigned char BYTE; - struct { - unsigned char SCH0:1; - unsigned char SCH1:1; - unsigned char SCH2:1; - unsigned char SCH3:1; - unsigned char SCH4:1; - unsigned char :1; - unsigned char SCH6:1; - unsigned char SCH7:1; - } BIT; - } TCSYSTR; - char wk10[1]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char RWE:1; - } BIT; - } TRWERA; - char wk11[1925]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char OE7D:1; - unsigned char OE7C:1; - unsigned char OE6D:1; - unsigned char OE7B:1; - unsigned char OE7A:1; - unsigned char OE6B:1; - } BIT; - } TOERB; - char wk12[3]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char PSYE:1; - unsigned char :2; - unsigned char TOCL:1; - unsigned char TOCS:1; - unsigned char OLSN:1; - unsigned char OLSP:1; - } BIT; - } TOCR1B; - union { - unsigned char BYTE; - struct { - unsigned char BF:2; - unsigned char OLS3N:1; - unsigned char OLS3P:1; - unsigned char OLS2N:1; - unsigned char OLS2P:1; - unsigned char OLS1N:1; - unsigned char OLS1P:1; - } BIT; - } TOCR2B; - char wk13[4]; - unsigned short TCDRB; - unsigned short TDDRB; - char wk14[8]; - unsigned short TCNTSB; - unsigned short TCBRB; - char wk15[12]; - union { - unsigned char BYTE; - struct { - unsigned char T6AEN:1; - unsigned char T6ACOR:3; - unsigned char T7VEN:1; - unsigned char T7VCOR:3; - } BIT; - } TITCR1B; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char T6ACNT:3; - unsigned char :1; - unsigned char T7VCNT:3; - } BIT; - } TITCNT1B; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char BTE:2; - } BIT; - } TBTERB; - char wk16[1]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char TDER:1; - } BIT; - } TDERB; - char wk17[1]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char OLS3N:1; - unsigned char OLS3P:1; - unsigned char OLS2N:1; - unsigned char OLS2P:1; - unsigned char OLS1N:1; - unsigned char OLS1P:1; - } BIT; - } TOLBRB; - char wk18[3]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char TITM:1; - } BIT; - } TITMRB; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char TRG7COR:3; - } BIT; - } TITCR2B; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char TRG7CNT:3; - } BIT; - } TITCNT2B; - char wk19[35]; - union { - unsigned char BYTE; - struct { - unsigned char CCE:1; - unsigned char :5; - unsigned char SCC:1; - unsigned char WRE:1; - } BIT; - } TWCRB; - char wk20[15]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char DRS:1; - } BIT; - } TMDR2B; - char wk21[15]; - union { - unsigned char BYTE; - struct { - unsigned char CST7:1; - unsigned char CST6:1; - unsigned char :6; - } BIT; - } TSTRB; - union { - unsigned char BYTE; - struct { - unsigned char SYNC7:1; - unsigned char SYNC6:1; - unsigned char :6; - } BIT; - } TSYRB; - char wk22[2]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char RWE:1; - } BIT; - } TRWERB; -} st_mtu_t; - -typedef struct st_mtu0 { - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char NFCS:2; - unsigned char NFDEN:1; - unsigned char NFCEN:1; - unsigned char NFBEN:1; - unsigned char NFAEN:1; - } BIT; - } NFCR0; - char wk0[8]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char NFCS:2; - unsigned char NFDEN:1; - unsigned char NFCEN:1; - unsigned char NFBEN:1; - unsigned char NFAEN:1; - } BIT; - } NFCRC; - char wk1[102]; - union { - unsigned char BYTE; - struct { - unsigned char CCLR:3; - unsigned char CKEG:2; - unsigned char TPSC:3; - } BIT; - } TCR; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char BFE:1; - unsigned char BFB:1; - unsigned char BFA:1; - unsigned char MD:4; - } BIT; - } TMDR1; - union { - unsigned char BYTE; - struct { - unsigned char IOB:4; - unsigned char IOA:4; - } BIT; - } TIORH; - union { - unsigned char BYTE; - struct { - unsigned char IOD:4; - unsigned char IOC:4; - } BIT; - } TIORL; - union { - unsigned char BYTE; - struct { - unsigned char TTGE:1; - unsigned char :2; - unsigned char TCIEV:1; - unsigned char TGIED:1; - unsigned char TGIEC:1; - unsigned char TGIEB:1; - unsigned char TGIEA:1; - } BIT; - } TIER; - char wk2[1]; - unsigned short TCNT; - unsigned short TGRA; - unsigned short TGRB; - unsigned short TGRC; - unsigned short TGRD; - char wk3[16]; - unsigned short TGRE; - unsigned short TGRF; - union { - unsigned char BYTE; - struct { - unsigned char TTGE2:1; - unsigned char :5; - unsigned char TGIEF:1; - unsigned char TGIEE:1; - } BIT; - } TIER2; - char wk4[1]; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char TTSE:1; - unsigned char TTSB:1; - unsigned char TTSA:1; - } BIT; - } TBTM; - char wk5[1]; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char TPSC2:3; - } BIT; - } TCR2; -} st_mtu0_t; - -typedef struct st_mtu1 { - char wk0[1]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char NFCS:2; - unsigned char NFDEN:1; - unsigned char NFCEN:1; - unsigned char NFBEN:1; - unsigned char NFAEN:1; - } BIT; - } NFCR1; - char wk1[238]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char CCLR:2; - unsigned char CKEG:2; - unsigned char TPSC:3; - } BIT; - } TCR; - union { - unsigned char BYTE; - struct { - unsigned char :4; - unsigned char MD:4; - } BIT; - } TMDR1; - union { - unsigned char BYTE; - struct { - unsigned char IOB:4; - unsigned char IOA:4; - } BIT; - } TIOR; - char wk2[1]; - union { - unsigned char BYTE; - struct { - unsigned char TTGE:1; - unsigned char :1; - unsigned char TCIEU:1; - unsigned char TCIEV:1; - unsigned char :2; - unsigned char TGIEB:1; - unsigned char TGIEA:1; - } BIT; - } TIER; - union { - unsigned char BYTE; - struct { - unsigned char TCFD:1; - unsigned char :7; - } BIT; - } TSR; - unsigned short TCNT; - unsigned short TGRA; - unsigned short TGRB; - char wk3[4]; - union { - unsigned char BYTE; - struct { - unsigned char :4; - unsigned char I2BE:1; - unsigned char I2AE:1; - unsigned char I1BE:1; - unsigned char I1AE:1; - } BIT; - } TICCR; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char PHCKSEL:1; - unsigned char LWA:1; - } BIT; - } TMDR3; - char wk4[2]; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char PCB:2; - unsigned char TPSC2:3; - } BIT; - } TCR2; - char wk5[11]; - unsigned long TCNTLW; - unsigned long TGRALW; - unsigned long TGRBLW; -} st_mtu1_t; - -typedef struct st_mtu2 { - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char NFCS:2; - unsigned char NFDEN:1; - unsigned char NFCEN:1; - unsigned char NFBEN:1; - unsigned char NFAEN:1; - } BIT; - } NFCR2; - char wk0[365]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char CCLR:2; - unsigned char CKEG:2; - unsigned char TPSC:3; - } BIT; - } TCR; - union { - unsigned char BYTE; - struct { - unsigned char :4; - unsigned char MD:4; - } BIT; - } TMDR1; - union { - unsigned char BYTE; - struct { - unsigned char IOB:4; - unsigned char IOA:4; - } BIT; - } TIOR; - char wk1[1]; - union { - unsigned char BYTE; - struct { - unsigned char TTGE:1; - unsigned char :1; - unsigned char TCIEU:1; - unsigned char TCIEV:1; - unsigned char :2; - unsigned char TGIEB:1; - unsigned char TGIEA:1; - } BIT; - } TIER; - union { - unsigned char BYTE; - struct { - unsigned char TCFD:1; - unsigned char :7; - } BIT; - } TSR; - unsigned short TCNT; - unsigned short TGRA; - unsigned short TGRB; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char PCB:2; - unsigned char TPSC2:3; - } BIT; - } TCR2; -} st_mtu2_t; - -typedef struct st_mtu3 { - union { - unsigned char BYTE; - struct { - unsigned char CCLR:3; - unsigned char CKEG:2; - unsigned char TPSC:3; - } BIT; - } TCR; - char wk0[1]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char BFB:1; - unsigned char BFA:1; - unsigned char MD:4; - } BIT; - } TMDR1; - char wk1[1]; - union { - unsigned char BYTE; - struct { - unsigned char IOB:4; - unsigned char IOA:4; - } BIT; - } TIORH; - union { - unsigned char BYTE; - struct { - unsigned char IOD:4; - unsigned char IOC:4; - } BIT; - } TIORL; - char wk2[2]; - union { - unsigned char BYTE; - struct { - unsigned char TTGE:1; - unsigned char :2; - unsigned char TCIEV:1; - unsigned char TGIED:1; - unsigned char TGIEC:1; - unsigned char TGIEB:1; - unsigned char TGIEA:1; - } BIT; - } TIER; - char wk3[7]; - unsigned short TCNT; - char wk4[6]; - unsigned short TGRA; - unsigned short TGRB; - char wk5[8]; - unsigned short TGRC; - unsigned short TGRD; - char wk6[4]; - union { - unsigned char BYTE; - struct { - unsigned char TCFD:1; - unsigned char :7; - } BIT; - } TSR; - char wk7[11]; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char TTSB:1; - unsigned char TTSA:1; - } BIT; - } TBTM; - char wk8[19]; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char TPSC2:3; - } BIT; - } TCR2; - char wk9[37]; - unsigned short TGRE; - char wk10[31]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char NFCS:2; - unsigned char NFDEN:1; - unsigned char NFCEN:1; - unsigned char NFBEN:1; - unsigned char NFAEN:1; - } BIT; - } NFCR3; -} st_mtu3_t; - -typedef struct st_mtu4 { - char wk0[1]; - union { - unsigned char BYTE; - struct { - unsigned char CCLR:3; - unsigned char CKEG:2; - unsigned char TPSC:3; - } BIT; - } TCR; - char wk1[1]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char BFB:1; - unsigned char BFA:1; - unsigned char MD:4; - } BIT; - } TMDR1; - char wk2[2]; - union { - unsigned char BYTE; - struct { - unsigned char IOB:4; - unsigned char IOA:4; - } BIT; - } TIORH; - union { - unsigned char BYTE; - struct { - unsigned char IOD:4; - unsigned char IOC:4; - } BIT; - } TIORL; - char wk3[1]; - union { - unsigned char BYTE; - struct { - unsigned char TTGE:1; - unsigned char TTGE2:1; - unsigned char :1; - unsigned char TCIEV:1; - unsigned char TGIED:1; - unsigned char TGIEC:1; - unsigned char TGIEB:1; - unsigned char TGIEA:1; - } BIT; - } TIER; - char wk4[8]; - unsigned short TCNT; - char wk5[8]; - unsigned short TGRA; - unsigned short TGRB; - char wk6[8]; - unsigned short TGRC; - unsigned short TGRD; - char wk7[1]; - union { - unsigned char BYTE; - struct { - unsigned char TCFD:1; - unsigned char :7; - } BIT; - } TSR; - char wk8[11]; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char TTSB:1; - unsigned char TTSA:1; - } BIT; - } TBTM; - char wk9[6]; - union { - unsigned short WORD; - struct { - unsigned short BF:2; - unsigned short :6; - unsigned short UT4AE:1; - unsigned short DT4AE:1; - unsigned short UT4BE:1; - unsigned short DT4BE:1; - unsigned short ITA3AE:1; - unsigned short ITA4VE:1; - unsigned short ITB3AE:1; - unsigned short ITB4VE:1; - } BIT; - } TADCR; - char wk10[2]; - unsigned short TADCORA; - unsigned short TADCORB; - unsigned short TADCOBRA; - unsigned short TADCOBRB; - char wk11[1]; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char TPSC2:3; - } BIT; - } TCR2; - char wk12[38]; - unsigned short TGRE; - unsigned short TGRF; - char wk13[28]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char NFCS:2; - unsigned char NFDEN:1; - unsigned char NFCEN:1; - unsigned char NFBEN:1; - unsigned char NFAEN:1; - } BIT; - } NFCR4; -} st_mtu4_t; - -typedef struct st_mtu5 { - char wk0[1]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char NFCS:2; - unsigned char :1; - unsigned char NFWEN:1; - unsigned char NFVEN:1; - unsigned char NFUEN:1; - } BIT; - } NFCR5; - char wk1[490]; - unsigned short TCNTU; - unsigned short TGRU; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char TPSC:2; - } BIT; - } TCRU; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char CKEG:2; - unsigned char TPSC2:3; - } BIT; - } TCR2U; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char IOC:5; - } BIT; - } TIORU; - char wk2[9]; - unsigned short TCNTV; - unsigned short TGRV; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char TPSC:2; - } BIT; - } TCRV; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char CKEG:2; - unsigned char TPSC2:3; - } BIT; - } TCR2V; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char IOC:5; - } BIT; - } TIORV; - char wk3[9]; - unsigned short TCNTW; - unsigned short TGRW; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char TPSC:2; - } BIT; - } TCRW; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char CKEG:2; - unsigned char TPSC2:3; - } BIT; - } TCR2W; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char IOC:5; - } BIT; - } TIORW; - char wk4[11]; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char TGIE5U:1; - unsigned char TGIE5V:1; - unsigned char TGIE5W:1; - } BIT; - } TIER; - char wk5[1]; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char CSTU5:1; - unsigned char CSTV5:1; - unsigned char CSTW5:1; - } BIT; - } TSTR; - char wk6[1]; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char CMPCLR5U:1; - unsigned char CMPCLR5V:1; - unsigned char CMPCLR5W:1; - } BIT; - } TCNTCMPCLR; -} st_mtu5_t; - -typedef struct st_mtu6 { - union { - unsigned char BYTE; - struct { - unsigned char CCLR:3; - unsigned char CKEG:2; - unsigned char TPSC:3; - } BIT; - } TCR; - char wk0[1]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char BFB:1; - unsigned char BFA:1; - unsigned char MD:4; - } BIT; - } TMDR1; - char wk1[1]; - union { - unsigned char BYTE; - struct { - unsigned char IOB:4; - unsigned char IOA:4; - } BIT; - } TIORH; - union { - unsigned char BYTE; - struct { - unsigned char IOD:4; - unsigned char IOC:4; - } BIT; - } TIORL; - char wk2[2]; - union { - unsigned char BYTE; - struct { - unsigned char TTGE:1; - unsigned char :2; - unsigned char TCIEV:1; - unsigned char TGIED:1; - unsigned char TGIEC:1; - unsigned char TGIEB:1; - unsigned char TGIEA:1; - } BIT; - } TIER; - char wk3[7]; - unsigned short TCNT; - char wk4[6]; - unsigned short TGRA; - unsigned short TGRB; - char wk5[8]; - unsigned short TGRC; - unsigned short TGRD; - char wk6[4]; - union { - unsigned char BYTE; - struct { - unsigned char TCFD:1; - unsigned char :7; - } BIT; - } TSR; - char wk7[11]; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char TTSB:1; - unsigned char TTSA:1; - } BIT; - } TBTM; - char wk8[19]; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char TPSC2:3; - } BIT; - } TCR2; - char wk9[3]; - union { - unsigned char BYTE; - struct { - unsigned char CE0A:1; - unsigned char CE0B:1; - unsigned char CE0C:1; - unsigned char CE0D:1; - unsigned char CE1A:1; - unsigned char CE1B:1; - unsigned char CE2A:1; - unsigned char CE2B:1; - } BIT; - } TSYCR; - char wk10[33]; - unsigned short TGRE; - char wk11[31]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char NFCS:2; - unsigned char NFDEN:1; - unsigned char NFCEN:1; - unsigned char NFBEN:1; - unsigned char NFAEN:1; - } BIT; - } NFCR6; -} st_mtu6_t; - -typedef struct st_mtu7 { - char wk0[1]; - union { - unsigned char BYTE; - struct { - unsigned char CCLR:3; - unsigned char CKEG:2; - unsigned char TPSC:3; - } BIT; - } TCR; - char wk1[1]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char BFB:1; - unsigned char BFA:1; - unsigned char MD:4; - } BIT; - } TMDR1; - char wk2[2]; - union { - unsigned char BYTE; - struct { - unsigned char IOB:4; - unsigned char IOA:4; - } BIT; - } TIORH; - union { - unsigned char BYTE; - struct { - unsigned char IOD:4; - unsigned char IOC:4; - } BIT; - } TIORL; - char wk3[1]; - union { - unsigned char BYTE; - struct { - unsigned char TTGE:1; - unsigned char TTGE2:1; - unsigned char :1; - unsigned char TCIEV:1; - unsigned char TGIED:1; - unsigned char TGIEC:1; - unsigned char TGIEB:1; - unsigned char TGIEA:1; - } BIT; - } TIER; - char wk4[8]; - unsigned short TCNT; - char wk5[8]; - unsigned short TGRA; - unsigned short TGRB; - char wk6[8]; - unsigned short TGRC; - unsigned short TGRD; - char wk7[1]; - union { - unsigned char BYTE; - struct { - unsigned char TCFD:1; - unsigned char :7; - } BIT; - } TSR; - char wk8[11]; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char TTSB:1; - unsigned char TTSA:1; - } BIT; - } TBTM; - char wk9[6]; - union { - unsigned short WORD; - struct { - unsigned short BF:2; - unsigned short :6; - unsigned short UT7AE:1; - unsigned short DT7AE:1; - unsigned short UT7BE:1; - unsigned short DT7BE:1; - unsigned short ITA6AE:1; - unsigned short ITA7VE:1; - unsigned short ITB6AE:1; - unsigned short ITB7VE:1; - } BIT; - } TADCR; - char wk10[2]; - unsigned short TADCORA; - unsigned short TADCORB; - unsigned short TADCOBRA; - unsigned short TADCOBRB; - char wk11[1]; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char TPSC2:3; - } BIT; - } TCR2; - char wk12[38]; - unsigned short TGRE; - unsigned short TGRF; - char wk13[28]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char NFCS:2; - unsigned char NFDEN:1; - unsigned char NFCEN:1; - unsigned char NFBEN:1; - unsigned char NFAEN:1; - } BIT; - } NFCR7; -} st_mtu7_t; - -typedef struct st_mtu8 { - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char NFCS:2; - unsigned char NFDEN:1; - unsigned char NFCEN:1; - unsigned char NFBEN:1; - unsigned char NFAEN:1; - } BIT; - } NFCR8; - char wk0[871]; - union { - unsigned char BYTE; - struct { - unsigned char CCLR:3; - unsigned char CKEG:2; - unsigned char TPSC:3; - } BIT; - } TCR; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char BFB:1; - unsigned char BFA:1; - unsigned char MD:4; - } BIT; - } TMDR1; - union { - unsigned char BYTE; - struct { - unsigned char IOB:4; - unsigned char IOA:4; - } BIT; - } TIORH; - union { - unsigned char BYTE; - struct { - unsigned char IOD:4; - unsigned char IOC:4; - } BIT; - } TIORL; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char TCIEV:1; - unsigned char TGIED:1; - unsigned char TGIEC:1; - unsigned char TGIEB:1; - unsigned char TGIEA:1; - } BIT; - } TIER; - char wk1[1]; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char TPSC2:3; - } BIT; - } TCR2; - char wk2[1]; - unsigned long TCNT; - unsigned long TGRA; - unsigned long TGRB; - unsigned long TGRC; - unsigned long TGRD; -} st_mtu8_t; - -typedef struct st_pdc { - union { - unsigned long LONG; - struct { - unsigned long :17; - unsigned long EDS:1; - unsigned long PCKDIV:3; - unsigned long PCKOE:1; - unsigned long HERIE:1; - unsigned long VERIE:1; - unsigned long UDRIE:1; - unsigned long OVIE:1; - unsigned long FEIE:1; - unsigned long DFIE:1; - unsigned long PRST:1; - unsigned long HPS:1; - unsigned long VPS:1; - unsigned long PCKE:1; - } BIT; - } PCCR0; - union { - unsigned long LONG; - struct { - unsigned long :31; - unsigned long PCE:1; - } BIT; - } PCCR1; - union { - unsigned long LONG; - struct { - unsigned long :25; - unsigned long HERF:1; - unsigned long VERF:1; - unsigned long UDRF:1; - unsigned long OVRF:1; - unsigned long FEF:1; - unsigned long FEMPF:1; - unsigned long FBSY:1; - } BIT; - } PCSR; - union { - unsigned long LONG; - struct { - unsigned long :30; - unsigned long HSYNC:1; - unsigned long VSYNC:1; - } BIT; - } PCMONR; - union { - unsigned long LONG; - } PCDR; - union { - unsigned long LONG; - struct { - unsigned long :4; - unsigned long VSZ:12; - unsigned long :4; - unsigned long VST:12; - } BIT; - } VCR; - union { - unsigned long LONG; - struct { - unsigned long :4; - unsigned long HSZ:12; - unsigned long :4; - unsigned long HST:12; - } BIT; - } HCR; -} st_pdc_t; - -typedef struct st_poe { - union { - unsigned short WORD; - struct { - unsigned short :3; - unsigned short POE0F:1; - unsigned short :3; - unsigned short PIE1:1; - unsigned short :6; - unsigned short POE0M:2; - } BIT; - } ICSR1; - union { - unsigned short WORD; - struct { - unsigned short OSF1:1; - unsigned short :5; - unsigned short OCE1:1; - unsigned short OIE1:1; - unsigned short :8; - } BIT; - } OCSR1; - union { - unsigned short WORD; - struct { - unsigned short :3; - unsigned short POE4F:1; - unsigned short :3; - unsigned short PIE2:1; - unsigned short :6; - unsigned short POE4M:2; - } BIT; - } ICSR2; - union { - unsigned short WORD; - struct { - unsigned short OSF2:1; - unsigned short :5; - unsigned short OCE2:1; - unsigned short OIE2:1; - unsigned short :8; - } BIT; - } OCSR2; - union { - unsigned short WORD; - struct { - unsigned short :3; - unsigned short POE8F:1; - unsigned short :2; - unsigned short POE8E:1; - unsigned short PIE3:1; - unsigned short :6; - unsigned short POE8M:2; - } BIT; - } ICSR3; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char MTUCH0HIZ:1; - unsigned char MTUCH67HIZ:1; - unsigned char MTUCH34HIZ:1; - } BIT; - } SPOER; - union { - unsigned char BYTE; - struct { - unsigned char :4; - unsigned char MTU0DZE:1; - unsigned char MTU0CZE:1; - unsigned char MTU0BZE:1; - unsigned char MTU0AZE:1; - } BIT; - } POECR1; - union { - unsigned short WORD; - struct { - unsigned short :5; - unsigned short MTU3BDZE:1; - unsigned short MTU4ACZE:1; - unsigned short MTU4BDZE:1; - unsigned short :5; - unsigned short MTU6BDZE:1; - unsigned short MTU7ACZE:1; - unsigned short MTU7BDZE:1; - } BIT; - } POECR2; - char wk0[2]; - union { - unsigned short WORD; - struct { - unsigned short :2; - unsigned short IC5ADDMT67ZE:1; - unsigned short IC4ADDMT67ZE:1; - unsigned short IC3ADDMT67ZE:1; - unsigned short :1; - unsigned short IC1ADDMT67ZE:1; - unsigned short :3; - unsigned short IC5ADDMT34ZE:1; - unsigned short IC4ADDMT34ZE:1; - unsigned short IC3ADDMT34ZE:1; - unsigned short IC2ADDMT34ZE:1; - unsigned short :2; - } BIT; - } POECR4; - union { - unsigned short WORD; - struct { - unsigned short :10; - unsigned short IC5ADDMT0ZE:1; - unsigned short IC4ADDMT0ZE:1; - unsigned short :1; - unsigned short IC2ADDMT0ZE:1; - unsigned short IC1ADDMT0ZE:1; - unsigned short :1; - } BIT; - } POECR5; - char wk1[2]; - union { - unsigned short WORD; - struct { - unsigned short :3; - unsigned short POE10F:1; - unsigned short :2; - unsigned short POE10E:1; - unsigned short PIE4:1; - unsigned short :6; - unsigned short POE10M:2; - } BIT; - } ICSR4; - union { - unsigned short WORD; - struct { - unsigned short :3; - unsigned short POE11F:1; - unsigned short :2; - unsigned short POE11E:1; - unsigned short PIE5:1; - unsigned short :6; - unsigned short POE11M:2; - } BIT; - } ICSR5; - union { - unsigned short WORD; - struct { - unsigned short :8; - unsigned short OLSEN:1; - unsigned short :1; - unsigned short OLSG2B:1; - unsigned short OLSG2A:1; - unsigned short OLSG1B:1; - unsigned short OLSG1A:1; - unsigned short OLSG0B:1; - unsigned short OLSG0A:1; - } BIT; - } ALR1; - union { - unsigned short WORD; - struct { - unsigned short :3; - unsigned short OSTSTF:1; - unsigned short :2; - unsigned short OSTSTE:1; - unsigned short :9; - } BIT; - } ICSR6; - char wk2[6]; - union { - unsigned char BYTE; - struct { - unsigned char M0BSEL:4; - unsigned char M0ASEL:4; - } BIT; - } M0SELR1; - union { - unsigned char BYTE; - struct { - unsigned char M0DSEL:4; - unsigned char M0CSEL:4; - } BIT; - } M0SELR2; - union { - unsigned char BYTE; - struct { - unsigned char M3DSEL:4; - unsigned char M3BSEL:4; - } BIT; - } M3SELR; - union { - unsigned char BYTE; - struct { - unsigned char M4CSEL:4; - unsigned char M4ASEL:4; - } BIT; - } M4SELR1; - union { - unsigned char BYTE; - struct { - unsigned char M4DSEL:4; - unsigned char M4BSEL:4; - } BIT; - } M4SELR2; - char wk3[1]; - union { - unsigned char BYTE; - struct { - unsigned char M6DSEL:4; - unsigned char M6BSEL:4; - } BIT; - } M6SELR; -} st_poe_t; - -typedef struct st_port0 { - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char :1; - unsigned char B5:1; - unsigned char :1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PDR; - char wk0[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char :1; - unsigned char B5:1; - unsigned char :1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PODR; - char wk1[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char :1; - unsigned char B5:1; - unsigned char :1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PIDR; - char wk2[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char :1; - unsigned char B5:1; - unsigned char :1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PMR; - char wk3[31]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR0; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :3; - unsigned char B2:1; - unsigned char :2; - } BIT; - } ODR1; - char wk4[62]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char :1; - unsigned char B5:1; - unsigned char :1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PCR; - char wk5[31]; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR; - char wk6[71]; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR2; -} st_port0_t; - -typedef struct st_port1 { - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PDR; - char wk0[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PODR; - char wk1[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PIDR; - char wk2[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PMR; - char wk3[32]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR0; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR1; - char wk4[61]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PCR; - char wk5[31]; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char :1; - } BIT; - } DSCR; - char wk6[71]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char :2; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char :1; - } BIT; - } DSCR2; -} st_port1_t; - -typedef struct st_port2 { - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PDR; - char wk0[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PODR; - char wk1[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PIDR; - char wk2[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PMR; - char wk3[33]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR0; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR1; - char wk4[60]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PCR; - char wk5[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char :7; - } BIT; - } DSCR; - char wk6[71]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char :3; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR2; -} st_port2_t; - -typedef struct st_port3 { - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PDR; - char wk0[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PODR; - char wk1[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PIDR; - char wk2[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PMR; - char wk3[34]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR0; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :3; - unsigned char B0:1; - } BIT; - } ODR1; - char wk4[59]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PCR; - char wk5[103]; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR2; -} st_port3_t; - -typedef struct st_port4 { - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PDR; - char wk0[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PODR; - char wk1[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PIDR; - char wk2[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PMR; - char wk3[35]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR0; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR1; - char wk4[58]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PCR; -} st_port4_t; - -typedef struct st_port5 { - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PDR; - char wk0[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PODR; - char wk1[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PIDR; - char wk2[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PMR; - char wk3[36]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR0; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR1; - char wk4[57]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PCR; - char wk5[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR; - char wk6[71]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR2; -} st_port5_t; - -typedef struct st_port6 { - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PDR; - char wk0[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PODR; - char wk1[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PIDR; - char wk2[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PMR; - char wk3[37]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR0; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR1; - char wk4[56]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PCR; -} st_port6_t; - -typedef struct st_port7 { - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PDR; - char wk0[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PODR; - char wk1[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PIDR; - char wk2[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PMR; - char wk3[38]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR0; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR1; - char wk4[55]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PCR; - char wk5[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :2; - } BIT; - } DSCR; - char wk6[71]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } DSCR2; -} st_port7_t; - -typedef struct st_port8 { - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PDR; - char wk0[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PODR; - char wk1[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PIDR; - char wk2[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PMR; - char wk3[39]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR0; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR1; - char wk4[54]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PCR; - char wk5[31]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR; - char wk6[71]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char :1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR2; -} st_port8_t; - -typedef struct st_port9 { - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PDR; - char wk0[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PODR; - char wk1[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PIDR; - char wk2[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PMR; - char wk3[40]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR0; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR1; - char wk4[53]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PCR; - char wk5[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR; - char wk6[71]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR2; -} st_port9_t; - -typedef struct st_porta { - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PDR; - char wk0[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PODR; - char wk1[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PIDR; - char wk2[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PMR; - char wk3[41]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR0; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR1; - char wk4[52]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PCR; - char wk5[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR; - char wk6[71]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR2; -} st_porta_t; - -typedef struct st_portb { - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PDR; - char wk0[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PODR; - char wk1[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PIDR; - char wk2[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PMR; - char wk3[42]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR0; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR1; - char wk4[51]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PCR; - char wk5[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR; - char wk6[71]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR2; -} st_portb_t; - -typedef struct st_portc { - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PDR; - char wk0[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PODR; - char wk1[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PIDR; - char wk2[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PMR; - char wk3[43]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR0; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR1; - char wk4[50]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PCR; - char wk5[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR; - char wk6[71]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR2; -} st_portc_t; - -typedef struct st_portd { - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PDR; - char wk0[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PODR; - char wk1[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PIDR; - char wk2[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PMR; - char wk3[44]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR0; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR1; - char wk4[49]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PCR; - char wk5[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR; - char wk6[71]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR2; -} st_portd_t; - -typedef struct st_porte { - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PDR; - char wk0[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PODR; - char wk1[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PIDR; - char wk2[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PMR; - char wk3[45]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR0; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR1; - char wk4[48]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PCR; - char wk5[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR; - char wk6[71]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR2; -} st_porte_t; - -typedef struct st_portf { - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PDR; - char wk0[31]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PODR; - char wk1[31]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PIDR; - char wk2[31]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PMR; - char wk3[46]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR0; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR1; - char wk4[47]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PCR; -} st_portf_t; - -typedef struct st_portg { - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PDR; - char wk0[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PODR; - char wk1[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PIDR; - char wk2[31]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PMR; - char wk3[47]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR0; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR1; - char wk4[46]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PCR; - char wk5[31]; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR; - char wk6[71]; - union { - unsigned char BYTE; - struct { - unsigned char B7:1; - unsigned char B6:1; - unsigned char B5:1; - unsigned char B4:1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR2; -} st_portg_t; - -typedef struct st_portj { - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char B5:1; - unsigned char :1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PDR; - char wk0[31]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char B5:1; - unsigned char :1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PODR; - char wk1[31]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char B5:1; - unsigned char :1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PIDR; - char wk2[31]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char B5:1; - unsigned char :1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PMR; - char wk3[49]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char B6:1; - unsigned char :1; - unsigned char B4:1; - unsigned char :1; - unsigned char B2:1; - unsigned char :1; - unsigned char B0:1; - } BIT; - } ODR0; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char B2:1; - unsigned char :2; - } BIT; - } ODR1; - char wk4[44]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char B5:1; - unsigned char :1; - unsigned char B3:1; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } PCR; - char wk5[31]; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR; - char wk6[71]; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char B2:1; - unsigned char B1:1; - unsigned char B0:1; - } BIT; - } DSCR2; -} st_portj_t; - -typedef struct st_ppg0 { - union { - unsigned char BYTE; - struct { - unsigned char G3CMS:2; - unsigned char G2CMS:2; - unsigned char G1CMS:2; - unsigned char G0CMS:2; - } BIT; - } PCR; - union { - unsigned char BYTE; - struct { - unsigned char G3INV:1; - unsigned char G2INV:1; - unsigned char G1INV:1; - unsigned char G0INV:1; - unsigned char G3NOV:1; - unsigned char G2NOV:1; - unsigned char G1NOV:1; - unsigned char G0NOV:1; - } BIT; - } PMR; - union { - unsigned char BYTE; - struct { - unsigned char NDER15:1; - unsigned char NDER14:1; - unsigned char NDER13:1; - unsigned char NDER12:1; - unsigned char NDER11:1; - unsigned char NDER10:1; - unsigned char NDER9:1; - unsigned char NDER8:1; - } BIT; - } NDERH; - union { - unsigned char BYTE; - struct { - unsigned char NDER7:1; - unsigned char NDER6:1; - unsigned char NDER5:1; - unsigned char NDER4:1; - unsigned char NDER3:1; - unsigned char NDER2:1; - unsigned char NDER1:1; - unsigned char NDER0:1; - } BIT; - } NDERL; - union { - unsigned char BYTE; - struct { - unsigned char POD15:1; - unsigned char POD14:1; - unsigned char POD13:1; - unsigned char POD12:1; - unsigned char POD11:1; - unsigned char POD10:1; - unsigned char POD9:1; - unsigned char POD8:1; - } BIT; - } PODRH; - union { - unsigned char BYTE; - struct { - unsigned char POD7:1; - unsigned char POD6:1; - unsigned char POD5:1; - unsigned char POD4:1; - unsigned char POD3:1; - unsigned char POD2:1; - unsigned char POD1:1; - unsigned char POD0:1; - } BIT; - } PODRL; - union { - unsigned char BYTE; - struct { - unsigned char NDR15:1; - unsigned char NDR14:1; - unsigned char NDR13:1; - unsigned char NDR12:1; - unsigned char NDR11:1; - unsigned char NDR10:1; - unsigned char NDR9:1; - unsigned char NDR8:1; - } BIT; - } NDRH; - union { - unsigned char BYTE; - struct { - unsigned char NDR7:1; - unsigned char NDR6:1; - unsigned char NDR5:1; - unsigned char NDR4:1; - unsigned char NDR3:1; - unsigned char NDR2:1; - unsigned char NDR1:1; - unsigned char NDR0:1; - } BIT; - } NDRL; - union { - unsigned char BYTE; - struct { - unsigned char :4; - unsigned char NDR11:1; - unsigned char NDR10:1; - unsigned char NDR9:1; - unsigned char NDR8:1; - } BIT; - } NDRH2; - union { - unsigned char BYTE; - struct { - unsigned char :4; - unsigned char NDR3:1; - unsigned char NDR2:1; - unsigned char NDR1:1; - unsigned char NDR0:1; - } BIT; - } NDRL2; -} st_ppg0_t; - -typedef struct st_ppg1 { - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char PTRSL:1; - } BIT; - } PTRSLR; - char wk0[5]; - union { - unsigned char BYTE; - struct { - unsigned char G3CMS:2; - unsigned char G2CMS:2; - unsigned char G1CMS:2; - unsigned char G0CMS:2; - } BIT; - } PCR; - union { - unsigned char BYTE; - struct { - unsigned char G3INV:1; - unsigned char G2INV:1; - unsigned char G1INV:1; - unsigned char G0INV:1; - unsigned char G3NOV:1; - unsigned char G2NOV:1; - unsigned char G1NOV:1; - unsigned char G0NOV:1; - } BIT; - } PMR; - union { - unsigned char BYTE; - struct { - unsigned char NDER31:1; - unsigned char NDER30:1; - unsigned char NDER29:1; - unsigned char NDER28:1; - unsigned char NDER27:1; - unsigned char NDER26:1; - unsigned char NDER25:1; - unsigned char NDER24:1; - } BIT; - } NDERH; - union { - unsigned char BYTE; - struct { - unsigned char NDER23:1; - unsigned char NDER22:1; - unsigned char NDER21:1; - unsigned char NDER20:1; - unsigned char NDER19:1; - unsigned char NDER18:1; - unsigned char NDER17:1; - unsigned char NDER16:1; - } BIT; - } NDERL; - union { - unsigned char BYTE; - struct { - unsigned char POD31:1; - unsigned char POD30:1; - unsigned char POD29:1; - unsigned char POD28:1; - unsigned char POD27:1; - unsigned char POD26:1; - unsigned char POD25:1; - unsigned char POD24:1; - } BIT; - } PODRH; - union { - unsigned char BYTE; - struct { - unsigned char POD23:1; - unsigned char POD22:1; - unsigned char POD21:1; - unsigned char POD20:1; - unsigned char POD19:1; - unsigned char POD18:1; - unsigned char POD17:1; - unsigned char POD16:1; - } BIT; - } PODRL; - union { - unsigned char BYTE; - struct { - unsigned char NDR31:1; - unsigned char NDR30:1; - unsigned char NDR29:1; - unsigned char NDR28:1; - unsigned char NDR27:1; - unsigned char NDR26:1; - unsigned char NDR25:1; - unsigned char NDR24:1; - } BIT; - } NDRH; - union { - unsigned char BYTE; - struct { - unsigned char NDR23:1; - unsigned char NDR22:1; - unsigned char NDR21:1; - unsigned char NDR20:1; - unsigned char NDR19:1; - unsigned char NDR18:1; - unsigned char NDR17:1; - unsigned char NDR16:1; - } BIT; - } NDRL; - union { - unsigned char BYTE; - struct { - unsigned char :4; - unsigned char NDR27:1; - unsigned char NDR26:1; - unsigned char NDR25:1; - unsigned char NDR24:1; - } BIT; - } NDRH2; - union { - unsigned char BYTE; - struct { - unsigned char :4; - unsigned char NDR19:1; - unsigned char NDR18:1; - unsigned char NDR17:1; - unsigned char NDR16:1; - } BIT; - } NDRL2; -} st_ppg1_t; - -typedef struct st_qspi { - union { - unsigned char BYTE; - struct { - unsigned char SPRIE:1; - unsigned char SPE:1; - unsigned char SPTIE:1; - unsigned char :1; - unsigned char MSTR:1; - unsigned char :1; - unsigned char SPSSLIE:1; - unsigned char :1; - } BIT; - } SPCR; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char SSLP:1; - } BIT; - } SSLP; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char MOIFE:1; - unsigned char MOIFV:1; - unsigned char :1; - unsigned char IO3FV:1; - unsigned char IO2FV:1; - unsigned char SPLP:1; - } BIT; - } SPPCR; - union { - unsigned char BYTE; - struct { - unsigned char SPRFF:1; - unsigned char TREND:1; - unsigned char SPTEF:1; - unsigned char SPSSLF:1; - unsigned char :4; - } BIT; - } SPSR; - union { - unsigned long LONG; - struct { - unsigned short H; - } WORD; - struct { - unsigned char HH; - } BYTE; - } SPDR; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char SPSC:2; - } BIT; - } SPSCR; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char SPSS:2; - } BIT; - } SPSSR; - union { - unsigned char BYTE; - struct { - unsigned char SPBR7:1; - unsigned char SPBR6:1; - unsigned char SPBR5:1; - unsigned char SPBR4:1; - unsigned char SPBR3:1; - unsigned char SPBR2:1; - unsigned char SPBR1:1; - unsigned char SPBR0:1; - } BIT; - } SPBR; - union { - unsigned char BYTE; - struct { - unsigned char TXDMY:1; - unsigned char :7; - } BIT; - } SPDCR; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char SCKDL:3; - } BIT; - } SPCKD; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char SLNDL:3; - } BIT; - } SSLND; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char SPNDL:3; - } BIT; - } SPND; - char wk0[1]; - union { - unsigned short WORD; - struct { - unsigned short SCKDEN:1; - unsigned short SLNDEN:1; - unsigned short SPNDEN:1; - unsigned short LSBF:1; - unsigned short SPB:4; - unsigned short SSLKP:1; - unsigned short SPIMOD:2; - unsigned short SPRW:1; - unsigned short BRDV:2; - unsigned short CPOL:1; - unsigned short CPHA:1; - } BIT; - } SPCMD0; - union { - unsigned short WORD; - struct { - unsigned short SCKDEN:1; - unsigned short SLNDEN:1; - unsigned short SPNDEN:1; - unsigned short LSBF:1; - unsigned short SPB:4; - unsigned short SSLKP:1; - unsigned short SPIMOD:2; - unsigned short SPRW:1; - unsigned short BRDV:2; - unsigned short CPOL:1; - unsigned short CPHA:1; - } BIT; - } SPCMD1; - union { - unsigned short WORD; - struct { - unsigned short SCKDEN:1; - unsigned short SLNDEN:1; - unsigned short SPNDEN:1; - unsigned short LSBF:1; - unsigned short SPB:4; - unsigned short SSLKP:1; - unsigned short SPIMOD:2; - unsigned short SPRW:1; - unsigned short BRDV:2; - unsigned short CPOL:1; - unsigned short CPHA:1; - } BIT; - } SPCMD2; - union { - unsigned short WORD; - struct { - unsigned short SCKDEN:1; - unsigned short SLNDEN:1; - unsigned short SPNDEN:1; - unsigned short LSBF:1; - unsigned short SPB:4; - unsigned short SSLKP:1; - unsigned short SPIMOD:2; - unsigned short SPRW:1; - unsigned short BRDV:2; - unsigned short CPOL:1; - unsigned short CPHA:1; - } BIT; - } SPCMD3; - union { - unsigned char BYTE; - struct { - unsigned char TXRST:1; - unsigned char RXRST:1; - unsigned char TXTRG:2; - unsigned char TXTRGEX:1; - unsigned char RXTRG:3; - } BIT; - } SPBFCR; - char wk1[1]; - union { - unsigned short WORD; - struct { - unsigned short :2; - unsigned short TXBC:6; - unsigned short :2; - unsigned short RXBC:6; - } BIT; - } SPBDCR; - unsigned long SPBMUL0; - unsigned long SPBMUL1; - unsigned long SPBMUL2; - unsigned long SPBMUL3; -} st_qspi_t; - -typedef struct st_ram { - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char RAMMODE:2; - } BIT; - } RAMMODE; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char RAMERR:1; - } BIT; - } RAMSTS; - char wk0[2]; - union { - unsigned char BYTE; - struct { - unsigned char KW:7; - unsigned char RAMPRCR:1; - } BIT; - } RAMPRCR; - char wk1[3]; - union { - unsigned long LONG; - struct { - unsigned long :13; - unsigned long READ:16; - unsigned long :3; - } BIT; - } RAMECAD; - char wk2[52]; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char EXRAMMODE:2; - } BIT; - } EXRAMMODE; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char EXRAMERR:1; - } BIT; - } EXRAMSTS; - char wk3[2]; - union { - unsigned char BYTE; - struct { - unsigned char KW:7; - unsigned char EXRAMPRCR:1; - } BIT; - } EXRAMPRCR; - char wk4[3]; - union { - unsigned long LONG; - struct { - unsigned long :13; - unsigned long READ:16; - unsigned long :3; - } BIT; - } EXRAMECAD; -} st_ram_t; - -typedef struct st_riic { - union { - unsigned char BYTE; - struct { - unsigned char ICE:1; - unsigned char IICRST:1; - unsigned char CLO:1; - unsigned char SOWP:1; - unsigned char SCLO:1; - unsigned char SDAO:1; - unsigned char SCLI:1; - unsigned char SDAI:1; - } BIT; - } ICCR1; - union { - unsigned char BYTE; - struct { - unsigned char BBSY:1; - unsigned char MST:1; - unsigned char TRS:1; - unsigned char :1; - unsigned char SP:1; - unsigned char RS:1; - unsigned char ST:1; - unsigned char :1; - } BIT; - } ICCR2; - union { - unsigned char BYTE; - struct { - unsigned char MTWP:1; - unsigned char CKS:3; - unsigned char BCWP:1; - unsigned char BC:3; - } BIT; - } ICMR1; - union { - unsigned char BYTE; - struct { - unsigned char DLCS:1; - unsigned char SDDL:3; - unsigned char :1; - unsigned char TMOH:1; - unsigned char TMOL:1; - unsigned char TMOS:1; - } BIT; - } ICMR2; - union { - unsigned char BYTE; - struct { - unsigned char SMBS:1; - unsigned char WAIT:1; - unsigned char RDRFS:1; - unsigned char ACKWP:1; - unsigned char ACKBT:1; - unsigned char ACKBR:1; - unsigned char NF:2; - } BIT; - } ICMR3; - union { - unsigned char BYTE; - struct { - unsigned char FMPE:1; - unsigned char SCLE:1; - unsigned char NFE:1; - unsigned char NACKE:1; - unsigned char SALE:1; - unsigned char NALE:1; - unsigned char MALE:1; - unsigned char TMOE:1; - } BIT; - } ICFER; - union { - unsigned char BYTE; - struct { - unsigned char HOAE:1; - unsigned char :1; - unsigned char DIDE:1; - unsigned char :1; - unsigned char GCAE:1; - unsigned char SAR2E:1; - unsigned char SAR1E:1; - unsigned char SAR0E:1; - } BIT; - } ICSER; - union { - unsigned char BYTE; - struct { - unsigned char TIE:1; - unsigned char TEIE:1; - unsigned char RIE:1; - unsigned char NAKIE:1; - unsigned char SPIE:1; - unsigned char STIE:1; - unsigned char ALIE:1; - unsigned char TMOIE:1; - } BIT; - } ICIER; - union { - unsigned char BYTE; - struct { - unsigned char HOA:1; - unsigned char :1; - unsigned char DID:1; - unsigned char :1; - unsigned char GCA:1; - unsigned char AAS2:1; - unsigned char AAS1:1; - unsigned char AAS0:1; - } BIT; - } ICSR1; - union { - unsigned char BYTE; - struct { - unsigned char TDRE:1; - unsigned char TEND:1; - unsigned char RDRF:1; - unsigned char NACKF:1; - unsigned char STOP:1; - unsigned char START:1; - unsigned char AL:1; - unsigned char TMOF:1; - } BIT; - } ICSR2; - union { - unsigned char BYTE; - struct { - unsigned char SVA:7; - unsigned char SVA0:1; - } BIT; - } SARL0; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char SVA:2; - unsigned char FS:1; - } BIT; - } SARU0; - union { - unsigned char BYTE; - struct { - unsigned char SVA:7; - unsigned char SVA0:1; - } BIT; - } SARL1; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char SVA:2; - unsigned char FS:1; - } BIT; - } SARU1; - union { - unsigned char BYTE; - struct { - unsigned char SVA:7; - unsigned char SVA0:1; - } BIT; - } SARL2; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char SVA:2; - unsigned char FS:1; - } BIT; - } SARU2; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char BRL:5; - } BIT; - } ICBRL; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char BRH:5; - } BIT; - } ICBRH; - unsigned char ICDRT; - unsigned char ICDRR; -} st_riic_t; - -typedef struct st_rspi { - union { - unsigned char BYTE; - struct { - unsigned char SPRIE:1; - unsigned char SPE:1; - unsigned char SPTIE:1; - unsigned char SPEIE:1; - unsigned char MSTR:1; - unsigned char MODFEN:1; - unsigned char TXMD:1; - unsigned char SPMS:1; - } BIT; - } SPCR; - union { - unsigned char BYTE; - struct { - unsigned char :4; - unsigned char SSL3P:1; - unsigned char SSL2P:1; - unsigned char SSL1P:1; - unsigned char SSL0P:1; - } BIT; - } SSLP; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char MOIFE:1; - unsigned char MOIFV:1; - unsigned char :2; - unsigned char SPLP2:1; - unsigned char SPLP:1; - } BIT; - } SPPCR; - union { - unsigned char BYTE; - struct { - unsigned char SPRF:1; - unsigned char :1; - unsigned char SPTEF:1; - unsigned char UDRF:1; - unsigned char PERF:1; - unsigned char MODF:1; - unsigned char IDLNF:1; - unsigned char OVRF:1; - } BIT; - } SPSR; - union { - unsigned long LONG; - struct { - unsigned short H; - } WORD; - struct { - unsigned char HH; - } BYTE; - } SPDR; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char SPSLN:3; - } BIT; - } SPSCR; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char SPECM:3; - unsigned char :1; - unsigned char SPCP:3; - } BIT; - } SPSSR; - unsigned char SPBR; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char SPBYT:1; - unsigned char SPLW:1; - unsigned char SPRDTD:1; - unsigned char :2; - unsigned char SPFC:2; - } BIT; - } SPDCR; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char SCKDL:3; - } BIT; - } SPCKD; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char SLNDL:3; - } BIT; - } SSLND; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char SPNDL:3; - } BIT; - } SPND; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char SCKASE:1; - unsigned char PTE:1; - unsigned char SPIIE:1; - unsigned char SPOE:1; - unsigned char SPPE:1; - } BIT; - } SPCR2; - union { - unsigned short WORD; - struct { - unsigned short SCKDEN:1; - unsigned short SLNDEN:1; - unsigned short SPNDEN:1; - unsigned short LSBF:1; - unsigned short SPB:4; - unsigned short SSLKP:1; - unsigned short SSLA:3; - unsigned short BRDV:2; - unsigned short CPOL:1; - unsigned short CPHA:1; - } BIT; - } SPCMD0; - union { - unsigned short WORD; - struct { - unsigned short SCKDEN:1; - unsigned short SLNDEN:1; - unsigned short SPNDEN:1; - unsigned short LSBF:1; - unsigned short SPB:4; - unsigned short SSLKP:1; - unsigned short SSLA:3; - unsigned short BRDV:2; - unsigned short CPOL:1; - unsigned short CPHA:1; - } BIT; - } SPCMD1; - union { - unsigned short WORD; - struct { - unsigned short SCKDEN:1; - unsigned short SLNDEN:1; - unsigned short SPNDEN:1; - unsigned short LSBF:1; - unsigned short SPB:4; - unsigned short SSLKP:1; - unsigned short SSLA:3; - unsigned short BRDV:2; - unsigned short CPOL:1; - unsigned short CPHA:1; - } BIT; - } SPCMD2; - union { - unsigned short WORD; - struct { - unsigned short SCKDEN:1; - unsigned short SLNDEN:1; - unsigned short SPNDEN:1; - unsigned short LSBF:1; - unsigned short SPB:4; - unsigned short SSLKP:1; - unsigned short SSLA:3; - unsigned short BRDV:2; - unsigned short CPOL:1; - unsigned short CPHA:1; - } BIT; - } SPCMD3; - union { - unsigned short WORD; - struct { - unsigned short SCKDEN:1; - unsigned short SLNDEN:1; - unsigned short SPNDEN:1; - unsigned short LSBF:1; - unsigned short SPB:4; - unsigned short SSLKP:1; - unsigned short SSLA:3; - unsigned short BRDV:2; - unsigned short CPOL:1; - unsigned short CPHA:1; - } BIT; - } SPCMD4; - union { - unsigned short WORD; - struct { - unsigned short SCKDEN:1; - unsigned short SLNDEN:1; - unsigned short SPNDEN:1; - unsigned short LSBF:1; - unsigned short SPB:4; - unsigned short SSLKP:1; - unsigned short SSLA:3; - unsigned short BRDV:2; - unsigned short CPOL:1; - unsigned short CPHA:1; - } BIT; - } SPCMD5; - union { - unsigned short WORD; - struct { - unsigned short SCKDEN:1; - unsigned short SLNDEN:1; - unsigned short SPNDEN:1; - unsigned short LSBF:1; - unsigned short SPB:4; - unsigned short SSLKP:1; - unsigned short SSLA:3; - unsigned short BRDV:2; - unsigned short CPOL:1; - unsigned short CPHA:1; - } BIT; - } SPCMD6; - union { - unsigned short WORD; - struct { - unsigned short SCKDEN:1; - unsigned short SLNDEN:1; - unsigned short SPNDEN:1; - unsigned short LSBF:1; - unsigned short SPB:4; - unsigned short SSLKP:1; - unsigned short SSLA:3; - unsigned short BRDV:2; - unsigned short CPOL:1; - unsigned short CPHA:1; - } BIT; - } SPCMD7; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char BYSW:1; - } BIT; - } SPDCR2; -} st_rspi_t; - -typedef struct st_rtc { - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char F1HZ:1; - unsigned char F2HZ:1; - unsigned char F4HZ:1; - unsigned char F8HZ:1; - unsigned char F16HZ:1; - unsigned char F32HZ:1; - unsigned char F64HZ:1; - } BIT; - } R64CNT; - char wk0[1]; - union { - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char SEC10:3; - unsigned char SEC1:4; - } BIT; - } RSECCNT; - union { - unsigned char BYTE; - struct { - unsigned char BCNT:8; - } BIT; - } BCNT0; - }; - char wk1[1]; - union { - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char MIN10:3; - unsigned char MIN1:4; - } BIT; - } RMINCNT; - union { - unsigned char BYTE; - struct { - unsigned char BCNT:8; - } BIT; - } BCNT1; - }; - char wk2[1]; - union { - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char PM:1; - unsigned char HR10:2; - unsigned char HR1:4; - } BIT; - } RHRCNT; - union { - unsigned char BYTE; - struct { - unsigned char BCNT:8; - } BIT; - } BCNT2; - }; - char wk3[1]; - union { - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char DAYW:3; - } BIT; - } RWKCNT; - union { - unsigned char BYTE; - struct { - unsigned char BCNT:8; - } BIT; - } BCNT3; - }; - char wk4[1]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char DATE10:2; - unsigned char DATE1:4; - } BIT; - } RDAYCNT; - char wk5[1]; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char MON10:1; - unsigned char MON1:4; - } BIT; - } RMONCNT; - char wk6[1]; - union { - unsigned short WORD; - struct { - unsigned short :8; - unsigned short YR10:4; - unsigned short YR1:4; - } BIT; - } RYRCNT; - union { - union { - unsigned char BYTE; - struct { - unsigned char ENB:1; - unsigned char SEC10:3; - unsigned char SEC1:4; - } BIT; - } RSECAR; - union { - unsigned char BYTE; - struct { - unsigned char BCNTAR:8; - } BIT; - } BCNT0AR; - }; - char wk7[1]; - union { - union { - unsigned char BYTE; - struct { - unsigned char ENB:1; - unsigned char MIN10:3; - unsigned char MIN1:4; - } BIT; - } RMINAR; - union { - unsigned char BYTE; - struct { - unsigned char BCNTAR:8; - } BIT; - } BCNT1AR; - }; - char wk8[1]; - union { - union { - unsigned char BYTE; - struct { - unsigned char ENB:1; - unsigned char PM:1; - unsigned char HR10:2; - unsigned char HR1:4; - } BIT; - } RHRAR; - union { - unsigned char BYTE; - struct { - unsigned char BCNTAR:8; - } BIT; - } BCNT2AR; - }; - char wk9[1]; - union { - union { - unsigned char BYTE; - struct { - unsigned char ENB:1; - unsigned char :4; - unsigned char DAYW:3; - } BIT; - } RWKAR; - union { - unsigned char BYTE; - struct { - unsigned char BCNTAR:8; - } BIT; - } BCNT3AR; - }; - char wk10[1]; - union { - union { - unsigned char BYTE; - struct { - unsigned char ENB:1; - unsigned char :1; - unsigned char DATE10:2; - unsigned char DATE1:4; - } BIT; - } RDAYAR; - union { - unsigned char BYTE; - struct { - unsigned char ENB:8; - } BIT; - } BCNT0AER; - }; - char wk11[1]; - union { - union { - unsigned char BYTE; - struct { - unsigned char ENB:1; - unsigned char :2; - unsigned char MON10:1; - unsigned char MON1:4; - } BIT; - } RMONAR; - union { - unsigned char BYTE; - struct { - unsigned char ENB:8; - } BIT; - } BCNT1AER; - }; - char wk12[1]; - union { - union { - unsigned short WORD; - struct { - unsigned short :8; - unsigned short YR10:4; - unsigned short YR1:4; - } BIT; - } RYRAR; - union { - unsigned short WORD; - struct { - unsigned short :8; - unsigned short ENB:8; - } BIT; - } BCNT2AER; - }; - union { - union { - unsigned char BYTE; - struct { - unsigned char ENB:1; - unsigned char :7; - } BIT; - } RYRAREN; - union { - unsigned char BYTE; - struct { - unsigned char ENB:8; - } BIT; - } BCNT3AER; - }; - char wk13[3]; - union { - unsigned char BYTE; - struct { - unsigned char PES:4; - unsigned char RTCOS:1; - unsigned char PIE:1; - unsigned char CIE:1; - unsigned char AIE:1; - } BIT; - } RCR1; - char wk14[1]; - union { - unsigned char BYTE; - struct { - unsigned char CNTMD:1; - unsigned char HR24:1; - unsigned char AADJP:1; - unsigned char AADJE:1; - unsigned char RTCOE:1; - unsigned char ADJ30:1; - unsigned char RESET:1; - unsigned char START:1; - } BIT; - } RCR2; - char wk15[1]; - union { - unsigned char BYTE; - struct { - unsigned char :4; - unsigned char RTCDV:3; - unsigned char RTCEN:1; - } BIT; - } RCR3; - char wk16[1]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char RCKSEL:1; - } BIT; - } RCR4; - char wk17[1]; - union { - unsigned short WORD; - struct { - unsigned short :15; - unsigned short RFC:1; - } BIT; - } RFRH; - union { - unsigned short WORD; - struct { - unsigned short RFC:16; - } BIT; - } RFRL; - union { - unsigned char BYTE; - struct { - unsigned char PMADJ:2; - unsigned char ADJ:6; - } BIT; - } RADJ; - char wk18[17]; - union { - unsigned char BYTE; - struct { - unsigned char TCEN:1; - unsigned char :1; - unsigned char TCNF:2; - unsigned char :1; - unsigned char TCST:1; - unsigned char TCCT:2; - } BIT; - } RTCCR0; - char wk19[1]; - union { - unsigned char BYTE; - struct { - unsigned char TCEN:1; - unsigned char :1; - unsigned char TCNF:2; - unsigned char :1; - unsigned char TCST:1; - unsigned char TCCT:2; - } BIT; - } RTCCR1; - char wk20[1]; - union { - unsigned char BYTE; - struct { - unsigned char TCEN:1; - unsigned char :1; - unsigned char TCNF:2; - unsigned char :1; - unsigned char TCST:1; - unsigned char TCCT:2; - } BIT; - } RTCCR2; - char wk21[13]; - union { - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char SEC10:3; - unsigned char SEC1:4; - } BIT; - } RSECCP0; - union { - unsigned char BYTE; - struct { - unsigned char BCNTCP0:8; - } BIT; - } BCNT0CP0; - }; - char wk22[1]; - union { - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char MIN10:3; - unsigned char MIN1:4; - } BIT; - } RMINCP0; - union { - unsigned char BYTE; - struct { - unsigned char BCNTCP0:8; - } BIT; - } BCNT1CP0; - }; - char wk23[1]; - union { - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char PM:1; - unsigned char HR10:2; - unsigned char HR1:4; - } BIT; - } RHRCP0; - union { - unsigned char BYTE; - struct { - unsigned char BCNTCP0:8; - } BIT; - } BCNT2CP0; - }; - char wk24[3]; - union { - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char DATE10:2; - unsigned char DATE1:4; - } BIT; - } RDAYCP0; - union { - unsigned char BYTE; - struct { - unsigned char BCNTCP0:8; - } BIT; - } BCNT3CP0; - }; - char wk25[1]; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char MON10:1; - unsigned char MON1:4; - } BIT; - } RMONCP0; - char wk26[5]; - union { - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char SEC10:3; - unsigned char SEC1:4; - } BIT; - } RSECCP1; - union { - unsigned char BYTE; - struct { - unsigned char BCNTCP1:8; - } BIT; - } BCNT0CP1; - }; - char wk27[1]; - union { - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char MIN10:3; - unsigned char MIN1:4; - } BIT; - } RMINCP1; - union { - unsigned char BYTE; - struct { - unsigned char BCNTCP1:8; - } BIT; - } BCNT1CP1; - }; - char wk28[1]; - union { - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char PM:1; - unsigned char HR10:2; - unsigned char HR1:4; - } BIT; - } RHRCP1; - union { - unsigned char BYTE; - struct { - unsigned char BCNTCP1:8; - } BIT; - } BCNT2CP1; - }; - char wk29[3]; - union { - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char DATE10:2; - unsigned char DATE1:4; - } BIT; - } RDAYCP1; - union { - unsigned char BYTE; - struct { - unsigned char BCNTCP1:8; - } BIT; - } BCNT3CP1; - }; - char wk30[1]; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char MON10:1; - unsigned char MON1:4; - } BIT; - } RMONCP1; - char wk31[5]; - union { - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char SEC10:3; - unsigned char SEC1:4; - } BIT; - } RSECCP2; - union { - unsigned char BYTE; - struct { - unsigned char BCNTCP2:8; - } BIT; - } BCNT0CP2; - }; - char wk32[1]; - union { - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char MIN10:3; - unsigned char MIN1:4; - } BIT; - } RMINCP2; - union { - unsigned char BYTE; - struct { - unsigned char BCNTCP2:8; - } BIT; - } BCNT1CP2; - }; - char wk33[1]; - union { - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char PM:1; - unsigned char HR10:2; - unsigned char HR1:4; - } BIT; - } RHRCP2; - union { - unsigned char BYTE; - struct { - unsigned char BCNTCP2:8; - } BIT; - } BCNT2CP2; - }; - char wk34[3]; - union { - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char DATE10:2; - unsigned char DATE1:4; - } BIT; - } RDAYCP2; - union { - unsigned char BYTE; - struct { - unsigned char BCNTCP2:8; - } BIT; - } BCNT3CP2; - }; - char wk35[1]; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char MON10:1; - unsigned char MON1:4; - } BIT; - } RMONCP2; -} st_rtc_t; - -typedef struct st_s12ad { - union { - unsigned short WORD; - struct { - unsigned short ADST:1; - unsigned short ADCS:2; - unsigned short ADIE:1; - unsigned short :2; - unsigned short TRGE:1; - unsigned short EXTRG:1; - unsigned short DBLE:1; - unsigned short GBADIE:1; - unsigned short :1; - unsigned short DBLANS:5; - } BIT; - } ADCSR; - char wk0[2]; - union { - unsigned short WORD; - struct { - unsigned short :8; - unsigned short ANSA007:1; - unsigned short ANSA006:1; - unsigned short ANSA005:1; - unsigned short ANSA004:1; - unsigned short ANSA003:1; - unsigned short ANSA002:1; - unsigned short ANSA001:1; - unsigned short ANSA000:1; - } BIT; - } ADANSA0; - char wk1[2]; - union { - unsigned short WORD; - struct { - unsigned short :8; - unsigned short ADS007:1; - unsigned short ADS006:1; - unsigned short ADS005:1; - unsigned short ADS004:1; - unsigned short ADS003:1; - unsigned short ADS002:1; - unsigned short ADS001:1; - unsigned short ADS000:1; - } BIT; - } ADADS0; - char wk2[2]; - union { - unsigned char BYTE; - struct { - unsigned char AVEE:1; - unsigned char :4; - unsigned char ADC:3; - } BIT; - } ADADC; - char wk3[1]; - union { - unsigned short WORD; - struct { - unsigned short ADRFMT:1; - unsigned short :3; - unsigned short DIAGM:1; - unsigned short DIAGLD:1; - unsigned short DIAGVAL:2; - unsigned short :2; - unsigned short ACE:1; - unsigned short :2; - unsigned short ADPRC:2; - unsigned short :1; - } BIT; - } ADCER; - union { - unsigned short WORD; - struct { - unsigned short :2; - unsigned short TRSA:6; - unsigned short :2; - unsigned short TRSB:6; - } BIT; - } ADSTRGR; - char wk4[2]; - union { - unsigned short WORD; - struct { - unsigned short :8; - unsigned short ANSB007:1; - unsigned short ANSB006:1; - unsigned short ANSB005:1; - unsigned short ANSB004:1; - unsigned short ANSB003:1; - unsigned short ANSB002:1; - unsigned short ANSB001:1; - unsigned short ANSB000:1; - } BIT; - } ADANSB0; - char wk5[2]; - union { - unsigned short WORD; - } ADDBLDR; - char wk6[4]; - union { - unsigned short WORD; - union { - struct { - unsigned short DIAGST:2; - unsigned short :2; - unsigned short AD:12; - } RIGHT; - struct { - unsigned short AD:12; - unsigned short :2; - unsigned short DIAGST:2; - } LEFT; - } BIT; - } ADRD; - unsigned short ADDR0; - unsigned short ADDR1; - unsigned short ADDR2; - unsigned short ADDR3; - unsigned short ADDR4; - unsigned short ADDR5; - unsigned short ADDR6; - unsigned short ADDR7; - char wk7[51]; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char PRO:2; - } BIT; - } ADSAMPR; - char wk8[2]; - union { - unsigned short WORD; - struct { - unsigned short :5; - unsigned short SHANS:3; - unsigned short SSTSH:8; - } BIT; - } ADSHCR; - char wk9[6]; - union { - unsigned short WORD; - struct { - unsigned short :10; - unsigned short SAM:1; - unsigned short :5; - } BIT; - } ADSAM; - char wk10[10]; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char ADNDIS:5; - } BIT; - } ADDISCR; - char wk11[1]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char SHMD:1; - } BIT; - } ADSHMSR; - char wk12[3]; - union { - unsigned short WORD; - struct { - unsigned short GBRP:1; - unsigned short LGRRS:1; - unsigned short :12; - unsigned short GBRSCN:1; - unsigned short PGS:1; - } BIT; - } ADGSPCR; - char wk13[2]; - unsigned short ADDBLDRA; - unsigned short ADDBLDRB; - char wk14[4]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char MONCMPB:1; - unsigned char MONCMPA:1; - unsigned char :3; - unsigned char MONCOMB:1; - } BIT; - } ADWINMON; - char wk15[3]; - union { - unsigned short WORD; - struct { - unsigned short CMPAIE:1; - unsigned short WCMPE:1; - unsigned short CMPBIE:1; - unsigned short :1; - unsigned short CMPAE:1; - unsigned short :1; - unsigned short CMPBE:1; - unsigned short :7; - unsigned short CMPAB:2; - } BIT; - } ADCMPCR; - char wk16[2]; - union { - unsigned short WORD; - struct { - unsigned short :8; - unsigned short CMPCHA007:1; - unsigned short CMPCHA006:1; - unsigned short CMPCHA005:1; - unsigned short CMPCHA004:1; - unsigned short CMPCHA003:1; - unsigned short CMPCHA002:1; - unsigned short CMPCHA001:1; - unsigned short CMPCHA000:1; - } BIT; - } ADCMPANSR0; - char wk17[2]; - union { - unsigned short WORD; - struct { - unsigned short :8; - unsigned short CMPLCHA007:1; - unsigned short CMPLCHA006:1; - unsigned short CMPLCHA005:1; - unsigned short CMPLCHA004:1; - unsigned short CMPLCHA003:1; - unsigned short CMPLCHA002:1; - unsigned short CMPLCHA001:1; - unsigned short CMPLCHA000:1; - } BIT; - } ADCMPLR0; - char wk18[2]; - unsigned short ADCMPDR0; - unsigned short ADCMPDR1; - union { - unsigned short WORD; - struct { - unsigned short :8; - unsigned short CMPSTCHA007:1; - unsigned short CMPSTCHA006:1; - unsigned short CMPSTCHA005:1; - unsigned short CMPSTCHA004:1; - unsigned short CMPSTCHA003:1; - unsigned short CMPSTCHA002:1; - unsigned short CMPSTCHA001:1; - unsigned short CMPSTCHA000:1; - } BIT; - } ADCMPSR0; - char wk19[4]; - union { - unsigned char BYTE; - struct { - unsigned char CMPLB:1; - unsigned char :1; - unsigned char CMPCHB:6; - } BIT; - } ADCMPBNSR; - char wk20[1]; - unsigned short ADWINLLB; - unsigned short ADWINULB; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char CMPSTB:1; - } BIT; - } ADCMPBSR; - char wk21[39]; - union { - unsigned short WORD; - struct { - unsigned short :8; - unsigned short ANSC007:1; - unsigned short ANSC006:1; - unsigned short ANSC005:1; - unsigned short ANSC004:1; - unsigned short ANSC003:1; - unsigned short ANSC002:1; - unsigned short ANSC001:1; - unsigned short ANSC000:1; - } BIT; - } ADANSC0; - char wk22[3]; - union { - unsigned char BYTE; - struct { - unsigned char GRCE:1; - unsigned char GCADIE:1; - unsigned char TRSC:6; - } BIT; - } ADGCTRGR; - char wk23[6]; - unsigned char ADSSTR0; - unsigned char ADSSTR1; - unsigned char ADSSTR2; - unsigned char ADSSTR3; - unsigned char ADSSTR4; - unsigned char ADSSTR5; - unsigned char ADSSTR6; - unsigned char ADSSTR7; -} st_s12ad_t; - -typedef struct st_s12ad1 { - union { - unsigned short WORD; - struct { - unsigned short ADST:1; - unsigned short ADCS:2; - unsigned short ADIE:1; - unsigned short :2; - unsigned short TRGE:1; - unsigned short EXTRG:1; - unsigned short DBLE:1; - unsigned short GBADIE:1; - unsigned short :1; - unsigned short DBLANS:5; - } BIT; - } ADCSR; - char wk0[2]; - union { - unsigned short WORD; - struct { - unsigned short ANSA015:1; - unsigned short ANSA014:1; - unsigned short ANSA013:1; - unsigned short ANSA012:1; - unsigned short ANSA011:1; - unsigned short ANSA010:1; - unsigned short ANSA009:1; - unsigned short ANSA008:1; - unsigned short ANSA007:1; - unsigned short ANSA006:1; - unsigned short ANSA005:1; - unsigned short ANSA004:1; - unsigned short ANSA003:1; - unsigned short ANSA002:1; - unsigned short ANSA001:1; - unsigned short ANSA000:1; - } BIT; - } ADANSA0; - union { - unsigned short WORD; - struct { - unsigned short :11; - unsigned short ANSA104:1; - unsigned short ANSA103:1; - unsigned short ANSA102:1; - unsigned short ANSA101:1; - unsigned short ANSA100:1; - } BIT; - } ADANSA1; - union { - unsigned short WORD; - struct { - unsigned short ADS015:1; - unsigned short ADS014:1; - unsigned short ADS013:1; - unsigned short ADS012:1; - unsigned short ADS011:1; - unsigned short ADS010:1; - unsigned short ADS009:1; - unsigned short ADS008:1; - unsigned short ADS007:1; - unsigned short ADS006:1; - unsigned short ADS005:1; - unsigned short ADS004:1; - unsigned short ADS003:1; - unsigned short ADS002:1; - unsigned short ADS001:1; - unsigned short ADS000:1; - } BIT; - } ADADS0; - union { - unsigned short WORD; - struct { - unsigned short :11; - unsigned short ADS104:1; - unsigned short ADS103:1; - unsigned short ADS102:1; - unsigned short ADS101:1; - unsigned short ADS100:1; - } BIT; - } ADADS1; - union { - unsigned char BYTE; - struct { - unsigned char AVEE:1; - unsigned char :4; - unsigned char ADC:3; - } BIT; - } ADADC; - char wk1[1]; - union { - unsigned short WORD; - struct { - unsigned short ADRFMT:1; - unsigned short :3; - unsigned short DIAGM:1; - unsigned short DIAGLD:1; - unsigned short DIAGVAL:2; - unsigned short :2; - unsigned short ACE:1; - unsigned short :2; - unsigned short ADPRC:2; - unsigned short :1; - } BIT; - } ADCER; - union { - unsigned short WORD; - struct { - unsigned short :2; - unsigned short TRSA:6; - unsigned short :2; - unsigned short TRSB:6; - } BIT; - } ADSTRGR; - union { - unsigned short WORD; - struct { - unsigned short EXOEN:1; - unsigned short EXSEL:2; - unsigned short :1; - unsigned short OCSB:1; - unsigned short TSSB:1; - unsigned short OCSA:1; - unsigned short TSSA:1; - unsigned short :6; - unsigned short OCSAD:1; - unsigned short TSSAD:1; - } BIT; - } ADEXICR; - union { - unsigned short WORD; - struct { - unsigned short ANSB015:1; - unsigned short ANSB014:1; - unsigned short ANSB013:1; - unsigned short ANSB012:1; - unsigned short ANSB011:1; - unsigned short ANSB010:1; - unsigned short ANSB009:1; - unsigned short ANSB008:1; - unsigned short ANSB007:1; - unsigned short ANSB006:1; - unsigned short ANSB005:1; - unsigned short ANSB004:1; - unsigned short ANSB003:1; - unsigned short ANSB002:1; - unsigned short ANSB001:1; - unsigned short ANSB000:1; - } BIT; - } ADANSB0; - union { - unsigned short WORD; - struct { - unsigned short :11; - unsigned short ANSB104:1; - unsigned short ANSB103:1; - unsigned short ANSB102:1; - unsigned short ANSB101:1; - unsigned short ANSB100:1; - } BIT; - } ADANSB1; - unsigned short ADDBLDR; - unsigned short ADTSDR; - unsigned short ADOCDR; - union { - unsigned short WORD; - union { - struct { - unsigned short DIAGST:2; - unsigned short :2; - unsigned short AD:12; - } RIGHT; - struct { - unsigned short AD:12; - unsigned short :2; - unsigned short DIAGST:2; - } LEFT; - } BIT; - } ADRD; - unsigned short ADDR0; - unsigned short ADDR1; - unsigned short ADDR2; - unsigned short ADDR3; - unsigned short ADDR4; - unsigned short ADDR5; - unsigned short ADDR6; - unsigned short ADDR7; - unsigned short ADDR8; - unsigned short ADDR9; - unsigned short ADDR10; - unsigned short ADDR11; - unsigned short ADDR12; - unsigned short ADDR13; - unsigned short ADDR14; - unsigned short ADDR15; - unsigned short ADDR16; - unsigned short ADDR17; - unsigned short ADDR18; - unsigned short ADDR19; - unsigned short ADDR20; - char wk2[25]; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char PRO:2; - } BIT; - } ADSAMPR; - char wk3[10]; - union { - unsigned short WORD; - struct { - unsigned short :10; - unsigned short SAM:1; - unsigned short :5; - } BIT; - } ADSAM; - char wk4[10]; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char ADNDIS:5; - } BIT; - } ADDISCR; - char wk5[5]; - union { - unsigned short WORD; - struct { - unsigned short GBRP:1; - unsigned short LGRRS:1; - unsigned short :12; - unsigned short GBRSCN:1; - unsigned short PGS:1; - } BIT; - } ADGSPCR; - char wk6[2]; - unsigned short ADDBLDRA; - unsigned short ADDBLDRB; - char wk7[4]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char MONCMPB:1; - unsigned char MONCMPA:1; - unsigned char :3; - unsigned char MONCOMB:1; - } BIT; - } ADWINMON; - char wk8[3]; - union { - unsigned short WORD; - struct { - unsigned short CMPAIE:1; - unsigned short WCMPE:1; - unsigned short CMPBIE:1; - unsigned short :1; - unsigned short CMPAE:1; - unsigned short :1; - unsigned short CMPBE:1; - unsigned short :7; - unsigned short CMPAB:2; - } BIT; - } ADCMPCR; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char CMPSOC:1; - unsigned char CMPSTS:1; - } BIT; - } ADCMPANSER; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char CMPLOC:1; - unsigned char CMPLTS:1; - } BIT; - } ADCMPLER; - union { - unsigned short WORD; - struct { - unsigned short CMPCHA015:1; - unsigned short CMPCHA014:1; - unsigned short CMPCHA013:1; - unsigned short CMPCHA012:1; - unsigned short CMPCHA011:1; - unsigned short CMPCHA010:1; - unsigned short CMPCHA009:1; - unsigned short CMPCHA008:1; - unsigned short CMPCHA007:1; - unsigned short CMPCHA006:1; - unsigned short CMPCHA005:1; - unsigned short CMPCHA004:1; - unsigned short CMPCHA003:1; - unsigned short CMPCHA002:1; - unsigned short CMPCHA001:1; - unsigned short CMPCHA000:1; - } BIT; - } ADCMPANSR0; - union { - unsigned short WORD; - struct { - unsigned short :11; - unsigned short CMPCHA104:1; - unsigned short CMPCHA103:1; - unsigned short CMPCHA102:1; - unsigned short CMPCHA101:1; - unsigned short CMPCHA100:1; - } BIT; - } ADCMPANSR1; - union { - unsigned short WORD; - struct { - unsigned short CMPLCHA015:1; - unsigned short CMPLCHA014:1; - unsigned short CMPLCHA013:1; - unsigned short CMPLCHA012:1; - unsigned short CMPLCHA011:1; - unsigned short CMPLCHA010:1; - unsigned short CMPLCHA009:1; - unsigned short CMPLCHA008:1; - unsigned short CMPLCHA007:1; - unsigned short CMPLCHA006:1; - unsigned short CMPLCHA005:1; - unsigned short CMPLCHA004:1; - unsigned short CMPLCHA003:1; - unsigned short CMPLCHA002:1; - unsigned short CMPLCHA001:1; - unsigned short CMPLCHA000:1; - } BIT; - } ADCMPLR0; - union { - unsigned short WORD; - struct { - unsigned short :11; - unsigned short CMPLCHA104:1; - unsigned short CMPLCHA103:1; - unsigned short CMPLCHA102:1; - unsigned short CMPLCHA101:1; - unsigned short CMPLCHA100:1; - } BIT; - } ADCMPLR1; - unsigned short ADCMPDR0; - unsigned short ADCMPDR1; - union { - unsigned short WORD; - struct { - unsigned short CMPSTCHA015:1; - unsigned short CMPSTCHA014:1; - unsigned short CMPSTCHA013:1; - unsigned short CMPSTCHA012:1; - unsigned short CMPSTCHA011:1; - unsigned short CMPSTCHA010:1; - unsigned short CMPSTCHA009:1; - unsigned short CMPSTCHA008:1; - unsigned short CMPSTCHA007:1; - unsigned short CMPSTCHA006:1; - unsigned short CMPSTCHA005:1; - unsigned short CMPSTCHA004:1; - unsigned short CMPSTCHA003:1; - unsigned short CMPSTCHA002:1; - unsigned short CMPSTCHA001:1; - unsigned short CMPSTCHA000:1; - } BIT; - } ADCMPSR0; - union { - unsigned short WORD; - struct { - unsigned short :11; - unsigned short CMPSTCHA104:1; - unsigned short CMPSTCHA103:1; - unsigned short CMPSTCHA102:1; - unsigned short CMPSTCHA101:1; - unsigned short CMPSTCHA100:1; - } BIT; - } ADCMPSR1; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char CMPFOC:1; - unsigned char CMPFTS:1; - } BIT; - } ADCMPSER; - char wk9[1]; - union { - unsigned char BYTE; - struct { - unsigned char CMPLB:1; - unsigned char :1; - unsigned char CMPCHB:6; - } BIT; - } ADCMPBNSR; - char wk10[1]; - unsigned short ADWINLLB; - unsigned short ADWINULB; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char CMPSTB:1; - } BIT; - } ADCMPBSR; - char wk11[39]; - union { - unsigned short WORD; - struct { - unsigned short ANSC015:1; - unsigned short ANSC014:1; - unsigned short ANSC013:1; - unsigned short ANSC012:1; - unsigned short ANSC011:1; - unsigned short ANSC010:1; - unsigned short ANSC009:1; - unsigned short ANSC008:1; - unsigned short ANSC007:1; - unsigned short ANSC006:1; - unsigned short ANSC005:1; - unsigned short ANSC004:1; - unsigned short ANSC003:1; - unsigned short ANSC002:1; - unsigned short ANSC001:1; - unsigned short ANSC000:1; - } BIT; - } ADANSC0; - union { - unsigned short WORD; - struct { - unsigned short :11; - unsigned short ANSC104:1; - unsigned short ANSC103:1; - unsigned short ANSC102:1; - unsigned short ANSC101:1; - unsigned short ANSC100:1; - } BIT; - } ADANSC1; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char OCSC:1; - unsigned char TSSC:1; - } BIT; - } ADGCEXCR; - union { - unsigned char BYTE; - struct { - unsigned char GRCE:1; - unsigned char GCADIE:1; - unsigned char TRSC:6; - } BIT; - } ADGCTRGR; - char wk12[3]; - unsigned char ADSSTRL; - unsigned char ADSSTRT; - unsigned char ADSSTRO; - unsigned char ADSSTR0; - unsigned char ADSSTR1; - unsigned char ADSSTR2; - unsigned char ADSSTR3; - unsigned char ADSSTR4; - unsigned char ADSSTR5; - unsigned char ADSSTR6; - unsigned char ADSSTR7; - unsigned char ADSSTR8; - unsigned char ADSSTR9; - unsigned char ADSSTR10; - unsigned char ADSSTR11; - unsigned char ADSSTR12; - unsigned char ADSSTR13; - unsigned char ADSSTR14; - unsigned char ADSSTR15; -} st_s12ad1_t; - -typedef struct st_sci0 { - union { - unsigned char BYTE; - struct { - unsigned char CM:1; - unsigned char CHR:1; - unsigned char PE:1; - unsigned char PM:1; - unsigned char STOP:1; - unsigned char MP:1; - unsigned char CKS:2; - } BIT; - } SMR; - unsigned char BRR; - union { - unsigned char BYTE; - struct { - unsigned char TIE:1; - unsigned char RIE:1; - unsigned char TE:1; - unsigned char RE:1; - unsigned char MPIE:1; - unsigned char TEIE:1; - unsigned char CKE:2; - } BIT; - } SCR; - unsigned char TDR; - union { - unsigned char BYTE; - struct { - unsigned char TDRE:1; - unsigned char RDRF:1; - unsigned char ORER:1; - unsigned char FER:1; - unsigned char PER:1; - unsigned char TEND:1; - unsigned char MPB:1; - unsigned char MPBT:1; - } BIT; - } SSR; - unsigned char RDR; - union { - unsigned char BYTE; - struct { - unsigned char BCP2:1; - unsigned char :2; - unsigned char CHR1:1; - unsigned char SDIR:1; - unsigned char SINV:1; - unsigned char :1; - unsigned char SMIF:1; - } BIT; - } SCMR; - union { - unsigned char BYTE; - struct { - unsigned char RXDESEL:1; - unsigned char BGDM:1; - unsigned char NFEN:1; - unsigned char ABCS:1; - unsigned char :1; - unsigned char BRME:1; - unsigned char :1; - unsigned char ACS0:1; - } BIT; - } SEMR; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char NFCS:3; - } BIT; - } SNFR; - union { - unsigned char BYTE; - struct { - unsigned char IICDL:5; - unsigned char :2; - unsigned char IICM:1; - } BIT; - } SIMR1; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char IICACKT:1; - unsigned char :3; - unsigned char IICCSC:1; - unsigned char IICINTM:1; - } BIT; - } SIMR2; - union { - unsigned char BYTE; - struct { - unsigned char IICSCLS:2; - unsigned char IICSDAS:2; - unsigned char IICSTIF:1; - unsigned char IICSTPREQ:1; - unsigned char IICRSTAREQ:1; - unsigned char IICSTAREQ:1; - } BIT; - } SIMR3; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char IICACKR:1; - } BIT; - } SISR; - union { - unsigned char BYTE; - struct { - unsigned char CKPH:1; - unsigned char CKPOL:1; - unsigned char :1; - unsigned char MFF:1; - unsigned char :1; - unsigned char MSS:1; - unsigned char CTSE:1; - unsigned char SSE:1; - } BIT; - } SPMR; - union { - unsigned short WORD; - struct { - unsigned char TDRH; - unsigned char TDRL; - } BYTE; - } TDRHL; - union { - unsigned short WORD; - struct { - unsigned char RDRH; - unsigned char RDRL; - } BYTE; - } RDRHL; - unsigned char MDDR; -} st_sci0_t; - -typedef struct st_sci10 { - union { - unsigned char BYTE; - struct { - unsigned char CM:1; - unsigned char CHR:1; - unsigned char PE:1; - unsigned char PM:1; - unsigned char STOP:1; - unsigned char MP:1; - unsigned char CKS:2; - } BIT; - } SMR; - unsigned char BRR; - union { - unsigned char BYTE; - struct { - unsigned char TIE:1; - unsigned char RIE:1; - unsigned char TE:1; - unsigned char RE:1; - unsigned char MPIE:1; - unsigned char TEIE:1; - unsigned char CKE:2; - } BIT; - } SCR; - unsigned char TDR; - union { - union { - unsigned char BYTE; - struct { - unsigned char TDRE:1; - unsigned char RDRF:1; - unsigned char ORER:1; - unsigned char FER:1; - unsigned char PER:1; - unsigned char TEND:1; - unsigned char MPB:1; - unsigned char MPBT:1; - } BIT; - } SSR; - union { - unsigned char BYTE; - struct { - unsigned char TDFE:1; - unsigned char RDF:1; - unsigned char ORER:1; - unsigned char FER:1; - unsigned char PER:1; - unsigned char TEND:1; - unsigned char :1; - unsigned char DR:1; - } BIT; - } SSRFIFO; - }; - unsigned char RDR; - union { - unsigned char BYTE; - struct { - unsigned char BCP2:1; - unsigned char :2; - unsigned char CHR1:1; - unsigned char SDIR:1; - unsigned char SINV:1; - unsigned char :1; - unsigned char SMIF:1; - } BIT; - } SCMR; - union { - unsigned char BYTE; - struct { - unsigned char RXDESEL:1; - unsigned char BGDM:1; - unsigned char NFEN:1; - unsigned char ABCS:1; - unsigned char :1; - unsigned char BRME:1; - unsigned char :1; - unsigned char ACS0:1; - } BIT; - } SEMR; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char NFCS:3; - } BIT; - } SNFR; - union { - unsigned char BYTE; - struct { - unsigned char IICDL:5; - unsigned char :2; - unsigned char IICM:1; - } BIT; - } SIMR1; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char IICACKT:1; - unsigned char :3; - unsigned char IICCSC:1; - unsigned char IICINTM:1; - } BIT; - } SIMR2; - union { - unsigned char BYTE; - struct { - unsigned char IICSCLS:2; - unsigned char IICSDAS:2; - unsigned char IICSTIF:1; - unsigned char IICSTPREQ:1; - unsigned char IICRSTAREQ:1; - unsigned char IICSTAREQ:1; - } BIT; - } SIMR3; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char IICACKR:1; - } BIT; - } SISR; - union { - unsigned char BYTE; - struct { - unsigned char CKPH:1; - unsigned char CKPOL:1; - unsigned char :1; - unsigned char MFF:1; - unsigned char :1; - unsigned char MSS:1; - unsigned char CTSE:1; - unsigned char SSE:1; - } BIT; - } SPMR; - union { - union { - unsigned short WORD; - struct { - unsigned char TDRH; - unsigned char TDRL; - } BYTE; - } TDRHL; - union { - unsigned short WORD; - struct { - unsigned char H; - unsigned char L; - } BYTE; - struct { - unsigned short :6; - unsigned short MPBT:1; - unsigned short TDAT:9; - } BIT; - } FTDR; - }; - union { - union { - unsigned short WORD; - struct { - unsigned char RDRH; - unsigned char RDRL; - } BYTE; - } RDRHL; - union { - unsigned short WORD; - struct { - unsigned char H; - unsigned char L; - } BYTE; - struct { - unsigned short :1; - unsigned short RDF:1; - unsigned short ORER:1; - unsigned short FER:1; - unsigned short PER:1; - unsigned short DR:1; - unsigned short MPB:1; - unsigned short RDAT:9; - } BIT; - } FRDR; - }; - unsigned char MDDR; - union { - unsigned char BYTE; - struct { - unsigned char DCME:1; - unsigned char IDSEL:1; - unsigned char :1; - unsigned char DFER:1; - unsigned char DPER:1; - unsigned char :2; - unsigned char DCMF:1; - } BIT; - } DCCR; - union { - unsigned short WORD; - struct { - unsigned char H; - unsigned char L; - } BYTE; - struct { - unsigned char RSTRG:4; - unsigned char RTRG:4; - unsigned char TTRG:4; - unsigned char DRES:1; - unsigned char TFRST:1; - unsigned char RFRST:1; - unsigned char FM:1; - } BIT; - } FCR; - union { - unsigned short WORD; - struct { - unsigned char H; - unsigned char L; - } BYTE; - struct { - unsigned char :3; - unsigned char T:5; - unsigned char :3; - unsigned char R:5; - } BIT; - } FDR; - union { - unsigned short WORD; - struct { - unsigned char H; - unsigned char L; - } BYTE; - struct { - unsigned char :3; - unsigned char PNUM:5; - unsigned char :1; - unsigned char FNUM:5; - unsigned char :1; - unsigned char ORER:1; - } BIT; - } LSR; - union { - unsigned short WORD; - struct { - unsigned char H; - unsigned char L; - } BYTE; - struct { - unsigned short :7; - unsigned short CMPD:9; - } BIT; - } CDR; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char SPB2IO:1; - unsigned char SPB2DT:1; - unsigned char RXDMON:1; - } BIT; - } SPTR; -} st_sci10_t; - -typedef struct st_sci12 { - union { - unsigned char BYTE; - struct { - unsigned char CM:1; - unsigned char CHR:1; - unsigned char PE:1; - unsigned char PM:1; - unsigned char STOP:1; - unsigned char MP:1; - unsigned char CKS:2; - } BIT; - } SMR; - unsigned char BRR; - union { - unsigned char BYTE; - struct { - unsigned char TIE:1; - unsigned char RIE:1; - unsigned char TE:1; - unsigned char RE:1; - unsigned char MPIE:1; - unsigned char TEIE:1; - unsigned char CKE:2; - } BIT; - } SCR; - unsigned char TDR; - union { - unsigned char BYTE; - struct { - unsigned char TDRE:1; - unsigned char RDRF:1; - unsigned char ORER:1; - unsigned char FER:1; - unsigned char PER:1; - unsigned char TEND:1; - unsigned char MPB:1; - unsigned char MPBT:1; - } BIT; - } SSR; - unsigned char RDR; - union { - unsigned char BYTE; - struct { - unsigned char BCP2:1; - unsigned char :2; - unsigned char CHR1:1; - unsigned char SDIR:1; - unsigned char SINV:1; - unsigned char :1; - unsigned char SMIF:1; - } BIT; - } SCMR; - union { - unsigned char BYTE; - struct { - unsigned char RXDESEL:1; - unsigned char BGDM:1; - unsigned char NFEN:1; - unsigned char ABCS:1; - unsigned char :1; - unsigned char BRME:1; - unsigned char :1; - unsigned char ACS0:1; - } BIT; - } SEMR; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char NFCS:3; - } BIT; - } SNFR; - union { - unsigned char BYTE; - struct { - unsigned char IICDL:5; - unsigned char :2; - unsigned char IICM:1; - } BIT; - } SIMR1; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char IICACKT:1; - unsigned char :3; - unsigned char IICCSC:1; - unsigned char IICINTM:1; - } BIT; - } SIMR2; - union { - unsigned char BYTE; - struct { - unsigned char IICSCLS:2; - unsigned char IICSDAS:2; - unsigned char IICSTIF:1; - unsigned char IICSTPREQ:1; - unsigned char IICRSTAREQ:1; - unsigned char IICSTAREQ:1; - } BIT; - } SIMR3; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char IICACKR:1; - } BIT; - } SISR; - union { - unsigned char BYTE; - struct { - unsigned char CKPH:1; - unsigned char CKPOL:1; - unsigned char :1; - unsigned char MFF:1; - unsigned char :1; - unsigned char MSS:1; - unsigned char CTSE:1; - unsigned char SSE:1; - } BIT; - } SPMR; - union { - unsigned short WORD; - struct { - unsigned char TDRH; - unsigned char TDRL; - } BYTE; - } TDRHL; - union { - unsigned short WORD; - struct { - unsigned char RDRH; - unsigned char RDRL; - } BYTE; - } RDRHL; - unsigned char MDDR; - char wk0[13]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char ESME:1; - } BIT; - } ESMER; - union { - unsigned char BYTE; - struct { - unsigned char :4; - unsigned char BRME:1; - unsigned char RXDSF:1; - unsigned char SFSF:1; - unsigned char :1; - } BIT; - } CR0; - union { - unsigned char BYTE; - struct { - unsigned char PIBS:3; - unsigned char PIBE:1; - unsigned char CF1DS:2; - unsigned char CF0RE:1; - unsigned char BFE:1; - } BIT; - } CR1; - union { - unsigned char BYTE; - struct { - unsigned char RTS:2; - unsigned char BCCS:2; - unsigned char :1; - unsigned char DFCS:3; - } BIT; - } CR2; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char SDST:1; - } BIT; - } CR3; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char SHARPS:1; - unsigned char :2; - unsigned char RXDXPS:1; - unsigned char TXDXPS:1; - } BIT; - } PCR; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char AEDIE:1; - unsigned char BCDIE:1; - unsigned char PIBDIE:1; - unsigned char CF1MIE:1; - unsigned char CF0MIE:1; - unsigned char BFDIE:1; - } BIT; - } ICR; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char AEDF:1; - unsigned char BCDF:1; - unsigned char PIBDF:1; - unsigned char CF1MF:1; - unsigned char CF0MF:1; - unsigned char BFDF:1; - } BIT; - } STR; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char AEDCL:1; - unsigned char BCDCL:1; - unsigned char PIBDCL:1; - unsigned char CF1MCL:1; - unsigned char CF0MCL:1; - unsigned char BFDCL:1; - } BIT; - } STCR; - unsigned char CF0DR; - union { - unsigned char BYTE; - struct { - unsigned char CF0CE7:1; - unsigned char CF0CE6:1; - unsigned char CF0CE5:1; - unsigned char CF0CE4:1; - unsigned char CF0CE3:1; - unsigned char CF0CE2:1; - unsigned char CF0CE1:1; - unsigned char CF0CE0:1; - } BIT; - } CF0CR; - unsigned char CF0RR; - unsigned char PCF1DR; - unsigned char SCF1DR; - union { - unsigned char BYTE; - struct { - unsigned char CF1CE7:1; - unsigned char CF1CE6:1; - unsigned char CF1CE5:1; - unsigned char CF1CE4:1; - unsigned char CF1CE3:1; - unsigned char CF1CE2:1; - unsigned char CF1CE1:1; - unsigned char CF1CE0:1; - } BIT; - } CF1CR; - unsigned char CF1RR; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char TCST:1; - } BIT; - } TCR; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char TCSS:3; - unsigned char TWRC:1; - unsigned char :1; - unsigned char TOMS:2; - } BIT; - } TMR; - unsigned char TPRE; - unsigned char TCNT; -} st_sci12_t; - -typedef struct st_sdhi { - union { - unsigned long LONG; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned long :16; - unsigned long CMD12AT:2; - unsigned long TRSTP:1; - unsigned long CMDRW:1; - unsigned long CMDTP:1; - unsigned long RSPTP:3; - unsigned long ACMD:2; - unsigned long CMDIDX:6; - } BIT; -#endif - } SDCMD; - char wk0[4]; - unsigned long SDARG; - char wk1[4]; - union { - unsigned long LONG; - struct { - unsigned long :23; - unsigned long SDBLKCNTEN:1; - unsigned long :7; - unsigned long STP:1; - } BIT; - } SDSTOP; - unsigned long SDBLKCNT; - unsigned long SDRSP10; - char wk2[4]; - unsigned long SDRSP32; - char wk3[4]; - unsigned long SDRSP54; - char wk4[4]; - unsigned long SDRSP76; - char wk5[4]; - union { - unsigned long LONG; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned long :21; - unsigned long SDD3MON:1; - unsigned long SDD3IN:1; - unsigned long SDD3RM:1; - unsigned long SDWPMON:1; - unsigned long :1; - unsigned long SDCDMON:1; - unsigned long SDCDIN:1; - unsigned long SDCDRM:1; - unsigned long ACEND:1; - unsigned long :1; - unsigned long RSPEND:1; - } BIT; -#endif - } SDSTS1; - union { - unsigned long LONG; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned long :16; - unsigned long ILA:1; - unsigned long CBSY:1; - unsigned long SDCLKCREN:1; - unsigned long :3; - unsigned long BWE:1; - unsigned long BRE:1; - unsigned long SDD0MON:1; - unsigned long RSPTO:1; - unsigned long ILR:1; - unsigned long ILW:1; - unsigned long DTO:1; - unsigned long ENDE:1; - unsigned long CRCE:1; - unsigned long CMDE:1; - } BIT; -#endif - } SDSTS2; - union { - unsigned long LONG; - struct { - unsigned long :22; - unsigned long SDD3INM:1; - unsigned long SDD3RMM:1; - unsigned long :3; - unsigned long SDCDINM:1; - unsigned long SDCDRMM:1; - unsigned long ACENDM:1; - unsigned long :1; - unsigned long RSPENDM:1; - } BIT; - } SDIMSK1; - union { - unsigned long LONG; - struct { - unsigned long :16; - unsigned long ILAM:1; - unsigned long :5; - unsigned long BWEM:1; - unsigned long BREM:1; - unsigned long :1; - unsigned long RSPTOM:1; - unsigned long ILRM:1; - unsigned long ILWM:1; - unsigned long DTTOM:1; - unsigned long ENDEM:1; - unsigned long CRCEM:1; - unsigned long CMDEM:1; - } BIT; - } SDIMSK2; - union { - unsigned long LONG; - struct { - unsigned long :22; - unsigned long CLKCTRLEN:1; - unsigned long CLKEN:1; - unsigned long CLKSEL:8; - } BIT; - } SDCLKCR; - union { - unsigned long LONG; - struct { - unsigned long :22; - unsigned long LEN:10; - } BIT; - } SDSIZE; - union { - unsigned long LONG; - struct { - unsigned long :16; - unsigned long WIDTH:1; - unsigned long :7; - unsigned long TOP:4; - unsigned long CTOP:4; - } BIT; - } SDOPT; - char wk6[4]; - union { - unsigned long LONG; - struct { - unsigned long :17; - unsigned long CRCTK:3; - unsigned long CRCTKE:1; - unsigned long RDCRCE:1; - unsigned long RSPCRCE1:1; - unsigned long RSPCRCE0:1; - unsigned long :2; - unsigned long CRCLENE:1; - unsigned long RDLENE:1; - unsigned long RSPLENE1:1; - unsigned long RSPLENE0:1; - unsigned long CMDE1:1; - unsigned long CMDE0:1; - } BIT; - } SDERSTS1; - union { - unsigned long LONG; - struct { - unsigned long :25; - unsigned long CRCBSYTO:1; - unsigned long CRCTO:1; - unsigned long RDTO:1; - unsigned long BSYTO1:1; - unsigned long BSYTO0:1; - unsigned long RSPTO1:1; - unsigned long RSPTO0:1; - } BIT; - } SDERSTS2; - unsigned long SDBUFR; - char wk7[4]; - union { - unsigned long LONG; - struct { - unsigned long :22; - unsigned long C52PUB:1; - unsigned long IOABT:1; - unsigned long :5; - unsigned long RWREQ:1; - unsigned long :1; - unsigned long INTEN:1; - } BIT; - } SDIOMD; - union { - unsigned long LONG; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned long :16; - unsigned long EXWT:1; - unsigned long EXPUB52:1; - unsigned long :13; - unsigned long IOIRQ:1; - } BIT; -#endif - } SDIOSTS; - union { - unsigned long LONG; - struct { - unsigned long :16; - unsigned long EXWTM:1; - unsigned long EXPUB52M:1; - unsigned long :13; - unsigned long IOIRQM:1; - } BIT; - } SDIOIMSK; - char wk8[316]; - union { - unsigned long LONG; - struct { - unsigned long :30; - unsigned long DMAEN:1; - unsigned long :1; - } BIT; - } SDDMAEN; - char wk9[12]; - union { - unsigned long LONG; - struct { - unsigned long :31; - unsigned long SDRST:1; - } BIT; - } SDRST; - union { - unsigned long LONG; - struct { - unsigned long :16; - unsigned long CPRM:1; - unsigned long CLKRAT:1; - unsigned long :2; - unsigned long IP2:4; - unsigned long IP1:8; - } BIT; - } SDVER; - char wk10[24]; - union { - unsigned long LONG; - struct { - unsigned long :24; - unsigned long BRSWP:1; - unsigned long BWSWP:1; - unsigned long :6; - } BIT; - } SDSWAP; -} st_sdhi_t; - -typedef struct st_sdsi { - union { - unsigned long LONG; - struct { - unsigned long :20; - unsigned long FN1ACC:1; - unsigned long :11; - } BIT; - } FN1ACCR; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char CMD53RIREN:1; - unsigned char CMD53WIREN:1; - unsigned char CMD52WIREN:1; - } BIT; - } INTENCR1; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char CMD53R:1; - unsigned char CMD53W:1; - unsigned char CMD52W:1; - } BIT; - } INTSR1; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char SDOPCODE:1; - unsigned char SDBMODE:1; - unsigned char SDRAWFLG:1; - unsigned char SDWNRFLG:1; - unsigned char SDCMDINDEX:1; - } BIT; - } SDCMDCR; - union { - unsigned char BYTE; - struct { - unsigned char SDCMDACCADD:8; - } BIT; - } SDCADD0R; - union { - unsigned char BYTE; - struct { - unsigned char SDCMDACCADD:8; - } BIT; - } SDCADD1R; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char SDCMDACCADD:1; - } BIT; - } SDCADD2R; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char EMPC:1; - unsigned char EPS:1; - unsigned char IOE1IOR1:1; - } BIT; - } SDSICR1; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char DMALOCKEN:1; - unsigned char DMAEN:1; - } BIT; - } DMACR1; - union { - unsigned short WORD; - struct { - unsigned short :7; - unsigned short CMD53BLK:9; - } BIT; - } BLKCNT; - union { - unsigned short WORD; - struct { - unsigned short :4; - unsigned short CMD53BYT:12; - } BIT; - } BYTCNT; - union { - unsigned long LONG; - struct { - unsigned long DMAADD:32; - } BIT; - } DMATRADDR; - char wk0[236]; - union { - unsigned long LONG; - struct { - unsigned long :27; - unsigned long REG5EN:1; - unsigned long :1; - unsigned long WSWAP:1; - unsigned long :1; - unsigned long RSWAP:1; - } BIT; - } SDSICR2; - union { - unsigned long LONG; - struct { - unsigned long :12; - unsigned long SMPC:1; - unsigned long SPS:1; - unsigned long :14; - unsigned long CEN:1; - unsigned long IOR0:1; - unsigned long :1; - unsigned long SRST:1; - } BIT; - } SDSICR3; - union { - unsigned long LONG; - struct { - unsigned long :29; - unsigned long DTEEN:1; - unsigned long CDREN:1; - unsigned long CDFEN:1; - } BIT; - } INTENCR2; - union { - unsigned long LONG; - struct { - unsigned long :29; - unsigned long DTE:1; - unsigned long CDR:1; - unsigned long CDF:1; - } BIT; - } INTSR2; - union { - unsigned long LONG; - struct { - unsigned long :23; - unsigned long DMASDSEL:1; - unsigned long :4; - unsigned long DMAWSWAP:2; - unsigned long DMARSWAP:2; - } BIT; - } DMACR2; - char wk1[236]; - unsigned long CISDATAR[27]; - char wk2[4]; - union { - unsigned long LONG; - struct { - unsigned long :16; - unsigned long FBR1U:8; - unsigned long :4; - unsigned long FBR1L:4; - } BIT; - } FBR1; - union { - unsigned long LONG; - struct { - unsigned long :24; - unsigned long FBR2:8; - } BIT; - } FBR2; - union { - unsigned long LONG; - struct { - unsigned long :16; - unsigned long FBR3:16; - } BIT; - } FBR3; - union { - unsigned long LONG; - struct { - unsigned long :16; - unsigned long FBR4:16; - } BIT; - } FBR4; - union { - unsigned long LONG; - struct { - unsigned long :24; - unsigned long FBR5:8; - } BIT; - } FBR5; - char wk3[1404]; - unsigned long FN1DATAR1[64]; - unsigned long FN1DATAR2[64]; - unsigned long FN1DATAR3[64]; - union { - unsigned char BYTE; - struct { - unsigned char INTVEC:8; - } BIT; - } FN1INTVECR; - union { - unsigned char BYTE; - struct { - unsigned char INTCTR:8; - } BIT; - } FN1INTCLRR; - char wk4[254]; - unsigned long FN1DATAR5[256]; -} st_sdsi_t; - -typedef struct st_smci0 { - union { - unsigned char BYTE; - struct { - unsigned char GM:1; - unsigned char BLK:1; - unsigned char PE:1; - unsigned char PM:1; - unsigned char BCP:2; - unsigned char CKS:2; - } BIT; - } SMR; - unsigned char BRR; - union { - unsigned char BYTE; - struct { - unsigned char TIE:1; - unsigned char RIE:1; - unsigned char TE:1; - unsigned char RE:1; - unsigned char MPIE:1; - unsigned char TEIE:1; - unsigned char CKE:2; - } BIT; - } SCR; - unsigned char TDR; - union { - unsigned char BYTE; - struct { - unsigned char TDRE:1; - unsigned char RDRF:1; - unsigned char ORER:1; - unsigned char ERS:1; - unsigned char PER:1; - unsigned char TEND:1; - unsigned char MPB:1; - unsigned char MPBT:1; - } BIT; - } SSR; - unsigned char RDR; - union { - unsigned char BYTE; - struct { - unsigned char BCP2:1; - unsigned char :2; - unsigned char CHR1:1; - unsigned char SDIR:1; - unsigned char SINV:1; - unsigned char :1; - unsigned char SMIF:1; - } BIT; - } SCMR; -} st_smci0_t; - -typedef struct st_smci10 { - union { - unsigned char BYTE; - struct { - unsigned char BCP2:1; - unsigned char :2; - unsigned char CHR1:1; - unsigned char SDIR:1; - unsigned char SINV:1; - unsigned char :1; - unsigned char SMIF:1; - } BIT; - } SCMR; -} st_smci10_t; - -typedef struct st_system { - union { - unsigned short WORD; - struct { - unsigned short :15; - unsigned short MD:1; - } BIT; - } MDMONR; - char wk0[4]; - union { - unsigned short WORD; - struct { - unsigned short KEY:8; - unsigned short :6; - unsigned short EXBE:1; - unsigned short ROME:1; - } BIT; - } SYSCR0; - union { - unsigned short WORD; - struct { - unsigned short :8; - unsigned short SBYRAME:1; - unsigned short :6; - unsigned short RAME:1; - } BIT; - } SYSCR1; - char wk1[2]; - union { - unsigned short WORD; - struct { - unsigned short SSBY:1; - unsigned short OPE:1; - unsigned short :14; - } BIT; - } SBYCR; - char wk2[2]; - union { - unsigned long LONG; - struct { - unsigned long ACSE:1; - unsigned long :1; - unsigned long MSTPA29:1; - unsigned long MSTPA28:1; - unsigned long MSTPA27:1; - unsigned long :2; - unsigned long MSTPA24:1; - unsigned long :4; - unsigned long MSTPA19:1; - unsigned long :1; - unsigned long MSTPA17:1; - unsigned long MSTPA16:1; - unsigned long MSTPA15:1; - unsigned long MSTPA14:1; - unsigned long MSTPA13:1; - unsigned long :1; - unsigned long MSTPA11:1; - unsigned long MSTPA10:1; - unsigned long MSTPA9:1; - unsigned long :3; - unsigned long MSTPA5:1; - unsigned long MSTPA4:1; - unsigned long :2; - unsigned long MSTPA1:1; - unsigned long MSTPA0:1; - } BIT; - } MSTPCRA; - union { - unsigned long LONG; - struct { - unsigned long MSTPB31:1; - unsigned long MSTPB30:1; - unsigned long MSTPB29:1; - unsigned long MSTPB28:1; - unsigned long MSTPB27:1; - unsigned long MSTPB26:1; - unsigned long MSTPB25:1; - unsigned long MSTPB24:1; - unsigned long MSTPB23:1; - unsigned long MSTPB22:1; - unsigned long MSTPB21:1; - unsigned long MSTPB20:1; - unsigned long MSTPB19:1; - unsigned long :1; - unsigned long MSTPB17:1; - unsigned long MSTPB16:1; - unsigned long MSTPB15:1; - unsigned long :5; - unsigned long MSTPB9:1; - unsigned long MSTPB8:1; - unsigned long :1; - unsigned long MSTPB6:1; - unsigned long :1; - unsigned long MSTPB4:1; - unsigned long :2; - unsigned long MSTPB1:1; - unsigned long MSTPB0:1; - } BIT; - } MSTPCRB; - union { - unsigned long LONG; - struct { - unsigned long :2; - unsigned long MSTPC29:1; - unsigned long MSTPC28:1; - unsigned long MSTPC27:1; - unsigned long MSTPC26:1; - unsigned long MSTPC25:1; - unsigned long MSTPC24:1; - unsigned long MSTPC23:1; - unsigned long MSTPC22:1; - unsigned long :2; - unsigned long MSTPC19:1; - unsigned long :1; - unsigned long MSTPC17:1; - unsigned long :9; - unsigned long MSTPC7:1; - unsigned long :4; - unsigned long MSTPC2:1; - unsigned long :1; - unsigned long MSTPC0:1; - } BIT; - } MSTPCRC; - union { - unsigned long LONG; - struct { - unsigned long :4; - unsigned long MSTPD27:1; - unsigned long :5; - unsigned long MSTPD21:1; - unsigned long :1; - unsigned long MSTPD19:1; - unsigned long :5; - unsigned long MSTPD13:1; - unsigned long :5; - unsigned long MSTPD7:1; - unsigned long MSTPD6:1; - unsigned long MSTPD5:1; - unsigned long MSTPD4:1; - unsigned long MSTPD3:1; - unsigned long MSTPD2:1; - unsigned long MSTPD1:1; - unsigned long MSTPD0:1; - } BIT; - } MSTPCRD; - union { - unsigned long LONG; - struct { - unsigned long FCK:4; - unsigned long ICK:4; - unsigned long PSTOP1:1; - unsigned long PSTOP0:1; - unsigned long :2; - unsigned long BCK:4; - unsigned long PCKA:4; - unsigned long PCKB:4; - unsigned long PCKC:4; - unsigned long PCKD:4; - } BIT; - } SCKCR; - union { - unsigned short WORD; - struct { - unsigned short :8; - unsigned short UCK:4; - unsigned short :4; - } BIT; - } SCKCR2; - union { - unsigned short WORD; - struct { - unsigned short :5; - unsigned short CKSEL:3; - unsigned short :8; - } BIT; - } SCKCR3; - union { - unsigned short WORD; - struct { - unsigned short :2; - unsigned short STC:6; - unsigned short :3; - unsigned short PLLSRCSEL:1; - unsigned short :2; - unsigned short PLIDIV:2; - } BIT; - } PLLCR; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char PLLEN:1; - } BIT; - } PLLCR2; - char wk3[5]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char BCLKDIV:1; - } BIT; - } BCKCR; - char wk4[1]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char MOSTP:1; - } BIT; - } MOSCCR; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char SOSTP:1; - } BIT; - } SOSCCR; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char LCSTP:1; - } BIT; - } LOCOCR; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char ILCSTP:1; - } BIT; - } ILOCOCR; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char HCSTP:1; - } BIT; - } HOCOCR; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char HCFRQ:2; - } BIT; - } HOCOCR2; - char wk5[4]; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char ILCOVF:1; - unsigned char HCOVF:1; - unsigned char PLOVF:1; - unsigned char SOOVF:1; - unsigned char MOOVF:1; - } BIT; - } OSCOVFSR; - char wk6[3]; - union { - unsigned char BYTE; - struct { - unsigned char OSTDE:1; - unsigned char :6; - unsigned char OSTDIE:1; - } BIT; - } OSTDCR; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char OSTDF:1; - } BIT; - } OSTDSR; - char wk7[94]; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char OPCMTSF:1; - unsigned char :1; - unsigned char OPCM:3; - } BIT; - } OPCCR; - union { - unsigned char BYTE; - struct { - unsigned char RSTCKEN:1; - unsigned char :4; - unsigned char RSTCKSEL:3; - } BIT; - } RSTCKCR; - union { - unsigned char BYTE; - struct { - unsigned char MSTS:8; - } BIT; - } MOSCWTCR; - union { - unsigned char BYTE; - struct { - unsigned char SSTS:8; - } BIT; - } SOSCWTCR; - char wk8[28]; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char SWRF:1; - unsigned char WDTRF:1; - unsigned char IWDTRF:1; - } BIT; - } RSTSR2; - char wk9[1]; - unsigned short SWRR; - char wk10[28]; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char LVD1IRQSEL:1; - unsigned char LVD1IDTSEL:2; - } BIT; - } LVD1CR1; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char LVD1MON:1; - unsigned char LVD1DET:1; - } BIT; - } LVD1SR; - union { - unsigned char BYTE; - struct { - unsigned char :5; - unsigned char LVD2IRQSEL:1; - unsigned char LVD2IDTSEL:2; - } BIT; - } LVD2CR1; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char LVD2MON:1; - unsigned char LVD2DET:1; - } BIT; - } LVD2SR; - char wk11[794]; - union { - unsigned short WORD; - struct { - unsigned short PRKEY:8; - unsigned short :4; - unsigned short PRC3:1; - unsigned short :1; - unsigned short PRC1:1; - unsigned short PRC0:1; - } BIT; - } PRCR; - char wk12[3100]; - union { - unsigned char BYTE; - struct { - unsigned char :6; - unsigned char ROMWT:2; - } BIT; - } ROMWT; - char wk13[45667]; - union { - unsigned char BYTE; - struct { - unsigned char DPSBY:1; - unsigned char IOKEEP:1; - unsigned char :4; - unsigned char DEEPCUT:2; - } BIT; - } DPSBYCR; - char wk14[1]; - union { - unsigned char BYTE; - struct { - unsigned char DIRQ7E:1; - unsigned char DIRQ6E:1; - unsigned char DIRQ5E:1; - unsigned char DIRQ4E:1; - unsigned char DIRQ3E:1; - unsigned char DIRQ2E:1; - unsigned char DIRQ1E:1; - unsigned char DIRQ0E:1; - } BIT; - } DPSIER0; - union { - unsigned char BYTE; - struct { - unsigned char DIRQ15E:1; - unsigned char DIRQ14E:1; - unsigned char DIRQ13E:1; - unsigned char DIRQ12E:1; - unsigned char DIRQ11E:1; - unsigned char DIRQ10E:1; - unsigned char DIRQ9E:1; - unsigned char DIRQ8E:1; - } BIT; - } DPSIER1; - union { - unsigned char BYTE; - struct { - unsigned char DUSBIE:1; - unsigned char DRIICCIE:1; - unsigned char DRIICDIE:1; - unsigned char DNMIE:1; - unsigned char DRTCAIE:1; - unsigned char DRTCIIE:1; - unsigned char DLVD2IE:1; - unsigned char DLVD1IE:1; - } BIT; - } DPSIER2; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char DCANIE:1; - } BIT; - } DPSIER3; - union { - unsigned char BYTE; - struct { - unsigned char DIRQ7F:1; - unsigned char DIRQ6F:1; - unsigned char DIRQ5F:1; - unsigned char DIRQ4F:1; - unsigned char DIRQ3F:1; - unsigned char DIRQ2F:1; - unsigned char DIRQ1F:1; - unsigned char DIRQ0F:1; - } BIT; - } DPSIFR0; - union { - unsigned char BYTE; - struct { - unsigned char DIRQ15F:1; - unsigned char DIRQ14F:1; - unsigned char DIRQ13F:1; - unsigned char DIRQ12F:1; - unsigned char DIRQ11F:1; - unsigned char DIRQ10F:1; - unsigned char DIRQ9F:1; - unsigned char DIRQ8F:1; - } BIT; - } DPSIFR1; - union { - unsigned char BYTE; - struct { - unsigned char DUSBIF:1; - unsigned char DRIICCIF:1; - unsigned char DRIICDIF:1; - unsigned char DNMIF:1; - unsigned char DRTCAIF:1; - unsigned char DRTCIIF:1; - unsigned char DLVD2IF:1; - unsigned char DLVD1IF:1; - } BIT; - } DPSIFR2; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char DCANIF:1; - } BIT; - } DPSIFR3; - union { - unsigned char BYTE; - struct { - unsigned char DIRQ7EG:1; - unsigned char DIRQ6EG:1; - unsigned char DIRQ5EG:1; - unsigned char DIRQ4EG:1; - unsigned char DIRQ3EG:1; - unsigned char DIRQ2EG:1; - unsigned char DIRQ1EG:1; - unsigned char DIRQ0EG:1; - } BIT; - } DPSIEGR0; - union { - unsigned char BYTE; - struct { - unsigned char DIRQ15EG:1; - unsigned char DIRQ14EG:1; - unsigned char DIRQ13EG:1; - unsigned char DIRQ12EG:1; - unsigned char DIRQ11EG:1; - unsigned char DIRQ10EG:1; - unsigned char DIRQ9EG:1; - unsigned char DIRQ8EG:1; - } BIT; - } DPSIEGR1; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char DRIICCEG:1; - unsigned char DRIICDEG:1; - unsigned char DNMIEG:1; - unsigned char :2; - unsigned char DLVD2EG:1; - unsigned char DLVD1EG:1; - } BIT; - } DPSIEGR2; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char DCANIEG:1; - } BIT; - } DPSIEGR3; - char wk15[2]; - union { - unsigned char BYTE; - struct { - unsigned char DPSRSTF:1; - unsigned char :3; - unsigned char LVD2RF:1; - unsigned char LVD1RF:1; - unsigned char LVD0RF:1; - unsigned char PORF:1; - } BIT; - } RSTSR0; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char CWSF:1; - } BIT; - } RSTSR1; - char wk16[1]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char MOSEL:1; - unsigned char MODRV2:2; - unsigned char :3; - unsigned char MOFXIN:1; - } BIT; - } MOFCR; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char HOCOPCNT:1; - } BIT; - } HOCOPCR; - char wk17[2]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char LVD2E:1; - unsigned char LVD1E:1; - unsigned char :5; - } BIT; - } LVCMPCR; - union { - unsigned char BYTE; - struct { - unsigned char LVD2LVL:4; - unsigned char LVD1LVL:4; - } BIT; - } LVDLVLR; - char wk18[1]; - union { - unsigned char BYTE; - struct { - unsigned char LVD1RN:1; - unsigned char LVD1RI:1; - unsigned char LVD1FSAMP:2; - unsigned char :1; - unsigned char LVD1CMPE:1; - unsigned char LVD1DFDIS:1; - unsigned char LVD1RIE:1; - } BIT; - } LVD1CR0; - union { - unsigned char BYTE; - struct { - unsigned char LVD2RN:1; - unsigned char LVD2RI:1; - unsigned char LVD2FSAMP:2; - unsigned char :1; - unsigned char LVD2CMPE:1; - unsigned char LVD2DFDIS:1; - unsigned char LVD2RIE:1; - } BIT; - } LVD2CR0; - char wk19[4]; - unsigned char DPSBKR[32]; -} st_system_t; - -typedef struct st_temps { - union { - unsigned char BYTE; - struct { - unsigned char TSEN:1; - unsigned char :2; - unsigned char TSOE:1; - unsigned char :4; - } BIT; - } TSCR; -} st_temps_t; - -typedef struct st_tmr0 { - union { - unsigned char BYTE; - struct { - unsigned char CMIEB:1; - unsigned char CMIEA:1; - unsigned char OVIE:1; - unsigned char CCLR:2; - unsigned char :3; - } BIT; - } TCR; - char wk0[1]; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char ADTE:1; - unsigned char OSB:2; - unsigned char OSA:2; - } BIT; - } TCSR; - char wk1[1]; - unsigned char TCORA; - char wk2[1]; - unsigned char TCORB; - char wk3[1]; - unsigned char TCNT; - char wk4[1]; - union { - unsigned char BYTE; - struct { - unsigned char TMRIS:1; - unsigned char :2; - unsigned char CSS:2; - unsigned char CKS:3; - } BIT; - } TCCR; - char wk5[1]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char TCS:1; - } BIT; - } TCSTR; -} st_tmr0_t; - -typedef struct st_tmr1 { - union { - unsigned char BYTE; - struct { - unsigned char CMIEB:1; - unsigned char CMIEA:1; - unsigned char OVIE:1; - unsigned char CCLR:2; - unsigned char :3; - } BIT; - } TCR; - char wk0[1]; - union { - unsigned char BYTE; - struct { - unsigned char :4; - unsigned char OSB:2; - unsigned char OSA:2; - } BIT; - } TCSR; - char wk1[1]; - unsigned char TCORA; - char wk2[1]; - unsigned char TCORB; - char wk3[1]; - unsigned char TCNT; - char wk4[1]; - union { - unsigned char BYTE; - struct { - unsigned char TMRIS:1; - unsigned char :2; - unsigned char CSS:2; - unsigned char CKS:3; - } BIT; - } TCCR; - char wk5[1]; - union { - unsigned char BYTE; - struct { - unsigned char :7; - unsigned char TCS:1; - } BIT; - } TCSTR; -} st_tmr1_t; - -typedef struct st_tmr01 { - unsigned short TCORA; - unsigned short TCORB; - unsigned short TCNT; - unsigned short TCCR; -} st_tmr01_t; - -typedef struct st_tpu0 { - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char NFCS:2; - unsigned char NFDEN:1; - unsigned char NFCEN:1; - unsigned char NFBEN:1; - unsigned char NFAEN:1; - } BIT; - } NFCR; - char wk0[7]; - union { - unsigned char BYTE; - struct { - unsigned char CCLR:3; - unsigned char CKEG:2; - unsigned char TPSC:3; - } BIT; - } TCR; - union { - unsigned char BYTE; - struct { - unsigned char ICSELD:1; - unsigned char ICSELB:1; - unsigned char BFB:1; - unsigned char BFA:1; - unsigned char MD:4; - } BIT; - } TMDR; - union { - unsigned char BYTE; - struct { - unsigned char IOB:4; - unsigned char IOA:4; - } BIT; - } TIORH; - union { - unsigned char BYTE; - struct { - unsigned char IOD:4; - unsigned char IOC:4; - } BIT; - } TIORL; - union { - unsigned char BYTE; - struct { - unsigned char TTGE:1; - unsigned char :2; - unsigned char TCIEV:1; - unsigned char TGIED:1; - unsigned char TGIEC:1; - unsigned char TGIEB:1; - unsigned char TGIEA:1; - } BIT; - } TIER; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char TCFV:1; - unsigned char TGFD:1; - unsigned char TGFC:1; - unsigned char TGFB:1; - unsigned char TGFA:1; - } BIT; - } TSR; - unsigned short TCNT; - unsigned short TGRA; - unsigned short TGRB; - unsigned short TGRC; - unsigned short TGRD; -} st_tpu0_t; - -typedef struct st_tpu1 { - char wk0[1]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char NFCS:2; - unsigned char :2; - unsigned char NFBEN:1; - unsigned char NFAEN:1; - } BIT; - } NFCR; - char wk1[22]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char CCLR:2; - unsigned char CKEG:2; - unsigned char TPSC:3; - } BIT; - } TCR; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ICSELB:1; - unsigned char :2; - unsigned char MD:4; - } BIT; - } TMDR; - union { - unsigned char BYTE; - struct { - unsigned char IOB:4; - unsigned char IOA:4; - } BIT; - } TIOR; - char wk2[1]; - union { - unsigned char BYTE; - struct { - unsigned char TTGE:1; - unsigned char :1; - unsigned char TCIEU:1; - unsigned char TCIEV:1; - unsigned char :2; - unsigned char TGIEB:1; - unsigned char TGIEA:1; - } BIT; - } TIER; - union { - unsigned char BYTE; - struct { - unsigned char TCFD:1; - unsigned char :1; - unsigned char TCFU:1; - unsigned char TCFV:1; - unsigned char :2; - unsigned char TGFB:1; - unsigned char TGFA:1; - } BIT; - } TSR; - unsigned short TCNT; - unsigned short TGRA; - unsigned short TGRB; -} st_tpu1_t; - -typedef struct st_tpu2 { - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char NFCS:2; - unsigned char :2; - unsigned char NFBEN:1; - unsigned char NFAEN:1; - } BIT; - } NFCR; - char wk0[37]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char CCLR:2; - unsigned char CKEG:2; - unsigned char TPSC:3; - } BIT; - } TCR; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ICSELB:1; - unsigned char :2; - unsigned char MD:4; - } BIT; - } TMDR; - union { - unsigned char BYTE; - struct { - unsigned char IOB:4; - unsigned char IOA:4; - } BIT; - } TIOR; - char wk1[1]; - union { - unsigned char BYTE; - struct { - unsigned char TTGE:1; - unsigned char :1; - unsigned char TCIEU:1; - unsigned char TCIEV:1; - unsigned char :2; - unsigned char TGIEB:1; - unsigned char TGIEA:1; - } BIT; - } TIER; - union { - unsigned char BYTE; - struct { - unsigned char TCFD:1; - unsigned char :1; - unsigned char TCFU:1; - unsigned char TCFV:1; - unsigned char :2; - unsigned char TGFB:1; - unsigned char TGFA:1; - } BIT; - } TSR; - unsigned short TCNT; - unsigned short TGRA; - unsigned short TGRB; -} st_tpu2_t; - -typedef struct st_tpu3 { - char wk0[1]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char NFCS:2; - unsigned char NFDEN:1; - unsigned char NFCEN:1; - unsigned char NFBEN:1; - unsigned char NFAEN:1; - } BIT; - } NFCR; - char wk1[52]; - union { - unsigned char BYTE; - struct { - unsigned char CCLR:3; - unsigned char CKEG:2; - unsigned char TPSC:3; - } BIT; - } TCR; - union { - unsigned char BYTE; - struct { - unsigned char ICSELD:1; - unsigned char ICSELB:1; - unsigned char BFB:1; - unsigned char BFA:1; - unsigned char MD:4; - } BIT; - } TMDR; - union { - unsigned char BYTE; - struct { - unsigned char IOB:4; - unsigned char IOA:4; - } BIT; - } TIORH; - union { - unsigned char BYTE; - struct { - unsigned char IOD:4; - unsigned char IOC:4; - } BIT; - } TIORL; - union { - unsigned char BYTE; - struct { - unsigned char TTGE:1; - unsigned char :2; - unsigned char TCIEV:1; - unsigned char TGIED:1; - unsigned char TGIEC:1; - unsigned char TGIEB:1; - unsigned char TGIEA:1; - } BIT; - } TIER; - union { - unsigned char BYTE; - struct { - unsigned char :3; - unsigned char TCFV:1; - unsigned char TGFD:1; - unsigned char TGFC:1; - unsigned char TGFB:1; - unsigned char TGFA:1; - } BIT; - } TSR; - unsigned short TCNT; - unsigned short TGRA; - unsigned short TGRB; - unsigned short TGRC; - unsigned short TGRD; -} st_tpu3_t; - -typedef struct st_tpu4 { - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char NFCS:2; - unsigned char :2; - unsigned char NFBEN:1; - unsigned char NFAEN:1; - } BIT; - } NFCR; - char wk0[67]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char CCLR:2; - unsigned char CKEG:2; - unsigned char TPSC:3; - } BIT; - } TCR; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ICSELB:1; - unsigned char :2; - unsigned char MD:4; - } BIT; - } TMDR; - union { - unsigned char BYTE; - struct { - unsigned char IOB:4; - unsigned char IOA:4; - } BIT; - } TIOR; - char wk1[1]; - union { - unsigned char BYTE; - struct { - unsigned char TTGE:1; - unsigned char :1; - unsigned char TCIEU:1; - unsigned char TCIEV:1; - unsigned char :2; - unsigned char TGIEB:1; - unsigned char TGIEA:1; - } BIT; - } TIER; - union { - unsigned char BYTE; - struct { - unsigned char TCFD:1; - unsigned char :1; - unsigned char TCFU:1; - unsigned char TCFV:1; - unsigned char :2; - unsigned char TGFB:1; - unsigned char TGFA:1; - } BIT; - } TSR; - unsigned short TCNT; - unsigned short TGRA; - unsigned short TGRB; -} st_tpu4_t; - -typedef struct st_tpu5 { - char wk0[1]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char NFCS:2; - unsigned char :2; - unsigned char NFBEN:1; - unsigned char NFAEN:1; - } BIT; - } NFCR; - char wk1[82]; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char CCLR:2; - unsigned char CKEG:2; - unsigned char TPSC:3; - } BIT; - } TCR; - union { - unsigned char BYTE; - struct { - unsigned char :1; - unsigned char ICSELB:1; - unsigned char :2; - unsigned char MD:4; - } BIT; - } TMDR; - union { - unsigned char BYTE; - struct { - unsigned char IOB:4; - unsigned char IOA:4; - } BIT; - } TIOR; - char wk2[1]; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char TCIEU:1; - unsigned char TCIEV:1; - unsigned char :2; - unsigned char TGIEB:1; - unsigned char TGIEA:1; - } BIT; - } TIER; - union { - unsigned char BYTE; - struct { - unsigned char TCFD:1; - unsigned char :1; - unsigned char TCFU:1; - unsigned char TCFV:1; - unsigned char :2; - unsigned char TGFB:1; - unsigned char TGFA:1; - } BIT; - } TSR; - unsigned short TCNT; - unsigned short TGRA; - unsigned short TGRB; -} st_tpu5_t; - -typedef struct st_tpua { - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char CST5:1; - unsigned char CST4:1; - unsigned char CST3:1; - unsigned char CST2:1; - unsigned char CST1:1; - unsigned char CST0:1; - } BIT; - } TSTR; - union { - unsigned char BYTE; - struct { - unsigned char :2; - unsigned char SYNC5:1; - unsigned char SYNC4:1; - unsigned char SYNC3:1; - unsigned char SYNC2:1; - unsigned char SYNC1:1; - unsigned char SYNC0:1; - } BIT; - } TSYR; -} st_tpua_t; - -typedef struct st_usb { - union { - unsigned long LONG; - struct { - unsigned long :8; - unsigned long DVBSTS0:1; - unsigned long :1; - unsigned long DOVCB0:1; - unsigned long DOVCA0:1; - unsigned long :2; - unsigned long DM0:1; - unsigned long DP0:1; - unsigned long :11; - unsigned long FIXPHY0:1; - unsigned long DRPD0:1; - unsigned long :1; - unsigned long RPUE0:1; - unsigned long SRPC0:1; - } BIT; - } DPUSR0R; - union { - unsigned long LONG; - struct { - unsigned long :8; - unsigned long DVBINT0:1; - unsigned long :1; - unsigned long DOVRCRB0:1; - unsigned long DOVRCRA0:1; - unsigned long :2; - unsigned long DMINT0:1; - unsigned long DPINT0:1; - unsigned long :8; - unsigned long DVBSE0:1; - unsigned long :1; - unsigned long DOVRCRBE0:1; - unsigned long DOVRCRAE0:1; - unsigned long :2; - unsigned long DMINTE0:1; - unsigned long DPINTE0:1; - } BIT; - } DPUSR1R; -} st_usb_t; - -typedef struct st_usb0 { - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short :5; - unsigned short SCKE:1; - unsigned short :3; - unsigned short DCFM:1; - unsigned short DRPD:1; - unsigned short DPRPU:1; - unsigned short :3; - unsigned short USBE:1; - } BIT; -#endif - } SYSCFG; - char wk0[2]; - union { - unsigned short WORD; - struct { - unsigned short OVCMON:2; - unsigned short :7; - unsigned short HTACT:1; - unsigned short SOFEA:1; - unsigned short :2; - unsigned short IDMON:1; - unsigned short LNST:2; - } BIT; - } SYSSTS0; - char wk1[2]; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short :4; - unsigned short HNPBTOA:1; - unsigned short EXICEN:1; - unsigned short VBUSEN:1; - unsigned short WKUP:1; - unsigned short RWUPE:1; - unsigned short USBRST:1; - unsigned short RESUME:1; - unsigned short UACT:1; - unsigned short :1; - unsigned short RHST:3; - } BIT; -#endif - } DVSTCTR0; - char wk2[10]; - union { - unsigned short WORD; - struct { - unsigned char L; - unsigned char H; - } BYTE; - } CFIFO; - char wk3[2]; - union { - unsigned short WORD; - struct { - unsigned char L; - unsigned char H; - } BYTE; - } D0FIFO; - char wk4[2]; - union { - unsigned short WORD; - struct { - unsigned char L; - unsigned char H; - } BYTE; - } D1FIFO; - char wk5[2]; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short RCNT:1; - unsigned short REW:1; - unsigned short :3; - unsigned short MBW:1; - unsigned short :1; - unsigned short BIGEND:1; - unsigned short :2; - unsigned short ISEL:1; - unsigned short :1; - unsigned short CURPIPE:4; - } BIT; -#endif - } CFIFOSEL; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short BVAL:1; - unsigned short BCLR:1; - unsigned short FRDY:1; - unsigned short :4; - unsigned short DTLN:9; - } BIT; -#endif - } CFIFOCTR; - char wk6[4]; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short RCNT:1; - unsigned short REW:1; - unsigned short DCLRM:1; - unsigned short DREQE:1; - unsigned short :1; - unsigned short MBW:1; - unsigned short :1; - unsigned short BIGEND:1; - unsigned short :4; - unsigned short CURPIPE:4; - } BIT; -#endif - } D0FIFOSEL; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short BVAL:1; - unsigned short BCLR:1; - unsigned short FRDY:1; - unsigned short :4; - unsigned short DTLN:9; - } BIT; -#endif - } D0FIFOCTR; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short RCNT:1; - unsigned short REW:1; - unsigned short DCLRM:1; - unsigned short DREQE:1; - unsigned short :1; - unsigned short MBW:1; - unsigned short :1; - unsigned short BIGEND:1; - unsigned short :4; - unsigned short CURPIPE:4; - } BIT; -#endif - } D1FIFOSEL; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short BVAL:1; - unsigned short BCLR:1; - unsigned short FRDY:1; - unsigned short :4; - unsigned short DTLN:9; - } BIT; -#endif - } D1FIFOCTR; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short VBSE:1; - unsigned short RSME:1; - unsigned short SOFE:1; - unsigned short DVSE:1; - unsigned short CTRE:1; - unsigned short BEMPE:1; - unsigned short NRDYE:1; - unsigned short BRDYE:1; - unsigned short :8; - } BIT; -#endif - } INTENB0; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short OVRCRE:1; - unsigned short BCHGE:1; - unsigned short :1; - unsigned short DTCHE:1; - unsigned short ATTCHE:1; - unsigned short :4; - unsigned short EOFERRE:1; - unsigned short SIGNE:1; - unsigned short SACKE:1; - unsigned short :4; - } BIT; -#endif - } INTENB1; - char wk7[2]; - union { - unsigned short WORD; - struct { - unsigned short :6; - unsigned short PIPE9BRDYE:1; - unsigned short PIPE8BRDYE:1; - unsigned short PIPE7BRDYE:1; - unsigned short PIPE6BRDYE:1; - unsigned short PIPE5BRDYE:1; - unsigned short PIPE4BRDYE:1; - unsigned short PIPE3BRDYE:1; - unsigned short PIPE2BRDYE:1; - unsigned short PIPE1BRDYE:1; - unsigned short PIPE0BRDYE:1; - } BIT; - } BRDYENB; - union { - unsigned short WORD; - struct { - unsigned short :6; - unsigned short PIPE9NRDYE:1; - unsigned short PIPE8NRDYE:1; - unsigned short PIPE7NRDYE:1; - unsigned short PIPE6NRDYE:1; - unsigned short PIPE5NRDYE:1; - unsigned short PIPE4NRDYE:1; - unsigned short PIPE3NRDYE:1; - unsigned short PIPE2NRDYE:1; - unsigned short PIPE1NRDYE:1; - unsigned short PIPE0NRDYE:1; - } BIT; - } NRDYENB; - union { - unsigned short WORD; - struct { - unsigned short :6; - unsigned short PIPE9BEMPE:1; - unsigned short PIPE8BEMPE:1; - unsigned short PIPE7BEMPE:1; - unsigned short PIPE6BEMPE:1; - unsigned short PIPE5BEMPE:1; - unsigned short PIPE4BEMPE:1; - unsigned short PIPE3BEMPE:1; - unsigned short PIPE2BEMPE:1; - unsigned short PIPE1BEMPE:1; - unsigned short PIPE0BEMPE:1; - } BIT; - } BEMPENB; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short :7; - unsigned short TRNENSEL:1; - unsigned short :1; - unsigned short BRDYM:1; - unsigned short :1; - unsigned short EDGESTS:1; - unsigned short :4; - } BIT; -#endif - } SOFCFG; - char wk8[2]; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short VBINT:1; - unsigned short RESM:1; - unsigned short SOFR:1; - unsigned short DVST:1; - unsigned short CTRT:1; - unsigned short BEMP:1; - unsigned short NRDY:1; - unsigned short BRDY:1; - unsigned short VBSTS:1; - unsigned short DVSQ:3; - unsigned short VALID:1; - unsigned short CTSQ:3; - } BIT; -#endif - } INTSTS0; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short OVRCR:1; - unsigned short BCHG:1; - unsigned short :1; - unsigned short DTCH:1; - unsigned short ATTCH:1; - unsigned short :4; - unsigned short EOFERR:1; - unsigned short SIGN:1; - unsigned short SACK:1; - unsigned short :4; - } BIT; -#endif - } INTSTS1; - char wk9[2]; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short :6; - unsigned short PIPE9BRDY:1; - unsigned short PIPE8BRDY:1; - unsigned short PIPE7BRDY:1; - unsigned short PIPE6BRDY:1; - unsigned short PIPE5BRDY:1; - unsigned short PIPE4BRDY:1; - unsigned short PIPE3BRDY:1; - unsigned short PIPE2BRDY:1; - unsigned short PIPE1BRDY:1; - unsigned short PIPE0BRDY:1; - } BIT; -#endif - } BRDYSTS; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short :6; - unsigned short PIPE9NRDY:1; - unsigned short PIPE8NRDY:1; - unsigned short PIPE7NRDY:1; - unsigned short PIPE6NRDY:1; - unsigned short PIPE5NRDY:1; - unsigned short PIPE4NRDY:1; - unsigned short PIPE3NRDY:1; - unsigned short PIPE2NRDY:1; - unsigned short PIPE1NRDY:1; - unsigned short PIPE0NRDY:1; - } BIT; -#endif - } NRDYSTS; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short :6; - unsigned short PIPE9BEMP:1; - unsigned short PIPE8BEMP:1; - unsigned short PIPE7BEMP:1; - unsigned short PIPE6BEMP:1; - unsigned short PIPE5BEMP:1; - unsigned short PIPE4BEMP:1; - unsigned short PIPE3BEMP:1; - unsigned short PIPE2BEMP:1; - unsigned short PIPE1BEMP:1; - unsigned short PIPE0BEMP:1; - } BIT; -#endif - } BEMPSTS; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short OVRN:1; - unsigned short CRCE:1; - unsigned short :3; - unsigned short FRNM:11; - } BIT; -#endif - } FRMNUM; - union { - unsigned short WORD; - struct { - unsigned short DVCHG:1; - unsigned short :15; - } BIT; - } DVCHGR; - union { - unsigned short WORD; - struct { - unsigned short :4; - unsigned short STSRECOV:4; - unsigned short :1; - unsigned short USBADDR:7; - } BIT; - } USBADDR; - char wk10[2]; - union { - unsigned short WORD; - struct { - unsigned short BREQUEST:8; - unsigned short BMREQUESTTYPE:8; - } BIT; - } USBREQ; - unsigned short USBVAL; - unsigned short USBINDX; - unsigned short USBLENG; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short :8; - unsigned short SHTNAK:1; - unsigned short :2; - unsigned short DIR:1; - unsigned short :4; - } BIT; -#endif - } DCPCFG; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short DEVSEL:4; - unsigned short :5; - unsigned short MXPS:7; - } BIT; -#endif - } DCPMAXP; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short BSTS:1; - unsigned short SUREQ:1; - unsigned short :2; - unsigned short SUREQCLR:1; - unsigned short :2; - unsigned short SQCLR:1; - unsigned short SQSET:1; - unsigned short SQMON:1; - unsigned short PBUSY:1; - unsigned short :2; - unsigned short CCPL:1; - unsigned short PID:2; - } BIT; -#endif - } DCPCTR; - char wk11[2]; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short :12; - unsigned short PIPESEL:4; - } BIT; -#endif - } PIPESEL; - char wk12[2]; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short TYPE:2; - unsigned short :3; - unsigned short BFRE:1; - unsigned short DBLB:1; - unsigned short :1; - unsigned short SHTNAK:1; - unsigned short :2; - unsigned short DIR:1; - unsigned short EPNUM:4; - } BIT; -#endif - } PIPECFG; - char wk13[2]; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short DEVSEL:4; - unsigned short :3; - unsigned short MXPS:9; - } BIT; -#endif - } PIPEMAXP; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short :3; - unsigned short IFIS:1; - unsigned short :9; - unsigned short IITV:3; - } BIT; -#endif - } PIPEPERI; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short BSTS:1; - unsigned short INBUFM:1; - unsigned short :3; - unsigned short ATREPM:1; - unsigned short ACLRM:1; - unsigned short SQCLR:1; - unsigned short SQSET:1; - unsigned short SQMON:1; - unsigned short PBUSY:1; - unsigned short :3; - unsigned short PID:2; - } BIT; -#endif - } PIPE1CTR; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short BSTS:1; - unsigned short INBUFM:1; - unsigned short :3; - unsigned short ATREPM:1; - unsigned short ACLRM:1; - unsigned short SQCLR:1; - unsigned short SQSET:1; - unsigned short SQMON:1; - unsigned short PBUSY:1; - unsigned short :3; - unsigned short PID:2; - } BIT; -#endif - } PIPE2CTR; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short BSTS:1; - unsigned short INBUFM:1; - unsigned short :3; - unsigned short ATREPM:1; - unsigned short ACLRM:1; - unsigned short SQCLR:1; - unsigned short SQSET:1; - unsigned short SQMON:1; - unsigned short PBUSY:1; - unsigned short :3; - unsigned short PID:2; - } BIT; -#endif - } PIPE3CTR; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short BSTS:1; - unsigned short INBUFM:1; - unsigned short :3; - unsigned short ATREPM:1; - unsigned short ACLRM:1; - unsigned short SQCLR:1; - unsigned short SQSET:1; - unsigned short SQMON:1; - unsigned short PBUSY:1; - unsigned short :3; - unsigned short PID:2; - } BIT; -#endif - } PIPE4CTR; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short BSTS:1; - unsigned short INBUFM:1; - unsigned short :3; - unsigned short ATREPM:1; - unsigned short ACLRM:1; - unsigned short SQCLR:1; - unsigned short SQSET:1; - unsigned short SQMON:1; - unsigned short PBUSY:1; - unsigned short :3; - unsigned short PID:2; - } BIT; -#endif - } PIPE5CTR; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short BSTS:1; - unsigned short :5; - unsigned short ACLRM:1; - unsigned short SQCLR:1; - unsigned short SQSET:1; - unsigned short SQMON:1; - unsigned short PBUSY:1; - unsigned short :3; - unsigned short PID:2; - } BIT; -#endif - } PIPE6CTR; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short BSTS:1; - unsigned short :5; - unsigned short ACLRM:1; - unsigned short SQCLR:1; - unsigned short SQSET:1; - unsigned short SQMON:1; - unsigned short PBUSY:1; - unsigned short :3; - unsigned short PID:2; - } BIT; -#endif - } PIPE7CTR; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short BSTS:1; - unsigned short :5; - unsigned short ACLRM:1; - unsigned short SQCLR:1; - unsigned short SQSET:1; - unsigned short SQMON:1; - unsigned short PBUSY:1; - unsigned short :3; - unsigned short PID:2; - } BIT; -#endif - } PIPE8CTR; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short BSTS:1; - unsigned short :5; - unsigned short ACLRM:1; - unsigned short SQCLR:1; - unsigned short SQSET:1; - unsigned short SQMON:1; - unsigned short PBUSY:1; - unsigned short :3; - unsigned short PID:2; - } BIT; -#endif - } PIPE9CTR; - char wk14[14]; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short :6; - unsigned short TRENB:1; - unsigned short TRCLR:1; - unsigned short :8; - } BIT; -#endif - } PIPE1TRE; - unsigned short PIPE1TRN; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short :6; - unsigned short TRENB:1; - unsigned short TRCLR:1; - unsigned short :8; - } BIT; -#endif - } PIPE2TRE; - unsigned short PIPE2TRN; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short :6; - unsigned short TRENB:1; - unsigned short TRCLR:1; - unsigned short :8; - } BIT; -#endif - } PIPE3TRE; - unsigned short PIPE3TRN; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short :6; - unsigned short TRENB:1; - unsigned short TRCLR:1; - unsigned short :8; - } BIT; -#endif - } PIPE4TRE; - unsigned short PIPE4TRN; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short :6; - unsigned short TRENB:1; - unsigned short TRCLR:1; - unsigned short :8; - } BIT; -#endif - } PIPE5TRE; - unsigned short PIPE5TRN; - char wk15[44]; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short :8; - unsigned short USBSPD:2; - unsigned short :6; - } BIT; -#endif - } DEVADD0; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short :8; - unsigned short USBSPD:2; - unsigned short :6; - } BIT; -#endif - } DEVADD1; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short :8; - unsigned short USBSPD:2; - unsigned short :6; - } BIT; -#endif - } DEVADD2; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short :8; - unsigned short USBSPD:2; - unsigned short :6; - } BIT; -#endif - } DEVADD3; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short :8; - unsigned short USBSPD:2; - unsigned short :6; - } BIT; -#endif - } DEVADD4; - union { - unsigned short WORD; -#ifdef IODEFINE_H_HISTORY - struct { - unsigned short :8; - unsigned short USBSPD:2; - unsigned short :6; - } BIT; -#endif - } DEVADD5; - char wk16[20]; - union { - unsigned long LONG; - struct { - unsigned long :28; - unsigned long SLEWF01:1; - unsigned long SLEWF00:1; - unsigned long SLEWR01:1; - unsigned long SLEWR00:1; - } BIT; - } PHYSLEW; -} st_usb0_t; - -typedef struct st_wdt { - unsigned char WDTRR; - char wk0[1]; - union { - unsigned short WORD; - struct { - unsigned short :2; - unsigned short RPSS:2; - unsigned short :2; - unsigned short RPES:2; - unsigned short CKS:4; - unsigned short :2; - unsigned short TOPS:2; - } BIT; - } WDTCR; - union { - unsigned short WORD; - struct { - unsigned short REFEF:1; - unsigned short UNDFF:1; - unsigned short CNTVAL:14; - } BIT; - } WDTSR; - union { - unsigned char BYTE; - struct { - unsigned char RSTIRQS:1; - unsigned char :7; - } BIT; - } WDTRCR; -} st_wdt_t; - -typedef struct st_flashconst { - unsigned long UIDR0; - unsigned long UIDR1; - unsigned long UIDR2; - unsigned long UIDR3; -} st_flashconst_t; - -typedef struct st_tempsconst { - unsigned long TSCDR; -} st_tempsconst_t; - -#pragma bitfields=default - - -#endif diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/platform.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/platform.h deleted file mode 100644 index 9b5aabbafdf..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/platform.h +++ /dev/null @@ -1,224 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2011-2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : platform.h -* Description : The user chooses which MCU and board they are developing for in this file. If the board you are using -* is not listed below, please add your own or use the default 'User Board'. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 30.11.2011 1.00 First Release -* : 13.01.2012 1.10 Moved from having platform defined using macro definition, to having platform defined -* by choosing an include path. This makes this file simpler and cleans up the issue -* where HEW shows all header files for all platforms under 'Dependencies'. -* : 14.02.2012 1.20 Added RX210 BSP. -* : 18.04.2012 1.30 Updated to v0.70 of FIT S/W Spec and v0.20 of FIT r_bsp Spec. This includes adding -* locking.c and locking.h in board folders. Also, r_bsp can now be configured through -* r_bsp_config.h. -* : 26.06.2012 1.40 Added new options such as exception callbacks and the ability to choose your MCU using -* its part number in r_bsp_config.h. Moved mcu_info.h to the 'mcu' folder. Made an effort -* to remove any extra files that the user would need to touch. Removed the flash_options.c -* file and put its contents in vecttbl.c. -* : 17.07.2012 1.50 Fixed bug with exception callback function names. Added BCLK_OUTPUT and SDCLK_OUTPUT -* macro options in r_bsp_config.h. Added some extra code to handle exceptions in -* vecttbl.c. Added vecttbl.h so that user has prototypes for exception callbacks. -* : 09.08.2012 1.60 Added IO_LIB_ENABLE macro to r_bsp_config_reference.h. -* : 14.11.2012 1.70 Added RSKRX62G, RSKRX63T, and RSKRX111 support. -* : 28.11.2012 2.00 Updated to be compliant with v1.00 r_bsp specification. -* : 21.01.2013 2.10 Added RSKRX63T_144PIN support. -* : 10.05.2013 2.20 Added new packages and memory variants to RX210. All iodefine.h files have been updated -* to latest revisions. On reset, all MCUs will now initialize non-bonded out pins to -* reduce current draw. r_bsp_common.c and .h files were added to support functionality -* common to all BSPs. cpu.c and cpu.h files were added to all MCU groups to support -* CPU functions such as enabling/disabling interrupts, setting the IPL, and controlling -* register protection. mcu_init.c and mcu_init.h were add to all MCU groups to support -* initialization functions that are common to a MCU group such as non-bonded pin init. -* Choosing MCU endian has been removed from r_bsp_config.h and is now automatically -* set based on compiler macros. RX-C, IAR, and GCC endian macros are supported. RX210 -* now has support for choosing HOCO frequency. All r_bsp_config.h files now have macro -* for defining Vcc which is needed by some FIT modules. IRQ locks were added for all -* MCU groups. BSP_PACKAGE_PINS macro was added to mcu_info.h which defines number of pins -* for the currently chosen package. RX111 and RX210 now have the option of using the -* r_cgc_rx module for clock management based on BSP_CFG_USE_CGC_MODULE macro in -* r_bsp_config.h. -* : 31.05.2013 2.21 Added latest iodefine.h files for RX111 (v0.9a), RX630 (v1,50a), and RX63N (v1.60). Also -* added 'doc' folder to root of r_bsp. Currently the only the document in there is the -* preliminary version of the r_bsp User's Manual. For RX210, the ability to choose chip -* version C was added to its r_bsp_config.h file. -* : 01.07.2013 2.30 Removed RSPI pin setup in RSKRX111 which caused excess current draw in low power -* modes. Changed FIT_NO_PTR and FIT_NO_FUNC macros to 0x10000000 which works for all -* RX MCUs. Added ability for user to use 1 or 2 stacks for RX MCUs. Added new interrupt -* handling features which allows for interrupt callback registration. This feature allows -* all interrupts that map to the NMI vector to be used and replaces the static callback -* definitions that were in r_bsp_config.h previously. RX111 information has been updated -* according to v1.00 HW manual. This includes support for 40-pin packages. All compiler -* messages and warnings for lowsrc.c have been cleaned up. Non-existent port init has -* been moved to end of hardware_setup() to ensure user does not overwrite the settings. -* Added blank lines between clock macros in r_bsp_config.h to aid in readability. Added -* '(void *)' cast to FIT_NO_PTR to remove compiler warnings. All r_bsp.h files now include -* r_bsp_common.h which has common includes (stdint.h, stddef.h, & stdbool.h) and uses -* r_typedefs.h when C99 is not available. RX111 and RX210 MCUs have the option of using -* the r_cgc_rx module for clock management. When this is used, the clock info macros in -* mcu_info.h (e.g. BSP_ICLK_HZ) will now make calls to the r_cgc_rx module instead of -* providing static info. For debug console output, lowlvl.src was replaced by lowlvl.c -* (assembly converted to C source). -* : 10.02.2014 2.40 Added support for the RSKRX110, RPBRX111, RSKRX220, and HSBRX21AP. Made sure -* in hwsetup.c files that the PMR registers are set after the MPC registers. Replaced -* use of stdint.h, stdbool.h, and stddef.h with platform.h to remove compiler warnings. -* Removed includes for machine.h since it is compiler specific and replaced with -* platform.h. Fixed bug in resetprg.c for many boards where LOCO was not being turned off -* when it was not being used. RX100 code now uses the oscillation stabilization flags -* instead of SW delay loop. Changed size_t to unsigned long. Defined PRC2 in register -* protection section for RX111. Fixed bug in non-existent pin setup for RX111. No -* platform is chosen by default (used to be the RSKRX111). This makes it easier to -* understand the problem when you build a new project and have not selected your platform. -* : 24.03.2014 2.50 Added support for the RSKRX64M. -* : 16.06.2014 2.60 Added version control for r_bsp_config.h Two user callback functions may now be configured -* allowing callbacks from PowerON_Reset_PC() for warm start detection. Stdio charget() and -* charput() functions may now be redirected to user defined functions. -* Added support for RSKRX631 and RDKRX631. -* : 05.08.2014 2.70 Added support for RSKRX113. -* : 29.09.2014 2.80 Added support for RSKRX71M. -* : 22.12.2014 2.90 Added support for RSKRX231. -* : 30.09.2015 3.00 Added support for RSSKRX23T and RSKRX23T. -* : 30.09.2015 3.01 Fix for RSKRX231 and RSKRX23T(RSSKRX23T). -* : 01.12.2015 3.10 Added support for RSKRX130. -* : 01.02.2016 3.20 Added support for RSKRX24T. -* : 29.02.2016 3.30 Added support for RSKRX230. -* : 01.10.2016 3.40 Added support for RSKRX65N. -* : 22.08.2016 3.50 Added support for RSKRX24U. -* : 31.01.2017 3.60_ES Added support for RSKRX65N-2MB. -* Added support for GENERIC_RX65N. -* -***********************************************************************************************************************/ - -#ifndef PLATFORM_H -#define PLATFORM_H - -/*********************************************************************************************************************** -DEFINE YOUR SYSTEM - UNCOMMENT THE INCLUDE PATH FOR THE PLATFORM YOU ARE USING. -***********************************************************************************************************************/ -/* RSKRX610 */ -//#include "./board/rskrx610/r_bsp.h" - -/* RSKRX62N */ -//#include "./board/rskrx62n/r_bsp.h" - -/* RSKRX62T */ -//#include "./board/rskrx62t/r_bsp.h" - -/* RSKRX62G */ -//#include "./board/rskrx62g/r_bsp.h" - -/* RDKRX62N */ -//#include "./board/rdkrx62n/r_bsp.h" - -/* RSKRX630 */ -//#include "./board/rskrx630/r_bsp.h" - -/* RSKRX63N */ -//#include "./board/rskrx63n/r_bsp.h" - -/* RSKRX631 */ -//#include "./board/rskrx631/r_bsp.h" - -/* RSKRX63T_64PIN */ -//#include "./board/rskrx63t_64pin/r_bsp.h" - -/* RSKRX63T_144PIN */ -//#include "./board/rskrx63t_144pin/r_bsp.h" - -/* RDKRX63N */ -//#include "./board/rdkrx63n/r_bsp.h" - -/* RDKRX631 */ -//#include "./board/rdkrx631/r_bsp.h" - -/* RSKRX64M */ -//#include "./board/rskrx64m/r_bsp.h" - -/* RSKRX65N */ -//#include "./board/rskrx65n/r_bsp.h" - -/* RSKRX65N_2MB */ -#include "./board/rskrx65n_2mb/r_bsp.h" - -/* GENERIC_RX65N */ -//#include "./board/generic_rx65n/r_bsp.h" - -/* RSKRX71M */ -//#include "./board/rskrx71m/r_bsp.h" - -/* RSKRX210 */ -//#include "./board/rskrx210/r_bsp.h" - -/* HSBRX21AP */ -//#include "./board/hsbrx21ap/r_bsp.h" - -/* RSKRX220 */ -//#include "./board/rskrx220/r_bsp.h" - -/* RSKRX230 */ -//#include "./board/rskrx230/r_bsp.h" - -/* RSKRX231 */ -//#include "./board/rskrx231/r_bsp.h" - -/* RSSKRX23T */ -//#include "./board/rsskrx23t/r_bsp.h" - -/* RSKRX23T */ -//#include "./board/rskrx23t/r_bsp.h" - -/* RSKRX24T */ -//#include "./board/rskrx24t/r_bsp.h" - -/* RSKRX24U */ -//#include "./board/rskrx24u/r_bsp.h" - -/* RSKRX111 */ -//#include "./board/rskrx111/r_bsp.h" - -/* RSKRX110 */ -//#include "./board/rskrx110/r_bsp.h" - -/* RPBRX111 */ -//#include "./board/rpbrx111/r_bsp.h" - -/* RSKRX113 */ -//#include "./board/rskrx113/r_bsp.h" - -/* RSKRX130 */ -//#include "./board/rskrx130/r_bsp.h" - -/* User Board - Define your own board here. */ -//#include "./board/user/r_bsp.h" - -/* abstraction for compiler */ -#include "SCFGcompiler.h" - -/*********************************************************************************************************************** -MAKE SURE AT LEAST ONE PLATFORM WAS DEFINED - DO NOT EDIT BELOW THIS POINT -***********************************************************************************************************************/ -#ifndef PLATFORM_DEFINED -#error "Error - No platform defined in platform.h!" -#endif - -#endif /* PLATFORM_H */ - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/readme.txt b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/readme.txt deleted file mode 100644 index da42205ef3e..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_bsp_rx65n2mb/readme.txt +++ /dev/null @@ -1,58 +0,0 @@ -r_bsp Package -============= - - -Overview --------- -The r_bsp package provides a foundation for code to be built on top of. It provides startup code, iodefines, and MCU -information for different boards. There are 2 folders that make up the r_bsp package. The 'mcu' folder contains files -that are common to a MCU group. These files provide functionality such as easy register access, CPU functions, -and a file named 'mcu_info.h' for each MCU group. The 'mcu_info.h' file has information about the MCU on the board -and is configured based on the information given in r_bsp_config.h. The information in 'mcu_info.h' is used to help -configure Renesas middleware that uses the r_bsp package. The 'board' folder has a folder with startup code for each -supported board. Which MCU and board is chosen is decided by the settings in 'platform.h'. The user can choose which -board they are using by uncommenting the include path that applies to their board. For example, if you are using the -RSK+RX62N then you would uncomment the #include "./board/rskrx62n/r_bsp.h" include path. Users are encouraged to add -their own boards to the 'board' directory. BSPs are configured by using the r_bsp_config.h file. Each board will have a -reference configuration file named r_bsp_config_reference.h. The user should copy this file to their project, rename it -to r_bsp_config.h, and use the options inside the file to configure the BSP for their project. - - -Features --------- -* Provides foundation to build code on top of. -* Provides MCU startup code. -* Provides SFR access through iodefine.h -* Stores details of MCU in 'mcu_info.h' to help configure Renesas middleware. -* Easily configure BSP through r_bsp_config.h. -* Choose MCU easily by inputting part number details in r_bsp_config.h. -* Provides callbacks for MCU exceptions and the bus error interrupt. -* Supports initializing non-bonded out pins to reduce power -* Provides API to control CPU functions such as setting the IPL, enabling/disabling interrupts, and controlling - register protection - - - -File Structure --------------- -r_bsp -| platform.h -| readme.txt -| -+---board -| +---rskrx111 -| | : -| : -| \---user -| -+---doc -| +---en -| r01an1685ej{VERSION_NUMBER}-rx.pdf -| +---ja -| r01an1685jj{VERSION_NUMBER}-rx.pdf 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The -Open() function returns a handle which is then used as a queue/buffer id for all -other API functions. These functions include routines for adding and removing -data from a queue, inspecting the amount of data in a queue, and the ability to -flush a queue. - -The queue control blocks can be allocated at compile time or dynamically at run -time. A configuration option for this exists in "r_config\r_byteq_config.h". -An original copy of the configuration file is stored in "r_byteq\ref\ -r_byteq_config_reference.h". - - -Features --------- -* Statically or dynamically allocated queue control blocks. -* Number of queues limited only by the amount of RAM available on the mcu. - -File Structure --------------- -r_byteq -| readme.txt -| r_byteq_if.h -| -+---doc -| r01an1683jj{VERSION_NUMBER}_rx.pdf -| -+---ref -| r_byteq_config_reference.h -| -+---src - r_byteq.c - r_byteq_private.h - -r_config - r_byteq_config.h - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_byteq/ref/r_byteq_config_reference.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_byteq/ref/r_byteq_config_reference.h deleted file mode 100644 index 907d2379240..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_byteq/ref/r_byteq_config_reference.h +++ /dev/null @@ -1,59 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_byteq_config.h -* Description : Configures the byte queue memory allocation -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 24.07.2013 1.00 Initial Release -* : 11.21.2014 1.20 Removed dependency to BSP -* : 30.09.2015 1.50 Added dependency to BSP -***********************************************************************************************************************/ -#ifndef BYTEQ_CONFIG_H -#define BYTEQ_CONFIG_H - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - Available settings: - BSP_CFG_PARAM_CHECKING_ENABLE: - Utilizes the system default setting - 1: - Includes parameter checking - 0: - Compiles out parameter checking -*/ -#define BYTEQ_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY IF SHOULD USE MALLOC() TO ALLOCATE MEMORY FOR QUEUE CONTROL BLOCKS */ -#define BYTEQ_CFG_USE_HEAP_FOR_CTRL_BLKS (0) - -/* SPECIFY NUMBER OF STATIC QUEUE CONTROL BLOCKS TO SUPPORT */ -/* valid only when BYTEQ_USE_HEAP_FOR_CTRL_BLKS is set to 0 */ -#define BYTEQ_CFG_MAX_CTRL_BLKS (4) - - -#endif /* BYTEQ_CONFIG_H */ diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_byteq/src/r_byteq.c b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_byteq/src/r_byteq.c deleted file mode 100644 index 2bcbbd66812..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_byteq/src/r_byteq.c +++ /dev/null @@ -1,419 +0,0 @@ -/***************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2016 Renesas Electronics Corporation. All rights reserved. -******************************************************************************/ -/***************************************************************************** -* File Name : r_byteq.c -* Description : Functions for using byte queues/circular buffers. -****************************************************************************** -* History : DD.MM.YYYY Version Description -* : 24.07.2013 1.00 Initial Release -* : 11.21.2014 1.20 Removed dependency to BSP -* : 30.09.2015 1.50 Added dependency to BSP -* : 29.01.2016 1.60 Fixed the initial setting process in the R_LONGQ_Open function. -* : Fixed a program according to the Renesas coding rules. -******************************************************************************/ - -/***************************************************************************** -Includes , "Project Includes" -******************************************************************************/ -/* Used functions of malloc() and the free() */ -#include - -/* Used the common type */ -#include "platform.h" - -/* Defines for BYTEQ support */ -#include "r_byteq_private.h" -#include "r_byteq_if.h" -#include "r_byteq_config.h" - -/***************************************************************************** -Typedef definitions -******************************************************************************/ - -/***************************************************************************** -Macro definitions -******************************************************************************/ - -/***************************************************************************** -Private global variables and functions -******************************************************************************/ - -/* QUEUE CONTROL BLOCK ALLOCATIONS */ - -#if BYTEQ_CFG_USE_HEAP_FOR_CTRL_BLKS == 0 -static byteq_ctrl_t g_qcb[BYTEQ_CFG_MAX_CTRL_BLKS]; -#endif - - -/***************************************************************************** -* Function Name: R_BYTEQ_Open -* Description : Allocates or assigns a queue control block for the buffer -* pointed to by p_buf (see BYTEQ_CFG_USE_HEAP_FOR_CTRL_BLKS in -* config.h). Initializes the queue to an empty state and -* provides a Handle to its control structure in p_hdl which is -* then used as a queue ID for the other API functions. -* Arguments : p_buf - -* Pointer to byte buffer. -* size - -* Buffer size in bytes. -* p_hdl - -* Pointer to a handle for queue (value set here) -* Return Value : SCI_SUCCESS - -* queue initialized successfully -* BYTEQ_ERR_NULL_PTR -* received null ptr; missing required argument -* BYTEQ_ERR_INVALID_ARG -* argument is not valid for parameter -* BYTEQ_ERR_MALLOC_FAIL -* can't allocate memory for ctrl block; increase heap -* BYTEQ_ERR_NO_MORE_CTRL_BLKS -* no more control blocks, increase BYTEQ_CFG_MAX_CTRL_BLKS -******************************************************************************/ -byteq_err_t R_BYTEQ_Open(uint8_t * const p_buf, - uint16_t const size, - byteq_hdl_t * const p_hdl) -{ - byteq_ctrl_t *p_qcb = 0; -#if BYTEQ_CFG_USE_HEAP_FOR_CTRL_BLKS == 0 - uint32_t i; - static bool qcb_init = false; -#endif - - /* CHECK ARGUMENTS */ - -#if (BYTEQ_CFG_PARAM_CHECKING_ENABLE == 1) - if (NULL == p_hdl) - { - return BYTEQ_ERR_INVALID_ARG; // return if invalid location - } - if (NULL == p_buf) - { - return BYTEQ_ERR_NULL_PTR; // return if no buffer pointer - } - if (size < 2) - { - return BYTEQ_ERR_INVALID_ARG; // return insufficient buffer size - } -#endif - - /* GET QUEUE CONTROL BLOCK */ - -#if BYTEQ_CFG_USE_HEAP_FOR_CTRL_BLKS - - /* allocate memory for a QCB */ - p_qcb = (byteq_ctrl_t *)malloc(sizeof(byteq_ctrl_t)); - if (NULL == p_qcb) - { - return BYTEQ_ERR_MALLOC_FAIL; - } -#else - /* if first Open call, mark all QCBs as being available */ - if (false == qcb_init) - { - for (i=0; i < BYTEQ_CFG_MAX_CTRL_BLKS; i++) - { - g_qcb[i].buffer = NULL; - } - qcb_init = true; - } - - /* locate first available QCB */ - for (i=0; i < BYTEQ_CFG_MAX_CTRL_BLKS; i++) - { - if (NULL == g_qcb[i].buffer) - { - p_qcb = &g_qcb[i]; - break; - } - } - - /* return error if none available */ - if (BYTEQ_CFG_MAX_CTRL_BLKS == i) - { - return BYTEQ_ERR_NO_MORE_CTRL_BLKS; - } -#endif - - - /* INITIALIZE QCB FIELDS */ - - p_qcb->buffer = p_buf; - p_qcb->size = size; - p_qcb->count = 0; - p_qcb->in_index = 0; - p_qcb->out_index = 0; - - - /* SET HANDLE */ - - *p_hdl = p_qcb; - return BYTEQ_SUCCESS; -} - - -/***************************************************************************** -* Function Name: R_BYTEQ_Put -* Description : This function adds a byte of data to the queue. -* -* NOTE: This function does not disable/enable interrupts. If the queue is -* accessed from both the interrupt and application level, the app must -* disable/enable interrupts before/after calling this routine. -* -* Arguments : hdl - -* Handle for queue. -* byte - -* Byte to add to queue. -* Return Value : BYTEQ_SUCCESS - -* Successful; byte sent or queued for transmit -* BYTEQ_ERR_NULL_PTR - -* hdl is NULL -* BYTEQ_ERR_QUEUE_FULL - -* Queue full; cannot add byte to queue. -******************************************************************************/ -byteq_err_t R_BYTEQ_Put(byteq_hdl_t const hdl, - uint8_t const byte) -{ -#if (BYTEQ_CFG_PARAM_CHECKING_ENABLE == 1) - if (NULL == hdl) - { - return BYTEQ_ERR_NULL_PTR; // return if no handle - } -#endif - - if (hdl->count >= hdl->size) - { - return BYTEQ_ERR_QUEUE_FULL; // return if queue is full - } - - /* load byte into queue */ - hdl->buffer[hdl->in_index++] = byte; // add byte - if (hdl->in_index >= hdl->size) // adjust index - { - hdl->in_index = 0; - } - hdl->count++; // adjust count - - return BYTEQ_SUCCESS; -} - - -/***************************************************************************** -* Function Name: R_BYTEQ_Get -* Description : This function removes a byte of data from the queue. -* -* NOTE: This function does not disable/enable interrupts. If the queue is -* accessed from both the interrupt and application level, the app must -* disable/enable interrupts before/after calling this routine. -* -* Arguments : hdl - -* Handle for queue. -* p_byte - -* Pointer to load byte to. -* Return Value : BYTEQ_SUCCESS - -* Successful; byte sent or queued for transmit -* BYTEQ_ERR_NULL_PTR - -* hdl is NULL -* BYTEQ_ERR_INVALID_ARG - -* p_byte is NULL -* BYTEQ_ERR_QUEUE_EMPTY - -* Queue empty; no data available to fetch -******************************************************************************/ -byteq_err_t R_BYTEQ_Get(byteq_hdl_t const hdl, - uint8_t * const p_byte) -{ -#if (BYTEQ_CFG_PARAM_CHECKING_ENABLE == 1) - if (NULL == hdl) - { - return BYTEQ_ERR_NULL_PTR; // return if no handle - } - if (NULL == p_byte) - { - return BYTEQ_ERR_INVALID_ARG; // return if invalid location - } -#endif - - if (0 == hdl->count) - { - return BYTEQ_ERR_QUEUE_EMPTY; // return if queue empty - } - - *p_byte = hdl->buffer[hdl->out_index++]; // get byte - if (hdl->out_index >= hdl->size) // adjust index - { - hdl->out_index = 0; - } - hdl->count--; // adjust count - - return BYTEQ_SUCCESS; -} - - -/***************************************************************************** -* Function Name: R_BYTEQ_Flush -* Description : This function resets a queue to an empty state. -* -* NOTE: This function does not disable/enable interrupts. If the queue is -* accessed from both the interrupt and application level, the app must -* disable/enable interrupts before/after calling this routine. -* -* Arguments : hdl - -* Handle for queue. -* Return Value : BYTEQ_SUCCESS - -* Successful; queue is reset to en ampty state -* BYTEQ_ERR_NULL_PTR - -* hdl is NULL -******************************************************************************/ -byteq_err_t R_BYTEQ_Flush(byteq_hdl_t const hdl) -{ -#if (BYTEQ_CFG_PARAM_CHECKING_ENABLE == 1) - if (NULL == hdl) - { - return BYTEQ_ERR_NULL_PTR; - } -#endif - - /* RESET QUEUE */ - - hdl->in_index = 0; - hdl->out_index = 0; - hdl->count = 0; - - return BYTEQ_SUCCESS; -} - - -/***************************************************************************** -* Function Name: R_BYTEQ_Used -* Description : This function provides the number of data bytes in the queue. -* Arguments : hdl - -* Handle for queue. -* p_cnt - -* Pointer to load queue data count to. -* Return Value : BYTEQ_SUCCESS - -* Successful; *p_cnt loaded with number of bytes in queue -* BYTEQ_ERR_NULL_PTR - -* hdl is NULL -* BYTEQ_ERR_INVALID_ARG - -* p_cnt is NULL -******************************************************************************/ -byteq_err_t R_BYTEQ_Used(byteq_hdl_t const hdl, - uint16_t * const p_cnt) -{ -#if (BYTEQ_CFG_PARAM_CHECKING_ENABLE == 1) - if (NULL == hdl) - { - return BYTEQ_ERR_NULL_PTR; - } - if (NULL == p_cnt) - { - return BYTEQ_ERR_INVALID_ARG; // return if invalid location - } -#endif - - *p_cnt = hdl->count; - return BYTEQ_SUCCESS; -} - - -/***************************************************************************** -* Function Name: R_BYTEQ_Unused -* Description : This function provides the number of data bytes available -* for storage in the queue. -* Arguments : hdl - -* Handle for queue. -* p_cnt - -* Pointer to load queue unused byte count to. -* Return Value : BYTEQ_SUCCESS - -* Successful; *p_cnt loaded with number of bytes available in -* queue -* BYTEQ_ERR_NULL_PTR - -* hdl is NULL -* BYTEQ_ERR_INVALID_ARG - -* p_cnt is NULL -******************************************************************************/ -byteq_err_t R_BYTEQ_Unused(byteq_hdl_t const hdl, - uint16_t * const p_cnt) -{ -#if (BYTEQ_CFG_PARAM_CHECKING_ENABLE == 1) - if (NULL == hdl) - { - return BYTEQ_ERR_NULL_PTR; - } - if (NULL == p_cnt) - { - return BYTEQ_ERR_INVALID_ARG; // return if invalid location - } -#endif - - *p_cnt = (uint16_t) (hdl->size - hdl->count); - return BYTEQ_SUCCESS; -} - - -/***************************************************************************** -* Function Name: R_BYTEQ_Close -* Description : If the control block associated with this Handle was allocated -* dynamically at run time (BYTEQ_CFG_USE_HEAP_FOR_CTRL_BLKS set to 1 -* in config.h), then that memory is free()d by this function. If -* the control block was statically allocated at compile time -* (BYTEQ_CFG_USE_HEAP_FOR_CTRL_BLKS set to 0 in config.h), then this -* function marks the control block as available for use by another -* buffer. Nothing is done to the contents of the buffer referenced -* by this Handle. -* Arguments : hdl - -* handle for queue -* Return Value : BYTEQ_SUCCESS - -* Successful; control block freed -* BYTEQ_ERR_NULL_PTR - -* hdl is NULL. -******************************************************************************/ -byteq_err_t R_BYTEQ_Close(byteq_hdl_t const hdl) -{ -#if (BYTEQ_CFG_PARAM_CHECKING_ENABLE == 1) - if (NULL == hdl) - { - return BYTEQ_ERR_NULL_PTR; - } -#endif - -#if BYTEQ_CFG_USE_HEAP_FOR_CTRL_BLKS - free(hdl); // free QCB memory -#else - hdl->buffer = NULL; // mark QCB as free -#endif - - return BYTEQ_SUCCESS; -} - - -/***************************************************************************** -* Function Name: R_BYTEQ_GetVersion -* Description : Returns the version of this module. The version number is -* encoded such that the top two bytes are the major version -* number and the bottom two bytes are the minor version number. -* Arguments : none -* Return Value : version number -******************************************************************************/ -R_ATTRIB_INLINE -uint32_t R_BYTEQ_GetVersion(void) -{ - - uint32_t const version = (BYTEQ_VERSION_MAJOR << 16) | BYTEQ_VERSION_MINOR; - return version; -} diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_byteq/src/r_byteq_private.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_byteq/src/r_byteq_private.h deleted file mode 100644 index 7686b17f7b2..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_byteq/src/r_byteq_private.h +++ /dev/null @@ -1,58 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_private.h -* Description : Definitions internal to byte queue module -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 24.07.2013 1.0 Initial Release -* : 30.09.2015 1.50 Added dependency to BSP -***********************************************************************************************************************/ - -#ifndef BYTEQ_PRIVATE_H -#define BYTEQ_PRIVATE_H - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -#include "platform.h" - - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - - -/***************************************************************************** -Typedef definitions -******************************************************************************/ - -/* QUEUE CONTROL BLOCK */ - -typedef struct st_byteq_ctrl // Byte Queue Control Block (for handle) -{ - uint8_t *buffer; // pointer to buffer - uint16_t size; // buffer size - uint16_t count; // number data bytes in queue - uint16_t in_index; // index used by Put function to add data - uint16_t out_index; // index used by Get function to remove data -} byteq_ctrl_t; - - -#endif /* BYTEQ_PRIVATE_H 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zO9^08KaA7!HHW0*cdEhS$7I}*x{pekwGnSzhFqgLLHvoPL<5m$!9>rk;weK25f2_W zscD^zR4CSF19+FsUJuJoQ{~~nG{b_zge3*55$%%-`fN9IG&xEbS`0{aRc||br+@3X zI?7eOB2>jrJ}&MT%N#7#EvZ-ke9F*hfCLSgW3*3WFggK6^y^yWhMn`g^eCq?ALmWC ze@B!nIJ;~ijuf=m=O}o87snrst8_S-<`f7Hfm&PKm${8njA7*q*pzKZiVWLt0|lMf ziNS7Z%TEio0Rfwk66fG;M1lJJTlg9O1%UfckgbBDqpi~)IIgh0jf<_F69Fr|f}^R4 zrLnWUBLO25A0NG_ow4Ij2WJ9SREx=`Ui$j>AzcM?5u3`O7`~uHHCj-g_SKmO#ks3(?9#vbnz|sdi>k0&5edZ7@FFNR5a7n1m9h~5rKJH{D?%iKSQ`L`V(W^G zqp%YBGlZyOL^vQt8-$8N149wUCX`4p#QP2F362QOy}Q1*?{GBHcD(gIIrQt(Nd06R zaZpi(0;Amxdw+c>KNcS|MFx8_uFj=s?|kS5lwN$^- zqoh>@{`Dy^BB#PfsRK9cAZB10=6S7G$!6l-qW|A7q>SkZ32GxOT6CZM_IZKWUB;ij , "Project Includes" - ***********************************************************************************************************************/ - #include - - #include "platform.h" - - #include "r_ether_rx_config.h" - #include "src/phy/phy.h" - -/*********************************************************************************************************************** - Macro definitions - ***********************************************************************************************************************/ -/* Version Number of API. */ - #define ETHER_RX_VERSION_MAJOR (1) - #define ETHER_RX_VERSION_MINOR (13) - -/* When using the Read functions, ETHER_NO_DATA is the return value that indicates that no received data. */ - #define ETHER_NO_DATA (0) - -/* The value of flag which indicates that the interrupt of Ethernet occur. */ - #define ETHER_FLAG_OFF (0) - #define ETHER_FLAG_ON (1) - #define ETHER_FLAG_ON_LINK_ON (3) - #define ETHER_FLAG_ON_LINK_OFF (2) - -/* Channel definition of Ethernet */ - #define ETHER_CHANNEL_0 (0) - #define ETHER_CHANNEL_1 (1) - - #if (defined(BSP_MCU_RX63N) || defined(BSP_MCU_RX65N)) - #define ETHER_CHANNEL_MAX (1) - #elif (defined(BSP_MCU_RX64M) || defined(BSP_MCU_RX71M)) - #define ETHER_CHANNEL_MAX (2) - #endif - -/*********************************************************************************************************************** - Typedef definitions - ***********************************************************************************************************************/ -/* ETHER API error codes */ -typedef enum -{ - ETHER_SUCCESS = 0, /* Processing completed successfully */ - ETHER_ERR_INVALID_PTR = -1, /* Value of the pointer is NULL or FIT_NO_PTR */ - ETHER_ERR_INVALID_DATA = -2, /* Value of the argument is out of range */ - ETHER_ERR_INVALID_CHAN = -3, /* Nonexistent channel number */ - ETHER_ERR_INVALID_ARG = -4, /* Invalid argument */ - - ETHER_ERR_LINK = -5, /* Auto-negotiation is not completed, and transmission/reception is not - enabled. */ - ETHER_ERR_MPDE = -6, /* As a Magic Packet is being detected, and transmission/reception is not - enabled. */ - ETHER_ERR_TACT = -7, /* Transmit buffer is not empty. */ - ETHER_ERR_CHAN_OPEN = -8, /* Indicates the Ethernet cannot be opened because it is being used - by another application */ - ETHER_ERR_MC_FRAME = -9, /* Detect multicast frame when multicast frame filtering enable */ - ETHER_ERR_RECV_ENABLE = -10, /* Enable receive function in ETHERC */ - ETHER_ERR_OTHER = -11 /* Other error */ -} ether_return_t; - -/* Event code of callback function */ -typedef enum -{ - ETHER_CB_EVENT_ID_WAKEON_LAN, /* Magic packet detection */ - ETHER_CB_EVENT_ID_LINK_ON, /* Link up detection */ - ETHER_CB_EVENT_ID_LINK_OFF, /* Link down detection */ -} ether_cb_event_t; - -/* Structure of the callback function pointer */ -typedef struct -{ - void (*pcb_func) (void *); /* Callback function pointer */ - void (*pcb_int_hnd) (void*); /* Interrupt handler function pointer */ -} ether_cb_t; - -/* Structure to be used when decoding the argument of the callback function */ -typedef struct -{ - uint32_t channel; /* ETHERC channel */ - ether_cb_event_t event_id; /* Event code for callback function */ - uint32_t status_ecsr; /* ETHERC status register for interrupt handler */ - uint32_t status_eesr; /* ETHERC/EDMAC status register for interrupt handler */ -} ether_cb_arg_t; - -/* Parameters of the control function (1st argument) */ -typedef enum -{ - CONTROL_SET_CALLBACK, /* Callback function registration */ - CONTROL_SET_PROMISCUOUS_MODE, /* Promiscuous mode setting */ - CONTROL_SET_INT_HANDLER, /* Interrupt handler function registration */ - CONTROL_POWER_ON, /* Cancel ETHERC/EDMAC module stop */ - CONTROL_POWER_OFF, /* Transition to ETHERC/EDMAC module stop */ - CONTROL_MULTICASTFRAME_FILTER, /* Multicast frame filter setting*/ - CONTROL_BROADCASTFRAME_FILTER /* Broadcast frame filter setting*/ -} ether_cmd_t; - -typedef enum -{ - ETHER_PROMISCUOUS_OFF, /* ETHERC operates in standard mode */ - ETHER_PROMISCUOUS_ON /* ETHERC operates in promiscuous mode */ -} ether_promiscuous_bit_t; - -typedef enum -{ - ETHER_MC_FILTER_OFF, /* Multicast frame filter disable */ - ETHER_MC_FILTER_ON /* Multicast frame filter enable */ -} ether_mc_filter_t; - -typedef struct -{ - uint32_t channel; /* ETHERC channel */ - ether_promiscuous_bit_t bit; /* Promiscuous mode */ -} ether_promiscuous_t; - -typedef struct -{ - uint32_t channel; /* ETHERC channel */ - ether_mc_filter_t flag; /* Multicast frame filter */ -} ether_multicast_t; - -typedef struct -{ - uint32_t channel; /* ETHERC channel */ - uint32_t counter; /* Continuous reception number of Broadcast frame */ -} ether_broadcast_t; - -/* Parameters of the control function (2nd argument) */ -typedef union -{ - ether_cb_t ether_callback; /* Callback function pointer */ - ether_promiscuous_t * p_ether_promiscuous; /* Promiscuous mode setting */ - ether_cb_t ether_int_hnd; /* Interrupt handler function pointer */ - uint32_t channel; /* ETHERC channel number */ - ether_multicast_t * p_ether_multicast; /* Multicast frame filter setting */ - ether_broadcast_t * p_ether_broadcast; /* Broadcast frame filter setting */ -} ether_param_t; - -/*********************************************************************************************************************** - Exported global variables - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global functions (to be accessed by other files) - ***********************************************************************************************************************/ -void R_ETHER_Initial (void); -ether_return_t R_ETHER_Open_ZC2 (uint32_t channel, const uint8_t mac_addr[], uint8_t pause); -ether_return_t R_ETHER_Close_ZC2 (uint32_t channel); -int32_t R_ETHER_Read (uint32_t channel, void *pbuf); -int32_t R_ETHER_Read_ZC2 (uint32_t channel, void **pbuf); -int32_t R_ETHER_Read_ZC2_BufRelease (uint32_t channel); -ether_return_t R_ETHER_Write (uint32_t channel, void *pbuf, uint32_t len); -ether_return_t R_ETHER_Write_ZC2_GetBuf (uint32_t channel, void **pbuf, uint16_t *pbuf_size); -ether_return_t R_ETHER_Write_ZC2_SetBuf (uint32_t channel, const uint32_t len); -ether_return_t R_ETHER_CheckLink_ZC (uint32_t channel); -void R_ETHER_LinkProcess (uint32_t channel); -ether_return_t R_ETHER_WakeOnLAN (uint32_t channel); -ether_return_t R_ETHER_CheckWrite (uint32_t channel); -ether_return_t R_ETHER_Control (ether_cmd_t const cmd, ether_param_t const control); -uint32_t R_ETHER_GetVersion (void); - -#endif /* R_ETHER_RX_IF_H*/ diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/readme.txt b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/readme.txt deleted file mode 100644 index 7b873f7fe26..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/readme.txt +++ /dev/null @@ -1,109 +0,0 @@ -PLEASE REFER TO THE APPLICATION NOTE FOR THIS MIDDLEWARE FOR MORE INFORMATION - -r_ether_rx -========== - -Document Number ---------------- -R01AN2009EJ0113 (English version) -R01AN2009JJ0113 (Japanese version) - -Version -------- -v1.13 - -Overview --------- -The Ethernet FIT module uses an Ethernet controller (ETHERC) and an Ethernet controller DMA controller (EDMAC) -to implement Ethernet/IEEE 802.3 frame transmission and reception. This module supports the following functions. - MII (Media Independent Interface) and RMII (Reduced Media Independent Interface) - An automatic negotiating function is used for the Ethernet PHY-LSI link. - The link state is detected using the link signals output by the Ethernet PHY-LSI. - The result of the automatic negotiation is acquired from the Ethernet PHY-LSI and the connection mode (full or half -duplex, 10 or 100 Mbps transfer rate) is set in the ETHERC. -This driver is tested and works with the following toolchain: - Renesas RX Toolchain v.2.07.00 -All API calls and their supporting interface definitions are located in r_ether_rx_if.h. - -Features --------- -* Ethernet/IEEE 802.3 frame transmission and reception. - -Supported MCUs --------------- -* RX63N Group -* RX65N Group -* RX64M Group -* RX71M Group - -Boards Tested On ----------------- -* RSKRX63N -* RSKRX65N -* RSKRX65N_2MB -* RSKRX64M -* RSKRX71M - -Limitations ------------ -* None - -Peripherals Used Directly -------------------------- -* ETHERC -* EDMAC - -Required Packages ------------------ -* r_bsp - -How to add to your project --------------------------- -Please refer to the Adding Firmware Integration Technology Modules to Projects. -"r01an1723eu0121_rx.pdf/r01an1826ej0110_rx.pdf"(Only English version) -"r01an1723ju0121_rx.pdf/r01an1826jj0110_rx.pdf"(Only Japanese version) - - -Toolchain(s) Used ------------------ -* Renesas RX v2.07.00 - -File Structure --------------- -r_ether_rx -| readme.txt -| r_ether_rx_if.h -| -+---doc -| | -| +---en -| | r01an2009ej0113-rx-ether.pdf -| | -| \---ja -| r01an2009jj0113-rx-ether.pdf -| -+---ref -| r_ether_config_reference.h -| -\---src - | r_ether_rx.c - | r_ether_rx_private.h - | - +---phy - | phy.c - | phy.h - | - \---targets - | - | - +---rx64m - | r_ether_setting_rx64m.c - | - +---rx71m - | r_ether_setting_rx71m.c - | - +---rx63n - | r_ether_setting_rx63n.c - | - \---rx65n - r_ether_setting_rx65n.c diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/ref/r_ether_rx_config_reference.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/ref/r_ether_rx_config_reference.h deleted file mode 100644 index c2d2cb8f78c..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/ref/r_ether_rx_config_reference.h +++ /dev/null @@ -1,117 +0,0 @@ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_ether_rx_config.h - * Version : 1.03 - * Description : Ethernet module device driver - ***********************************************************************************************************************/ -/********************************************************************************************************************** - * History : DD.MM.YYYY Version Description - * : 22.07.2014 1.00 First Release - * : 31.03.2016 1.01 Added changes for RX63N. - * : 01.10.2016 1.02 Added changes for RX65N. - * : 01.10.2017 1.03 Added changes for RX65N-2MB. - ***********************************************************************************************************************/ - -/* Guards against multiple inclusion */ -#ifndef R_ETHER_RX_CONFIG_H - #define R_ETHER_RX_CONFIG_H - -/*********************************************************************************************************************** - Macro definitions - ***********************************************************************************************************************/ - -/* Ethernet interface select. - 0 = MII (Media Independent Interface) - 1 = RMII (Reduced Media Independent Interface) - */ - #define ETHER_CFG_MODE_SEL (0) - -/* PHY-LSI address setting for ETHER0/1. - Please set the value 31 ETHER_CFG_CH0_PHY_ADDRESS when use default setting of the RSK+RX63N. - Please set the value 30 ETHER_CFG_CH0_PHY_ADDRESS when use default setting of the RSK+RX65N/RSK+RX65N_2MB. - Please set the value 0 ETHER_CFG_CH0_PHY_ADDRESS and value 1 ETHER_CFG_CH1_PHY_ADDRESS when use default setting of the RSK+RX64M/RSK+RX71M. - */ - #define ETHER_CFG_CH0_PHY_ADDRESS (0) /* Please define the PHY-LSI address in the range of 0-31. */ - #define ETHER_CFG_CH1_PHY_ADDRESS (1) /* Please define the PHY-LSI address in the range of 0-31. */ - -/* The number of Rx descriptors. */ - #define ETHER_CFG_EMAC_RX_DESCRIPTORS (1) - -/* The number of Tx descriptors. */ - #define ETHER_CFG_EMAC_TX_DESCRIPTORS (1) - -/* Please define the size of the sending and receiving buffer in the value where one frame can surely be stored - because the driver is single-frame/single-buffer processing. */ - #define ETHER_CFG_BUFSIZE (1536) /* Must be 32-byte aligned */ - -/* EINT interrupt priority level. This definition is not used when EINT interrupt is assigned to Group interrupt. */ - #define ETHER_CFG_EINT_INT_PRIORITY (2) /* Please define the interruption level within the range of 1-15. */ - -/* Group AL1 interrupt priority level. This definition is not used when EINT interrupt is assigned to Peripheral - interrupt. */ - #define ETHER_CFG_AL1_INT_PRIORTY (2) /* Please define the interruption level within the range of 1-15. */ - -/* The register bus of PHY0/1 for ETHER0/1 select - 0 = The access of the register of PHY uses ETHER0. - 1 = The access of the register of PHY uses ETHER1. - - Please set the value 0 ETHER_CFG_CH0_PHY_ACCESS when use default setting of the RSK+RX63N. - Please set the value 0 ETHER_CFG_CH0_PHY_ACCESS when use default setting of the RSK+RX65N/RSK+RX65N_2MB. - Please set the value 1 ETHER_CFG_CH0_PHY_ACCESS and ETHER_CFG_CH1_PHY_ACCESS when use default setting of the RSK+RX64M/RSK+RX71M. - */ - #define ETHER_CFG_CH0_PHY_ACCESS (1) - #define ETHER_CFG_CH1_PHY_ACCESS (1) - -/* Define the access timing of MII/RMII register */ - #define ETHER_CFG_PHY_MII_WAIT (8) /* Plese define the value of 8 or more */ - -/* Define the waiting time for reset completion of PHY-LSI */ - #define ETHER_CFG_PHY_DELAY_RESET (0x00020000L) - -/** - * Link status read from LMON bit of ETHERC PSR register. The state is hardware dependent. - */ - #define ETHER_CFG_LINK_PRESENT (0) - -/* Use LINKSTA signal for detect link status changes - 0 = unused (use PHY-LSI status register) - 1 = use (use LINKSTA signal) - */ - #define ETHER_CFG_USE_LINKSTA (1) /* This setting is reflected in all channels */ - -/* Definition of whether or not to use KSZ8041NL of the Micrel Inc. - 0 = unused - 1 = use - */ - #define ETHER_CFG_USE_PHY_KSZ8041NL (0) - -/*********************************************************************************************************************** - Typedef definitions - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global variables - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global functions (to be accessed by other files) - ***********************************************************************************************************************/ - -#endif /* R_ETHER_RX_CONFIG_H */ diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/src/phy/phy.c b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/src/phy/phy.c deleted file mode 100644 index eff3dfa2b62..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/src/phy/phy.c +++ /dev/null @@ -1,771 +0,0 @@ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : phy.c - * Version : 1.10 - * Description : Ethernet PHY device driver - ***********************************************************************************************************************/ -/********************************************************************************************************************** - * History : DD.MM.YYYY Version Description - * : 22.07.2014 1.00 First Release - * : 16.12.2014 1.01 Made changes related to header file include. - * : 29.01.2015 1.02 Correction of ETHER_CFG_USE_PHY_KSZ8041NL. - * : 31.03.2016 1.10 Added changes behavior of phy_get_link_status function depending on number of Ethernet channel. - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Includes , "Project Includes" - ***********************************************************************************************************************/ -#include - -/* Access to peripherals and board defines. */ -#include "platform.h" - -#include "r_ether_rx_config.h" -#include "src/r_ether_rx_private.h" -#include "src/phy/phy.h" - -/*********************************************************************************************************************** - Macro definitions - ***********************************************************************************************************************/ -/* Media Independent Interface */ -#define PHY_MII_ST (1) -#define PHY_MII_READ (2) -#define PHY_MII_WRITE (1) - -/* Standard PHY Registers */ -#define PHY_REG_CONTROL (0) -#define PHY_REG_STATUS (1) -#define PHY_REG_IDENTIFIER1 (2) -#define PHY_REG_IDENTIFIER2 (3) -#define PHY_REG_AN_ADVERTISEMENT (4) -#define PHY_REG_AN_LINK_PARTNER (5) -#define PHY_REG_AN_EXPANSION (6) - -/* Vendor Specific PHY Registers */ -#ifdef ETHER_CFG_USE_PHY_KSZ8041NL - #define PHY_REG_PHY_CONTROL_1 (0x1E) -#endif /* MICREL_KSZ8041NL */ - -/* Basic Mode Control Register Bit Definitions */ -#define PHY_CONTROL_RESET (1 << 15) -#define PHY_CONTROL_LOOPBACK (1 << 14) -#define PHY_CONTROL_100_MBPS (1 << 13) -#define PHY_CONTROL_AN_ENABLE (1 << 12) -#define PHY_CONTROL_POWER_DOWN (1 << 11) -#define PHY_CONTROL_ISOLATE (1 << 10) -#define PHY_CONTROL_AN_RESTART (1 << 9) -#define PHY_CONTROL_FULL_DUPLEX (1 << 8) -#define PHY_CONTROL_COLLISION (1 << 7) - -/* Basic Mode Status Register Bit Definitions */ -#define PHY_STATUS_100_T4 (1 << 15) -#define PHY_STATUS_100F (1 << 14) -#define PHY_STATUS_100H (1 << 13) -#define PHY_STATUS_10F (1 << 12) -#define PHY_STATUS_10H (1 << 11) -#define PHY_STATUS_AN_COMPLETE (1 << 5) -#define PHY_STATUS_RM_FAULT (1 << 4) -#define PHY_STATUS_AN_ABILITY (1 << 3) -#define PHY_STATUS_LINK_UP (1 << 2) -#define PHY_STATUS_JABBER (1 << 1) -#define PHY_STATUS_EX_CAPABILITY (1 << 0) - -/* Auto Negotiation Advertisement Bit Definitions */ -#define PHY_AN_ADVERTISEMENT_NEXT_PAGE (1 << 15) -#define PHY_AN_ADVERTISEMENT_RM_FAULT (1 << 13) -#define PHY_AN_ADVERTISEMENT_ASM_DIR (1 << 11) -#define PHY_AN_ADVERTISEMENT_PAUSE (1 << 10) -#define PHY_AN_ADVERTISEMENT_100_T4 (1 << 9) -#define PHY_AN_ADVERTISEMENT_100F (1 << 8) -#define PHY_AN_ADVERTISEMENT_100H (1 << 7) -#define PHY_AN_ADVERTISEMENT_10F (1 << 6) -#define PHY_AN_ADVERTISEMENT_10H (1 << 5) -#define PHY_AN_ADVERTISEMENT_SELECTOR (1 << 0) - -/* Auto Negotiate Link Partner Ability Bit Definitions */ -#define PHY_AN_LINK_PARTNER_NEXT_PAGE (1 << 15) -#define PHY_AN_LINK_PARTNER_ACK (1 << 14) -#define PHY_AN_LINK_PARTNER_RM_FAULT (1 << 13) -#define PHY_AN_LINK_PARTNER_ASM_DIR (1 << 11) -#define PHY_AN_LINK_PARTNER_PAUSE (1 << 10) -#define PHY_AN_LINK_PARTNER_100_T4 (1 << 9) -#define PHY_AN_LINK_PARTNER_100F (1 << 8) -#define PHY_AN_LINK_PARTNER_100H (1 << 7) -#define PHY_AN_LINK_PARTNER_10F (1 << 6) -#define PHY_AN_LINK_PARTNER_10H (1 << 5) -#define PHY_AN_LINK_PARTNER_SELECTOR (1 << 0) - -/*********************************************************************************************************************** - Typedef definitions - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global variables (to be accessed by other files) - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Private global variables and functions - ***********************************************************************************************************************/ -static uint16_t phy_read (uint32_t ether_channel, uint16_t reg_addr); -static void phy_write (uint32_t ether_channel, uint16_t reg_addr, uint16_t data); -static void phy_preamble (uint32_t ether_channel); -static void phy_reg_set (uint32_t ether_channel, uint16_t reg_addr, int32_t option); -static void phy_reg_read (uint32_t ether_channel, uint16_t *pdata); -static void phy_reg_write (uint32_t ether_channel, uint16_t data); -static void phy_trans_zto0 (uint32_t ether_channel); -static void phy_trans_1to0 (uint32_t ether_channel); -static void phy_mii_write1 (uint32_t ether_channel); -static void phy_mii_write0 (uint32_t ether_channel); -static int16_t phy_get_pir_address (uint32_t ether_channel, volatile uint32_t __evenaccess ** pppir_addr); - -static uint16_t local_advertise[ETHER_CHANNEL_MAX]; /* the capabilities of the local link as PHY data */ - -/** - * Public functions - */ - -/*********************************************************************************************************************** - * Function Name: phy_init - * Description : Resets Ethernet PHY device - * Arguments : ether_channel - - * Ethernet channel number - * Return Value : R_PHY_OK - - * - * R_PHY_ERROR - - * - ***********************************************************************************************************************/ -int16_t phy_init (uint32_t ether_channel) -{ - uint16_t reg; - uint32_t count; - - /* Reset PHY */ - phy_write(ether_channel, PHY_REG_CONTROL, PHY_CONTROL_RESET); - - count = 0; - - /* Reset completion waiting */ - do - { - reg = phy_read(ether_channel, PHY_REG_CONTROL); - count++; - } while ((reg & PHY_CONTROL_RESET) && (count < ETHER_CFG_PHY_DELAY_RESET)); - - if (count < ETHER_CFG_PHY_DELAY_RESET) - { - /* - * When KSZ8041NL of the Micrel, Inc. is used, - * the pin that outputs the state of LINK is used combinedly with ACTIVITY in default. - * The setting of the pin is changed so that only the state of LINK is output. - */ -#if ETHER_CFG_USE_PHY_KSZ8041NL != 0 - reg = phy_read(ether_channel, PHY_REG_PHY_CONTROL_1); - reg &= ~0x8000; - reg |= 0x4000; - phy_write(ether_channel, PHY_REG_PHY_CONTROL_1, reg); -#endif /* ETHER_CFG_USE_PHY_KSZ8041NL != 0 */ - - return R_PHY_OK; - } - - return R_PHY_ERROR; -} /* End of function phy_init() */ - -/*********************************************************************************************************************** - * Function Name: phy_start_autonegotiate - * Description : Starts auto-negotiate - * Arguments : ether_channel - - * Ethernet channel number - * pause - - * Using state of pause frames - * Return Value : none - ***********************************************************************************************************************/ -void phy_start_autonegotiate (uint32_t ether_channel, uint8_t pause) -{ - volatile uint16_t reg = 0; - - /* Set local ability */ - /* When pause frame is not used */ - if (ETHER_FLAG_OFF == pause) - { - local_advertise[ether_channel] = ((((PHY_AN_ADVERTISEMENT_100F | - PHY_AN_ADVERTISEMENT_100H) | - PHY_AN_ADVERTISEMENT_10F) | - PHY_AN_ADVERTISEMENT_10H) | - PHY_AN_ADVERTISEMENT_SELECTOR); - - } - - /* When pause frame is used */ - else - { - local_advertise[ether_channel] = ((((((PHY_AN_ADVERTISEMENT_ASM_DIR | - PHY_AN_ADVERTISEMENT_PAUSE) | - PHY_AN_ADVERTISEMENT_100F) | - PHY_AN_ADVERTISEMENT_100H) | - PHY_AN_ADVERTISEMENT_10F) | - PHY_AN_ADVERTISEMENT_10H) | - PHY_AN_ADVERTISEMENT_SELECTOR); - } - - /* Configure what the PHY and the Ethernet controller on this board supports */ - phy_write(ether_channel, PHY_REG_AN_ADVERTISEMENT, local_advertise[ether_channel]); - phy_write(ether_channel, PHY_REG_CONTROL, (PHY_CONTROL_AN_ENABLE | - PHY_CONTROL_AN_RESTART)); - - reg = phy_read(ether_channel, PHY_REG_AN_ADVERTISEMENT); - -} /* End of function phy_start_autonegotiate() */ - -/*********************************************************************************************************************** - * Function Name: phy_set_autonegotiate - * Description : reports the other side's physical capability - * Arguments : ether_channel - - * Ethernet channel number - * : *pline_speed_duplex - - * a pointer to the location of both the line speed and the duplex - * *plocal_pause - - * a pointer to the location to store the local pause bits. - * *ppartner_pause - - * a pointer to the location to store the partner pause bits. - * Return Value : R_PHY_OK - - * - * R_PHY_ERROR - - * - * Note : The value returned to local_pause and patner_pause is used - * as it is as an argument of ether_pause_resolution function. - ***********************************************************************************************************************/ -int16_t phy_set_autonegotiate (uint32_t ether_channel, uint16_t *pline_speed_duplex, uint16_t *plocal_pause, - uint16_t *ppartner_pause) -{ - uint16_t reg; - - /* Because reading the first time shows the previous state, the Link status bit is read twice. */ - reg = phy_read(ether_channel, PHY_REG_STATUS); - reg = phy_read(ether_channel, PHY_REG_STATUS); - - /* When the link isn't up, return error */ - if (PHY_STATUS_LINK_UP != (reg & PHY_STATUS_LINK_UP)) - { - nop(); - return R_PHY_ERROR; - } - - /* Establish local pause capability */ - if (PHY_AN_ADVERTISEMENT_PAUSE == (local_advertise[ether_channel] & PHY_AN_ADVERTISEMENT_PAUSE)) - { - (*plocal_pause) |= (1 << 1); - } - - if (PHY_AN_ADVERTISEMENT_ASM_DIR == (local_advertise[ether_channel] & PHY_AN_ADVERTISEMENT_ASM_DIR)) - { - (*plocal_pause) |= 1; - } - - /* When the auto-negotiation isn't completed, return error */ - if (PHY_STATUS_AN_COMPLETE != (reg & PHY_STATUS_AN_COMPLETE)) - { - return R_PHY_ERROR; - } - else - { - /* Get the link partner response */ - reg = phy_read(ether_channel, PHY_REG_AN_LINK_PARTNER); - - /* Establish partner pause capability */ - if (PHY_AN_LINK_PARTNER_PAUSE == (reg & PHY_AN_LINK_PARTNER_PAUSE)) - { - (*ppartner_pause) = (1 << 1); - } - - if (PHY_AN_LINK_PARTNER_ASM_DIR == (reg & PHY_AN_LINK_PARTNER_ASM_DIR)) - { - (*ppartner_pause) |= 1; - } - - /* Establish the line speed and the duplex */ - if (PHY_AN_LINK_PARTNER_10H == (reg & PHY_AN_LINK_PARTNER_10H)) - { - (*pline_speed_duplex) = PHY_LINK_10H; - } - - if (PHY_AN_LINK_PARTNER_10F == (reg & PHY_AN_LINK_PARTNER_10F)) - { - (*pline_speed_duplex) = PHY_LINK_10F; - } - - if (PHY_AN_LINK_PARTNER_100H == (reg & PHY_AN_LINK_PARTNER_100H)) - { - (*pline_speed_duplex) = PHY_LINK_100H; - } - - if (PHY_AN_LINK_PARTNER_100F == (reg & PHY_AN_LINK_PARTNER_100F)) - { - (*pline_speed_duplex) = PHY_LINK_100F; - } - - return R_PHY_OK; - } -} /* End of function phy_set_autonegotiate() */ - -/*********************************************************************************************************************** - * Function Name: phy_get_link_status - * Description : Returns the status of the physical link - * Arguments : ether_channel - - * Ethernet channel number - * Return Value : -1 if links is down, 0 otherwise - ***********************************************************************************************************************/ -int16_t phy_get_link_status (uint32_t ether_channel) -{ - uint16_t reg; - - /* Because reading the first time shows the previous state, the Link status bit is read twice. */ - reg = phy_read(ether_channel, PHY_REG_STATUS); - reg = phy_read(ether_channel, PHY_REG_STATUS); - - /* When the link isn't up, return error */ - if (PHY_STATUS_LINK_UP != (reg & PHY_STATUS_LINK_UP)) - { - nop(); - - /* Link is down */ - return R_PHY_ERROR; - } - else - { - /* Link is up */ - return R_PHY_OK; - } -} /* End of function phy_get_link_status() */ - -/** - * Private functions - */ - -/*********************************************************************************************************************** - * Function Name: phy_read - * Description : Reads a PHY register - * Arguments : ether_channel - - * Ethernet channel number - * reg_addr - - * address of the PHY register - * Return Value : read value - ***********************************************************************************************************************/ -static uint16_t phy_read (uint32_t ether_channel, uint16_t reg_addr) -{ - uint16_t data; - - /* - * The value is read from the PHY register by the frame format of MII Management Interface provided - * for by Table 22-12 of 22.2.4.5 of IEEE 802.3-2008_section2. - */ - phy_preamble(ether_channel); - phy_reg_set(ether_channel, reg_addr, PHY_MII_READ); - phy_trans_zto0(ether_channel); - phy_reg_read(ether_channel, &data); - phy_trans_zto0(ether_channel); - - return (data); -} /* End of function phy_read() */ - -/*********************************************************************************************************************** - * Function Name: phy_write - * Description : Writes to a PHY register - * Arguments : ether_channel - - * Ethernet channel number - * reg_addr - - * address of the PHY register - * data - - * value - * Return Value : none - ***********************************************************************************************************************/ -static void phy_write (uint32_t ether_channel, uint16_t reg_addr, uint16_t data) -{ - /* - * The value is read from the PHY register by the frame format of MII Management Interface provided - * for by Table 22-12 of 22.2.4.5 of IEEE 802.3-2008_section2. - */ - phy_preamble(ether_channel); - phy_reg_set(ether_channel, reg_addr, PHY_MII_WRITE); - phy_trans_1to0(ether_channel); - phy_reg_write(ether_channel, data); - phy_trans_zto0(ether_channel); -} /* End of function phy_write() */ - -/*********************************************************************************************************************** - * Function Name: phy_preamble - * Description : As preliminary preparation for access to the PHY module register, - * "1" is output via the MII management interface. - * Arguments : ether_channel - - * Ethernet channel number - * Return Value : none - ***********************************************************************************************************************/ -static void phy_preamble (uint32_t ether_channel) -{ - int16_t i; - - /* - * The processing of PRE (preamble) about the frame format of MII Management Interface which is - * provided by "Table 22-12" of "22.2.4.5" of "IEEE 802.3-2008_section2". - */ - i = 32; - while (i > 0) - { - phy_mii_write1(ether_channel); - i--; - } -} /* End of function phy_preamble() */ - -/*********************************************************************************************************************** - * Function Name: phy_reg_set - * Description : Sets a PHY device to read or write mode - * Arguments : ether_channel - - * Ethernet channel number - * reg_addr - - * address of the PHY register - * option - - * mode - * Return Value : none - ***********************************************************************************************************************/ -static void phy_reg_set (uint32_t ether_channel, uint16_t reg_addr, int32_t option) -{ - int32_t i; - uint16_t data; - int8_t phy_acc_channel; - const ether_control_t * pether_control; - - /* - * The processing of ST (start of frame),OP (operation code), PHYAD (PHY Address), and - * REGAD (Register Address) about the frame format of MII Management Interface which is - * provided by "Table 22-12" of "22.2.4.5" of "IEEE 802.3-2008_section2". - */ - data = 0; - data = (PHY_MII_ST << 14); /* ST code */ - - if (PHY_MII_READ == option) - { - data |= (PHY_MII_READ << 12); /* OP code(RD) */ - } - else - { - data |= (PHY_MII_WRITE << 12); /* OP code(WT) */ - } - - phy_acc_channel = g_eth_control_ch[ether_channel].phy_access; - - pether_control = g_eth_control_ch[ether_channel].pether_control; - - data |= (uint16_t) (pether_control[phy_acc_channel].phy_address << 7); /* PHY Address */ - - data |= (reg_addr << 2); /* Reg Address */ - - i = 14; - while (i > 0) - { - if (0 == (data & 0x8000)) - { - phy_mii_write0(ether_channel); - } - else - { - phy_mii_write1(ether_channel); - } - data <<= 1; - i--; - } -} /* End of function phy_reg_set() */ - -/*********************************************************************************************************************** - * Function Name: phy_reg_read - * Description : Reads PHY register through MII interface - * Arguments : ether_channel - - * Ethernet channel number - * pdata - - * pointer to store the data read - * Return Value : none - ***********************************************************************************************************************/ -static void phy_reg_read (uint32_t ether_channel, uint16_t *pdata) -{ - int32_t i; - int32_t j; - uint16_t reg_data; - int16_t ret; - volatile uint32_t __evenaccess * petherc_pir; - - ret = phy_get_pir_address(ether_channel, &petherc_pir); - if ( R_PHY_ERROR == ret) - { - return; - } - - /* - * The processing of DATA (data) about reading of the frame format of MII Management Interface which is - * provided by "Table 22-12" of "22.2.4.5" of "IEEE 802.3-2008_section2". - */ - reg_data = 0; - i = 16; - while (i > 0) - { - for (j = ETHER_CFG_PHY_MII_WAIT; j > 0; j--) - { - (*petherc_pir) = 0x00000000; - } - - for (j = ETHER_CFG_PHY_MII_WAIT; j > 0; j--) - { - (*petherc_pir) = 0x00000001; - } - reg_data <<= 1; - - reg_data |= (uint16_t) (((*petherc_pir) & 0x00000008) >> 3); /* MDI read */ - - for (j = ETHER_CFG_PHY_MII_WAIT; j > 0; j--) - { - (*petherc_pir) = 0x00000001; - } - - for (j = ETHER_CFG_PHY_MII_WAIT; j > 0; j--) - { - (*petherc_pir) = 0x00000000; - } - - i--; - } - (*pdata) = reg_data; -} /* End of function phy_reg_read() */ - -/*********************************************************************************************************************** - * Function Name: phy_reg_write - * Description : Writes to PHY register through MII interface - * Arguments : ether_channel - - * Ethernet channel number - * data - - * value to write - * Return Value : none - ***********************************************************************************************************************/ -static void phy_reg_write (uint32_t ether_channel, uint16_t data) -{ - int32_t i; - - /* - * The processing of DATA (data) about writing of the frame format of MII Management Interface which is - * provided by "Table 22-12" of "22.2.4.5" of "IEEE 802.3-2008_section2". - */ - i = 16; - while (i > 0) - { - if (0 == (data & 0x8000)) - { - phy_mii_write0(ether_channel); - } - else - { - phy_mii_write1(ether_channel); - } - i--; - data <<= 1; - } -} /* End of function phy_reg_write() */ - -/*********************************************************************************************************************** - * Function Name: phy_trans_zto0 - * Description : Performs bus release so that PHY can drive data - * : for read operation - * Arguments : ether_channel - - * Ethernet channel number - * Return Value : none - ***********************************************************************************************************************/ -static void phy_trans_zto0 (uint32_t ether_channel) -{ - int32_t j; - int16_t ret; - volatile uint32_t __evenaccess * petherc_pir; - - ret = phy_get_pir_address(ether_channel, &petherc_pir); - if ( R_PHY_ERROR == ret) - { - return; - } - - /* - * The processing of TA (turnaround) about reading of the frame format of MII Management Interface which is - * provided by "Table 22-12" of "22.2.4.5" of "IEEE 802.3-2008_section2". - */ - for (j = ETHER_CFG_PHY_MII_WAIT; j > 0; j--) - { - (*petherc_pir) = 0x00000000; - } - - for (j = ETHER_CFG_PHY_MII_WAIT; j > 0; j--) - { - (*petherc_pir) = 0x00000001; - } - - for (j = ETHER_CFG_PHY_MII_WAIT; j > 0; j--) - { - (*petherc_pir) = 0x00000001; - } - - for (j = ETHER_CFG_PHY_MII_WAIT; j > 0; j--) - { - (*petherc_pir) = 0x00000000; - } - -} /* End of function phy_trans_zto0() */ - -/*********************************************************************************************************************** - * Function Name: phy_trans_1to0 - * Description : Switches data bus so MII interface can drive data - * : for write operation - * Arguments : ether_channel - - * Ethernet channel number - * Return Value : none - ***********************************************************************************************************************/ -static void phy_trans_1to0 (uint32_t ether_channel) -{ - /* - * The processing of TA (turnaround) about writing of the frame format of MII Management Interface which is - * provided by "Table 22-12" of "22.2.4.5" of "IEEE 802.3-2008_section2". - */ - phy_mii_write1(ether_channel); - phy_mii_write0(ether_channel); -} /* End of function phy_trans_1to0() */ - -/*********************************************************************************************************************** - * Function Name: phy_mii_write1 - * Description : Outputs 1 to the MII interface - * Arguments : ether_channel - - * Ethernet channel number - * Return Value : none - ***********************************************************************************************************************/ -static void phy_mii_write1 (uint32_t ether_channel) -{ - int32_t j; - int16_t ret; - volatile uint32_t __evenaccess * petherc_pir; - - ret = phy_get_pir_address(ether_channel, &petherc_pir); - if ( R_PHY_ERROR == ret) - { - return; - } - - /* - * The processing of one bit about frame format of MII Management Interface which is - * provided by "Table 22-12" of "22.2.4.5" of "IEEE 802.3-2008_section2". - * The data that 1 is output. - */ - for (j = ETHER_CFG_PHY_MII_WAIT; j > 0; j--) - { - (*petherc_pir) = 0x00000006; - } - - for (j = ETHER_CFG_PHY_MII_WAIT; j > 0; j--) - { - (*petherc_pir) = 0x00000007; - } - - for (j = ETHER_CFG_PHY_MII_WAIT; j > 0; j--) - { - (*petherc_pir) = 0x00000007; - } - - for (j = ETHER_CFG_PHY_MII_WAIT; j > 0; j--) - { - (*petherc_pir) = 0x00000006; - } - -} /* End of function phy_mii_write1() */ - -/*********************************************************************************************************************** - * Function Name: phy_mii_write0 - * Description : Outputs 0 to the MII interface - * Arguments : ether_channel - - * Ethernet channel number - * Return Value : none - ***********************************************************************************************************************/ -static void phy_mii_write0 (uint32_t ether_channel) -{ - int32_t j; - int16_t ret; - volatile uint32_t __evenaccess * petherc_pir; - - ret = phy_get_pir_address(ether_channel, &petherc_pir); - if ( R_PHY_ERROR == ret) - { - return; - } - - /* - * The processing of one bit about frame format of MII Management Interface which is - * provided by "Table 22-12" of "22.2.4.5" of "IEEE 802.3-2008_section2". - * The data that 0 is output. - */ - for (j = ETHER_CFG_PHY_MII_WAIT; j > 0; j--) - { - (*petherc_pir) = 0x00000002; - } - - for (j = ETHER_CFG_PHY_MII_WAIT; j > 0; j--) - { - (*petherc_pir) = 0x00000003; - } - - for (j = ETHER_CFG_PHY_MII_WAIT; j > 0; j--) - { - (*petherc_pir) = 0x00000003; - } - - for (j = ETHER_CFG_PHY_MII_WAIT; j > 0; j--) - { - (*petherc_pir) = 0x00000002; - } - -} /* End of function phy_mii_write0() */ - -/*********************************************************************************************************************** - * Function Name: phy_get_pir_address - * Description : Get the address of the PHY interface register. - * Arguments : ether_channel - - * Ethernet channel number - * pppir_addr - - * Pointer of the PHY interface register - * Return Value : none - ***********************************************************************************************************************/ -static int16_t phy_get_pir_address (uint32_t ether_channel, volatile uint32_t __evenaccess ** pppir_addr) -{ - const ether_control_t * pether_ch; - uint32_t phy_access; - volatile uint32_t __evenaccess * petherc_pir; - - if (ETHER_CHANNEL_MAX <= ether_channel) - { - return R_PHY_ERROR; - } - - pether_ch = g_eth_control_ch[ether_channel].pether_control; - phy_access = g_eth_control_ch[ether_channel].phy_access; - petherc_pir = pether_ch[phy_access].preg_pir; - - (*pppir_addr) = petherc_pir; - - return R_PHY_OK; -} /* End of function phy_get_pir_address() */ - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/src/phy/phy.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/src/phy/phy.h deleted file mode 100644 index 354fe5a3d44..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/src/phy/phy.h +++ /dev/null @@ -1,68 +0,0 @@ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : phy.h - * Version : 1.01 - * Description : Ethernet PHY device driver - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * History : DD.MM.YYYY Version Description - * : 22.07.2014 1.00 First Release - * : 16.12.2014 1.01 Deleted header file include. - ***********************************************************************************************************************/ - -/* Guards against multiple inclusion */ -#ifndef PHY_H - #define PHY_H - -/*********************************************************************************************************************** - Includes , "Project Includes" - ***********************************************************************************************************************/ - #include - -/*********************************************************************************************************************** - Macro definitions - ***********************************************************************************************************************/ -/* PHY return definitions */ - #define R_PHY_OK (0) - #define R_PHY_ERROR (-1) - -/*********************************************************************************************************************** - Typedef definitions - ***********************************************************************************************************************/ -typedef enum LinkStatE -{ - PHY_NO_LINK = 0, PHY_LINK_10H, PHY_LINK_10F, PHY_LINK_100H, PHY_LINK_100F -} linkstat_t; - -/*********************************************************************************************************************** - Exported global variables - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global functions (to be accessed by other files) - ***********************************************************************************************************************/ -int16_t phy_init (uint32_t channel); -void phy_start_autonegotiate (uint32_t channel, uint8_t pause); -int16_t phy_set_autonegotiate (uint32_t channel, uint16_t *pline_speed_duplex, uint16_t *plocal_pause, - uint16_t *ppartner_pause); -int16_t phy_get_link_status (uint32_t channel); - -#endif /* PHY_H */ - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/src/r_ether_rx.c b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/src/r_ether_rx.c deleted file mode 100644 index 1e886f4168f..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/src/r_ether_rx.c +++ /dev/null @@ -1,2581 +0,0 @@ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_ether_rx.c - * Version : 1.13 - * Description : Ethernet module device driver - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * History : DD.MM.YYYY Version Description - * : 22.07.2014 1.00 First Release - * : 16.12.2014 1.01 Made changes related to header file include. - * : 27.03.2015 1.02 Changed the R_ETHER_LinkProcess() Function - * : 31.03.2016 1.10 Added changes for MCU which have single channel Ethernet controller. - * : 01.10.2016 1.11 Added changes for RX65N. - * : 11.11.2016 1.12 The module is updated to fix the software issue. - * When R_ETHER_LinkProcess function is called, - * there are cases when link up/link down are not processed successfully. - * The issue occurs when ETHER_CFG_USE_LINKSTA is set to a value of 0. - * Corrected source code of the R_ETHER_Close_ZC2 function. - * Corrected source code of the R_ETHER_LinkProcess function. - * : 01.10.2017 1.13 Removed ether_clear_icu_source function in R_ETHER_Close_ZC2 function.. - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Includes , "Project Includes" - ***********************************************************************************************************************/ -#include -#include - -/* Access to peripherals and board defines. */ -#include "platform.h" - -#include "r_ether_rx_if.h" -#include "src/r_ether_rx_private.h" - -/*********************************************************************************************************************** - Macro definitions - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Typedef definitions - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global variables (to be accessed by other files) - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Private global variables and functions - ***********************************************************************************************************************/ - -/* - * Private global function prototypes - */ -static void ether_reset_mac (uint32_t channel); -static void ether_init_descriptors (uint32_t channel); -static void ether_config_ethernet (uint32_t channel, const uint8_t mode); -static void ether_pause_resolution (uint16_t local_ability, uint16_t partner_ability, uint16_t *ptx_pause, - uint16_t *prx_pause); -static void ether_configure_mac (uint32_t channel, const uint8_t mac_addr[], const uint8_t mode); -static ether_return_t ether_do_link (uint32_t channel, const uint8_t mode); -static ether_return_t ether_set_callback (ether_param_t const control); -static ether_return_t ether_set_promiscuous_mode (ether_param_t const control); -static ether_return_t ether_set_int_handler (ether_param_t const control); -static ether_return_t ether_power_on (ether_param_t const control); -static ether_return_t ether_power_off (ether_param_t const control); -static ether_return_t power_on (uint32_t channel); -static void power_off (uint32_t channel); -static ether_return_t ether_set_multicastframe_filter (ether_param_t const control); -static ether_return_t ether_set_broadcastframe_filter (ether_param_t const control); - -#if (defined(BSP_MCU_RX64M) || defined(BSP_MCU_RX71M) || defined(BSP_MCU_RX65N)) -static void ether_eint0 (void * pparam); -#endif -#if (defined(BSP_MCU_RX64M) || defined(BSP_MCU_RX71M)) -static void ether_eint1(void * pparam); -#endif - -static void ether_int_common (uint32_t channel); -static ether_return_t power_on_control (uint32_t channel); -static void power_off_control (uint32_t channel); -static uint8_t check_mpde_bit (void); - -/* - * Private global variables - */ - -/* Pointer to the receive descriptors */ -#if (ETHER_CHANNEL_MAX == 1) -static descriptor_t * papp_rx_desc[ETHER_CHANNEL_MAX] = -{ NULL }; -#elif (ETHER_CHANNEL_MAX == 2) -static descriptor_t * papp_rx_desc[ETHER_CHANNEL_MAX] = -{ NULL, NULL}; -#endif - -/* Pointer to the transmit descriptors */ -#if (ETHER_CHANNEL_MAX == 1) -static descriptor_t * papp_tx_desc[ETHER_CHANNEL_MAX] = -{ NULL }; -#elif (ETHER_CHANNEL_MAX == 2) -static descriptor_t * papp_tx_desc[ETHER_CHANNEL_MAX] = -{ NULL, NULL}; -#endif - -/* Pointer to the callback function */ -static ether_cb_t cb_func; - -#if (defined(BSP_MCU_RX63N)) -#else -static bool is_entry = false; -#endif - -/* - * The flag which control the pause frame. - * - * The value of flag and the situation which is indicatived of by the value. - * ETHER_FLAG_OFF (0): Don't use the pause frame (default). - * ETHER_FLAG_ON (1): Use the pause frame. - */ -#if (ETHER_CHANNEL_MAX == 1) -static uint8_t pause_frame_enable[ETHER_CHANNEL_MAX] = -{ ETHER_FLAG_OFF }; -#elif (ETHER_CHANNEL_MAX == 2) -static uint8_t pause_frame_enable[ETHER_CHANNEL_MAX] = -{ ETHER_FLAG_OFF, ETHER_FLAG_OFF}; -#endif - -/* - * The flag indicatives of the state that the interrupt of Link Up/Down occur. - * - * Value and state of flag - * ETHER_FLAG_OFF (0): It is not possible to communicate. - * ETHER_FLAG_ON (1): It is possible to communicate. - */ -static uint8_t transfer_enable_flag[ETHER_CHANNEL_MAX]; - -/* - * The flag indicatives of the state that the interrupt of magic packet detection occur. - * - * Value and state of flag - * ETHER_FLAG_OFF (0): The interrupt of the magic packet detection has not been generated. - * ETHER_FLAG_ON (1): The interrupt of the magic packet detection was generated. - * - * If the R_ETHER_LinkProcess function is called, and the interrupt processing of the magic packet detection is done, - * this flag becomes ETHER_FLAG_OFF(0). - */ -static uint8_t mpd_flag[ETHER_CHANNEL_MAX]; - -static uint8_t mac_addr_buf[ETHER_CHANNEL_MAX][6]; - -/* - * The flag indicatives of the state that the interrupt of Link Up/Down occur. - * - * Value and state of flag - * ETHER_FLAG_OFF (0) : The Link up/down interrupt has not been generated. - * ETHER_FLAG_ON_LINK_OFF (2) : The Link down interrupt was generated. - * ETHER_FLAG_ON_LINK_ON (3) : The Link up interrupt was generated. - * - * If the R_ETHER_LinkProcess function is called, and the interrupt processing of Link Up/Down is done, - * this flag becomes ETHER_FLAG_OFF(0). - */ -static uint8_t lchng_flag[ETHER_CHANNEL_MAX]; - -/* - * The flag indicatives of the state that enable/disable multicast frame filtering. - * - * Value and state of flag - * ETHER_MC_FILTER_OFF (0) : Disable multicast frame filtering. - * ETHER_MC_FILTER_ON (1) : Enable multicast frame filtering. - * - * The frame multicast filtering is software filter. If you want to use Hardware filter, - * please use it EPTPC in RX64M/RX71M. - */ -static uint8_t mc_filter_flag[ETHER_CHANNEL_MAX]; - -/* - * The value indicatives of receive count for continuous broadcast frame. - */ -static uint32_t bc_filter_count[ETHER_CHANNEL_MAX]; - -/* - * PAUSE Resolution as documented in IEEE 802.3-2008_section2 Annex - * 28B, Table 28B-3. The following table codify logic that - * determines how the PAUSE is configured for local transmitter - * and receiver and partner transmitter and receiver. - */ -static const pauseresolution_t pause_resolution[PAUSE_TABLE_ENTRIES] = -{ -{ PAUSE_MASKC, PAUSE_VAL0, XMIT_PAUSE_OFF, RECV_PAUSE_OFF }, -{ PAUSE_MASKE, PAUSE_VAL4, XMIT_PAUSE_OFF, RECV_PAUSE_OFF }, -{ PAUSE_MASKF, PAUSE_VAL6, XMIT_PAUSE_OFF, RECV_PAUSE_OFF }, -{ PAUSE_MASKF, PAUSE_VAL7, XMIT_PAUSE_ON, RECV_PAUSE_OFF }, -{ PAUSE_MASKE, PAUSE_VAL8, XMIT_PAUSE_OFF, RECV_PAUSE_OFF }, -{ PAUSE_MASKA, PAUSE_VALA, XMIT_PAUSE_ON, RECV_PAUSE_ON }, -{ PAUSE_MASKF, PAUSE_VALC, XMIT_PAUSE_OFF, RECV_PAUSE_OFF }, -{ PAUSE_MASKF, PAUSE_VALD, XMIT_PAUSE_OFF, RECV_PAUSE_ON } }; - -/* - * Receive, transmit descriptors and their buffer. They are - * defined with section pragma directives to easily locate them - * on the memory map. - */ -R_ATTRIB_SECTION_CHANGE_V(_RX_DESC) -static descriptor_t rx_descriptors[ETHER_CHANNEL_MAX][ETHER_CFG_EMAC_RX_DESCRIPTORS]; -R_ATTRIB_SECTION_CHANGE_V(_TX_DESC) -static descriptor_t tx_descriptors[ETHER_CHANNEL_MAX][ETHER_CFG_EMAC_TX_DESCRIPTORS]; - -/* - * As for Ethernet buffer, the size of total buffer which are use for transmission and the reception is secured. - * The total buffer's size which the value is integrated from EMAC_NUM_BUFFERS (buffer number) and - * ETHER_CFG_BUFSIZE (the size of one buffer). - * The ETHER_CFG_BUFSIZE and EMAC_NUM_BUFFERS are defined by macro in the file "r_ether_private.h". - * It is sequentially used from the head of the buffer as a receive buffer or a transmission buffer. - */ -R_ATTRIB_SECTION_CHANGE_V(_ETHERNET_BUFFERS) -static etherbuffer_t ether_buffers[ETHER_CHANNEL_MAX]; - -R_ATTRIB_SECTION_CHANGE_END - -static uint8_t promiscuous_mode[ETHER_CHANNEL_MAX]; - -#if (ETHER_CHANNEL_MAX == 1) - #if (defined(BSP_MCU_RX63N)) -static const ether_control_t ether_ch_0[]= -{ - /* Ether = ch0, Phy access = ch0 */ - { ÐERC, &EDMAC, ÐERC.PIR.LONG, ETHER_CFG_CH0_PHY_ADDRESS, PORT_CONNECT_ET0} -}; - #elif (defined(BSP_MCU_RX65N)) -static const ether_control_t ether_ch_0[] = -{ -/* Ether = ch0, Phy access = ch0 */ -{ ÐERC0, &EDMAC0, ÐERC0.PIR.LONG, ETHER_CFG_CH0_PHY_ADDRESS, PORT_CONNECT_ET0 } }; - #endif -#elif (ETHER_CHANNEL_MAX == 2) -static const ether_control_t ether_ch_0[]= -{ - /* Ether = ch0, Phy access = ch0 */ - { ÐERC0, &EDMAC0, ÐERC0.PIR.LONG, ETHER_CFG_CH0_PHY_ADDRESS, PORT_CONNECT_ET0}, - - /* Ether = ch0, Phy access = ch1 */ - { ÐERC0, &EDMAC0, ÐERC1.PIR.LONG, ETHER_CFG_CH0_PHY_ADDRESS, PORT_CONNECT_ET0_ET1} -}; - -static const ether_control_t ether_ch_1[]= -{ - /* Ether = ch1, Phy access = ch0 */ - { ÐERC1, &EDMAC1, ÐERC0.PIR.LONG, ETHER_CFG_CH1_PHY_ADDRESS, PORT_CONNECT_ET0_ET1}, - - /* Ether = ch1, Phy access = ch1 */ - { ÐERC1, &EDMAC1, ÐERC1.PIR.LONG, ETHER_CFG_CH1_PHY_ADDRESS, PORT_CONNECT_ET1} -}; -#endif - -/* This table is used to convert it from the channel number for the communication - into the channel number for the PHY register access. */ - -#if (ETHER_CHANNEL_MAX == 1) -static const uint32_t ether_phy_access[] = -{ -ETHER_CFG_CH0_PHY_ACCESS }; -#elif (ETHER_CHANNEL_MAX == 2) -static const uint32_t ether_phy_access[] = -{ - ETHER_CFG_CH0_PHY_ACCESS, - ETHER_CFG_CH1_PHY_ACCESS -}; -#endif - -static uint8_t etherc_edmac_power_cont[ETHER_PHY_ACCESS_CHANNEL_MAX][ETHER_CHANNEL_MAX]; - -#if (ETHER_CHANNEL_MAX == 1) -const ether_ch_control_t g_eth_control_ch[] = -{ -{ ether_ch_0, ETHER_CFG_CH0_PHY_ACCESS } }; -#elif (ETHER_CHANNEL_MAX == 2) -const ether_ch_control_t g_eth_control_ch[] = -{ - { ether_ch_0, ETHER_CFG_CH0_PHY_ACCESS}, - { ether_ch_1, ETHER_CFG_CH1_PHY_ACCESS} -}; -#endif - -#if (ETHER_CFG_USE_LINKSTA == 0) - #if (ETHER_CHANNEL_MAX == 1) - /* Previous link status */ - static int16_t g_pre_link_stat[ETHER_CHANNEL_MAX] = {ETHER_ERR_OTHER}; - #elif (ETHER_CHANNEL_MAX == 2) - /* Previous link status */ - static int16_t g_pre_link_stat[ETHER_CHANNEL_MAX] = {ETHER_ERR_OTHER, ETHER_ERR_OTHER}; - #endif -#endif - -/* - * Renesas Ethernet API functions - */ -/*********************************************************************************************************************** - * Function Name: R_ETHER_Initial (Implementation to file hwsetup.c) - * Description : Initialization of Ether driver. - * Arguments : none - * Return Value : none - ***********************************************************************************************************************/ -void R_ETHER_Initial (void) -{ - /* Initialize the transmit and receive descriptor */ - memset(&rx_descriptors, 0x00, sizeof(rx_descriptors)); - memset(&tx_descriptors, 0x00, sizeof(tx_descriptors)); - - /* Initialize the Ether buffer */ - memset(ðer_buffers, 0x00, sizeof(ether_buffers)); - - memset(etherc_edmac_power_cont, 0x00, sizeof(etherc_edmac_power_cont)); - - /* Initialize the callback function pointer */ - cb_func.pcb_func = NULL; - - /* Initialize the interrupt handler pointer */ - cb_func.pcb_int_hnd = NULL; - - /* Initialize */ -#if (ETHER_CHANNEL_MAX == 1) - promiscuous_mode[ETHER_CHANNEL_0] = ETHER_PROMISCUOUS_OFF; - mc_filter_flag[ETHER_CHANNEL_0] = ETHER_MC_FILTER_OFF; - bc_filter_count[ETHER_CHANNEL_0] = 0; -#elif (ETHER_CHANNEL_MAX == 2) - promiscuous_mode[ETHER_CHANNEL_0] = ETHER_PROMISCUOUS_OFF; - promiscuous_mode[ETHER_CHANNEL_1] = ETHER_PROMISCUOUS_OFF; - mc_filter_flag[ETHER_CHANNEL_0] = ETHER_MC_FILTER_OFF; - mc_filter_flag[ETHER_CHANNEL_1] = ETHER_MC_FILTER_OFF; - bc_filter_count[ETHER_CHANNEL_0] = 0; - bc_filter_count[ETHER_CHANNEL_1] = 0; -#endif - -} /* End of function R_ETHER_Initial() */ - -/*********************************************************************************************************************** - * Function Name: R_ETHER_Open_ZC2 - * Description : After ETHERC, EDMAC,0x00000002; and PHY-LSI are reset in software, an auto negotiation of PHY-LSI is - * begun. - * Afterwards, the link signal change interrupt is permitted. - * Arguments : channel - - * ETHERC channel number - * mac_addr - - * The MAC address of ETHERC - * pause - - * Specifies whether flow control functionality is enabled or disabled. - * Return Value : ETHER_SUCCESS - - * Processing completed successfully - * ETHER_ERR_INVALID_CHAN - - * Nonexistent channel number - * ETHER_ERR_INVALID_PTR - - * Value of the pointer is NULL or FIT_NO_PTR - * ETHER_ERR_INVALID_DATA - - * Value of the argument is out of range - * ETHER_ERR_OTHER - - * Initialization of PHY-LSI failed - ***********************************************************************************************************************/ -ether_return_t R_ETHER_Open_ZC2 (uint32_t channel, const uint8_t mac_addr[], uint8_t pause) -{ - ether_return_t ret; - int16_t phy_ret; - volatile bsp_int_err_t bsp_int_err; - const ether_control_t * pether_ch; - uint32_t phy_access; - - volatile struct st_etherc __evenaccess * petherc_adr; - volatile struct st_edmac __evenaccess * pedmac_adr; - - /* Check argument */ - if (ETHER_CHANNEL_MAX <= channel) - { - return ETHER_ERR_INVALID_CHAN; - } - if ((NULL == mac_addr) || (FIT_NO_PTR == mac_addr)) - { - return ETHER_ERR_INVALID_PTR; - } - if ((ETHER_FLAG_OFF != pause) && (ETHER_FLAG_ON != pause)) - { - return ETHER_ERR_INVALID_DATA; - } - - pether_ch = g_eth_control_ch[channel].pether_control; - phy_access = g_eth_control_ch[channel].phy_access; - petherc_adr = pether_ch[phy_access].petherc; - pedmac_adr = pether_ch[phy_access].pedmac; - - /* Initialize the flags */ - transfer_enable_flag[channel] = ETHER_FLAG_OFF; - mpd_flag[channel] = ETHER_FLAG_OFF; - lchng_flag[channel] = ETHER_FLAG_OFF; - - pause_frame_enable[channel] = pause; - - mac_addr_buf[channel][0] = mac_addr[0]; - mac_addr_buf[channel][1] = mac_addr[1]; - mac_addr_buf[channel][2] = mac_addr[2]; - mac_addr_buf[channel][3] = mac_addr[3]; - mac_addr_buf[channel][4] = mac_addr[4]; - mac_addr_buf[channel][5] = mac_addr[5]; - -#if (defined(BSP_MCU_RX64M) || defined(BSP_MCU_RX71M)) - /* Subscribe to r_bsp an interrupt function */ - if (false == is_entry) - { - bsp_int_err = R_BSP_InterruptWrite(BSP_INT_SRC_AL1_EDMAC0_EINT0, ether_eint0); /* EINT0 */ - bsp_int_err = R_BSP_InterruptWrite(BSP_INT_SRC_AL1_EDMAC1_EINT1, ether_eint1); /* EINT1 */ - is_entry = true; - } -#elif (defined(BSP_MCU_RX65N)) - /* Subscribe to r_bsp an interrupt function */ - if (false == is_entry) - { - bsp_int_err = R_BSP_InterruptWrite(BSP_INT_SRC_AL1_EDMAC0_EINT0, ether_eint0); /* EINT0 */ - is_entry = true; - } -#endif - - /* Software reset */ - ether_reset_mac(channel); - - /* Software reset the PHY */ - phy_ret = phy_init(channel); - if (R_PHY_OK == phy_ret) - { - phy_start_autonegotiate(channel, pause_frame_enable[channel]); - - /* Clear all ETHERC status BFR, PSRTO, LCHNG, MPD, ICD */ - petherc_adr->ECSR.LONG = 0x00000037; - - /* Clear all EDMAC status bits */ - pedmac_adr->EESR.LONG = 0x47FF0F9F; - -#if (ETHER_CFG_USE_LINKSTA == 1) - /* Enable interrupts of interest only. */ - petherc_adr->ECSIPR.BIT.LCHNGIP = 1; -#endif - - pedmac_adr->EESIPR.BIT.ECIIP = 1; - - /* Set Ethernet interrupt level and enable */ - ether_enable_icu(channel); - - ret = ETHER_SUCCESS; - } - else - { - ret = ETHER_ERR_OTHER; - } - - return ret; -} /* End of function R_ETHER_Open_ZC2() */ - -/*********************************************************************************************************************** - * Function Name: R_ETHER_Close_ZC2 - * Description : Disables Ethernet peripheral - * Arguments : channel - - * ETHERC channel number - * Return Value : ETHER_SUCCESS - - * Processing completed successfully - * ETHER_ERR_INVALID_CHAN - - * Nonexistent channel number - ***********************************************************************************************************************/ -ether_return_t R_ETHER_Close_ZC2 (uint32_t channel) -{ - volatile struct st_etherc __evenaccess * petherc_adr; - volatile struct st_edmac __evenaccess * pedmac_adr; - const ether_control_t * pether_ch; - uint32_t phy_access; - - /* Check argument */ - if (ETHER_CHANNEL_MAX <= channel) - { - return ETHER_ERR_INVALID_CHAN; - } - - pether_ch = g_eth_control_ch[channel].pether_control; - phy_access = g_eth_control_ch[channel].phy_access; - petherc_adr = pether_ch[phy_access].petherc; - pedmac_adr = pether_ch[phy_access].pedmac; - - /* Disable Ethernet interrupt. */ - ether_disable_icu(channel); - - petherc_adr->ECSIPR.BIT.LCHNGIP = 0; - pedmac_adr->EESIPR.BIT.ECIIP = 0; - - /* Disable TE and RE */ - petherc_adr->ECMR.LONG = 0x00000000; - - /* Initialize the flags */ - transfer_enable_flag[channel] = ETHER_FLAG_OFF; - mpd_flag[channel] = ETHER_FLAG_OFF; - lchng_flag[channel] = ETHER_FLAG_OFF; -#if (ETHER_CFG_USE_LINKSTA == 0) - g_pre_link_stat[channel] = ETHER_ERR_OTHER; -#endif - - return ETHER_SUCCESS; -} /* End of function R_ETHER_Close_ZC2() */ - -/*********************************************************************************************************************** - * Function Name: R_ETHER_Read_ZC2 - * Description : Receives an Ethernet frame. Sets the passed - * buffer pointer to the Ethernet frame buffer - * from the driver. This makes the data available to - * the caller as a zero-copy operation. - * Arguments : channel - - * ETHERC channel number - * pbuf - - * Pointer to buffer that holds the receive data - * Return Value : Returns the number of bytes received. - * ETHER_NO_DATA - - * A zero value indicates no data is received. - * ETHER_ERR_INVALID_CHAN - - * Nonexistent channel number - * ETHER_ERR_INVALID_PTR - - * Value of the pointer is NULL or FIT_NO_PTR - * ETHER_ERR_LINK - - * Auto-negotiation is not completed, and reception is not enabled. - * ETHER_ERR_MPDE - - * As a Magic Packet is being detected, transmission and reception is not enabled. - * ETHER_ERR_MC_FRAME - - * Multicast Frame filter is enable, and Multicast Address Frame is received. - ***********************************************************************************************************************/ -int32_t R_ETHER_Read_ZC2 (uint32_t channel, void **pbuf) -{ - int32_t num_recvd; - int32_t ret; - int32_t complete_flag; - - /* Check argument */ - if (ETHER_CHANNEL_MAX <= channel) - { - return ETHER_ERR_INVALID_CHAN; - } - if ((NULL == pbuf) || (FIT_NO_PTR == pbuf)) - { - return ETHER_ERR_INVALID_PTR; - } - - /* When the Link up processing is not completed, return error */ - if (ETHER_FLAG_OFF == transfer_enable_flag[channel]) - { - ret = ETHER_ERR_LINK; - } - - /* In case of detection mode of magic packet, return error. */ - else if (1 == check_mpde_bit()) - { - ret = ETHER_ERR_MPDE; - } - - /* When the Link up processing is completed */ - else - { - ret = ETHER_NO_DATA; - complete_flag = ETHER_ERR_OTHER; - while (ETHER_SUCCESS != complete_flag) - { - /* When receive data exists. */ - if (RACT != (papp_rx_desc[channel]->status & RACT)) - { - /* Check multicast is detected when multicast frame filter is enabled */ - if (ETHER_MC_FILTER_ON == mc_filter_flag[channel]) - { - if (RFS7_RMAF == (papp_rx_desc[channel]->status & RFS7_RMAF)) - { - /* The buffer is released at the multicast frame detect. */ - R_ETHER_Read_ZC2_BufRelease(channel); - - ret = ETHER_ERR_MC_FRAME; - complete_flag = ETHER_SUCCESS; - } - } - - if (ETHER_ERR_MC_FRAME != ret) - { - if (RFE == (papp_rx_desc[channel]->status & RFE)) - { - /* The buffer is released at the error. */ - R_ETHER_Read_ZC2_BufRelease(channel); - } - else - { - /** - * Pass the pointer to received data to application. This is - * zero-copy operation. - */ - (*pbuf) = (void *) papp_rx_desc[channel]->buf_p; - - /* Get bytes received */ - num_recvd = papp_rx_desc[channel]->size; - ret = num_recvd; - complete_flag = ETHER_SUCCESS; - } - } - } - else - { - ret = ETHER_NO_DATA; - complete_flag = ETHER_SUCCESS; - } - } - } - return ret; -} /* End of function R_ETHER_Read_ZC2() */ - -/*********************************************************************************************************************** - * Function Name: R_ETHER_Read_ZC2_BufRelease - * Description : Release the receive buffer. - * Arguments : channel - - * Specifies the ETHERC channel number. - * Return Value : ETHER_SUCCESS - - * Processing completed successfully - * ETHER_ERR_INVALID_CHAN - - * Nonexistent channel number - * ETHER_ERR_LINK - - * Auto-negotiation is not completed, and reception is not enabled. - * ETHER_ERR_MPDE - - * As a Magic Packet is being detected, transmission and reception is not enabled. - ***********************************************************************************************************************/ -int32_t R_ETHER_Read_ZC2_BufRelease (uint32_t channel) -{ - int32_t ret; - volatile struct st_edmac __evenaccess * pedmac_adr; - const ether_control_t * pether_ch; - uint32_t phy_access; - uint32_t status; - - /* Check argument */ - if (ETHER_CHANNEL_MAX <= channel) - { - return ETHER_ERR_INVALID_CHAN; - } - - /* When the Link up processing is not completed, return error */ - if (ETHER_FLAG_OFF == transfer_enable_flag[channel]) - { - ret = ETHER_ERR_LINK; - } - - /* In case of detection mode of magic packet, return error. */ - else if (1 == check_mpde_bit()) - - { - ret = ETHER_ERR_MPDE; - } - - /* When the Link up processing is completed */ - else - { - /* When receive data exists */ - if (RACT != (papp_rx_desc[channel]->status & RACT)) - { - /* Move to next descriptor */ - papp_rx_desc[channel]->status |= RACT; - - status = RFP1; - status |= RFP0; - status |= RFE; - status |= RFS9_RFOVER; - status |= RFS8_RAD; - status |= RFS7_RMAF; - status |= RFS4_RRF; - status |= RFS3_RTLF; - status |= RFS2_RTSF; - status |= RFS1_PRE; - status |= RFS0_CERF; - - papp_rx_desc[channel]->status &= (~status); - papp_rx_desc[channel] = papp_rx_desc[channel]->next; - } - pether_ch = g_eth_control_ch[channel].pether_control; - phy_access = g_eth_control_ch[channel].phy_access; - pedmac_adr = pether_ch[phy_access].pedmac; - - if (0x00000000L == pedmac_adr->EDRRR.LONG) - { - /* Restart if stopped */ - pedmac_adr->EDRRR.LONG = 0x00000001L; - } - - ret = ETHER_SUCCESS; - } - return ret; -} /* End of function R_ETHER_Read_ZC2_BufRelease() */ - -/*********************************************************************************************************************** - * Function Name: R_ETHER_Write_ZC2_GetBuf - * Description : Get Points to the buffer pointer used by the stack. - * Arguments : channel - - * ETHERC channel number - * pbuf - - * Pointer to the starting address of the transmit data destination - * pbuf_size - - * The Maximum size to write to the buffer - * Return Value : ETHER_SUCCESS - - * Processing completed successfully - * ETHER_ERR_INVALID_CHAN - - * Nonexistent channel number - * ETHER_ERR_INVALID_PTR - - * Value of the pointer is NULL or FIT_NO_PTR - * ETHER_ERR_LINK - - * Auto-negotiation is not completed, and reception is not enabled. - * ETHER_ERR_MPDE - - * As a Magic Packet is being detected, transmission and reception is not enabled. - * ETHER_ERR_TACT - - * Transmit buffer is not empty. - ***********************************************************************************************************************/ -ether_return_t R_ETHER_Write_ZC2_GetBuf (uint32_t channel, void **pbuf, uint16_t *pbuf_size) -{ - ether_return_t ret; - - /* Check argument */ - if (ETHER_CHANNEL_MAX <= channel) - { - return ETHER_ERR_INVALID_CHAN; - } - if ((NULL == pbuf) || (FIT_NO_PTR == pbuf)) - { - return ETHER_ERR_INVALID_PTR; - } - if ((NULL == pbuf_size) || (FIT_NO_PTR == pbuf_size)) - { - return ETHER_ERR_INVALID_PTR; - } - - /* When the Link up processing is not completed, return error */ - if (ETHER_FLAG_OFF == transfer_enable_flag[channel]) - { - ret = ETHER_ERR_LINK; - } - - /* In case of detection mode of magic packet, return error. */ - else if (1 == check_mpde_bit()) - { - ret = ETHER_ERR_MPDE; - } - - /* When the Link up processing is completed */ - else - { - /* All transmit buffers are full */ - if (TACT == (papp_tx_desc[channel]->status & TACT)) - { - ret = ETHER_ERR_TACT; - } - else - { - /* Give application another buffer to work with */ - (*pbuf) = papp_tx_desc[channel]->buf_p; - (*pbuf_size) = ETHER_CFG_BUFSIZE; - ret = ETHER_SUCCESS; - } - } - return ret; -} /* End of function R_ETHER_Write_ZC2_GetBuf() */ - -/*********************************************************************************************************************** - * Function Name: R_ETHER_Write_ZC2_SetBuf - * Description : Transmits an Ethernet frame. - * The transmit descriptor points to the data to transmit. - * Data is sent directly from memory as a "zero copy" operation. - * Arguments : channel - - * ETHERC channel number - * len - - * The size (60 to 1,514 bytes) which is the Ethernet frame length minus 4 bytes of CRC - * Return Value : ETHER_SUCCESS - - * Processing completed successfully - * ETHER_ERR_INVALID_CHAN - - * Nonexistent channel number - * ETHER_ERR_INVALID_DATA - - * Value of the argument is out of range - * ETHER_ERR_LINK - - * Auto-negotiation is not completed, and reception is not enabled. - * ETHER_ERR_MPDE - - * As a Magic Packet is being detected, transmission and reception is not enabled. - ***********************************************************************************************************************/ -ether_return_t R_ETHER_Write_ZC2_SetBuf (uint32_t channel, const uint32_t len) -{ - ether_return_t ret; - volatile struct st_edmac __evenaccess * pedmac_adr; - const ether_control_t * pether_ch; - uint32_t phy_access; - - /* Check argument */ - if (ETHER_CHANNEL_MAX <= channel) - { - return ETHER_ERR_INVALID_CHAN; - } - if ((ETHER_BUFSIZE_MIN > len) || (ETHER_BUFSIZE_MAX < len)) - { - return ETHER_ERR_INVALID_DATA; - } - - /* When the Link up processing is not completed, return error */ - if (ETHER_FLAG_OFF == transfer_enable_flag[channel]) - { - ret = ETHER_ERR_LINK; - } - - /* In case of detection mode of magic packet, return error. */ - else if (1 == check_mpde_bit()) - - { - ret = ETHER_ERR_MPDE; - } - - /* When the Link up processing is completed */ - else - { - /* The data of the buffer is made active. */ - papp_tx_desc[channel]->bufsize = len; - papp_tx_desc[channel]->status &= (~(TFP1 | TFP0)); - papp_tx_desc[channel]->status |= ((TFP1 | TFP0) | TACT); - papp_tx_desc[channel] = papp_tx_desc[channel]->next; - - pether_ch = g_eth_control_ch[channel].pether_control; - phy_access = g_eth_control_ch[channel].phy_access; - pedmac_adr = pether_ch[phy_access].pedmac; - - if (0x00000000L == pedmac_adr->EDTRR.LONG) - { - /* Restart if stopped */ - pedmac_adr->EDTRR.LONG = 0x00000001L; - } - - ret = ETHER_SUCCESS; - } - return ret; -} /* End of function R_ETHER_Write_ZC2_SetBuf() */ - -/*********************************************************************************************************************** - * Function Name: R_ETHER_CheckLink_ZC - * Description : Verifies the Etherent link is up or not. - * Arguments : channel - - * ETHERC channel number - * Return Value : ETHER_SUCCESS - - * Link is up - * ETHER_ERR_OTHER - - * Link is down - * ETHER_ERR_INVALID_CHAN - - * Nonexistent channel number - ***********************************************************************************************************************/ -ether_return_t R_ETHER_CheckLink_ZC (uint32_t channel) -{ - int16_t status; - - /* Check argument */ - if (ETHER_CHANNEL_MAX <= channel) - { - return ETHER_ERR_INVALID_CHAN; - } - - status = phy_get_link_status(channel); - - if (R_PHY_ERROR == status) - { - /* Link is down */ - return ETHER_ERR_OTHER; - } - else - { - /* Link is up */ - return ETHER_SUCCESS; - } -} /* End of function R_ETHER_CheckLink_ZC() */ - -/*********************************************************************************************************************** - * Function Name: R_ETHER_LinkProcess - * Description : The Link up processing, the Link down processing, and the magic packet detection processing are - * executed. - * Arguments : channel - - * ETHERC channel number - * Return Value : none - ***********************************************************************************************************************/ -void R_ETHER_LinkProcess (uint32_t channel) -{ - volatile struct st_etherc __evenaccess * petherc_adr; - const ether_control_t * pether_ch; - uint32_t phy_access; - - int32_t ret; - ether_cb_arg_t cb_arg; - - if (ETHER_CHANNEL_MAX <= channel) - { - return; - } - - /* When the magic packet is detected. */ - if (ETHER_FLAG_ON == mpd_flag[channel]) - { - mpd_flag[channel] = ETHER_FLAG_OFF; - - if ((NULL != cb_func.pcb_func) && (FIT_NO_FUNC != cb_func.pcb_func)) - { - cb_arg.channel = channel; - cb_arg.event_id = ETHER_CB_EVENT_ID_WAKEON_LAN; - (*cb_func.pcb_func)((void *) &cb_arg); - } - - /* - * After the close function is called, the open function is called - * to have to set ETHERC to a usual operational mode - * to usually communicate after magic packet is detected. - */ - R_ETHER_Close_ZC2(channel); - R_ETHER_Open_ZC2(channel, mac_addr_buf[channel], pause_frame_enable[channel]); - } - -#if (ETHER_CFG_USE_LINKSTA == 0) - ret = R_ETHER_CheckLink_ZC(channel); - if (g_pre_link_stat[channel] != ret) - { - if (ret == ETHER_SUCCESS) - { - /* The state of the link status in PHY-LSI is confirmed and Link Up/Down is judged. */ - /* When becoming Link up */ - lchng_flag[channel] = ETHER_FLAG_ON_LINK_ON; - } - else - { - /* When becoming Link down */ - lchng_flag[channel] = ETHER_FLAG_ON_LINK_OFF; - } - } - g_pre_link_stat[channel] = ret; -#endif - - /* When the link is up */ - if (ETHER_FLAG_ON_LINK_ON == lchng_flag[channel]) - { -#if (ETHER_CFG_USE_LINKSTA == 1) - /* - * The Link Up/Down is confirmed by the Link Status bit of PHY register1, - * because the LINK signal of PHY-LSI is used for LED indicator, and - * isn't used for notifing the Link Up/Down to external device. - */ - ret = R_ETHER_CheckLink_ZC(channel); - if (ETHER_SUCCESS == ret) - { - /* - * The status of the LINK signal became "link-up" even if PHY-LSI did not detect "link-up" - * after a reset. To avoid this wrong detection, processing in R_ETHER_LinkProcess has been modified to - * clear the flag after link-up is confirmed in R_ETHER_CheckLink_ZC. - */ - lchng_flag[channel] = ETHER_FLAG_OFF; - - /* Initialize the transmit and receive descriptor */ - memset(&rx_descriptors[channel], 0x00, sizeof(rx_descriptors[channel])); - memset(&tx_descriptors[channel], 0x00, sizeof(tx_descriptors[channel])); - - /* Initialize the Ether buffer */ - memset(ðer_buffers[channel], 0x00, sizeof(ether_buffers[channel])); - - /* - * ETHERC and EDMAC are set after ETHERC and EDMAC are reset in software - * and sending and receiving is permitted. - */ - ether_configure_mac(channel, mac_addr_buf[channel], NO_USE_MAGIC_PACKET_DETECT); - ether_do_link(channel, NO_USE_MAGIC_PACKET_DETECT); - - transfer_enable_flag[channel] = ETHER_FLAG_ON; - - if ((NULL != cb_func.pcb_func) && (FIT_NO_FUNC != cb_func.pcb_func)) - { - cb_arg.channel = channel; - cb_arg.event_id = ETHER_CB_EVENT_ID_LINK_ON; - (*cb_func.pcb_func)((void *) &cb_arg); - } - } - else - { - /* no process */ - } -#elif (ETHER_CFG_USE_LINKSTA == 0) - /* - * The status of the LINK signal became "link-up" even if PHY-LSI did not detect "link-up" - * after a reset. To avoid this wrong detection, processing in R_ETHER_LinkProcess has been modified to - * clear the flag after link-up is confirmed in R_ETHER_CheckLink_ZC. - */ - lchng_flag[channel] = ETHER_FLAG_OFF; - - /* Initialize the transmit and receive descriptor */ - memset(&rx_descriptors[channel], 0x00, sizeof(rx_descriptors[channel])); - memset(&tx_descriptors[channel], 0x00, sizeof(tx_descriptors[channel])); - - /* Initialize the Ether buffer */ - memset(ðer_buffers[channel], 0x00, sizeof(ether_buffers[channel])); - - /* - * ETHERC and EDMAC are set after ETHERC and EDMAC are reset in software - * and sending and receiving is permitted. - */ - ether_configure_mac(channel, mac_addr_buf[channel], NO_USE_MAGIC_PACKET_DETECT); - ether_do_link(channel, NO_USE_MAGIC_PACKET_DETECT); - - transfer_enable_flag[channel] = ETHER_FLAG_ON; - - if ((NULL != cb_func.pcb_func) && (FIT_NO_FUNC != cb_func.pcb_func)) - { - cb_arg.channel = channel; - cb_arg.event_id = ETHER_CB_EVENT_ID_LINK_ON; - (*cb_func.pcb_func)((void *) &cb_arg); - } -#endif - } - - /* When the link is down */ - else if (ETHER_FLAG_ON_LINK_OFF == lchng_flag[channel]) - { - lchng_flag[channel] = ETHER_FLAG_OFF; - -#if (ETHER_CFG_USE_LINKSTA == 1) - /* - * The Link Up/Down is confirmed by the Link Status bit of PHY register1, - * because the LINK signal of PHY-LSI is used for LED indicator, and - * isn't used for notifying the Link Up/Down to external device. - */ - ret = R_ETHER_CheckLink_ZC(channel); - if (ETHER_ERR_OTHER == ret) - { - pether_ch = g_eth_control_ch[channel].pether_control; - phy_access = g_eth_control_ch[channel].phy_access; - petherc_adr = pether_ch[phy_access].petherc; - - /* Disable receive and transmit. */ - petherc_adr->ECMR.BIT.RE = 0; - petherc_adr->ECMR.BIT.TE = 0; - - transfer_enable_flag[channel] = ETHER_FLAG_OFF; - - if ((NULL != cb_func.pcb_func) && (FIT_NO_FUNC != cb_func.pcb_func)) - { - cb_arg.channel = channel; - cb_arg.event_id = ETHER_CB_EVENT_ID_LINK_OFF; - (*cb_func.pcb_func)((void *) &cb_arg); - } - } - else - { - ; /* no operation */ - } -#elif (ETHER_CFG_USE_LINKSTA == 0) - pether_ch = g_eth_control_ch[channel].pether_control; - phy_access = g_eth_control_ch[channel].phy_access; - petherc_adr = pether_ch[phy_access].petherc; - - /* Disable receive and transmit. */ - petherc_adr->ECMR.BIT.RE = 0; - petherc_adr->ECMR.BIT.TE = 0; - - transfer_enable_flag[channel] = ETHER_FLAG_OFF; - - if ((NULL != cb_func.pcb_func) && (FIT_NO_FUNC != cb_func.pcb_func)) - { - cb_arg.channel = channel; - cb_arg.event_id = ETHER_CB_EVENT_ID_LINK_OFF; - (*cb_func.pcb_func)((void *) &cb_arg); - } -#endif - } - else - { - ; /* no operation */ - } -} /* End of function R_ETHER_LinkProcess() */ - -/*********************************************************************************************************************** - * Function Name: R_ETHER_WakeOnLAN - * Description : The setting of ETHERC is changed from a usual sending and - * receiving mode to the magic packet detection mode. - * Arguments : channel - - * ETHERC channel number - * Return Value : ETHER_SUCCESS - - * Processing completed successfully - * ETHER_ERR_INVALID_CHAN - - * Nonexistent channel number - * ETHER_ERR_LINK - - * Auto-negotiation is not completed, and reception is not enabled. - * ETHER_ERR_OTHER - - * A switch to magic packet detection was performed when the link state was link is down. - ***********************************************************************************************************************/ -ether_return_t R_ETHER_WakeOnLAN (uint32_t channel) -{ -#if (ETHER_CFG_USE_LINKSTA == 1) - volatile struct st_etherc __evenaccess * petherc_adr; - const ether_control_t * pether_ch; - uint32_t phy_access; -#endif - ether_return_t ret; - - /* Check argument */ - if (ETHER_CHANNEL_MAX <= channel) - { - return ETHER_ERR_INVALID_CHAN; - } - - /* When the Link up processing is not completed, return error */ - if (ETHER_FLAG_OFF == transfer_enable_flag[channel]) - { - ret = ETHER_ERR_LINK; - } - - /* When the Link up processing is completed */ - else - { - /* Change to the magic packet detection mode. */ - ether_configure_mac(channel, mac_addr_buf[channel], USE_MAGIC_PACKET_DETECT); - ret = ether_do_link(channel, USE_MAGIC_PACKET_DETECT); - if (ETHER_SUCCESS == ret) - { -#if (ETHER_CFG_USE_LINKSTA == 1) - pether_ch = g_eth_control_ch[channel].pether_control; - phy_access = g_eth_control_ch[channel].phy_access; - petherc_adr = pether_ch[phy_access].petherc; - - /* It is confirmed not to become Link down while changing the setting. */ - if (ETHER_CFG_LINK_PRESENT == petherc_adr->PSR.BIT.LMON) - { - ret = ETHER_SUCCESS; - } - else - { - ret = ETHER_ERR_OTHER; - } -#else - /* It is confirmed not to become Link down while changing the setting. */ - ret = R_ETHER_CheckLink_ZC(channel); -#endif - } - else - { - ret = ETHER_ERR_OTHER; - } - } - return ret; -} /* End of function R_ETHER_WakeOnLAN() */ - -/*********************************************************************************************************************** - * Function Name: R_ETHER_Read - * Description : Receive Ethernet frame. Receives data to the location specified by the pointer to the receive buffer, - * using non-zero-copy communication. - * Arguments : channel - - * ETHERC channel number - * pbuf - - * The receive buffer (to store the receive data) - * Return Value : Returns the number of bytes received. - * ETHER_NO_DATA - - * A zero value indicates no data is received. - * ETHER_ERR_INVALID_CHAN - - * Nonexistent channel number - * ETHER_ERR_INVALID_PTR - - * Value of the pointer is NULL or FIT_NO_PTR - * ETHER_ERR_LINK - - * Auto-negotiation is not completed, and reception is not enabled. - * ETHER_ERR_MPDE - - * As a Magic Packet is being detected, transmission and reception is not enabled. - * ETHER_ERR_MC_FRAME - - * Multicast Frame filter is enable, and Multicast Address Frame is received. - ***********************************************************************************************************************/ -int32_t R_ETHER_Read (uint32_t channel, void *pbuf) -{ - int32_t ret; - int32_t ret2; - uint8_t * pread_buffer_address; /* Buffer location controlled by the Ethernet driver */ - - /* Check argument */ - if (ETHER_CHANNEL_MAX <= channel) - { - return ETHER_ERR_INVALID_CHAN; - } - if ((NULL == pbuf) || (FIT_NO_PTR == pbuf)) - { - return ETHER_ERR_INVALID_PTR; - } - - /* (1) Retrieve the receive buffer location controlled by the descriptor. */ - ret = R_ETHER_Read_ZC2(channel, (void **) &pread_buffer_address); - - /* When there is data to receive */ - if (ret > ETHER_NO_DATA) - { - /* (2) Copy the data read from the receive buffer which is controlled by the descriptor to - the buffer which is specified by the user (up to 1024 bytes). */ - memcpy(pbuf, pread_buffer_address, (uint32_t )ret); - - /* (3) Read the receive data from the receive buffer controlled by the descriptor, - and then release the receive buffer. */ - ret2 = R_ETHER_Read_ZC2_BufRelease(channel); - - if (ETHER_SUCCESS == ret2) /* When this function is completed successfully */ - { - /* Do Nothing */ - } - - /* Overwrite the error information */ - else - { - ret = ret2; - } - } - - /* When there is no data to receive */ - else - { - /* Do Nothing */ - } - return ret; -} /* End of function R_ETHER_Read() */ - -/*********************************************************************************************************************** - * Function Name: R_ETHER_Write - * Description : Transmit Ethernet frame. Transmits data from the location specified by the pointer to the transmit - * buffer, with the data size equal to the specified frame length, using non-zero-copy communication. - * Arguments : channel - - * ETHERC channel number - * : *pbuf - - * Transmit buffer pointer - * : len - - * The size (60 to 1,514 bytes) which is the Ethernet frame length minus 4 bytes of CRC - * Return Value : ETHER_SUCCESS - - * Processing completed successfully - * ETHER_ERR_INVALID_CHAN - - * Nonexistent channel number - * ETHER_ERR_INVALID_DATA - - * Value of the argument is out of range - * ETHER_ERR_INVALID_PTR - - * Value of the pointer is NULL or FIT_NO_PTR - * ETHER_ERR_LINK - - * Auto-negotiation is not completed, and reception is not enabled. - * ETHER_ERR_MPDE - - * As a Magic Packet is being detected, transmission and reception is not enabled. - * ETHER_ERR_TACT - - * Transmit buffer is not empty. - ***********************************************************************************************************************/ -ether_return_t R_ETHER_Write (uint32_t channel, void *pbuf, const uint32_t len) -{ - ether_return_t ret; - uint8_t * pwrite_buffer_address; - uint16_t write_buf_size; - - if (ETHER_CHANNEL_MAX <= channel) - { - return ETHER_ERR_INVALID_CHAN; - } - if ((NULL == pbuf) || (FIT_NO_PTR == pbuf)) - { - return ETHER_ERR_INVALID_PTR; - } - if ((ETHER_BUFSIZE_MIN > len) || (ETHER_BUFSIZE_MAX < len)) - { - return ETHER_ERR_INVALID_DATA; - } - - /* (1) Retrieve the transmit buffer location controlled by the descriptor. */ - ret = R_ETHER_Write_ZC2_GetBuf(channel, (void **) &pwrite_buffer_address, &write_buf_size); - - /* Writing to the transmit buffer (buf) is enabled. */ - if (ETHER_SUCCESS == ret) - { - if (write_buf_size < len) - { - ret = ETHER_ERR_TACT; /* Transmit buffer overflow */ - } - else - { - /* Write the transmit data to the transmit buffer. */ - - /* (2) Write the data to the transmit buffer controlled by the descriptor. */ - memcpy(pwrite_buffer_address, pbuf, len); - - /* (3) Enable the EDMAC to transmit data in the transmit buffer. */ - ret = R_ETHER_Write_ZC2_SetBuf(channel, len); - - /* - * Confirm that the transmission is completed. - * Data written in the transmit buffer is transmitted by the EDMAC. Make sure that the - * transmission is completed after writing data to the transmit buffer. - * If the R_ETHER_Close_ZC2 function is called to stop the Ethernet communication before - * verifying that the transmission is completed, the written data written may not be transmitted. - */ - ret = R_ETHER_CheckWrite(channel); - } - } - return ret; -} /* End of function R_ETHER_Write() */ - -/*********************************************************************************************************************** - * Function Name: R_ETHER_CheckWrite - * Description : Checking that the data has been sent. - * Arguments : channel - - * ETHERC channel number - * Return Value : ETHER_SUCCESS - - * Processing completed successfully - * ETHER_ERR_INVALID_CHAN - - * Nonexistent channel number - ***********************************************************************************************************************/ -ether_return_t R_ETHER_CheckWrite (uint32_t channel) -{ - ether_return_t ret; - volatile struct st_edmac __evenaccess * pedmac_adr; - const ether_control_t * pether_ch; - uint32_t phy_access; - - /* Check argument */ - if (ETHER_CHANNEL_MAX <= channel) - { - ret = ETHER_ERR_INVALID_CHAN; - } - else - { - pether_ch = g_eth_control_ch[channel].pether_control; - phy_access = g_eth_control_ch[channel].phy_access; - pedmac_adr = pether_ch[phy_access].pedmac; - while (0 != pedmac_adr->EDTRR.BIT.TR) - { - /* Do Nothing */ - } - ret = ETHER_SUCCESS; - } - return ret; -} /* End of function R_ETHER_CheckWrite() */ - -/*********************************************************************************************************************** - * Function Name: R_ETHER_Control - * Description : By command argument is a function to change the settings of Ether driver. - * Arguments : cmd - - * Control code - * control - - * Parameters according to the control code - * Return Value : ETHER_SUCCESS - - * Processing completed successfully - * ETHER_ERR_INVALID_CHAN - - * Nonexistent channel number - * ETHER_ERR_CHAN_OPEN - - * Indicates the Ethernet cannot be opened because it is being used by another application - * ETHER_ERR_INVALID_ARG - - * Invalid argument - * ETHER_ERR_RECV_ENABLE - - * Receive function is enable. - ***********************************************************************************************************************/ -ether_return_t R_ETHER_Control (ether_cmd_t const cmd, ether_param_t const control) -{ - ether_return_t ret; - - switch (cmd) - { - /* Set the callback function pointer */ - case CONTROL_SET_CALLBACK : - ret = ether_set_callback(control); - break; - - case CONTROL_SET_PROMISCUOUS_MODE : - ret = ether_set_promiscuous_mode(control); - break; - - case CONTROL_SET_INT_HANDLER : - ret = ether_set_int_handler(control); - break; - - case CONTROL_POWER_ON : - ret = ether_power_on(control); - break; - - case CONTROL_POWER_OFF : - ret = ether_power_off(control); - break; - - case CONTROL_MULTICASTFRAME_FILTER : - ret = ether_set_multicastframe_filter(control); - break; - - case CONTROL_BROADCASTFRAME_FILTER : - ret = ether_set_broadcastframe_filter(control); - break; - - /* Commands not supported */ - default : - ret = ETHER_ERR_INVALID_ARG; - break; - } - return ret; -} /* End of function R_ETHER_Control() */ - -/*********************************************************************************************************************** - * Function Name: R_ETHER_GetVersion - * Description : Returns this module's version information. - * The version number is encoded where the top 2 bytes are the major version number and the bottom 2 bytes - * are the minor version number. For example, Version 4.25 would be returned as 0x00040019. - * Arguments : none - * Return Value : Version number - ***********************************************************************************************************************/ -R_ATTRIB_INLINE -uint32_t R_ETHER_GetVersion (void) -{ - return ((((uint32_t) ETHER_RX_VERSION_MAJOR) << 16) | ((uint32_t) ETHER_RX_VERSION_MINOR)); -} /* End of function R_ETHER_GetVersion() */ - -/* - * Private functions - */ - -/*********************************************************************************************************************** - * Function Name: ether_reset_mac - * Description : The EDMAC and EtherC are reset through the software reset. - * Arguments : channel - - * ETHERC channel number - * Return Value : none - ***********************************************************************************************************************/ -static void ether_reset_mac (uint32_t channel) -{ - volatile uint32_t i; - - /* Software reset */ -#if (ETHER_CHANNEL_MAX == 1) - if (ETHER_CHANNEL_0 == channel) - { - #if (defined(BSP_MCU_RX63N)) - EDMAC.EDMR.BIT.SWR = 1; - #elif (defined(BSP_MCU_RX65N)) - EDMAC0.EDMR.BIT.SWR = 1; - #endif - } -#elif (ETHER_CHANNEL_MAX == 2) - if (ETHER_CHANNEL_0 == channel) - { - EDMAC0.EDMR.BIT.SWR = 1; - } - else - { - EDMAC1.EDMR.BIT.SWR = 1; - } -#endif - - /* - * Waiting time until the initialization of ETHERC and EDMAC is completed is 64 cycles - * in the clock conversion of an internal bus of EDMAC. - */ - for (i = 0; i < 0x00000180; i++) - { - ; - } - -} /* End of function ether_reset_mac() */ - -/*********************************************************************************************************************** - * Function Name: ether_init_descriptors - * Description : The EDMAC descriptors and the driver buffers are initialized. - * Arguments : channel - - * ETHERC channel number - * Return Value : none - ***********************************************************************************************************************/ -static void ether_init_descriptors (uint32_t channel) -{ - descriptor_t * pdescriptor; - uint32_t i; - - /* Initialize the receive descriptors */ - for (i = 0; i < ETHER_CFG_EMAC_RX_DESCRIPTORS; i++) - { - pdescriptor = (descriptor_t *) &rx_descriptors[channel][i]; - pdescriptor->buf_p = (uint8_t *) &(ether_buffers[channel].buffer[i][0]); - pdescriptor->bufsize = ETHER_CFG_BUFSIZE; - pdescriptor->size = 0; - pdescriptor->status = RACT; - pdescriptor->next = (descriptor_t *) &rx_descriptors[channel][(i + 1)]; - } - - /* The last descriptor points back to the start */ - pdescriptor->status |= RDLE; - pdescriptor->next = (descriptor_t *) &rx_descriptors[channel][0]; - - /* Initialize application receive descriptor pointer */ - papp_rx_desc[channel] = (descriptor_t *) &rx_descriptors[channel][0]; - - /* Initialize the transmit descriptors */ - for (i = 0; i < ETHER_CFG_EMAC_TX_DESCRIPTORS; i++) - { - pdescriptor = (descriptor_t *) &tx_descriptors[channel][i]; - pdescriptor->buf_p = (uint8_t *) &(ether_buffers[channel].buffer[(ETHER_CFG_EMAC_RX_DESCRIPTORS + i)][0]); - pdescriptor->bufsize = 1; /* Set a value equal to or greater than 1. (reference to UMH) - When transmitting data, the value of size is set to the function argument - R_ETHER_Write_ZC2_SetBuf. */ - pdescriptor->size = 0; /* Reserved : The write value should be 0. (reference to UMH) */ - pdescriptor->status = 0; - pdescriptor->next = (descriptor_t *) &(tx_descriptors[channel][(i + 1)]); - } - - /* The last descriptor points back to the start */ - pdescriptor->status |= TDLE; - pdescriptor->next = (descriptor_t *) &tx_descriptors[channel][0]; - - /* Initialize application transmit descriptor pointer */ - papp_tx_desc[channel] = (descriptor_t *) &tx_descriptors[channel][0]; -} /* End of function ether_init_descriptors() */ - -/*********************************************************************************************************************** - * Function Name: ether_config_ethernet - * Description : Configure the Ethernet Controller (EtherC) and the Ethernet - * Direct Memory Access controller (EDMAC). - * Arguments : channel - - * ETHERC channel number - * mode - - * The operational mode is specified. - * NO_USE_MAGIC_PACKET_DETECT (0) - Communicate mode usually - * USE_MAGIC_PACKET_DETECT (1) - Magic packet detection mode - * Return Value : none - ***********************************************************************************************************************/ -static void ether_config_ethernet (uint32_t channel, const uint8_t mode) -{ - volatile struct st_etherc __evenaccess * petherc_adr; - volatile struct st_edmac __evenaccess * pedmac_adr; - const ether_control_t * pether_ch; - uint32_t phy_access; - - if (ETHER_CHANNEL_MAX <= channel) - { - return; - } - - pether_ch = g_eth_control_ch[channel].pether_control; - phy_access = g_eth_control_ch[channel].phy_access; - petherc_adr = pether_ch[phy_access].petherc; - pedmac_adr = pether_ch[phy_access].pedmac; - - /* Magic packet detection mode */ - if (USE_MAGIC_PACKET_DETECT == mode) - { -#if (ETHER_CFG_USE_LINKSTA == 1) - petherc_adr->ECSIPR.LONG = 0x00000006; -#elif (ETHER_CFG_USE_LINKSTA == 0) - petherc_adr->ECSIPR.LONG = 0x00000002; -#endif - pedmac_adr->EESIPR.LONG = 0x00400000; - } - - /* Normal mode */ - else - { -#if (ETHER_CFG_USE_LINKSTA == 1) - /* LINK Signal Change Interrupt Enable */ - petherc_adr->ECSR.BIT.LCHNG = 1; - petherc_adr->ECSIPR.BIT.LCHNGIP = 1; -#endif - pedmac_adr->EESIPR.BIT.ECIIP = 1; - - /* Frame receive interrupt and frame transmit end interrupt */ - pedmac_adr->EESIPR.BIT.FRIP = 1; /* Enable the frame receive interrupt. */ - pedmac_adr->EESIPR.BIT.TCIP = 1; /* Enable the frame transmit end interrupt. */ - } - - /* Ethernet length 1514bytes + CRC and intergap is 96-bit time */ - petherc_adr->RFLR.LONG = 1518; - petherc_adr->IPGR.LONG = 0x00000014; - - /* Continuous reception number of Broadcast frame */ - petherc_adr->BCFRR.LONG = bc_filter_count[channel]; - -#ifdef __LIT - /* Set little endian mode */ - /* Ethernet length 1514bytes + CRC and intergap is 96-bit time */ - pedmac_adr->EDMR.BIT.DE = 1; -#endif - /* __LIT */ - - /* Initialize Rx descriptor list address */ - /* Casting the pointer to a uint32_t type is valid because the Renesas Compiler uses 4 bytes per pointer. */ - pedmac_adr->RDLAR = (void*) papp_rx_desc[channel]; - - /* Initialize Tx descriptor list address */ - /* Casting the pointer to a uint32_t type is valid because the Renesas Compiler uses 4 bytes per pointer. */ - pedmac_adr->TDLAR = (void*) papp_tx_desc[channel]; - - if (ETHER_MC_FILTER_ON == mc_filter_flag[channel]) - { - /* Reflect the EESR.RMAF bit status in the RD0.RFS bit in the receive descriptor */ - pedmac_adr->TRSCER.LONG = 0x00000000; - } - else - { - /* Don't reflect the EESR.RMAF bit status in the RD0.RFS bit in the receive descriptor */ - pedmac_adr->TRSCER.LONG = 0x00000080; - } - - /* Threshold of Tx_FIFO */ - /* To prevent a transmit underflow, setting the initial value (store and forward modes) is recommended. */ - pedmac_adr->TFTR.LONG = 0x00000000; - -#if (defined(BSP_MCU_RX63N) || defined(BSP_MCU_RX65N)) - /* transmit fifo & receive fifo is 2048 bytes */ - pedmac_adr->FDR.LONG = 0x00000707; -#elif (defined(BSP_MCU_RX64M) || defined(BSP_MCU_RX71M)) - /* transmit fifo is 2048 bytes, receive fifo is 4096 bytes */ - pedmac_adr->FDR.LONG = 0x0000070F; -#endif - - /* Configure receiving method - b0 RNR - Receive Request Bit Reset - Continuous reception of multiple frames is possible. - b31:b1 Reserved set to 0 - */ - pedmac_adr->RMCR.LONG = 0x00000001; - -} /* End of function ether_config_ethernet() */ - -/*********************************************************************************************************************** - * Function Name: ether_pause_resolution - * Description : Determines PAUSE frame generation and handling. Uses - * the resolution Table 28B-3 of IEEE 802.3-2008. - * Arguments : local_ability - - * local PAUSE capability (2 least significant bits) - * partner_ability - - * link partner PAUSE capability (2 least significant bits) - * *ptx_pause - - * pointer to location to store the result of the table lookup for transmit - * PAUSE. 1 is enable, 0 is disable. - * *prx_pause - - * pointer to location to store the result of the table lookup for receive - * PAUSE. 1 is enable, 0 is disable. - * Return Value : none - ***********************************************************************************************************************/ -static void ether_pause_resolution (uint16_t local_ability, uint16_t partner_ability, uint16_t *ptx_pause, - uint16_t *prx_pause) -{ - uint32_t i; - uint32_t ability_compare; - - /* - * Arrange the bits so that they correspond to the Table 28B-3 - * of the IEEE 802.3 values. - */ - ability_compare = (uint32_t) (((local_ability & LINK_RES_ABILITY_MASK) << LINK_RES_LOCAL_ABILITY_BITSHIFT) - | (partner_ability & LINK_RES_ABILITY_MASK)); - - /* Walk through the look up table */ - for (i = 0; i < PAUSE_TABLE_ENTRIES; i++) - { - if ((ability_compare & pause_resolution[i].mask) == pause_resolution[i].value) - { - (*ptx_pause) = pause_resolution[i].transmit; - (*prx_pause) = pause_resolution[i].receive; - return; - } - } -} /* End of function ether_pause_resolution() */ - -/*********************************************************************************************************************** - * Function Name: ether_configure_mac - * Description : Software reset is executed, and ETHERC and EDMAC are configured. - * Arguments : channel - - * ETHERC channel number - * mac_addr - - * The MAC address of ETHERC - * mode - - * The operational mode is specified. - * NO_USE_MAGIC_PACKET_DETECT (0) - Communicate mode usually - * USE_MAGIC_PACKET_DETECT (1) - Magic packet detection mode - * Return Value : none - ***********************************************************************************************************************/ -static void ether_configure_mac (uint32_t channel, const uint8_t mac_addr[], const uint8_t mode) -{ - uint32_t mac_h; - uint32_t mac_l; - volatile struct st_etherc __evenaccess * petherc_adr; - const ether_control_t * pether_ch; - uint32_t phy_access; - - if (ETHER_CHANNEL_MAX <= channel) - { - return; - } - - pether_ch = g_eth_control_ch[channel].pether_control; - phy_access = g_eth_control_ch[channel].phy_access; - petherc_adr = pether_ch[phy_access].petherc; - - /* Software reset */ - ether_reset_mac(channel); - - /* Set MAC address */ - mac_h = (((((uint32_t) mac_addr[0] << 24) | ((uint32_t) mac_addr[1] << 16)) | ((uint32_t) mac_addr[2] << 8)) - | (uint32_t) mac_addr[3]); - - mac_l = (((uint32_t) mac_addr[4] << 8) | (uint32_t) mac_addr[5]); - - petherc_adr->MAHR = mac_h; - petherc_adr->MALR.LONG = mac_l; - - /* Initialize receive and transmit descriptors */ - ether_init_descriptors(channel); - - /* Perform reset of hardware interface configuration */ - ether_config_ethernet(channel, mode); - -} /* End of function ether_configure_mac() */ - -/*********************************************************************************************************************** - * Function Name: ether_do_link - * Description : Determines the partner PHY capability through - * auto-negotiation process. The link abilities - * are handled to determine duplex, speed and flow - * control (PAUSE frames). - * Arguments : channel - - * ETHERC channel number - * mode - - * The operational mode is specified. - * NO_USE_MAGIC_PACKET_DETECT (0) - Communicate mode usually - * USE_MAGIC_PACKET_DETECT (1) - Magic packet detection mode - * Return Value : ETHER_SUCCESS - - * Processing completed successfully - * ETHER_ERR_INVALID_CHAN - - * Nonexistent channel number - * ETHER_ERR_OTHER - - * Auto-negotiation of PHY-LSI is not completed or result of Auto-negotiation is abnormal. - ***********************************************************************************************************************/ -static ether_return_t ether_do_link (uint32_t channel, const uint8_t mode) -{ - ether_return_t ret; - uint16_t link_speed_duplex = 0; - uint16_t local_pause_bits = 0; - uint16_t partner_pause_bits = 0; - uint16_t transmit_pause_set = 0; - uint16_t receive_pause_set = 0; - uint16_t full_duplex = 0; - uint16_t link_result = 0; - volatile struct st_etherc __evenaccess * petherc_adr; - volatile struct st_edmac __evenaccess * pedmac_adr; - const ether_control_t * pether_ch; - uint32_t phy_access; - - if (ETHER_CHANNEL_MAX <= channel) - { - return ETHER_ERR_INVALID_CHAN; - } - - pether_ch = g_eth_control_ch[channel].pether_control; - phy_access = g_eth_control_ch[channel].phy_access; - petherc_adr = pether_ch[phy_access].petherc; - pedmac_adr = pether_ch[phy_access].pedmac; - - /* Set the link status */ - link_result = phy_set_autonegotiate(channel, &link_speed_duplex, &local_pause_bits, &partner_pause_bits); - - if (R_PHY_OK == link_result) - { - switch (link_speed_duplex) - { - /* Half duplex link */ - case PHY_LINK_100H : - petherc_adr->ECMR.BIT.DM = 0; - petherc_adr->ECMR.BIT.RTM = 1; - ret = ETHER_SUCCESS; - break; - - case PHY_LINK_10H : - petherc_adr->ECMR.BIT.DM = 0; - petherc_adr->ECMR.BIT.RTM = 0; - ret = ETHER_SUCCESS; - break; - - /* Full duplex link */ - case PHY_LINK_100F : - petherc_adr->ECMR.BIT.DM = 1; - petherc_adr->ECMR.BIT.RTM = 1; - full_duplex = 1; - ret = ETHER_SUCCESS; - break; - - case PHY_LINK_10F : - petherc_adr->ECMR.BIT.DM = 1; - petherc_adr->ECMR.BIT.RTM = 0; - full_duplex = 1; - ret = ETHER_SUCCESS; - break; - - default : - ret = ETHER_ERR_OTHER; - break; - } - - /* At the communicate mode usually */ - if (ETHER_SUCCESS == ret) - { - if (NO_USE_MAGIC_PACKET_DETECT == mode) - { - - /* When pause frame is used */ - if ((full_duplex) && (ETHER_FLAG_ON == pause_frame_enable[channel])) - { - /* Set automatic PAUSE for 512 bit-time */ - petherc_adr->APR.LONG = 0x0000FFFF; - - /* Set unlimited retransmit of PAUSE frames */ - petherc_adr->TPAUSER.LONG = 0; - - /* PAUSE flow control FIFO settings. */ - pedmac_adr->FCFTR.LONG = 0x00000000; - - /* Control of a PAUSE frame whose TIME parameter value is 0 is enabled. */ - petherc_adr->ECMR.BIT.ZPF = 1; - - /** - * Enable PAUSE for full duplex link depending on - * the pause resolution results - */ - ether_pause_resolution(local_pause_bits, partner_pause_bits, &transmit_pause_set, - &receive_pause_set); - - if (XMIT_PAUSE_ON == transmit_pause_set) - { - /* Enable automatic PAUSE frame transmission */ - petherc_adr->ECMR.BIT.TXF = 1; - } - else - { - /* Disable automatic PAUSE frame transmission */ - petherc_adr->ECMR.BIT.TXF = 0; - } - - if (RECV_PAUSE_ON == receive_pause_set) - { - /* Enable reception of PAUSE frames */ - petherc_adr->ECMR.BIT.RXF = 1; - } - else - { - /* Disable reception of PAUSE frames */ - petherc_adr->ECMR.BIT.RXF = 0; - } - } - - /* When pause frame is not used */ - else - { - /* Disable PAUSE for half duplex link */ - petherc_adr->ECMR.BIT.TXF = 0; - petherc_adr->ECMR.BIT.RXF = 0; - } - - /* Set the promiscuous mode bit */ - petherc_adr->ECMR.BIT.PRM = promiscuous_mode[channel]; - - /* Enable receive and transmit. */ - petherc_adr->ECMR.BIT.RE = 1; - petherc_adr->ECMR.BIT.TE = 1; - - /* Enable EDMAC receive */ - pedmac_adr->EDRRR.LONG = 0x1; - } - - /* At the magic packet detection mode */ - else - { - /* The magic packet detection is permitted. */ - petherc_adr->ECMR.BIT.MPDE = 1; - - /* Because data is not transmitted for the magic packet detection waiting, - only the reception is permitted. */ - petherc_adr->ECMR.BIT.RE = 1; - - /* - * The reception function of EDMAC keep invalidity - * because the receive data don't need to be read when the magic packet detection mode. - */ - } - } - } - else - { - ret = ETHER_ERR_OTHER; - } - - return ret; -} /* End of function ether_do_link() */ - -/*********************************************************************************************************************** - * Function Name: ether_set_callback - * Description : Set the callback function - * Arguments : control - - * Callback function pointer. - * If you would rather poll for finish then please input FIT_NO_FUNC for this argument. - * Return Value : ETHER_SUCCESS - * Processing completed successfully - ***********************************************************************************************************************/ -static ether_return_t ether_set_callback (ether_param_t const control) -{ - void (*pcb_func) (void *); - - pcb_func = control.ether_callback.pcb_func; - - /* Check callback function pointer, of whether or NULL FIT_NO_FUNC */ - if ((NULL != pcb_func) && (FIT_NO_FUNC != pcb_func)) - { - cb_func.pcb_func = pcb_func; /* Set the callback function */ - } - - return ETHER_SUCCESS; -} /* End of function ether_set_callback() */ - -/*********************************************************************************************************************** - * Function Name: ether_set_promiscuous_mode - * Description : Set promiscuous mode bit - * Arguments : control - - * Promiscuous mode bit - * Return Value : ETHER_SUCCESS - - * Processing completed successfully - * ETHER_ERR_INVALID_CHAN - - * Nonexistent channel number - ***********************************************************************************************************************/ -static ether_return_t ether_set_promiscuous_mode (ether_param_t const control) -{ - ether_promiscuous_t * p_arg; - uint32_t channel; - - p_arg = control.p_ether_promiscuous; - channel = p_arg->channel; - - if (ETHER_CHANNEL_MAX <= channel) - { - return ETHER_ERR_INVALID_CHAN; - } - else - { - promiscuous_mode[channel] = p_arg->bit; - } - return ETHER_SUCCESS; -} /* End of function ether_set_promiscuous_mode() */ - -/*********************************************************************************************************************** - * Function Name: ether_set_int_handler - * Description : Set the interrupt handler - * Arguments : control - - * Interrupt handler pointer. - * If you would rather poll for finish then please input FIT_NO_FUNC for this argument. - * Return Value : ETHER_SUCCESS - - * Processing completed successfully - * ETHER_ERR_INVALID_ARG - - * Invalid argument - ***********************************************************************************************************************/ -static ether_return_t ether_set_int_handler (ether_param_t const control) -{ - void (*pcb_int_hnd) (void *); - ether_return_t ret = ETHER_ERR_INVALID_ARG; - - pcb_int_hnd = control.ether_int_hnd.pcb_int_hnd; - if (NULL != pcb_int_hnd) - { - cb_func.pcb_int_hnd = pcb_int_hnd; - ret = ETHER_SUCCESS; - } - return ret; -} /* End of function ether_set_int_handler() */ - -/*********************************************************************************************************************** - * Function Name: ether_power_on - * Description : Turns on power to a ETHER channel. - * Arguments : control - - * Ethernet channel number - * Return Value : ETHER_SUCCESS - - * Processing completed successfully - * ETHER_ERR_INVALID_CHAN - - * Nonexistent channel number - * ETHER_ERR_CHAN_OPEN - - * Indicates the Ethernet cannot be opened because it is being used by another application - * ETHER_ERR_INVALID_ARG - - * Invalid argument - ***********************************************************************************************************************/ -static ether_return_t ether_power_on (ether_param_t const control) -{ - uint32_t channel; - const ether_control_t * pether_ch; - uint32_t phy_access; - ether_return_t ret; - - ret = ETHER_ERR_INVALID_ARG; - channel = (uint32_t) control.channel; - - if (ETHER_CHANNEL_MAX > channel) - { - pether_ch = g_eth_control_ch[channel].pether_control; - phy_access = g_eth_control_ch[channel].phy_access; - - /* Set port connect */ - ether_set_phy_mode(pether_ch[phy_access].port_connect); - - /* ETHERC/EDMAC Power on */ - ret = power_on_control(channel); - } - return ret; -} /* End of function ether_power_on() */ - -/*********************************************************************************************************************** - * Function Name: ether_power_off - * Description : Turns on power to a ETHER channel. - * Arguments : control - - * Ethernet channel number - * Return Value : ETHER_SUCCESS - - * Processing completed successfully - * ETHER_ERR_INVALID_ARG - - * Invalid argument - ***********************************************************************************************************************/ -static ether_return_t ether_power_off (ether_param_t const control) -{ - uint32_t channel; - ether_return_t ret; - - ret = ETHER_ERR_INVALID_ARG; - channel = (uint32_t) control.channel; - - if (ETHER_CHANNEL_MAX > channel) - { - /* ETHERC/EDMAC Power off */ - power_off_control(channel); - ret = ETHER_SUCCESS; - } - return ret; -} /* End of function ether_power_off() */ - -/*********************************************************************************************************************** - * Function Name: power_on - * Description : Turns on power to a ETHER channel. - * Arguments : channel - - * ETHERC channel number - * Return Value : ETHER_SUCCESS - - * Processing completed successfully - * ETHER_ERR_INVALID_CHAN - - * Nonexistent channel number - * ETHER_ERR_CHAN_OPEN - - * Indicates the Ethernet cannot be opened because it is being used by another application - ***********************************************************************************************************************/ -static ether_return_t power_on (uint32_t channel) -{ - /* Check argument */ - if (ETHER_CHANNEL_MAX <= channel) - { - /* Should never get here. Valid channel number is checked above. */ - return ETHER_ERR_INVALID_CHAN; - } - -#if (ETHER_CHANNEL_MAX == 1) - #if (defined(BSP_MCU_RX63N)) - /* Attempt to obtain lock so we know we have exclusive access to ETHER channel. */ - if (false == R_BSP_HardwareLock((mcu_lock_t)(BSP_LOCK_ETHERC))) - { - return ETHER_ERR_CHAN_OPEN; - } - - /* Attempt to obtain lock so we know we have exclusive access to EDMAC channel. */ - if (false == R_BSP_HardwareLock((mcu_lock_t)(BSP_LOCK_EDMAC))) - { - /* Release reservation on peripheral. */ - R_BSP_HardwareUnlock((mcu_lock_t)(BSP_LOCK_ETHERC)); - return ETHER_ERR_CHAN_OPEN; - } - #elif (defined(BSP_MCU_RX65N)) - /* Attempt to obtain lock so we know we have exclusive access to ETHER channel. */ - if (false == R_BSP_HardwareLock((mcu_lock_t) (BSP_LOCK_ETHERC0))) - { - return ETHER_ERR_CHAN_OPEN; - } - - /* Attempt to obtain lock so we know we have exclusive access to EDMAC channel. */ - if (false == R_BSP_HardwareLock((mcu_lock_t) (BSP_LOCK_EDMAC0))) - { - /* Release reservation on peripheral. */ - R_BSP_HardwareUnlock((mcu_lock_t) (BSP_LOCK_ETHERC0)); - return ETHER_ERR_CHAN_OPEN; - } - #endif -#elif (ETHER_CHANNEL_MAX == 2) - /* Attempt to obtain lock so we know we have exclusive access to ETHER channel. */ - if (false == R_BSP_HardwareLock((mcu_lock_t)(BSP_LOCK_ETHERC0 + channel))) - { - return ETHER_ERR_CHAN_OPEN; - } - - /* Attempt to obtain lock so we know we have exclusive access to EDMAC channel. */ - if (false == R_BSP_HardwareLock((mcu_lock_t)(BSP_LOCK_EDMAC0 + channel))) - { - /* Release reservation on peripheral. */ - R_BSP_HardwareUnlock((mcu_lock_t)(BSP_LOCK_ETHERC0 + channel)); - return ETHER_ERR_CHAN_OPEN; - } -#endif - - /* Enable writing to MSTP registers. */ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_LPC_CGC_SWR); - - /* Enable selected ETHERC/EDMAC Channel. */ -#if (ETHER_CHANNEL_MAX == 1) - if (ETHER_CHANNEL_0 == channel) - { - #if (defined(BSP_MCU_RX63N)) - MSTP(EDMAC) = 0; - #elif (defined(BSP_MCU_RX65N)) - MSTP(EDMAC0) = 0; - #endif - } -#elif (ETHER_CHANNEL_MAX == 2) - if (ETHER_CHANNEL_0 == channel) - { - MSTP(EDMAC0) = 0; - } - else - { - MSTP(EDMAC1) = 0; - } -#endif - - /* Disable writing to MSTP registers. */ - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_LPC_CGC_SWR); - - return ETHER_SUCCESS; -} /* End of function power_on() */ - -/*********************************************************************************************************************** - * Function Name: power_off - * Description : Turns off power to a ETHER channel. - * Arguments : channel - - * ETHERC channel number - * Return Value : none - ***********************************************************************************************************************/ -static void power_off (uint32_t channel) -{ - - /* Check argument */ - if (ETHER_CHANNEL_MAX <= channel) - { - /* Should never get here. Valid channel number is checked above. */ - return; - } - - /* Enable writing to MSTP registers. */ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_LPC_CGC_SWR); - - /* Disable selected ETHERC/EDMAC Channel. */ -#if (ETHER_CHANNEL_MAX == 1) - if (ETHER_CHANNEL_0 == channel) - { - #if (defined(BSP_MCU_RX63N)) - MSTP(EDMAC) = 1; - #elif (defined(BSP_MCU_RX65N)) - MSTP(EDMAC0) = 1; - #endif - } -#elif (ETHER_CHANNEL_MAX == 2) - if (ETHER_CHANNEL_0 == channel) - { - MSTP(EDMAC0) = 1; - } - else - { - MSTP(EDMAC1) = 1; - } -#endif - - /* Disable writing to MSTP registers. */ - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_LPC_CGC_SWR); - - /* Release reservation on peripheral. */ -#if (ETHER_CHANNEL_MAX == 1) - #if (defined(BSP_MCU_RX63N)) - R_BSP_HardwareUnlock((mcu_lock_t)(BSP_LOCK_ETHERC)); - R_BSP_HardwareUnlock((mcu_lock_t)(BSP_LOCK_EDMAC)); - #elif (defined(BSP_MCU_RX65N)) - R_BSP_HardwareUnlock((mcu_lock_t) (BSP_LOCK_ETHERC0)); - R_BSP_HardwareUnlock((mcu_lock_t) (BSP_LOCK_EDMAC0)); - #endif -#elif (ETHER_CHANNEL_MAX == 2) - R_BSP_HardwareUnlock((mcu_lock_t)(BSP_LOCK_ETHERC0 + channel)); - R_BSP_HardwareUnlock((mcu_lock_t)(BSP_LOCK_EDMAC0 + channel)); -#endif - -} /* End of function power_off() */ - -/*********************************************************************************************************************** - * Function Name: ether_set_multicastframe_filter - * Description : set multicast frame filtering function. - * Arguments : control - - * Ethernet channel number and Multicast Frame filter enable switch - * Return Value : ETHER_SUCCESS - - * Processing completed successfully - * ETHER_ERR_INVALID_ARG - - * Invalid argument - * ETHER_ERR_RECV_ENABLE - - * Receive function is enable. - ***********************************************************************************************************************/ -static ether_return_t ether_set_multicastframe_filter (ether_param_t const control) -{ - ether_multicast_t * p_arg; - uint32_t channel; - ether_mc_filter_t flag; - ether_return_t ret; - uint32_t phy_access; - - volatile struct st_etherc __evenaccess * petherc_adr; - const ether_control_t * pether_ch; - - ret = ETHER_ERR_INVALID_ARG; - p_arg = control.p_ether_multicast; - channel = p_arg->channel; - flag = p_arg->flag; - - /* Check argument */ - if (ETHER_CHANNEL_MAX <= channel) - { - return ret; - } - if ((ETHER_MC_FILTER_ON != flag) && (ETHER_MC_FILTER_OFF != flag)) - { - return ret; - } - - pether_ch = g_eth_control_ch[channel].pether_control; - phy_access = g_eth_control_ch[channel].phy_access; - petherc_adr = pether_ch[phy_access].petherc; - - /* Check receive function is enable in ETHERC */ - if (0 == petherc_adr->ECMR.BIT.RE) - { - if (ETHER_MC_FILTER_ON == flag) - { - mc_filter_flag[channel] = ETHER_MC_FILTER_ON; - } - else - { - mc_filter_flag[channel] = ETHER_MC_FILTER_OFF; - } - - ret = ETHER_SUCCESS; - } - else - { - ret = ETHER_ERR_RECV_ENABLE; - } - - return ret; -} /* End of function ether_set_multicastframe_filter() */ - -/*********************************************************************************************************************** - * Function Name: ether_set_broadcastframe_filter - * Description : set broadcast frame filtering function. - * Arguments : control - - * ETHERC channel number and receive count for continuous Broadcast Frame - * Return Value : ETHER_SUCCESS - - * Processing completed successfully - * ETHER_ERR_INVALID_ARG - - * Invalid argument - * ETHER_ERR_RECV_ENABLE - - * Receive function is enable. - ***********************************************************************************************************************/ -static ether_return_t ether_set_broadcastframe_filter (ether_param_t const control) -{ - ether_broadcast_t * p_arg; - uint32_t channel; - uint32_t counter; - ether_return_t ret; - uint32_t phy_access; - - volatile struct st_etherc __evenaccess * petherc_adr; - const ether_control_t * pether_ch; - - ret = ETHER_ERR_INVALID_ARG; - p_arg = control.p_ether_broadcast; - channel = p_arg->channel; - counter = p_arg->counter; - - /* Check argument */ - if (ETHER_CHANNEL_MAX <= channel) - { - return ret; - } - if (0 != (counter & 0x0FFFF0000)) - { - return ret; - } - - pether_ch = g_eth_control_ch[channel].pether_control; - phy_access = g_eth_control_ch[channel].phy_access; - petherc_adr = pether_ch[phy_access].petherc; - - /* Check receive function is enable in ETHERC */ - if (0 == petherc_adr->ECMR.BIT.RE) - { - bc_filter_count[channel] = counter; - ret = ETHER_SUCCESS; - } - else - { - ret = ETHER_ERR_RECV_ENABLE; - } - - return ret; -} /* End of function ether_set_broadcastframe_filter() */ - -/*********************************************************************************************************************** - * Function Name: power_on_control - * Description : Powers on the channel if the ETHEC channel used and the PHY access channel are different, or if the - * PHY access channel is powered off. - * Arguments : channel - - * ETHERC channel number - * Return Value : ETHER_SUCCESS - - * Processing completed successfully - * ETHER_ERR_INVALID_CHAN - - * Nonexistent channel number - * ETHER_ERR_CHAN_OPEN - - * Indicates the Ethernet cannot be opened because it is being used by another application - * : ETHER_ERR_OTHER - - * - ***********************************************************************************************************************/ -static ether_return_t power_on_control (uint32_t channel) -{ -#if (ETHER_CHANNEL_MAX == 1) - ether_return_t ret = ETHER_ERR_OTHER; - - etherc_edmac_power_cont[ether_phy_access[channel]][channel] = ETHER_MODULE_USE; - - ret = power_on(channel); - - return ret; - -#elif ETHER_CHANNEL_MAX == 2 - ether_return_t ret = ETHER_ERR_OTHER; - - etherc_edmac_power_cont[ether_phy_access[channel]] [channel] = ETHER_MODULE_USE; - - if (channel != ether_phy_access[channel]) - { - ret = power_on(channel); - if (ETHER_SUCCESS != ret) - { - return ret; - } - } - - if (!(( ETHER_MODULE_USE == etherc_edmac_power_cont[ether_phy_access[channel]] [ETHER_CHANNEL_0] ) && - ( ETHER_MODULE_USE == etherc_edmac_power_cont[ether_phy_access[channel]] [ETHER_CHANNEL_1] ))) - { - ret = power_on(ether_phy_access[channel]); - } - - return ret; - -#endif -} /* End of function power_on_control() */ - -/*********************************************************************************************************************** - * Function Name: power_off_control - * Description : Powers off the channel if the ETHEC channel used and the PHY access channel are different, or if the - * PHY access channel is powered off. - * Arguments : channel - - * ETHERC channel number - * Return Value : none - ***********************************************************************************************************************/ -static void power_off_control (uint32_t channel) -{ -#if (ETHER_CHANNEL_MAX == 1) - etherc_edmac_power_cont[ether_phy_access[channel]][channel] = ETEHR_MODULE_NOT_USE; - - power_off(channel); - -#elif (ETHER_CHANNEL_MAX == 2) - etherc_edmac_power_cont[ether_phy_access[channel]] [channel] = ETEHR_MODULE_NOT_USE; - - if (channel != ether_phy_access[channel]) - { - power_off(channel); - } - - if (( ETEHR_MODULE_NOT_USE == etherc_edmac_power_cont[ether_phy_access[channel]] [ETHER_CHANNEL_0] ) && - ( ETEHR_MODULE_NOT_USE == etherc_edmac_power_cont[ether_phy_access[channel]] [ETHER_CHANNEL_1] )) - { - power_off(ether_phy_access[channel]); - } -#endif -} /* End of function power_off_control() */ - -/*********************************************************************************************************************** - * Function Name: check_mpde_bit - * Description : - * Arguments : none - * Return Value : 1: Magic Packet detection is enabled. - * 0: Magic Packet detection is disabled. - ***********************************************************************************************************************/ -static uint8_t check_mpde_bit (void) -{ -#if (ETHER_CHANNEL_MAX == 1) - #if (defined(BSP_MCU_RX63N)) - /* The MPDE bit can be referred to only when ETHERC operates. */ - if ( (ETHER_MODULE_USE == etherc_edmac_power_cont[ETHER_PHY_ACCESS_CHANNEL_0] [ETHER_CHANNEL_0]) - && (1 == ETHERC.ECMR.BIT.MPDE) - ) - { - return 1; - } - else - { - return 0; - } - #elif (defined(BSP_MCU_RX65N)) - /* The MPDE bit can be referred to only when ETHERC operates. */ - if ((ETHER_MODULE_USE == etherc_edmac_power_cont[ETHER_PHY_ACCESS_CHANNEL_0][ETHER_CHANNEL_0]) - && (1 == ETHERC0.ECMR.BIT.MPDE)) - { - return 1; - } - else - { - return 0; - } - #endif -#elif (ETHER_CHANNEL_MAX == 2) - /* The MPDE bit can be referred to only when ETHERC0 operates. */ - if ( ( ((ETHER_MODULE_USE == etherc_edmac_power_cont[ETHER_PHY_ACCESS_CHANNEL_0] [ETHER_CHANNEL_0]) - || (ETHER_MODULE_USE == etherc_edmac_power_cont[ETHER_PHY_ACCESS_CHANNEL_1] [ETHER_CHANNEL_0])) - && (1 == ETHERC0.ECMR.BIT.MPDE) - ) - - /* The MPDE bit can be referred to only when ETHERC1 operates. */ - || ( ((ETHER_MODULE_USE == etherc_edmac_power_cont[ETHER_PHY_ACCESS_CHANNEL_0] [ETHER_CHANNEL_1]) - || (ETHER_MODULE_USE == etherc_edmac_power_cont[ETHER_PHY_ACCESS_CHANNEL_1] [ETHER_CHANNEL_1])) - && (1 == ETHERC1.ECMR.BIT.MPDE) - ) - ) - { - return 1; - } - else - { - return 0; - } -#endif -} /* End of function check_mpde_bit() */ - -#if defined(BSP_MCU_RX63N) -/*********************************************************************************************************************** - * Function Name: ether_eint - * Description : EINT interrupt processing - * Arguments : none - * Return Value : none - ***********************************************************************************************************************/ -R_PRAGMA_INTERRUPT(ether_eint, VECT(ETHER,EINT)) -void ether_eint(void) -{ - ether_int_common(ETHER_CHANNEL_0); -} /* End of function ether_eint() */ - -#elif (defined(BSP_MCU_RX64M) || defined(BSP_MCU_RX71M) || defined(BSP_MCU_RX65N)) -/*********************************************************************************************************************** - * Function Name: ether_eint0 - * Description : EINT0 interrupt processing (A callback function to be called from r_bsp.) - * Arguments : pparam - - * unused - * Return Value : none - ***********************************************************************************************************************/ -static void ether_eint0 (void * pparam) -{ - volatile uint32_t dummy; - - ether_int_common(ETHER_CHANNEL_0); - - dummy = (uint32_t) pparam; -} /* End of function ether_eint0() */ -#endif - -#if (defined(BSP_MCU_RX64M) || defined(BSP_MCU_RX71M)) -/*********************************************************************************************************************** - * Function Name: ether_eint1 - * Description : EINT1 interrupt processing (A callback function to be called from r_bsp.) - * Arguments : pparam - - * unused - * Return Value : none - ***********************************************************************************************************************/ -static void ether_eint1(void * pparam) -{ - volatile uint32_t dummy; - - ether_int_common(ETHER_CHANNEL_1); - - dummy = (uint32_t)pparam; -} /* End of function ether_eint1() */ -#endif - -/*********************************************************************************************************************** - * Function Name: ether_int_common - * Description : Interrupt handler for Ethernet receive and transmit interrupts. - * Arguments : channel - - * ETHERC channel number - * Return Value : none - ***********************************************************************************************************************/ -static void ether_int_common (uint32_t channel) -{ - uint32_t status_ecsr; - uint32_t status_eesr; - volatile struct st_etherc __evenaccess * petherc_adr; - volatile struct st_edmac __evenaccess * pedmac_adr; - const ether_control_t * pether_ch; - uint32_t phy_access; - ether_cb_arg_t cb_arg; - - pether_ch = g_eth_control_ch[channel].pether_control; - phy_access = g_eth_control_ch[channel].phy_access; - petherc_adr = pether_ch[phy_access].petherc; - pedmac_adr = pether_ch[phy_access].pedmac; - - status_ecsr = petherc_adr->ECSR.LONG; - status_eesr = pedmac_adr->EESR.LONG; - - /* Callback : Interrupt handler */ - if ((NULL != cb_func.pcb_int_hnd) && (FIT_NO_FUNC != cb_func.pcb_int_hnd)) - { - cb_arg.channel = channel; - cb_arg.status_ecsr = status_ecsr; - cb_arg.status_eesr = status_eesr; - (*cb_func.pcb_int_hnd)((void *) &cb_arg); - } - - /* When the ETHERC status interrupt is generated */ - if (status_eesr & EMAC_ECI_INT) - { -#if (ETHER_CFG_USE_LINKSTA == 1) - /* When the link signal change interrupt is generated */ - if (EMAC_LCHNG_INT == (status_ecsr & EMAC_LCHNG_INT)) - { - /* The state of the link signal is confirmed and Link Up/Down is judged. */ - /* When becoming Link up */ - if (ETHER_CFG_LINK_PRESENT == petherc_adr->PSR.BIT.LMON) - { - lchng_flag[channel] = ETHER_FLAG_ON_LINK_ON; - } - - /* When Link becomes down */ - else - { - lchng_flag[channel] = ETHER_FLAG_ON_LINK_OFF; - } - } -#endif - - /* When the Magic Packet detection interrupt is generated */ - if (EMAC_MPD_INT == (status_ecsr & EMAC_MPD_INT)) - { - mpd_flag[channel] = ETHER_FLAG_ON; - } - - /* - * Because each bit of the ECSR register is cleared when one is written, - * the value read from the register is written and the bit is cleared. - */ - /* Clear all ETHERC status BFR, PSRTO, LCHNG, MPD, ICD */ - petherc_adr->ECSR.LONG = status_ecsr; - } - - /* - * Because each bit of the EESR register is cleared when one is written, - * the value read from the register is written and the bit is cleared. - */ - pedmac_adr->EESR.LONG = status_eesr; /* Clear EDMAC status bits */ - - /* Whether it is a necessary code is confirmed. */ - -} /* End of function ether_int_common() */ diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/src/r_ether_rx_private.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/src/r_ether_rx_private.h deleted file mode 100644 index e130ea6de2a..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/src/r_ether_rx_private.h +++ /dev/null @@ -1,308 +0,0 @@ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_ether_rx_private.h - * Version : 1.13 - * Device : RX63N/RX65N/RX64M/RX71M - * Tool-Chain : RX Family C Compiler - * H/W Platform : - * Description : File that defines macro and structure seen only in "r_ether_rx.c" file. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * History : DD.MM.YYYY Version Description - * : 22.07.2014 1.00 First Release - * : 16.12.2014 1.01 Added changes for RX71M. - * : 29.01.2015 1.02 Correction of version check. - * : 31.03.2016 1.03 Added changes for RX63N. - * : 01.10.2016 1.04 Added changes for RX65N. - * : 01.10.2017 1.13 Removed BSP version error. - ***********************************************************************************************************************/ - -/* Guards against multiple inclusion */ -#ifndef R_ETHER_PRIVATE_H - #define R_ETHER_PRIVATE_H - -/* This checks that the module of the Ethernet is supported to the MCU that has been selected for sure. */ - #if (defined(BSP_MCU_RX63N) || defined(BSP_MCU_RX65N) || defined(BSP_MCU_RX64M) || defined(BSP_MCU_RX71M)) - - #else - #error "This MCU is not supported by the current r_ether_rx module." - #endif - -/*********************************************************************************************************************** - Includes , "Project Includes" - ***********************************************************************************************************************/ - #include "r_ether_rx_if.h" - #include "r_ether_rx_config.h" - -/*********************************************************************************************************************** - Macro definitions - ***********************************************************************************************************************/ - -/* Check the setting values is valid. Please review the setting values in r_ether_rx_config.h if error message is output */ - #if !((ETHER_CFG_MODE_SEL == 0) || (ETHER_CFG_MODE_SEL == 1)) - #error "ERROR- ETHER_CFG_MODE_SEL - Ethernet interface select is out of range defined in r_ether_rx_config.h." - #endif - - #if !((ETHER_CFG_CH0_PHY_ADDRESS >= 0) && (ETHER_CFG_CH0_PHY_ADDRESS <= 31)) - #error "ERROR- ETHER_CFG_CH0_PHY_ADDRESS - PHY-LSI address is out of range defined in r_ether_rx_config.h." - #endif - - #if !((ETHER_CFG_CH1_PHY_ADDRESS >= 0) && (ETHER_CFG_CH1_PHY_ADDRESS <= 31)) - #error "ERROR- ETHER_CFG_CH1_PHY_ADDRESS - PHY-LSI address is out of range defined in r_ether_rx_config.h." - #endif - - #if !(ETHER_CFG_EMAC_RX_DESCRIPTORS >= 1) - #error "ERROR- ETHER_CFG_EMAC_RX_DESCRIPTORS - Transmission descriptors is out of range defined in r_ether_rx_config.h." - #endif - - #if !(ETHER_CFG_EMAC_TX_DESCRIPTORS >= 1) - #error "ERROR- ETHER_CFG_EMAC_TX_DESCRIPTORS - Receive descriptors is out of range defined in r_ether_rx_config.h." - #endif - - #if !((ETHER_CFG_BUFSIZE % 32) == 0) - #error "ERROR- ETHER_CFG_BUFSIZE - transmission and receive buffers is not 32-byte aligned in r_ether_rx_config.h." - #endif - - #if !((ETHER_CFG_CH0_PHY_ACCESS == 0) || (ETHER_CFG_CH0_PHY_ACCESS == 1)) - #error "ERROR- ETHER_CFG_CH0_PHY_ACCESS - PHY-LSI access channel is out of range defined in r_ether_rx_config.h." - #endif - - #if !((ETHER_CFG_CH1_PHY_ACCESS == 0) || (ETHER_CFG_CH1_PHY_ACCESS == 1)) - #error "ERROR- ETHER_CFG_CH1_PHY_ACCESS - PHY-LSI access channel is out of range defined in r_ether_rx_config.h." - #endif - - #if !(ETHER_CFG_PHY_MII_WAIT >= 8) - #error "ERROR- ETHER_CFG_PHY_MII_WAIT - PHY-LSI access timing is out of range defined in r_ether_rx_config.h." - #endif - - #if !((ETHER_CFG_LINK_PRESENT == 0) || (ETHER_CFG_LINK_PRESENT == 1)) - #error "ERROR- ETHER_CFG_LINK_PRESENT - Link signal polarity of PHY-LSI is out of range defined in r_ether_rx_config.h." - #endif - - #if !((ETHER_CFG_USE_LINKSTA == 0) || (ETHER_CFG_USE_LINKSTA == 1)) - #error "ERROR- ETHER_CFG_USE_LINKSTA - Use LINKSTA select is out of range defined in r_ether_rx_config.h." - #endif - - #if !((ETHER_CFG_USE_PHY_KSZ8041NL == 0) || (ETHER_CFG_USE_PHY_KSZ8041NL == 1)) - #error "ERROR- ETHER_CFG_USE_PHY_KSZ8041NL - use KSZ8041NL is out of range defined in r_ether_rx_config.h." - #endif - -/* - * The total number of EMAC buffers to allocate. The number of - * total buffers is simply the sum of the number of transmit and - * receive buffers. - */ - #define EMAC_NUM_BUFFERS (ETHER_CFG_EMAC_RX_DESCRIPTORS + (ETHER_CFG_EMAC_TX_DESCRIPTORS)) - -/* Definition of the maximum / minimum number of data that can be sent at one time in the Ethernet */ - #define ETHER_BUFSIZE_MAX (1514) /* Maximum number of transmitted data */ - #define ETHER_BUFSIZE_MIN (60) /* Minimum number of transmitted data */ - -/* Bit definition of interrupt factor of Ethernet interrupt */ - #define EMAC_LCHNG_INT (1UL << 2) - #define EMAC_MPD_INT (1UL << 1) - - #define EMAC_RFCOF_INT (1UL << 24) - #define EMAC_ECI_INT (1UL << 22) - #define EMAC_TC_INT (1UL << 21) - #define EMAC_FR_INT (1UL << 18) - #define EMAC_RDE_INT (1UL << 17) - #define EMAC_RFOF_INT (1UL << 16) - -/* Bit definitions of status member of DescriptorS */ - #define TACT (0x80000000) - #define RACT (0x80000000) - #define TDLE (0x40000000) - #define RDLE (0x40000000) - #define TFP1 (0x20000000) - #define RFP1 (0x20000000) - #define TFP0 (0x10000000) - #define RFP0 (0x10000000) - #define TFE (0x08000000) - #define RFE (0x08000000) - - #define RFS9_RFOVER (0x00000200) - #define RFS8_RAD (0x00000100) - #define RFS7_RMAF (0x00000080) - #define RFS4_RRF (0x00000010) - #define RFS3_RTLF (0x00000008) - #define RFS2_RTSF (0x00000004) - #define RFS1_PRE (0x00000002) - #define RFS0_CERF (0x00000001) - - #define TWBI (0x04000000) - #define TFS8_TAD (0x00000100) - #define TFS3_CND (0x00000008) - #define TFS2_DLC (0x00000004) - #define TFS1_CD (0x00000002) - #define TFS0_TRO (0x00000001) - -/* Number of entries in PAUSE resolution table */ - #define PAUSE_TABLE_ENTRIES (8) - -/* Local device and link partner PAUSE settings */ - #define XMIT_PAUSE_OFF (0) /* The pause frame transmission is prohibited. */ - #define RECV_PAUSE_OFF (0) /* The pause frame reception is prohibited. */ - #define XMIT_PAUSE_ON (1) /* The pause frame transmission is permitted. */ - #define RECV_PAUSE_ON (1) /* The pause frame reception is permitted. */ - -/* PAUSE link mask and shift values */ -/* - * The mask value and shift value which are for that shift the bits form a line and - * for comparing the bit information of PAUSE function which support the local device and - * Link partner with the assorted table(pause_resolution) which enable or disable the PAUSE frame. - */ - #define LINK_RES_ABILITY_MASK (3) - #define LINK_RES_LOCAL_ABILITY_BITSHIFT (2) - -/* Etherc mode */ - #define NO_USE_MAGIC_PACKET_DETECT (0) - #define USE_MAGIC_PACKET_DETECT (1) - -/* Defines the port connection to be used in the Ether */ - #define PORT_CONNECT_ET0 (0x01) - #define PORT_CONNECT_ET1 (0x02) - #define PORT_CONNECT_ET0_ET1 (0x03) - -/** PHY access channel */ - #define ETHER_PHY_ACCESS_CHANNEL_0 (0) - #define ETHER_PHY_ACCESS_CHANNEL_1 (1) - #define ETHER_PHY_ACCESS_CHANNEL_MAX (ETHER_CHANNEL_MAX) - -/** Ethernet module usage status */ - #define ETEHR_MODULE_NOT_USE (0) /* Ethernet module is not used */ - #define ETHER_MODULE_USE (1) /* Ethernet module is used */ - -/*********************************************************************************************************************** - Typedef definitions - ***********************************************************************************************************************/ -/* - * EDMAC descriptor as defined in the hardware manual. It is - * modified to support little endian CPU mode. - */ - R_PRAGMA_PACK -typedef struct DescriptorS -{ - uint32_t status; - #if __LIT - /* Little endian */ - uint16_t size; - uint16_t bufsize; - #else - /* Big endian */ - uint16_t bufsize; - uint16_t size; - - #endif - uint8_t *buf_p; - struct DescriptorS *next; -} descriptor_t; - -/* - * Ethernet buffer type definition. - */ -typedef struct EtherBufferS -{ - uint8_t buffer[EMAC_NUM_BUFFERS][ETHER_CFG_BUFSIZE]; - -} etherbuffer_t; - -/* - * PauseMaskE, PauseValE and pause_resolutionS are use to create - * PAUSE resolution Table 28B-3 in IEEE 802.3-2008 standard. - */ -typedef enum PauseMaskE -{ - PAUSE_MASK0, - PAUSE_MASK1, - PAUSE_MASK2, - PAUSE_MASK3, - PAUSE_MASK4, - PAUSE_MASK5, - PAUSE_MASK6, - PAUSE_MASK7, - PAUSE_MASK8, - PAUSE_MASK9, - PAUSE_MASKA, - PAUSE_MASKB, - PAUSE_MASKC, - PAUSE_MASKD, - PAUSE_MASKE, - PAUSE_MASKF -} pausemask_t; - -typedef enum PauseValE -{ - PAUSE_VAL0, - PAUSE_VAL1, - PAUSE_VAL2, - PAUSE_VAL3, - PAUSE_VAL4, - PAUSE_VAL5, - PAUSE_VAL6, - PAUSE_VAL7, - PAUSE_VAL8, - PAUSE_VAL9, - PAUSE_VALA, - PAUSE_VALB, - PAUSE_VALC, - PAUSE_VALD, - PAUSE_VALE, - PAUSE_VALF -} pauseval_t; - -typedef struct pause_resolutionS -{ - pausemask_t mask; - pauseval_t value; - uint8_t transmit; - uint8_t receive; -} pauseresolution_t; - -typedef struct -{ - volatile struct st_etherc __evenaccess * petherc; /* ETHERC module */ - volatile struct st_edmac __evenaccess * pedmac; /* EDMAC */ - volatile uint32_t __evenaccess * preg_pir; - uint32_t phy_address; - uint8_t port_connect; -} ether_control_t; - -typedef struct -{ - const ether_control_t * pether_control; - uint32_t phy_access; -} ether_ch_control_t; - - R_PRAGMA_PACKOPTION - -/*********************************************************************************************************************** - Exported global variables - ***********************************************************************************************************************/ -extern const ether_ch_control_t g_eth_control_ch[]; - -/*********************************************************************************************************************** - Exported global functions (to be accessed by other files) - ***********************************************************************************************************************/ -void ether_enable_icu (uint32_t channel); -void ether_disable_icu (uint32_t channel); -void ether_set_phy_mode (uint8_t connect); - -#endif /* R_ETHER_PRIVATE_H */ diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/src/targets/rx65n/r_ether_setting_rx65n.c b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/src/targets/rx65n/r_ether_setting_rx65n.c deleted file mode 100644 index 279d437ef35..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/src/targets/rx65n/r_ether_setting_rx65n.c +++ /dev/null @@ -1,128 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_ether_setting_rx65n.c -* Version : 1.13 -* Device : RX65N -* Description : Ethernet module device driver -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -* : 01.10.2017 1.13 Removed ether_clear_icu_source function. -* : Added RX65N-2MB support. -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -#include "platform.h" - -#include "r_ether_rx_if.h" -#include "src/r_ether_rx_private.h" - -#if defined(BSP_MCU_RX65N) -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Imported global variables and functions (from other files) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Exported global variables (to be accessed by other files) -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Private global variables and functions -***********************************************************************************************************************/ - -/* Check the setting values is valid. Please review the setting values in r_ether_rx_config.h if error message is output */ - #if !((ETHER_CFG_AL1_INT_PRIORTY >= 1) && (ETHER_CFG_AL1_INT_PRIORTY <= 15)) - #error "ERROR- ETHER_CFG_AL1_INT_PRIORTY - Interrupt priority level is out of range defined in r_ether_rx_config.h." - #endif - -/*********************************************************************************************************************** -* Function Name: ether_enable_icu -* Description : -* Arguments : channel - -* Ethernet channel number -* Return Value : none -***********************************************************************************************************************/ -void ether_enable_icu(uint32_t channel) -{ - volatile uint32_t dummy; - bsp_int_ctrl_t int_ctrl; - - ICU.GENAL1.BIT.EN4 = 1; - - int_ctrl.ipl = ETHER_CFG_AL1_INT_PRIORTY; - R_BSP_InterruptControl(BSP_INT_SRC_AL1_EDMAC0_EINT0, BSP_INT_CMD_GROUP_INTERRUPT_ENABLE, &int_ctrl); - - dummy = channel; -} /* End of function ether_enable_icu() */ - -/*********************************************************************************************************************** -* Function Name: ether_disable_icu -* Description : -* Arguments : channel - -* Ethernet channel number -* Return Value : none -***********************************************************************************************************************/ -void ether_disable_icu(uint32_t channel) -{ - volatile uint32_t dummy; - - ICU.GENAL1.BIT.EN4 = 0; - - R_BSP_InterruptControl(BSP_INT_SRC_AL1_EDMAC0_EINT0, BSP_INT_CMD_GROUP_INTERRUPT_DISABLE, FIT_NO_PTR); - - dummy = channel; -} /* End of function ether_disable_icu() */ - -/*********************************************************************************************************************** -* Function Name: ether_set_phy_mode -* Description : -* Arguments : connect - -* Ethernet channel number -* Return Value : none -***********************************************************************************************************************/ -void ether_set_phy_mode(uint8_t connect) -{ - if (PORT_CONNECT_ET0 == (connect & PORT_CONNECT_ET0)) - { - #if (ETHER_CFG_MODE_SEL == 0) - /* MII */ - MPC.PFENET.BIT.PHYMODE0 = 1; - #elif (ETHER_CFG_MODE_SEL == 1) - /* RMII */ - MPC.PFENET.BIT.PHYMODE0 = 0; - #endif - } - -} /* End of function ether_set_phy_mode() */ - -#endif /* defined(BSP_MCU_RX65N) */ - -/* End of File */ diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_flash_rx/doc/en/r01an2184eu0320-rx.pdf b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_flash_rx/doc/en/r01an2184eu0320-rx.pdf deleted file mode 100644 index 0ba0b53e427cb53413031956061d41624fe2032d..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1215779 zcma%?Q>-vhlVz`M+qP}nwr$(CZQHhO+cv&y%|FR>=B3l=x08C`$*MYQlPZXa(K6Dp z!IB;w&o9G5F>^4n5-_WiA$j(A9 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z&HEf{FEOu~KnJBBLg++mpU-H{Ps{)0@aY+WQuAG|(s5(>Fw3wZe#bUgkfT_-x+l>; z@A>?>M7tHeIZ+(l_)ur>#CLL?a#;UW{u9K*T-2r!JDnEivc_R%t0Q<(NExziAoS&P z#7U;!1%Pl#f34ZeySD@9=#|ZI>yu~yI}oq(L=};}wqK-TE{T#B(%%Q8 z8eICt?gyVV%l|;}$SR^+)h+TRbvdvf6=KZ|5D@Y}BRk|{Z-H-+eS$b`e}m$6buHVp z4liD3mgpX>+j!|V7F)LWNCl2-cvf_E?@5tx;{J`|u`$R0PA-#Gn4^EQL)XO^z(R6#$ z{@JbJ_y4Bwf4;jamY(ux-r=odWy+VZy|&L2JBEk&I&G*1s;QbQ6fP7GBOjPeb%a3G z)`33!RS-z6IQ+BlYteMs>_r#-0?yarKlxyt%h8a;@DcH0KmiB>{Szy89tt}#gh6gi z?RLqL{|ka={r9;3{~N)xii%2biLr`sv9hp9aI=YsuzW^203}4YSh#?qtjt`0kKlp- zf#Cl!DgAeF!+#_AfAa9ZMeuC@_XytgwYR?;pbAZnQw , "Project Includes" -***********************************************************************************************************************/ -#include "platform.h" - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* Version Number of API. */ -#define CMT_RX_VERSION_MAJOR (3) -#define CMT_RX_VERSION_MINOR (20) - -/* This define is used with the R_CMT_Control() function if not channel needs to input. */ -#define CMT_RX_NO_CHANNEL (0xFFFFFFFF) - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -/* Commands that can be used with R_CMT_Control() function. */ -typedef enum -{ - CMT_RX_CMD_IS_CHANNEL_COUNTING = 0, //Used for determining if a particular CMT channel is currently being used - CMT_RX_CMD_PAUSE, //Pause a running timer without releasing it - CMT_RX_CMD_RESTART, //Restart a paused timer from zero - CMT_RX_CMD_RESUME, //Restart a paused timer without zeroing it first - CMT_RX_CMD_GET_NUM_CHANNELS //Used for getting number of CMT channels on this MCU -} cmt_commands_t; - -/*********************************************************************************************************************** -Exported global functions (to be accessed by other files) -***********************************************************************************************************************/ -bool R_CMT_CreatePeriodic(uint32_t frequency_hz, void (* callback)(void * pdata), uint32_t * channel); -bool R_CMT_CreateOneShot(uint32_t period_us, void (* callback)(void * pdata), uint32_t * channel); -bool R_CMT_Control(uint32_t channel, cmt_commands_t command, void * pdata); -bool R_CMT_Stop(uint32_t channel); -uint32_t R_CMT_GetVersion(void); - -#endif /* CMT_HEADER_FILE */ - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_cmt_rx/readme.txt b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_cmt_rx/readme.txt deleted file mode 100644 index 2ab21ef1e9d..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_cmt_rx/readme.txt +++ /dev/null @@ -1,41 +0,0 @@ -PLEASE REFER TO THE APPLICATION NOTE FOR THIS DRIVER FOR MORE INFORMATION - -r_cmt_rx -========= - -Overview --------- -This module creates a timer tick using a CMT channel based on a frequency input by the user. - - -Features --------- -* Create periodic or one-shot timer easily by passing in desired frequency/period -* User is alerted through callback function -* CMT channels are allocated dynamically. - - -File Structure --------------- -r_cmt_rx -| readme.txt -| r_cmt_rx_if.h -| -+---doc -| | -| +---en -| | r01an1856ej{VERSION_NUMBER}-rx.pdf -| | -| | -| +---ja -| r01an1856jj{VERSION_NUMBER}-rx.pdf -| -+---ref -| r_cmt_rx_config_reference.h -| -\---src - r_cmt_rx.c - -r_config - r_cmt_rx_config.h - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_cmt_rx/ref/r_cmt_rx_config_reference.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_cmt_rx/ref/r_cmt_rx_config_reference.h deleted file mode 100644 index e043e41b29d..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_cmt_rx/ref/r_cmt_rx_config_reference.h +++ /dev/null @@ -1,37 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_cmt_rx_config.h -* Description : Configures the r_cmt_rx code. -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 06.11.2013 2.00 First GSCE Release. -***********************************************************************************************************************/ -#ifndef CMT_CONFIG_HEADER_FILE -#define CMT_CONFIG_HEADER_FILE - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ -/* The interrupt priority level to be used for CMT interrupts. */ -#define CMT_RX_CFG_IPR (5) - -#endif /* CMT_CONFIG_HEADER_FILE */ - - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_cmt_rx/src/r_cmt_rx.c b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_cmt_rx/src/r_cmt_rx.c deleted file mode 100644 index df70b6ea673..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_cmt_rx/src/r_cmt_rx.c +++ /dev/null @@ -1,904 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_cmt_rx.c -* Description : This module creates timer ticks using CMT channels or one-shot events based on period in uS. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 06.11.2013 2.10 First GSCE Release. -* : 11.03.2014 2.20 Added support for RX110. -* Fixes bug in R_CMT_Control CMT_RX_CMD_GET_NUM_CHANNELS command. -* : 22.04.2014 2.30 Added support for RX64M. -* : 10.11.2014 2.40 Added support for RX113. -* : 20.02.2015 2.50 Added support for RX71M. -* : 01.04.2015 2.60 Added support for RX231. -* : 30.09.2015 2.70 Added support for RX23T. -* : 01.10.2015 2.80 Added support for RX130. -* : 01.12.2015 2.90 Added support for RX230, RX24T. -* : 15.03.2016 3.00 Added support for RX65N. -* : 19.12.2016 3.10 Added support for RX24U, RX24T(512KB). -* Fix to stop timer before callback function is executed. -* : 21.07.2017 3.20 Added support for RX65N-2M, RX130-512KB -***********************************************************************************************************************/ - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -#include "platform.h" -#include "r_cmt_rx_config.h" /* Configuration header file */ -#include "r_cmt_rx_if.h" /* Interface header file */ - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ -/* Define the number of CMT channels based on MCU type. */ -#if defined(BSP_MCU_RX62_ALL) || defined(BSP_MCU_RX63_ALL) || defined(BSP_MCU_RX21_ALL) || \ - defined(BSP_MCU_RX61_ALL) || defined(BSP_MCU_RX64_ALL) || defined(BSP_MCU_RX113) || \ - defined(BSP_MCU_RX71_ALL) || defined(BSP_MCU_RX231) || defined(BSP_MCU_RX23_ALL) || \ - defined(BSP_MCU_RX24_ALL) || defined(BSP_MCU_RX65_ALL) - #define CMT_RX_NUM_CHANNELS (4) -#elif defined(BSP_MCU_RX111) || defined(BSP_MCU_RX110) || defined(BSP_MCU_RX130) - #define CMT_RX_NUM_CHANNELS (2) -#else - #error "Error! Number of channels for this MCU is not defined in r_cmt_rx.c" -#endif - -/* Max number of ticks for counter without overflowing/underflowing. */ -#define CMT_RX_MAX_TIMER_TICKS (0x10000) - -/* Starting with RX63x MCUs, there are 2 peripheral clocks: PCLKA and PCLKB. PCLKA is only used by the Ethernet block. - This means that PCLKB would match functionality of PCLK in RX62x devices as far as the CMT is concerned. PCLKB is - used for the CMT on RX210 MCUs too. */ -#if defined(BSP_MCU_RX63_ALL) || defined(BSP_MCU_RX21_ALL) || defined(BSP_MCU_RX11_ALL) || defined(BSP_MCU_RX64_ALL) || \ - defined(BSP_MCU_RX71_ALL) || defined(BSP_MCU_RX113) || defined(BSP_MCU_RX231) || defined(BSP_MCU_RX23_ALL) || \ - defined(BSP_MCU_RX13_ALL) || defined(BSP_MCU_RX24_ALL) || defined(BSP_MCU_RX65_ALL) - #define CMT_PCLK_HZ (BSP_PCLKB_HZ) -#else - #define CMT_PCLK_HZ (BSP_PCLK_HZ) -#endif - -/* Which MCUs have register protection. */ -#if defined(BSP_MCU_RX21_ALL) || defined(BSP_MCU_RX63_ALL) || defined(BSP_MCU_RX11_ALL) || defined(BSP_MCU_RX64_ALL) || \ - defined(BSP_MCU_RX71_ALL) || defined(BSP_MCU_RX231) || defined(BSP_MCU_RX23_ALL) || defined(BSP_MCU_RX13_ALL) || \ - defined(BSP_MCU_RX24_ALL) || defined(BSP_MCU_RX65_ALL) - #define CMT_REG_PROTECT (1) -#else - #define CMT_REG_PROTECT (0) -#endif - - -/*********************************************************************************************************************** -Typedef definitions -***********************************************************************************************************************/ -/* Enum for current mode of CMT channel. */ -typedef enum -{ - CMT_RX_MODE_DISABLED = 0, - CMT_RX_MODE_PERIODIC, - CMT_RX_MODE_ONE_SHOT -} cmt_modes_t; - -/*********************************************************************************************************************** -Private global variables and functions -***********************************************************************************************************************/ -/* Used to prevent having duplicate code for each channel. This only works if the channels are identical (just at - different locations in memory). This is easy to tell by looking in iodefine.h and seeing if the same structure - was used for all channels. */ -static volatile struct st_cmt0 __evenaccess * const g_cmt_channels[CMT_RX_NUM_CHANNELS] = -{ -/* Currently all RX MCUs have either 2 or 4 CMT channels. */ -#if CMT_RX_NUM_CHANNELS == 4 - &CMT0, &CMT1, &CMT2, &CMT3 -#elif CMT_RX_NUM_CHANNELS == 2 - &CMT0, &CMT1 -#else - #error "Error! r_cmt_rx is not setup for this many CMT channels. Please refer to g_cmt_channels[] in r_cmt_rx.c" -#endif -}; - -/* Holds current mode of each CMT channel. */ -static cmt_modes_t g_cmt_modes[CMT_RX_NUM_CHANNELS]; - -/* This array holds the available clock dividers. For example, if PCLK/8 is available, then '8' would be an entry. - Note that the index of the divider in the array should correspond to the bit setting used for the CKS[1:0] bitfield. - For example, 128 is at index 2 in the array and to choose PCLK/128 in the CMCR register you would set the CKS[1:0] - bitfield to 2. */ -static const uint32_t g_cmt_clock_dividers[] = { 8, 32, 128, 512 }; - -/* Array that holds user's callback functions. */ -static void (* g_cmt_callbacks[CMT_RX_NUM_CHANNELS])(void * pdata); - -/* Internal functions. */ -static bool cmt_lock_state(void); -static void cmt_unlock_state(void); -static bool cmt_find_channel(uint32_t * channel); -static void power_on(uint32_t channel); -static void power_off(uint32_t channel); -static void cmt_counter_start(uint32_t channel); -static void cmt_counter_stop(uint32_t channel); -static bool cmt_setup_channel(uint32_t channel, uint32_t frequency_hz); -static void cmt_isr_common(uint32_t channel); -static bool cmt_create(uint32_t frequency_hz, void (* callback)(void * pdata), cmt_modes_t mode, uint32_t * channel); - -/*********************************************************************************************************************** -* Function Name: R_CMT_CreatePeriodic -* Description : Sets up a CMT channel and calls a callback function at a set frequency. -* Arguments : frequency_hz - -* Frequency in Hz of how often to call the callback function. -* callback - -* Which function to call when timer expires. If you wish to use R_CMT_Control() to check the status -* of a channel instead of using a callback then use FIT_NO_FUNC for this parameter. -* channel - -* Pointer of where to store which channel was used. -* Return Value : true - -* Channel initialized successfully. -* false - -* Invalid channel or frequency could not be used. -***********************************************************************************************************************/ -bool R_CMT_CreatePeriodic (uint32_t frequency_hz, void (* callback)(void * pdata), uint32_t * channel) -{ - return cmt_create(frequency_hz, callback, CMT_RX_MODE_PERIODIC, channel); -} - -/*********************************************************************************************************************** -* Function Name: R_CMT_CreateOneShot -* Description : Sets up a CMT channel and calls a callback function once after a user-defined amount of time. -* Arguments : period_us - -* How long until compare match occurs. Unit is microseconds. -* callback - -* Which function to call when timer expires. If you wish to use R_CMT_Control() to check the status -* of a channel instead of using a callback then use FIT_NO_FUNC for this parameter. -* channel - -* Pointer of where to store which channel was used. -* Return Value : true - -* Channel initialized successfully. -* false - -* Invalid channel or period could not be used. -***********************************************************************************************************************/ -bool R_CMT_CreateOneShot (uint32_t period_us, void (* callback)(void * pdata), uint32_t * channel) -{ - return cmt_create((1000000/period_us), callback, CMT_RX_MODE_ONE_SHOT, channel); -} - -/*********************************************************************************************************************** -* Function Name: R_CMT_Stop -* Description : Stop a counter and puts it in module stop state to conserve power. -* Arguments : channel - -* Which channel to use. -* Return Value : true - -* Counter stopped. -* false - -* Invalid channel number. -***********************************************************************************************************************/ -bool R_CMT_Stop (uint32_t channel) -{ - /* Make sure valid channel number was input. */ - if (channel >= CMT_RX_NUM_CHANNELS) - { - /* Invalid channel number was used. */ - return false; - } - - /* Stop counter. */ - cmt_counter_stop(channel); - - /* Turn off power to channel. */ - power_off(channel); - - /* Set mode to disabled. */ - g_cmt_modes[channel] = CMT_RX_MODE_DISABLED; - - /* Set channel as available. */ - R_BSP_HardwareUnlock((mcu_lock_t)(BSP_LOCK_CMT0 + channel)); - - return true; -} - -/*********************************************************************************************************************** -* Function Name: R_CMT_Control -* Description : Handles minor functions of this module. -* Arguments : channel - -* Which channel is being referenced. If not channel is needed input CMT_RX_NO_CHANNEL. -* command - -* What command is being input. -* pdata - -* Pointer to data to be input or filled in if needed. -* Return Value : true - -* Command completed successfully. -* false - -* Invalid command. -***********************************************************************************************************************/ -bool R_CMT_Control (uint32_t channel, cmt_commands_t command, void * pdata) -{ - bool ret = true; - - /* Process command that was input. */ - switch (command) - { - case CMT_RX_CMD_IS_CHANNEL_COUNTING: - - /* Check input channel. */ - if (channel < CMT_RX_NUM_CHANNELS) - { - /* Valid channel input. Is this channel currently counting? */ - if (CMT_RX_MODE_DISABLED == g_cmt_modes[channel]) - { - *(bool *)pdata = false; - } - else - { - *(bool *)pdata = true; - } - } - else - { - ret = false; - } - break; - - case CMT_RX_CMD_GET_NUM_CHANNELS: - *(uint32_t *)pdata = CMT_RX_NUM_CHANNELS; - break; - - case CMT_RX_CMD_PAUSE: - - if (channel < CMT_RX_NUM_CHANNELS) - { - /* Valid channel input. Is this channel currently counting? */ - if (CMT_RX_MODE_DISABLED != g_cmt_modes[channel]) - { - - switch (channel) - { - case 0: - CMT.CMSTR0.BIT.STR0 = 0; - break; - case 1: - CMT.CMSTR0.BIT.STR1 = 0; - break; - - #if CMT_RX_NUM_CHANNELS == 4 - case 2: - CMT.CMSTR1.BIT.STR2 = 0; - break; - case 3: - CMT.CMSTR1.BIT.STR3 = 0; - break; - #endif - - default: - break; - } - } - } - break; - - - /* Both restart and resume do the same thing, except restart zeros the counter first */ - case CMT_RX_CMD_RESTART: - case CMT_RX_CMD_RESUME: - if (channel < CMT_RX_NUM_CHANNELS) - { - /* Stop the timer once to prevent an interrupt from occurring */ - switch (channel) - { - case 0: - CMT.CMSTR0.BIT.STR0 = 0; - break; - case 1: - CMT.CMSTR0.BIT.STR1 = 0; - break; -#if CMT_RX_NUM_CHANNELS == 4 - case 2: - CMT.CMSTR1.BIT.STR2 = 0; - break; - case 3: - CMT.CMSTR1.BIT.STR3 = 0; - break; -#endif - default: - break; - } - - /* Valid channel input. Is this channel currently counting? */ - if (CMT_RX_MODE_DISABLED != g_cmt_modes[channel]) - { - - if (CMT_RX_CMD_RESTART == command) - { - /* For restarting, clear counter. */ - (*g_cmt_channels[channel]).CMCNT = 0; - } - - switch (channel) - { - case 0: - CMT.CMSTR0.BIT.STR0 = 1; - break; - case 1: - CMT.CMSTR0.BIT.STR1 = 1; - break; -#if CMT_RX_NUM_CHANNELS == 4 - case 2: - CMT.CMSTR1.BIT.STR2 = 1; - break; - case 3: - CMT.CMSTR1.BIT.STR3 = 1; - break; -#endif - default: - break; - } - } - } - break; - - default: - ret = false; - break; - } - - return ret; -} - -/*********************************************************************************************************************** -* Function Name: cmt_create -* Description : Sets up a CMT channel based on user input options. -* Arguments : frequency_hz - -* Frequency in Hz of how often to call the callback function. -* callback - -* Which function to call when timer expires. -* mode - -* Current mode of CMT channel -* channel - -* Pointer of where to store which channel was used. -* Return Value : true - -* Channel initialized successfully. -* false - -* Invalid channel or period could not be used. -***********************************************************************************************************************/ -static bool cmt_create (uint32_t frequency_hz, void (* callback)(void * pdata), cmt_modes_t mode, uint32_t * channel) -{ - /* Return value. */ - bool ret = false; - - /* Grab state to make sure we do not interfere with another operation. */ - if (cmt_lock_state() != true) - { - /* Another operation is already in progress. */ - return false; - } - - /* Was a channel found? */ - if (false == cmt_find_channel(channel)) - { - /* Channel not found or not available. */ - ret = false; - } - else - { - /* Look to see if we can support this frequency. */ - ret = cmt_setup_channel(*channel, frequency_hz); - - /* Set up ICU registers, save callback function, and start counter if valid divider was found. */ - if (true == ret) - { - /* Set mode of operation. */ - g_cmt_modes[*channel] = mode; - - /* Save callback function to be used. */ - g_cmt_callbacks[*channel] = callback; - - /* Start channel counting. */ - cmt_counter_start(*channel); - } - else - { - /* Could not support input frequency. Release lock on channel. */ - R_BSP_HardwareUnlock((mcu_lock_t)(BSP_LOCK_CMT0 + (*channel))); - } - } - - /* Release state so other operations can be performed. */ - cmt_unlock_state(); - - return ret; -} - -/*********************************************************************************************************************** -* Function Name: cmt_lock_state -* Description : Attempt to lock the state so that we right to perform an operation. -* Arguments : none -* Return Value : true - -* State was obtained -* false - -* State was not obtained because code is busy with another on-going operation. -***********************************************************************************************************************/ -static bool cmt_lock_state (void) -{ - bool ret; - - /* Attempt to acquire lock. */ - ret = R_BSP_HardwareLock(BSP_LOCK_CMT); - - return ret; -} - -/*********************************************************************************************************************** -* Function Name: cmt_unlock_state -* Description : Release state so that other operations can be performed. -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -static void cmt_unlock_state (void) -{ - /* Release lock. */ - R_BSP_HardwareUnlock(BSP_LOCK_CMT); -} - -/*********************************************************************************************************************** -* Function Name: cmt_find_channel -* Description : Attempt to find open CMT channel to use. -* Arguments : channel - -* Channel number if channel was found. -* Return Value : true - -* Channel was found and locked. -* false - -* No channels available. -***********************************************************************************************************************/ -static bool cmt_find_channel (uint32_t * channel) -{ - bool channel_found = false; - uint32_t i; - - /* Look for an available channel. */ - for (i = 0; i < CMT_RX_NUM_CHANNELS; i++) - { - if (true == R_BSP_HardwareLock((mcu_lock_t)(BSP_LOCK_CMT0 + i))) - { - /* Channel found. */ - *channel = i; - channel_found = true; - - break; - } - } - - return channel_found; -} - -/*********************************************************************************************************************** -* Function Name: power_on -* Description : Enables CMT channel. -* Arguments : channel - -* Channel number to enable. -* Return Value : none -***********************************************************************************************************************/ -static void power_on (uint32_t channel) -{ -#if CMT_REG_PROTECT == 1 - /* Enable writing to MSTP registers. */ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_LPC_CGC_SWR); -#endif - - /* Enable selected CMT Channel. Go ahead and make sure counter is stopped too. */ - switch (channel) - { - case 0: - - /* Bring module out of stop state. */ - MSTP(CMT0) = 0; - - /* Stop counter. */ - CMT.CMSTR0.BIT.STR0 = 0; - break; - case 1: - - /* Bring module out of stop state. */ - MSTP(CMT1) = 0; - - /* Stop counter. */ - CMT.CMSTR0.BIT.STR1 = 0; - break; -#if CMT_RX_NUM_CHANNELS == 4 - case 2: - - /* Bring module out of stop state. */ - MSTP(CMT2) = 0; - - /* Stop counter. */ - CMT.CMSTR1.BIT.STR2 = 0; - break; - case 3: - - /* Bring module out of stop state. */ - MSTP(CMT3) = 0; - - /* Stop counter. */ - CMT.CMSTR1.BIT.STR3 = 0; - break; -#endif - default: - - /* Should never get here. Valid channel number is checked above. */ - break; - } - -#if CMT_REG_PROTECT == 1 - - /* Disable writing to MSTP registers. */ - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_LPC_CGC_SWR); -#endif -} - -/*********************************************************************************************************************** -* Function Name: power_off -* Description : Disables CMT channel. -* Arguments : channel - -* Channel number to disable. -* Return Value : none -***********************************************************************************************************************/ -static void power_off (uint32_t channel) -{ -#if CMT_REG_PROTECT == 1 - - /* Enable writing to MSTP registers. */ - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_LPC_CGC_SWR); -#endif - - /* Enable selected CMT Channel. Go ahead and make sure counter is stopped too. Since each MSTP bit controls - 2 channels, make sure to only disable CMT unit when both channels are off. */ - switch (channel) - { - case 0: - - /* Stop counter. */ - CMT.CMSTR0.BIT.STR0 = 0; - - /* Only turn off CMT unit if both channels are off. */ - if (g_cmt_modes[1] == CMT_RX_MODE_DISABLED) - { - /* Put module in stop state. */ - MSTP(CMT0) = 1; - } - break; - case 1: - - /* Stop counter. */ - CMT.CMSTR0.BIT.STR1 = 0; - - /* Only turn off CMT unit if both channels are off. */ - if (g_cmt_modes[0] == CMT_RX_MODE_DISABLED) - { - /* Put module in stop state. */ - MSTP(CMT1) = 1; - } - break; -#if CMT_RX_NUM_CHANNELS == 4 - case 2: - - /* Stop counter. */ - CMT.CMSTR1.BIT.STR2 = 0; - - /* Only turn off CMT unit if both channels are off. */ - if (g_cmt_modes[3] == CMT_RX_MODE_DISABLED) - { - /* Put module in stop state. */ - MSTP(CMT2) = 1; - } - break; - case 3: - - /* Stop counter. */ - CMT.CMSTR1.BIT.STR3 = 0; - - /* Only turn off CMT unit if both channels are off. */ - if (g_cmt_modes[2] == CMT_RX_MODE_DISABLED) - { - - /* Put module in stop state. */ - MSTP(CMT3) = 1; - } - break; -#endif - default: - - /* Should never get here. Valid channel number is checked above. */ - break; - } - -#if CMT_REG_PROTECT == 1 - /* Disable writing to MSTP registers. */ - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_LPC_CGC_SWR); -#endif -} - -/*********************************************************************************************************************** -* Function Name: cmt_counter_start -* Description : Starts a CMT channel counting. -* Arguments : channel - -* Channel number to use. -* Return Value : none -***********************************************************************************************************************/ -static void cmt_counter_start (uint32_t channel) -{ - /* Enable compare match interurpt. */ - (*g_cmt_channels[channel]).CMCR.BIT.CMIE = 1; - - /* Clear counter. */ - (*g_cmt_channels[channel]).CMCNT = 0; - - /* Start counter channel. */ - switch (channel) - { - case 0: - - /* Setup ICU registers. */ - IR(CMT0, CMI0) = 0; /* Clear any previously pending interrupts */ - IPR(CMT0, CMI0) = CMT_RX_CFG_IPR; /* Set interrupt priority */ - IEN(CMT0, CMI0) = 1; /* Enable compare match interrupt */ - - /* Start counter. */ - CMT.CMSTR0.BIT.STR0 = 1; - break; - case 1: - - /* Setup ICU registers. */ - IR(CMT1, CMI1) = 0; /* Clear any previously pending interrupts */ - IPR(CMT1, CMI1) = CMT_RX_CFG_IPR; /* Set interrupt priority */ - IEN(CMT1, CMI1) = 1; /* Enable compare match interrupt */ - - /* Start counter. */ - CMT.CMSTR0.BIT.STR1 = 1; - break; -#if CMT_RX_NUM_CHANNELS == 4 - case 2: - - /* Setup ICU registers. */ - IR(CMT2, CMI2) = 0; /* Clear any previously pending interrupts */ - IPR(CMT2, CMI2) = CMT_RX_CFG_IPR; /* Set interrupt priority */ - IEN(CMT2, CMI2) = 1; /* Enable compare match interrupt */ - - /* Start counter. */ - CMT.CMSTR1.BIT.STR2 = 1; - break; - case 3: - - /* Setup ICU registers. */ - IR(CMT3, CMI3) = 0; /* Clear any previously pending interrupts */ - IPR(CMT3, CMI3) = CMT_RX_CFG_IPR; /* Set interrupt priority */ - IEN(CMT3, CMI3) = 1; /* Enable compare match interrupt */ - - /* Start counter. */ - CMT.CMSTR1.BIT.STR3 = 1; - break; -#endif - default: - - /* Should never get here. Valid channel number is checked above. */ - break; - } -} - -/*********************************************************************************************************************** -* Function Name: cmt_counter_stop -* Description : Stops a CMT channel counting. -* Arguments : channel - -* Channel number to use. -* Return Value : none -***********************************************************************************************************************/ -static void cmt_counter_stop (uint32_t channel) -{ - /* Stop counter channel. */ - switch (channel) - { - case 0: - - /* Stop counter. */ - CMT.CMSTR0.BIT.STR0 = 0; - - /* Set ICU registers. */ - IEN(CMT0, CMI0) = 0; /* Disable compare match interrupt */ - IPR(CMT0, CMI0) = 0; /* Set interrupt priority */ - IR(CMT0, CMI0) = 0; /* Clear any previously pending interrupts */ - break; - case 1: - - /* Stop counter. */ - CMT.CMSTR0.BIT.STR1 = 0; - - /* Set ICU registers. */ - IEN(CMT1, CMI1) = 0; /* Disable compare match interrupt */ - IPR(CMT1, CMI1) = 0; /* Set interrupt priority */ - IR(CMT1, CMI1) = 0; /* Clear any previously pending interrupts */ - break; -#if CMT_RX_NUM_CHANNELS == 4 - case 2: - - /* Stop counter. */ - CMT.CMSTR1.BIT.STR2 = 0; - - /* Set ICU registers. */ - IEN(CMT2, CMI2) = 0; /* Disable compare match interrupt */ - IPR(CMT2, CMI2) = 0; /* Set interrupt priority */ - IR(CMT2, CMI2) = 0; /* Clear any previously pending interrupts */ - break; - case 3: - - /* Stop counter. */ - CMT.CMSTR1.BIT.STR3 = 0; - - /* Set ICU registers. */ - IEN(CMT3, CMI3) = 0; /* Disable compare match interrupt */ - IPR(CMT3, CMI3) = 0; /* Set interrupt priority */ - IR(CMT3, CMI3) = 0; /* Clear any previously pending interrupts */ - - break; -#endif - default: - - /* Should never get here. Valid channel number is checked above. */ - break; - } -} - -/*********************************************************************************************************************** -* Function Name: cmt_setup_channel -* Description : Sets dividers and counter so compare match occurs at input frequency. -* Arguments : channel - -* Channel number to use. -* frequency_hz - -* Frequency at which to set CMT channel -* Return Value : true - -* Channel setup completed. -* false - -* Channel setup failed. -***********************************************************************************************************************/ -static bool cmt_setup_channel (uint32_t channel, uint32_t frequency_hz) -{ - uint32_t i; - bool ret = false; - - - if (((uint32_t)CMT_PCLK_HZ / 8) >= frequency_hz) /* Requested frequency must not be higher than PCLK. */ - { - /* Choose clock. This is done by looking through the available dividers to see if we can match the frequency - input by the user. */ - for (i = 0; i < ((sizeof(g_cmt_clock_dividers))/(sizeof(g_cmt_clock_dividers[0]))); i++) - { - /* Determine minimum frequency this divider can hit. For example, if a PCLK/8 is used and PCLK is 48MHz, then - the minimum frequency we can support is around 91.5Hz. This obtained by doing the following calculation: - (PCLK / divider) / max_counter_value - Example: - (48,000,000 / 8) / 65,536 = 91.5 */ - if (frequency_hz > (((uint32_t)CMT_PCLK_HZ / g_cmt_clock_dividers[i]) / (uint32_t)CMT_RX_MAX_TIMER_TICKS)) - { - /* Enable peripheral channel. */ - power_on(channel); - - /* We can use this divider. Figure out counter ticks needed for this frequency. */ - (*g_cmt_channels[channel]).CMCOR = (uint16_t)((((uint32_t)CMT_PCLK_HZ /g_cmt_clock_dividers[i])/frequency_hz) -1 ); - - - /* Set clock divider to be used. */ - (*g_cmt_channels[channel]).CMCR.BIT.CKS = i; - - /* Save that we did find a valid divider. */ - ret = true; - - /* No need to check other dividers. */ - break; - } - } - } - - return ret; -} - -/*********************************************************************************************************************** -* Function Name: R_CMT_GetVersion -* Description : Returns the current version of this module. The version number is encoded where the top 2 bytes are the -* major version number and the bottom 2 bytes are the minor version number. For example, Version 4.25 -* would be returned as 0x00040019. -* Arguments : none -* Return Value : Version of this module. -***********************************************************************************************************************/ -R_ATTRIB_INLINE -uint32_t R_CMT_GetVersion (void) -{ - /* These version macros are defined in r_cmt_rx_if.h. */ - return ((((uint32_t)CMT_RX_VERSION_MAJOR) << 16) | (uint32_t)CMT_RX_VERSION_MINOR); -} - -/*********************************************************************************************************************** -* Function Name: cmt_isr_common -* Description : Common part of ISR handling. Put here and made inline so changes will always apply to all channels. -* Arguments : channel - -* Which channel this is for. -* Return Value : none -***********************************************************************************************************************/ -R_ATTRIB_STATIC_INLINE -void cmt_isr_common (uint32_t channel) -{ - /* If this is one-shot mode then stop timer. */ - if (CMT_RX_MODE_ONE_SHOT == g_cmt_modes[channel]) - { - R_CMT_Stop(channel); - } - - /* Check for valid callback pointer before calling it. */ - if ((NULL != g_cmt_callbacks[channel]) && ((uint32_t)FIT_NO_FUNC != (uint32_t)g_cmt_callbacks[channel])) - { - /* Valid callback found, jump to it. */ - g_cmt_callbacks[channel]((void *)&channel); - } -} - -/*********************************************************************************************************************** -* Function Name: cmt0_isr -* Description : Interrupt when compare match for this channel occurs. -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -R_PRAGMA_STATIC_INTERRUPT(cmt0_isr, VECT(CMT0, CMI0)) -__INTERRUPT static void cmt0_isr (void) -{ - cmt_isr_common(0); -} - -/*********************************************************************************************************************** -* Function Name: cmt1_isr -* Description : Interrupt when compare match for this channel occurs. -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -R_PRAGMA_STATIC_INTERRUPT(cmt1_isr, VECT(CMT1, CMI1)) -__INTERRUPT static void cmt1_isr (void) -{ - cmt_isr_common(1); -} - -#if CMT_RX_NUM_CHANNELS == 4 -/*********************************************************************************************************************** -* Function Name: cmt2_isr -* Description : Interrupt when compare match for this channel occurs. -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -R_PRAGMA_STATIC_INTERRUPT(cmt2_isr, VECT(CMT2, CMI2)) -__INTERRUPT static void cmt2_isr (void) -{ - cmt_isr_common(2); -} - -/*********************************************************************************************************************** -* Function Name: cmt3_isr -* Description : Interrupt when compare match for this channel occurs. -* Arguments : none -* Return Value : none -***********************************************************************************************************************/ -R_PRAGMA_STATIC_INTERRUPT(cmt3_isr, VECT(CMT3, CMI3)) -__INTERRUPT static void cmt3_isr (void) -{ - cmt_isr_common(3); -} -#endif - - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_bsp_config.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_bsp_config.h deleted file mode 100644 index bfad0bd86f9..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_bsp_config.h +++ /dev/null @@ -1,508 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_config_reference.h -* Device(s) : RX65N -* Description : The file r_bsp_config.h is used to configure your BSP. r_bsp_config.h should be included -* somewhere in your package so that the r_bsp code has access to it. This file (r_bsp_config_reference.h) -* is just a reference file that the user can use to make their own r_bsp_config.h file. -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 15.05.2017 1.00 First Release -***********************************************************************************************************************/ -#ifndef R_BSP_CONFIG_REF_HEADER_FILE -#define R_BSP_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* NOTE: - The default settings are the same as when using RSKRX65N-2MB. - Change to the settings for the user board. -*/ - -/* Start up select - 0 = Enable BSP startup program. - 1 = Disable BSP startup program. (e.g. Using user startup program.) -*/ -#define BSP_CFG_STARTUP_DISABLE (0) - -/* Enter the product part number for your MCU. This information will be used to obtain information about your MCU such - as package and memory size. - To help parse this information, the part number will be defined using multiple macros. - R 5 F 56 5N E D D FP - | | | | | | | | | Macro Name Description - | | | | | | | | |__BSP_CFG_MCU_PART_PACKAGE = Package type, number of pins, and pin pitch - | | | | | | | |____not used = Products with wide temperature range - | | | | | | |______BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED = Encryption module included/not included - | | | | | |________BSP_CFG_MCU_PART_MEMORY_SIZE = ROM, RAM, and Data Flash Capacity - | | | | |___________BSP_CFG_MCU_PART_GROUP = Group name - | | | |______________BSP_CFG_MCU_PART_SERIES = Series name - | | |________________BSP_CFG_MCU_PART_MEMORY_TYPE = Type of memory (Flash, ROMless) - | |__________________not used = Renesas MCU - |____________________not used = Renesas semiconductor product. - */ - -/* Package type. Set the macro definition based on values below: - Character(s) = Value for macro = Package Type/Number of Pins/Pin Pitch - FC = 0x0 = LFQFP/176/0.50 - BG = 0x1 = LFBGA/176/0.80 - LC = 0x2 = TFLGA/177/0.50 - FB = 0x3 = LFQFP/144/0.50 - LK = 0x4 = TFLGA/145/0.50 - FP = 0x5 = LFQFP/100/0.50 - LJ = 0xA = TFLGA/100/0.65 -*/ -#define BSP_CFG_MCU_PART_PACKAGE (0x3) // <-- Updated by GUI. Do not edit this value manually - -/* Whether Encryption and SDHI/SDSI are included or not. - Character(s) = Value for macro = Description - A = false = Encryption module not included, SDHI/SDSI module not included - B = false = Encryption module not included, SDHI/SDSI module included - D = false = Encryption module not included, SDHI/SDSI module included, dual-bank structure - E = true = Encryption module included, SDHI/SDSI module not included - F = true = Encryption module included, SDHI/SDSI module included - H = true = Encryption module included, SDHI/SDSI module included, dual-bank structure -*/ -#define BSP_CFG_MCU_PART_ENCRYPTION_INCLUDED (true) // <-- Updated by GUI. Do not edit this value manually - -/* ROM, RAM, and Data Flash Capacity. - Character(s) = Value for macro = ROM Size/Ram Size/Data Flash Size - 4 = 0x4 = 512KB/256KB/Not equipped - 7 = 0x7 = 768KB/256KB/Not equipped - 9 = 0x9 = 1MB/256KB/Not equipped - C = 0xC = 1.5MB/640KB/32KB - E = 0xE = 2MB/640KB/32KB - NOTE: When the RAM capacity is 640KB, the RAM areas are not contiguous. -*/ -#define BSP_CFG_MCU_PART_MEMORY_SIZE (0xE) // <-- Updated by GUI. Do not edit this value manually - -/* Group name. - Character(s) = Value for macro = Description - 5N/51 = 0x0 = RX65N Group/RX651 Group -*/ -#define BSP_CFG_MCU_PART_GROUP (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Series name. - Character(s) = Value for macro = Description - 56 = 0x0 = RX600 Series -*/ -#define BSP_CFG_MCU_PART_SERIES (0x0) // <-- Updated by GUI. Do not edit this value manually - -/* Memory type. - Character(s) = Value for macro = Description - F = 0x0 = Flash memory version -*/ -#define BSP_CFG_MCU_PART_MEMORY_TYPE (0x0) // <-- Updated by GUI. Do not edit this value manually - - -/* Heap size in bytes. - To disable the heap you must follow these steps: - 1) Set this macro (BSP_CFG_HEAP_BYTES) to 0. - 2) Set the macro BSP_CFG_IO_LIB_ENABLE to 0. - 3) Disable stdio from being built into the project library. This is done by going into the Renesas RX Toolchain - settings and choosing the Standard Library section. After that choose 'Standard Library' for Category in HEW or - choose 'Contents' in E2Studio. This will present a list of modules that can be included. Uncheck the box for - stdio.h. -*/ -#define BSP_CFG_HEAP_BYTES (0x2000) - -/* Initializes C input & output library functions. - 0 = Disable I/O library initialization in resetprg.c. If you are not using stdio then use this value. - 1 = Enable I/O library initialization in resetprg.c. This is default and needed if you are using stdio. */ -#define BSP_CFG_IO_LIB_ENABLE (0) - -/* If desired the user may redirect the stdio charget() and/or charput() functions to their own respective functions - by enabling below and providing and replacing the my_sw_... function names with the names of their own functions. */ -#define BSP_CFG_USER_CHARGET_ENABLED (0) -#define BSP_CFG_USER_CHARGET_FUNCTION my_sw_charget_function - -#define BSP_CFG_USER_CHARPUT_ENABLED (0) -#define BSP_CFG_USER_CHARPUT_FUNCTION my_sw_charput_function - -/* After reset MCU will operate in Supervisor mode. To switch to User mode, set this macro to '1'. For more information - on the differences between these 2 modes see the CPU >> Processor Mode section of your MCU's hardware manual. - 0 = Stay in Supervisor mode. - 1 = Switch to User mode. -*/ -#define BSP_CFG_RUN_IN_USER_MODE (0) - -/* Clock source select (CKSEL). - 0 = Low Speed On-Chip Oscillator (LOCO) - 1 = High Speed On-Chip Oscillator (HOCO) - 2 = Main Clock Oscillator - 3 = Sub-Clock Oscillator - 4 = PLL Circuit -*/ -#define BSP_CFG_CLOCK_SOURCE (4) // <-- Updated by GUI. Do not edit this value manually - -/* Main clock Oscillator Switching (MOSEL). - 0 = Resonator - 1 = External clock input -*/ -#define BSP_CFG_MAIN_CLOCK_SOURCE (0) // <-- Updated by GUI. Do not edit this value manually - -/* The sub-clock oscillation control for using the RTC. - When '1' is selected, the registers related to RTC are initialized and the sub-clock oscillator is operated. - 0 = The RTC is not to be used. - 1 = The RTC is to be used. -*/ -#define BSP_CFG_RTC_ENABLE (0) // <-- Updated by GUI. Do not edit this value manually - -/* Sub-Clock Oscillator Drive Capacity Control (RTCDV). - 0 = Drive capacity for standard CL. - 1 = Drive capacity for low CL. -*/ -#define BSP_CFG_SOSC_DRV_CAP (0) // <-- Updated by GUI. Do not edit this value manually //standard CL by default - -/* Clock configuration options. - The input clock frequency is specified and then the system clocks are set by specifying the multipliers used. The - multiplier settings are used to set the clock registers in resetprg.c. If a 24MHz clock is used and the - ICLK is 120MHz, PCLKA is 120MHz, PCLKB is 60MHz, PCLKC is 60MHz, PCLKD is 60MHz, FCLK is 60MHz, USB Clock is 48MHz, - and BCLK is 120MHz then the settings would be: - - BSP_CFG_XTAL_HZ = 24000000 - BSP_CFG_PLL_DIV = 1 (no division) - BSP_CFG_PLL_MUL = 10.0 (24MHz x 10.0 = 240MHz) - BSP_CFG_ICK_DIV = 2 : System Clock (ICLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_ICK_DIV) = 120MHz - BSP_CFG_PCKA_DIV = 2 : Peripheral Clock A (PCLKA) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKA_DIV) = 120MHz - BSP_CFG_PCKB_DIV = 4 : Peripheral Clock B (PCLKB) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKB_DIV) = 60MHz - BSP_CFG_PCKC_DIV = 4 : Peripheral Clock C (PCLKC) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKC_DIV) = 60MHz - BSP_CFG_PCKD_DIV = 4 : Peripheral Clock D (PCLKD) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_PCKD_DIV) = 60MHz - BSP_CFG_FCK_DIV = 4 : Flash IF Clock (FCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_FCK_DIV) = 60MHz - BSP_CFG_BCK_DIV = 2 : External Bus Clock (BCK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_BCK_DIV) = 120MHz - BSP_CFG_UCK_DIV = 5 : USB Clock (UCLK) = - (((BSP_CFG_XTAL_HZ/BSP_CFG_PLL_DIV) * BSP_CFG_PLL_MUL) / BSP_CFG_UCK_DIV) = 48MHz -*/ - -/* Input clock frequency in Hz (XTAL or EXTAL). */ -#define BSP_CFG_XTAL_HZ (12000000) // <-- Updated by GUI. Do not edit this value manually - -/* The HOCO can operate at several different frequencies. Choose which one using the macro below. - Available frequency settings: - 0 = 16MHz (default) - 1 = 18MHz - 2 = 20MHz -*/ -#define BSP_CFG_HOCO_FREQUENCY (0) // <-- Updated by GUI. Do not edit this value manually - -/* PLL clock source (PLLSRCEL). Choose which clock source to input to the PLL circuit. - Available clock sources: - 0 = Main clock (default) - 1 = HOCO -*/ -#define BSP_CFG_PLL_SRC (0) // <-- Updated by GUI. Do not edit this value manually - -/* PLL Input Frequency Division Ratio Select (PLIDIV). - Available divisors = /1 (no division), /2, /3 -*/ -#define BSP_CFG_PLL_DIV (1) // <-- Updated by GUI. Do not edit this value manually - -/* PLL Frequency Multiplication Factor Select (STC). - Available multipliers = x10.0 to x30.0 in 0.5 increments (e.g. 10.0, 10.5, 11.0, 11.5, ..., 29.0, 29.5, 30.0) -*/ -#define BSP_CFG_PLL_MUL (20.0) // <-- Updated by GUI. Do not edit this value manually - -/* System Clock Divider (ICK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_ICK_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock A Divider (PCKA). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKA_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock B Divider (PCKB). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKB_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock C Divider (PCKC). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKC_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* Peripheral Module Clock D Divider (PCKD). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_PCKD_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* External Bus Clock Divider (BCLK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_BCK_DIV (2) // <-- Updated by GUI. Do not edit this value manually - -/* Flash IF Clock Divider (FCK). - Available divisors = /1 (no division), /2, /4, /8, /16, /32, /64 -*/ -#define BSP_CFG_FCK_DIV (4) // <-- Updated by GUI. Do not edit this value manually - -/* USB Clock Divider Select. - Available divisors = /2, /3, /4, /5 -*/ -#define BSP_CFG_UCK_DIV (5) // <-- Updated by GUI. Do not edit this value manually - -/* Configure BCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency, 2= BCK/2 frequency -*/ -#define BSP_CFG_BCLK_OUTPUT (0) // <-- Updated by GUI. Do not edit this value manually - -/* Configure SDCLK output pin (only effective when external bus enabled) - Values 0=no output, 1 = BCK frequency -*/ -#define BSP_CFG_SDCLK_OUTPUT (0) // <-- Updated by GUI. Do not edit this value manually - -/* Main Clock Oscillator Wait Time (MOSCWTCR). - The value of MOSCWTCR register required for correspondence with the waiting time required to secure stable oscillation - by the main clock oscillator is obtained by using the maximum frequency for fLOCO in the formula below. - - BSP_CFG_MOSC_WAIT_TIME > (tMAINOSC * (fLOCO_max) + 16)/32 - (tMAINOSC: main clock oscillation stabilization time; fLOCO_max: maximum frequency for fLOCO) - - If tMAINOSC is 9.98 ms and fLOCO_max is 264 kHz (the period is 1/3.78 us), the formula gives - BSP_CFG_MOSC_WAIT_TIME > (9.98 ms * (264 kHZ) + 16)/32 = 82.83, so set the BSP_CFG_MOSC_WAIT_TIME to 83(53h). - - NOTE: The waiting time is not required when an external clock signal is input for the main clock oscillator. - Set the BSP_CFG_MOSC_WAIT_TIME to 00h. -*/ -#define BSP_CFG_MOSC_WAIT_TIME (0x53) // <-- Updated by GUI. Do not edit this value manually - -/* Sub-Clock Oscillator Wait Time (SOSCWTCR). - The value of SOSCWTCR register required for correspondence with the expected time to secure settling of oscillation - by the sub-clock oscillator is obtained by using the maximum frequency for fLOCO in the formula below. - - BSP_CFG_SOSC_WAIT_TIME > (tSUBOSC * (fLOCO_max) + 16)/16384 - (tSUBOSC: sub-clock oscillation stabilization time; fLOCO_max: maximum frequency for fLOCO) - - If tSUBOSC is 2 s and fLOCO is 264 kHz (the period is 1/3.78 us), the formula gives - BSP_CFG_SOSC_WAIT_TIME > (2 s * (264 kHz) +16)/16384 = 32.22, so set the BSP_CFG_SOSC_WAIT_TIME bits to 33(21h). -*/ -#define BSP_CFG_SOSC_WAIT_TIME (0x21) // <-- Updated by GUI. Do not edit this value manually - -/* ROM Cache Enable Register (ROMCE). - 0 = ROM cache operation disabled. - 1 = ROM cache operation enabled. -*/ -#define BSP_CFG_ROM_CACHE_ENABLE (0) - -/* Configure WDT and IWDT settings. - OFS0 - Option Function Select Register 0 - b31:b29 Reserved When reading, these bits return the value written by the user. The write value should be 1. - b28 WDTRSTIRQS - WDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b27:b26 WDTRPSS - WDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b25:b24 WDTRPES - WDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b23:b20 WDTCKS - WDT Clock Frequency Division Ratio - (1=PCLKB/4, 4=PCLKB/64, 0xF=PCLKB/128, 6=PCLKB/256, - 7=PCLKB/2048, 8=PCLKB/8192) - b19:b18 WDTTOPS - WDT Timeout Period Select (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b17 WDTSTRT - WDT Start Mode Select - (0=auto-start after reset, 1=halt after reset) - b16:b15 Reserved (set to 1) - b14 IWDTSLCSTP - IWDT Sleep Mode Count Stop Control - (0=can't stop count, 1=stop w/some low power modes) - b13 Reserved (set to 1) - b12 IWDTRSTIRQS - IWDT Reset Interrupt Request - What to do on underflow (0=take interrupt, 1=reset MCU) - b11:b10 IWDTRPSS - IWDT Window Start Position Select - (0=25%, 1=50%, 2=75%, 3=100%,don't use) - b9:b8 IWDTRPES - IWDT Window End Position Select - (0=75%, 1=50%, 2=25%, 3=0%,don't use) - b7:b4 IWDTCKS - IWDT Clock Frequency Division Ratio - (0=none, 2=/16, 3 = /32, 4=/64, 0xF=/128, 5=/256) - b3:b2 IWDTTOPS - IWDT Timeout Period Select - (0=1024 cycles, 1=4096, 2=8192, 3=16384) - b1 IWDTSTRT - IWDT Start Mode Select - (0=auto-start after reset, 1=halt after reset) - b0 Reserved (set to 1) -*/ -#define BSP_CFG_OFS0_REG_VALUE (0xFFFFFFFF) // <-- Updated by GUI. Do not edit this value manually //Disable by default - -/* Configure whether voltage detection 0 circuit and HOCO are enabled after reset. - OFS1 - Option Function Select Register 1 - b31:b9 Reserved (set to 1) - b8 HOCOEN - Enable/disable HOCO oscillation after a reset (0=enable, 1=disable) - b7:b3 Reserved When reading, these bits return the value written by the user. The write value should be 1. - b2 LVDAS - Voltage Detection 0 circuit start (1=monitoring disabled) - b1:b0 VDSEL - Voltage Detection 0 level select (1=2.94v, 2=2.87v, 3=2.80v) - NOTE: If HOCO oscillation is enabled by OFS1.HOCOEN, HOCO frequency is 16MHz. - BSP_CFG_HOCO_FREQUENCY should be default value. -*/ -#define BSP_CFG_OFS1_REG_VALUE (0xFFFFFFFF) // <-- Updated by GUI. Do not edit this value manually //Disable by default - -/* Trusted memory is facility to prevent the reading of blocks 8 and 9 and blocks 46 and 47 (in dual mode) in - the code flash memory by third party software. This feature is disabled by default. - TMEF - TM Enable Flag Register - b31 Reserved (set to 1) - b30:b28 TMEFDB - Dual-Bank TM Enable - 000: The TM function in the address range from FFEE 0000h to - FFEE FFFFh is enabled in dual mode. - - 111: The TM function in the address range from FFEE 0000h to - FFEE FFFFh is disabled in dual mode. - b27 Reserved (set to 1) - b26:b24 TMEFF - TM Enable - 000: TM function is enabled. - - 111: TM function is disabled. - b23:b0 Reserved (set to 1) - NOTE: If the dual bank function has not been incorporated in a device, - TMEFDB bits [b30:b26] are reserved area. -*/ -#define BSP_CFG_TRUSTED_MODE_FUNCTION (0xFFFFFFFF) //Disable by default - -/* Configure FAW register is used to set the write protection flag and boot area select flag - for setting the flash access window startaddress and flash access window end address. - FAW - Flash Access Window Setting Register - b31 BTFLG - Boot Area Select Flag - 0: FFFF C000h to FFFF DFFFh are used as the boot area - - 1: FFFF E000h to FFFF FFFFh are used as the boot area - b30:b28 Reserved - When reading, these bits return the value written by the user.The write value should be 1. - b27:b16 FAWE - Flash Access Window End Address - Flash access window end address - b15 FSPR - Access Window Protection Flag - 0: With protection (P/E disabled) - - 1: Without protection (P/E enabled) - b14:b12 Reserved - When reading, these bits return the value written by the user.The write value should be 1. - b11:b0 FAWS - Flash Access Window Start Address - Flash access window start address - NOTE: Once 0 is written to this bit, the bit can never be restored to 1. - Therefore, the access window and the BTFLG bit never be set again or the TM function - never be disabled once it has been enabled. - Exercise extra caution when handling the FSPR bit. -*/ -#define BSP_CFG_FAW_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* The ROM code protection register is a function to prohibit reading from or programming to the flash memory - when the flash programmer is used during off-board programming. - ROMCODE - ROM Code Protection Register - b31:b0 ROM Code - 0000 0000h: ROM code protection enabled (ROM code protection 1). - 0000 0001h: ROM code protection enabled (ROM code protection 2). - Other than above: ROM code protection disabled. - Note. The ROMCODE register should be set in 32-bit units. -*/ -#define BSP_CFG_ROMCODE_REG_VALUE (0xFFFFFFFF) //Disable by default - -/* Select the bank mode of dual-bank function of the code flash memory. - 0 = Dual mode. - 1 = Linear mode. - NOTE: If the dual bank function has been incorporated in a device, select the bank mode in this macro. - Default setting of the bank mode is linear mode. - If the dual bank function has not been incorporated in a device, this macro should be 1. -*/ -#define BSP_CFG_CODE_FLASH_BANK_MODE (1) //Linear mode by default - -/* Select the startup bank of the program when dual bank function is in dual mode. - 0 = The address range of bank 1 from FFE00000h to FFEFFFFFh and bank 0 from FFF00000h to FFFFFFFFh. - 1 = The address range of bank 1 from FFF00000h to FFFFFFFFh and bank 0 from FFE00000h to FFEFFFFFh. - NOTE: If the dual bank function has been incorporated in a device, select the start bank in this macro. - Default setting of the start bank is bank0. - If the dual bank function has not been incorporated in a device, this macro should be 0. -*/ -#define BSP_CFG_CODE_FLASH_START_BANK (0) //Bank0 by default - -/* This macro lets other modules no if a RTOS is being used. - 0 = RTOS is not used. - 1 = FreeRTOS is used. - 2 = SEGGER embOS is used. - 3 = Micrium MicroC/OS is used. - 4 = Renesas RI600V4 & RI600PX is used. -*/ -#define BSP_CFG_RTOS_USED (1) - -/* This macro is used to select which CMT channel used for system timer of RTOS. - * The setting of this macro is only valid if the macro BSP_CFG_RTOS_USED is set to a value other than 0. */ -#if (BSP_CFG_RTOS_USED != 0) -/* Setting value. - * 0 = CMT channel 0 used for system timer of RTOS (recommended to be used for RTOS). - * 1 = CMT channel 1 used for system timer of RTOS. - * 2 = CMT channel 2 used for system timer of RTOS. - * 3 = CMT channel 3 used for system timer of RTOS. - * Others = Invalid. */ -#define BSP_CFG_RTOS_SYSTEM_TIMER (0) -#endif - -/* By default modules will use global locks found in mcu_locks.c. If the user is using a RTOS and would rather use its - locking mechanisms then they can change this macro. - NOTE: If '1' is chosen for this macro then the user must also change the next macro 'BSP_CFG_USER_LOCKING_TYPE'. - 0 = Use default locking (non-RTOS) - 1 = Use user defined locking mechanism. -*/ -#define BSP_CFG_USER_LOCKING_ENABLED (0) - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to redefine the typedef - that is used for the locks. If the user is using a RTOS then they would likely redefine the typedef to be - a semaphore/mutex type of their RTOS. Use the macro below to set the type that will be used for the locks. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_TYPE bsp_lock_t - -/* If the user decides to use their own locking mechanism with FIT modules then they will need to define the functions - that will handle the locking and unlocking. These functions should be defined below. - If BSP_CFG_USER_LOCKING_ENABLED is != 0: - R_BSP_HardwareLock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION(mcu_lock_t hw_index) - R_BSP_HardwareUnlock(mcu_lock_t hw_index) will call BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION(mcu_lock_t hw_index) - NOTE:With these functions the index into the array holding the global hardware locks is passed as the parameter. - R_BSP_SoftwareLock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - R_BSP_SoftwareUnlock(BSP_CFG_USER_LOCKING_TYPE * plock) will call - BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION(BSP_CFG_USER_LOCKING_TYPE * plock) - NOTE:With these functions the actual address of the lock to use is passed as the parameter. - NOTE: These functions must return a boolean. If lock was obtained or released successfully then return true. Else, - return false. - NOTE: If BSP_CFG_USER_LOCKING_ENABLED == 0 then this typedef is ignored. - NOTE: Do not surround the type with parentheses '(' ')'. -*/ -#define BSP_CFG_USER_LOCKING_HW_LOCK_FUNCTION my_hw_locking_function -#define BSP_CFG_USER_LOCKING_HW_UNLOCK_FUNCTION my_hw_unlocking_function -#define BSP_CFG_USER_LOCKING_SW_LOCK_FUNCTION my_sw_locking_function -#define BSP_CFG_USER_LOCKING_SW_UNLOCK_FUNCTION my_sw_unlocking_function - -/* If the user would like to determine if a warm start reset has occurred, then they may enable one or more of the - * following callback definitions AND provide a call back function name for the respective callback - * function (to be defined by the user). Setting BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED = 1 will result - * in a callback to the user defined my_sw_warmstart_prec_function just prior to the initialization of the C - * runtime environment by resetprg. - * - * Setting BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED = 1 will result in a callback to the user defined - * my_sw_warmstart_postc_function just after the initialization of the C runtime environment by resetprg. - */ -#define BSP_CFG_USER_WARM_START_CALLBACK_PRE_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_PRE_C_FUNCTION my_sw_warmstart_prec_function - -#define BSP_CFG_USER_WARM_START_CALLBACK_POST_INITC_ENABLED (0) -#define BSP_CFG_USER_WARM_START_POST_C_FUNCTION my_sw_warmstart_postc_function - -/* By default FIT modules will check input parameters to be valid. This is helpful during development but some users - will want to disable this for production code. The reason for this would be to save execution time and code space. - This macro is a global setting for enabling or disabling parameter checking. Each FIT module will also have its - own local macro for this same purpose. By default the local macros will take the global value from here though - they can be overridden. Therefore, the local setting has priority over this global setting. Disabling parameter - checking should only used when inputs are known to be good and the increase in speed or decrease in code space is - needed. - 0 = Global setting for parameter checking is disabled. - 1 = Global setting for parameter checking is enabled (Default). -*/ -#define BSP_CFG_PARAM_CHECKING_ENABLE (1) - -/* This macro is used to define the voltage that is supplied to the MCU (Vcc). This macro is defined in millivolts. This - macro does not actually change anything on the MCU. Some FIT modules need this information so it is defined here. */ -#define BSP_CFG_MCU_VCC_MV (3300) - -/* There are multiple versions of the RSKRX65N-2MB. Choose which board is currently being used below. - 0 = 1st Prototype Board (RTK50565N2CxxxxxBR) - 1 = rev. 1.00 Board (RTK50565N2C00000BE) - 2 = RX65N Envision Kit -*/ -#define BSP_CFG_BOARD_REVISION (2) - -#endif /* R_BSP_CONFIG_REF_HEADER_FILE */ - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_bsp_config_readme.txt b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_bsp_config_readme.txt deleted file mode 100644 index 2767f7bfe50..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_bsp_config_readme.txt +++ /dev/null @@ -1,12 +0,0 @@ -FIT r_config folder -------------------- -The purpose of the r_config folder is to provide one place where the user can store all of their FIT configuration -files. Putting the files in one place makes them easy to find, backup, and put in a version control system. - -FIT Modules are distributed with a reference configuration file. These files end with '_reference.h'. For example, -the reference configuration file for the r_bsp is named r_bsp_config_reference.h. Reference configuration files are -provided so that the user always has a known-good configuration to revert to. When adding a FIT Module to a project the -user should copy this reference configuration file to this folder and remove '_reference' from the filename -(r_bsp_config_reference.h is renamed to r_bsp_config.h). For the r_bsp the reference configuration file can be found in -the 'board' folder for the currently chosen development board. For other FIT Modules the reference configuration file -can be found in the 'ref' folder of the FIT Module. diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_bsp_interrupt_config.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_bsp_interrupt_config.h deleted file mode 100644 index 745030010e3..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_bsp_interrupt_config.h +++ /dev/null @@ -1,224 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_bsp_interrupt_config.h -* Description : This module maps Interrupt A & B interrupts. More information on how this is done is given below. -***********************************************************************************************************************/ -/********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* : 01.10.2016 1.00 First Release -* : 31.01.2017 1.01_ES Changed the name of the following macro definition, because there was a mistake -* in the name of macro definition. -* - From XXX_TPU0_TGI0V to XXX_TPU0_TCI0V. -* - From XXX_TPU1_TGI1V to XXX_TPU1_TCI1V. -* - From XXX_TPU1_TGI1U to XXX_TPU1_TCI1U. -* - From XXX_TPU2_TGI2V to XXX_TPU2_TCI2V. -* - From XXX_TPU2_TGI2U to XXX_TPU2_TCI2U. -* - From XXX_TPU3_TGI3V to XXX_TPU3_TCI3V. -* - From XXX_TPU4_TGI4V to XXX_TPU4_TCI4V. -* - From XXX_TPU4_TGI4U to XXX_TPU4_TCI4U. -* - From XXX_TPU5_TGI5V to XXX_TPU5_TCI5V. -* - From XXX_TPU5_TGI5U to XXX_TPU5_TCI5U. -* - From XXX_MTU0_TGIV0 to XXX_MTU0_TCIV0. -* - From XXX_MTU1_TGIV1 to XXX_MTU1_TCIV1. -* - From XXX_MTU1_TGIU1 to XXX_MTU1_TCIU1. -* - From XXX_MTU2_TGIV2 to XXX_MTU2_TCIV2. -* - From XXX_MTU2_TGIU2 to XXX_MTU2_TCIU2. -* - From XXX_MTU3_TGIV3 to XXX_MTU3_TCIV3. -* - From XXX_MTU4_TGIV4 to XXX_MTU4_TCIV4. -* - From XXX_MTU6_TGIV6 to XXX_MTU6_TCIV6. -* - From XXX_MTU7_TGIV7 to XXX_MTU7_TCIV7. -* - From XXX_MTU8_TGIV8 to XXX_MTU8_TCIV8. -* Added select processing of the following software configurable interrupt source. -* - TSIP_PROC_BUSY -* - TSIP_ROMOK -* - TSIP_LONG_PLG -* - TSIP_TEST_BUSY -* - TSIP_WRRDY0 -* - TSIP_WRRDY1 -* - TSIP_WRRDY4 -* - TSIP_RDRDY0 -* - TSIP_RDRDY1 -* - TSIP_INTEGRATE_WRRDY -* - TSIP_INTEGRATE_RDRDY -***********************************************************************************************************************/ -#ifndef R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE -#define R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE - -/*********************************************************************************************************************** -Macro definitions -***********************************************************************************************************************/ - -/* If you wish to use one of the interrupt below then set the appropriate configuration macro to the vector number you - * wish to use for that interrupt. For example, if you want to use the RTC carry interrupt (CUP) at vector 176 then you - * would do the following: - * - * #define BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP 176 - */ - -/* Interrupt B Sources. - * -Valid vector numbers are 128-207. - * -There are more vector slots for B sources than actual B sources. By default all B sources are mapped. - * -If using the 'TPU1, TGI1A' interrupt it must be vector 144 or 145. It is set to 144 by default. - * -If a peripheral interrupt is going to be used to wake up the MCU from All-Module Clock Stop Mode then it must be - * in a vector between 146 to 157. Peripheral interrupts that can do this are TMR interrupts and the 'USB0, USBI0' - * interrupt. By default the TMR interrupts are chosen since there are 12 of them and there are 12 slots. - */ -#define BSP_MAPPED_INT_CFG_B_VECT_CMT2_CMI2 128 -#define BSP_MAPPED_INT_CFG_B_VECT_CMT3_CMI3 129 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIA0 146 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_CMIB0 147 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR0_OVI0 148 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIA1 149 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_CMIB1 150 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR1_OVI1 151 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIA2 152 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_CMIB2 153 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR2_OVI2 154 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIA3 155 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_CMIB3 156 -#define BSP_MAPPED_INT_CFG_B_VECT_TMR3_OVI3 157 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0A 130 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0B 131 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0C 132 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TGI0D 133 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU0_TCI0V 134 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1A 144 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TGI1B 135 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1V 136 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU1_TCI1U 137 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2A 138 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TGI2B 139 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2V 140 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU2_TCI2U 141 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3A 142 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3B 143 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3C 145 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TGI3D 158 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU3_TCI3V 159 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4A 160 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TGI4B 161 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4V 162 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU4_TCI4U 163 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5A 164 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TGI5B 165 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5V 166 -#define BSP_MAPPED_INT_CFG_B_VECT_TPU5_TCI5U 167 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC0I0 168 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_IC1I0 169 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC0I0 170 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW0_OC1I0 171 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC0I1 172 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_IC1I1 173 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC0I1 174 -#define BSP_MAPPED_INT_CFG_B_VECT_CMTW1_OC1I1 175 -#define BSP_MAPPED_INT_CFG_B_VECT_RTC_CUP 176 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXF0 177 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXF0 178 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_RXM0 179 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN0_TXM0 180 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXF1 181 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXF1 182 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_RXM1 183 -#define BSP_MAPPED_INT_CFG_B_VECT_CAN1_TXM1 184 -#define BSP_MAPPED_INT_CFG_B_VECT_USB0_USBI0 185 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12ADI0 186 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GBADI0 187 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC0_S12GCADI0 188 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12ADI1 189 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GBADI1 190 -#define BSP_MAPPED_INT_CFG_B_VECT_S12ADC1_S12GCADI1 191 - -#if !defined(BSP_MCU_RX65N_2MB) /* In the case of 512K, 768K or 1Mbyte ROM capacity. */ -#define BSP_MAPPED_INT_CFG_B_VECT_RNG_RNGEND 192 -#endif - -#define BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR18I 193 -#define BSP_MAPPED_INT_CFG_B_VECT_ELC_ELSR19I 194 - -#if defined(BSP_MCU_RX65N_2MB) /* In the case of 1.5 or 2Mbyte ROM capacity. */ -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_PROC_BUSY 195 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_ROMOK 196 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_LONG_PLG 197 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_TEST_BUSY 198 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY0 199 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY1 200 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_WRRDY4 201 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY0 202 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_RDRDY1 203 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_WRRDY 204 -#define BSP_MAPPED_INT_CFG_B_VECT_TSIP_INTEGRATE_RDRDY 205 -#endif - -/* Interrupt A Sources. - * -Valid vector numbers are 208-255. - * -There are more A sources than A vector slots. By default none of the GPT interrupts are mapped. - * -If using the 'MTU1, TGI1A' interrupt it must be vector 208 or 209. It is set to 208 by default. - */ -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIA0 209 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIB0 210 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIC0 211 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGID0 212 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TCIV0 213 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIE0 214 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU0_TGIF0 215 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIA1 208 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TGIB1 216 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIV1 217 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU1_TCIU1 218 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIA2 219 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TGIB2 220 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIV2 221 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU2_TCIU2 222 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIA3 223 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIB3 224 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGIC3 225 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TGID3 226 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU3_TCIV3 227 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIA4 228 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIB4 229 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGIC4 230 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TGID4 231 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU4_TCIV4 232 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIU5 233 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIV5 234 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU5_TGIW5 235 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIA6 236 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIB6 237 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGIC6 238 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TGID6 239 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU6_TCIV6 240 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIA7 241 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIB7 242 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGIC7 243 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TGID7 244 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU7_TCIV7 245 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIA8 246 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIB8 247 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGIC8 248 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TGID8 249 -#define BSP_MAPPED_INT_CFG_A_VECT_MTU8_TCIV8 250 - -#if !defined(BSP_MCU_RX65N_2MB) /* In the case of 512K, 768K or 1Mbyte ROM capacity. */ -#define BSP_MAPPED_INT_CFG_A_VECT_AES_AESRDY 251 -#define BSP_MAPPED_INT_CFG_A_VECT_AES_AESEND 252 -#endif - -#endif /* R_BSP_INTERRUPT_CONFIG_REF_HEADER_FILE */ - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_byteq_config.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_byteq_config.h deleted file mode 100644 index 907d2379240..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_byteq_config.h +++ /dev/null @@ -1,59 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_byteq_config.h -* Description : Configures the byte queue memory allocation -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 24.07.2013 1.00 Initial Release -* : 11.21.2014 1.20 Removed dependency to BSP -* : 30.09.2015 1.50 Added dependency to BSP -***********************************************************************************************************************/ -#ifndef BYTEQ_CONFIG_H -#define BYTEQ_CONFIG_H - -/*********************************************************************************************************************** -Includes , "Project Includes" -***********************************************************************************************************************/ -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - Available settings: - BSP_CFG_PARAM_CHECKING_ENABLE: - Utilizes the system default setting - 1: - Includes parameter checking - 0: - Compiles out parameter checking -*/ -#define BYTEQ_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY IF SHOULD USE MALLOC() TO ALLOCATE MEMORY FOR QUEUE CONTROL BLOCKS */ -#define BYTEQ_CFG_USE_HEAP_FOR_CTRL_BLKS (0) - -/* SPECIFY NUMBER OF STATIC QUEUE CONTROL BLOCKS TO SUPPORT */ -/* valid only when BYTEQ_USE_HEAP_FOR_CTRL_BLKS is set to 0 */ -#define BYTEQ_CFG_MAX_CTRL_BLKS (4) - - -#endif /* BYTEQ_CONFIG_H */ diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_cmt_rx_config.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_cmt_rx_config.h deleted file mode 100644 index bfb0bc72d76..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_cmt_rx_config.h +++ /dev/null @@ -1,37 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_cmt_rx_config.h -* Description : Configures the r_cmt_rx code. -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* : 06.11.2013 2.00 First GSCE Release. -***********************************************************************************************************************/ -#ifndef CMT_CONFIG_HEADER_FILE -#define CMT_CONFIG_HEADER_FILE - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ -/* The interrupt priority level to be used for CMT interrupts. */ -#define CMT_RX_CFG_IPR (5) - -#endif /* CMT_CONFIG_HEADER_FILE */ - - diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_ether_rx_config.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_ether_rx_config.h deleted file mode 100644 index f8b7e21ba15..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_ether_rx_config.h +++ /dev/null @@ -1,117 +0,0 @@ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_ether_rx_config.h - * Version : 1.03 - * Description : Ethernet module device driver - ***********************************************************************************************************************/ -/********************************************************************************************************************** - * History : DD.MM.YYYY Version Description - * : 22.07.2014 1.00 First Release - * : 31.03.2016 1.01 Added changes for RX63N. - * : 01.10.2016 1.02 Added changes for RX65N. - * : 01.10.2017 1.03 Added changes for RX65N-2MB. - ***********************************************************************************************************************/ - -/* Guards against multiple inclusion */ -#ifndef R_ETHER_RX_CONFIG_H - #define R_ETHER_RX_CONFIG_H - -/*********************************************************************************************************************** - Macro definitions - ***********************************************************************************************************************/ - -/* Ethernet interface select. - 0 = MII (Media Independent Interface) - 1 = RMII (Reduced Media Independent Interface) - */ - #define ETHER_CFG_MODE_SEL (1) - -/* PHY-LSI address setting for ETHER0/1. - Please set the value 31 ETHER_CFG_CH0_PHY_ADDRESS when use default setting of the RSK+RX63N. - Please set the value 30 ETHER_CFG_CH0_PHY_ADDRESS when use default setting of the RSK+RX65N/RSK+RX65N_2MB. - Please set the value 0 ETHER_CFG_CH0_PHY_ADDRESS and value 1 ETHER_CFG_CH1_PHY_ADDRESS when use default setting of the RSK+RX64M/RSK+RX71M. - */ - #define ETHER_CFG_CH0_PHY_ADDRESS (0) /* Please define the PHY-LSI address in the range of 0-31. */ - #define ETHER_CFG_CH1_PHY_ADDRESS (1) /* Please define the PHY-LSI address in the range of 0-31. */ - -/* The number of Rx descriptors. */ - #define ETHER_CFG_EMAC_RX_DESCRIPTORS (1) - -/* The number of Tx descriptors. */ - #define ETHER_CFG_EMAC_TX_DESCRIPTORS (1) - -/* Please define the size of the sending and receiving buffer in the value where one frame can surely be stored - because the driver is single-frame/single-buffer processing. */ - #define ETHER_CFG_BUFSIZE (1536) /* Must be 32-byte aligned */ - -/* EINT interrupt priority level. This definition is not used when EINT interrupt is assigned to Group interrupt. */ - #define ETHER_CFG_EINT_INT_PRIORITY (2) /* Please define the interruption level within the range of 1-15. */ - -/* Group AL1 interrupt priority level. This definition is not used when EINT interrupt is assigned to Peripheral - interrupt. */ - #define ETHER_CFG_AL1_INT_PRIORTY (2) /* Please define the interruption level within the range of 1-15. */ - -/* The register bus of PHY0/1 for ETHER0/1 select - 0 = The access of the register of PHY uses ETHER0. - 1 = The access of the register of PHY uses ETHER1. - - Please set the value 0 ETHER_CFG_CH0_PHY_ACCESS when use default setting of the RSK+RX63N. - Please set the value 0 ETHER_CFG_CH0_PHY_ACCESS when use default setting of the RSK+RX65N/RSK+RX65N_2MB. - Please set the value 1 ETHER_CFG_CH0_PHY_ACCESS and ETHER_CFG_CH1_PHY_ACCESS when use default setting of the RSK+RX64M/RSK+RX71M. - */ - #define ETHER_CFG_CH0_PHY_ACCESS (0) - #define ETHER_CFG_CH1_PHY_ACCESS (1) - -/* Define the access timing of MII/RMII register */ - #define ETHER_CFG_PHY_MII_WAIT (8) /* Plese define the value of 8 or more */ - -/* Define the waiting time for reset completion of PHY-LSI */ - #define ETHER_CFG_PHY_DELAY_RESET (0x00020000L) - -/** - * Link status read from LMON bit of ETHERC PSR register. The state is hardware dependent. - */ - #define ETHER_CFG_LINK_PRESENT (0) - -/* Use LINKSTA signal for detect link status changes - 0 = unused (use PHY-LSI status register) - 1 = use (use LINKSTA signal) - */ - #define ETHER_CFG_USE_LINKSTA (0) /* This setting is reflected in all channels */ - -/* Definition of whether or not to use KSZ8041NL of the Micrel Inc. - 0 = unused - 1 = use - */ - #define ETHER_CFG_USE_PHY_KSZ8041NL (0) - -/*********************************************************************************************************************** - Typedef definitions - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global variables - ***********************************************************************************************************************/ - -/*********************************************************************************************************************** - Exported global functions (to be accessed by other files) - ***********************************************************************************************************************/ - -#endif /* R_ETHER_RX_CONFIG_H */ diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_flash_rx_config.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_flash_rx_config.h deleted file mode 100644 index fbf916a0e97..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_flash_rx_config.h +++ /dev/null @@ -1,116 +0,0 @@ -/*********************************************************************************************************************** - * DISCLAIMER - * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No - * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all - * applicable laws, including copyright laws. - * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING - * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM - * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES - * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS - * SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. - * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of - * this software. By using this software, you agree to the additional terms and conditions found by accessing the - * following link: - * http://www.renesas.com/disclaimer - * - * Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** - * File Name : r_flash_rx_config_reference.h - * Description : Configures the FLASH API module for RX200 and RX600 Series MCU's. - ***********************************************************************************************************************/ -/*********************************************************************************************************************** -* History : DD.MM.YYYY Version Description -* 12.04.2014 1.00 First Release -* 22.12.2014 1.10 Added flash type usage comments. -* 25.06.2015 1.20 Added FLASH_CFG_CODE_FLASH_RUN_FROM_ROM. -* : 12.10.2016 2.00 Modified for BSPless operation (added FLASH_CFG_USE_FIT_BSP). -***********************************************************************************************************************/ -#ifndef FLASH_CONFIG_HEADER_FILE -#define FLASH_CONFIG_HEADER_FILE - -/* Set the following value to 0 when building without using the FIT BSP Module */ -#define FLASH_CFG_USE_FIT_BSP (1) - - -/*********************************************************************************************************************** - Configuration Options - ***********************************************************************************************************************/ -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING - * Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting - * Setting to 1 includes parameter checking; 0 compiles out parameter checking - */ -#define FLASH_CFG_PARAM_CHECKING_ENABLE (1) - - -/****************************************************************************** - ENABLE CODE FLASH PROGRAMMING -******************************************************************************/ -/* If you are only using data flash, set this to 0. - * Setting to 1 includes code to program the ROM area. When programming ROM, - * code must be executed from RAM, except under certain restrictions for flash - * type 3 (see section 2.14 in App Note). See section 2.13 in the App Note for - * details on how to set up code and the linker to execute code from RAM. - */ -#define FLASH_CFG_CODE_FLASH_ENABLE (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING DATA FLASH OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces data flash API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, data flash operations return immediately after the operation has been - * started. Notification of the operation completion is done via the callback - * function. - */ -#define FLASH_CFG_DATA_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE BGO/NON-BLOCKING CODE FLASH (ROM) OPERATIONS -******************************************************************************/ -/* Setting this to 0 forces ROM API function to block until completed. - * Setting to 1 places the module in BGO (background operations) mode. In BGO - * mode, ROM operations return immediately after the operation has been started. - * Notification of the operation completion is done via the callback function. - * When reprogramming ROM, THE RELOCATABLE VECTOR TABLE AND CORRESPONDING - * INTERRUPT ROUTINES MUST BE IN RAM. - * See sections 2.16 Usage Notes in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_BGO (0) - - -/****************************************************************************** - ENABLE CODE FLASH SELF-PROGRAMMING -******************************************************************************/ -/* Set this to 0 when programming code flash while executing in RAM. - * Set this to 1 when programming code flash while executing from another - * segment in ROM (possible only with RX64M, RX71M, RX65N-2 groups). - * See section 2.14 in the App Note. - */ -#define FLASH_CFG_CODE_FLASH_RUN_FROM_ROM (0) - - -/****************************************************************************** - SET IPL OF FLASH READY INTERRUPT -******************************************************************************/ -#define FLASH_CFG_FLASH_READY_IPL (5) // Flash type 2 only - - -/****************************************************************************** - ENABLE OR DISABLE LOCK BIT PROTECTION -******************************************************************************/ -/* Each erasure block has a corresponding lock bit that can be used to - * protect that block from being programmed/erased after the lock bit is - * set. The use of lock bits can be used or ignored. - * Setting this to 1 will cause lock bits to be ignored and programs/erases to a - * block will not be limited. - * Setting this to 0 will cause lock bits to be used as the user configures through - * the Control command. This only applies to ROM as the DF does not have lock bits. - */ -#define FLASH_CFG_IGNORE_LOCK_BITS (1) // Flash type 2 only - - -#endif /* FLASH_CONFIG_HEADER_FILE */ diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_sci_rx_config.h b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_sci_rx_config.h deleted file mode 100644 index bfcd33c46e7..00000000000 --- a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_config/r_sci_rx_config.h +++ /dev/null @@ -1,171 +0,0 @@ -/*********************************************************************************************************************** -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No -* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM -* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES -* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS -* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of -* this software. By using this software, you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* -* Copyright (C) 2013-2017 Renesas Electronics Corporation. All rights reserved. -***********************************************************************************************************************/ -/*********************************************************************************************************************** -* File Name : r_sci_rx_config.h -* Description : Configures the SCI driver -************************************************************************************************************************ -* History : DD.MM.YYYY Version Description -* 25.09.2013 1.00 Initial Release -* 17.04.2014 1.20 Added comments for new RX110 support. -* 02.07.2014 1.30 Fixed bug that caused Group12 rx errors to only be enabled for channel 2. -* 25.11.2014 1.40 Added comments for RX113 support -* 30.09.2015 1.70 Added comments for RX23T support -* 01.10.2016 1.80 Added support for RX65N (comments and TX/RX FIFO THRESHOLD options) -* 19.12.2016 1.90 Added comments for RX24U support -* 07.03.2017 2.00 Added comments for RX130-512KB support -***********************************************************************************************************************/ -#ifndef SCI_CONFIG_H -#define SCI_CONFIG_H - -#include "platform.h" - -/*********************************************************************************************************************** -Configuration Options -***********************************************************************************************************************/ - -/* SPECIFY WHETHER TO INCLUDE CODE FOR API PARAMETER CHECKING */ -/* Setting to BSP_CFG_PARAM_CHECKING_ENABLE utilizes the system default setting */ -/* Setting to 1 includes parameter checking; 0 compiles out parameter checking */ -#define SCI_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -/* SPECIFY WHETHER TO INCLUDE CODE FOR DIFFERENT SCI MODES */ -/* Setting an equate to 1 includes code specific to that mode. */ -#define SCI_CFG_ASYNC_INCLUDED (1) -#define SCI_CFG_SYNC_INCLUDED (0) -#define SCI_CFG_SSPI_INCLUDED (0) - -/* SPECIFY BYTE VALUE TO TRANSMIT WHILE CLOCKING IN DATA IN SSPI MODES */ -#define SCI_CFG_DUMMY_TX_BYTE (0xFF) - -/* SPECIFY CHANNELS TO INCLUDE SOFTWARE SUPPORT FOR 1=included, 0=not */ -/* - * NOTE: If using ASYNC mode, adjust BYTEQ_CFG_MAX_CTRL_BLKS in r_byteq_config.h - * to provide 2 queues per channel (static mode only). - * * = port connector RDKRX63N, RSKRX210, RSKRX11x - * u = channel used by the USB-UART port (G1CUSB0) - * a = this channel is used only for RX130-512KB - * RX MCU supported channels - * - * CH# 110 111 113 130 210 230 231 23T 24T 24U 63N 631 64M 71M 65N - * --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- - * CH0 X Xa X* X X X* X X X X - * CH1 X X* X* Xu X X X Xu Xu Xu X X X X X - * CH2 X X X X X Xu - * CH3 X X X X X - * CH4 X X X X X - * CH5 X X X X X X Xu X X X X X X X X - * CH6 X X X X X X X X X X X X - * CH7 X X Xu Xu X - * CH8 X Xa X X X X X X X - * CH9 X Xa X X X X X X X - * CH10 X X X - * CH11 X X X X - * CH12 X X X X X X X X X X X X -*/ - -#define SCI_CFG_CH0_INCLUDED (0) -#define SCI_CFG_CH1_INCLUDED (0) -#define SCI_CFG_CH2_INCLUDED (1) -#define SCI_CFG_CH3_INCLUDED (0) -#define SCI_CFG_CH4_INCLUDED (0) -#define SCI_CFG_CH5_INCLUDED (0) -#define SCI_CFG_CH6_INCLUDED (0) -#define SCI_CFG_CH7_INCLUDED (0) -#define SCI_CFG_CH8_INCLUDED (1) -#define SCI_CFG_CH9_INCLUDED (0) -#define SCI_CFG_CH10_INCLUDED (0) -#define SCI_CFG_CH11_INCLUDED (0) -#define SCI_CFG_CH12_INCLUDED (0) - -/* SPECIFY ASYNC MODE TX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_TX_BUFSIZ (80) -#define SCI_CFG_CH1_TX_BUFSIZ (80) -#define SCI_CFG_CH2_TX_BUFSIZ (120) -#define SCI_CFG_CH3_TX_BUFSIZ (80) -#define SCI_CFG_CH4_TX_BUFSIZ (80) -#define SCI_CFG_CH5_TX_BUFSIZ (80) -#define SCI_CFG_CH6_TX_BUFSIZ (80) -#define SCI_CFG_CH7_TX_BUFSIZ (80) -#define SCI_CFG_CH8_TX_BUFSIZ (120) -#define SCI_CFG_CH9_TX_BUFSIZ (80) -#define SCI_CFG_CH10_TX_BUFSIZ (80) -#define SCI_CFG_CH11_TX_BUFSIZ (80) -#define SCI_CFG_CH12_TX_BUFSIZ (80) - -/* SPECIFY ASYNC MODE RX QUEUE BUFFER SIZES (will not allocate if chan not enabled */ -#define SCI_CFG_CH0_RX_BUFSIZ (80) -#define SCI_CFG_CH1_RX_BUFSIZ (80) -#define SCI_CFG_CH2_RX_BUFSIZ (80) -#define SCI_CFG_CH3_RX_BUFSIZ (80) -#define SCI_CFG_CH4_RX_BUFSIZ (80) -#define SCI_CFG_CH5_RX_BUFSIZ (80) -#define SCI_CFG_CH6_RX_BUFSIZ (80) -#define SCI_CFG_CH7_RX_BUFSIZ (80) -#define SCI_CFG_CH8_RX_BUFSIZ (80) -#define SCI_CFG_CH9_RX_BUFSIZ (80) -#define SCI_CFG_CH10_RX_BUFSIZ (80) -#define SCI_CFG_CH11_RX_BUFSIZ (80) -#define SCI_CFG_CH12_RX_BUFSIZ (80) - -/* -* ENABLE TRANSMIT END INTERRUPT (ASYNCHRONOUS) -* This interrupt only occurs when the last bit of the last byte of data -* has been sent and the transmitter has become idle. The interrupt calls -* the user's callback function specified in R_SCI_Open() and passes it an -* SCI_EVT_TEI event. A typical use of this feature is to disable an external -* transceiver to save power. It would then be up to the user's code to -* re-enable the transceiver before sending again. Not including this feature -* reduces code space used by the interrupt. Note that this equate is only -* for including the TEI code. The interrupt itself must be enabled using an -* R_SCI_Control(hdl, SCI_CMD_EN_TEI, NULL) call. -*/ -#define SCI_CFG_TEI_INCLUDED (0) /* 1=included, 0=not */ - -/* -* SET GROUP12 (RECEIVER ERROR) INTERRUPT PRIORITY; RX63N/631 ONLY -* This #define sets the priority level for the interrupt that handles -* receiver overrun, framing, and parity errors for all SCI channels -* on the RX63N/631. It is ignored for all other parts. -*/ -#define SCI_CFG_RXERR_PRIORITY (3) /* (RX63N/631 ONLY) 1 lowest, 15 highest */ - -/* -* SET GROUPBL0 (ERI, TEI) INTERRUPT PRIORITY; RX64M/RX71M/RX65N ONLY -* SET GROUPBL1, GROUPAL0 (ERI,TEI) INTERRUPT PRIORITY; RX65N ONLY -* This sets the priority level for receiver overrun, framing, and parity errors -* as well as TEI interrupts for all SCI channels. -*/ -#define SCI_CFG_ERI_TEI_PRIORITY (3) /* (RX64M/RX71M/RX65N ONLY) 1 lowest, 15 highest */ - -/* ENABLE TX/RX FIFO; (SCIi supported MCU ONLY) 1=included, 0=not */ -#define SCI_CFG_CH10_FIFO_INCLUDED (0) -#define SCI_CFG_CH11_FIFO_INCLUDED (0) - -/* SET TX FIFO THRESHOLD; (SCIi supported MCU ONLY) 0 lowest, 15 highest */ -/* TX FIFO THRESHOLD is invalid in Clock Synchronous Mode and Simple SPI Mode. */ -/* Set the same value for TX FIFO THRESHOLD and RX FIFO THRESHOLD in Clock Synchronous Mode and Simple SPI Mode. */ -#define SCI_CFG_CH10_TX_FIFO_THRESH (8) -#define SCI_CFG_CH11_TX_FIFO_THRESH (8) - -/* SET RX FIFO THRESHOLD; (SCIi supported MCU ONLY) 1 lowest, 15 highest */ -#define SCI_CFG_CH10_RX_FIFO_THRESH (8) -#define SCI_CFG_CH11_RX_FIFO_THRESH (8) - - -#endif /* SCI_CONFIG_H */ diff --git a/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/doc/en/r01an2009ej0113-rx.pdf b/demos/renesas/rx65n-envision-kit/iar-ewrx/src/smc_gen/r_ether_rx/doc/en/r01an2009ej0113-rx.pdf deleted file mode 100644 index 7accbb5569d9af53b932cd394e148632d76d4081..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 670972 zcmdqIWmq1|(l&}iaCe8`@Zj$5uEE{i-Q6X)1b3I6xzTs=m9brn~qoFDy#SK*tLAd3$GS4i1``g_)I*p3v670*;#-AZ>1AtnXm% zVQfUm0FWkRWuxa{V+6<%GPAJI14IZJSeRJYSOBtwtn>iokEir(YyfdWO+q#n*7sXR zZC+kDV;iFnW`zIq`;fuP{vR2_#)h^=#`5|O){gHIg>0>yt!*3$Spf15#zy9bPPPt& z42-~1%(6z z7?|lf=vmlAM3{wH=@}R}Sl9%3x#`)N1Q-P9IRxlMh1gk`1vr>kSr}R9*%<_d*n|W) z=y|mP5;jK0Zkm5=!NAD=ac^S#A(`cmWNBj?QztV*1_s8DLAv~(p2#MV z`#C|Op2Aa4bqCHB7?&A69)Z z7OIo&3ea$h)D(Wl6*Po1&I?0MVmK=lUD9EbkSGUQEMNSBE|ELZlw`7Gjd7Uzjm_&c ziKRQ@S$|JZg*@iet7kz)ylqzs2{YH1=bNIWV$K{8LI#VSvm|`Lc9L^jVY<`PWVe`PtD7&ARU1x1)_!<~RTh=FUKqS`|;V7pCHMEM5snn~4hJ$R^7<}%7aJt@5qNM9qybI%z zN^wTyvZ05;cTU@XTp+sTj_*g+iX>0^@-Hj$Zx{Es4;B)AcZ*6+Mt`mX&Q4|`F2*)a z0AX80IXhz;fRLyRKtM!E^?#7cz{>mn`v=fUPWm=R`VL0_;P~C00puve=2+U0tt6)e zb>xBvyXClx6wQ)0rG^j4D?K_07XLPcj4Bee~sY%ufsp23dKs` zc$zm=T(K@hB%`C*y$sO*>qiMtC1n0j2zXcPzudmGzKtoxS3@}2&G!yMl|F$4Xd7I}SBV`+VNTW2SLoQ?5c;Rf*0DDxhL z04k2ga({RE)A-(zg_-$J$9L784V{!7jE(;|dPa`F`2F$jLhs|SvNiobbp05>-%}|3 z9!gmLdR^4qNu1Ee*~&^Apac-JRkr=_K7Zc%yN`g4jjfa8dq>tkn!JyL?GJ|!;*Y)` z1mnlZK8O#0_J{a0){mAyq3VP92Hf~q!PZXD)=l%HorQyi zj){?wotcr2o>?0p=3wh=_mK=J0fdcR%ngkd#RT8YrR<<@<7lVvU~FUP{#R7}^Wq;Y z7@6z;UzojT7ViUp*Xi$hR5W(9b#^c`{>U~&+?>STSBR7GJ1wTf_M!M+lP#vi{&Dli zh#!mTUHkV}L>WFB|BCOTjPEqZU&s?>`k?>nDa!ngHTplw0z_Fp=s(5*h_Zgrf2{G& zP~O4TP|4Uy6Y!pX0hEp1oB$Hm?-&&P>mu~mMM4{(E@xn2Z1^Gj1Mcq-e#gUK{66kE zK5qXE;m?v+wEa+pkp5$pzC-md#U0=8mGuoAKkWCBhUQLA&oBDCZD=)Oo5cPN53a9kB_flzO?g}hk>=^wg+s2N@Tsj)OZ)I%ek9l?y>z}vD2rnFx!Rc~J^a8Xp zR@T;a_IetyH!$Q}7GNL*41cIT;wLgIWuY`MT9-3C{i&dw62Sa*I735 zk{)j40>X<7dm&EGBx#{gV;tUVgioEBlFIC8CR1GzX!gGKPr84IBtFfCm!hiG3I$I# zvHR?V(UA4hh<~-(Y#|1nC04kZO1~3LCPq3>G6W

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