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fence
根据标准,读写外设会异步读写的寄存器应该需要内存屏障来保证正确性,可以参考 opensbi 的用法,或者看下面我搬运的一部分。现在所有寄存器都读写都没有,最好补充一下。
#define __io_br() do {} while (0) #define __io_ar() __asm__ __volatile__ ("fence i,r" : : : "memory"); #define __io_bw() __asm__ __volatile__ ("fence w,o" : : : "memory"); #define __io_aw() do {} while (0) #define readb(c) ({ u8 __v; __io_br(); __v = __raw_readb(c); __io_ar(); __v; }) #define readw(c) ({ u16 __v; __io_br(); __v = __raw_readw(c); __io_ar(); __v; }) #define readl(c) ({ u32 __v; __io_br(); __v = __raw_readl(c); __io_ar(); __v; }) #define writeb(v,c) ({ __io_bw(); __raw_writeb((v),(c)); __io_aw(); }) #define writew(v,c) ({ __io_bw(); __raw_writew((v),(c)); __io_aw(); }) #define writel(v,c) ({ __io_bw(); __raw_writel((v),(c)); __io_aw(); })
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使用裸指针上的 read_volatile 和 write_volatile 读写即可,编译器应该会自动插入 fence,不需要手写
read_volatile
write_volatile
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但编译器怎么知道应该插入哪种 fence?它似乎无法分辨一个地址指向的是外设的还是主存。
在 #274 中增加了屏障
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根据标准,读写外设会异步读写的寄存器应该需要内存屏障来保证正确性,可以参考 opensbi 的用法,或者看下面我搬运的一部分。现在所有寄存器都读写都没有,最好补充一下。
The text was updated successfully, but these errors were encountered: