From 47a510653853391c061a6587cc48eeaf468501c0 Mon Sep 17 00:00:00 2001 From: Jonathan Bell Date: Fri, 10 Jan 2025 10:18:36 +0000 Subject: [PATCH] DT: bcm2712: override supports-cqe to a cell We want to be able to control the interop surface exposed by Command Queueing across bcm2712 products to a more restrictive default, with selectable disable and permissive behaviour. Changing the bool to a cell lets it relay a tristate value. Also add the override parameter to CM5 as CM5-lite may interface with arbitrary eMMC or SD cards. (Reimplemented on 6.12 - bcm2712 dts now has a downstream/upstream split.) Signed-off-by: Jonathan Bell --- arch/arm/boot/dts/overlays/README | 11 ++++++++--- arch/arm64/boot/dts/broadcom/bcm2712-ds.dtsi | 2 +- arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts | 4 ++-- arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi | 3 ++- 4 files changed, 13 insertions(+), 7 deletions(-) diff --git a/arch/arm/boot/dts/overlays/README b/arch/arm/boot/dts/overlays/README index 6baa4577834960..a0824eccf0444b 100644 --- a/arch/arm/boot/dts/overlays/README +++ b/arch/arm/boot/dts/overlays/README @@ -405,9 +405,14 @@ Params: non-lite SKU of CM4). (default "on") - sd_cqe Set to "off" to disable Command Queueing if you - have an incompatible Class A2 SD card - (Pi 5 only, default "on") + sd_cqe Modify Command Queuing behaviour on the main SD + interface. Legal values are: + 0: disable CQ + 1: allow CQ for known-good SD A2 cards, and all + eMMC cards + 2: allow CQ for all SD A2 cards that aren't + known-bad, and all eMMC cards. + (2712 only, default "1") sd_overclock Clock (in MHz) to use when the MMC framework requests 50MHz diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-ds.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712-ds.dtsi index adff5ae55b1f46..82d97d4af84bfe 100644 --- a/arch/arm64/boot/dts/broadcom/bcm2712-ds.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcm2712-ds.dtsi @@ -586,7 +586,7 @@ clocks = <&clk_emmc2>; sdhci-caps-mask = <0x0000C000 0x0>; sdhci-caps = <0x0 0x0>; - supports-cqe; + supports-cqe = <1>; mmc-ddr-3_3v; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts index 83b88b0107f3c5..b6cb76ada0a2d2 100644 --- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts +++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts @@ -322,7 +322,7 @@ dpi_16bit_gpio2: &rp1_dpi_16bit_gpio2 { }; sd-uhs-sdr50; sd-uhs-ddr50; sd-uhs-sdr104; - supports-cqe; + supports-cqe = <1>; cd-gpios = <&gio_aon 5 GPIO_ACTIVE_LOW>; //no-1-8-v; status = "okay"; @@ -703,7 +703,7 @@ spi10_cs_pins: &spi10_cs_gpio1 {}; / { __overrides__ { - sd_cqe = <&sdio1>, "supports-cqe?"; + sd_cqe = <&sdio1>, "supports-cqe:0"; }; }; diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi index 79666d85c31a24..129d7be38eb930 100644 --- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi @@ -296,7 +296,7 @@ dpi_16bit_gpio2: &rp1_dpi_16bit_gpio2 { }; mmc-hs400-1_8v; mmc-hs400-enhanced-strobe; broken-cd; - supports-cqe; + supports-cqe = <1>; status = "okay"; }; @@ -710,5 +710,6 @@ spi10_cs_pins: &spi10_cs_gpio1 {}; <&ant2>, "output-low?=on"; noanthogs = <&ant1>,"status=disabled", <&ant2>, "status=disabled"; + sd_cqe = <&sdio1>, "supports-cqe:0"; }; };