Replies: 15 comments 7 replies
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Qucs-S currently provides the symbols only for ideal logic gates. Some of these devices (logic gates itself and triggers) could be used in analog mode. The Ngspice 74XX devices library will work if it will be wrapped in Qucs-S library. You have to draw symbol and attach SPICE model for every device. It is not a complex task, but requires a lot of work. |
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Also LTSpice has more advanced digital library for analog mode: https://github.com/texane/power_inverter/blob/master/ltspice/logic/74hc/74hc.lib It includes input/output transistors model. The MicroCAP version that is recommended for Ngspice includes only ideal gates with delay. The LTspice library also may work, but it must be ported manually because of incompatible logic gates definition syntax. |
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First cut at logic gates for mixed digital-analog simulations. I found a 74HC library modified for ngspice, "74HCng_short_2.lib". The mods are extensive using adc_bridge and dac_bridge. I haven't gotten the OR/NOR gates to work. The library is discussed here: Holger claims ngspice 42 allows PSpice and MicroCap U devices to work. I don't have those libraries to test. |
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Adding output resistance between gates may help. The XSPICE models has source output and may produce infinite values when connected to other logic input.
Did you tried the libraries from here: https://ngspice.sourceforge.io/model-parameters/MicroCap-LIBRARY.7z The 74HC series is inside dig000.lib file in the archive. |
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I found my errors in the OR/NOR test circuits and uploaded the corrected files above. I had brain fog... I found the MicroCap libraries in the link below. It would be nice to see an example using them with ngspice. I would like to get the symbols for all the logic devices. Is there a way to get them in the "sch" format so I can make libraries? Qucs makes creating curved lines from the Elliptic Arc very tedious since one cannot control the end points. I end up cutting sections from inductor symbol files. |
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I followed Holger's advice for using the MicroCap library "dig000.lib". I am having lot's of issues and some is due to Qucs-S and some may be due to ngspice. To start I created "NAND_hc.lib" from "dig000.lib". It is just 74HC00 and 74HC132. I made the sub "NAND_hc_mc.sch" using NAND_hc.lib. It works in "NAND_hc_mc_tran.sch". I then made a new sub "74HC00_mc.sch" using "dig000.lib". It doesn't work in "74HC00_mc_tran.sch" and generates a lot of errors. I then made "74HC00_mc_tran_mod.sch" using "NAND_hc_mc.sch" and it doesn't work but generates a one error. I am baffled how "NAND_hc_mc.sch" works in "NAND_hc_mc_tran.sch" but not in "74HC00_mc_tran_mod.sch". One clue is set "ngbehavior=psa" is not being included in 2 out of 3 netlists yet the errors are very different. Holger told me what to do in https://sourceforge.net/p/ngspice/discussion/120973/thread/e6442c59ce/?page=1 |
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Use SpiceFile instead of SpiceLib comp and you will get rid of |
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There is no way to export symbols of system devices. They are hardcoded in C++. |
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Per your recommendation I redid my subcircuits using "Spice netlist" using individual 74HCxx.cir files copy and pasted from MicroCap dig000.lib and things seem to be working. |
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I'm not having any luck getting the logic gates from the MicroCap "dig000.lib" to work in more complicated mixed-signal circuits like this Trainline Driver. To get the circuit to run I had to use "74HCng_gates.lib". These models use adc_bridge and dac_bridge. No 74HC74 so I had to simplify the circuit. Waiting for Holger. Also the VOM1271T isn't fully turning on the IRFP250. Turns out I forgot the model doesn't work... |
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Holger is looking into the issues I am having. There is a bug causing issues with MicroCap "dig000.lib" when "reset" is in the netlist but it doesn't always cause issues. I can make netlists using "dig000.lib" that work and ones that don't work. To make "bad" ones work I have to delete all "reset" statements. So far I'm not having issues with devices using adc_bridge and dac_bridge. I updated the project above with the latest. https://sourceforge.net/p/ngspice/discussion/120973/thread/e6442c59ce/?page=1 |
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I altered your schematic to use async counter. Plots look "nicer". As Holger said there is probably a bug in ngspice that cause the "reset" in the netlist to halt the digital simulation under certain circumstances. He also said Op doesn't work for "digital". I assume he means for "dig000.lib" and not "74HCng_gates.lib" which uses XSPICE. I made a netlist in the ngspice folder "74HC00-74_osc_div_tran.cir" that looks to be working. Everything that "bothers" ngspice or deletes DuSpice screen plotting is commented out. Is there a reason Timing Diagrams don't work for these plots? I was forced to use Nutmeg equations to space the traces out. |
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Updated Trainline_Driver_prj on 10/30/24 Holger uploaded a fix. He also made a new Windows nightly. More testing to do... |
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Updated Digital_Analog_Mixed_prj.zip 10/30/24 It's hit or miss finding TI behavioral/transient Spice models for specific digital devices. I prefer these for mixed signal analysis. Having issues with TI 74LCV74 and 74HCS74 Spice models. Data is different depending on pulse widths as detailed in link below. |
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"With ngspice-42 the simulation of 74xxx is established. PSPICE or MicroCap U devices will be translated into XSPICE event-based simulation."
https://sourceforge.net/p/ngspice/discussion/120973/thread/e6442c59ce/?limit=25&page=1#ebba
Do the models in Qucs-S support using ngspice/XSPICE as stated in #97? Is there an example using XSPICE logic?
I have a very old project using mixed analog/digital I want to try. It's a binary trainline driver for locomotives.
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