Skip to content

Commit 9a6ea77

Browse files
HalfSweetHalfSweet
committed
fix: 修复F002A索引
1 parent fd21854 commit 9a6ea77

File tree

1 file changed

+119
-119
lines changed

1 file changed

+119
-119
lines changed

‎boards.txt

+119-119
Original file line numberDiff line numberDiff line change
@@ -374,141 +374,141 @@ GenF003.menu.pnum.PY32F003x8.build.variant=PY32F003xx/PY32F003_Base
374374
# Generic PY32F002A Series
375375
###############################
376376

377-
GenF003.name=Generic PY32F002A Series
378-
379-
GenF003.upload.maximum_size=0
380-
GenF003.upload.maximum_data_size=0
381-
382-
GenF003.upload.tool=AirISP
383-
GenF003.upload.tool.default=AirISP
384-
385-
GenF003.build.core=arduino
386-
GenF003.build.board=GenF002A
387-
GenF003.build.mcu=cortex-m0plus
388-
GenF003.build.series=PY32F0xx
389-
GenF003.build.cmsis_lib_gcc=arm_cortexM0l_math
390-
GenF003.build.py_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial}
391-
GenF003.build.drivers_include="-I{build.system.path}/Arduino-PY32F0xx-Drivers/{build.series}_HAL_Driver/Inc" "-I{build.system.path}/Arduino-PY32F0xx-Drivers/{build.series}_HAL_Driver/Src" "-I{build.system.path}/{build.series}" "-I{build.system.path}/Arduino-PY32F0xx-Drivers/CMSIS/Device/{build.series}/Include/" "-I{build.system.path}/Arduino-PY32F0xx-Drivers/CMSIS/Device/{build.series}/Source/gcc/"
392-
393-
GenF003.menu.UploadSpeed.115200=115200
394-
GenF003.menu.UploadSpeed.115200.upload.speed=115200
395-
GenF003.menu.UploadSpeed.57600=57600
396-
GenF003.menu.UploadSpeed.57600.upload.speed=57600
397-
GenF003.menu.UploadSpeed.38400=38400
398-
GenF003.menu.UploadSpeed.38400.upload.speed=38400
399-
GenF003.menu.UploadSpeed.19200=19200
400-
GenF003.menu.UploadSpeed.19200.upload.speed=19200
401-
GenF003.menu.UploadSpeed.9600=9600
402-
GenF003.menu.UploadSpeed.9600.upload.speed=9600
403-
GenF003.menu.UploadSpeed.4800=4800
404-
GenF003.menu.UploadSpeed.4800.upload.speed=4800
405-
GenF003.menu.UploadSpeed.2400=2400
406-
GenF003.menu.UploadSpeed.2400.upload.speed=2400
407-
GenF003.menu.UploadSpeed.1200=1200
408-
GenF003.menu.UploadSpeed.1200.upload.speed=1200
377+
GenF002A.name=Generic PY32F002A Series
378+
379+
GenF002A.upload.maximum_size=0
380+
GenF002A.upload.maximum_data_size=0
381+
382+
GenF002A.upload.tool=AirISP
383+
GenF002A.upload.tool.default=AirISP
384+
385+
GenF002A.build.core=arduino
386+
GenF002A.build.board=GenF002A
387+
GenF002A.build.mcu=cortex-m0plus
388+
GenF002A.build.series=PY32F0xx
389+
GenF002A.build.cmsis_lib_gcc=arm_cortexM0l_math
390+
GenF002A.build.py_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial}
391+
GenF002A.build.drivers_include="-I{build.system.path}/Arduino-PY32F0xx-Drivers/{build.series}_HAL_Driver/Inc" "-I{build.system.path}/Arduino-PY32F0xx-Drivers/{build.series}_HAL_Driver/Src" "-I{build.system.path}/{build.series}" "-I{build.system.path}/Arduino-PY32F0xx-Drivers/CMSIS/Device/{build.series}/Include/" "-I{build.system.path}/Arduino-PY32F0xx-Drivers/CMSIS/Device/{build.series}/Source/gcc/"
392+
393+
GenF002A.menu.UploadSpeed.115200=115200
394+
GenF002A.menu.UploadSpeed.115200.upload.speed=115200
395+
GenF002A.menu.UploadSpeed.57600=57600
396+
GenF002A.menu.UploadSpeed.57600.upload.speed=57600
397+
GenF002A.menu.UploadSpeed.38400=38400
398+
GenF002A.menu.UploadSpeed.38400.upload.speed=38400
399+
GenF002A.menu.UploadSpeed.19200=19200
400+
GenF002A.menu.UploadSpeed.19200.upload.speed=19200
401+
GenF002A.menu.UploadSpeed.9600=9600
402+
GenF002A.menu.UploadSpeed.9600.upload.speed=9600
403+
GenF002A.menu.UploadSpeed.4800=4800
404+
GenF002A.menu.UploadSpeed.4800.upload.speed=4800
405+
GenF002A.menu.UploadSpeed.2400=2400
406+
GenF002A.menu.UploadSpeed.2400.upload.speed=2400
407+
GenF002A.menu.UploadSpeed.1200=1200
408+
GenF002A.menu.UploadSpeed.1200.upload.speed=1200
409409

410410
# HSI/HSE选择和主频
411-
GenF003.menu.ClockSourceAndFrequency.HSI4M_HCLK4M=HSI 4Mhz, HCLK 4Mhz
412-
GenF003.menu.ClockSourceAndFrequency.HSI4M_HCLK4M.build.temp=-D{build.series}_HSI_4M_HCLK_4M
413-
GenF003.menu.ClockSourceAndFrequency.HSI4M_HCLK4M.build.f_cpu=4000000L
411+
GenF002A.menu.ClockSourceAndFrequency.HSI4M_HCLK4M=HSI 4Mhz, HCLK 4Mhz
412+
GenF002A.menu.ClockSourceAndFrequency.HSI4M_HCLK4M.build.temp=-D{build.series}_HSI_4M_HCLK_4M
413+
GenF002A.menu.ClockSourceAndFrequency.HSI4M_HCLK4M.build.f_cpu=4000000L
414414

415-
GenF003.menu.ClockSourceAndFrequency.HSI8M_HCLK8M=HSI 8Mhz, HCLK 8Mhz
416-
GenF003.menu.ClockSourceAndFrequency.HSI8M_HCLK8M.build.temp=-D{build.series}_HSI_8M_HCLK_8M
417-
GenF003.menu.ClockSourceAndFrequency.HSI8M_HCLK8M.build.f_cpu=8000000L
415+
GenF002A.menu.ClockSourceAndFrequency.HSI8M_HCLK8M=HSI 8Mhz, HCLK 8Mhz
416+
GenF002A.menu.ClockSourceAndFrequency.HSI8M_HCLK8M.build.temp=-D{build.series}_HSI_8M_HCLK_8M
417+
GenF002A.menu.ClockSourceAndFrequency.HSI8M_HCLK8M.build.f_cpu=8000000L
418418

419-
GenF003.menu.ClockSourceAndFrequency.HSI16M_HCLK16M=HSI 16Mhz, HCLK 16Mhz
420-
GenF003.menu.ClockSourceAndFrequency.HSI16M_HCLK16M.build.temp=-D{build.series}_HSI_16M_HCLK_16M
421-
GenF003.menu.ClockSourceAndFrequency.HSI16M_HCLK16M.build.f_cpu=16000000L
419+
GenF002A.menu.ClockSourceAndFrequency.HSI16M_HCLK16M=HSI 16Mhz, HCLK 16Mhz
420+
GenF002A.menu.ClockSourceAndFrequency.HSI16M_HCLK16M.build.temp=-D{build.series}_HSI_16M_HCLK_16M
421+
GenF002A.menu.ClockSourceAndFrequency.HSI16M_HCLK16M.build.f_cpu=16000000L
422422

423-
GenF003.menu.ClockSourceAndFrequency.HSI22_12M_HCLK22_12M=HSI 22.12Mhz, HCLK 22.12Mhz
424-
GenF003.menu.ClockSourceAndFrequency.HSI22_12M_HCLK22_12M.build.temp=-D{build.series}_HSI_22_12M_HCLK_22_12M
425-
GenF003.menu.ClockSourceAndFrequency.HSI22_12M_HCLK22_12M.build.f_cpu=22120000L
423+
GenF002A.menu.ClockSourceAndFrequency.HSI22_12M_HCLK22_12M=HSI 22.12Mhz, HCLK 22.12Mhz
424+
GenF002A.menu.ClockSourceAndFrequency.HSI22_12M_HCLK22_12M.build.temp=-D{build.series}_HSI_22_12M_HCLK_22_12M
425+
GenF002A.menu.ClockSourceAndFrequency.HSI22_12M_HCLK22_12M.build.f_cpu=22120000L
426426

427-
GenF003.menu.ClockSourceAndFrequency.HSI24M_HCLK24M=HSI 24Mhz, HCLK 24Mhz
428-
GenF003.menu.ClockSourceAndFrequency.HSI24M_HCLK24M.build.temp=-D{build.series}_HSI_24M_HCLK_24M
429-
GenF003.menu.ClockSourceAndFrequency.HSI24M_HCLK24M.build.f_cpu=24000000L
427+
GenF002A.menu.ClockSourceAndFrequency.HSI24M_HCLK24M=HSI 24Mhz, HCLK 24Mhz
428+
GenF002A.menu.ClockSourceAndFrequency.HSI24M_HCLK24M.build.temp=-D{build.series}_HSI_24M_HCLK_24M
429+
GenF002A.menu.ClockSourceAndFrequency.HSI24M_HCLK24M.build.f_cpu=24000000L
430430

431-
GenF003.menu.ClockSourceAndFrequency.HSE8M_HCLK8M=HSE 8Mhz, HCLK 8Mhz
432-
GenF003.menu.ClockSourceAndFrequency.HSE8M_HCLK8M.build.temp=-D{build.series}_HSE_8M_HCLK_8M
433-
GenF003.menu.ClockSourceAndFrequency.HSE8M_HCLK8M.build.f_cpu=8000000L
431+
GenF002A.menu.ClockSourceAndFrequency.HSE8M_HCLK8M=HSE 8Mhz, HCLK 8Mhz
432+
GenF002A.menu.ClockSourceAndFrequency.HSE8M_HCLK8M.build.temp=-D{build.series}_HSE_8M_HCLK_8M
433+
GenF002A.menu.ClockSourceAndFrequency.HSE8M_HCLK8M.build.f_cpu=8000000L
434434

435-
GenF003.menu.ClockSourceAndFrequency.HSE16M_HCLK16M=HSE 16Mhz, HCLK 16Mhz
436-
GenF003.menu.ClockSourceAndFrequency.HSE16M_HCLK16M.build.temp=-D{build.series}_HSE_16M_HCLK_16M
437-
GenF003.menu.ClockSourceAndFrequency.HSE16M_HCLK16M.build.f_cpu=16000000L
435+
GenF002A.menu.ClockSourceAndFrequency.HSE16M_HCLK16M=HSE 16Mhz, HCLK 16Mhz
436+
GenF002A.menu.ClockSourceAndFrequency.HSE16M_HCLK16M.build.temp=-D{build.series}_HSE_16M_HCLK_16M
437+
GenF002A.menu.ClockSourceAndFrequency.HSE16M_HCLK16M.build.f_cpu=16000000L
438438

439-
GenF003.menu.ClockSourceAndFrequency.HSE24M_HCLK24M=HSE 24Mhz, HCLK 24Mhz
440-
GenF003.menu.ClockSourceAndFrequency.HSE24M_HCLK24M.build.temp=-D{build.series}_HSE_24M_HCLK_24M
441-
GenF003.menu.ClockSourceAndFrequency.HSE24M_HCLK24M.build.f_cpu=24000000L
439+
GenF002A.menu.ClockSourceAndFrequency.HSE24M_HCLK24M=HSE 24Mhz, HCLK 24Mhz
440+
GenF002A.menu.ClockSourceAndFrequency.HSE24M_HCLK24M.build.temp=-D{build.series}_HSE_24M_HCLK_24M
441+
GenF002A.menu.ClockSourceAndFrequency.HSE24M_HCLK24M.build.f_cpu=24000000L
442442

443-
GenF003.menu.LowSpeedClockSource.None=None
444-
GenF003.menu.LowSpeedClockSource.None.build.lsc_temp=-D{build.series}_LSC_NONE
443+
GenF002A.menu.LowSpeedClockSource.None=None
444+
GenF002A.menu.LowSpeedClockSource.None.build.lsc_temp=-D{build.series}_LSC_NONE
445445

446-
GenF003.menu.LowSpeedClockSource.LSI=LSI 32.768Khz
447-
GenF003.menu.LowSpeedClockSource.LSI.build.lsc_temp=-D{build.series}_LSC_LSI
446+
GenF002A.menu.LowSpeedClockSource.LSI=LSI 32.768Khz
447+
GenF002A.menu.LowSpeedClockSource.LSI.build.lsc_temp=-D{build.series}_LSC_LSI
448448

449-
GenF003.menu.LowSpeedClockSource.LSE=LSE 32.768Khz
450-
GenF003.menu.LowSpeedClockSource.LSE.build.lsc_temp=-D{build.series}_LSC_LSE
449+
GenF002A.menu.LowSpeedClockSource.LSE=LSE 32.768Khz
450+
GenF002A.menu.LowSpeedClockSource.LSE.build.lsc_temp=-D{build.series}_LSC_LSE
451451

452-
GenF003.menu.xserial.generic=Enabled (generic 'Serial')
453-
GenF003.menu.xserial.none=Enabled (no generic 'Serial')
454-
GenF003.menu.xserial.none.build.xSerial=-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE
455-
GenF003.menu.xserial.disabled=Disabled (no Serial support)
456-
GenF003.menu.xserial.disabled.build.xSerial=
452+
GenF002A.menu.xserial.generic=Enabled (generic 'Serial')
453+
GenF002A.menu.xserial.none=Enabled (no generic 'Serial')
454+
GenF002A.menu.xserial.none.build.xSerial=-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE
455+
GenF002A.menu.xserial.disabled=Disabled (no Serial support)
456+
GenF002A.menu.xserial.disabled.build.xSerial=
457457

458458
# debug
459-
GenF003.menu.dbg.none=None
460-
GenF003.menu.dbg.enable_sym=Symbols Enabled (-g)
461-
GenF003.menu.dbg.enable_sym.build.flags.debug=-g -DNDEBUG
462-
GenF003.menu.dbg.enable_log=Core logs Enabled
463-
GenF003.menu.dbg.enable_log.build.flags.debug=
464-
GenF003.menu.dbg.enable_all=Core Logs and Symbols Enabled (-g)
465-
GenF003.menu.dbg.enable_all.build.flags.debug=-g
459+
GenF002A.menu.dbg.none=None
460+
GenF002A.menu.dbg.enable_sym=Symbols Enabled (-g)
461+
GenF002A.menu.dbg.enable_sym.build.flags.debug=-g -DNDEBUG
462+
GenF002A.menu.dbg.enable_log=Core logs Enabled
463+
GenF002A.menu.dbg.enable_log.build.flags.debug=
464+
GenF002A.menu.dbg.enable_all=Core Logs and Symbols Enabled (-g)
465+
GenF002A.menu.dbg.enable_all.build.flags.debug=-g
466466

467467
# optimize
468-
GenF003.menu.opt.osstd=Smallest (-Os default)
469-
GenF003.menu.opt.oslto=Smallest (-Os) with LTO
470-
GenF003.menu.opt.oslto.build.flags.optimize=-Os -flto
471-
GenF003.menu.opt.o1std=Fast (-O1)
472-
GenF003.menu.opt.o1std.build.flags.optimize=-O1
473-
GenF003.menu.opt.o1lto=Fast (-O1) with LTO
474-
GenF003.menu.opt.o1lto.build.flags.optimize=-O1 -flto
475-
GenF003.menu.opt.o2std=Faster (-O2)
476-
GenF003.menu.opt.o2std.build.flags.optimize=-O2
477-
GenF003.menu.opt.o2lto=Faster (-O2) with LTO
478-
GenF003.menu.opt.o2lto.build.flags.optimize=-O2 -flto
479-
GenF003.menu.opt.o3std=Fastest (-O3)
480-
GenF003.menu.opt.o3std.build.flags.optimize=-O3
481-
GenF003.menu.opt.o3lto=Fastest (-O3) with LTO
482-
GenF003.menu.opt.o3lto.build.flags.optimize=-O3 -flto
483-
GenF003.menu.opt.ogstd=Debug (-Og)
484-
GenF003.menu.opt.ogstd.build.flags.optimize=-Og
485-
GenF003.menu.opt.o0std=No Optimization (-O0)
486-
GenF003.menu.opt.o0std.build.flags.optimize=-O0
487-
488-
GenF003.menu.SupplyVoltage.3V3=3.3V
489-
GenF003.menu.SupplyVoltage.3V3.build.sv_tmp=-DVDD_3V3
490-
GenF003.menu.SupplyVoltage.1V8=1.8V
491-
GenF003.menu.SupplyVoltage.3V3.build.sv_tmp=-DVDD_1V8
492-
GenF003.menu.SupplyVoltage.2V5=2.5V
493-
GenF003.menu.SupplyVoltage.3V3.build.sv_tmp=-DVDD_2V5
494-
GenF003.menu.SupplyVoltage.2V8=2.8V
495-
GenF003.menu.SupplyVoltage.3V3.build.sv_tmp=-DVDD_2V8
496-
GenF003.menu.SupplyVoltage.3V8=3.8V
497-
GenF003.menu.SupplyVoltage.3V3.build.sv_tmp=-DVDD_3V8
498-
GenF003.menu.SupplyVoltage.5V=5V
499-
GenF003.menu.SupplyVoltage.5V.build.sv_tmp=-DVDD_5V
468+
GenF002A.menu.opt.osstd=Smallest (-Os default)
469+
GenF002A.menu.opt.oslto=Smallest (-Os) with LTO
470+
GenF002A.menu.opt.oslto.build.flags.optimize=-Os -flto
471+
GenF002A.menu.opt.o1std=Fast (-O1)
472+
GenF002A.menu.opt.o1std.build.flags.optimize=-O1
473+
GenF002A.menu.opt.o1lto=Fast (-O1) with LTO
474+
GenF002A.menu.opt.o1lto.build.flags.optimize=-O1 -flto
475+
GenF002A.menu.opt.o2std=Faster (-O2)
476+
GenF002A.menu.opt.o2std.build.flags.optimize=-O2
477+
GenF002A.menu.opt.o2lto=Faster (-O2) with LTO
478+
GenF002A.menu.opt.o2lto.build.flags.optimize=-O2 -flto
479+
GenF002A.menu.opt.o3std=Fastest (-O3)
480+
GenF002A.menu.opt.o3std.build.flags.optimize=-O3
481+
GenF002A.menu.opt.o3lto=Fastest (-O3) with LTO
482+
GenF002A.menu.opt.o3lto.build.flags.optimize=-O3 -flto
483+
GenF002A.menu.opt.ogstd=Debug (-Og)
484+
GenF002A.menu.opt.ogstd.build.flags.optimize=-Og
485+
GenF002A.menu.opt.o0std=No Optimization (-O0)
486+
GenF002A.menu.opt.o0std.build.flags.optimize=-O0
487+
488+
GenF002A.menu.SupplyVoltage.3V3=3.3V
489+
GenF002A.menu.SupplyVoltage.3V3.build.sv_tmp=-DVDD_3V3
490+
GenF002A.menu.SupplyVoltage.1V8=1.8V
491+
GenF002A.menu.SupplyVoltage.3V3.build.sv_tmp=-DVDD_1V8
492+
GenF002A.menu.SupplyVoltage.2V5=2.5V
493+
GenF002A.menu.SupplyVoltage.3V3.build.sv_tmp=-DVDD_2V5
494+
GenF002A.menu.SupplyVoltage.2V8=2.8V
495+
GenF002A.menu.SupplyVoltage.3V3.build.sv_tmp=-DVDD_2V8
496+
GenF002A.menu.SupplyVoltage.3V8=3.8V
497+
GenF002A.menu.SupplyVoltage.3V3.build.sv_tmp=-DVDD_3V8
498+
GenF002A.menu.SupplyVoltage.5V=5V
499+
GenF002A.menu.SupplyVoltage.5V.build.sv_tmp=-DVDD_5V
500500

501501
# boot
502-
GenF003.menu.BootConnection.defaule=default isp circuit
503-
GenF003.menu.BootConnection.defaule.upload.boot=default_reset
504-
GenF003.menu.BootConnection.direct=direct connect
505-
GenF003.menu.BootConnection.direct.upload.boot=direct_connect
506-
507-
GenF003.build.extra_flags={build.temp} -DF_CPU={build.f_cpu} {build.lsc_temp} {build.sv_tmp}
508-
509-
GenF003.menu.pnum.PY32F002Ax5=PY32F002Ax5
510-
GenF003.menu.pnum.PY32F002Ax5.upload.maximum_size=20480
511-
GenF003.menu.pnum.PY32F002Ax5.upload.maximum_data_size=3072
512-
GenF003.menu.pnum.PY32F002Ax5.build.board=PY32F002Ax5
513-
GenF003.menu.pnum.PY32F002Ax5.build.product_line=PY32F002Ax5
514-
GenF003.menu.pnum.PY32F002Ax5.build.variant=PY32F002Axx/PY32F002A_Base
502+
GenF002A.menu.BootConnection.defaule=default isp circuit
503+
GenF002A.menu.BootConnection.defaule.upload.boot=default_reset
504+
GenF002A.menu.BootConnection.direct=direct connect
505+
GenF002A.menu.BootConnection.direct.upload.boot=direct_connect
506+
507+
GenF002A.build.extra_flags={build.temp} -DF_CPU={build.f_cpu} {build.lsc_temp} {build.sv_tmp}
508+
509+
GenF002A.menu.pnum.PY32F002Ax5=PY32F002Ax5
510+
GenF002A.menu.pnum.PY32F002Ax5.upload.maximum_size=20480
511+
GenF002A.menu.pnum.PY32F002Ax5.upload.maximum_data_size=3072
512+
GenF002A.menu.pnum.PY32F002Ax5.build.board=PY32F002Ax5
513+
GenF002A.menu.pnum.PY32F002Ax5.build.product_line=PY32F002Ax5
514+
GenF002A.menu.pnum.PY32F002Ax5.build.variant=PY32F002Axx/PY32F002A_Base

0 commit comments

Comments
 (0)