From 0b8e0d3aac9e334495b6e224f13e62184b10c02f Mon Sep 17 00:00:00 2001 From: Nick Date: Sat, 11 Apr 2020 19:13:04 -0700 Subject: [PATCH] Replace outdated check for std::unordered_map --- src/cuda-sim/memory.h | 8 ++---- src/cuda-sim/ptx-stats.cc | 9 ++----- src/cuda-sim/ptx_sim.h | 4 +-- src/gpgpu-sim/addrdec.cc | 11 +++----- src/gpgpu-sim/gpu-cache.h | 17 +++++-------- src/gpgpu-sim/gpu-sim.cc | 2 +- src/gpgpu-sim/gpu-sim.h | 3 ++- src/gpgpu-sim/stat-tool.cc | 8 +----- src/gpgpu-sim/stat-tool.h | 4 +-- src/tr1_hash_map.h | 52 -------------------------------------- 10 files changed, 21 insertions(+), 97 deletions(-) delete mode 100644 src/tr1_hash_map.h diff --git a/src/cuda-sim/memory.h b/src/cuda-sim/memory.h index 5850aa1d6..7c8f34496 100644 --- a/src/cuda-sim/memory.h +++ b/src/cuda-sim/memory.h @@ -31,13 +31,9 @@ #include "../abstract_hardware_model.h" -#include "../tr1_hash_map.h" -#define mem_map tr1_hash_map -#if tr1_hash_map_ismap == 1 -#define MEM_MAP_RESIZE(hash_size) -#else +#include +#define mem_map std::unordered_map #define MEM_MAP_RESIZE(hash_size) (m_data.rehash(hash_size)) -#endif #include #include diff --git a/src/cuda-sim/ptx-stats.cc b/src/cuda-sim/ptx-stats.cc index 9f7e76012..0e2eea388 100644 --- a/src/cuda-sim/ptx-stats.cc +++ b/src/cuda-sim/ptx-stats.cc @@ -29,9 +29,9 @@ #include "ptx-stats.h" #include #include +#include #include "../../libcuda/gpgpu_context.h" #include "../option_parser.h" -#include "../tr1_hash_map.h" #include "ptx_ir.h" #include "ptx_sim.h" @@ -107,19 +107,14 @@ class ptx_file_line_stats { warp_divergence; // number of warp divergence occured at this instruction }; -#if (tr1_hash_map_ismap == 1) -typedef tr1_hash_map - ptx_file_line_stats_map_t; -#else struct hash_ptx_file_line { std::size_t operator()(const ptx_file_line &pfline) const { std::hash hash_line; return hash_line(pfline.line); } }; -typedef tr1_hash_map +typedef std::unordered_map ptx_file_line_stats_map_t; -#endif static ptx_file_line_stats_map_t ptx_file_line_stats_tracker; diff --git a/src/cuda-sim/ptx_sim.h b/src/cuda-sim/ptx_sim.h index f0c26efc8..55d5b43b1 100644 --- a/src/cuda-sim/ptx_sim.h +++ b/src/cuda-sim/ptx_sim.h @@ -30,7 +30,7 @@ #include #include "../abstract_hardware_model.h" -#include "../tr1_hash_map.h" +#include #include "half.h" #include @@ -506,7 +506,7 @@ class ptx_thread_info { std::list m_callstack; unsigned m_local_mem_stack_pointer; - typedef tr1_hash_map reg_map_t; + typedef std::unordered_map reg_map_t; std::list m_regs; std::list m_debug_trace_regs_modified; std::list m_debug_trace_regs_read; diff --git a/src/gpgpu-sim/addrdec.cc b/src/gpgpu-sim/addrdec.cc index 655d790b3..15505e68c 100644 --- a/src/gpgpu-sim/addrdec.cc +++ b/src/gpgpu-sim/addrdec.cc @@ -26,6 +26,7 @@ // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE // POSSIBILITY OF SUCH DAMAGE. +#include #include "addrdec.h" #include #include "../option_parser.h" @@ -189,7 +190,7 @@ void linear_to_raw_address_translation::addrdec_tlx(new_addr_type addr, // we generate a random set for each memory address and save the value in // a big hashtable for future reuse new_addr_type chip_address = (addr >> ADDR_CHIP_S); - tr1_hash_map::const_iterator got = + std::unordered_map::const_iterator got = address_random_interleaving.find(chip_address); if (got == address_random_interleaving.end()) { unsigned new_chip_id = @@ -486,8 +487,6 @@ void linear_to_raw_address_translation::init( if (memory_partition_indexing == RANDOM) srand(1); } -#include "../tr1_hash_map.h" - bool operator==(const addrdec_t &x, const addrdec_t &y) { return (memcmp(&x, &y, sizeof(addrdec_t)) == 0); } @@ -519,11 +518,7 @@ class hash_addrdec_t { void linear_to_raw_address_translation::sweep_test() const { new_addr_type sweep_range = 16 * 1024 * 1024; -#if tr1_hash_map_ismap == 1 - typedef tr1_hash_map history_map_t; -#else - typedef tr1_hash_map history_map_t; -#endif + typedef std::unordered_map history_map_t; history_map_t history_map; for (new_addr_type raw_addr = 4; raw_addr < sweep_range; raw_addr += 4) { diff --git a/src/gpgpu-sim/gpu-cache.h b/src/gpgpu-sim/gpu-cache.h index 2a37876c3..d80c969b2 100644 --- a/src/gpgpu-sim/gpu-cache.h +++ b/src/gpgpu-sim/gpu-cache.h @@ -31,8 +31,8 @@ #include #include +#include #include "../abstract_hardware_model.h" -#include "../tr1_hash_map.h" #include "gpu-misc.h" #include "mem_fetch.h" @@ -879,7 +879,7 @@ class tag_array { bool is_used; // a flag if the whole cache has ever been accessed before - typedef tr1_hash_map line_table; + typedef std::unordered_map line_table; line_table pending_lines; }; @@ -887,13 +887,8 @@ class mshr_table { public: mshr_table(unsigned num_entries, unsigned max_merged) : m_num_entries(num_entries), - m_max_merged(max_merged) -#if (tr1_hash_map_ismap == 0) - , - m_data(2 * num_entries) -#endif - { - } + m_max_merged(max_merged), + m_data(2 * num_entries) {} /// Checks if there is a pending request to the lower memory level already bool probe(new_addr_type block_addr) const; @@ -931,8 +926,8 @@ class mshr_table { bool m_has_atomic; mshr_entry() : m_has_atomic(false) {} }; - typedef tr1_hash_map table; - typedef tr1_hash_map line_table; + typedef std::unordered_map table; + typedef std::unordered_map line_table; table m_data; line_table pending_lines; diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc index a6a39ab0a..cafcefb27 100644 --- a/src/gpgpu-sim/gpu-sim.cc +++ b/src/gpgpu-sim/gpu-sim.cc @@ -82,7 +82,7 @@ class gpgpu_sim_wrapper {}; bool g_interactive_debugger_enabled = false; -tr1_hash_map address_random_interleaving; +std::unordered_map address_random_interleaving; /* Clock Domains */ diff --git a/src/gpgpu-sim/gpu-sim.h b/src/gpgpu-sim/gpu-sim.h index 19fbf5d5a..350d519c2 100644 --- a/src/gpgpu-sim/gpu-sim.h +++ b/src/gpgpu-sim/gpu-sim.h @@ -33,6 +33,7 @@ #include #include #include +#include #include "../abstract_hardware_model.h" #include "../option_parser.h" #include "../trace.h" @@ -64,7 +65,7 @@ class gpgpu_context; -extern tr1_hash_map address_random_interleaving; +extern std::unordered_map address_random_interleaving; enum dram_ctrl_t { DRAM_FIFO = 0, DRAM_FRFCFS = 1 }; diff --git a/src/gpgpu-sim/stat-tool.cc b/src/gpgpu-sim/stat-tool.cc index 6fafaa6af..375483656 100644 --- a/src/gpgpu-sim/stat-tool.cc +++ b/src/gpgpu-sim/stat-tool.cc @@ -473,13 +473,7 @@ void shader_CTA_count_visualizer_gzprint(gzFile fout) { //////////////////////////////////////////////////////////////////////////////// thread_insn_span::thread_insn_span(unsigned long long cycle, gpgpu_context *ctx) - : m_cycle(cycle), -#if (tr1_hash_map_ismap == 1) - m_insn_span_count() -#else - m_insn_span_count(32 * 1024) -#endif -{ + : m_cycle(cycle), m_insn_span_count(32 * 1024) { gpgpu_ctx = ctx; } diff --git a/src/gpgpu-sim/stat-tool.h b/src/gpgpu-sim/stat-tool.h index 3a291be3a..b2ba26043 100644 --- a/src/gpgpu-sim/stat-tool.h +++ b/src/gpgpu-sim/stat-tool.h @@ -29,8 +29,8 @@ #ifndef STAT_TOOL_H #define STAT_TOOL_H +#include #include "../abstract_hardware_model.h" -#include "../tr1_hash_map.h" #include "histogram.h" #include @@ -102,7 +102,7 @@ class thread_insn_span { private: gpgpu_context *gpgpu_ctx; - typedef tr1_hash_map span_count_map; + typedef std::unordered_map span_count_map; unsigned long long m_cycle; span_count_map m_insn_span_count; }; diff --git a/src/tr1_hash_map.h b/src/tr1_hash_map.h deleted file mode 100644 index c92ce1539..000000000 --- a/src/tr1_hash_map.h +++ /dev/null @@ -1,52 +0,0 @@ -// Copyright (c) 2009-2011, Tor M. Aamodt, Wilson W.L. Fung -// The University of British Columbia -// All rights reserved. -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions are met: -// -// Redistributions of source code must retain the above copyright notice, this -// list of conditions and the following disclaimer. -// Redistributions in binary form must reproduce the above copyright notice, -// this list of conditions and the following disclaimer in the documentation -// and/or other materials provided with the distribution. Neither the name of -// The University of British Columbia nor the names of its contributors may be -// used to endorse or promote products derived from this software without -// specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -// POSSIBILITY OF SUCH DAMAGE. - -#pragma once - -// detection and fallback for unordered_map in C++0x -#ifdef __cplusplus -// detect GCC 4.3 or later and use unordered map (part of C++0x) -// unordered map doesn't play nice with _GLIBCXX_DEBUG, just use a map if its -// enabled. -#if defined(__GNUC__) and not defined(_GLIBCXX_DEBUG) -#if __GNUC__ >= 4 && __GNUC_MINOR__ >= 3 -#include -#define tr1_hash_map std::unordered_map -#define tr1_hash_map_ismap 0 -#else -#include -#define tr1_hash_map std::map -#define tr1_hash_map_ismap 1 -#endif -#else -#include -#define tr1_hash_map std::map -#define tr1_hash_map_ismap 1 -#endif - -#endif