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Fix peripherals base address.

Yvan Tortorella 2a5bb10
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GitHub Actions / verible-verilog-lint failed Jan 20, 2024 in 1s

reviewdog [verible-verilog-lint] report

reported by reviewdog 🐶

Findings (11)

hw/carfield.sv|1202 col 101| Line length exceeds max: 100; is: 124 [Style: line-length] [line-length]
hw/carfield.sv|1600 col 101| Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
hw/carfield.sv|2179 col 101| Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
hw/carfield_cfg_pkg.sv|123 col 101| Line length exceeds max: 100; is: 117 [Style: line-length] [line-length]
hw/carfield_cfg_pkg.sv|124 col 101| Line length exceeds max: 100; is: 117 [Style: line-length] [line-length]
hw/carfield_cfg_pkg.sv|125 col 101| Line length exceeds max: 100; is: 117 [Style: line-length] [line-length]
hw/carfield_cfg_pkg.sv|126 col 101| Line length exceeds max: 100; is: 117 [Style: line-length] [line-length]
hw/carfield_cfg_pkg.sv|130 col 101| Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
hw/carfield_cfg_pkg.sv|205 col 101| Line length exceeds max: 100; is: 109 [Style: line-length] [line-length]
hw/carfield_cfg_pkg.sv|215 col 101| Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
hw/carfield_cfg_pkg.sv|229 col 101| Line length exceeds max: 100; is: 106 [Style: line-length] [line-length]

Filtered Findings (0)

Annotations

Check warning on line 1202 in hw/carfield.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/carfield.sv#L1202

Line length exceeds max: 100; is: 124 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 124 [Style: line-length] [line-length]"  location:{path:"hw/carfield.sv"  range:{start:{line:1202  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 1600 in hw/carfield.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/carfield.sv#L1600

Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]"  location:{path:"hw/carfield.sv"  range:{start:{line:1600  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 2179 in hw/carfield.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/carfield.sv#L2179

Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]"  location:{path:"hw/carfield.sv"  range:{start:{line:2179  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 123 in hw/carfield_cfg_pkg.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/carfield_cfg_pkg.sv#L123

Line length exceeds max: 100; is: 117 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 117 [Style: line-length] [line-length]"  location:{path:"hw/carfield_cfg_pkg.sv"  range:{start:{line:123  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 124 in hw/carfield_cfg_pkg.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/carfield_cfg_pkg.sv#L124

Line length exceeds max: 100; is: 117 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 117 [Style: line-length] [line-length]"  location:{path:"hw/carfield_cfg_pkg.sv"  range:{start:{line:124  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 125 in hw/carfield_cfg_pkg.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/carfield_cfg_pkg.sv#L125

Line length exceeds max: 100; is: 117 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 117 [Style: line-length] [line-length]"  location:{path:"hw/carfield_cfg_pkg.sv"  range:{start:{line:125  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 126 in hw/carfield_cfg_pkg.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/carfield_cfg_pkg.sv#L126

Line length exceeds max: 100; is: 117 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 117 [Style: line-length] [line-length]"  location:{path:"hw/carfield_cfg_pkg.sv"  range:{start:{line:126  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 130 in hw/carfield_cfg_pkg.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/carfield_cfg_pkg.sv#L130

Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]"  location:{path:"hw/carfield_cfg_pkg.sv"  range:{start:{line:130  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 205 in hw/carfield_cfg_pkg.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/carfield_cfg_pkg.sv#L205

Line length exceeds max: 100; is: 109 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 109 [Style: line-length] [line-length]"  location:{path:"hw/carfield_cfg_pkg.sv"  range:{start:{line:205  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 215 in hw/carfield_cfg_pkg.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/carfield_cfg_pkg.sv#L215

Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]"  location:{path:"hw/carfield_cfg_pkg.sv"  range:{start:{line:215  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 229 in hw/carfield_cfg_pkg.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/carfield_cfg_pkg.sv#L229

Line length exceeds max: 100; is: 106 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 106 [Style: line-length] [line-length]"  location:{path:"hw/carfield_cfg_pkg.sv"  range:{start:{line:229  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}