fpga: CI vcu118

carfield.mk

@@ -118,7 +118,7 @@ endif
 ######################
 
 CAR_NONFREE_REMOTE ?= [email protected]:carfield/carfield-nonfree.git
-CAR_NONFREE_COMMIT ?= e446a8e30d3e5556d14ff74953c51f1bbf8c670f
+CAR_NONFREE_COMMIT ?= 4bdaad56e53ec86ce3e5497932217a3145361576
 
 ## Clone the non-free verification IP for the Carfield TB
 car-nonfree-init:

sw/boot/carfield_bd_vcu118.dts

@@ -0,0 +1,8 @@
+// Copyright 2022 ETH Zurich and University of Bologna.
+// Solderpad Hardware License, Version 0.51, see LICENSE for details.
+// SPDX-License-Identifier: SHL-0.51
+//
+// Cyril Koenig <[email protected]>
+
+
+/include/ "carfield.dtsi"

sw/sw.mk

@@ -163,6 +163,7 @@ $(CAR_SW_DIR)/boot/linux_carfield_%.gpt.bin: $(CHS_SW_DIR)/boot/zsl.rom.bin $(CA
 	dd if=$(word 2,$^) of=$@ bs=512 seek=128 conv=notrunc
 	dd if=$(word 3,$^) of=$@ bs=512 seek=2048 conv=notrunc
 	dd if=$(word 4,$^) of=$@ bs=512 seek=8192 conv=notrunc
+	dd if=sw/boot/linux_carfield_bd_vcu128.gpt.bin of=sw/boot/linux.gpt.min.bin bs=512 count=8192 && cp sw/boot/linux.gpt.min.bin sw/boot/linux_carfield_bd_vcu128.gpt.bin
 
 #########################
 # Linux app compilation #

target/xilinx/xilinx.mk

@@ -25,9 +25,9 @@ endif
 ifeq ($(XILINX_BOARD),vcu118)
 	xilinx_part       := xcvu9p-flga2104-2L-e
 	xilinx_board_long := xilinx.com:vcu118:part0:2.4
-	XILINX_PORT 	  ?= 3121
-	XILINX_FPGA_PATH  ?= xilinx_tcf/Digilent/210308B0A227
-	XILINX_HOST       ?= 10.150.32.237
+	XILINX_PORT 	  ?= 3249
+	XILINX_FPGA_PATH  ?= xilinx_tcf/Digilent/210308A3B1D8
+	XILINX_HOST       ?= bordcomputer
 endif
 
 XILINX_USE_ARTIFACTS ?= 0