From 6a5426d6b1b2e6ffd75dc651b12aca49f3859059 Mon Sep 17 00:00:00 2001 From: Cyril Koenig Date: Wed, 6 Dec 2023 15:45:49 +0100 Subject: [PATCH] fpga: PR reviews --- carfield.mk | 1 - target/xilinx/flavor_bd/scripts/carfield_bd_ext_jtag.tcl | 6 ++++++ target/xilinx/flavor_bd/scripts/carfield_bd_vcu128.tcl | 5 +++++ 3 files changed, 11 insertions(+), 1 deletion(-) diff --git a/carfield.mk b/carfield.mk index 614ed510a..2b5a01813 100644 --- a/carfield.mk +++ b/carfield.mk @@ -11,7 +11,6 @@ CAR_ROOT ?= $(shell $(BENDER) path carfield) CAR_SW_DIR := $(CAR_ROOT)/sw CAR_XIL_DIR := $(CAR_ROOT)/target/xilinx -CAR_XIL_DIR_BD := $(CAR_ROOT)/target/xilinx_bd CAR_HW_DIR := $(CAR_ROOT)/hw BENDER ?= bender diff --git a/target/xilinx/flavor_bd/scripts/carfield_bd_ext_jtag.tcl b/target/xilinx/flavor_bd/scripts/carfield_bd_ext_jtag.tcl index acb094248..cb0512831 100644 --- a/target/xilinx/flavor_bd/scripts/carfield_bd_ext_jtag.tcl +++ b/target/xilinx/flavor_bd/scripts/carfield_bd_ext_jtag.tcl @@ -1,3 +1,9 @@ +# Copyright 2020 ETH Zurich and University of Bologna. +# Solderpad Hardware License, Version 0.51, see LICENSE for details. +# SPDX-License-Identifier: SHL-0.51 +# +# Cyril Koenig + set jtag_gnd_o [ create_bd_port -dir O jtag_gnd_o ] set jtag_tck_i [ create_bd_port -dir I jtag_tck_i ] set jtag_tdi_i [ create_bd_port -dir I jtag_tdi_i ] diff --git a/target/xilinx/flavor_bd/scripts/carfield_bd_vcu128.tcl b/target/xilinx/flavor_bd/scripts/carfield_bd_vcu128.tcl index 84ee8bab2..fcf40ed66 100644 --- a/target/xilinx/flavor_bd/scripts/carfield_bd_vcu128.tcl +++ b/target/xilinx/flavor_bd/scripts/carfield_bd_vcu128.tcl @@ -1,3 +1,8 @@ +# Copyright 2020 ETH Zurich and University of Bologna. +# Solderpad Hardware License, Version 0.51, see LICENSE for details. +# SPDX-License-Identifier: SHL-0.51 +# +# This file was generated for vivado 2020.2 ################################################################ # This is a generated script based on design: design_1