From 64f3569ebe841bd9bf078e6183e82dbe65588372 Mon Sep 17 00:00:00 2001 From: Cyril Koenig Date: Tue, 12 Dec 2023 17:27:55 +0100 Subject: [PATCH] fpga: Refactor xilinx_ips --- Bender.yml | 4 +- bender-xilinx.mk | 8 +- target/xilinx/flavor_bd/flavor_bd.mk | 33 ++++---- target/xilinx/flavor_bd/scripts/run.tcl | 9 ++- .../xilinx/flavor_vanilla/flavor_vanilla.mk | 6 +- target/xilinx/flavor_vanilla/scripts/run.tcl | 4 +- target/xilinx/xilinx.mk | 41 +++++----- target/xilinx/xilinx_ips/.gitignore | 15 ++-- .../xilinx_ips/carfield_ip/carfield_ip.mk | 21 ++++++ .../carfield_ip}/constraints/carfield_ip.xdc | 0 .../constraints/ooc_carfield_ip.xdc | 0 .../carfield_ip}/src/carfield_xilinx.sv | 0 .../carfield_ip}/src/carfield_xilinx_ip.v | 0 .../carfield_ip/tcl/run.tcl} | 14 +++- target/xilinx/xilinx_ips/common.mk | 63 ---------------- target/xilinx/xilinx_ips/xilinx_ips.mk | 75 +++++++++++++++++++ .../xilinx/xilinx_ips/xlnx_clk_wiz/Makefile | 9 --- .../xilinx_ips/xlnx_clk_wiz/xlnx_clk_wiz.mk | 8 ++ .../xilinx/xilinx_ips/xlnx_mig_ddr4/Makefile | 9 --- .../xilinx_ips/xlnx_mig_ddr4/xlnx_mig_ddr4.mk | 8 ++ target/xilinx/xilinx_ips/xlnx_vio/Makefile | 9 --- target/xilinx/xilinx_ips/xlnx_vio/xlnx_vio.mk | 8 ++ 22 files changed, 189 insertions(+), 155 deletions(-) create mode 100644 target/xilinx/xilinx_ips/carfield_ip/carfield_ip.mk rename target/xilinx/{flavor_bd => xilinx_ips/carfield_ip}/constraints/carfield_ip.xdc (100%) rename target/xilinx/{flavor_bd => xilinx_ips/carfield_ip}/constraints/ooc_carfield_ip.xdc (100%) rename target/xilinx/{flavor_bd => xilinx_ips/carfield_ip}/src/carfield_xilinx.sv (100%) rename target/xilinx/{flavor_bd => xilinx_ips/carfield_ip}/src/carfield_xilinx_ip.v (100%) rename target/xilinx/{flavor_bd/scripts/run_carfield_ip.tcl => xilinx_ips/carfield_ip/tcl/run.tcl} (58%) delete mode 100644 target/xilinx/xilinx_ips/common.mk create mode 100644 target/xilinx/xilinx_ips/xilinx_ips.mk delete mode 100644 target/xilinx/xilinx_ips/xlnx_clk_wiz/Makefile create mode 100644 target/xilinx/xilinx_ips/xlnx_clk_wiz/xlnx_clk_wiz.mk delete mode 100644 target/xilinx/xilinx_ips/xlnx_mig_ddr4/Makefile create mode 100644 target/xilinx/xilinx_ips/xlnx_mig_ddr4/xlnx_mig_ddr4.mk delete mode 100644 target/xilinx/xilinx_ips/xlnx_vio/Makefile create mode 100644 target/xilinx/xilinx_ips/xlnx_vio/xlnx_vio.mk diff --git a/Bender.yml b/Bender.yml index 8ec9a7bfd..4d0b6f6f5 100644 --- a/Bender.yml +++ b/Bender.yml @@ -79,8 +79,8 @@ sources: files: - target/xilinx/src/cdc_dst_axi_err.sv - target/xilinx/src/overrides/tc_clk_xilinx.sv - - target/xilinx/flavor_bd/src/carfield_xilinx.sv - - target/xilinx/flavor_bd/src/carfield_xilinx_ip.v + - target/xilinx/xilinx_ips/carfield_ip/src/carfield_xilinx.sv + - target/xilinx/xilinx_ips/carfield_ip/src/carfield_xilinx_ip.v - target: intel16_elab_only files: diff --git a/bender-xilinx.mk b/bender-xilinx.mk index 197b78620..4e8f151b5 100644 --- a/bender-xilinx.mk +++ b/bender-xilinx.mk @@ -5,15 +5,15 @@ # Author: Cyril Koenig # bender targets -xilinx_targs += -t fpga +xilinx_targs_common += -t fpga # bender defines -xilinx_defs += -D PULP_FPGA_EMUL +xilinx_defs_common += -D PULP_FPGA_EMUL # Conditionally add GEN_{island} to bender define define check_enable_island ifeq ($($(1)),1) -xilinx_defs += -D$(1)=1 +xilinx_defs_common += -D$(1)=1 endif endef @@ -25,7 +25,7 @@ $(eval $(call check_enable_island,GEN_NO_HYPERBUS)) $(eval $(call check_enable_island,GEN_EXT_JTAG)) ifeq ($(GEN_EXT_JTAG),0) -xilinx_targs += -t bscane +xilinx_targs_common += -t bscane endif # note : bender targets are later modified in xilinx.mk diff --git a/target/xilinx/flavor_bd/flavor_bd.mk b/target/xilinx/flavor_bd/flavor_bd.mk index e82cea383..08a6fe824 100644 --- a/target/xilinx/flavor_bd/flavor_bd.mk +++ b/target/xilinx/flavor_bd/flavor_bd.mk @@ -7,6 +7,11 @@ # Output bitstream xilinx_bit_bd = $(CAR_XIL_DIR)/flavor_bd/out/design_1_wrapper.bit +# This flavor requires pre-compiled Xilinx IPs +xilinx_ips_names_bd := carfield_ip +# Path to compiled ips +xilinx_ips_paths_bd := $(foreach ip-name,$(xilinx_ips_names_bd),$(xilinx_ip_dir)/$(ip-name)/$(ip-name).srcs/sources_1/ip/$(ip-name)/$(ip-name).xci) + # Vivado variables vivado_env_bd := \ XILINX_PROJECT=$(XILINX_PROJECT) \ @@ -24,33 +29,23 @@ vivado_env_bd := \ XILINX_ELABORATION_ONLY=$(XILINX_ELABORATION_ONLY) # Flavor specific bender args -xilinx_targs_bd := $(xilinx_targs) -t xilinx_bd -t $(XILINX_BOARD) -xilinx_defs_bd := $(xilinx_defs) - -# Add source files for ip -$(CAR_XIL_DIR)/flavor_bd/scripts/add_sources.tcl: Bender.yml - $(BENDER) script vivado $(common_targs) $(xilinx_targs_bd) $(common_defs) $(xilinx_defs_bd) > $@ - cp $@ $@.bak -# Remove ibex's vendored prim includes as they conflict with opentitan's vendored prim includes - grep -v -P "lowrisc_ip/ip/prim/rtl" $@ > $@-tmp - mv $@-tmp $@ -# Override system verilog files - target/xilinx/scripts/overrides.sh $@ - echo "" >> $@ - -# Build Carfield IP -$(CAR_XIL_DIR)/flavor_bd/carfield_ip/carfield_ip.xpr: $(CAR_XIL_DIR)/flavor_bd/scripts/add_sources.tcl - cd $(CAR_XIL_DIR)/flavor_bd && $(vivado_env) $(VIVADO) $(VIVADO_FLAGS) -source scripts/run_carfield_ip.tcl +xilinx_targs_bd := $(common_targs) $(xilinx_targs_common) -t xilinx_bd -t $(XILINX_BOARD) +xilinx_defs_bd := $(common_defs) $(xilinx_defs_common) # Add includes files for block design $(CAR_XIL_DIR)/flavor_bd/scripts/add_includes.tcl: - ${BENDER} script vivado --only-defines --only-includes $(common_targs) $(xilinx_targs_bd) $(common_defs) $(xilinx_defs_bd) > $@ + ${BENDER} script vivado --only-defines --only-includes $(xilinx_targs_bd) $(xilinx_defs_bd) > $@ # Remove ibex's vendored prim includes as they conflict with opentitan's vendored prim includes grep -v -P "lowrisc_ip/ip/prim/rtl" $@ > $@-tmp mv $@-tmp $@ # Build block design bitstream -$(CAR_XIL_DIR)/flavor_bd/out/%.bit: $(CAR_XIL_DIR)/flavor_bd/scripts/add_includes.tcl $(CAR_XIL_DIR)/flavor_bd/carfield_ip/carfield_ip.xpr +$(CAR_XIL_DIR)/flavor_bd/out/%.bit: $(xilinx_ips_paths_bd) $(CAR_XIL_DIR)/flavor_bd/scripts/add_includes.tcl mkdir -p $(CAR_XIL_DIR)/flavor_bd/out cd $(CAR_XIL_DIR)/flavor_bd && $(vivado_env_bd) $(VIVADO) $(VIVADO_FLAGS) -source scripts/run.tcl find $(CAR_XIL_DIR)/flavor_bd -name "*.ltx" -o -name "*.bit" -o -name "*routed.rpt" | xargs -I {} cp {} $(CAR_XIL_DIR)/flavor_bd/out + +car-xil-clean-bd: + cd $(CAR_XIL_DIR)/flavor_bd && rm -rf scripts/add_includes.tcl* *.log *.jou *.str *.mif carfield_$(XILINX_BOARD) .Xil/ + +.PHONY: car-xil-clean-bd diff --git a/target/xilinx/flavor_bd/scripts/run.tcl b/target/xilinx/flavor_bd/scripts/run.tcl index b3d140f39..a410bd12d 100644 --- a/target/xilinx/flavor_bd/scripts/run.tcl +++ b/target/xilinx/flavor_bd/scripts/run.tcl @@ -14,16 +14,17 @@ set_property XPM_LIBRARIES XPM_MEMORY [current_project] # set number of threads to 8 (maximum, unfortunately) set_param general.maxThreads 8 -# Define sources -set_property ip_repo_paths ./carfield_ip [current_project] +# Include custom IP +set_property ip_repo_paths ../xilinx_ips/carfield_ip [current_project] update_ip_catalog +# Define sources import_files -fileset constrs_1 -norecurse constraints/$::env(XILINX_BOARD).xdc +source scripts/add_includes.tcl +# Build block design source scripts/carfield_bd_$::env(XILINX_BOARD).tcl -source scripts/add_includes.tcl - # Add the ext_jtag pins to block design if {[info exists ::env(GEN_EXT_JTAG)] && ($::env(GEN_EXT_JTAG)==1)} { source scripts/carfield_bd_ext_jtag.tcl diff --git a/target/xilinx/flavor_vanilla/flavor_vanilla.mk b/target/xilinx/flavor_vanilla/flavor_vanilla.mk index 3434e7fe1..37e6c80a9 100644 --- a/target/xilinx/flavor_vanilla/flavor_vanilla.mk +++ b/target/xilinx/flavor_vanilla/flavor_vanilla.mk @@ -15,9 +15,9 @@ xilinx_ips_paths_vanilla = $(foreach ip-name,$(xilinx_ips_names_vanilla),$(xilin # Flavor specific bender args # (added enabled ips in bender args, used by phy_definitions.svh) -xilinx_targs_vanilla = $(xilinx_targs) $(foreach ip-name,$(xilinx_ips_names_vanilla),$(addprefix -t ,$(ip-name))) +xilinx_targs_vanilla = $(xilinx_targs_common) $(foreach ip-name,$(xilinx_ips_names_vanilla),$(addprefix -t ,$(ip-name))) xilinx_targs_vanilla += -t xilinx_vanilla $(addprefix -t ,$(XILINX_BOARD)) -xilinx_defs_vanilla := $(xilinx_defs) +xilinx_defs_vanilla := $(common_defs) $(xilinx_defs_common) # Vivado variables vivado_env_vanilla := \ @@ -53,3 +53,5 @@ $(CAR_XIL_DIR)/flavor_vanilla/out/%.bit: $(xilinx_ips_paths_vanilla) $(CAR_XIL_D car-xil-clean-vanilla: cd $(CAR_XIL_DIR)/flavor_vanilla && rm -rf scripts/add_sources.tcl* *.log *.jou *.str *.mif carfield.* .Xil/ + +.PHONY: car-xil-clean-vanilla diff --git a/target/xilinx/flavor_vanilla/scripts/run.tcl b/target/xilinx/flavor_vanilla/scripts/run.tcl index 54ebc16ec..d7b1b5201 100644 --- a/target/xilinx/flavor_vanilla/scripts/run.tcl +++ b/target/xilinx/flavor_vanilla/scripts/run.tcl @@ -33,8 +33,8 @@ set_property top ${project}_top_xilinx [current_fileset] update_compile_order -fileset sources_1 -if {[info exists ::env(ELABORATION_ONLY)] && $::env(XILINX_ELABORATION_ONLY)==1} { - puts "Running with ELABORATION_ONLY" +if {[info exists ::env(XILINX_ELABORATION_ONLY)] && $::env(XILINX_ELABORATION_ONLY)==1} { + puts "Running with XILINX_ELABORATION_ONLY" set_property XPM_LIBRARIES XPM_MEMORY [current_project] synth_design -rtl -name rtl_1 -sfcu diff --git a/target/xilinx/xilinx.mk b/target/xilinx/xilinx.mk index f1f2bcf3e..333a20f75 100644 --- a/target/xilinx/xilinx.mk +++ b/target/xilinx/xilinx.mk @@ -5,7 +5,7 @@ # Cyril Koenig # -# User input Makefile variables +# Makefile variables (user inputs are in capital letters) # XILINX_PROJECT ?= carfield @@ -30,13 +30,11 @@ XILINX_CHECK_TIMING ?= 0 VIVADO_MODE ?= batch VIVADO_FLAGS ?= -nojournal -mode $(VIVADO_MODE) -xilinx_ip_dir := $(CAR_XIL_DIR)/xilinx_ips -xilinx_ip_dirs := $(wildcard $(xilinx_ip_dir)/*) - +xilinx_ip_dir := $(CAR_XIL_DIR)/xilinx_ips xilinx_bit := $(CAR_XIL_DIR)/out/$(XILINX_PROJECT)_$(XILINX_FLAVOR)_$(XILINX_BOARD).bit # -# Include flavors +# Include other makefiles flavors # include $(CAR_XIL_DIR)/flavor_vanilla/flavor_vanilla.mk @@ -47,19 +45,20 @@ include $(CAR_XIL_DIR)/flavor_bd/flavor_bd.mk # vivado_env := $(vivado_env_$(XILINX_FLAVOR)) +xilinx_targs := $(xilinx_targs_$(XILINX_FLAVOR)) +xilinx_defs := $(xilinx_defs_$(XILINX_FLAVOR)) # -# Rules +# IPs compile rules # -# Generate ips -%.xci: - ${MAKE} -C $(xilinx_ip_dir)/$(basename $(notdir $@)) \ - XILINX_USE_ARTIFACTS=$(XILINX_USE_ARTIFACTS) \ - XILINX_ARTIFACTS_ROOT=$(XILINX_ARTIFACTS_ROOT) \ - vivado_env="$(subst ",\",$(vivado_env))" \ - VIVADO="$(VIVADO)" \ - clean all +# Note: at the moment xilinx_ips uses vivado_env defined above, +# but it could re-define its own vivado_env and xilinx_targs +include $(CAR_XIL_DIR)/xilinx_ips/xilinx_ips.mk + +# +# Top level compile rules +# # Copy bitstream and probe file to final output location (/target/xilinx/out) $(CAR_XIL_DIR)/out/%.bit: $(xilinx_bit_$(XILINX_FLAVOR)) @@ -69,8 +68,8 @@ $(CAR_XIL_DIR)/out/%.bit: $(xilinx_bit_$(XILINX_FLAVOR)) cp $(patsubst %.bit,%.ltx,$< $@); \ fi -# Build a bitstream -car-xil-all: car-xil-clean-ips $(xilinx_bit) +# Build bitstream +car-xil-all: $(xilinx_bit) # Program last bitstream car-xil-program: @@ -81,12 +80,6 @@ car-xil-program: car-xil-flash: $(CAR_SW_DIR)/boot/linux_carfield_$(XILINX_FLAVOR)_$(XILINX_BOARD).gpt.bin $(vivado_env) FILE=$< OFFSET=0 $(VIVADO) $(VIVADO_FLAGS) -source $(CAR_XIL_DIR)/scripts/flash_spi.tcl -# Clean a given IP folder -%-xlnx-ip-clean: % - make -C $< clean -# Clean all IP folder using rule above -car-xil-clean-ips: $(addsuffix -xlnx-ip-clean,$(shell find $(xilinx_ip_dir)/ -maxdepth 1 -mindepth 1 -type d)) - -car-xil-clean: car-xil-clean-ips car-xil-clean-vanilla +car-xil-clean: car-xil-clean-vanilla car-xil-clean-bd xilinx-ip-clean-all -.PHONY: car-xil-program car-xil-flash car-xil-clean car-xil-all car-xil-clean-ips +.PHONY: car-xil-program car-xil-flash car-xil-clean car-xil-all diff --git a/target/xilinx/xilinx_ips/.gitignore b/target/xilinx/xilinx_ips/.gitignore index 12ef7f9f2..1285f46e1 100644 --- a/target/xilinx/xilinx_ips/.gitignore +++ b/target/xilinx/xilinx_ips/.gitignore @@ -1,5 +1,10 @@ -xlnx*/* -!xlnx*/tcl -!Makefile -!common.mk -!*.prj \ No newline at end of file +*.cache +*.gen +*.hw +*.srcs +*.xpr +component.xml +xgui +*.jou +*.log +add_sources.* \ No newline at end of file diff --git a/target/xilinx/xilinx_ips/carfield_ip/carfield_ip.mk b/target/xilinx/xilinx_ips/carfield_ip/carfield_ip.mk new file mode 100644 index 000000000..c3a4e5a5a --- /dev/null +++ b/target/xilinx/xilinx_ips/carfield_ip/carfield_ip.mk @@ -0,0 +1,21 @@ +# Copyright 2022 ETH Zurich and University of Bologna. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +ROOT_carfield_ip := $(CAR_XIL_DIR)/xilinx_ips/carfield_ip +XILINX_USE_ARTIFACTS_carfield_ip := 0 + +# Add additional requirements for this ip +IP_DEP_carfield_ip := $(CAR_XIL_DIR)/xilinx_ips/carfield_ip/tcl/add_sources.tcl + +# Generate the bender script for the ip +$(CAR_XIL_DIR)/xilinx_ips/carfield_ip/tcl/add_sources.tcl: Bender.yml +# Add source files for ip + $(BENDER) script vivado $(xilinx_targs) $(common_defs) $(xilinx_defs_bd) > $@ + cp $@ $@.bak +# Remove ibex's vendored prim includes as they conflict with opentitan's vendored prim includes + grep -v -P "lowrisc_ip/ip/prim/rtl" $@ > $@-tmp + mv $@-tmp $@ +# Override system verilog files + target/xilinx/scripts/overrides.sh $@ + echo "" >> $@ diff --git a/target/xilinx/flavor_bd/constraints/carfield_ip.xdc b/target/xilinx/xilinx_ips/carfield_ip/constraints/carfield_ip.xdc similarity index 100% rename from target/xilinx/flavor_bd/constraints/carfield_ip.xdc rename to target/xilinx/xilinx_ips/carfield_ip/constraints/carfield_ip.xdc diff --git a/target/xilinx/flavor_bd/constraints/ooc_carfield_ip.xdc b/target/xilinx/xilinx_ips/carfield_ip/constraints/ooc_carfield_ip.xdc similarity index 100% rename from target/xilinx/flavor_bd/constraints/ooc_carfield_ip.xdc rename to target/xilinx/xilinx_ips/carfield_ip/constraints/ooc_carfield_ip.xdc diff --git a/target/xilinx/flavor_bd/src/carfield_xilinx.sv b/target/xilinx/xilinx_ips/carfield_ip/src/carfield_xilinx.sv similarity index 100% rename from target/xilinx/flavor_bd/src/carfield_xilinx.sv rename to target/xilinx/xilinx_ips/carfield_ip/src/carfield_xilinx.sv diff --git a/target/xilinx/flavor_bd/src/carfield_xilinx_ip.v b/target/xilinx/xilinx_ips/carfield_ip/src/carfield_xilinx_ip.v similarity index 100% rename from target/xilinx/flavor_bd/src/carfield_xilinx_ip.v rename to target/xilinx/xilinx_ips/carfield_ip/src/carfield_xilinx_ip.v diff --git a/target/xilinx/flavor_bd/scripts/run_carfield_ip.tcl b/target/xilinx/xilinx_ips/carfield_ip/tcl/run.tcl similarity index 58% rename from target/xilinx/flavor_bd/scripts/run_carfield_ip.tcl rename to target/xilinx/xilinx_ips/carfield_ip/tcl/run.tcl index 8825f1e7e..0ca61594e 100644 --- a/target/xilinx/flavor_bd/scripts/run_carfield_ip.tcl +++ b/target/xilinx/xilinx_ips/carfield_ip/tcl/run.tcl @@ -7,14 +7,14 @@ # Create project set project carfield_ip -create_project $project ./$project -force -part $::env(XILINX_PART) +create_project $project . -force -part $::env(XILINX_PART) set_property XPM_LIBRARIES XPM_MEMORY [current_project] # set number of threads to 8 (maximum, unfortunately) set_param general.maxThreads 8 # Define sources -source scripts/add_sources.tcl +source tcl/add_sources.tcl # Add constraints add_files -fileset constrs_1 constraints/ooc_carfield_ip.xdc @@ -24,9 +24,17 @@ add_files -fileset constrs_1 constraints/carfield_ip.xdc # Package IP set_property top carfield_xilinx_ip [current_fileset] +# Attention SFCU is only used because of Carfield's structure update_compile_order -fileset sources_1 synth_design -rtl -name rtl_1 -sfcu -ipx::package_project -root_dir ./${project} -vendor ethz.ch -library user -taxonomy /UserIP -set_current true +ipx::package_project -root_dir . -vendor ethz.ch -library user -taxonomy /UserIP -set_current false + +# If we don't reopen project, Vivado does not find the newly created ip_repo +close_project +open_project $project.xpr +# Export this IP as a .xci too for coherence with Xilinx IPs +set_property ip_repo_paths . [current_project] +create_ip -verbose -module_name $project -vlnv ethz.ch:user:carfield_xilinx_ip exit diff --git a/target/xilinx/xilinx_ips/common.mk b/target/xilinx/xilinx_ips/common.mk deleted file mode 100644 index 99566dc84..000000000 --- a/target/xilinx/xilinx_ips/common.mk +++ /dev/null @@ -1,63 +0,0 @@ -# Copyright 2022 ETH Zurich and University of Bologna. -# Licensed under the Apache License, Version 2.0, see LICENSE for details. -# SPDX-License-Identifier: Apache-2.0 -# -# Cyril Koenig - -# Call different target if artifacts are necessary -all: all-artifacts-$(XILINX_USE_ARTIFACTS) - -# Build IP -xlnx_%.xpr: - $(vivado_env) $(VIVADO) -mode batch -source tcl/run.tcl - -# Just build IP -all-artifacts-0: $(PROJECT).xpr - -# Build IP considerering artifacts management -all-artifacts-1: load-artifacts $(PROJECT).xpr save-artifacts - -# Note: We do not use Memora as it is bound to Git versionning -# and not standalone on files hash / environment variables -TERM_GREEN := '\033[0;32m' -TERM_NC := '\033[0m' - -# Generate a sha based on env variables and artifacts_in -.generated_sha256: - @echo $(VIVADO) $(PROJECT) > .generated_env - @echo $(vivado_env) | tr " " "\n" | grep $(foreach var,$(ARTIFACTS_VARS), $(addprefix -e ,$(var))) >> .generated_env - @sha256sum $(ARTIFACTS_IN) >> .generated_env - @sha256sum .generated_env | awk '{print $$1}' > .generated_sha256 - -# Load artifacts based on .generated_sha256 -load-artifacts: .generated_sha256 - @if [ -z "$(XILINX_ARTIFACTS_ROOT)" ]; then \ - echo "Error: XILINX_ARTIFACTS_ROOT missing"; \ - exit 1; \ - fi - @if [ -d "$(XILINX_ARTIFACTS_ROOT)/`cat $<`" ]; then \ - echo -e $(TERM_GREEN)"Fetching $(PROJECT) from $(XILINX_ARTIFACTS_ROOT)/`cat $<`"$(TERM_NC); \ - cp -r $(XILINX_ARTIFACTS_ROOT)/`cat $<`/* .; \ - fi - -# Save artifacts (this folder) based on .generated_sha256 -save-artifacts: .generated_sha256 $(PROJECT).xpr - @if [ ! -d "$(XILINX_ARTIFACTS_ROOT)/`cat .generated_sha256`" ]; then \ - cp -r . $(XILINX_ARTIFACTS_ROOT)/`cat .generated_sha256`; \ - chmod -R g+rw $(XILINX_ARTIFACTS_ROOT)/`cat .generated_sha256`; \ - fi - -clean: - @rm -rf ip/* - @mkdir -p ip - @rm -rf ${PROJECT}.* - @rm -rf component.xml - @rm -rf vivado*.jou - @rm -rf vivado*.log - @rm -rf vivado*.str - @rm -rf xgui - @rm -rf .Xil - @rm -rf tmp - @rm -rf .generated* - -.PHONY: all all-artifacts-0 all-artifacts-1 clean save-artifacts load-artifacts diff --git a/target/xilinx/xilinx_ips/xilinx_ips.mk b/target/xilinx/xilinx_ips/xilinx_ips.mk new file mode 100644 index 000000000..26637ae86 --- /dev/null +++ b/target/xilinx/xilinx_ips/xilinx_ips.mk @@ -0,0 +1,75 @@ +# Copyright 2022 ETH Zurich and University of Bologna. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 +# +# Cyril Koenig + +# List available IPs +xilinx_available_ips = xlnx_clk_wiz xlnx_mig_ddr4 xlnx_vio carfield_ip + +# Include IP and add top level building rule (%.xci) and enable artifacts management +define xlnx_ips_vars_and_deps = +include $(CAR_XIL_DIR)/xilinx_ips/$(1)/$(1).mk +ARTIFACTS_PATHS_$(1) := $$(addprefix $$(ROOT_$(1))/, $$(ARTIFACTS_FILES_$(1))) +ARTIFACTS_VALS_$(1) := $$(foreach var, $$(ARTIFACTS_VARS_$(1)), $$(var)=$$($$(var))) + +ifeq ($(XILINX_USE_ARTIFACTS)$$(XILINX_USE_ARTIFACTS_$(1)),11) +$(CAR_XIL_DIR)/xilinx_ips/$(1)/%.xci: xilinx-ip-load-artifacts-$(1) $$(IP_DEP_$(1)) $(CAR_XIL_DIR)/xilinx_ips/$(1)/$(1).xpr xilinx-ip-save-artifacts-$(1) +else +$(CAR_XIL_DIR)/xilinx_ips/$(1)/%.xci: $$(IP_DEP_$(1)) $(CAR_XIL_DIR)/xilinx_ips/$(1)/$(1).xpr +endif + @echo "IP $(1) : Done" + +$(CAR_XIL_DIR)/xilinx_ips/$(1)/$(1).xpr: + cd $$(ROOT_$(1)) && $(vivado_env) $(VIVADO) -mode batch -source tcl/run.tcl +endef + +# Call xlnx_ips_vars_and_deps +$(foreach ip, $(xilinx_available_ips), $(eval $(call xlnx_ips_vars_and_deps,$(ip)))) + +# Define inputs used to differentiate artifacts +$(CAR_XIL_DIR)/xilinx_ips/%/.generated_env: + echo $(VIVADO) $(XILINX_PROJECT) > $@ + echo $(ARTIFACTS_VALS_$*) >> $@ + echo $(ARTIFACTS_PATHS_$*) + sha256sum $(ARTIFACTS_PATHS_$*) >> $@ + +# Define artifact hash +$(CAR_XIL_DIR)/xilinx_ips/%/.generated_sha256: $(CAR_XIL_DIR)/xilinx_ips/%/.generated_env + sha256sum $< | awk '{print $$1}' > $@ + +# Phonies can not use wildcards +define xlnx_ips_phonies = +# Load artifact based on hash +xilinx-ip-load-artifacts-$(1): $(CAR_XIL_DIR)/xilinx_ips/$(1)/.generated_sha256 + @if [ -z "$(XILINX_ARTIFACTS_ROOT)" ]; then \ + echo "Error: XILINX_ARTIFACTS_ROOT missing"; \ + exit 1; \ + fi + @if [ -d "$(XILINX_ARTIFACTS_ROOT)/`cat $$<`" ]; then \ + echo -e $(TERM_GREEN)"Fetching $(PROJECT) from $(XILINX_ARTIFACTS_ROOT)/`cat $$<`"$(TERM_NC); \ + cp -r $(XILINX_ARTIFACTS_ROOT)/`cat $$<`/* $(ROOT_$(1)); \ + fi + +# Save artifact based on hash +xilinx-ip-save-artifacts-$(1): $(CAR_XIL_DIR)/xilinx_ips/$(1)/.generated_sha256 $(CAR_XIL_DIR)/xilinx_ips/$(1)/$(1).xpr + @if [ ! -d "$(XILINX_ARTIFACTS_ROOT)/`cat $$<`" ]; then \ + cp -r $(ROOT_$(1)) $(XILINX_ARTIFACTS_ROOT)/`cat $$<`; \ + chmod -R g+rw $(XILINX_ARTIFACTS_ROOT)/`cat $$<`; \ + fi + +# Delete all the project.* generated folders +xilinx-ip-clean-$(1): + @if [ -z "$$(ROOT_$(1))" ]; then echo "Error: Cannot find ROOT_$(1)" exit 1; fi; + find $$(ROOT_$(1)) -mindepth 1 -type d -name "$(1).*" -exec rm -r {} + + cd $$(ROOT_$(1)) && rm -rf $(1) .generated_env .generated_sha256 vivado* .Xil *.xpr tcl/add_sources* xgui component.xml +.PHONY: xilinx-ip-load-artifacts-$(1) xilinx-ip-save-artifacts-$(1) xilinx-ip-clean-$(1) +endef + +# Call xlnx_ips_phonies +$(foreach ip, $(xilinx_available_ips), $(eval $(call xlnx_ips_phonies,$(ip)))) + +xilinx-ip-clean-all: $(addprefix xilinx-ip-clean-,$(xilinx_available_ips)) + +# Note: We do not PHONY the three rules above for lisibility since +# PHONY rules cannot use wildcards... but these files won't exist anyways diff --git a/target/xilinx/xilinx_ips/xlnx_clk_wiz/Makefile b/target/xilinx/xilinx_ips/xlnx_clk_wiz/Makefile deleted file mode 100644 index f466fe753..000000000 --- a/target/xilinx/xilinx_ips/xlnx_clk_wiz/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# Copyright 2022 ETH Zurich and University of Bologna. -# Licensed under the Apache License, Version 2.0, see LICENSE for details. -# SPDX-License-Identifier: Apache-2.0 - -PROJECT:=xlnx_clk_wiz -ARTIFACTS_IN:=Makefile tcl/run.tcl -ARTIFACTS_VARS:=XILINX_PART XILINX_BOARD XILINX_BOARD_LONG - -include ../common.mk \ No newline at end of file diff --git a/target/xilinx/xilinx_ips/xlnx_clk_wiz/xlnx_clk_wiz.mk b/target/xilinx/xilinx_ips/xlnx_clk_wiz/xlnx_clk_wiz.mk new file mode 100644 index 000000000..91639eb40 --- /dev/null +++ b/target/xilinx/xilinx_ips/xlnx_clk_wiz/xlnx_clk_wiz.mk @@ -0,0 +1,8 @@ +# Copyright 2022 ETH Zurich and University of Bologna. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +ROOT_xlnx_clk_wiz := $(CAR_XIL_DIR)/xilinx_ips/xlnx_clk_wiz +ARTIFACTS_FILES_xlnx_clk_wiz := xlnx_clk_wiz.mk tcl/run.tcl +ARTIFACTS_VARS_xlnx_clk_wiz := xilinx_part XILINX_BOARD xilinx_board_long +XILINX_USE_ARTIFACTS_xlnx_clk_wiz := 1 diff --git a/target/xilinx/xilinx_ips/xlnx_mig_ddr4/Makefile b/target/xilinx/xilinx_ips/xlnx_mig_ddr4/Makefile deleted file mode 100644 index 6d6712208..000000000 --- a/target/xilinx/xilinx_ips/xlnx_mig_ddr4/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# Copyright 2022 ETH Zurich and University of Bologna. -# Licensed under the Apache License, Version 2.0, see LICENSE for details. -# SPDX-License-Identifier: Apache-2.0 - -PROJECT:=xlnx_mig_ddr4 -ARTIFACTS_IN:=Makefile tcl/run.tcl -ARTIFACTS_VARS:=XILINX_PART XILINX_BOARD XILINX_BOARD_LONG - -include ../common.mk diff --git a/target/xilinx/xilinx_ips/xlnx_mig_ddr4/xlnx_mig_ddr4.mk b/target/xilinx/xilinx_ips/xlnx_mig_ddr4/xlnx_mig_ddr4.mk new file mode 100644 index 000000000..a288c0b71 --- /dev/null +++ b/target/xilinx/xilinx_ips/xlnx_mig_ddr4/xlnx_mig_ddr4.mk @@ -0,0 +1,8 @@ +# Copyright 2022 ETH Zurich and University of Bologna. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +ROOT_xlnx_mig_ddr4 := $(CAR_XIL_DIR)/xilinx_ips/xlnx_mig_ddr4 +ARTIFACTS_FILES_xlnx_mig_ddr4 := xlnx_mig_ddr4.mk tcl/run.tcl +ARTIFACTS_VARS_xlnx_mig_ddr4 := xilinx_part XILINX_BOARD xilinx_board_long +XILINX_USE_ARTIFACTS_xlnx_mig_ddr4 := 1 diff --git a/target/xilinx/xilinx_ips/xlnx_vio/Makefile b/target/xilinx/xilinx_ips/xlnx_vio/Makefile deleted file mode 100644 index dfb287bce..000000000 --- a/target/xilinx/xilinx_ips/xlnx_vio/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# Copyright 2022 ETH Zurich and University of Bologna. -# Licensed under the Apache License, Version 2.0, see LICENSE for details. -# SPDX-License-Identifier: Apache-2.0 - -PROJECT:=xlnx_vio -ARTIFACTS_IN:=Makefile tcl/run.tcl -ARTIFACTS_VARS:=XILINX_PART XILINX_BOARD XILINX_BOARD_LONG - -include ../common.mk diff --git a/target/xilinx/xilinx_ips/xlnx_vio/xlnx_vio.mk b/target/xilinx/xilinx_ips/xlnx_vio/xlnx_vio.mk new file mode 100644 index 000000000..f42e26bdc --- /dev/null +++ b/target/xilinx/xilinx_ips/xlnx_vio/xlnx_vio.mk @@ -0,0 +1,8 @@ +# Copyright 2022 ETH Zurich and University of Bologna. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +ROOT_xlnx_vio := $(CAR_XIL_DIR)/xilinx_ips/xlnx_vio +ARTIFACTS_FILES_xlnx_vio := xlnx_vio.mk tcl/run.tcl +ARTIFACTS_VARS_xlnx_vio := xilinx_part XILINX_BOARD xilinx_board_long +XILINX_USE_ARTIFACTS_xlnx_vio := 1