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Instruction not emulated properly on guests #8756

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jiaqingz-intel opened this issue Jan 10, 2025 · 0 comments
Open

Instruction not emulated properly on guests #8756

jiaqingz-intel opened this issue Jan 10, 2025 · 0 comments
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status: new The issue status: new for creation

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@jiaqingz-intel
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The following instruction does not work properly on guests

mov $1, %rsi
mov $0x8086, %eax
cmpl (PCI_VID_ADDR), %eax
je 1f
mov $0, %rsi
1:

After execution, %rsi equals 0, it should be 1 as je 1f is true and jumps to 1:
@jiaqingz-intel jiaqingz-intel added the status: new The issue status: new for creation label Jan 10, 2025
jiaqingz-intel added a commit to jiaqingz-intel/acrn-hypervisor that referenced this issue Jan 10, 2025
@jiaqingz-intel
hv: instr_emul: Correct handling of instruction length
c1d825f 
The VM-exit instruction length(VMX_EXIT_INSTR_LEN) in VMCS is undefined
on EPT violation, except during delivery of a software interrupt,
privileged software exception, or software exception[1]. Although CPU
is likely to set the field, it can be incorrect in certain cases, such
as cmp+jcc and test+jcc.

Since hypervisor does not know exactly how much bytes needed, and GVA
translation is costly, it first copies at most 15 (VIE_INST_SIZE) bytes
within the page, then decodes the instruction. If more bytes are needed
during decoding and copied length is less than 15, it copies remaining
bytes.

[1] 29.2.5, https://cdrdv2-public.intel.com/671200/325462-sdm-vol-1-2abcd-3abcd.pdf

Tracked-On: projectacrn#8756
Signed-off-by: Jiaqing Zhao <[email protected]>
@jiaqingz-intel jiaqingz-intel mentioned this issue Jan 10, 2025
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