From 637aa1113493719765ac3da047e4590dbd70e96e Mon Sep 17 00:00:00 2001
From: Aditya Badole <supershinx@gmail.com>
Date: Fri, 8 Sep 2023 17:13:46 +0800
Subject: [PATCH] #10 allocate node for cinit

---
 src/arch/riscvcapstone/o3/cpu.cc      | 25 ++++++++++++---------
 src/arch/riscvcapstone/o3/ncq.cc      |  5 +++++
 src/arch/riscvcapstone/o3/ncq.hh      |  2 ++
 src/arch/riscvcapstone/o3/ncq_unit.cc | 32 +++++++++++++++++++++++++++
 src/arch/riscvcapstone/o3/ncq_unit.hh |  3 +++
 5 files changed, 56 insertions(+), 11 deletions(-)

diff --git a/src/arch/riscvcapstone/o3/cpu.cc b/src/arch/riscvcapstone/o3/cpu.cc
index 2d50146263..b501cf3b71 100644
--- a/src/arch/riscvcapstone/o3/cpu.cc
+++ b/src/arch/riscvcapstone/o3/cpu.cc
@@ -558,17 +558,20 @@ CPU::startup()
     rename.startupStage();
     commit.startupStage();
 
-    Cap *cap = new Cap;
-    cap->setPerm(CapPerm::RWX);
-    cap->setType(CapType::LIN);
-    cap->setBound(secure_base, secure_end);
-    cap->setNodeId(0);
-    //WIP: new function for pushing this nodeid straightaway
-
-    ConstTaggedRegVal ctrv;
-    ctrv.setTag(true);
-    ctrv.getRegVal().rawCapVal() = (uint128_t)*cap;
-    isa[0]->setTaggedMiscReg(1, ctrv); //capmiscreg_cinit
+    //we don't actually support multithreading yet
+    for (ThreadID tid = 0; tid < numThreads; ++tid) {
+        Cap *cap = new Cap;
+        cap->setPerm(CapPerm::RWX);
+        cap->setType(CapType::LIN);
+        cap->setBound(secure_base, secure_end);
+        cap->setNodeId(0);
+        iew.ncQueue.allocateInit(tid);
+
+        ConstTaggedRegVal ctrv;
+        ctrv.setTag(true);
+        ctrv.getRegVal().rawCapVal() = (uint128_t)*cap;
+        isa[tid]->setTaggedMiscReg(1, ctrv); //capmiscreg_cinit
+    }
 }
 
 void
diff --git a/src/arch/riscvcapstone/o3/ncq.cc b/src/arch/riscvcapstone/o3/ncq.cc
index 1f8ab260c7..ec2724c1e1 100644
--- a/src/arch/riscvcapstone/o3/ncq.cc
+++ b/src/arch/riscvcapstone/o3/ncq.cc
@@ -164,6 +164,11 @@ NCQ::squash(const InstSeqNum& squashed_num, ThreadID thread_id) {
     threads[thread_id].squash(squashed_num);
 }
 
+void NCQ::allocateInit(ThreadID thread_id) {
+    assert(thread_id >= 0 && thread_id < threadNum);
+    threads[thread_id].allocateInit();
+}
+
 }
 }
 }
diff --git a/src/arch/riscvcapstone/o3/ncq.hh b/src/arch/riscvcapstone/o3/ncq.hh
index 3cc415a8f7..6e70af8e5c 100644
--- a/src/arch/riscvcapstone/o3/ncq.hh
+++ b/src/arch/riscvcapstone/o3/ncq.hh
@@ -99,6 +99,8 @@ class NCQ {
         void squash(const InstSeqNum& squashed_num, ThreadID thread_id);
 
         Fault postExecCheck(const DynInstPtr& inst);
+
+        void allocateInit(ThreadID thread_id);
 };
 
 }
diff --git a/src/arch/riscvcapstone/o3/ncq_unit.cc b/src/arch/riscvcapstone/o3/ncq_unit.cc
index 53377b47ca..42d8b3cb76 100644
--- a/src/arch/riscvcapstone/o3/ncq_unit.cc
+++ b/src/arch/riscvcapstone/o3/ncq_unit.cc
@@ -14,6 +14,12 @@ namespace o3 {
 
 class CPU;
 
+const Addr NODE_MEM_BASE_ADDR = 0x7d0000000ULL;
+
+inline Addr node_addr(NodeID node_id) {
+    return (Addr)(NODE_MEM_BASE_ADDR + ((Addr)node_id * (sizeof(Node))));
+}
+
 NCQUnit::NCQUnit(ThreadID thread_id, int queue_size,
         CPU* cpu, NCQ* ncq, IEW* iew) :
     threadId(thread_id),
@@ -273,6 +279,32 @@ NCQUnit::squash(const InstSeqNum &squashed_num) {
     }
 }
 
+void
+NCQUnit::allocateInit() {
+    Node init_node;
+    init_node.counter = 1;
+    init_node.depth = 0;
+    init_node.state = Node::VALID;
+    init_node.prev = NODE_ID_INVALID;
+    init_node.next = NODE_ID_INVALID;
+
+    Addr addr = node_addr(0);
+    RequestPtr req = std::make_shared<Request>();
+    req->requestorId(cpu->dataRequestorId());
+    req->setPaddr(addr);
+    req->setSize(sizeof(Node));
+    PacketPtr pkt = Packet::createWrite(req);
+    //pkt->setSize(sizeof(Node));
+    pkt->allocate();
+    memcpy(pkt->getPtr<void>(), &init_node, sizeof(Node));
+
+    cpu->nodeController.setRoot(0);
+
+    if(pkt) {
+        ncq->trySendPacket(pkt, threadId);
+    }
+}
+
 
 }
 }
diff --git a/src/arch/riscvcapstone/o3/ncq_unit.hh b/src/arch/riscvcapstone/o3/ncq_unit.hh
index 071f6a1978..0d57133b36 100644
--- a/src/arch/riscvcapstone/o3/ncq_unit.hh
+++ b/src/arch/riscvcapstone/o3/ncq_unit.hh
@@ -109,6 +109,9 @@ class NCQUnit {
         Fault postExecCheck(const DynInstPtr& inst) {
             return NoFault;
         }
+
+        // allocate the node for cinit, assumed 0
+        void allocateInit();
 };
 
 }