From 283fdd1b643a789830cb4a48efc7a6f7bf6a57ef Mon Sep 17 00:00:00 2001 From: Lukasz Kosinski Date: Tue, 15 Nov 2022 21:03:58 +0100 Subject: [PATCH] imx6ull-flash: add function for checking DMA descriptor chain JIRA: DTR-347 --- storage/imx6ull-flash/flashdrv.c | 45 ++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/storage/imx6ull-flash/flashdrv.c b/storage/imx6ull-flash/flashdrv.c index 45743579..f8370ea7 100644 --- a/storage/imx6ull-flash/flashdrv.c +++ b/storage/imx6ull-flash/flashdrv.c @@ -11,6 +11,7 @@ * %LICENSE% */ +#include #include #include #include @@ -459,6 +460,32 @@ void flashdrv_dmadestroy(flashdrv_dma_t *dma) } +static dma_t *dma_verify(dma_t *desc) +{ + /* DMA transfer/sense, check the buffer */ + if ((desc->flags & 3) && (desc->buffer == 0)) { + printf("imx6ull-flash: detected NULL buffer for DMA transfer!\n"); + } + + /* Return next descriptor */ + return (desc->flags & dma_chain) ? (dma_t *)((uintptr_t)desc + (desc->next - (uint32_t)va2pa(desc))) : NULL; +} + + +static int flashdrv_dmaverify(flashdrv_dma_t *dma) +{ + dma_t *desc = dma->first; + int n = 0; + + while (desc != NULL) { + desc = dma_verify(desc); + n++; + } + + return n; +} + + int flashdrv_wait4ready(flashdrv_dma_t *dma, int chip, int err) { void *next = dma->last, *prev = dma->last; @@ -652,6 +679,8 @@ int flashdrv_reset(flashdrv_dma_t *dma) flashdrv_issue(dma, flash_reset, chip, NULL, 0, NULL, NULL); flashdrv_finish(dma); + assert(flashdrv_dmaverify(dma) == 2); + mutexLock(flashdrv_common.mutex); flashdrv_common.result = 1; dma_run((dma_t *)dma->first, channel); @@ -684,6 +713,8 @@ int flashdrv_readid(flashdrv_dma_t *dma, flash_id_t *flash_id) flashdrv_wait4ready(dma, chip, EOK); flashdrv_finish(dma); + assert(flashdrv_dmaverify(dma) == 10); + mutexLock(flashdrv_common.mutex); flashdrv_common.result = 1; dma_run((dma_t *)dma->first, channel); @@ -728,6 +759,8 @@ int flashdrv_write(flashdrv_dma_t *dma, uint32_t paddr, void *data, char *aux) flashdrv_readcompare(dma, chip, 0x3, 0, -1); flashdrv_finish(dma); + assert(flashdrv_dmaverify(dma) == 11); + mutexLock(flashdrv_common.mutex); if (data == NULL) { @@ -794,6 +827,8 @@ int flashdrv_read(flashdrv_dma_t *dma, uint32_t paddr, void *data, flashdrv_meta flashdrv_disablebch(dma, chip); flashdrv_finish(dma); + assert(flashdrv_dmaverify(dma) == 9); + mutexLock(flashdrv_common.mutex); flashdrv_common.result = 1; flashdrv_common.bch_done = 0; @@ -827,6 +862,8 @@ int flashdrv_erase(flashdrv_dma_t *dma, uint32_t paddr) flashdrv_readcompare(dma, chip, 0x1, 0, -1); flashdrv_finish(dma); + assert(flashdrv_dmaverify(dma) == 10); + mutexLock(flashdrv_common.mutex); flashdrv_common.result = 1; dma_run((dma_t *)dma->first, channel); @@ -859,6 +896,8 @@ int flashdrv_writeraw(flashdrv_dma_t *dma, uint32_t paddr, void *data, int sz) flashdrv_readcompare(dma, 0, 0x3, 0, -1); flashdrv_finish(dma); + assert(flashdrv_dmaverify(dma) == 11); + mutexLock(flashdrv_common.mutex); flashdrv_common.result = 1; dma_run((dma_t *)dma->first, channel); @@ -892,6 +931,8 @@ int flashdrv_readraw(flashdrv_dma_t *dma, uint32_t paddr, void *data, int sz) flashdrv_wait4ready(dma, chip, EOK); flashdrv_finish(dma); + assert(flashdrv_dmaverify(dma) == 11); + mutexLock(flashdrv_common.mutex); flashdrv_common.result = 1; dma_run((dma_t *)dma->first, channel); @@ -930,6 +971,8 @@ int flashdrv_isbad(flashdrv_dma_t *dma, uint32_t paddr) flashdrv_wait4ready(dma, chip, EOK); flashdrv_finish(dma); + assert(flashdrv_dmaverify(dma) == 11); + mutexLock(flashdrv_common.mutex); flashdrv_common.result = 1; dma_run((dma_t *)dma->first, channel); @@ -971,6 +1014,8 @@ int flashdrv_markbad(flashdrv_dma_t *dma, uint32_t paddr) flashdrv_readcompare(dma, 0, 0x3, 0, -1); flashdrv_finish(dma); + assert(flashdrv_dmaverify(dma) == 11); + mutexLock(flashdrv_common.mutex); memset(data, 0xff, flashdrv_common.info.writesz + flashdrv_common.info.metasz);