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timing.cfg
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timing.cfg
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# fag: FetchAddressGenerate
flexus.set "-fag:faddrs" "3" # "Max fetch addresses generated per cycle" (MaxFetchAddress)
flexus.set "-fag:bpreds" "2" # "Max branches predicted per cycle" (MaxBPred)
flexus.set "-fag:threads" "1" # "Number of threads under control of this FAG" (Threads)
# ufetch: uFetch
#flexus.set "-ufetch:faq" "24" # "Fetch address queue size" (FAQSize)
#flexus.set "-ufetch:flines" "2" # "Max i-cache lines fetched per cycle" (MaxFetchLines)
#flexus.set "-ufetch:finst" "3" # "Max instructions fetched per cycle" (MaxFetchInstructions)
flexus.set "-ufetch:iline" "64" # "Icache line size in bytes" (ICacheLineSize)
flexus.set "-ufetch:perfect" "0" # "Use a perfect ICache" (PerfectICache)
#flexus.set "-ufetch:prefetch" "1" # "Enable Next-line Prefetcher" (PrefetchEnabled)
flexus.set "-ufetch:clean_evict" "1" # "Enable eviction messages" (CleanEvict)
flexus.set "-ufetch:size" "16384" # "ICache size in bytes" (Size)
flexus.set "-ufetch:associativity" "4" # "ICache associativity" (Associativity)
#flexus.set "-ufetch:miss_queue_size" "4" # "Maximum size of the fetch miss queue" (MissQueueSize)
flexus.set "-ufetch:threads" "1" # "Number of threads under control of this uFetch" (Threads)
flexus.set "-ufetch:send_acks" "1" # "Send acknowledgements when we received data" (SendAcks)
#flexus.set "-ufetch:use_reply_channel" "1" # "Send replies on Reply Channel and only Evicts on Snoop Channel" (UseReplyChannel)
#flexus.set "-ufetch:evict_on_snoop" "0" # "Send evicts on Snoop Channel (otherwise use Request Channel)" (EvictOnSnoop)
flexus.set "-ufetch:send_acks" "1" # "Send acknowledgements when we received data" (SendAcks)
flexus.set "-ufetch:use_reply_channel" "1" # "Send replies on Reply Channel and only Evicts on Snoop Channel" (UseReplyChannel)
flexus.set "-ufetch:evict_on_snoop" "0" # "Send evicts on Snoop Channel (otherwise use Request Channel)" (EvictOnSnoop)
# decoder: Decoder
flexus.set "-decoder:fiq" "8" # "Fetch instruction queue size" (FIQSize)
flexus.set "-decoder:dispatch" "3" # "Maximum dispatch per cycle" (DispatchWidth)
flexus.set "-decoder:multithread" "0" # "Enable multi-threaded execution" (Multithread)
# uarch: uarch
flexus.set "-uarch:rob" "128" # "Reorder buffer size" (ROBSize)
flexus.set "-uarch:sb" "32" # "Store buffer size" (SBSize)
flexus.set "-uarch:naw_bypass_sb" "0" # "Allow Non-Allocating-Writes to bypass store-buffer" (NAWBypassSB)
flexus.set "-uarch:naw_wait_at_sync" "0" # "Force MEMBAR #Sync to wait for non-allocating writes to finish" (NAWWaitAtSync)
flexus.set "-uarch:retire" "3" # "Retirement width" (RetireWidth)
flexus.set "-uarch:memports" "2" # "Memory Ports" (MemoryPorts)
flexus.set "-uarch:snoopports" "1" # "Snoop Ports" (SnoopPorts)
flexus.set "-uarch:storeprefetch" "30" # "Simultaneous store prefeteches" (StorePrefetches)
flexus.set "-uarch:prefetch_early" "0" # "Issue store prefetch requests when address resolves" (PrefetchEarly)
flexus.set "-uarch:consistency" "1" # "Consistency Model" (ConsistencyModel)
flexus.set "-uarch:coherence" "64" # "Coherence Unit" (CoherenceUnit)
flexus.set "-uarch:break_on_resynch" "0" # "Break on resynchronizer" (BreakOnResynchronize)
flexus.set "-uarch:spin_control" "0" # "Enable spin control" (SpinControl)
flexus.set "-uarch:spec_order" "0" # "Speculate on Memory Order" (SpeculativeOrder)
flexus.set "-uarch:spec_atomic_val" "0" # "Speculate on the Value of Atomics" (SpeculateOnAtomicValue)
flexus.set "-uarch:spec_atomic_val_perfect" "0" # "Use perfect atomic value prediction" (SpeculateOnAtomicValuePerfect)
flexus.set "-uarch:spec_ckpts" "0" # "Number of checkpoints allowed. 0 for infinite" (SpeculativeCheckpoints)
flexus.set "-uarch:ckpt_threshold" "0" # "Number of instructions between checkpoints. 0 disables periodic checkpoints" (CheckpointThreshold)
flexus.set "-uarch:early_sgp" "0" # "Notify SGP Early" (EarlySGP)
flexus.set "-uarch:track_parallel" "0" # "Track which memory accesses can proceed in parallel" (TrackParallelAccesses)
flexus.set "-uarch:in_order_memory" "0" # "Only allow ROB/SB head to issue to memory" (InOrderMemory)
flexus.set "-uarch:in_order_execute" "0" # "Ensure that instructions execute in order" (InOrderExecute)
flexus.set "-uarch:multithread" "0" # "Enable multi-threaded execution" (Multithread)
flexus.set "-uarch:on-chip-se" "1" # "On-Chip Side-Effect latency" (OnChipLatency)
flexus.set "-uarch:off-chip-se" "90" # "Off-Chip Side-Effect latency" (OffChipLatency)
flexus.set "-uarch:numIntAlu" "2" # "Number of integer ALUs" (NumIntAlu)
flexus.set "-uarch:intAluOpLatency" "1" # "End-to-end latency of an integer ALU operation" (IntAluOpLatency)
flexus.set "-uarch:intAluOpPipelineResetTime" "1" # "Number of cycles required between subsequent integer ALU operations" (IntAluOpPipelineResetTime)
flexus.set "-uarch:numIntMult" "1" # "Number of integer MUL/DIV units" (NumIntMult)
flexus.set "-uarch:intMultOpLatency" "3" # "End-to-end latency of an integer MUL operation" (IntMultOpLatency)
flexus.set "-uarch:intMultOpPipelineResetTime" "1" # "Number of cycles required between subsequent integer MUL operations" (IntMultOpPipelineResetTime)
flexus.set "-uarch:intDivOpLatency" "16" # "End-to-end latency of an integer DIV operation" (IntDivOpLatency)
flexus.set "-uarch:intDivOpPipelineResetTime" "6" # "Number of cycles required between subsequent integer DIV operations" (IntDivOpPipelineResetTime)
flexus.set "-uarch:numFpAlu" "1" # "Number of FP ALUs" (NumFpAlu)
flexus.set "-uarch:fpAddOpLatency" "3" # "End-to-end latency of an FP ADD/SUB operation" (FpAddOpLatency)
flexus.set "-uarch:fpAddOpPipelineResetTime" "1" # "Number of cycles required between subsequent FP ADD/SUB operations" (FpAddOpPipelineResetTime)
flexus.set "-uarch:fpCmpOpLatency" "1" # "End-to-end latency of an FP compare operation" (FpCmpOpLatency)
flexus.set "-uarch:fpCmpOpPipelineResetTime" "1" # "Number of cycles required between subsequent FP compare operations" (FpCmpOpPipelineResetTime)
flexus.set "-uarch:fpCvtOpLatency" "4" # "End-to-end latency of an FP convert operation" (FpCvtOpLatency)
flexus.set "-uarch:fpCvtOpPipelineResetTime" "1" # "Number of cycles required between subsequent FP convert operations" (FpCvtOpPipelineResetTime)
flexus.set "-uarch:numFpMult" "1" # "Number of FP MUL/DIV units" (NumFpMult)
flexus.set "-uarch:fpMultOpLatency" "5" # "End-to-end latency of an FP MUL operation" (FpMultOpLatency)
flexus.set "-uarch:fpMultOpPipelineResetTime" "2" # "Number of cycles required between subsequent FP MUL operations" (FpMultOpPipelineResetTime)
flexus.set "-uarch:fpDivOpLatency" "6" # "End-to-end latency of an FP DIV operation" (FpDivOpLatency)
flexus.set "-uarch:fpDivOpPipelineResetTime" "5" # "Number of cycles required between subsequent FP DIV operations" (FpDivOpPipelineResetTime)
flexus.set "-uarch:fpSqrtOpLatency" "6" # "End-to-end latency of an FP SQRT operation" (FpSqrtOpLatency)
flexus.set "-uarch:fpSqrtOpPipelineResetTime" "5" # "Number of cycles required between subsequent FP SQRT operations" (FpSqrtOpPipelineResetTime)
# L1d: Cache
flexus.set "-L1d:bsize" "64" # "Block size" (BlockSize)
flexus.set "-L1d:cores" "0"
#flexus.set "-L1d:ports" "2" # "Number of ports on data and tag arrays" (Ports)
#flexus.set "-L1d:banks" "1" # "number of banks on the data and tag arrays" (Banks)
#flexus.set "-L1d:tag_lat" "1" # "Total latency of tag pipeline" (TagLatency)
flexus.set "-L1d:dup_tag_issue_lat" "1" # "Minimum delay between issues to tag pipeline" (TagIssueLatency)
#flexus.set "-L1d:data_lat" "2" # "Total latency of data pipeline" (DataLatency)
flexus.set "-L1d:data_issue_lat" "1" # "Minimum delay between issues to data pipeline" (DataIssueLatency)
flexus.set "-L1d:level" "1" # "CacheLevel" (eL1)
#flexus.set "-L1d:queue_size" "8" # "Size of input and output queues" (QueueSizes)
#flexus.set "-L1d:pre_queue_size" "4" # "Size of input arbitration queues" (PreQueueSizes)
#flexus.set "-L1d:maf" "32" # "Number of MAF entries" (MAFSize)
flexus.set "-L1d:maf_targets" "0" # "Number of MAF targets per request" (MAFTargetsPerRequest)
#flexus.set "-L1d:eb" "32" # "Number of Evict Buffer entries" (EvictBufferSize)
#flexus.set "-L1d:snoops" "8" # "Number of Snoop Buffer entries" (SnoopBufferSize)
#flexus.set "-L1d:probe_fetchmiss" "0" # "Probe hierarchy on Ifetch miss" (ProbeFetchMiss)
#flexus.set "-L1d:bustime_nodata" "1" # "Bus transfer time - no data" (BusTime_NoData)
#flexus.set "-L1d:bustime_data" "2" # "Bus transfer time - data" (BusTime_Data)
flexus.set "-L1d:allow_evict_clean" "1" # "Cause the cache to evict clean blocks" (EvictClean)
flexus.set "-L1d:evict_writable_has_data" "1" # "Send data with EvictWritable messages" (EvictWritableHasData)
flexus.set "-L1d:evict_on_snoop" "0" # "Send evictions on Snoop channel" (EvictOnSnoop)
flexus.set "-L1d:fast_evict_clean" "0" # "Send clean evicts without reserving data bus" (FastEvictClean)
flexus.set "-L1d:no_bus" "0" # "No bus model (i.e., infinite BW, no latency)" (NoBus)
#flexus.set "-L1d:trace_address" "0" # "Address to initiate tracing" (TraceAddress)
flexus.set "-L1d:cache_type" "InclusiveMESI:snoop_lru=false" # "Type of cache (InclusiveMOESI)" (CacheType)
flexus.set "-L1d:array_config" "STD:size=16384:assoc=4:repl=LRU" # "Configuration of cache array (STD:sets=1024:assoc=16:repl=LRU" (ArrayConfiguration)
flexus.set "-L1d:use_reply_channel" "1" # "Separate Reply and Snoop channels on BackSide" (UseReplyChannel)
# L2: CMPCache
flexus.set "-L2:cores" "0" # "Number of cores" (Cores)
flexus.set "-L2:bsize" "64" # "Block size" (BlockSize)
#flexus.set "-L2:banks" "1" # "number of directory banks in each group" (Banks)
#flexus.set "-L2:bank_interleaving" "64" # "interleaving between directory banks (64 bytes)" (BankInterleaving)
#flexus.set "-L2:groups" "1" # "number of directory bank groups" (Groups)
#flexus.set "-L2:group_interleaving" "4096" # "interleaving between directory bank groups (1024 bytes)" (GroupInterleaving)
#flexus.set "-L2:dir_lat" "1" # "Total latency of directory lookup" (DirLatency)
flexus.set "-L2:dir_issue_lat" "1" # "Minimum delay between issues to the directory" (DirIssueLatency)
#flexus.set "-L2:tag_lat" "1" # "Total latency of tag array lookup" (TagLatency)
flexus.set "-L2:tag_issue_lat" "1" # "Minimum delay between issues to the tag array" (TagIssueLatency)
#flexus.set "-L2:data_lat" "3" # "Total latency of data array lookup" (DataLatency)
flexus.set "-L2:data_issue_lat" "1" # "Minimum delay between issues to the data array" (DataIssueLatency)
#flexus.set "-L2:queue_size" "32" # "Size of input and output queues" (QueueSize)
#flexus.set "-L2:maf_size" "256" # "Number of MAF entries" (MAFSize)
#flexus.set "-L2:dir_eb_size" "16" # "Number of Evict Buffer entries for the directory" (DirEvictBufferSize)
#flexus.set "-L2:cache_eb_size" "256" # "Number of Evict Buffer entries for the cache" (CacheEvictBufferSize)
#flexus.set "-L2:policy" "NonInclusiveMESI" # "Coherence policy for higher caches (NonInclusiveMESI)" (Policy)
#flexus.set "-L2:controller" "Default" # "Type of controller (Default or Detailed)" (ControllerType)
flexus.set "-L2:dir_type" "inf" # "Type of directory (infinite, std, region, etc.)" (DirectoryType)
flexus.set "-L2:dir_config" "skew_shift=0" # "Configuration of directory array (sets=1025:assoc=16)" (DirectoryConfig)
flexus.set "-L2:level" "2" # "CacheLevel" (eL2)
flexus.set "-L2:allow_evict_clean" "0" # "Cause the cache to evict clean blocks" (EvictClean)
flexus.set "-L2:array_config" "STD:total_sets=65536:assoc=8:repl=LRU" # "Configuration of cache array (STD:sets=1024:assoc=16:repl=LRU" (ArrayConfiguration)
# nic: MultiNic2
flexus.set "-nic:vc" "3" # "Virtual channels" (VChannels)
flexus.set "-nic:recv-capacity" "4" # "Recv Queue Capacity" (RecvCapacity)
flexus.set "-nic:send-capacity" "4" # "Send Queue Capacity" (SendCapacity)
# network: MemoryNetwork
flexus.set "-network:nodes" "0" # "Number of Nodes" (NumNodes)
flexus.set "-network:topology-file" "BuildMesh" # "Network topology file" (NetworkTopologyFile)
flexus.set "-network:virtual-channels" "3" # "Number of virtual channels" (VChannels)
# net-mapper: SplitDestinationMapper
flexus.set "-net-mapper:Cores" "0" # "Number of cores" (Cores)
flexus.set "-net-mapper:MemControllers" "1" # "Number of memory controllers" (MemControllers)
flexus.set "-net-mapper:Directories" "0" # "Number of directories" (Directories)
flexus.set "-net-mapper:Banks" "0" # "Number of banks" (Banks)
flexus.set "-net-mapper:DirInterleaving" "64" # "Interleaving between directories (in bytes)" (DirInterleaving)
flexus.set "-net-mapper:MemInterleaving" "64" # "Interleaving between memory controllers (in bytes)" (MemInterleaving)
flexus.set "-net-mapper:DirXORShift" "-1" # "XOR high order bits after shifting this many bits when calculating directory index" (DirXORShift)
flexus.set "-net-mapper:MemXORShift" "-1" # "XOR high order bits after shifting this many bits when calculating memory index" (MemXORShift)
flexus.set "-net-mapper:DirLocation" "Distributed" # "Directory location (Distributed|AtMemory)" (DirLocation)
flexus.set "-net-mapper:MemLocation" "0" # "Memory controller locations (ex: '8,15,24,31,32,39,48,55')" (MemLocation)
flexus.set "-net-mapper:MemReplyToDir" "1" # "Send memory replies to the directory (instead of original requester)" (MemReplyToDir)
flexus.set "-net-mapper:MemAcksNeedData" "1" # "When memory replies directly to requester, require data with final ack" (MemAcksNeedData)
flexus.set "-net-mapper:TwoPhaseWB" "0" # "2 Phase Write-Back sends NAcks to requester, not directory" (TwoPhaseWB)
flexus.set "-net-mapper:LocalDir" "0" # "Treate directory as always being local to the requester" (LocalDir)
# memory: MemoryLoopback
flexus.set "-memory:time" "90" # "Access time" (Delay)
flexus.set "-memory:max_requests" "64" # "Maximum requests queued in loopback" (MaxRequests)
flexus.set "-memory:UseFetchReply" "1" # "Send FetchReply in response to FetchReq (instead of MissReply)" (UseFetchReply)
# memory-map: MemoryMap
flexus.set "-memory-map:pagesize" "4096" # "Page size in bytes (used by statistics only)" (PageSize)
flexus.set "-memory-map:nodes" "0" # "Number of Nodes" (NumNodes)
flexus.set "-memory-map:round_robin" "1" # "Use static round-robin page allocation" (RoundRobin)
flexus.set "-memory-map:write_page_map" "1" # "Write page map as pages are created" (CreatePageMap)
flexus.set "-memory-map:page_map" "0" # "Load Page Map on start" (ReadPageMap)
# mmu: MMU
flexus.set "-mmu:cores" "1" # "Number of cores" (Cores)
flexus.set "-mmu:itlbsize" "64" # "Size of the Instruction TLB" (iTLBSize)
flexus.set "-mmu:dtlbsize" "64" # "Size of the Data TLB" (dTLBSize)
flexus.set "-mmu:perfect" "0" # "TLB never misses" (PerfectTLB) (1=true, 0=false)