C&S trigger a missing operand1 assertion #53
Comments
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found the issue in the internal dependency system for one of the operands of CAS (3rd operand). it was setting the internal dep arg to 0 which made one operand mark another one as ready (the first one that was waiting on read register finishing in an extra cycle). Just forcing it to be the correct arg after the fact fixed the issue, investigating more on why arg is being set wrong |
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uploaded the fix 0701031 |
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The bug was caused by one of the actions in C&S (calculating address for RS), and there the operand was set to 1. now even though for the action RS is the only operand, that number is global (with respect to the scope of the instruction), hence the base should have been added (2), since RS is the 3'rd operand (1+2) for the CASA instruction that was being decoded. |
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To be reviewed by @branylagaffe |
Found the issue in the internal dependency system for one of the operands of CAS (3rd operand). It was setting the internal dep arg to 0 which made one operand mark another one as ready (the first one that was waiting on read register finishing in an extra cycle). Just forcing it to be the correct arg after the fact fixed the issue, investigating more on why arg is being set wrong Co-authored-by: Bryan Perdrizat <[email protected]>
C&S trigger a missing operand1 assertion
Description
C&S instruction may be badly decoded and then trigger an assertion failure.
Steps to Reproduce
Actual Behavior
casainstruction have only one operand decoded instead of three.The text was updated successfully, but these errors were encountered: