diff --git a/modules/axhal/src/platform/loongarch64_qemu_virt/mod.rs b/modules/axhal/src/platform/loongarch64_qemu_virt/mod.rs index 74f86b2dc5..baf1aef9e6 100644 --- a/modules/axhal/src/platform/loongarch64_qemu_virt/mod.rs +++ b/modules/axhal/src/platform/loongarch64_qemu_virt/mod.rs @@ -84,7 +84,9 @@ pub mod misc { info!("Shutting down..."); const HALT_ADDR: *mut u8 = phys_to_virt(pa!(axconfig::devices::GED_PADDR)).as_mut_ptr(); unsafe { HALT_ADDR.write_volatile(0x34) }; - loop { crate::arch::halt() }; + loop { + crate::arch::halt(); + } } } diff --git a/modules/axmm/src/lib.rs b/modules/axmm/src/lib.rs index e2b188f290..ed4203b751 100644 --- a/modules/axmm/src/lib.rs +++ b/modules/axmm/src/lib.rs @@ -46,8 +46,8 @@ pub fn new_kernel_aspace() -> AxResult { pub fn new_user_aspace(base: VirtAddr, size: usize) -> AxResult { let mut aspace = AddrSpace::new_empty(base, size)?; if !cfg!(target_arch = "aarch64") && !cfg!(target_arch = "loongarch64") { - // ARMv8 and loongarch64 use a separate page table (aarch64: TTBR0_EL1, - // loongarch64: pgdl) for user space, it doesn't need to copy the kernel + // ARMv8 and loongarch64 use a separate page table (aarch64: TTBR0_EL1, + // loongarch64: pgdl) for user space, it doesn't need to copy the kernel // portion to the user page table. aspace.copy_mappings_from(&kernel_aspace().lock())?; }