[Ruby][CHI]how to add shared l2 cache in ruby CHI protocol?

[qqli579]

I added the addSharedL2Cache function by referring to the addPrivL2Cache function in configs/ruby/CHI_config.py：

I tested it with the following command and it can run normally:
./build/RISCV/gem5.opt configs/example/riscv/fs_linux_ruby.py --ruby --virtio-rng --mem-type=DDR3_2133_8x8 --mem-size=8GB --num-cpus=4 --num-dirs=1 --num-clusters=2 --cpu-type=O3CPU --l2shared --num-l3caches=1 --network=garnet --topology=CustomMesh --chi-config=configs/example/noc_config/4x4.py --kernel=./image/kernel.elf --disk-image=./image/rootfs.img

But there is the following warning：
warn: .cpu1.l2 already has parent not resetting parent.
Note: l2 is not a parameter of RiscvO3CPU
warn: (Previously declared as .cpu0.l2
warn: .cpu3.l2 already has parent not resetting parent.
Note: l2 is not a parameter of RiscvO3CPU
warn: (Previously declared as .cpu2.l2

Is L2 Cache shared by cluster implemented in this way?

[BobbyRBruce]

I believe the problem you are having here is you're connecting the l1_controller as a child SimObject to every CPU.

With few exceptions gem5 system design is a tree. Each SimObject can contain child SimObjects with each child also having their own child SimObjects. Most importantly, every SimObject has a one parent.

In this design you either want to:

1. Create a new l1_controller for each CPU.
2. Connect each CPU to single l1_controller via ports.

[yichungchen84]

comment out "cpu.l2 = l2_controller"