RV32 Dhrystone benchmark - Error: Syscall 403 out of range

[satishkumar2003]

Hello! My query consists of two parts. The first one being "How do I build gem5.opt for a RISC-V 32 simulation". The build I have done now is following a stack overflow solution wherein I made the following replacements:

RiscvISA.py  95: riscv_type = Param.RiscvType("RV32","RV32 or RV64") # RV64 --> RV32
RiscvISA.py 103: elen = Param.RiscvVectorElementLength(32, ....... ) # 64 --> 32

Following this replacement and build ( correct me if the build process was wrong ), I had cross-compiled a dhrystone benchmark (src: Fleker's Dhrystone benchmark) using riscv32-unknown-elf-gcc 13.1.0 as follows:

riscv32-unknown-elf-gcc -march=rv32gc -mabi=ilp32d -static -o dhrystone_rv32 dhrystone.c -lm -g

The simple-riscv.py config file in the learning_gem/part1 directory was updated with the new binary's location and was simulated. The simulation abruptly stops with a "fatal: Syscall 403 out of range" error

An observation I made was that the config file was setting up an SEWorkload which led me to look into the se_workload.cc file which had a SyscallDescTable for SEWorkload::SyscallABI32 containing many ID's and their respective command. The ID 403 was not present in this Table as well:

My objective is to run an RV32 simulation for the dhrystone benchmark. Please correct me on the build method if its incorrect and also information on the syscall error. Any help on this would be very helpful! Thank you in advance!