Adding implementation of CXL 3.1 to gem5

[ritaru]

Hello,

I see that there have been numerous attempts to implement CXL features to gem5, but none of them actually have made it to the release version.
With the help of gem5 developers, it would be feasible to implement latest CXL specifications to gem5.

This has to be validated by real hardware, preferably CXL-Ready systems like AMD Genoa or Intel Emerald Rapids, along with CXL type 3 memory expanders like this one. (Link)
Unfortunately, our lab cannot acquire those kind of devices. This is why I mentioned of other contributor's help.
Implementing CXL features and contributing them to gem5 would be a great help for the gem5 users needing this feature.

I plan to implement the specs incrementally, starting from CXL 1.1 to 2.0, then 2.0 to 3.1.

If you find this achievable, please, leave a comment.

Thank you.