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@SymbioticEDA Symbiotic EDA

@RafailDD
Rafail Dalakouras RafailDD
Digital Hardware Design Engineer
@nishit0072e
Nishit Bayen nishit0072e
VLSI || EMBEDDED SYSTEMS || COMPUTER ARCHITECTURE || DIGITAL ELECTRONICS

Dr. B.C. Roy Engineering College Durgapur, West Bengal, India

@birdluo
birdluo
@cocogab
Gab cocogab
Chief Attitude Officer @Fractal-Continuity Crashed @bucketmovie Ex. VC & sustainable finance. Science, action, and positive impact

@Fractal-Continuity

@ThinkHard002
ThinkHard ThinkHard002
@sdotd
sdotd
@shuvagataUF
Shuvagata Saha shuvagataUF
@Shanchuang666
刘善闯 Shanchuang666

超睿科技 Shanghai

@dac
David Chaves dac

Vancouver, BC, Canada

@lehaifeng000
lehaifeng000 lehaifeng000

China

@weikongwei
Wei Kong weikongwei
@easyformal
easyformal
@hariharan-tech
Hariharan A hariharan-tech
Tech and Programming freak
@fjpolo
Fran Co fjpolo
Embedded audio developer who works with QCC | HiFi platforms in C/C++, plays with FPGAs in Verilog and creates games in NESFab

Berlin

@Sichao-Yang
SichaoY Sichao-Yang
Formal Verification RD @ X-Epic, China
@mrz-gh
AmirrezaGh mrz-gh
@lee-man
LI Min lee-man
Building Silicon-Proven Verification Tools. Rejecting paper/胶片-only "breakthroughs". Ex. Huawei Engineer. @FORMiND-Lab

Southeast University Shenzhen

@mukullokhande99
Mukul mukullokhande99
@ovicenteguedes
Vicente Guedes ovicenteguedes
O povo completo será aquele que tiver reunido no seu máximo todas as qualidades e todos os defeitos. Coragem portugueses, só vos faltam as qualidades.

Portugal Futurista Portugal

@rmetchev
Robert M. rmetchev
@akshar001
Akshar Vastarpara akshar001
Building VEGG and Vicharak, Interested in Computers And Communications, Mathematics and Physics.

@vicharak-in @vegg-iot Surat

@gh-lxin
gh-lxin
@brrmorre
Bradley Morrell brrmorre
@jaaasooon222
jaaasooon222
@omasanori
Masanori Ogino omasanori

Japan

@AnttiLukats
Antti Lukats AnttiLukats
Electronics since 1979

@micro-FPGA Bünde, Germany

@kfeng123
电线杆 kfeng123
@loideyron
LAY loideyron
something, something, bug hunting.

Austria

@itsprashan
Prashant Gaurav itsprashan
B.tech in Electrical and Electronics Engineering . Design verification Enthusiastic.
@nx6110a5100
nx6110a5100
nothing important

@privattttttt in between

@Artityagi123456789
Arti Tyagi Artityagi123456789
B.tech with Electronic and Communication. commitment 👍 ✅100DaysofRTL ➡100Days Verification ➡15Daysof UVM

India

@antsmn
antsmn

Turin, Italy

@coderalai
coderalai
@midimaster21b
Joshua Edgcombe midimaster21b
FPGA Engineer that enjoys embedded development and free beer.

Plano, Texas

@zhaoyupenggit
Zhao YuPeng zhaoyupenggit
GitHub Launch！！！
@vigneshs-dev
Vignesh S vigneshs-dev
Be Happy by making everyone Happy!

MEL System and Services Chennai

@noodanee
noodanee

Alipay Hangzhou, China

@alaeddinelajili
Alaeddine Lajili alaeddinelajili
Software Engineer. Mainly focusing on EDA place and route techniques.

Siemens EDA MONASTIR

@lvyisu123
lvyisu123
@hyyu0512
hyyu0512
@anwerammar9
anwerammar anwerammar9
C++ software engineer with a passion for Linux development, compilers, and computer architecture

instadeep tunis

@RISC-Vduino
RISC-Vduino RISC-Vduino
RISC-Vduino Board is based on RISC-V Instruction set architecture design of open source hardware board，use open source software for product development，DIY demo

RISC-V MCU Community RISC-V MCU World

@lidapang
lidapang lidapang
6169637

Cadence shanghai

@ryuz
Ryuji Fuchikami (@Ryuz88) ryuz

Japan

@brightclark
yuanjinqiao brightclark
@Sensenzhl
SenSen Sensenzhl
@linhuan112
linhuan112

Shenzhen

@YisiZhong
altai YisiZhong
i'm a code faovter
@mitoksim
Timothy mitoksim
Engineering Profesional

California

@xtofalex
Christophe Alexandre xtofalex

keplertech.io Paris, France