-
Notifications
You must be signed in to change notification settings - Fork 7
/
ORPSoCv2.mw
190 lines (112 loc) · 9.01 KB
/
ORPSoCv2.mw
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
'''This version of ORPSoC is no longer actively developed by the core OpenRISC community. Details of the latest version can be found on the [[ORPSoC]] page.'''
== Introduction ==
ORPSoC is the OpenRISC Reference Platform System-on-Chip. This project implements a platform for OpenRISC development. It provides a reference SoC, primarily for the testing and development of OpenRISC processors, and a set of pre-built SoCs for various FPGA boards.
The project's structure makes it simple to develop (and contribute) an OpenRISC-based design for implementation on hardware.
== Download ORPSoC ==
The RTL source, test software and scripts can be downloaded from the OpenRISC project subversion (svn) repository. The sources can be checked out with the following command:
<nowiki>svn co http://opencores.org/ocsvn/openrisc/openrisc/trunk/orpsocv2</nowiki>
=== Pre-built FPGA Images ===
Pre-built images for certain boards are available from the [[FPGA Development Boards|FPGA development boards]] pages.
== Documentation ==
The main set of documentation is now in texinfo format and included with the project source.
To generate a PDF of the documentation, change into the doc/ path of the project and run the following:
./configure
make pdf
The texinfo and TeX processing tools are required to generate the documentation in PDF.
See the [[#Documentation_Utilities |section below]] for installation information.
== Supported Boards ==
There are board-specific builds of ORPSoC which should contain RTL and scripts enabling push-button synthesis and generation of programming files.
See the [[FPGA Development Boards|FPGA development boards]] page for information on supported boards.
If you succeed in porting ORPSoC to other hardware, we would greatly appreciate if the build were contributed for inclusion in ORPSoC.
== Installing required tools ==
There is a choice of three models to run the test software on. These are the architectural simulator, cycle-accurate and event-driven simulation models. Below are the instructions to install each of them. You need only install the tools for the model you wish to run. The GNU toolchain port is mandatory.
'''OpenRISC GNU toolchain port installation'''
Ensure the OpenRISC GNU toolchain port is installed on your system.
Please install the latest release candidate of the version 1.0 toolchain. Follow the guide on the [[OpenRISC GNU tool chain|GNU toolchain page]].
'''Architectural Simulator (or1ksim)'''
The tests included with ORPSoC's reference design can be run on the OpenRISC architectural simulator, or1ksim. See the [[or1ksim]] page for details on installation.
== Event-driven simulators ==
For the reference build of ORPSoC that is non-board targeted, Icarus Verilog is required. Board targets require Modelsim.
=== Icarus Verilog ===
[http://iverilog.icarus.com/ Icarus Verilog] is an open-source Verilog simulation tool. Their wiki has an extensive installation guide, but on most modern *nix distributions, such as Ubuntu or Debian, it can be easily installed by the system's package manager (apt, yum, emerge, etc.). The package is typically just called verilog. For instance, with apt under Ubuntu the installation command is:
<nowiki>sudo apt-get install verilog</nowiki>
However, if it is not available via the package manager on on your platform please see the Icarus Verilog project's installation guide.
=== Cycle-accurate simulator ===
This simulator is a cycle accurate C++ model generated from the Verilog HDL by [http://www.veripool.org/ Verilator]. A System C wrapper is placed on the model so other System C modules can be used with it. The scripts require Verilator, its supporting tools, and the System C libaries, be installed to generate this model.
Cycle-accurate model generation with Verilator
The tool which generates the C++ model is Verilator. It is a free and open source tool, developed and maintained by Wilson Snyder et al. at Veripool.org. The generated C++ uses the SystemC simulation kernel and libraries. It is compiled with your system's C++ compiler to create a standalone simulation executable.
'''Installation of Verilator and supporting libraries'''
Following are the SystemC library installation instructions. Next is instructions on installing the two supporting Perl libraries used by Verilator; Verilog-Perl and System-Perl. Lastly, Verilator itself is installed. The following instructions are expanded upon those contained at Veripool's Verilator page.
'''Installing the SystemC library'''
The SystemC library can be obtained from the [http://www.accellera.org/downloads/standards/systemc Accellera Systems Initiative ] (formerly Open SystemC Initiative, OSCI) website. The download page contains the link to download the core SystemC language and examples archive. Annoyingly, registration is required before downloading.
Once the package is downloaded and extracted, follow the provided README for full compilation and installation instructions.
A quick installation instruction list for most Linux platforms is provided below, starting in the systemc-x.x.x directory:
mkdir objdir; cd objdir
export CXX=g++
../configure
# Note that this configures the current location as the permanent location of the systemc library
make
make install
# Optionally....
make check
Add export SYSTEMC=/path/to/systemc-x.x.x to ~/.bashrc
'''Installing Verilog-Perl'''
Download the latest release of Verilog-Perl by visiting its [http://search.cpan.org/search?module=Verilog::Language CPAN] site.
Currently the latest release (3.400) can be downloaded from [http://search.cpan.org/CPAN/authors/id/W/WS/WSNYDER/Verilog-Perl-3.400.tar.gz here].
Extract it and follow the instructions in the include README file.
A quick installation instruction list for most Linux platforms is provided:
perl Makefile.PL
make
make test (optional)
sudo make install
'''Installing System-Perl'''
Download the latest release of Verilog-Perl by visiting its [http://search.cpan.org/search?module=Verilog::Language CPAN] site.
Currently the latest release (1.341) can be downloaded from [http://search.cpan.org/CPAN/authors/id/W/WS/WSNYDER/SystemPerl-1.341.tar.gz here].
Extract it and follow the instructions in the included README file. A quick installation instruction list for most Linux platforms is provided:
perl Makefile.PL
make
make test (optional)
sudo make install
Export the SYSTEMPERL environment variable in your shell startup script to point to the directory of this kit (the directory you ran <tt>make</tt> in). Eg for bash add something like <tt>export SYSTEMPERL=/path/to/SystemPerl-1.341</tt> to your ~/.bashrc file.
'''Installing Verilator'''
It is recommended Verilator is built and installed from source as follows:
<nowiki>git clone http://git.veripool.org/git/verilator</nowiki>
cd verilator
autoconf
./configure
make
sudo make install
Add export <tt>VERILATOR_ROOT=/path/to/verilator_kit</tt> to ~/.bashrc (where /path/to/verilator_kit is the directory you typed <tt>make</tt> in).
The SystemC model toolchain should now be ready to compile ORPSoC.
== Usage Guides ==
The following are links to guides for performing various tasks with ORPSoC. Please feel free to add your own and extend what is already available.
[[ORPSoC_RTL_simulation_debugging | ORPSoC RTL simulation debugging]]
[[ORPSoC_Board_Software_Debugging | ORPSoC software debugging on the board]]
== Documentation Utilities ==
The following tools are required to compile the documentation source in the project's doc/ path, generating a PDF.
'''Texinfo'''
The documentation is provided in texinfo source format. To compile it, the texinfo tools are required.
Under Ubuntu, use the following command to install the required packages:
sudo apt-get install texinfo
Under CentOS, Fedora and Red Hat use the following:
sudo yum install texinfo texinfo-tex
'''TeX'''
[http://www.tug.org/begin.html TeX] is a typesetting system. To generate a PDF from the texinfo documentation, some TeX processing software is required.
Under Ubuntu, use the following command to install the required packages:
sudo apt-get install texlive
Under CentOS, Fedora and Red Hat use the following:
sudo yum install texlive texlive-latex
'''Performing the tests'''
See the documentation in the project for running simulations of the system.
== Contributing ==
We ask contributors to get in touch with the developers via the [[OR1K:Community_Portal#Mailing_lists|mailing lists]], [[OR1K:Community_Portal#IRC|IRC]], or the [http://opencores.org/forum,OpenRISC forums] in that order.
== To Do ==
'''Note:''' As [[ORPSoCv3]] is now mature enough to use, it is recommend that work is done on it instead of ORPSoCv2.
:*Add ability to run or1ksim's test suite against reference design
:*Update tool install information - add it to project's texinfo docs
:*Add or1ksim configuration file for each board port
:*Add generic technology board port with some extra peripherals (ethernet, i2c, etc.) for demonstration purposes
:*Add section to documentation outlining basics of adding a new board port
:*More board ports
:*Complete peripheral support for existing board ports
:*Further OR1K software tests