Parameter to inform coprocessor about possible load/store exceptions?

[Silabs-ArjanB]

The possibility for a synchronous exception during the handling of offloaded loads/stores as desribed in https://docs.openhwgroup.org/projects/openhw-group-core-v-xif/x_ext.html#memory-request-response-interface) has a potentially significant impact on the coprocessor design and/or performance (e.g. consider an exception during an offloaded vector load instruction). We might want to add a (hardware compile time) parameter for coprocessors so that they can know if they are used in a context where such exceptions are possible (both 'yes' and 'no' would need to be supported by the coprocessor). A processor should simply document whether it can potentially generate exceptions during the handling of offloaded loads/stores or not.

It could also be considered to let the processor provide such information at run-time, but that seems overly complex.