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skvarkskvark
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fix patch file
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‎patches/patchOpenEXR

+22-282
Original file line numberDiff line numberDiff line change
@@ -1,288 +1,28 @@
11
diff -ruN opencv/3rdparty/openexr/IlmImf/ImfSystemSpecific.cpp opencv_patched/3rdparty/openexr/IlmImf/ImfSystemSpecific.cpp
2-
--- opencv/3rdparty/openexr/IlmImf/ImfSystemSpecific.cpp 2019-08-22 20:02:54.769176800 +0300
3-
+++ opencv_patched/3rdparty/openexr/IlmImf/ImfSystemSpecific.cpp 2019-08-23 14:31:17.103949100 +0300
4-
@@ -1,138 +1,146 @@
5-
-///////////////////////////////////////////////////////////////////////////
6-
-//
7-
-// Copyright (c) 2009-2014 DreamWorks Animation LLC.
8-
-//
9-
-// All rights reserved.
10-
-//
11-
-// Redistribution and use in source and binary forms, with or without
12-
-// modification, are permitted provided that the following conditions are
13-
-// met:
14-
-// * Redistributions of source code must retain the above copyright
15-
-// notice, this list of conditions and the following disclaimer.
16-
-// * Redistributions in binary form must reproduce the above
17-
-// copyright notice, this list of conditions and the following disclaimer
18-
-// in the documentation and/or other materials provided with the
19-
-// distribution.
20-
-// * Neither the name of DreamWorks Animation nor the names of
21-
-// its contributors may be used to endorse or promote products derived
22-
-// from this software without specific prior written permission.
23-
-//
24-
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25-
-// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26-
-// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27-
-// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28-
-// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29-
-// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30-
-// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31-
-// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32-
-// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33-
-// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34-
-// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35-
-//
36-
-///////////////////////////////////////////////////////////////////////////
37-
-
38-
-#include "ImfSimd.h"
39-
-#include "ImfSystemSpecific.h"
40-
-#include "ImfNamespace.h"
41-
-#include "OpenEXRConfig.h"
42-
-
43-
-OPENEXR_IMF_INTERNAL_NAMESPACE_SOURCE_ENTER
44-
-
45-
-namespace {
46-
-#if defined(IMF_HAVE_SSE2) && defined(__GNUC__) && !defined(__ANDROID__)
47-
-
48-
- // Helper functions for gcc + SSE enabled
49-
- void cpuid(int n, int &eax, int &ebx, int &ecx, int &edx)
50-
- {
2+
--- opencv/3rdparty/openexr/IlmImf/ImfSystemSpecific.cpp 2019-08-23 08:11:43.536117200 -0400
3+
+++ opencv_patched/3rdparty/openexr/IlmImf/ImfSystemSpecific.cpp 2019-08-23 08:16:58.337879800 -0400
4+
@@ -44,11 +44,19 @@
5+
// Helper functions for gcc + SSE enabled
6+
void cpuid(int n, int &eax, int &ebx, int &ecx, int &edx)
7+
{
518
- __asm__ __volatile__ (
529
- "cpuid"
5310
- : /* Output */ "=a"(eax), "=b"(ebx), "=c"(ecx), "=d"(edx)
5411
- : /* Input */ "a"(n)
5512
- : /* Clobber */);
56-
- }
57-
-
58-
-#else // IMF_HAVE_SSE2 && __GNUC__
59-
-
60-
- // Helper functions for generic compiler - all disabled
61-
- void cpuid(int n, int &eax, int &ebx, int &ecx, int &edx)
62-
- {
63-
- eax = ebx = ecx = edx = 0;
64-
- }
65-
-
66-
-#endif // IMF_HAVE_SSE2 && __GNUC__
67-
-
68-
-
69-
-#ifdef OPENEXR_IMF_HAVE_GCC_INLINE_ASM_AVX
70-
-
71-
- void xgetbv(int n, int &eax, int &edx)
72-
- {
73-
- __asm__ __volatile__ (
74-
- "xgetbv"
75-
- : /* Output */ "=a"(eax), "=d"(edx)
76-
- : /* Input */ "c"(n)
77-
- : /* Clobber */);
78-
- }
79-
-
80-
-#else // OPENEXR_IMF_HAVE_GCC_INLINE_ASM_AVX
81-
-
82-
- void xgetbv(int n, int &eax, int &edx)
83-
- {
84-
- eax = edx = 0;
85-
- }
86-
-
87-
-#endif // OPENEXR_IMF_HAVE_GCC_INLINE_ASM_AVX
88-
-
89-
-} // namespace
90-
-
91-
-CpuId::CpuId():
92-
- sse2(false),
93-
- sse3(false),
94-
- ssse3(false),
95-
- sse4_1(false),
96-
- sse4_2(false),
97-
- avx(false),
98-
- f16c(false)
99-
-{
100-
- bool osxsave = false;
101-
- int max = 0;
102-
- int eax, ebx, ecx, edx;
103-
-
104-
- cpuid(0, max, ebx, ecx, edx);
105-
- if (max > 0)
106-
- {
107-
- cpuid(1, eax, ebx, ecx, edx);
108-
- sse2 = ( edx & (1<<26) );
109-
- sse3 = ( ecx & (1<< 0) );
110-
- ssse3 = ( ecx & (1<< 9) );
111-
- sse4_1 = ( ecx & (1<<19) );
112-
- sse4_2 = ( ecx & (1<<20) );
113-
- osxsave = ( ecx & (1<<27) );
114-
- avx = ( ecx & (1<<28) );
115-
- f16c = ( ecx & (1<<29) );
116-
-
117-
- if (!osxsave)
118-
- {
119-
- avx = f16c = false;
120-
- }
121-
- else
122-
- {
123-
- xgetbv(0, eax, edx);
124-
- // eax bit 1 - SSE managed, bit 2 - AVX managed
125-
- if ((eax & 6) != 6)
126-
- {
127-
- avx = f16c = false;
128-
- }
129-
- }
130-
- }
131-
-
132-
-#if defined(IMF_HAVE_SSE2) && defined(__ANDROID__)
133-
- sse2 = true;
134-
- sse3 = true;
135-
-#ifdef __x86_64__
136-
- ssse3 = true;
137-
- sse4_1 = true;
138-
-#endif
139-
-#endif
140-
-}
141-
-
142-
-OPENEXR_IMF_INTERNAL_NAMESPACE_SOURCE_EXIT
143-
+///////////////////////////////////////////////////////////////////////////
144-
+//
145-
+// Copyright (c) 2009-2014 DreamWorks Animation LLC.
146-
+//
147-
+// All rights reserved.
148-
+//
149-
+// Redistribution and use in source and binary forms, with or without
150-
+// modification, are permitted provided that the following conditions are
151-
+// met:
152-
+// * Redistributions of source code must retain the above copyright
153-
+// notice, this list of conditions and the following disclaimer.
154-
+// * Redistributions in binary form must reproduce the above
155-
+// copyright notice, this list of conditions and the following disclaimer
156-
+// in the documentation and/or other materials provided with the
157-
+// distribution.
158-
+// * Neither the name of DreamWorks Animation nor the names of
159-
+// its contributors may be used to endorse or promote products derived
160-
+// from this software without specific prior written permission.
161-
+//
162-
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
163-
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
164-
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
165-
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
166-
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
167-
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
168-
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
169-
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
170-
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
171-
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
172-
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
173-
+//
174-
+///////////////////////////////////////////////////////////////////////////
175-
+
176-
+#include "ImfSimd.h"
177-
+#include "ImfSystemSpecific.h"
178-
+#include "ImfNamespace.h"
179-
+#include "OpenEXRConfig.h"
180-
+
181-
+OPENEXR_IMF_INTERNAL_NAMESPACE_SOURCE_ENTER
182-
+
183-
+namespace {
184-
+#if defined(IMF_HAVE_SSE2) && defined(__GNUC__) && !defined(__ANDROID__)
185-
+
186-
+ // Helper functions for gcc + SSE enabled
187-
+ void cpuid(int n, int &eax, int &ebx, int &ecx, int &edx)
188-
+ {
189-
+ #ifdef __i386__
190-
+ __asm__ __volatile__ (
191-
+ "pushl %%ebx; cpuid; movl %%ebx, %0; popl %%ebx"
192-
+ : /* Output */ "=m"(ebx), "=a"(eax), "=c"(ecx), "=d"(edx)
193-
+ : /* Input */ "a"(n)
194-
+ : /* Clobber */);
195-
+ #else
196-
+ __asm__ __volatile__ (
197-
+ "cpuid"
198-
+ : /* Output */ "=a"(eax), "=b"(ebx), "=c"(ecx), "=d"(edx)
199-
+ : /* Input */ "a"(n)
200-
+ : /* Clobber */);
201-
+ #endif
202-
+ }
203-
+
204-
+#else // IMF_HAVE_SSE2 && __GNUC__
205-
+
206-
+ // Helper functions for generic compiler - all disabled
207-
+ void cpuid(int n, int &eax, int &ebx, int &ecx, int &edx)
208-
+ {
209-
+ eax = ebx = ecx = edx = 0;
210-
+ }
211-
+
212-
+#endif // IMF_HAVE_SSE2 && __GNUC__
213-
+
214-
+
215-
+#ifdef OPENEXR_IMF_HAVE_GCC_INLINE_ASM_AVX
216-
+
217-
+ void xgetbv(int n, int &eax, int &edx)
218-
+ {
219-
+ __asm__ __volatile__ (
220-
+ "xgetbv"
221-
+ : /* Output */ "=a"(eax), "=d"(edx)
222-
+ : /* Input */ "c"(n)
223-
+ : /* Clobber */);
224-
+ }
225-
+
226-
+#else // OPENEXR_IMF_HAVE_GCC_INLINE_ASM_AVX
227-
+
228-
+ void xgetbv(int n, int &eax, int &edx)
229-
+ {
230-
+ eax = edx = 0;
231-
+ }
232-
+
233-
+#endif // OPENEXR_IMF_HAVE_GCC_INLINE_ASM_AVX
234-
+
235-
+} // namespace
236-
+
237-
+CpuId::CpuId():
238-
+ sse2(false),
239-
+ sse3(false),
240-
+ ssse3(false),
241-
+ sse4_1(false),
242-
+ sse4_2(false),
243-
+ avx(false),
244-
+ f16c(false)
245-
+{
246-
+ bool osxsave = false;
247-
+ int max = 0;
248-
+ int eax, ebx, ecx, edx;
249-
+
250-
+ cpuid(0, max, ebx, ecx, edx);
251-
+ if (max > 0)
252-
+ {
253-
+ cpuid(1, eax, ebx, ecx, edx);
254-
+ sse2 = ( edx & (1<<26) );
255-
+ sse3 = ( ecx & (1<< 0) );
256-
+ ssse3 = ( ecx & (1<< 9) );
257-
+ sse4_1 = ( ecx & (1<<19) );
258-
+ sse4_2 = ( ecx & (1<<20) );
259-
+ osxsave = ( ecx & (1<<27) );
260-
+ avx = ( ecx & (1<<28) );
261-
+ f16c = ( ecx & (1<<29) );
262-
+
263-
+ if (!osxsave)
264-
+ {
265-
+ avx = f16c = false;
266-
+ }
267-
+ else
268-
+ {
269-
+ xgetbv(0, eax, edx);
270-
+ // eax bit 1 - SSE managed, bit 2 - AVX managed
271-
+ if ((eax & 6) != 6)
272-
+ {
273-
+ avx = f16c = false;
274-
+ }
275-
+ }
276-
+ }
277-
+
278-
+#if defined(IMF_HAVE_SSE2) && defined(__ANDROID__)
279-
+ sse2 = true;
280-
+ sse3 = true;
281-
+#ifdef __x86_64__
282-
+ ssse3 = true;
283-
+ sse4_1 = true;
284-
+#endif
285-
+#endif
286-
+}
287-
+
288-
+OPENEXR_IMF_INTERNAL_NAMESPACE_SOURCE_EXIT
13+
+ #ifdef __i386__
14+
+ __asm__ __volatile__ (
15+
+ "pushl %%ebx; cpuid; movl %%ebx, %0; popl %%ebx"
16+
+ : /* Output */ "=m"(ebx), "=a"(eax), "=c"(ecx), "=d"(edx)
17+
+ : /* Input */ "a"(n)
18+
+ : /* Clobber */);
19+
+ #else
20+
+ __asm__ __volatile__ (
21+
+ "cpuid"
22+
+ : /* Output */ "=a"(eax), "=b"(ebx), "=c"(ecx), "=d"(edx)
23+
+ : /* Input */ "a"(n)
24+
+ : /* Clobber */);
25+
+ #endif
26+
}
27+
28+
#else // IMF_HAVE_SSE2 && __GNUC__

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