-
Notifications
You must be signed in to change notification settings - Fork 0
/
Copy pathcpu_8_opcode.s
144 lines (141 loc) · 3.89 KB
/
cpu_8_opcode.s
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
## This file contains routine for CHIP-8 instructions starting with
## nibble 8. The opcode is contained in rax.
.intel_syntax
.globl opcode_8
.globl load_jumptable_8
.include "macros.s"
.text
opcode_8:
mov %rcx, %rax
and %rcx, 0xF
mov %rcx, [jmptable8+%rcx*PTR_SIZE]
jmp %rcx
ld_8:
## LD Vx, Vy
ADDR_Vx # &Vx in rcx
LOAD_Vy # Vy in rdx
mov BYTE PTR [%rcx], %dl
ret
or_8:
## OR Vx, Vy
ADDR_Vx
mov %rdi, %rcx # &Vx in rdi
LOAD_Vx # Vx in rcx
LOAD_Vy # Vy in rdx
or %cl, %dl
mov BYTE PTR [%rdi], %cl
ret
and_8:
## AND Vx, Vy
ADDR_Vx
mov %rdi, %rcx # &Vx in rdi
LOAD_Vx # Vx in rcx
LOAD_Vy # Vy in rdx
and %cl, %dl
mov BYTE PTR [%rdi], %cl
ret
xor_8:
## XOR Vx, Vy
ADDR_Vx
mov %rdi, %rcx # &Vx in rdi
LOAD_Vx # Vx in rcx
LOAD_Vy # Vy in rdx
xor %cl, %dl
mov BYTE PTR [%rdi], %cl
ret
add_8:
## ADD Vx, Vy
ADDR_Vx
mov %rdi, %rcx # &Vx in rdi
LOAD_Vx # Vx in rcx
LOAD_Vy # Vy in rdx
add %cl, %dl
mov BYTE PTR [%rdi], %cl
## If overflows, write 1
jo return_f_1
jmp return_f_0
sub_8:
## SUB Vx, Vy
ADDR_Vx
mov %rdi, %rcx # &Vx in rdi
LOAD_Vx # Vx in rcx
LOAD_Vy # Vy in rdx
sub %cl, %dl
mov BYTE PTR [%rdi], %cl
jg return_f_1
jmp return_f_0
shr_8:
## SHR Vx
LOAD_Vx
mov %rdx, %rcx # Vx in rdx
ADDR_Vx # &Vx in rcx
shr %dl, 1
mov BYTE PTR [%rcx], %dl
jc return_f_1
jmp return_f_0
subn_8:
## SUBN Vx, Vy
ADDR_Vx
mov %rdi, %rcx # &Vx in rdi
LOAD_Vx # Vx in rcx
LOAD_Vy # Vy in rdx
xchg %rcx, %rdx
sub %cl, %dl
mov BYTE PTR [%rdi], %cl
jg return_f_1
jmp return_f_0
shl_8:
## SHL Vx, Vy
LOAD_Vx
mov %rdx, %rcx # Vx in rdx
ADDR_Vx # &Vx in rcx
shl %dl, 1
mov BYTE PTR [%rcx], %dl
jc return_f_1
return_f_0:
mov BYTE PTR [regs+0xF], 0
ret
return_f_1:
mov BYTE PTR [regs+0xF], 1
ret
load_jumptable_8:
push %rbp
mov %rbp, %rsp
lea %rax, ld_8
mov [jmptable8], %rax
lea %rax, or_8
mov [jmptable8+1*PTR_SIZE], %rax
lea %rax, and_8
mov [jmptable8+2*PTR_SIZE], %rax
lea %rax, xor_8
mov [jmptable8+3*PTR_SIZE], %rax
lea %rax, add_8
mov [jmptable8+4*PTR_SIZE], %rax
lea %rax, sub_8
mov [jmptable8+5*PTR_SIZE], %rax
lea %rax, shr_8
mov [jmptable8+6*PTR_SIZE], %rax
lea %rax, subn_8
mov [jmptable8+7*PTR_SIZE], %rax
lea %rax, unknown_opcode
mov [jmptable8+8*PTR_SIZE], %rax
lea %rax, unknown_opcode
mov [jmptable8+9*PTR_SIZE], %rax
lea %rax, unknown_opcode
mov [jmptable8+10*PTR_SIZE], %rax
lea %rax, unknown_opcode
mov [jmptable8+11*PTR_SIZE], %rax
lea %rax, unknown_opcode
mov [jmptable8+12*PTR_SIZE], %rax
lea %rax, unknown_opcode
mov [jmptable8+13*PTR_SIZE], %rax
lea %rax, shl_8
mov [jmptable8+14*PTR_SIZE], %rax
lea %rax, unknown_opcode
mov [jmptable8+15*PTR_SIZE], %rax
pop %rbp
ret
.data
jmptable8:
## See description of the jumptable in cpu.s
.space (0x10*PTR_SIZE)