Add nRF9280 SiP and board to NCS

CMakeLists.txt

@@ -1579,11 +1579,14 @@ endif()
 
 if(CONFIG_BUILD_OUTPUT_ADJUST_LMA)
   math(EXPR adjustment "${CONFIG_BUILD_OUTPUT_ADJUST_LMA}" OUTPUT_FORMAT DECIMAL)
+  set(args_adjustment ${CONFIG_BUILD_OUTPUT_ADJUST_LMA_SECTIONS})
+  list(TRANSFORM args_adjustment PREPEND $<TARGET_PROPERTY:bintools,elfconvert_flag_lma_adjust>)
+  list(TRANSFORM args_adjustment APPEND +${adjustment})
   list(APPEND
     post_build_commands
     COMMAND $<TARGET_PROPERTY:bintools,elfconvert_command>
             $<TARGET_PROPERTY:bintools,elfconvert_flag_final>
-            $<TARGET_PROPERTY:bintools,elfconvert_flag_lma_adjust>${adjustment}
+            ${args_adjustment}
             $<TARGET_PROPERTY:bintools,elfconvert_flag_infile>${KERNEL_ELF_NAME}
             $<TARGET_PROPERTY:bintools,elfconvert_flag_outfile>${KERNEL_ELF_NAME}
     )

Kconfig.zephyr

@@ -813,6 +813,23 @@ config BUILD_OUTPUT_ADJUST_LMA
 	    default "$(dt_chosen_reg_addr_hex,$(DT_CHOSEN_IMAGE_M4))-\
 	             $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))"
 
+config BUILD_OUTPUT_ADJUST_LMA_SECTIONS
+	def_string "*"
+	depends on BUILD_OUTPUT_ADJUST_LMA!=""
+	help
+	  This determines the output sections to which the above LMA adjustment
+	  will be applied.
+	  The value can be the name of a section in the final ELF, like "text".
+	  It can also be a pattern with wildcards, such as "*bss", which could
+	  match more than one section name. Multiple such patterns can be given
+	  as a ";"-separated list. It's possible to supply a 'negative' pattern
+	  starting with "!", to exclude sections matched by a preceding pattern.
+
+	  By default, all sections will have their LMA adjusted. The following
+	  example excludes one section produced by the code relocation feature:
+	  config BUILD_OUTPUT_ADJUST_LMA_SECTIONS
+	    default "*;!.extflash_text_reloc"
+
 config BUILD_OUTPUT_INFO_HEADER
 	bool "Create a image information header"
 	help

boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-memory_map.dtsi

@@ -127,7 +127,7 @@
 				status = "disabled";
 				#memory-region-cells = <0>;
 				zephyr,memory-region = "DMA_RAM21";
-				zephyr,memory-attr = <( DT_MEM_CACHEABLE )>;
+				zephyr,memory-attr = <( DT_MEM_DMA | DT_MEM_CACHEABLE )>;
 			};
 		};
 
@@ -171,6 +171,7 @@
 				status = "disabled";
 				#memory-region-cells = <0>;
 				zephyr,memory-region = "DMA_RAM3x_APP";
+				zephyr,memory-attr = <( DT_MEM_DMA )>;
 			};
 
 			cpurad_dma_region: memory@1e80 {
@@ -179,6 +180,7 @@
 				status = "disabled";
 				#memory-region-cells = <0>;
 				zephyr,memory-region = "DMA_RAM3x_RAD";
+				zephyr,memory-attr = <( DT_MEM_DMA )>;
 			};
 		};
 	};

boards/nordic/nrf9280pdk/Kconfig.defconfig

@@ -0,0 +1,24 @@
+# Copyright (c) 2024 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_NRF9280PDK_NRF9280_CPUAPP
+
+config BT_HCI_IPC
+	default y if BT
+
+endif # BOARD_NRF9280PDK_NRF9280_CPUAPP
+
+if BOARD_NRF9280PDK_NRF9280_CPURAD
+
+config BT_CTLR
+	default y if BT
+
+endif # BOARD_NRF9280PDK_NRF9280_CPURAD
+
+if BOARD_NRF9280PDK_NRF9280_CPUPPR
+
+# As PPR has limited memory most of tests does not fit with asserts enabled.
+config ASSERT
+	default n if ZTEST
+
+endif # BOARD_NRF9280PDK_NRF9280_CPUPPR

boards/nordic/nrf9280pdk/Kconfig.nrf9280pdk

@@ -0,0 +1,8 @@
+# Copyright (c) 2024 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_NRF9280PDK
+	select SOC_NRF9280_CPUAPP if BOARD_NRF9280PDK_NRF9280_CPUAPP
+	select SOC_NRF9280_CPURAD if BOARD_NRF9280PDK_NRF9280_CPURAD
+	select SOC_NRF9280_CPUPPR if BOARD_NRF9280PDK_NRF9280_CPUPPR || \
+				     BOARD_NRF9280PDK_NRF9280_CPUPPR_XIP

boards/nordic/nrf9280pdk/board.cmake

@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: Apache-2.0
+
+include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake)
+
+if(CONFIG_BOARD_NRF9280PDK_NRF9280_CPUAPP OR CONFIG_BOARD_NRF9280PDK_NRF9280_CPURAD)
+  if(CONFIG_BOARD_NRF9280PDK_NRF9280_CPUAPP)
+    set(JLINKSCRIPTFILE ${CMAKE_CURRENT_LIST_DIR}/support/nrf9280_cpuapp.JLinkScript)
+  else()
+    set(JLINKSCRIPTFILE ${CMAKE_CURRENT_LIST_DIR}/support/nrf9280_cpurad.JLinkScript)
+  endif()
+
+  board_runner_args(jlink "--device=CORTEX-M33" "--speed=4000" "--tool-opt=-jlinkscriptfile ${JLINKSCRIPTFILE}")
+  include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
+endif()

boards/nordic/nrf9280pdk/board.yml

@@ -0,0 +1,8 @@
+board:
+  name: nrf9280pdk
+  vendor: nordic
+  socs:
+  - name: nrf9280
+    variants:
+    - name: xip
+      cpucluster: cpuppr

boards/nordic/nrf9280pdk/doc/index.rst

@@ -0,0 +1,175 @@
+.. _nrf9280pdk_nrf9280:
+
+nRF9280 PDK
+###########
+
+Overview
+********
+
+.. note::
+
+   All software for the nRF9280 SiP is experimental and hardware availability
+   is restricted to the participants in the limited sampling program.
+
+The nRF9280 DK is a single-board development kit for evaluation and development
+on the Nordic nRF9280 System-in-Package (SiP).
+
+The nRF9280 is a multicore SiP with:
+
+* an Arm Cortex-M33 core with DSP instructions, FPU, and Armv8-M Security
+  Extensions, running at up to 320 MHz, referred to as the **application core**
+* an Arm Cortex-M33 core with DSP instructions, FPU, and Armv8-M Security
+  Extensions, running at up to 256 MHz, referred to as the **radio core**.
+
+The ``nrf9280pdk/nrf9280/cpuapp`` board target provides support for
+the application core on the nRF9280 SiP.
+The ``nrf9280pdk/nrf9280/cpurad`` board target provides support for
+the radio core on the nRF9280 SiP.
+The ``nrf9280pdk/nrf9280/cpuppr`` board target provides support for
+the PPR core on the nRF9280 SiP.
+
+nRF9280 SiP provides support for the following devices:
+
+* :abbr:`ADC (Analog to Digital Converter)`
+* CLOCK
+* :abbr:`GPIO (General Purpose Input Output)`
+* :abbr:`GRTC (Global real-time counter)`
+* :abbr:`I2C (Inter-Integrated Circuit)`
+* MRAM
+* :abbr:`PWM (Pulse Width Modulation)`
+* RADIO (Bluetooth Low Energy and 802.15.4)
+* :abbr:`SPI (Serial Peripheral Interface)`
+* :abbr:`UART (Universal asynchronous receiver-transmitter)`
+* :abbr:`USB (Universal Serial Bus)`
+* :abbr:`WDT (Watchdog Timer)`
+
+Hardware
+********
+
+nRF9280 DK has two crystal oscillators:
+
+* High-frequency 32 MHz crystal oscillator (HFXO)
+* Low-frequency 32.768 kHz crystal oscillator (LFXO)
+
+Supported Features
+==================
+
+The ``nrf9280pdk/nrf9280/cpuapp`` board target supports the following
+hardware features:
+
++-----------+------------+----------------------+
+| Interface | Controller | Driver/Component     |
++===========+============+======================+
+| GPIO      | on-chip    | gpio                 |
++-----------+------------+----------------------+
+| GRTC      | on-chip    | system clock         |
++-----------+------------+----------------------+
+| I2C(M)    | on-chip    | i2c                  |
++-----------+------------+----------------------+
+| PWM       | on-chip    | pwm                  |
++-----------+------------+----------------------+
+| SPI(M/S)  | on-chip    | spi                  |
++-----------+------------+----------------------+
+| UART      | on-chip    | serial               |
++-----------+------------+----------------------+
+| WDT       | on-chip    | watchdog             |
++-----------+------------+----------------------+
+
+The ``nrf9280pdk/nrf9280/cpurad`` board target supports the following
+hardware features:
+
++-----------+------------+----------------------+
+| Interface | Controller | Driver/Component     |
++===========+============+======================+
+| GPIO      | on-chip    | gpio                 |
++-----------+------------+----------------------+
+| GRTC      | on-chip    | system clock         |
++-----------+------------+----------------------+
+| I2C(M)    | on-chip    | i2c                  |
++-----------+------------+----------------------+
+| SPI(M/S)  | on-chip    | spi                  |
++-----------+------------+----------------------+
+| UART      | on-chip    | serial               |
++-----------+------------+----------------------+
+| WDT       | on-chip    | watchdog             |
++-----------+------------+----------------------+
+
+The ``nrf9280pdk/nrf9280/cpuppr`` board target supports the following
+hardware features:
+
++-----------+------------+----------------------+
+| Interface | Controller | Driver/Component     |
++===========+============+======================+
+| GPIO      | on-chip    | gpio                 |
++-----------+------------+----------------------+
+| GRTC      | on-chip    | system clock         |
++-----------+------------+----------------------+
+| I2C(M)    | on-chip    | i2c                  |
++-----------+------------+----------------------+
+| SPI(M/S)  | on-chip    | spi                  |
++-----------+------------+----------------------+
+| PWM       | on-chip    | pwm                  |
++-----------+------------+----------------------+
+
+Other hardware features have not been enabled yet for this board.
+
+Connections and IOs
+===================
+
+LEDs
+----
+
+* LED1 (green) = P9.02
+* LED2 (green) = P9.03
+* LED3 (green) = P9.04
+* LED4 (green) = P9.05
+
+Push buttons
+------------
+
+* BUTTON1 = P0.8
+* BUTTON2 = P0.9
+* BUTTON3 = P0.10
+* BUTTON4 = P0.11
+* RESET (SW1)
+
+Programming and Debugging
+*************************
+
+Applications for both the ``nrf9280pdk/nrf9280/cpuapp`` and
+``nrf9280pdk/nrf9280/cpurad`` board targets can be built, flashed,
+and debugged in the usual way. See :ref:`build_an_application`
+and :ref:`application_run` for more details on building and running.
+
+Flashing
+========
+
+As an example, this section shows how to build and flash the :ref:`hello_world`
+application.
+
+Follow the instructions in the :ref:`nordic_segger` page to install
+and configure all the necessary software. Further information can be
+found in :ref:`nordic_segger_flashing`.
+
+To build and program the sample to the nRF9280 DK, complete the following steps:
+
+1. Connect the nRF9280 DK to your computer using the IMCU USB port on the DK.
+#. Build the sample by running the following command:
+
+   .. zephyr-app-commands::
+      :zephyr-app: samples/hello_world
+      :board: nrf9280pdk/nrf9280/cpuapp
+      :goals: build flash
+
+Testing the LEDs and buttons in the nRF9280 DK
+***********************************************
+
+There are 2 samples that allow you to test that the buttons (switches) and LEDs
+on the board are working properly with Zephyr:
+
+* :zephyr:code-sample:`blinky`
+* :zephyr:code-sample:`button`
+
+You can build and flash the examples to make sure Zephyr is running correctly on
+your board. The button and LED definitions can be found in
+:zephyr_file:`boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280_cpuapp.dts`.

boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280-ipc_conf.dtsi

@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	ipc {
+		cpusec_cpuapp_ipc: ipc-1-2 {
+			compatible = "zephyr,ipc-icmsg";
+			status = "disabled";
+			mboxes = <&cpusec_bellboard 12>,
+				 <&cpuapp_bellboard 0>;
+		};
+
+		cpusec_cpurad_ipc: ipc-1-3 {
+			compatible = "zephyr,ipc-icmsg";
+			status = "disabled";
+			mboxes = <&cpusec_bellboard 18>,
+				 <&cpurad_bellboard 0>;
+		};
+
+		cpuapp_cpurad_ipc: ipc-2-3 {
+			compatible = "zephyr,ipc-icbmsg";
+			status = "disabled";
+			mboxes = <&cpuapp_bellboard 18>,
+				 <&cpurad_bellboard 12>;
+		};
+
+		cpuapp_cpusys_ipc: ipc-2-12 {
+			compatible = "zephyr,ipc-icmsg";
+			status = "disabled";
+			mboxes = <&cpuapp_bellboard 6>,
+				 <&cpusys_vevif 12>;
+		};
+
+		cpuapp_cpuppr_ipc: ipc-2-13 {
+			compatible = "zephyr,ipc-icmsg";
+			status = "disabled";
+			mboxes = <&cpuapp_bellboard 13>,
+				 <&cpuppr_vevif 12>;
+		};
+
+		cpurad_cpusys_ipc: ipc-3-12 {
+			compatible = "zephyr,ipc-icmsg";
+			status = "disabled";
+			mboxes = <&cpurad_bellboard 6>,
+				 <&cpusys_vevif 18>;
+		};
+	};
+};