From 421df3a357b3e92d1fdf1b17408bb7b1ea6bc2e6 Mon Sep 17 00:00:00 2001 From: Adam Wojasinski Date: Thu, 5 Oct 2023 09:09:30 +0200 Subject: [PATCH 01/12] [nrf fromtree] drivers: spi: spi_nrfx_spim: Include nrf_clock.h only for nRF5340 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The CLOCK HAL header is only needed for nRF5340 SoC. It's used when user wants to configure SPIM instance to 32 Mbps. The HAL checks if is running at 128 MHz as only then 32 Mbps is supported. Signed-off-by: Adam Wojasinski (cherry picked from commit e6bcc986bf2aef30936c4d9c518673ae3cfdfa1a) Signed-off-by: Andrzej Głąbek --- drivers/spi/spi_nrfx_spim.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi_nrfx_spim.c b/drivers/spi/spi_nrfx_spim.c index fb89f096cca..2b7407ed56c 100644 --- a/drivers/spi/spi_nrfx_spim.c +++ b/drivers/spi/spi_nrfx_spim.c @@ -11,8 +11,10 @@ #ifdef CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58 #include #endif -#include +#ifdef CONFIG_SOC_NRF5340_CPUAPP #include +#endif +#include #include #include From 76d83cfda0b35187473764812c6cb6a5806abfef Mon Sep 17 00:00:00 2001 From: Adam Wojasinski Date: Thu, 5 Oct 2023 09:15:24 +0200 Subject: [PATCH 02/12] [nrf fromtree] drivers: spi: spi_nrfx_spim: Add additional symbol check for frequency MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Some targets may not have `NRF_SPIM_HAS_32_MHZ_FREQ` or `NRF_SPIM_HAS_16_MHZ_FREQ` symbols but have `NRF_SPIM_HAS_PRESCALER` symbol defined. The symbol informs that target supports 32 MHz and 16 MHz frequencies for SPIM instances. Signed-off-by: Adam Wojasinski (cherry picked from commit 058eebe4797a1ba17a6a9cc2d3a449dddcfce6de) Signed-off-by: Andrzej Głąbek --- drivers/spi/spi_nrfx_spim.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi_nrfx_spim.c b/drivers/spi/spi_nrfx_spim.c index 2b7407ed56c..20aae46b8db 100644 --- a/drivers/spi/spi_nrfx_spim.c +++ b/drivers/spi/spi_nrfx_spim.c @@ -71,9 +71,9 @@ static inline uint32_t get_nrf_spim_frequency(uint32_t frequency) { /* Get the highest supported frequency not exceeding the requested one. */ - if (frequency >= MHZ(32) && NRF_SPIM_HAS_32_MHZ_FREQ) { + if (frequency >= MHZ(32) && (NRF_SPIM_HAS_32_MHZ_FREQ || NRF_SPIM_HAS_PRESCALER)) { return MHZ(32); - } else if (frequency >= MHZ(16) && NRF_SPIM_HAS_16_MHZ_FREQ) { + } else if (frequency >= MHZ(16) && (NRF_SPIM_HAS_16_MHZ_FREQ || NRF_SPIM_HAS_PRESCALER)) { return MHZ(16); } else if (frequency >= MHZ(8)) { return MHZ(8); From d6ed0343bbdd4b88ceb37350a20c68b497d7b364 Mon Sep 17 00:00:00 2001 From: Chaitanya Tata Date: Fri, 25 Aug 2023 18:27:52 +0530 Subject: [PATCH 03/12] [nrf fromtree] drivers: spi: spi_nrfx_spim: Use generic macro for RAM address check MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead of assuming only RAM is accessible by EasyDMA, use the generic DMA accessible function. Signed-off-by: Chaitanya Tata (cherry picked from commit 2c0f121727456f01422833b5e7b3ef2a29976a45) Signed-off-by: Andrzej Głąbek --- drivers/spi/spi_nrfx_spim.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi_nrfx_spim.c b/drivers/spi/spi_nrfx_spim.c index 20aae46b8db..acd99264099 100644 --- a/drivers/spi/spi_nrfx_spim.c +++ b/drivers/spi/spi_nrfx_spim.c @@ -315,7 +315,8 @@ static void transfer_next_chunk(const struct device *dev) nrfx_err_t result; const uint8_t *tx_buf = ctx->tx_buf; #if (CONFIG_SPI_NRFX_RAM_BUFFER_SIZE > 0) - if (spi_context_tx_buf_on(ctx) && !nrfx_is_in_ram(tx_buf)) { + if (spi_context_tx_buf_on(ctx) && + !nrf_dma_accessible_check(&dev_config->spim.p_reg, tx_buf)) { if (chunk_len > CONFIG_SPI_NRFX_RAM_BUFFER_SIZE) { chunk_len = CONFIG_SPI_NRFX_RAM_BUFFER_SIZE; } From d516f6f31f37e4f681a970fc3ef0fe6ee644ef65 Mon Sep 17 00:00:00 2001 From: Chaitanya Tata Date: Fri, 25 Aug 2023 17:45:17 +0530 Subject: [PATCH 04/12] [nrf fromtree] drivers: spim: Move the length check to beginning MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This check has to be done independent of whether RAM is used for buffers or not and depends on device maximum length property. Signed-off-by: Chaitanya Tata (cherry picked from commit 0a1eff8d97f88546d07d4f0715628ffe0f06aaf6) Signed-off-by: Andrzej Głąbek --- drivers/spi/spi_nrfx_spim.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi_nrfx_spim.c b/drivers/spi/spi_nrfx_spim.c index acd99264099..8a325097caa 100644 --- a/drivers/spi/spi_nrfx_spim.c +++ b/drivers/spi/spi_nrfx_spim.c @@ -314,6 +314,11 @@ static void transfer_next_chunk(const struct device *dev) nrfx_spim_xfer_desc_t xfer; nrfx_err_t result; const uint8_t *tx_buf = ctx->tx_buf; + + if (chunk_len > dev_config->max_chunk_len) { + chunk_len = dev_config->max_chunk_len; + } + #if (CONFIG_SPI_NRFX_RAM_BUFFER_SIZE > 0) if (spi_context_tx_buf_on(ctx) && !nrf_dma_accessible_check(&dev_config->spim.p_reg, tx_buf)) { @@ -325,10 +330,6 @@ static void transfer_next_chunk(const struct device *dev) tx_buf = dev_data->buffer; } #endif - if (chunk_len > dev_config->max_chunk_len) { - chunk_len = dev_config->max_chunk_len; - } - dev_data->chunk_len = chunk_len; xfer.p_tx_buffer = tx_buf; From 4cce3a9db787d5e57baf5d97265b7669418a3cd4 Mon Sep 17 00:00:00 2001 From: Marcin Szymczyk Date: Fri, 11 Mar 2022 12:26:24 +0100 Subject: [PATCH 05/12] [nrf fromtree] drivers: spi: nrfx: add dependency to PPI for PAN 58 on nRF52832 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit While enabling workaround for PAN 58 the PPI driver is used. This requires the nrfx PPI driver to be enabled thus CONFIG_NRFX_PPI Kconfig symbol needs to be set. Jira: NRFX-1616 Signed-off-by: Marcin Szymczyk (cherry picked from commit 2a38230a31c6ef6333444578bc7b5c7e6aad6c52) Signed-off-by: Andrzej Głąbek --- drivers/spi/Kconfig.nrfx | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/spi/Kconfig.nrfx b/drivers/spi/Kconfig.nrfx index c185efa9f8f..611bad822b2 100644 --- a/drivers/spi/Kconfig.nrfx +++ b/drivers/spi/Kconfig.nrfx @@ -54,6 +54,7 @@ config SPI_NRFX_SPIS config SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58 depends on SOC_NRF52832 + select NRFX_PPI bool "Allow enabling the SPIM driver despite PAN 58" help Allow enabling the nRF SPI Master with EasyDMA, despite From dd4c8908c609fb471f53df157c570d7754fb4e3f Mon Sep 17 00:00:00 2001 From: Adam Wojasinski Date: Fri, 22 Oct 2021 16:40:18 +0200 Subject: [PATCH 06/12] [nrf fromtree] drivers: spi: spi_nrfx_spim: Add support for RX buffer from RAM region MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch adds support for RX buffer placed by a linker in memory region defined in SPIM devicetree node. The buffer is placed in memory region defined as devicetree node. The memory region node's reference is then stored in `memory-regions` property of SPIM node. Added build time assertion to check if `CONFIG_SPI_NRFX_RAM_BUFFER_SIZE` Kconfig symbol has value greater than 0 when given SPIM node has `memory-region` property. Signed-off-by: Adam Wojasinski (cherry picked from commit ae75a8f73a583967354987be682d9c88c1cad6f5) Signed-off-by: Andrzej Głąbek --- drivers/spi/spi_nrfx_spim.c | 45 +++++++++++++++++++++++++++++-------- 1 file changed, 36 insertions(+), 9 deletions(-) diff --git a/drivers/spi/spi_nrfx_spim.c b/drivers/spi/spi_nrfx_spim.c index 8a325097caa..95b737d6cf5 100644 --- a/drivers/spi/spi_nrfx_spim.c +++ b/drivers/spi/spi_nrfx_spim.c @@ -41,8 +41,9 @@ struct spi_nrfx_data { size_t chunk_len; bool busy; bool initialized; -#if SPI_BUFFER_IN_RAM - uint8_t *buffer; +#ifdef SPI_BUFFER_IN_RAM + uint8_t *tx_buffer; + uint8_t *rx_buffer; #endif #ifdef CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58 bool anomaly_58_workaround_active; @@ -314,27 +315,40 @@ static void transfer_next_chunk(const struct device *dev) nrfx_spim_xfer_desc_t xfer; nrfx_err_t result; const uint8_t *tx_buf = ctx->tx_buf; + uint8_t *rx_buf = ctx->rx_buf; if (chunk_len > dev_config->max_chunk_len) { chunk_len = dev_config->max_chunk_len; } -#if (CONFIG_SPI_NRFX_RAM_BUFFER_SIZE > 0) +#ifdef SPI_BUFFER_IN_RAM if (spi_context_tx_buf_on(ctx) && !nrf_dma_accessible_check(&dev_config->spim.p_reg, tx_buf)) { + if (chunk_len > CONFIG_SPI_NRFX_RAM_BUFFER_SIZE) { chunk_len = CONFIG_SPI_NRFX_RAM_BUFFER_SIZE; } - memcpy(dev_data->buffer, tx_buf, chunk_len); - tx_buf = dev_data->buffer; + memcpy(dev_data->tx_buffer, tx_buf, chunk_len); + tx_buf = dev_data->tx_buffer; + } + + if (spi_context_rx_buf_on(ctx) && + !nrf_dma_accessible_check(&dev_config->spim.p_reg, rx_buf)) { + + if (chunk_len > CONFIG_SPI_NRFX_RAM_BUFFER_SIZE) { + chunk_len = CONFIG_SPI_NRFX_RAM_BUFFER_SIZE; + } + + rx_buf = dev_data->rx_buffer; } #endif + dev_data->chunk_len = chunk_len; xfer.p_tx_buffer = tx_buf; xfer.tx_length = spi_context_tx_buf_on(ctx) ? chunk_len : 0; - xfer.p_rx_buffer = ctx->rx_buf; + xfer.p_rx_buffer = rx_buf; xfer.rx_length = spi_context_rx_buf_on(ctx) ? chunk_len : 0; #ifdef CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58 @@ -378,6 +392,15 @@ static void event_handler(const nrfx_spim_evt_t *p_event, void *p_context) #ifdef CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58 anomaly_58_workaround_clear(dev_data); +#endif +#ifdef SPI_BUFFER_IN_RAM + if (spi_context_rx_buf_on(&dev_data->ctx) && + p_event->xfer_desc.p_rx_buffer != NULL && + p_event->xfer_desc.p_rx_buffer != dev_data->ctx.rx_buf) { + (void)memcpy(dev_data->ctx.rx_buf, + dev_data->rx_buffer, + dev_data->chunk_len); + } #endif spi_context_update_tx(&dev_data->ctx, 1, dev_data->chunk_len); spi_context_update_rx(&dev_data->ctx, 1, dev_data->chunk_len); @@ -606,7 +629,10 @@ static int spi_nrfx_init(const struct device *dev) nrfx_isr, nrfx_spim_##idx##_irq_handler, 0); \ } \ IF_ENABLED(SPI_BUFFER_IN_RAM, \ - (static uint8_t spim_##idx##_buffer \ + (static uint8_t spim_##idx##_tx_buffer \ + [CONFIG_SPI_NRFX_RAM_BUFFER_SIZE] \ + SPIM_MEMORY_SECTION(idx); \ + static uint8_t spim_##idx##_rx_buffer \ [CONFIG_SPI_NRFX_RAM_BUFFER_SIZE] \ SPIM_MEMORY_SECTION(idx);)) \ static struct spi_nrfx_data spi_##idx##_data = { \ @@ -614,7 +640,8 @@ static int spi_nrfx_init(const struct device *dev) SPI_CONTEXT_INIT_SYNC(spi_##idx##_data, ctx), \ SPI_CONTEXT_CS_GPIOS_INITIALIZE(SPIM(idx), ctx) \ IF_ENABLED(SPI_BUFFER_IN_RAM, \ - (.buffer = spim_##idx##_buffer,)) \ + (.tx_buffer = spim_##idx##_tx_buffer, \ + .rx_buffer = spim_##idx##_rx_buffer,)) \ .dev = DEVICE_DT_GET(SPIM(idx)), \ .busy = false, \ }; \ @@ -643,7 +670,7 @@ static int spi_nrfx_init(const struct device *dev) WAKE_PIN_NOT_USED), \ .wake_gpiote = WAKE_GPIOTE_INSTANCE(SPIM(idx)), \ }; \ - BUILD_ASSERT(!DT_NODE_HAS_PROP(SPIM(idx), wake_gpios) || \ + BUILD_ASSERT(!SPIM_HAS_PROP(idx, wake_gpios) || \ !(DT_GPIO_FLAGS(SPIM(idx), wake_gpios) & GPIO_ACTIVE_LOW),\ "WAKE line must be configured as active high"); \ PM_DEVICE_DT_DEFINE(SPIM(idx), spim_nrfx_pm_action); \ From b807f19bdd7122f29ed1fc703132c08e6e2afdb3 Mon Sep 17 00:00:00 2001 From: Adam Wojasinski Date: Thu, 16 Nov 2023 12:22:08 +0100 Subject: [PATCH 07/12] [nrf fromtree] drivers: spi: nrfx: Update doc for RAM_BUFFER_SIZE Kconfig symbol MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Update documentation for SPI_NRFX_RAM_BUFFER_SIZE Kconfig symbol to reflect new usage of it. Now the symbol specifies size of RX buffer. The change introducing support for RX buffer placed by a linker in memory region defined in SPIM devicetree node is in a parent commit of that one. Signed-off-by: Adam Wojasinski (cherry picked from commit c88b492842b3021efeb42dd181406c9b30c07c44) Signed-off-by: Andrzej Głąbek --- drivers/spi/Kconfig.nrfx | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/spi/Kconfig.nrfx b/drivers/spi/Kconfig.nrfx index 611bad822b2..0ee1c03065b 100644 --- a/drivers/spi/Kconfig.nrfx +++ b/drivers/spi/Kconfig.nrfx @@ -75,14 +75,20 @@ config SPI_NRFX_RAM_BUFFER_SIZE default 8 depends on SPI_NRFX_SPIM help - SPIM peripherals cannot transmit data directly from flash. Therefore, - a buffer in RAM needs to be provided for each instance of SPI driver - using SPIM peripheral, so that the driver can copy there a chunk of - data from flash and transmit it. - The size is specified in bytes. A size of 0 means that this feature - should be disabled, and the application must then take care of not - supplying buffers located in flash to the driver, otherwise such - transfers will fail. + Because of using EasyDMA, SPIM peripherals cannot use transmit and + receive buffers from all memory locations. They are restricted to + buffers located in certain RAM memories only. Therefore, each SPIM + driver instance needs to use an intermediate local RAM buffer, + to transfer data in chunks not exceeding the size of that buffer, + and to copy those chunks between the local buffer and the one + specified in the transfer request if the latter is not accessible + by EasyDMA. + + This option specifies the size in bytes of such local RAM buffers + for both TX and RX paths. A size of 0 means that this feature should + be disabled and the driver user must take care of not making transfer + requests with buffers not accessible by EasyDMA since such transfers + will fail. config SPI_NRFX_WAKE_TIMEOUT_US int "Maximum time to wait for SPI slave to wake up" From cff933e2dde1343daf4bea4e60215b66a50ce5e8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andrzej=20G=C5=82=C4=85bek?= Date: Tue, 28 Nov 2023 13:05:59 +0100 Subject: [PATCH 08/12] [nrf fromtree] soc: nrf53: Add implementation of workaround for anomaly 168 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use the already available in the tree mechanism of adding assembly instructions right after WFI/WFE to implement the workaround for nRF5340 anomaly 168 (replace the 4 NOP solution used on the network core as it turned out to be insufficient) and provide two related Kconfig options so that users are able to adjust the workaround to their actual needs (disable it entirely or use it in the extended version). Signed-off-by: Andrzej Głąbek (cherry picked from commit 23e15c480ac85ae450fc99e9a75cf04e3f188931) --- soc/arm/nordic_nrf/nrf53/Kconfig.soc | 22 +++++++++++++++++++++- soc/arm/nordic_nrf/nrf53/soc_cpu_idle.h | 10 ++++++++-- 2 files changed, 29 insertions(+), 3 deletions(-) diff --git a/soc/arm/nordic_nrf/nrf53/Kconfig.soc b/soc/arm/nordic_nrf/nrf53/Kconfig.soc index f72ae5ab004..b3ca2661675 100644 --- a/soc/arm/nordic_nrf/nrf53/Kconfig.soc +++ b/soc/arm/nordic_nrf/nrf53/Kconfig.soc @@ -12,13 +12,14 @@ config SOC_NRF5340_CPUAPP select HAS_POWEROFF select SOC_COMPATIBLE_NRF5340_CPUAPP imply SOC_NRF53_RTC_PRETICK + imply SOC_NRF53_ANOMALY_168_WORKAROUND config SOC_NRF5340_CPUNET bool - select ARM_ON_EXIT_CPU_IDLE select SOC_COMPATIBLE_NRF5340_CPUNET imply SOC_NRF53_ANOMALY_160_WORKAROUND_NEEDED imply SOC_NRF53_RTC_PRETICK if !WDT_NRFX + imply SOC_NRF53_ANOMALY_168_WORKAROUND choice prompt "nRF53x MCU Selection" @@ -79,6 +80,25 @@ config SOC_NRF53_RTC_PRETICK_IPC_CH_TO_NET endif +config SOC_NRF53_ANOMALY_168_WORKAROUND + bool "Workaround for nRF5340 anomaly 168" + select ARM_ON_EXIT_CPU_IDLE + help + Indicates that the workaround for the anomaly 168 that affects + the nRF5340 SoC should be applied. + The workaround involves execution of 8 NOP instructions when the CPU + exist its idle state (when the WFI/WFE instruction returns) and it is + enabled by default for both the application and network core. + +config SOC_NRF53_ANOMALY_168_WORKAROUND_FOR_EXECUTION_FROM_RAM + bool "Extend the workaround to execution at 128 MHz from RAM" + depends on SOC_NRF53_ANOMALY_168_WORKAROUND && SOC_NRF5340_CPUAPP + help + Indicates that the anomaly 168 workaround is to be extended to cover + also a specific case when the WFI/WFE instruction is executed at 128 + MHz from RAM. Then, 26 instead of 8 NOP instructions needs to be + executed after WFI/WFE. This extension is not enabled by default. + if SOC_NRF5340_CPUAPP config SOC_DCDC_NRF53X_APP diff --git a/soc/arm/nordic_nrf/nrf53/soc_cpu_idle.h b/soc/arm/nordic_nrf/nrf53/soc_cpu_idle.h index b6cd92ca092..dcb0c73d068 100644 --- a/soc/arm/nordic_nrf/nrf53/soc_cpu_idle.h +++ b/soc/arm/nordic_nrf/nrf53/soc_cpu_idle.h @@ -11,10 +11,16 @@ #if defined(_ASMLANGUAGE) +#if defined(CONFIG_SOC_NRF53_ANOMALY_168_WORKAROUND_FOR_EXECUTION_FROM_RAM) #define SOC_ON_EXIT_CPU_IDLE \ + .rept 26 \ nop; \ + .endr +#elif defined(CONFIG_SOC_NRF53_ANOMALY_168_WORKAROUND) +#define SOC_ON_EXIT_CPU_IDLE \ + .rept 8 \ nop; \ - nop; \ - nop; + .endr +#endif #endif /* _ASMLANGUAGE */ From 63221af0940d4ac943830157c9b738b7853b3bd5 Mon Sep 17 00:00:00 2001 From: Ben Wolsieffer Date: Sat, 30 Dec 2023 15:45:44 -0500 Subject: [PATCH 09/12] [nrf fromtree] soc: nrf53: fix building anomaly 168 workaround MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit With GCC 12.3 and binutils 2.40, the build fails with: <...>/zephyr/arch/arm/core/cortex_m/cpu_idle.S: Assembler messages: <...>/zephyr/arch/arm/core/cortex_m/cpu_idle.S:51: Error: junk at end of line, first unrecognized character is `n' <...>/zephyr/arch/arm/core/cortex_m/cpu_idle.S:133: Info: macro invoked from here Because the SOC_ON_EXIT_CPU_IDLE macro puts all the statements on a single line, there must be a semicolon after .rept Signed-off-by: Ben Wolsieffer (cherry picked from commit 37352d3d2993f02b26b027b1a3bde11ab2254319) Signed-off-by: Andrzej Głąbek --- soc/arm/nordic_nrf/nrf53/soc_cpu_idle.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/soc/arm/nordic_nrf/nrf53/soc_cpu_idle.h b/soc/arm/nordic_nrf/nrf53/soc_cpu_idle.h index dcb0c73d068..c02c9451419 100644 --- a/soc/arm/nordic_nrf/nrf53/soc_cpu_idle.h +++ b/soc/arm/nordic_nrf/nrf53/soc_cpu_idle.h @@ -13,12 +13,12 @@ #if defined(CONFIG_SOC_NRF53_ANOMALY_168_WORKAROUND_FOR_EXECUTION_FROM_RAM) #define SOC_ON_EXIT_CPU_IDLE \ - .rept 26 \ + .rept 26; \ nop; \ .endr #elif defined(CONFIG_SOC_NRF53_ANOMALY_168_WORKAROUND) #define SOC_ON_EXIT_CPU_IDLE \ - .rept 8 \ + .rept 8; \ nop; \ .endr #endif From 97651752fd6afa9ffe8294caf4b19f0e628ca45c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andrzej=20G=C5=82=C4=85bek?= Date: Fri, 5 Jan 2024 10:26:59 +0100 Subject: [PATCH 10/12] [nrf fromtree] drivers: spi: nrfx: Deactivate CS from thread context MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit ... so that it is possible to use a GPIO expander pin as the CS line. Communication with the expander may involve an operation that cannot be done from the interrupt context (e.g. an I2C transaction). Signed-off-by: Andrzej Głąbek (cherry picked from commit db4344b6591c8a0477d15ebd892a5ccd1d13b1b9) --- drivers/spi/spi_nrfx_spi.c | 4 ++-- drivers/spi/spi_nrfx_spim.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi_nrfx_spi.c b/drivers/spi/spi_nrfx_spi.c index 04d7853d11d..752132fb248 100644 --- a/drivers/spi/spi_nrfx_spi.c +++ b/drivers/spi/spi_nrfx_spi.c @@ -161,8 +161,6 @@ static void finish_transaction(const struct device *dev, int error) struct spi_nrfx_data *dev_data = dev->data; struct spi_context *ctx = &dev_data->ctx; - spi_context_cs_control(ctx, false); - LOG_DBG("Transaction finished with status %d", error); spi_context_complete(ctx, dev, error); @@ -277,6 +275,8 @@ static int transceive(const struct device *dev, /* Clean up the driver state. */ k_sem_reset(&dev_data->ctx.sync); } + + spi_context_cs_control(&dev_data->ctx, false); } spi_context_release(&dev_data->ctx, error); diff --git a/drivers/spi/spi_nrfx_spim.c b/drivers/spi/spi_nrfx_spim.c index 95b737d6cf5..08012b389c5 100644 --- a/drivers/spi/spi_nrfx_spim.c +++ b/drivers/spi/spi_nrfx_spim.c @@ -294,8 +294,6 @@ static void finish_transaction(const struct device *dev, int error) struct spi_nrfx_data *dev_data = dev->data; struct spi_context *ctx = &dev_data->ctx; - spi_context_cs_control(ctx, false); - LOG_DBG("Transaction finished with status %d", error); spi_context_complete(ctx, dev, error); @@ -470,6 +468,8 @@ static int transceive(const struct device *dev, anomaly_58_workaround_clear(dev_data); #endif } + + spi_context_cs_control(&dev_data->ctx, false); } spi_context_release(&dev_data->ctx, error); From 2b6c70c88a0ea09034987c14a3ad231c406b6305 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Krzysztof=20Chru=C5=9Bci=C5=84ski?= Date: Wed, 31 Jan 2024 08:11:21 +0100 Subject: [PATCH 11/12] [nrf fromtree] drivers: serial: Fix async to interrupt driven adaptation layer MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Whenever UART_RX_DISABLED event is received module attempts to re-enable receiver since in interrupt driven API receiver is always on. However, it is possible that there is no free buffers and in that case attempt to enable the receiver will fail with -EBUSY. That scenario shall be accepted since the receiver will be re-enabled when at least one buffer will be freed. Given that, -EBUSY return shall be accepted (no assert) and number of pending RX buffer requests shall be reset only on successful enabling. Signed-off-by: Krzysztof Chruściński (cherry picked from commit f6ecad20a1e7ee3c52116cd46c93ac72eccdd3c8) Signed-off-by: Andrzej Głąbek --- drivers/serial/uart_async_to_irq.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/serial/uart_async_to_irq.c b/drivers/serial/uart_async_to_irq.c index 209e8d4f205..e18536449f3 100644 --- a/drivers/serial/uart_async_to_irq.c +++ b/drivers/serial/uart_async_to_irq.c @@ -105,12 +105,15 @@ static void on_rx_buf_req(const struct device *dev, static void on_rx_dis(const struct device *dev, struct uart_async_to_irq_data *data) { if (data->flags & A2I_RX_ENABLE) { - data->rx.pending_buf_req = 0; + int err; - int err = try_rx_enable(dev, data); + err = try_rx_enable(dev, data); + if (err == 0) { + data->rx.pending_buf_req = 0; + } LOG_INST_DBG(get_config(dev)->log, "Reenabling RX from RX_DISABLED (err:%d)", err); - __ASSERT_NO_MSG(err >= 0); + __ASSERT((err >= 0) || (err == -EBUSY), "err: %d", err); return; } From 2301480beeb042de258349a20fb6dd3f55c93e97 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Krzysztof=20Chru=C5=9Bci=C5=84ski?= Date: Tue, 6 Feb 2024 13:15:34 +0100 Subject: [PATCH 12/12] [nrf fromtree] drivers: serial: nrfx_uarte: Fix misbehavior due to preemption MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit UART_RX_RDY event can be generated from UARTE interrupt or k_timer handler. When ENDRX event occurs then k_timer is stopped (it can be restarted if there is another buffer provided). However, if UARTE interrupt priority is higher than k_timer priority (RTC is used underneath) then k_timer handler may still be executed later. K_timer notifies new bytes based on RXDRDY HW event which is counter by the TIMER (using PPI). It may happen that RXDRDY event arrives due to byte received into RX FIFO but since there is not buffer provided it stays in that FIFO. Given all this, it was possible that RX_RDY event was reported from ENDRX UARTE event, timer was stopped but because UARTE interrupt had higher priority timer handler is executed after UARTE interrupt is handled. In timer handler TIMER counter reports more bytes and calls UART_RX_RDY event with null buffer and non-zero amount of bytes. Fixed by generating UART_RX_RDY event only if RX buffer is not null. Signed-off-by: Krzysztof Chruściński (cherry picked from commit 5db338c035fc3cb246e09ba2d2290369a17d9661) Signed-off-by: Andrzej Głąbek --- drivers/serial/uart_nrfx_uarte.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/serial/uart_nrfx_uarte.c b/drivers/serial/uart_nrfx_uarte.c index 3a62057a47a..6e1ecfadfd8 100644 --- a/drivers/serial/uart_nrfx_uarte.c +++ b/drivers/serial/uart_nrfx_uarte.c @@ -1043,9 +1043,11 @@ static void rx_timeout(struct k_timer *timer) (data->async->rx_timeout_left < data->async->rx_timeout_slab)) { /* rx_timeout us elapsed since last receiving */ - notify_uart_rx_rdy(dev, len); - data->async->rx_offset += len; - data->async->rx_total_user_byte_cnt += len; + if (data->async->rx_buf != NULL) { + notify_uart_rx_rdy(dev, len); + data->async->rx_offset += len; + data->async->rx_total_user_byte_cnt += len; + } } else { data->async->rx_timeout_left -= data->async->rx_timeout_slab;