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[nrf fromtree] boards nrf54l15bsim: Do not work around peripheral clo…
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…ck issue

In 923d313 the clock frequency in DTS
for the UART00 was fixed, but not for the simulated target. This was
likely due to the HW models modeling it as 16MHz instead of 128MHz for
this particular one as it is in reality.

Now that the HW models have been fixed, let's let this clock be
configured like for real HW.

Signed-off-by: Alberto Escolar Piedras <[email protected]>
(cherry picked from commit 5e7df92082ccb084ba13c2abf98f8512a00ad192)
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aescolar authored and nordic-pikr committed Feb 19, 2025
1 parent 4c5bfd7 commit acfa3ff
Showing 1 changed file with 0 additions and 4 deletions.
4 changes: 0 additions & 4 deletions boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.dts
Original file line number Diff line number Diff line change
Expand Up @@ -84,10 +84,6 @@
};
};

&uart00 {
/delete-property/ clocks;
};

&uart20 {
status = "okay";
current-speed = <115200>;
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