From 341841ecd03ed93cff8cf6fb681875215ebe7c92 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Ku=C5=BAnia?= <rafal.kuznia@nordicsemi.no>
Date: Thu, 28 Nov 2024 14:29:23 +0100
Subject: [PATCH] [nrf fromtree] soc: nordic: enable DPPI and PPIB nodes by
 default
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The DPPI and PPIB peripheral nodes must be enabled to allow the
CONFIG_HAS_HW_NRF_DPPIC to be set. This change is consistent with what
was done on nRF5340 and does not introduce any additional memory
overhead, because there is no Zephyr driver behind the nrf-dppic and
nrf-ppib bindings.

Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
(cherry picked from commit d890cfd8180ee033deead6bb208c12e5a777d85a)
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
---
 dts/arm/nordic/nrf54l20_enga_cpuapp.dtsi   | 48 ++++++++++++++++++++++
 dts/arm/nordic/nrf54l_05_10_15_cpuapp.dtsi | 48 ++++++++++++++++++++++
 2 files changed, 96 insertions(+)

diff --git a/dts/arm/nordic/nrf54l20_enga_cpuapp.dtsi b/dts/arm/nordic/nrf54l20_enga_cpuapp.dtsi
index d8fffc93808..1444be3b57b 100644
--- a/dts/arm/nordic/nrf54l20_enga_cpuapp.dtsi
+++ b/dts/arm/nordic/nrf54l20_enga_cpuapp.dtsi
@@ -49,3 +49,51 @@ nvic: &cpuapp_nvic {};
 &gpiote30 {
 	interrupts = <269 NRF_DEFAULT_IRQ_PRIORITY>;
 };
+
+&dppic00 {
+	status = "okay";
+};
+
+&dppic10 {
+	status = "okay";
+};
+
+&dppic20 {
+	status = "okay";
+};
+
+&dppic30 {
+	status = "okay";
+};
+
+&ppib00 {
+	status = "okay";
+};
+
+&ppib01 {
+	status = "okay";
+};
+
+&ppib10 {
+	status = "okay";
+};
+
+&ppib11 {
+	status = "okay";
+};
+
+&ppib20 {
+	status = "okay";
+};
+
+&ppib21 {
+	status = "okay";
+};
+
+&ppib22 {
+	status = "okay";
+};
+
+&ppib30 {
+	status = "okay";
+};
diff --git a/dts/arm/nordic/nrf54l_05_10_15_cpuapp.dtsi b/dts/arm/nordic/nrf54l_05_10_15_cpuapp.dtsi
index 2de29fcdbd2..d90dd3dd7d6 100644
--- a/dts/arm/nordic/nrf54l_05_10_15_cpuapp.dtsi
+++ b/dts/arm/nordic/nrf54l_05_10_15_cpuapp.dtsi
@@ -85,3 +85,51 @@ nvic: &cpuapp_nvic {};
 	interrupts = <269 NRF_DEFAULT_IRQ_PRIORITY>;
 #endif
 };
+
+&dppic00 {
+	status = "okay";
+};
+
+&dppic10 {
+	status = "okay";
+};
+
+&dppic20 {
+	status = "okay";
+};
+
+&dppic30 {
+	status = "okay";
+};
+
+&ppib00 {
+	status = "okay";
+};
+
+&ppib01 {
+	status = "okay";
+};
+
+&ppib10 {
+	status = "okay";
+};
+
+&ppib11 {
+	status = "okay";
+};
+
+&ppib20 {
+	status = "okay";
+};
+
+&ppib21 {
+	status = "okay";
+};
+
+&ppib22 {
+	status = "okay";
+};
+
+&ppib30 {
+	status = "okay";
+};