From 28e5751a827db1ae1d179361a08ac8897cb453df Mon Sep 17 00:00:00 2001 From: Adam Kondraciuk Date: Thu, 6 Feb 2025 14:00:21 +0100 Subject: [PATCH] [nrf fromlist] boards: nordic: Add nRF54L09 FLPR Add nrF54L09 FLPR core support. Upstream PR #: 85310 Signed-off-by: Adam Kondraciuk --- boards/nordic/nrf54l09pdk/Kconfig.nrf54l09pdk | 1 + boards/nordic/nrf54l09pdk/board.cmake | 6 +- boards/nordic/nrf54l09pdk/board.yml | 3 + .../nrf54l09pdk_nrf54l09-common.dtsi | 12 ++++ .../nrf54l09pdk_nrf54l09-pinctrl.dtsi | 22 +++++++ .../nrf54l09pdk_nrf54l09_cpuflpr.dts | 64 +++++++++++++++++++ .../nrf54l09pdk_nrf54l09_cpuflpr.yaml | 14 ++++ .../nrf54l09pdk_nrf54l09_cpuflpr_defconfig | 19 ++++++ 8 files changed, 140 insertions(+), 1 deletion(-) create mode 100644 boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09_cpuflpr.dts create mode 100644 boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09_cpuflpr.yaml create mode 100644 boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09_cpuflpr_defconfig diff --git a/boards/nordic/nrf54l09pdk/Kconfig.nrf54l09pdk b/boards/nordic/nrf54l09pdk/Kconfig.nrf54l09pdk index bc6aa676281..6fbd4a89c8f 100644 --- a/boards/nordic/nrf54l09pdk/Kconfig.nrf54l09pdk +++ b/boards/nordic/nrf54l09pdk/Kconfig.nrf54l09pdk @@ -3,3 +3,4 @@ config BOARD_NRF54L09PDK select SOC_NRF54L09_ENGA_CPUAPP if BOARD_NRF54L09PDK_NRF54L09_CPUAPP + select SOC_NRF54L09_ENGA_CPUFLPR if BOARD_NRF54L09PDK_NRF54L09_CPUFLPR diff --git a/boards/nordic/nrf54l09pdk/board.cmake b/boards/nordic/nrf54l09pdk/board.cmake index 5d36ac00a3e..f2dd60410ed 100644 --- a/boards/nordic/nrf54l09pdk/board.cmake +++ b/boards/nordic/nrf54l09pdk/board.cmake @@ -1,7 +1,11 @@ # Copyright (c) 2024 Nordic Semiconductor ASA # SPDX-License-Identifier: Apache-2.0 -board_runner_args(jlink "--device=cortex-m33" "--speed=4000") +if (CONFIG_BOARD_NRF54L09PDK_NRF54L09_CPUAPP) + board_runner_args(jlink "--device=cortex-m33" "--speed=4000") +elseif (CONFIG_BOARD_NRF54L09PDK_NRF54L09_CPUFLPR) + board_runner_args(jlink "--speed=4000") +endif() include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/nordic/nrf54l09pdk/board.yml b/boards/nordic/nrf54l09pdk/board.yml index b35f4c1fafe..bfa8419dff9 100644 --- a/boards/nordic/nrf54l09pdk/board.yml +++ b/boards/nordic/nrf54l09pdk/board.yml @@ -4,3 +4,6 @@ board: vendor: nordic socs: - name: nrf54l09 + variants: + - name: xip + cpucluster: cpuflpr diff --git a/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09-common.dtsi b/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09-common.dtsi index 2bdb42b9653..5d23a1a9cac 100644 --- a/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09-common.dtsi +++ b/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09-common.dtsi @@ -60,3 +60,15 @@ pinctrl-1 = <&uart20_sleep>; pinctrl-names = "default", "sleep"; }; + +&uart30 { + current-speed = <115200>; + pinctrl-0 = <&uart30_default>; + pinctrl-1 = <&uart30_sleep>; + pinctrl-names = "default", "sleep"; +}; + +&hfpll { + /* For now use 64 MHz clock for CPU and fast peripherals. */ + clock-frequency = ; +}; diff --git a/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09-pinctrl.dtsi b/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09-pinctrl.dtsi index 83aa91d8a34..12b9aff7822 100644 --- a/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09-pinctrl.dtsi +++ b/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09-pinctrl.dtsi @@ -21,4 +21,26 @@ low-power-enable; }; }; + + /omit-if-no-ref/ uart30_default: uart30_default { + group1 { + psels = , + ; + }; + group2 { + psels = , + ; + bias-pull-up; + }; + }; + + /omit-if-no-ref/ uart30_sleep: uart30_sleep { + group1 { + psels = , + , + , + ; + low-power-enable; + }; + }; }; diff --git a/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09_cpuflpr.dts b/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09_cpuflpr.dts new file mode 100644 index 00000000000..3ae2dac9c5d --- /dev/null +++ b/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09_cpuflpr.dts @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2025 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include "nrf54l09pdk_nrf54l09-common.dtsi" + +/ { + model = "Nordic nRF54L09 PDK nRF54L09 FLPR MCU"; + compatible = "nordic,nrf54l09pdk_nrf54l09-cpuflpr"; + + chosen { + zephyr,console = &uart30; + zephyr,shell-uart = &uart30; + zephyr,code-partition = &cpuflpr_code_partition; + zephyr,flash = &cpuflpr_rram; + zephyr,sram = &cpuflpr_sram; + }; +}; + +&cpuflpr_sram { + status = "okay"; +}; + +&cpuflpr_rram { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + cpuflpr_code_partition: partition@0 { + label = "image-0"; + reg = <0x0 DT_SIZE_K(60)>; + }; + }; +}; + +&grtc { + owned-channels = <3 4>; + status = "okay"; +}; + +&uart30 { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&gpiote20 { + status = "okay"; +}; + +&gpiote30 { + status = "okay"; +}; diff --git a/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09_cpuflpr.yaml b/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09_cpuflpr.yaml new file mode 100644 index 00000000000..47d03bb2ed9 --- /dev/null +++ b/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09_cpuflpr.yaml @@ -0,0 +1,14 @@ +# Copyright (c) 2025 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +identifier: nrf54l09pdk/nrf54l09/cpuflpr +name: nRF54L09-PDK-nRF54L09-Fast-Lightweight-Peripheral-Processor +type: mcu +arch: riscv +toolchain: + - zephyr +ram: 48 +flash: 60 +supported: + - counter + - gpio diff --git a/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09_cpuflpr_defconfig b/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09_cpuflpr_defconfig new file mode 100644 index 00000000000..75f7c4386e3 --- /dev/null +++ b/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09_cpuflpr_defconfig @@ -0,0 +1,19 @@ +# Copyright (c) 2025 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +# Enable UART driver +CONFIG_SERIAL=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable GPIO +CONFIG_GPIO=y + +CONFIG_USE_DT_CODE_PARTITION=y + +# Execute from SRAM +CONFIG_XIP=n + +CONFIG_RISCV_ALWAYS_SWITCH_THROUGH_ECALL=y