diff --git a/doc/nrf/app_dev/device_guides/fem/fem_nrf21540_gpio.rst b/doc/nrf/app_dev/device_guides/fem/fem_nrf21540_gpio.rst
index 71f48b1ba557..4164d8ca7818 100644
--- a/doc/nrf/app_dev/device_guides/fem/fem_nrf21540_gpio.rst
+++ b/doc/nrf/app_dev/device_guides/fem/fem_nrf21540_gpio.rst
@@ -3,7 +3,7 @@
 Enabling GPIO mode support for nRF21540
 #######################################
 
-The `nRF21540`_ device is a range extender that you can use with nRF52 and nRF53 Series devices.
+The `nRF21540`_ device is a range extender that you can use with nRF52, nRF53 and nRF54L Series devices.
 The nRF21540 GPIO mode implementation of FEM is compatible with the nRF21540 device and implements the 3-pin PA/LNA interface.
 
 .. ncs_implementation_desc_start
@@ -74,3 +74,43 @@ To use nRF21540 in GPIO mode, complete the following steps:
       };
 
    The pins defined in the GPIO forwarder node in the application core's devicetree file must match the pins defined in the FEM nodes in the network core's devicetree file.
+
+#. On nRF54L devices, the GPIO pins of the SoC selected to control ``tx-en-gpios``, ``rx-en-gpios`` and ``pdn-gpios`` must support GPIOTE.
+   For example, on the nRF54L15 device, only pins belonging to GPIO P1 or GPIO P0 can be used and GPIO P2 pins cannot be used due to lack of related GPIOTE peripheral.
+   It is recommended for mentioned purpose to use these GPIO pins that belong to the PERI Power Domain of the nRF54L device.
+   For example, on the nRF54L15, these are pins belonging to GPIO P1.
+   Using pins belonging to Low Power Domain (GPIO P0 on nRF54L15) is supported but requires more DPPI and PPIB channels of the SoC.
+   The nRF54L devices contain only 4 PPIB channels between PERI Power Domain and Low Power Domain.
+   Due to this limitation only 2 out of 3 pins from group ``tx-en-gpios``, ``rx-en-gpios`` and ``pdn-gpios`` (for example, ``tx-en-gpios`` and ``rx-en-gpios``) can be controlled by GPIO P0.
+   The one remaining pin of the pin group (for example ``pdn-gpios``) must be controlled other GPIO port.
+   You must also enable appropriate instances of ``DPPIC`` and ``PPIB`` peripherals in the devicetree file:
+
+   .. code-block:: devicetree
+
+      &dppic10 {
+            status = "okay";
+      };
+
+      &ppib11 {
+            status = "okay";
+      };
+
+      &ppib21 {
+            status = "okay";
+      };
+
+      &dppic20 {
+            status = "okay";
+      };
+
+      &ppib22 {
+            status = "okay";
+      };
+
+      &ppib30 {
+            status = "okay";
+      };
+
+      &dppic30 {
+            status = "okay";
+      };
diff --git a/doc/nrf/app_dev/device_guides/fem/index.rst b/doc/nrf/app_dev/device_guides/fem/index.rst
index ba9090d56814..72a0ed65adcd 100644
--- a/doc/nrf/app_dev/device_guides/fem/index.rst
+++ b/doc/nrf/app_dev/device_guides/fem/index.rst
@@ -20,7 +20,7 @@ Zephyr and the |NCS| provides support for developing applications with the follo
      - nRF52, nRF53, nRF54L
    * - nRF21540
      - nRF21540 GPIO
-     - nRF52, nRF53
+     - nRF52, nRF53, nRF54L
    * - nRF21540
      - nRF21540 GPIO+SPI
      - nRF52, nRF53
diff --git a/doc/nrf/releases_and_maturity/releases/release-notes-changelog.rst b/doc/nrf/releases_and_maturity/releases/release-notes-changelog.rst
index 9c10e722c82b..ba3a2d490a90 100644
--- a/doc/nrf/releases_and_maturity/releases/release-notes-changelog.rst
+++ b/doc/nrf/releases_and_maturity/releases/release-notes-changelog.rst
@@ -96,6 +96,7 @@ Developing with Front-End Modules
 
   * :ref:`nRF2220 Front-End Module <ug_radio_fem_nrf2220>`.
   * :ref:`nRF2220 EK shield <ug_radio_fem_nrf2220ek>`.
+  * :ref:`nRF21540 Front-End Module in GPIO mode <ug_radio_fem_nrf21540_gpio>` for the nRF54L Series devices.
 
 Developing with PMICs
 =====================