diff --git a/boards/nordic/nrf7120pdk/Kconfig b/boards/nordic/nrf7120pdk/Kconfig new file mode 100644 index 000000000000..e8f9c144fb54 --- /dev/null +++ b/boards/nordic/nrf7120pdk/Kconfig @@ -0,0 +1,34 @@ +# nRF7120 PDK board configuration + +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_NRF7120PDK_NRF7120_ENGA_CPUAPP_NS + +config NRF_MPC_REGION_SIZE + hex + default 0x1000 + help + Region size for the Memory Protection Controller (MPC) in bytes. + +config NRF_TRUSTZONE_FLASH_REGION_SIZE + hex + default NRF_MPC_REGION_SIZE + help + This defines the flash region size from the TRUSTZONE perspective. + It is used when configuring the TRUSTZONE and when setting alignments + requirements for the partitions. + This abstraction allows us to configure TRUSTZONE without depending + on peripheral specific symbols. + +config NRF_TRUSTZONE_RAM_REGION_SIZE + hex + default NRF_MPC_REGION_SIZE + help + This defines the RAM region size from the TRUSTZONE perspective. + It is used when configuring the TRUSTZONE and when setting alignments + requirements for the partitions. + This abstraction allows us to configure TRUSTZONE without depending + on peripheral specific symbols. + +endif # BOARD_NRF7120PDK_NRF7120_ENGA_CPUAPP_NS diff --git a/boards/nordic/nrf7120pdk/Kconfig.defconfig b/boards/nordic/nrf7120pdk/Kconfig.defconfig index a8bab063b10d..b84db8764e15 100644 --- a/boards/nordic/nrf7120pdk/Kconfig.defconfig +++ b/boards/nordic/nrf7120pdk/Kconfig.defconfig @@ -4,8 +4,33 @@ if BOARD_NRF7120PDK_NRF7120_ENGA_CPUAPP config BT_CTLR default BT + +config ROM_START_OFFSET + default 0 if PARTITION_MANAGER_ENABLED + default 0x800 if BOOTLOADER_MCUBOOT + endif # BOARD_NRF7120PDK_NRF7120_ENGA_CPUAPP + +if BOARD_NRF7120PDK_NRF7120_ENGA_CPUAPP_NS + +config BT_CTLR + default BT + +# By default, if we build for a Non-Secure version of the board, +# enable building with TF-M as the Secure Execution Environment. +config BUILD_WITH_TFM + default y + +# By default, if we build with TF-M, instruct build system to +# flash the combined TF-M (Secure) & Zephyr (Non Secure) image +config TFM_FLASH_MERGED_BINARY + default y + depends on BUILD_WITH_TFM + +endif # BOARD_NRF7120PDK_NRF7120_ENGA_CPUAPP_NS + if BOARD_NRF7120PDK_NRF7120_ENGA_CPUFLPR || BOARD_NRF7120PDK_NRF7120_ENGA_CPUFLPR_XIP + # As FLPR has limited memory most of tests does not fit with asserts enabled. config ASSERT default n if ZTEST diff --git a/boards/nordic/nrf7120pdk/Kconfig.nrf7120pdk b/boards/nordic/nrf7120pdk/Kconfig.nrf7120pdk index 0e12ae8f7b38..3427d7d327db 100644 --- a/boards/nordic/nrf7120pdk/Kconfig.nrf7120pdk +++ b/boards/nordic/nrf7120pdk/Kconfig.nrf7120pdk @@ -1,10 +1,7 @@ # Copyright (c) 2024 Nordic Semiconductor ASA # SPDX-License-Identifier: Apache-2.0 config BOARD_NRF7120PDK -<<<<<<< HEAD - select SOC_NRF7120_ENGA_CPUAPP if BOARD_NRF7120PDK_NRF7120_ENGA_CPUAPP -======= - select SOC_NRF7120_ENGA_CPUAPP if BOARD_NRF7120PDK_NRF7120_ENGA_CPUAPP || BOARD_NRF7120PDK_NRF7120_ENGA_CPUAPP_NS ->>>>>>> 4e69912 (ssquash board) + select SOC_NRF7120_ENGA_CPUAPP if BOARD_NRF7120PDK_NRF7120_ENGA_CPUAPP || \ + BOARD_NRF7120PDK_NRF7120_ENGA_CPUAPP_NS select SOC_NRF7120_ENGA_CPUFLPR if BOARD_NRF7120PDK_NRF7120_ENGA_CPUFLPR || \ BOARD_NRF7120PDK_NRF7120_ENGA_CPUFLPR_XIP diff --git a/boards/nordic/nrf7120pdk/board.cmake b/boards/nordic/nrf7120pdk/board.cmake index 68ad59a5fedd..3aaf90e6bcf5 100644 --- a/boards/nordic/nrf7120pdk/board.cmake +++ b/boards/nordic/nrf7120pdk/board.cmake @@ -7,6 +7,14 @@ elseif(CONFIG_SOC_NRF7120_ENGA_CPUFLPR) board_runner_args(jlink "--speed=4000") endif() +if(BOARD_NRF7120PDK_NRF7120_CPUAPP_NS) + set(TFM_PUBLIC_KEY_FORMAT "full") +endif() + +if(CONFIG_TFM_FLASH_MERGED_BINARY) + set_property(TARGET runners_yaml_props_target PROPERTY hex_file tfm_merged.hex) +endif() + include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/nordic/nrf7120pdk/board.yml b/boards/nordic/nrf7120pdk/board.yml index ea1f6a9b4578..1ec37ec390c9 100644 --- a/boards/nordic/nrf7120pdk/board.yml +++ b/boards/nordic/nrf7120pdk/board.yml @@ -6,6 +6,8 @@ board: variants: - name: xip cpucluster: cpuflpr + - name: ns + cpucluster: cpuapp revision: format: major.minor.patch default: "0.0.0" diff --git a/boards/nordic/nrf7120pdk/nrf7120pdk_nrf7120_enga_cpuapp_ns.dts b/boards/nordic/nrf7120pdk/nrf7120pdk_nrf7120_enga_cpuapp_ns.dts new file mode 100644 index 000000000000..b764cdc21cf2 --- /dev/null +++ b/boards/nordic/nrf7120pdk/nrf7120pdk_nrf7120_enga_cpuapp_ns.dts @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#define USE_NON_SECURE_ADDRESS_MAP 1 + +#include "nrf7120_enga_cpuapp_common.dtsi" + +/ { + compatible = "nordic,nrf7120pdk_nrf7120_enga-cpuapp"; + model = "Nordic nRF7120 PDK nRF7120_ENGA Application MCU"; + + chosen { + zephyr,sram = &cpuapp_sram; + }; +}; + +&uart30 { + /* Disable so that TF-M can use this UART */ + status = "disabled"; + + current-speed = <115200>; + pinctrl-0 = <&uart30_default>; + pinctrl-1 = <&uart30_sleep>; + pinctrl-names = "default", "sleep"; +}; diff --git a/boards/nordic/nrf7120pdk/nrf7120pdk_nrf7120_enga_cpuapp_ns.yaml b/boards/nordic/nrf7120pdk/nrf7120pdk_nrf7120_enga_cpuapp_ns.yaml new file mode 100644 index 000000000000..15b9f55f5ff6 --- /dev/null +++ b/boards/nordic/nrf7120pdk/nrf7120pdk_nrf7120_enga_cpuapp_ns.yaml @@ -0,0 +1,22 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + +identifier: nrf7120pdk/nrf7120_enga/cpuapp/ns +name: nRF7120-PDK-nRF7120_ENGA-Application-Non-Secure +type: mcu +arch: arm +toolchain: + - gnuarmemb + - xtools + - zephyr +ram: 1024 +flash: 4088 +supported: + - adc + - gpio + - i2c + - spi + - counter + - watchdog + - adc + - i2s diff --git a/boards/nordic/nrf7120pdk/nrf7120pdk_nrf7120_enga_cpuapp_ns_defconfig b/boards/nordic/nrf7120pdk/nrf7120pdk_nrf7120_enga_cpuapp_ns_defconfig new file mode 100644 index 000000000000..70f01d7c9baf --- /dev/null +++ b/boards/nordic/nrf7120pdk/nrf7120pdk_nrf7120_enga_cpuapp_ns_defconfig @@ -0,0 +1,31 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y + +# Enable TrustZone-M +CONFIG_ARM_TRUSTZONE_M=y + +# This Board implies building Non-Secure firmware +CONFIG_TRUSTED_EXECUTION_NONSECURE=y + +# Don't enable the cache in the non-secure image as it is a +# secure-only peripheral on 54l +CONFIG_CACHE_MANAGEMENT=n +CONFIG_EXTERNAL_CACHE=n + +CONFIG_UART_CONSOLE=y +CONFIG_CONSOLE=y +CONFIG_SERIAL=y + +# Enable GPIO +CONFIG_GPIO=y + +# Start SYSCOUNTER on driver init +CONFIG_NRF_GRTC_START_SYSCOUNTER=y diff --git a/soc/nordic/nrf71/soc.c b/soc/nordic/nrf71/soc.c index df082f660647..fdd3c83c4b2f 100644 --- a/soc/nordic/nrf71/soc.c +++ b/soc/nordic/nrf71/soc.c @@ -12,11 +12,19 @@ * for the Nordic Semiconductor nRF71 family processor. */ +#ifdef __NRF_TFM__ +#include +#endif + #include #include #include #include +#ifndef __NRF_TFM__ +#include +#endif + #if defined(NRF_APPLICATION) #include #include @@ -29,8 +37,22 @@ LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL); void soc_early_init_hook(void) { + /* Update the SystemCoreClock global variable with current core clock + * retrieved from hardware state. + */ +#if !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) || defined(__NRF_TFM__) + /* Currently not supported for non-secure */ + SystemCoreClockUpdate(); +#endif + +#ifdef __NRF_TFM__ + /* TF-M enables the instruction cache from target_cfg.c, so we + * don't need to enable it here. + */ +#else /* Enable ICACHE */ sys_cache_instr_enable(); +#endif }